From ba49b610771a8aeb38ae85b229bed31ca4a25ec1 Mon Sep 17 00:00:00 2001
From: Greg Ungerer <gerg@uclinux.org>
Date: Sat, 24 Dec 2011 12:42:30 +1000
Subject: [PATCH] --- yaml --- r: 292446 b: refs/heads/master c:
 3b2039b26619745a736b896caf8df05a2a15df3a h: refs/heads/master v: v3

---
 [refs]                                 |  2 +-
 trunk/arch/m68k/include/asm/m528xsim.h | 13 +++++++++++++
 trunk/arch/m68k/include/asm/mcfqspi.h  |  4 +---
 trunk/arch/m68k/platform/528x/config.c | 13 ++++---------
 4 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/[refs] b/[refs]
index 6410c3e543ae..a5f0a290aaea 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 6c84a60eb98911cb376cf0a340f811401f3b29a4
+refs/heads/master: 3b2039b26619745a736b896caf8df05a2a15df3a
diff --git a/trunk/arch/m68k/include/asm/m528xsim.h b/trunk/arch/m68k/include/asm/m528xsim.h
index a363c648b97b..e4581a4a1035 100644
--- a/trunk/arch/m68k/include/asm/m528xsim.h
+++ b/trunk/arch/m68k/include/asm/m528xsim.h
@@ -51,6 +51,8 @@
 #define	MCF_IRQ_FECTX0		(MCFINT_VECBASE + MCFINT_FECTX0)
 #define	MCF_IRQ_FECENTC0	(MCFINT_VECBASE + MCFINT_FECENTC0)
 
+#define	MCF_IRQ_QSPI		(MCFINT_VECBASE + MCFINT_QSPI)
+
 /*
  *	SDRAM configuration registers.
  */
@@ -81,6 +83,17 @@
 #define	MCFFEC_BASE0		(MCF_IPSBAR + 0x00001000)
 #define	MCFFEC_SIZE0		0x800
 
+/*
+ *	QSPI module.
+ */
+#define	MCFQSPI_IOBASE		(MCF_IPSBAR + 0x340)
+#define	MCFQSPI_SIZE		0x40
+
+#define	MCFQSPI_CS0		147
+#define	MCFQSPI_CS1		148
+#define	MCFQSPI_CS2		149
+#define	MCFQSPI_CS3		150
+
 /*
  * 	GPIO registers
  */
diff --git a/trunk/arch/m68k/include/asm/mcfqspi.h b/trunk/arch/m68k/include/asm/mcfqspi.h
index 57fcbc2c0dac..f3d9640f788d 100644
--- a/trunk/arch/m68k/include/asm/mcfqspi.h
+++ b/trunk/arch/m68k/include/asm/mcfqspi.h
@@ -21,9 +21,7 @@
 #ifndef mcfqspi_h
 #define mcfqspi_h
 
-#if defined(CONFIG_M528x)
-#define	MCFQSPI_IOBASE		(MCF_IPSBAR + 0x340)
-#elif defined(CONFIG_M532x)
+#if defined(CONFIG_M532x)
 #define MCFQSPI_IOBASE         0xFC058000
 #endif
 #define MCFQSPI_IOSIZE		0x40
diff --git a/trunk/arch/m68k/platform/528x/config.c b/trunk/arch/m68k/platform/528x/config.c
index 3e015dc00c8e..24f5afcf0082 100644
--- a/trunk/arch/m68k/platform/528x/config.c
+++ b/trunk/arch/m68k/platform/528x/config.c
@@ -30,22 +30,17 @@
 #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
 static struct resource m528x_qspi_resources[] = {
 	{
-		.start		= MCFQSPI_IOBASE,
-		.end		= MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
+		.start		= MCFQSPI_BASE,
+		.end		= MCFQSPI_BASE + MCFQSPI_SIZE - 1,
 		.flags		= IORESOURCE_MEM,
 	},
 	{
-		.start		= MCFINT_VECBASE + MCFINT_QSPI,
-		.end		= MCFINT_VECBASE + MCFINT_QSPI,
+		.start		= MCF_IRQ_QSPI,
+		.end		= MCF_IRQ_QSPI,
 		.flags		= IORESOURCE_IRQ,
 	},
 };
 
-#define MCFQSPI_CS0    147
-#define MCFQSPI_CS1    148
-#define MCFQSPI_CS2    149
-#define MCFQSPI_CS3    150
-
 static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control)
 {
 	int status;