From bc50efbd392d2fdd937156e04346618fb3432e88 Mon Sep 17 00:00:00 2001
From: Benoit Cousson <b-cousson@ti.com>
Date: Tue, 21 Sep 2010 10:34:10 -0600
Subject: [PATCH] --- yaml --- r: 216851 b: refs/heads/master c:
 16b040129e324598d13ff2e2b3469dc2e909ce12 h: refs/heads/master i:   216849:
 614b7c3e7716f71476ffd6dc897652f09e402a42   216847:
 aa5487b74fd30dde58401a11cee137f67ce2f42d v: v3

---
 [refs]                                       |  2 +-
 trunk/arch/arm/mach-omap2/prcm.c             | 24 ++++++++++++++++++++
 trunk/arch/arm/plat-omap/include/plat/prcm.h |  2 ++
 3 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 11e688e3cd30..5871fb6fbbf1 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 12b1fdb45c2594070bb36e39cd89a33547aad8fb
+refs/heads/master: 16b040129e324598d13ff2e2b3469dc2e909ce12
diff --git a/trunk/arch/arm/mach-omap2/prcm.c b/trunk/arch/arm/mach-omap2/prcm.c
index 96f461682c91..d4388d34c26a 100644
--- a/trunk/arch/arm/mach-omap2/prcm.c
+++ b/trunk/arch/arm/mach-omap2/prcm.c
@@ -216,6 +216,30 @@ u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
 	return v;
 }
 
+/* Read a PRM register, AND it, and shift the result down to bit 0 */
+u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
+{
+	u32 v;
+
+	v = __raw_readl(reg);
+	v &= mask;
+	v >>= __ffs(mask);
+
+	return v;
+}
+
+/* Read-modify-write a register in a PRM module. Caller must lock */
+u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
+{
+	u32 v;
+
+	v = __raw_readl(reg);
+	v &= ~mask;
+	v |= bits;
+	__raw_writel(v, reg);
+
+	return v;
+}
 /* Read a register in a CM module */
 u32 cm_read_mod_reg(s16 module, u16 idx)
 {
diff --git a/trunk/arch/arm/plat-omap/include/plat/prcm.h b/trunk/arch/arm/plat-omap/include/plat/prcm.h
index 9fbd91419cd1..ab77442e42ab 100644
--- a/trunk/arch/arm/plat-omap/include/plat/prcm.h
+++ b/trunk/arch/arm/plat-omap/include/plat/prcm.h
@@ -38,6 +38,8 @@ u32 prm_read_mod_reg(s16 module, u16 idx);
 void prm_write_mod_reg(u32 val, s16 module, u16 idx);
 u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
 u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask);
+u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
+u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
 u32 cm_read_mod_reg(s16 module, u16 idx);
 void cm_write_mod_reg(u32 val, s16 module, u16 idx);
 u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);