From bc6c4016a830224955aec30b85b17b672815dd65 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 24 Sep 2012 11:02:54 -0600 Subject: [PATCH] --- yaml --- r: 326685 b: refs/heads/master c: 0288ac4d666666d1d12a83deee1a27df1debdb7c h: refs/heads/master i: 326683: b2f0aa60b1009f5f23897693d1bb468bf56092cc v: v3 --- [refs] | 2 +- trunk/Documentation/ABI/testing/sysfs-tty | 9 - .../devicetree/bindings/arm/pmu.txt | 4 - .../tty/serial/nxp-lpc32xx-hsuart.txt | 14 - .../bindings/tty/serial/of-serial.txt | 2 - trunk/Documentation/i2c/busses/i2c-i801 | 1 - trunk/Documentation/serial/00-INDEX | 2 + trunk/Documentation/serial/computone.txt | 520 +++ trunk/MAINTAINERS | 3 +- trunk/Makefile | 2 +- trunk/arch/alpha/kernel/srmcons.c | 1 - trunk/arch/arm/Kconfig | 9 +- trunk/arch/arm/Kconfig.debug | 6 +- trunk/arch/arm/Makefile | 4 +- trunk/arch/arm/boot/compressed/head.S | 4 - trunk/arch/arm/configs/kzm9d_defconfig | 1 - trunk/arch/arm/configs/kzm9g_defconfig | 1 - trunk/arch/arm/include/asm/assembler.h | 8 - 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trunk/include/linux/cd1400.h | 292 ++ trunk/include/linux/cdk.h | 486 +++ trunk/include/linux/comstats.h | 119 + trunk/include/linux/generic_serial.h | 35 + trunk/include/linux/i2c-pnx.h | 1 - trunk/include/linux/i2c/twl.h | 3 + trunk/include/linux/istallion.h | 123 + trunk/include/linux/kbd_kern.h | 13 + trunk/include/linux/kobject.h | 2 +- trunk/include/linux/mISDNhw.h | 2 +- trunk/include/linux/mfd/core.h | 4 +- trunk/include/linux/mfd/tps65217.h | 12 +- trunk/include/linux/mfd/twl6040.h | 1 + trunk/include/linux/mlx4/device.h | 13 - trunk/include/linux/nfs_fs.h | 5 + trunk/include/linux/nfs_xdr.h | 2 +- trunk/include/linux/omapfb.h | 7 +- trunk/include/linux/perf_event.h | 4 +- trunk/include/linux/platform_data/max310x.h | 67 - trunk/include/linux/platform_data/omap1_bl.h | 11 - trunk/include/linux/platform_data/sccnxp.h | 93 - trunk/include/linux/sc26198.h | 533 +++ trunk/include/linux/sched.h | 1 + trunk/include/linux/serial.h | 81 +- trunk/include/linux/serial167.h | 157 + trunk/include/linux/serial_8250.h | 33 +- trunk/include/linux/serial_core.h | 4 +- trunk/include/linux/serial_reg.h | 4 - trunk/include/linux/stallion.h | 147 + trunk/include/linux/sunrpc/xprt.h | 3 - trunk/include/linux/tty.h | 92 +- trunk/include/linux/tty_driver.h | 47 +- trunk/include/linux/tty_flags.h | 78 - trunk/include/net/bluetooth/smp.h | 2 +- trunk/include/net/irda/ircomm_tty.h | 17 +- trunk/include/net/xfrm.h | 3 - trunk/include/target/target_core_backend.h | 4 +- trunk/include/target/target_core_base.h | 1 - trunk/kernel/events/core.c | 64 +- trunk/kernel/events/hw_breakpoint.c | 11 +- trunk/kernel/sched/core.c | 73 +- trunk/kernel/sched/fair.c | 37 +- trunk/kernel/sched/rt.c | 1 - trunk/kernel/sched/sched.h | 1 + trunk/kernel/time/tick-sched.c | 1 - trunk/kernel/workqueue.c | 110 +- trunk/lib/digsig.c | 6 +- trunk/mm/memblock.c | 2 +- trunk/net/bluetooth/hci_conn.c | 4 - trunk/net/bluetooth/l2cap_core.c | 11 +- trunk/net/bluetooth/l2cap_sock.c | 2 +- trunk/net/bluetooth/rfcomm/tty.c | 10 +- trunk/net/bluetooth/smp.c | 10 +- trunk/net/bridge/netfilter/ebt_log.c | 2 +- trunk/net/caif/cfsrvl.c | 5 +- trunk/net/core/dev.c | 11 +- trunk/net/core/pktgen.c | 2 +- trunk/net/core/sock.c | 9 +- trunk/net/ipv4/udp.c | 5 - trunk/net/ipv6/tcp_ipv6.c | 5 +- trunk/net/ipv6/udp.c | 11 - trunk/net/irda/ircomm/ircomm_param.c | 5 + trunk/net/irda/ircomm/ircomm_tty.c | 320 +- trunk/net/irda/ircomm/ircomm_tty_attach.c | 40 +- trunk/net/irda/ircomm/ircomm_tty_ioctl.c | 33 +- trunk/net/l2tp/l2tp_core.c | 4 - trunk/net/l2tp/l2tp_eth.c | 2 +- trunk/net/mac80211/cfg.c | 9 +- trunk/net/mac80211/mlme.c | 4 - trunk/net/netfilter/nf_conntrack_proto_tcp.c | 29 +- trunk/net/netfilter/nfnetlink_log.c | 14 +- trunk/net/netfilter/xt_LOG.c | 37 +- trunk/net/netrom/af_netrom.c | 7 +- trunk/net/openvswitch/actions.c | 2 +- trunk/net/openvswitch/datapath.c | 6 +- trunk/net/openvswitch/flow.h | 8 +- trunk/net/sched/sch_cbq.c | 5 +- trunk/net/sched/sch_fq_codel.c | 2 +- trunk/net/sched/sch_gred.c | 38 +- trunk/net/sctp/output.c | 21 +- trunk/net/sunrpc/xprt.c | 34 +- trunk/net/sunrpc/xprtrdma/transport.c | 1 - trunk/net/sunrpc/xprtsock.c | 3 - trunk/net/wireless/nl80211.c | 4 +- trunk/net/xfrm/xfrm_input.c | 2 +- trunk/net/xfrm/xfrm_replay.c | 15 - trunk/scripts/link-vmlinux.sh | 7 +- trunk/sound/core/compress_offload.c | 8 +- trunk/sound/pci/hda/hda_codec.c | 2 +- trunk/sound/pci/hda/hda_intel.c | 2 - trunk/sound/pci/hda/patch_sigmatel.c | 2 +- trunk/sound/pci/ice1712/prodigy_hifi.c | 3 +- trunk/sound/soc/codecs/arizona.c | 2 +- trunk/sound/soc/codecs/mc13783.c | 8 +- trunk/sound/soc/codecs/wm8904.c | 2 +- trunk/sound/soc/fsl/imx-sgtl5000.c | 2 +- trunk/sound/soc/omap/am3517evm.c | 2 +- trunk/sound/soc/omap/mcbsp.c | 2 - trunk/sound/soc/omap/omap-abe-twl6040.c | 4 + trunk/sound/soc/omap/omap-mcbsp.c | 1 - trunk/sound/soc/omap/omap-mcpdm.c | 2 - trunk/sound/soc/omap/omap-pcm.c | 1 - trunk/sound/soc/omap/sdp3430.c | 1 - trunk/sound/soc/samsung/dma.c | 8 +- trunk/sound/soc/soc-dapm.c | 5 +- trunk/sound/soc/spear/spear_pcm.c | 2 +- trunk/sound/soc/tegra/tegra_alc5632.c | 1 + trunk/sound/soc/tegra/tegra_pcm.c | 4 +- trunk/sound/soc/ux500/ux500_msp_i2s.c | 25 +- trunk/sound/usb/pcm.c | 6 - 813 files changed, 18043 insertions(+), 20990 deletions(-) delete mode 100644 trunk/Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt create mode 100644 trunk/Documentation/serial/computone.txt delete mode 100644 trunk/arch/arm/kernel/perf_event_cpu.c create mode 100644 trunk/arch/arm/kernel/pmu.c delete mode 100644 trunk/arch/arm/mach-omap2/omap_hwmod_33xx_data.c delete mode 100644 trunk/arch/arm/mach-omap2/soc.h delete mode 100644 trunk/arch/arm/mach-tegra/sleep-t20.S delete mode 100644 trunk/arch/arm/mach-tegra/sleep-t30.S delete mode 100644 trunk/arch/arm/mach-tegra/sleep.h delete mode 100644 trunk/arch/arm/mach-tegra/tegra20_clocks.c delete mode 100644 trunk/arch/arm/mach-tegra/tegra20_clocks.h delete mode 100644 trunk/arch/arm/mach-tegra/tegra20_clocks_data.c create mode 100644 trunk/arch/arm/mach-tegra/tegra2_clocks.c delete mode 100644 trunk/arch/arm/mach-tegra/tegra30_clocks.h delete mode 100644 trunk/arch/arm/mach-tegra/tegra30_clocks_data.c delete mode 100644 trunk/arch/arm/mach-tegra/tegra_cpu_car.h create mode 100644 trunk/arch/arm/plat-omap/devices.c rename trunk/arch/arm/{mach-omap2 => plat-omap/include/plat}/am33xx.h (100%) create mode 100644 trunk/arch/arm/plat-omap/include/plat/board.h delete mode 100644 trunk/arch/arm/plat-omap/include/plat/debug-devices.h create mode 100644 trunk/arch/arm/plat-omap/include/plat/gpio-switch.h rename trunk/{include/linux/platform_data/gpio-omap.h => arch/arm/plat-omap/include/plat/gpio.h} (94%) create mode 100644 trunk/arch/arm/plat-omap/include/plat/hardware.h create mode 100644 trunk/arch/arm/plat-omap/include/plat/irqs-44xx.h create mode 100644 trunk/arch/arm/plat-omap/include/plat/irqs.h rename trunk/arch/arm/{mach-omap1/include/mach => plat-omap/include/plat}/omap1510.h (97%) rename trunk/arch/arm/{mach-omap1/include/mach => plat-omap/include/plat}/omap16xx.h (99%) rename trunk/arch/arm/{mach-omap2 => plat-omap/include/plat}/omap24xx.h (98%) rename trunk/arch/arm/{mach-omap2 => plat-omap/include/plat}/omap34xx.h (98%) rename trunk/arch/arm/{mach-omap2 => plat-omap/include/plat}/omap44xx.h (97%) rename trunk/arch/arm/{mach-omap2 => plat-omap/include/plat}/omap54xx.h (100%) rename trunk/arch/arm/{mach-omap1/include/mach => plat-omap/include/plat}/omap7xx.h (98%) rename trunk/arch/arm/{mach-omap2 => plat-omap/include/plat}/ti81xx.h (100%) delete mode 100644 trunk/drivers/tty/serial/lpc32xx_hs.c create mode 100644 trunk/drivers/tty/serial/max3107.c create mode 100644 trunk/drivers/tty/serial/max3107.h delete mode 100644 trunk/drivers/tty/serial/max310x.c delete mode 100644 trunk/drivers/tty/serial/sccnxp.c create mode 100644 trunk/firmware/intelliport2.bin.ihex create mode 100644 trunk/include/linux/cd1400.h create mode 100644 trunk/include/linux/cdk.h create mode 100644 trunk/include/linux/comstats.h create mode 100644 trunk/include/linux/generic_serial.h create mode 100644 trunk/include/linux/istallion.h delete mode 100644 trunk/include/linux/platform_data/max310x.h delete mode 100644 trunk/include/linux/platform_data/omap1_bl.h delete mode 100644 trunk/include/linux/platform_data/sccnxp.h create mode 100644 trunk/include/linux/sc26198.h create mode 100644 trunk/include/linux/serial167.h create mode 100644 trunk/include/linux/stallion.h delete mode 100644 trunk/include/linux/tty_flags.h diff --git a/[refs] b/[refs] index b7b1487cc44d..b3440cdfc083 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8437de04d1475ee4af43a217ac2ca74eb9f58ad1 +refs/heads/master: 0288ac4d666666d1d12a83deee1a27df1debdb7c diff --git a/trunk/Documentation/ABI/testing/sysfs-tty b/trunk/Documentation/ABI/testing/sysfs-tty index 0c430150d929..b138b663bf54 100644 --- a/trunk/Documentation/ABI/testing/sysfs-tty +++ b/trunk/Documentation/ABI/testing/sysfs-tty @@ -17,12 +17,3 @@ Description: device, like 'tty1'. The file supports poll() to detect virtual console switches. - -What: /sys/class/tty/ttyS0/uartclk -Date: Sep 2012 -Contact: Tomas Hlavacek -Description: - Shows the current uartclk value associated with the - UART port in serial_core, that is bound to TTY like ttyS0. - uartclk = 16 * baud_base - diff --git a/trunk/Documentation/devicetree/bindings/arm/pmu.txt b/trunk/Documentation/devicetree/bindings/arm/pmu.txt index 343781b9f246..1c044eb320cc 100644 --- a/trunk/Documentation/devicetree/bindings/arm/pmu.txt +++ b/trunk/Documentation/devicetree/bindings/arm/pmu.txt @@ -7,12 +7,8 @@ representation in the device tree should be done as under:- Required properties: - compatible : should be one of - "arm,cortex-a15-pmu" "arm,cortex-a9-pmu" "arm,cortex-a8-pmu" - "arm,cortex-a7-pmu" - "arm,cortex-a5-pmu" - "arm,arm11mpcore-pmu" "arm,arm1176-pmu" "arm,arm1136-pmu" - interrupts : 1 combined interrupt or 1 per core. diff --git a/trunk/Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt b/trunk/Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt deleted file mode 100644 index 0d439dfc1aa5..000000000000 --- a/trunk/Documentation/devicetree/bindings/tty/serial/nxp-lpc32xx-hsuart.txt +++ /dev/null @@ -1,14 +0,0 @@ -* NXP LPC32xx SoC High Speed UART - -Required properties: -- compatible: Should be "nxp,lpc3220-hsuart" -- reg: Should contain registers location and length -- interrupts: Should contain interrupt - -Example: - - uart1: serial@40014000 { - compatible = "nxp,lpc3220-hsuart"; - reg = <0x40014000 0x1000>; - interrupts = <26 0>; - }; diff --git a/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt index ba385f2e0ddc..0847fdeee11a 100644 --- a/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt +++ b/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt @@ -25,8 +25,6 @@ Optional properties: accesses to the UART (e.g. TI davinci). - used-by-rtas : set to indicate that the port is in use by the OpenFirmware RTAS and should not be registered. -- no-loopback-test: set to indicate that the port does not implements loopback - test mode Example: diff --git a/trunk/Documentation/i2c/busses/i2c-i801 b/trunk/Documentation/i2c/busses/i2c-i801 index 157416e78cc4..615142da4ef6 100644 --- a/trunk/Documentation/i2c/busses/i2c-i801 +++ b/trunk/Documentation/i2c/busses/i2c-i801 @@ -21,7 +21,6 @@ Supported adapters: * Intel DH89xxCC (PCH) * Intel Panther Point (PCH) * Intel Lynx Point (PCH) - * Intel Lynx Point-LP (PCH) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller diff --git a/trunk/Documentation/serial/00-INDEX b/trunk/Documentation/serial/00-INDEX index f7b0c7dc25ef..e09468ad3cb1 100644 --- a/trunk/Documentation/serial/00-INDEX +++ b/trunk/Documentation/serial/00-INDEX @@ -2,6 +2,8 @@ - this file. README.cycladesZ - info on Cyclades-Z firmware loading. +computone.txt + - info on Computone Intelliport II/Plus Multiport Serial Driver. digiepca.txt - info on Digi Intl. {PC,PCI,EISA}Xx and Xem series cards. hayes-esp.txt diff --git a/trunk/Documentation/serial/computone.txt b/trunk/Documentation/serial/computone.txt new file mode 100644 index 000000000000..a6a1158ea2ba --- /dev/null +++ b/trunk/Documentation/serial/computone.txt @@ -0,0 +1,520 @@ +NOTE: This is an unmaintained driver. It is not guaranteed to work due to +changes made in the tty layer in 2.6. If you wish to take over maintenance of +this driver, contact Michael Warfield . + +Changelog: +---------- +11-01-2001: Original Document + +10-29-2004: Minor misspelling & format fix, update status of driver. + James Nelson + +Computone Intelliport II/Plus Multiport Serial Driver +----------------------------------------------------- + +Release Notes For Linux Kernel 2.2 and higher. +These notes are for the drivers which have already been integrated into the +kernel and have been tested on Linux kernels 2.0, 2.2, 2.3, and 2.4. + +Version: 1.2.14 +Date: 11/01/2001 +Historical Author: Andrew Manison +Primary Author: Doug McNash + +This file assumes that you are using the Computone drivers which are +integrated into the kernel sources. For updating the drivers or installing +drivers into kernels which do not already have Computone drivers, please +refer to the instructions in the README.computone file in the driver patch. + + +1. INTRODUCTION + +This driver supports the entire family of Intelliport II/Plus controllers +with the exception of the MicroChannel controllers. It does not support +products previous to the Intelliport II. + +This driver was developed on the v2.0.x Linux tree and has been tested up +to v2.4.14; it will probably not work with earlier v1.X kernels,. + + +2. QUICK INSTALLATION + +Hardware - If you have an ISA card, find a free interrupt and io port. + List those in use with `cat /proc/interrupts` and + `cat /proc/ioports`. Set the card dip switches to a free + address. You may need to configure your BIOS to reserve an + irq for an ISA card. PCI and EISA parameters are set + automagically. Insert card into computer with the power off + before or after drivers installation. + + Note the hardware address from the Computone ISA cards installed into + the system. These are required for editing ip2.c or editing + /etc/modprobe.d/*.conf, or for specification on the modprobe + command line. + + Note that the /etc/modules.conf should be used for older (pre-2.6) + kernels. + +Software - + +Module installation: + +a) Determine free irq/address to use if any (configure BIOS if need be) +b) Run "make config" or "make menuconfig" or "make xconfig" + Select (m) module for CONFIG_COMPUTONE under character + devices. CONFIG_PCI and CONFIG_MODULES also may need to be set. +c) Set address on ISA cards then: + edit /usr/src/linux/drivers/char/ip2.c if needed + or + edit config file in /etc/modprobe.d/ if needed (module). + or both to match this setting. +d) Run "make modules" +e) Run "make modules_install" +f) Run "/sbin/depmod -a" +g) install driver using `modprobe ip2 ` (options listed below) +h) run ip2mkdev (either the script below or the binary version) + + +Kernel installation: + +a) Determine free irq/address to use if any (configure BIOS if need be) +b) Run "make config" or "make menuconfig" or "make xconfig" + Select (y) kernel for CONFIG_COMPUTONE under character + devices. CONFIG_PCI may need to be set if you have PCI bus. +c) Set address on ISA cards then: + edit /usr/src/linux/drivers/char/ip2.c + (Optional - may be specified on kernel command line now) +d) Run "make zImage" or whatever target you prefer. +e) mv /usr/src/linux/arch/x86/boot/zImage to /boot. +f) Add new config for this kernel into /etc/lilo.conf, run "lilo" + or copy to a floppy disk and boot from that floppy disk. +g) Reboot using this kernel +h) run ip2mkdev (either the script below or the binary version) + +Kernel command line options: + +When compiling the driver into the kernel, io and irq may be +compiled into the driver by editing ip2.c and setting the values for +io and irq in the appropriate array. An alternative is to specify +a command line parameter to the kernel at boot up. + + ip2=io0,irq0,io1,irq1,io2,irq2,io3,irq3 + +Note that this order is very different from the specifications for the +modload parameters which have separate IRQ and IO specifiers. + +The io port also selects PCI (1) and EISA (2) boards. + + io=0 No board + io=1 PCI board + io=2 EISA board + else ISA board io address + +You only need to specify the boards which are present. + + Examples: + + 2 PCI boards: + + ip2=1,0,1,0 + + 1 ISA board at 0x310 irq 5: + + ip2=0x310,5 + +This can be added to and "append" option in lilo.conf similar to this: + + append="ip2=1,0,1,0" + + +3. INSTALLATION + +Previously, the driver sources were packaged with a set of patch files +to update the character drivers' makefile and configuration file, and other +kernel source files. A build script (ip2build) was included which applies +the patches if needed, and build any utilities needed. +What you receive may be a single patch file in conventional kernel +patch format build script. That form can also be applied by +running patch -p1 < ThePatchFile. Otherwise run ip2build. + +The driver can be installed as a module (recommended) or built into the +kernel. This is selected as for other drivers through the `make config` +command from the root of the Linux source tree. If the driver is built +into the kernel you will need to edit the file ip2.c to match the boards +you are installing. See that file for instructions. If the driver is +installed as a module the configuration can also be specified on the +modprobe command line as follows: + + modprobe ip2 irq=irq1,irq2,irq3,irq4 io=addr1,addr2,addr3,addr4 + +where irqnum is one of the valid Intelliport II interrupts (3,4,5,7,10,11, +12,15) and addr1-4 are the base addresses for up to four controllers. If +the irqs are not specified the driver uses the default in ip2.c (which +selects polled mode). If no base addresses are specified the defaults in +ip2.c are used. If you are autoloading the driver module with kerneld or +kmod the base addresses and interrupt number must also be set in ip2.c +and recompile or just insert and options line in /etc/modprobe.d/*.conf or both. +The options line is equivalent to the command line and takes precedence over +what is in ip2.c. + +config sample to put /etc/modprobe.d/*.conf: + options ip2 io=1,0x328 irq=1,10 + alias char-major-71 ip2 + alias char-major-72 ip2 + alias char-major-73 ip2 + +The equivalent in ip2.c: + +static int io[IP2_MAX_BOARDS]= { 1, 0x328, 0, 0 }; +static int irq[IP2_MAX_BOARDS] = { 1, 10, -1, -1 }; + +The equivalent for the kernel command line (in lilo.conf): + + append="ip2=1,1,0x328,10" + + +Note: Both io and irq should be updated to reflect YOUR system. An "io" + address of 1 or 2 indicates a PCI or EISA card in the board table. + The PCI or EISA irq will be assigned automatically. + +Specifying an invalid or in-use irq will default the driver into +running in polled mode for that card. If all irq entries are 0 then +all cards will operate in polled mode. + +If you select the driver as part of the kernel run : + + make zlilo (or whatever you do to create a bootable kernel) + +If you selected a module run : + + make modules && make modules_install + +The utility ip2mkdev (see 5 and 7 below) creates all the device nodes +required by the driver. For a device to be created it must be configured +in the driver and the board must be installed. Only devices corresponding +to real IntelliPort II ports are created. With multiple boards and expansion +boxes this will leave gaps in the sequence of device names. ip2mkdev uses +Linux tty naming conventions: ttyF0 - ttyF255 for normal devices, and +cuf0 - cuf255 for callout devices. + + +4. USING THE DRIVERS + +As noted above, the driver implements the ports in accordance with Linux +conventions, and the devices should be interchangeable with the standard +serial devices. (This is a key point for problem reporting: please make +sure that what you are trying do works on the ttySx/cuax ports first; then +tell us what went wrong with the ip2 ports!) + +Higher speeds can be obtained using the setserial utility which remaps +38,400 bps (extb) to 57,600 bps, 115,200 bps, or a custom speed. +Intelliport II installations using the PowerPort expansion module can +use the custom speed setting to select the highest speeds: 153,600 bps, +230,400 bps, 307,200 bps, 460,800bps and 921,600 bps. The base for +custom baud rate configuration is fixed at 921,600 for cards/expansion +modules with ST654's and 115200 for those with Cirrus CD1400's. This +corresponds to the maximum bit rates those chips are capable. +For example if the baud base is 921600 and the baud divisor is 18 then +the custom rate is 921600/18 = 51200 bps. See the setserial man page for +complete details. Of course if stty accepts the higher rates now you can +use that as well as the standard ioctls(). + + +5. ip2mkdev and assorted utilities... + +Several utilities, including the source for a binary ip2mkdev utility are +available under .../drivers/char/ip2. These can be build by changing to +that directory and typing "make" after the kernel has be built. If you do +not wish to compile the binary utilities, the shell script below can be +cut out and run as "ip2mkdev" to create the necessary device files. To +use the ip2mkdev script, you must have procfs enabled and the proc file +system mounted on /proc. + + +6. NOTES + +This is a release version of the driver, but it is impossible to test it +in all configurations of Linux. If there is any anomalous behaviour that +does not match the standard serial port's behaviour please let us know. + + +7. ip2mkdev shell script + +Previously, this script was simply attached here. It is now attached as a +shar archive to make it easier to extract the script from the documentation. +To create the ip2mkdev shell script change to a convenient directory (/tmp +works just fine) and run the following command: + + unshar Documentation/serial/computone.txt + (This file) + +You should now have a file ip2mkdev in your current working directory with +permissions set to execute. Running that script with then create the +necessary devices for the Computone boards, interfaces, and ports which +are present on you system at the time it is run. + + +#!/bin/sh +# This is a shell archive (produced by GNU sharutils 4.2.1). +# To extract the files from this archive, save it to some FILE, remove +# everything before the `!/bin/sh' line above, then type `sh FILE'. +# +# Made on 2001-10-29 10:32 EST by . +# Source directory was `/home2/src/tmp'. +# +# Existing files will *not* be overwritten unless `-c' is specified. +# +# This shar contains: +# length mode name +# ------ ---------- ------------------------------------------ +# 4251 -rwxr-xr-x ip2mkdev +# +save_IFS="${IFS}" +IFS="${IFS}:" +gettext_dir=FAILED +locale_dir=FAILED +first_param="$1" +for dir in $PATH +do + if test "$gettext_dir" = FAILED && test -f $dir/gettext \ + && ($dir/gettext --version >/dev/null 2>&1) + then + set `$dir/gettext --version 2>&1` + if test "$3" = GNU + then + gettext_dir=$dir + fi + fi + if test "$locale_dir" = FAILED && test -f $dir/shar \ + && ($dir/shar --print-text-domain-dir >/dev/null 2>&1) + then + locale_dir=`$dir/shar --print-text-domain-dir` + fi +done +IFS="$save_IFS" +if test "$locale_dir" = FAILED || test "$gettext_dir" = FAILED +then + echo=echo +else + TEXTDOMAINDIR=$locale_dir + export TEXTDOMAINDIR + TEXTDOMAIN=sharutils + export TEXTDOMAIN + echo="$gettext_dir/gettext -s" +fi +if touch -am -t 200112312359.59 $$.touch >/dev/null 2>&1 && test ! -f 200112312359.59 -a -f $$.touch; then + shar_touch='touch -am -t $1$2$3$4$5$6.$7 "$8"' +elif touch -am 123123592001.59 $$.touch >/dev/null 2>&1 && test ! -f 123123592001.59 -a ! -f 123123592001.5 -a -f $$.touch; then + shar_touch='touch -am $3$4$5$6$1$2.$7 "$8"' +elif touch -am 1231235901 $$.touch >/dev/null 2>&1 && test ! -f 1231235901 -a -f $$.touch; then + shar_touch='touch -am $3$4$5$6$2 "$8"' +else + shar_touch=: + echo + $echo 'WARNING: not restoring timestamps. Consider getting and' + $echo "installing GNU \`touch', distributed in GNU File Utilities..." + echo +fi +rm -f 200112312359.59 123123592001.59 123123592001.5 1231235901 $$.touch +# +if mkdir _sh17581; then + $echo 'x -' 'creating lock directory' +else + $echo 'failed to create lock directory' + exit 1 +fi +# ============= ip2mkdev ============== +if test -f 'ip2mkdev' && test "$first_param" != -c; then + $echo 'x -' SKIPPING 'ip2mkdev' '(file already exists)' +else + $echo 'x -' extracting 'ip2mkdev' '(text)' + sed 's/^X//' << 'SHAR_EOF' > 'ip2mkdev' && +#!/bin/sh - +# +# ip2mkdev +# +# Make or remove devices as needed for Computone Intelliport drivers +# +# First rule! If the dev file exists and you need it, don't mess +# with it. That prevents us from screwing up open ttys, ownership +# and permissions on a running system! +# +# This script will NOT remove devices that no longer exist if their +# board or interface box has been removed. If you want to get rid +# of them, you can manually do an "rm -f /dev/ttyF* /dev/cuaf*" +# before running this script. Running this script will then recreate +# all the valid devices. +# +# Michael H. Warfield +# /\/\|=mhw=|\/\/ +# mhw@wittsend.com +# +# Updated 10/29/2000 for version 1.2.13 naming convention +# under devfs. /\/\|=mhw=|\/\/ +# +# Updated 03/09/2000 for devfs support in ip2 drivers. /\/\|=mhw=|\/\/ +# +X +if test -d /dev/ip2 ; then +# This is devfs mode... We don't do anything except create symlinks +# from the real devices to the old names! +X cd /dev +X echo "Creating symbolic links to devfs devices" +X for i in `ls ip2` ; do +X if test ! -L ip2$i ; then +X # Remove it incase it wasn't a symlink (old device) +X rm -f ip2$i +X ln -s ip2/$i ip2$i +X fi +X done +X for i in `( cd tts ; ls F* )` ; do +X if test ! -L tty$i ; then +X # Remove it incase it wasn't a symlink (old device) +X rm -f tty$i +X ln -s tts/$i tty$i +X fi +X done +X for i in `( cd cua ; ls F* )` ; do +X DEVNUMBER=`expr $i : 'F\(.*\)'` +X if test ! -L cuf$DEVNUMBER ; then +X # Remove it incase it wasn't a symlink (old device) +X rm -f cuf$DEVNUMBER +X ln -s cua/$i cuf$DEVNUMBER +X fi +X done +X exit 0 +fi +X +if test ! -f /proc/tty/drivers +then +X echo "\ +Unable to check driver status. +Make sure proc file system is mounted." +X +X exit 255 +fi +X +if test ! -f /proc/tty/driver/ip2 +then +X echo "\ +Unable to locate ip2 proc file. +Attempting to load driver" +X +X if /sbin/insmod ip2 +X then +X if test ! -f /proc/tty/driver/ip2 +X then +X echo "\ +Unable to locate ip2 proc file after loading driver. +Driver initialization failure or driver version error. +" +X exit 255 +X fi +X else +X echo "Unable to load ip2 driver." +X exit 255 +X fi +fi +X +# Ok... So we got the driver loaded and we can locate the procfs files. +# Next we need our major numbers. +X +TTYMAJOR=`sed -e '/^ip2/!d' -e '/\/dev\/tt/!d' -e 's/.*tt[^ ]*[ ]*\([0-9]*\)[ ]*.*/\1/' < /proc/tty/drivers` +CUAMAJOR=`sed -e '/^ip2/!d' -e '/\/dev\/cu/!d' -e 's/.*cu[^ ]*[ ]*\([0-9]*\)[ ]*.*/\1/' < /proc/tty/drivers` +BRDMAJOR=`sed -e '/^Driver: /!d' -e 's/.*IMajor=\([0-9]*\)[ ]*.*/\1/' < /proc/tty/driver/ip2` +X +echo "\ +TTYMAJOR = $TTYMAJOR +CUAMAJOR = $CUAMAJOR +BRDMAJOR = $BRDMAJOR +" +X +# Ok... Now we should know our major numbers, if appropriate... +# Now we need our boards and start the device loops. +X +grep '^Board [0-9]:' /proc/tty/driver/ip2 | while read token number type alltherest +do +X # The test for blank "type" will catch the stats lead-in lines +X # if they exist in the file +X if test "$type" = "vacant" -o "$type" = "Vacant" -o "$type" = "" +X then +X continue +X fi +X +X BOARDNO=`expr "$number" : '\([0-9]\):'` +X PORTS=`expr "$alltherest" : '.*ports=\([0-9]*\)' | tr ',' ' '` +X MINORS=`expr "$alltherest" : '.*minors=\([0-9,]*\)' | tr ',' ' '` +X +X if test "$BOARDNO" = "" -o "$PORTS" = "" +X then +# This may be a bug. We should at least get this much information +X echo "Unable to process board line" +X continue +X fi +X +X if test "$MINORS" = "" +X then +# Silently skip this one. This board seems to have no boxes +X continue +X fi +X +X echo "board $BOARDNO: $type ports = $PORTS; port numbers = $MINORS" +X +X if test "$BRDMAJOR" != "" +X then +X BRDMINOR=`expr $BOARDNO \* 4` +X STSMINOR=`expr $BRDMINOR + 1` +X if test ! -c /dev/ip2ipl$BOARDNO ; then +X mknod /dev/ip2ipl$BOARDNO c $BRDMAJOR $BRDMINOR +X fi +X if test ! -c /dev/ip2stat$BOARDNO ; then +X mknod /dev/ip2stat$BOARDNO c $BRDMAJOR $STSMINOR +X fi +X fi +X +X if test "$TTYMAJOR" != "" +X then +X PORTNO=$BOARDBASE +X +X for PORTNO in $MINORS +X do +X if test ! -c /dev/ttyF$PORTNO ; then +X # We got the hardware but no device - make it +X mknod /dev/ttyF$PORTNO c $TTYMAJOR $PORTNO +X fi +X done +X fi +X +X if test "$CUAMAJOR" != "" +X then +X PORTNO=$BOARDBASE +X +X for PORTNO in $MINORS +X do +X if test ! -c /dev/cuf$PORTNO ; then +X # We got the hardware but no device - make it +X mknod /dev/cuf$PORTNO c $CUAMAJOR $PORTNO +X fi +X done +X fi +done +X +Xexit 0 +SHAR_EOF + (set 20 01 10 29 10 32 01 'ip2mkdev'; eval "$shar_touch") && + chmod 0755 'ip2mkdev' || + $echo 'restore of' 'ip2mkdev' 'failed' + if ( md5sum --help 2>&1 | grep 'sage: md5sum \[' ) >/dev/null 2>&1 \ + && ( md5sum --version 2>&1 | grep -v 'textutils 1.12' ) >/dev/null; then + md5sum -c << SHAR_EOF >/dev/null 2>&1 \ + || $echo 'ip2mkdev:' 'MD5 check failed' +cb5717134509f38bad9fde6b1f79b4a4 ip2mkdev +SHAR_EOF + else + shar_count="`LC_ALL= LC_CTYPE= LANG= wc -c < 'ip2mkdev'`" + test 4251 -eq "$shar_count" || + $echo 'ip2mkdev:' 'original size' '4251,' 'current size' "$shar_count!" + fi +fi +rm -fr _sh17581 +exit 0 diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 9d3965cbf48c..988553ec9ce5 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -595,6 +595,7 @@ M: Will Deacon S: Maintained F: arch/arm/kernel/perf_event* F: arch/arm/oprofile/common.c +F: arch/arm/kernel/pmu.c F: arch/arm/include/asm/pmu.h F: arch/arm/kernel/hw_breakpoint.c F: arch/arm/include/asm/hw_breakpoint.h @@ -3397,7 +3398,7 @@ M: "Wolfram Sang (embedded platforms)" L: linux-i2c@vger.kernel.org W: http://i2c.wiki.kernel.org/ T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/ -T: git git://git.pengutronix.de/git/wsa/linux.git +T: git git://git.fluff.org/bjdooks/linux.git S: Maintained F: Documentation/i2c/ F: drivers/i2c/ diff --git a/trunk/Makefile b/trunk/Makefile index ae6928cc59d3..0f66f146d57e 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 6 SUBLEVEL = 0 -EXTRAVERSION = -rc6 +EXTRAVERSION = -rc5 NAME = Saber-toothed Squirrel # *DOCUMENTATION* diff --git a/trunk/arch/alpha/kernel/srmcons.c b/trunk/arch/alpha/kernel/srmcons.c index 5d5865204a1d..3ea809430eda 100644 --- a/trunk/arch/alpha/kernel/srmcons.c +++ b/trunk/arch/alpha/kernel/srmcons.c @@ -223,7 +223,6 @@ srmcons_init(void) driver->subtype = SYSTEM_TYPE_SYSCONS; driver->init_termios = tty_std_termios; tty_set_operations(driver, &srmcons_ops); - tty_port_link_device(&srmcons_singleton.port, driver, 0); err = tty_register_driver(driver); if (err) { put_tty_driver(driver); diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 171f184b089d..6524497609fa 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -703,7 +703,6 @@ config ARCH_TEGRA select NEED_MACH_IO_H if PCI select ARCH_HAS_CPUFREQ select USE_OF - select COMMON_CLK help This enables support for NVIDIA Tegra based systems (Tegra APX, Tegra 6xx and Tegra 2 series). @@ -1197,6 +1196,12 @@ config XSCALE_PMU depends on CPU_XSCALE default y +config CPU_HAS_PMU + depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ + (!ARCH_OMAP3 || OMAP3_EMU) + default y + bool + config MULTI_IRQ_HANDLER bool help @@ -1769,7 +1774,7 @@ config HIGHPTE config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" - depends on PERF_EVENTS + depends on PERF_EVENTS && CPU_HAS_PMU default y help Enable hardware performance counter support for perf events. If diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index e968a52e4881..f15f82bf3a50 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -356,15 +356,15 @@ choice is nothing connected to read from the DCC. config DEBUG_SEMIHOSTING - bool "Kernel low-level debug output via semihosting I/O" + bool "Kernel low-level debug output via semihosting I" help Semihosting enables code running on an ARM target to use the I/O facilities on a host debugger/emulator through a - simple SVC call. The host debugger or emulator must have + simple SVC calls. The host debugger or emulator must have semihosting enabled for the special svc call to be trapped otherwise the kernel will crash. - This is known to work with OpenOCD, as well as + This is known to work with OpenOCD, as wellas ARM's Fast Models, or any other controlling environment that implements semihosting. diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index e9fde91cf5e8..17b0d5fc0c84 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -285,10 +285,10 @@ zImage Image xipImage bootpImage uImage: vmlinux zinstall uinstall install: vmlinux $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@ -%.dtb: scripts +%.dtb: $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ -dtbs: scripts +dtbs: $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ # We use MRPROPER_FILES and CLEAN_FILES now diff --git a/trunk/arch/arm/boot/compressed/head.S b/trunk/arch/arm/boot/compressed/head.S index 81769c1341fa..b8c64b80bafc 100644 --- a/trunk/arch/arm/boot/compressed/head.S +++ b/trunk/arch/arm/boot/compressed/head.S @@ -659,14 +659,10 @@ __armv7_mmu_cache_on: #ifdef CONFIG_CPU_ENDIAN_BE8 orr r0, r0, #1 << 25 @ big-endian page tables #endif - mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg orrne r0, r0, #1 @ MMU enabled movne r1, #0xfffffffd @ domain 0 = client - bic r6, r6, #1 << 31 @ 32-bit translation system - bic r6, r6, #3 << 0 @ use only ttbr0 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r1, c3, c0, 0 @ load domain access control - mcrne p15, 0, r6, c2, c0, 2 @ load ttb control #endif mcr p15, 0, r0, c7, c5, 4 @ ISB mcr p15, 0, r0, c1, c0, 0 @ load control register diff --git a/trunk/arch/arm/configs/kzm9d_defconfig b/trunk/arch/arm/configs/kzm9d_defconfig index 8c49df66cac3..26146ffea1a5 100644 --- a/trunk/arch/arm/configs/kzm9d_defconfig +++ b/trunk/arch/arm/configs/kzm9d_defconfig @@ -8,7 +8,6 @@ CONFIG_LOG_BUF_SHIFT=16 CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y -CONFIG_PERF_EVENTS=y CONFIG_SLAB=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_DEADLINE is not set diff --git a/trunk/arch/arm/configs/kzm9g_defconfig b/trunk/arch/arm/configs/kzm9g_defconfig index 5d0c66708960..2388c8610627 100644 --- a/trunk/arch/arm/configs/kzm9g_defconfig +++ b/trunk/arch/arm/configs/kzm9g_defconfig @@ -14,7 +14,6 @@ CONFIG_NAMESPACES=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y -CONFIG_PERF_EVENTS=y CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y diff --git a/trunk/arch/arm/include/asm/assembler.h b/trunk/arch/arm/include/asm/assembler.h index 5c8b3bf4d825..03fb93621d0d 100644 --- a/trunk/arch/arm/include/asm/assembler.h +++ b/trunk/arch/arm/include/asm/assembler.h @@ -320,12 +320,4 @@ .size \name , . - \name .endm - .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req -#ifndef CONFIG_CPU_USE_DOMAINS - adds \tmp, \addr, #\size - 1 - sbcccs \tmp, \tmp, \limit - bcs \bad -#endif - .endm - #endif /* __ASM_ASSEMBLER_H__ */ diff --git a/trunk/arch/arm/include/asm/memory.h b/trunk/arch/arm/include/asm/memory.h index 5f6ddcc56452..e965f1b560f1 100644 --- a/trunk/arch/arm/include/asm/memory.h +++ b/trunk/arch/arm/include/asm/memory.h @@ -187,7 +187,6 @@ static inline unsigned long __phys_to_virt(unsigned long x) #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) #endif #endif -#endif /* __ASSEMBLY__ */ #ifndef PHYS_OFFSET #ifdef PLAT_PHYS_OFFSET @@ -197,8 +196,6 @@ static inline unsigned long __phys_to_virt(unsigned long x) #endif #endif -#ifndef __ASSEMBLY__ - /* * PFNs are used to describe any physical page; this means * PFN 0 == physical address 0. diff --git a/trunk/arch/arm/include/asm/perf_event.h b/trunk/arch/arm/include/asm/perf_event.h index 625cd621a436..e074948d8143 100644 --- a/trunk/arch/arm/include/asm/perf_event.h +++ b/trunk/arch/arm/include/asm/perf_event.h @@ -12,13 +12,6 @@ #ifndef __ARM_PERF_EVENT_H__ #define __ARM_PERF_EVENT_H__ -/* - * The ARMv7 CPU PMU supports up to 32 event counters. - */ -#define ARMPMU_MAX_HWEVENTS 32 - -#define HW_OP_UNSUPPORTED 0xFFFF -#define C(_x) PERF_COUNT_HW_CACHE_##_x -#define CACHE_OP_UNSUPPORTED 0xFFFF +/* Nothing to see here... */ #endif /* __ARM_PERF_EVENT_H__ */ diff --git a/trunk/arch/arm/include/asm/pmu.h b/trunk/arch/arm/include/asm/pmu.h index a26170dce02e..4432305f4a2a 100644 --- a/trunk/arch/arm/include/asm/pmu.h +++ b/trunk/arch/arm/include/asm/pmu.h @@ -15,6 +15,15 @@ #include #include +/* + * Types of PMUs that can be accessed directly and require mutual + * exclusion between profiling tools. + */ +enum arm_pmu_type { + ARM_PMU_DEVICE_CPU = 0, + ARM_NUM_PMU_DEVICES, +}; + /* * struct arm_pmu_platdata - ARM PMU platform data * @@ -22,24 +31,54 @@ * interrupt and passed the address of the low level handler, * and can be used to implement any platform specific handling * before or after calling it. - * @runtime_resume: an optional handler which will be called by the - * runtime PM framework following a call to pm_runtime_get(). - * Note that if pm_runtime_get() is called more than once in - * succession this handler will only be called once. - * @runtime_suspend: an optional handler which will be called by the - * runtime PM framework following a call to pm_runtime_put(). - * Note that if pm_runtime_get() is called more than once in - * succession this handler will only be called following the - * final call to pm_runtime_put() that actually disables the - * hardware. + * @enable_irq: an optional handler which will be called after + * request_irq and be used to handle some platform specific + * irq enablement + * @disable_irq: an optional handler which will be called before + * free_irq and be used to handle some platform specific + * irq disablement */ struct arm_pmu_platdata { irqreturn_t (*handle_irq)(int irq, void *dev, irq_handler_t pmu_handler); - int (*runtime_resume)(struct device *dev); - int (*runtime_suspend)(struct device *dev); + void (*enable_irq)(int irq); + void (*disable_irq)(int irq); }; +#ifdef CONFIG_CPU_HAS_PMU + +/** + * reserve_pmu() - reserve the hardware performance counters + * + * Reserve the hardware performance counters in the system for exclusive use. + * Returns 0 on success or -EBUSY if the lock is already held. + */ +extern int +reserve_pmu(enum arm_pmu_type type); + +/** + * release_pmu() - Relinquish control of the performance counters + * + * Release the performance counters and allow someone else to use them. + */ +extern void +release_pmu(enum arm_pmu_type type); + +#else /* CONFIG_CPU_HAS_PMU */ + +#include + +static inline int +reserve_pmu(enum arm_pmu_type type) +{ + return -ENODEV; +} + +static inline void +release_pmu(enum arm_pmu_type type) { } + +#endif /* CONFIG_CPU_HAS_PMU */ + #ifdef CONFIG_HW_PERF_EVENTS /* The events for a given PMU register set. */ @@ -64,6 +103,7 @@ struct pmu_hw_events { struct arm_pmu { struct pmu pmu; + enum arm_pmu_type type; cpumask_t active_irqs; char *name; irqreturn_t (*handle_irq)(int irq_num, void *dev); @@ -78,8 +118,6 @@ struct arm_pmu { void (*start)(void); void (*stop)(void); void (*reset)(void *); - int (*request_irq)(irq_handler_t handler); - void (*free_irq)(void); int (*map_event)(struct perf_event *event); int num_events; atomic_t active_events; @@ -91,9 +129,7 @@ struct arm_pmu { #define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu)) -extern const struct dev_pm_ops armpmu_dev_pm_ops; - -int armpmu_register(struct arm_pmu *armpmu, char *name, int type); +int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type); u64 armpmu_event_update(struct perf_event *event, struct hw_perf_event *hwc, @@ -103,13 +139,6 @@ int armpmu_event_set_period(struct perf_event *event, struct hw_perf_event *hwc, int idx); -int armpmu_map_event(struct perf_event *event, - const unsigned (*event_map)[PERF_COUNT_HW_MAX], - const unsigned (*cache_map)[PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX], - u32 raw_event_mask); - #endif /* CONFIG_HW_PERF_EVENTS */ #endif /* __ARM_PMU_H__ */ diff --git a/trunk/arch/arm/include/asm/tlb.h b/trunk/arch/arm/include/asm/tlb.h index 99a19512ee26..314d4664eae7 100644 --- a/trunk/arch/arm/include/asm/tlb.h +++ b/trunk/arch/arm/include/asm/tlb.h @@ -199,9 +199,6 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, { pgtable_page_dtor(pte); -#ifdef CONFIG_ARM_LPAE - tlb_add_flush(tlb, addr); -#else /* * With the classic ARM MMU, a pte page has two corresponding pmd * entries, each covering 1MB. @@ -209,7 +206,6 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, addr &= PMD_MASK; tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE); tlb_add_flush(tlb, addr + SZ_1M); -#endif tlb_remove_page(tlb, pte); } diff --git a/trunk/arch/arm/include/asm/uaccess.h b/trunk/arch/arm/include/asm/uaccess.h index 77bd79f2ffdb..479a6352e0b5 100644 --- a/trunk/arch/arm/include/asm/uaccess.h +++ b/trunk/arch/arm/include/asm/uaccess.h @@ -101,39 +101,28 @@ extern int __get_user_1(void *); extern int __get_user_2(void *); extern int __get_user_4(void *); -#define __GUP_CLOBBER_1 "lr", "cc" -#ifdef CONFIG_CPU_USE_DOMAINS -#define __GUP_CLOBBER_2 "ip", "lr", "cc" -#else -#define __GUP_CLOBBER_2 "lr", "cc" -#endif -#define __GUP_CLOBBER_4 "lr", "cc" - -#define __get_user_x(__r2,__p,__e,__l,__s) \ +#define __get_user_x(__r2,__p,__e,__s,__i...) \ __asm__ __volatile__ ( \ __asmeq("%0", "r0") __asmeq("%1", "r2") \ - __asmeq("%3", "r1") \ "bl __get_user_" #__s \ : "=&r" (__e), "=r" (__r2) \ - : "0" (__p), "r" (__l) \ - : __GUP_CLOBBER_##__s) + : "0" (__p) \ + : __i, "cc") -#define __get_user_check(x,p) \ +#define get_user(x,p) \ ({ \ - unsigned long __limit = current_thread_info()->addr_limit - 1; \ register const typeof(*(p)) __user *__p asm("r0") = (p);\ register unsigned long __r2 asm("r2"); \ - register unsigned long __l asm("r1") = __limit; \ register int __e asm("r0"); \ switch (sizeof(*(__p))) { \ case 1: \ - __get_user_x(__r2, __p, __e, __l, 1); \ - break; \ + __get_user_x(__r2, __p, __e, 1, "lr"); \ + break; \ case 2: \ - __get_user_x(__r2, __p, __e, __l, 2); \ + __get_user_x(__r2, __p, __e, 2, "r3", "lr"); \ break; \ case 4: \ - __get_user_x(__r2, __p, __e, __l, 4); \ + __get_user_x(__r2, __p, __e, 4, "lr"); \ break; \ default: __e = __get_user_bad(); break; \ } \ @@ -141,57 +130,42 @@ extern int __get_user_4(void *); __e; \ }) -#define get_user(x,p) \ - ({ \ - might_fault(); \ - __get_user_check(x,p); \ - }) - extern int __put_user_1(void *, unsigned int); extern int __put_user_2(void *, unsigned int); extern int __put_user_4(void *, unsigned int); extern int __put_user_8(void *, unsigned long long); -#define __put_user_x(__r2,__p,__e,__l,__s) \ +#define __put_user_x(__r2,__p,__e,__s) \ __asm__ __volatile__ ( \ __asmeq("%0", "r0") __asmeq("%2", "r2") \ - __asmeq("%3", "r1") \ "bl __put_user_" #__s \ : "=&r" (__e) \ - : "0" (__p), "r" (__r2), "r" (__l) \ + : "0" (__p), "r" (__r2) \ : "ip", "lr", "cc") -#define __put_user_check(x,p) \ +#define put_user(x,p) \ ({ \ - unsigned long __limit = current_thread_info()->addr_limit - 1; \ register const typeof(*(p)) __r2 asm("r2") = (x); \ register const typeof(*(p)) __user *__p asm("r0") = (p);\ - register unsigned long __l asm("r1") = __limit; \ register int __e asm("r0"); \ switch (sizeof(*(__p))) { \ case 1: \ - __put_user_x(__r2, __p, __e, __l, 1); \ + __put_user_x(__r2, __p, __e, 1); \ break; \ case 2: \ - __put_user_x(__r2, __p, __e, __l, 2); \ + __put_user_x(__r2, __p, __e, 2); \ break; \ case 4: \ - __put_user_x(__r2, __p, __e, __l, 4); \ + __put_user_x(__r2, __p, __e, 4); \ break; \ case 8: \ - __put_user_x(__r2, __p, __e, __l, 8); \ + __put_user_x(__r2, __p, __e, 8); \ break; \ default: __e = __put_user_bad(); break; \ } \ __e; \ }) -#define put_user(x,p) \ - ({ \ - might_fault(); \ - __put_user_check(x,p); \ - }) - #else /* CONFIG_MMU */ /* @@ -245,7 +219,6 @@ do { \ unsigned long __gu_addr = (unsigned long)(ptr); \ unsigned long __gu_val; \ __chk_user_ptr(ptr); \ - might_fault(); \ switch (sizeof(*(ptr))) { \ case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \ case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \ @@ -327,7 +300,6 @@ do { \ unsigned long __pu_addr = (unsigned long)(ptr); \ __typeof__(*(ptr)) __pu_val = (x); \ __chk_user_ptr(ptr); \ - might_fault(); \ switch (sizeof(*(ptr))) { \ case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \ case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \ diff --git a/trunk/arch/arm/kernel/Makefile b/trunk/arch/arm/kernel/Makefile index 1c4321430737..7ad2d5cf7008 100644 --- a/trunk/arch/arm/kernel/Makefile +++ b/trunk/arch/arm/kernel/Makefile @@ -69,7 +69,8 @@ obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o obj-$(CONFIG_IWMMXT) += iwmmxt.o -obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o +obj-$(CONFIG_CPU_HAS_PMU) += pmu.o +obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o diff --git a/trunk/arch/arm/kernel/hw_breakpoint.c b/trunk/arch/arm/kernel/hw_breakpoint.c index 281bf3301241..ba386bd94107 100644 --- a/trunk/arch/arm/kernel/hw_breakpoint.c +++ b/trunk/arch/arm/kernel/hw_breakpoint.c @@ -159,12 +159,6 @@ static int debug_arch_supported(void) arch >= ARM_DEBUG_ARCH_V7_1; } -/* Can we determine the watchpoint access type from the fsr? */ -static int debug_exception_updates_fsr(void) -{ - return 0; -} - /* Determine number of WRP registers available. */ static int get_num_wrp_resources(void) { @@ -610,14 +604,13 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) /* Aligned */ break; case 1: + /* Allow single byte watchpoint. */ + if (info->ctrl.len == ARM_BREAKPOINT_LEN_1) + break; case 2: /* Allow halfword watchpoints and breakpoints. */ if (info->ctrl.len == ARM_BREAKPOINT_LEN_2) break; - case 3: - /* Allow single byte watchpoint. */ - if (info->ctrl.len == ARM_BREAKPOINT_LEN_1) - break; default: ret = -EINVAL; goto out; @@ -626,35 +619,18 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) info->address &= ~alignment_mask; info->ctrl.len <<= offset; - if (!bp->overflow_handler) { - /* - * Mismatch breakpoints are required for single-stepping - * breakpoints. - */ - if (!core_has_mismatch_brps()) - return -EINVAL; - - /* We don't allow mismatch breakpoints in kernel space. */ - if (arch_check_bp_in_kernelspace(bp)) - return -EPERM; - - /* - * Per-cpu breakpoints are not supported by our stepping - * mechanism. - */ - if (!bp->hw.bp_target) - return -EINVAL; - - /* - * We only support specific access types if the fsr - * reports them. - */ - if (!debug_exception_updates_fsr() && - (info->ctrl.type == ARM_BREAKPOINT_LOAD || - info->ctrl.type == ARM_BREAKPOINT_STORE)) - return -EINVAL; + /* + * Currently we rely on an overflow handler to take + * care of single-stepping the breakpoint when it fires. + * In the case of userspace breakpoints on a core with V7 debug, + * we can use the mismatch feature as a poor-man's hardware + * single-step, but this only works for per-task breakpoints. + */ + if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) || + !core_has_mismatch_brps() || !bp->hw.bp_target)) { + pr_warning("overflow handler required but none found\n"); + ret = -EINVAL; } - out: return ret; } @@ -730,12 +706,10 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr, goto unlock; /* Check that the access type matches. */ - if (debug_exception_updates_fsr()) { - access = (fsr & ARM_FSR_ACCESS_MASK) ? - HW_BREAKPOINT_W : HW_BREAKPOINT_R; - if (!(access & hw_breakpoint_type(wp))) - goto unlock; - } + access = (fsr & ARM_FSR_ACCESS_MASK) ? HW_BREAKPOINT_W : + HW_BREAKPOINT_R; + if (!(access & hw_breakpoint_type(wp))) + goto unlock; /* We have a winner. */ info->trigger = addr; diff --git a/trunk/arch/arm/kernel/perf_event.c b/trunk/arch/arm/kernel/perf_event.c index 93971b1a4f0b..ab243b87118d 100644 --- a/trunk/arch/arm/kernel/perf_event.c +++ b/trunk/arch/arm/kernel/perf_event.c @@ -12,15 +12,68 @@ */ #define pr_fmt(fmt) "hw perfevents: " fmt +#include +#include #include +#include +#include #include -#include +#include #include +#include +#include #include #include #include +/* + * ARMv6 supports a maximum of 3 events, starting from index 0. If we add + * another platform that supports more, we need to increase this to be the + * largest of all platforms. + * + * ARMv7 supports up to 32 events: + * cycle counter CCNT + 31 events counters CNT0..30. + * Cortex-A8 has 1+4 counters, Cortex-A9 has 1+6 counters. + */ +#define ARMPMU_MAX_HWEVENTS 32 + +static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events); +static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask); +static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events); + +#define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu)) + +/* Set at runtime when we know what CPU type we are. */ +static struct arm_pmu *cpu_pmu; + +const char *perf_pmu_name(void) +{ + if (!cpu_pmu) + return NULL; + + return cpu_pmu->pmu.name; +} +EXPORT_SYMBOL_GPL(perf_pmu_name); + +int perf_num_counters(void) +{ + int max_events = 0; + + if (cpu_pmu != NULL) + max_events = cpu_pmu->num_events; + + return max_events; +} +EXPORT_SYMBOL_GPL(perf_num_counters); + +#define HW_OP_UNSUPPORTED 0xFFFF + +#define C(_x) \ + PERF_COUNT_HW_CACHE_##_x + +#define CACHE_OP_UNSUPPORTED 0xFFFF + static int armpmu_map_cache_event(const unsigned (*cache_map) [PERF_COUNT_HW_CACHE_MAX] @@ -51,7 +104,7 @@ armpmu_map_cache_event(const unsigned (*cache_map) } static int -armpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config) +armpmu_map_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config) { int mapping = (*event_map)[config]; return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping; @@ -63,20 +116,19 @@ armpmu_map_raw_event(u32 raw_event_mask, u64 config) return (int)(config & raw_event_mask); } -int -armpmu_map_event(struct perf_event *event, - const unsigned (*event_map)[PERF_COUNT_HW_MAX], - const unsigned (*cache_map) - [PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX], - u32 raw_event_mask) +static int map_cpu_event(struct perf_event *event, + const unsigned (*event_map)[PERF_COUNT_HW_MAX], + const unsigned (*cache_map) + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX], + u32 raw_event_mask) { u64 config = event->attr.config; switch (event->attr.type) { case PERF_TYPE_HARDWARE: - return armpmu_map_hw_event(event_map, config); + return armpmu_map_event(event_map, config); case PERF_TYPE_HW_CACHE: return armpmu_map_cache_event(cache_map, config); case PERF_TYPE_RAW: @@ -170,6 +222,7 @@ armpmu_stop(struct perf_event *event, int flags) */ if (!(hwc->state & PERF_HES_STOPPED)) { armpmu->disable(hwc, hwc->idx); + barrier(); /* why? */ armpmu_event_update(event, hwc, hwc->idx); hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; } @@ -297,41 +350,99 @@ validate_group(struct perf_event *event) return 0; } -static irqreturn_t armpmu_dispatch_irq(int irq, void *dev) +static irqreturn_t armpmu_platform_irq(int irq, void *dev) { struct arm_pmu *armpmu = (struct arm_pmu *) dev; struct platform_device *plat_device = armpmu->plat_device; struct arm_pmu_platdata *plat = dev_get_platdata(&plat_device->dev); - if (plat && plat->handle_irq) - return plat->handle_irq(irq, dev, armpmu->handle_irq); - else - return armpmu->handle_irq(irq, dev); + return plat->handle_irq(irq, dev, armpmu->handle_irq); } static void armpmu_release_hardware(struct arm_pmu *armpmu) { - armpmu->free_irq(); - pm_runtime_put_sync(&armpmu->plat_device->dev); + int i, irq, irqs; + struct platform_device *pmu_device = armpmu->plat_device; + struct arm_pmu_platdata *plat = + dev_get_platdata(&pmu_device->dev); + + irqs = min(pmu_device->num_resources, num_possible_cpus()); + + for (i = 0; i < irqs; ++i) { + if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs)) + continue; + irq = platform_get_irq(pmu_device, i); + if (irq >= 0) { + if (plat && plat->disable_irq) + plat->disable_irq(irq); + free_irq(irq, armpmu); + } + } + + release_pmu(armpmu->type); } static int armpmu_reserve_hardware(struct arm_pmu *armpmu) { - int err; + struct arm_pmu_platdata *plat; + irq_handler_t handle_irq; + int i, err, irq, irqs; struct platform_device *pmu_device = armpmu->plat_device; if (!pmu_device) return -ENODEV; - pm_runtime_get_sync(&pmu_device->dev); - err = armpmu->request_irq(armpmu_dispatch_irq); + err = reserve_pmu(armpmu->type); if (err) { - armpmu_release_hardware(armpmu); + pr_warning("unable to reserve pmu\n"); return err; } + plat = dev_get_platdata(&pmu_device->dev); + if (plat && plat->handle_irq) + handle_irq = armpmu_platform_irq; + else + handle_irq = armpmu->handle_irq; + + irqs = min(pmu_device->num_resources, num_possible_cpus()); + if (irqs < 1) { + pr_err("no irqs for PMUs defined\n"); + return -ENODEV; + } + + for (i = 0; i < irqs; ++i) { + err = 0; + irq = platform_get_irq(pmu_device, i); + if (irq < 0) + continue; + + /* + * If we have a single PMU interrupt that we can't shift, + * assume that we're running on a uniprocessor machine and + * continue. Otherwise, continue without this interrupt. + */ + if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) { + pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n", + irq, i); + continue; + } + + err = request_irq(irq, handle_irq, + IRQF_DISABLED | IRQF_NOBALANCING, + "arm-pmu", armpmu); + if (err) { + pr_err("unable to request IRQ%d for ARM PMU counters\n", + irq); + armpmu_release_hardware(armpmu); + return err; + } else if (plat && plat->enable_irq) + plat->enable_irq(irq); + + cpumask_set_cpu(i, &armpmu->active_irqs); + } + return 0; } @@ -470,32 +581,6 @@ static void armpmu_disable(struct pmu *pmu) armpmu->stop(); } -#ifdef CONFIG_PM_RUNTIME -static int armpmu_runtime_resume(struct device *dev) -{ - struct arm_pmu_platdata *plat = dev_get_platdata(dev); - - if (plat && plat->runtime_resume) - return plat->runtime_resume(dev); - - return 0; -} - -static int armpmu_runtime_suspend(struct device *dev) -{ - struct arm_pmu_platdata *plat = dev_get_platdata(dev); - - if (plat && plat->runtime_suspend) - return plat->runtime_suspend(dev); - - return 0; -} -#endif - -const struct dev_pm_ops armpmu_dev_pm_ops = { - SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL) -}; - static void __init armpmu_init(struct arm_pmu *armpmu) { atomic_set(&armpmu->active_events, 0); @@ -513,14 +598,174 @@ static void __init armpmu_init(struct arm_pmu *armpmu) }; } -int armpmu_register(struct arm_pmu *armpmu, char *name, int type) +int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type) { armpmu_init(armpmu); - pr_info("enabled with %s PMU driver, %d counters available\n", - armpmu->name, armpmu->num_events); return perf_pmu_register(&armpmu->pmu, name, type); } +/* Include the PMU-specific implementations. */ +#include "perf_event_xscale.c" +#include "perf_event_v6.c" +#include "perf_event_v7.c" + +/* + * Ensure the PMU has sane values out of reset. + * This requires SMP to be available, so exists as a separate initcall. + */ +static int __init +cpu_pmu_reset(void) +{ + if (cpu_pmu && cpu_pmu->reset) + return on_each_cpu(cpu_pmu->reset, NULL, 1); + return 0; +} +arch_initcall(cpu_pmu_reset); + +/* + * PMU platform driver and devicetree bindings. + */ +static struct of_device_id armpmu_of_device_ids[] = { + {.compatible = "arm,cortex-a9-pmu"}, + {.compatible = "arm,cortex-a8-pmu"}, + {.compatible = "arm,arm1136-pmu"}, + {.compatible = "arm,arm1176-pmu"}, + {}, +}; + +static struct platform_device_id armpmu_plat_device_ids[] = { + {.name = "arm-pmu"}, + {}, +}; + +static int __devinit armpmu_device_probe(struct platform_device *pdev) +{ + if (!cpu_pmu) + return -ENODEV; + + cpu_pmu->plat_device = pdev; + return 0; +} + +static struct platform_driver armpmu_driver = { + .driver = { + .name = "arm-pmu", + .of_match_table = armpmu_of_device_ids, + }, + .probe = armpmu_device_probe, + .id_table = armpmu_plat_device_ids, +}; + +static int __init register_pmu_driver(void) +{ + return platform_driver_register(&armpmu_driver); +} +device_initcall(register_pmu_driver); + +static struct pmu_hw_events *armpmu_get_cpu_events(void) +{ + return &__get_cpu_var(cpu_hw_events); +} + +static void __init cpu_pmu_init(struct arm_pmu *armpmu) +{ + int cpu; + for_each_possible_cpu(cpu) { + struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu); + events->events = per_cpu(hw_events, cpu); + events->used_mask = per_cpu(used_mask, cpu); + raw_spin_lock_init(&events->pmu_lock); + } + armpmu->get_hw_events = armpmu_get_cpu_events; + armpmu->type = ARM_PMU_DEVICE_CPU; +} + +/* + * PMU hardware loses all context when a CPU goes offline. + * When a CPU is hotplugged back in, since some hardware registers are + * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading + * junk values out of them. + */ +static int __cpuinit pmu_cpu_notify(struct notifier_block *b, + unsigned long action, void *hcpu) +{ + if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING) + return NOTIFY_DONE; + + if (cpu_pmu && cpu_pmu->reset) + cpu_pmu->reset(NULL); + + return NOTIFY_OK; +} + +static struct notifier_block __cpuinitdata pmu_cpu_notifier = { + .notifier_call = pmu_cpu_notify, +}; + +/* + * CPU PMU identification and registration. + */ +static int __init +init_hw_perf_events(void) +{ + unsigned long cpuid = read_cpuid_id(); + unsigned long implementor = (cpuid & 0xFF000000) >> 24; + unsigned long part_number = (cpuid & 0xFFF0); + + /* ARM Ltd CPUs. */ + if (0x41 == implementor) { + switch (part_number) { + case 0xB360: /* ARM1136 */ + case 0xB560: /* ARM1156 */ + case 0xB760: /* ARM1176 */ + cpu_pmu = armv6pmu_init(); + break; + case 0xB020: /* ARM11mpcore */ + cpu_pmu = armv6mpcore_pmu_init(); + break; + case 0xC080: /* Cortex-A8 */ + cpu_pmu = armv7_a8_pmu_init(); + break; + case 0xC090: /* Cortex-A9 */ + cpu_pmu = armv7_a9_pmu_init(); + break; + case 0xC050: /* Cortex-A5 */ + cpu_pmu = armv7_a5_pmu_init(); + break; + case 0xC0F0: /* Cortex-A15 */ + cpu_pmu = armv7_a15_pmu_init(); + break; + case 0xC070: /* Cortex-A7 */ + cpu_pmu = armv7_a7_pmu_init(); + break; + } + /* Intel CPUs [xscale]. */ + } else if (0x69 == implementor) { + part_number = (cpuid >> 13) & 0x7; + switch (part_number) { + case 1: + cpu_pmu = xscale1pmu_init(); + break; + case 2: + cpu_pmu = xscale2pmu_init(); + break; + } + } + + if (cpu_pmu) { + pr_info("enabled with %s PMU driver, %d counters available\n", + cpu_pmu->name, cpu_pmu->num_events); + cpu_pmu_init(cpu_pmu); + register_cpu_notifier(&pmu_cpu_notifier); + armpmu_register(cpu_pmu, cpu_pmu->name, PERF_TYPE_RAW); + } else { + pr_info("no hardware support available\n"); + } + + return 0; +} +early_initcall(init_hw_perf_events); + /* * Callchain handling code. */ diff --git a/trunk/arch/arm/kernel/perf_event_cpu.c b/trunk/arch/arm/kernel/perf_event_cpu.c deleted file mode 100644 index 8d7d8d4de9d6..000000000000 --- a/trunk/arch/arm/kernel/perf_event_cpu.c +++ /dev/null @@ -1,295 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) 2012 ARM Limited - * - * Author: Will Deacon - */ -#define pr_fmt(fmt) "CPU PMU: " fmt - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* Set at runtime when we know what CPU type we are. */ -static struct arm_pmu *cpu_pmu; - -static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events); -static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask); -static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events); - -/* - * Despite the names, these two functions are CPU-specific and are used - * by the OProfile/perf code. - */ -const char *perf_pmu_name(void) -{ - if (!cpu_pmu) - return NULL; - - return cpu_pmu->pmu.name; -} -EXPORT_SYMBOL_GPL(perf_pmu_name); - -int perf_num_counters(void) -{ - int max_events = 0; - - if (cpu_pmu != NULL) - max_events = cpu_pmu->num_events; - - return max_events; -} -EXPORT_SYMBOL_GPL(perf_num_counters); - -/* Include the PMU-specific implementations. */ -#include "perf_event_xscale.c" -#include "perf_event_v6.c" -#include "perf_event_v7.c" - -static struct pmu_hw_events *cpu_pmu_get_cpu_events(void) -{ - return &__get_cpu_var(cpu_hw_events); -} - -static void cpu_pmu_free_irq(void) -{ - int i, irq, irqs; - struct platform_device *pmu_device = cpu_pmu->plat_device; - - irqs = min(pmu_device->num_resources, num_possible_cpus()); - - for (i = 0; i < irqs; ++i) { - if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs)) - continue; - irq = platform_get_irq(pmu_device, i); - if (irq >= 0) - free_irq(irq, cpu_pmu); - } -} - -static int cpu_pmu_request_irq(irq_handler_t handler) -{ - int i, err, irq, irqs; - struct platform_device *pmu_device = cpu_pmu->plat_device; - - if (!pmu_device) - return -ENODEV; - - irqs = min(pmu_device->num_resources, num_possible_cpus()); - if (irqs < 1) { - pr_err("no irqs for PMUs defined\n"); - return -ENODEV; - } - - for (i = 0; i < irqs; ++i) { - err = 0; - irq = platform_get_irq(pmu_device, i); - if (irq < 0) - continue; - - /* - * If we have a single PMU interrupt that we can't shift, - * assume that we're running on a uniprocessor machine and - * continue. Otherwise, continue without this interrupt. - */ - if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) { - pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n", - irq, i); - continue; - } - - err = request_irq(irq, handler, IRQF_NOBALANCING, "arm-pmu", - cpu_pmu); - if (err) { - pr_err("unable to request IRQ%d for ARM PMU counters\n", - irq); - return err; - } - - cpumask_set_cpu(i, &cpu_pmu->active_irqs); - } - - return 0; -} - -static void __devinit cpu_pmu_init(struct arm_pmu *cpu_pmu) -{ - int cpu; - for_each_possible_cpu(cpu) { - struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu); - events->events = per_cpu(hw_events, cpu); - events->used_mask = per_cpu(used_mask, cpu); - raw_spin_lock_init(&events->pmu_lock); - } - - cpu_pmu->get_hw_events = cpu_pmu_get_cpu_events; - cpu_pmu->request_irq = cpu_pmu_request_irq; - cpu_pmu->free_irq = cpu_pmu_free_irq; - - /* Ensure the PMU has sane values out of reset. */ - if (cpu_pmu && cpu_pmu->reset) - on_each_cpu(cpu_pmu->reset, NULL, 1); -} - -/* - * PMU hardware loses all context when a CPU goes offline. - * When a CPU is hotplugged back in, since some hardware registers are - * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading - * junk values out of them. - */ -static int __cpuinit cpu_pmu_notify(struct notifier_block *b, - unsigned long action, void *hcpu) -{ - if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING) - return NOTIFY_DONE; - - if (cpu_pmu && cpu_pmu->reset) - cpu_pmu->reset(NULL); - - return NOTIFY_OK; -} - -static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = { - .notifier_call = cpu_pmu_notify, -}; - -/* - * PMU platform driver and devicetree bindings. - */ -static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = { - {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init}, - {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init}, - {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init}, - {.compatible = "arm,cortex-a7-pmu", .data = armv7_a7_pmu_init}, - {.compatible = "arm,cortex-a5-pmu", .data = armv7_a5_pmu_init}, - {.compatible = "arm,arm11mpcore-pmu", .data = armv6mpcore_pmu_init}, - {.compatible = "arm,arm1176-pmu", .data = armv6pmu_init}, - {.compatible = "arm,arm1136-pmu", .data = armv6pmu_init}, - {}, -}; - -static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = { - {.name = "arm-pmu"}, - {}, -}; - -/* - * CPU PMU identification and probing. - */ -static struct arm_pmu *__devinit probe_current_pmu(void) -{ - struct arm_pmu *pmu = NULL; - int cpu = get_cpu(); - unsigned long cpuid = read_cpuid_id(); - unsigned long implementor = (cpuid & 0xFF000000) >> 24; - unsigned long part_number = (cpuid & 0xFFF0); - - pr_info("probing PMU on CPU %d\n", cpu); - - /* ARM Ltd CPUs. */ - if (0x41 == implementor) { - switch (part_number) { - case 0xB360: /* ARM1136 */ - case 0xB560: /* ARM1156 */ - case 0xB760: /* ARM1176 */ - pmu = armv6pmu_init(); - break; - case 0xB020: /* ARM11mpcore */ - pmu = armv6mpcore_pmu_init(); - break; - case 0xC080: /* Cortex-A8 */ - pmu = armv7_a8_pmu_init(); - break; - case 0xC090: /* Cortex-A9 */ - pmu = armv7_a9_pmu_init(); - break; - case 0xC050: /* Cortex-A5 */ - pmu = armv7_a5_pmu_init(); - break; - case 0xC0F0: /* Cortex-A15 */ - pmu = armv7_a15_pmu_init(); - break; - case 0xC070: /* Cortex-A7 */ - pmu = armv7_a7_pmu_init(); - break; - } - /* Intel CPUs [xscale]. */ - } else if (0x69 == implementor) { - part_number = (cpuid >> 13) & 0x7; - switch (part_number) { - case 1: - pmu = xscale1pmu_init(); - break; - case 2: - pmu = xscale2pmu_init(); - break; - } - } - - put_cpu(); - return pmu; -} - -static int __devinit cpu_pmu_device_probe(struct platform_device *pdev) -{ - const struct of_device_id *of_id; - struct arm_pmu *(*init_fn)(void); - struct device_node *node = pdev->dev.of_node; - - if (cpu_pmu) { - pr_info("attempt to register multiple PMU devices!"); - return -ENOSPC; - } - - if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) { - init_fn = of_id->data; - cpu_pmu = init_fn(); - } else { - cpu_pmu = probe_current_pmu(); - } - - if (!cpu_pmu) - return -ENODEV; - - cpu_pmu->plat_device = pdev; - cpu_pmu_init(cpu_pmu); - register_cpu_notifier(&cpu_pmu_hotplug_notifier); - armpmu_register(cpu_pmu, cpu_pmu->name, PERF_TYPE_RAW); - - return 0; -} - -static struct platform_driver cpu_pmu_driver = { - .driver = { - .name = "arm-pmu", - .pm = &armpmu_dev_pm_ops, - .of_match_table = cpu_pmu_of_device_ids, - }, - .probe = cpu_pmu_device_probe, - .id_table = cpu_pmu_plat_device_ids, -}; - -static int __init register_pmu_driver(void) -{ - return platform_driver_register(&cpu_pmu_driver); -} -device_initcall(register_pmu_driver); diff --git a/trunk/arch/arm/kernel/perf_event_v6.c b/trunk/arch/arm/kernel/perf_event_v6.c index 6ccc07971745..c90fcb2b6967 100644 --- a/trunk/arch/arm/kernel/perf_event_v6.c +++ b/trunk/arch/arm/kernel/perf_event_v6.c @@ -645,7 +645,7 @@ armv6mpcore_pmu_disable_event(struct hw_perf_event *hwc, static int armv6_map_event(struct perf_event *event) { - return armpmu_map_event(event, &armv6_perf_map, + return map_cpu_event(event, &armv6_perf_map, &armv6_perf_cache_map, 0xFF); } @@ -664,7 +664,7 @@ static struct arm_pmu armv6pmu = { .max_period = (1LLU << 32) - 1, }; -static struct arm_pmu *__devinit armv6pmu_init(void) +static struct arm_pmu *__init armv6pmu_init(void) { return &armv6pmu; } @@ -679,7 +679,7 @@ static struct arm_pmu *__devinit armv6pmu_init(void) static int armv6mpcore_map_event(struct perf_event *event) { - return armpmu_map_event(event, &armv6mpcore_perf_map, + return map_cpu_event(event, &armv6mpcore_perf_map, &armv6mpcore_perf_cache_map, 0xFF); } @@ -698,17 +698,17 @@ static struct arm_pmu armv6mpcore_pmu = { .max_period = (1LLU << 32) - 1, }; -static struct arm_pmu *__devinit armv6mpcore_pmu_init(void) +static struct arm_pmu *__init armv6mpcore_pmu_init(void) { return &armv6mpcore_pmu; } #else -static struct arm_pmu *__devinit armv6pmu_init(void) +static struct arm_pmu *__init armv6pmu_init(void) { return NULL; } -static struct arm_pmu *__devinit armv6mpcore_pmu_init(void) +static struct arm_pmu *__init armv6mpcore_pmu_init(void) { return NULL; } diff --git a/trunk/arch/arm/kernel/perf_event_v7.c b/trunk/arch/arm/kernel/perf_event_v7.c index bd4b090ebcfd..f04070bd2183 100644 --- a/trunk/arch/arm/kernel/perf_event_v7.c +++ b/trunk/arch/arm/kernel/perf_event_v7.c @@ -1204,31 +1204,31 @@ static void armv7pmu_reset(void *info) static int armv7_a8_map_event(struct perf_event *event) { - return armpmu_map_event(event, &armv7_a8_perf_map, + return map_cpu_event(event, &armv7_a8_perf_map, &armv7_a8_perf_cache_map, 0xFF); } static int armv7_a9_map_event(struct perf_event *event) { - return armpmu_map_event(event, &armv7_a9_perf_map, + return map_cpu_event(event, &armv7_a9_perf_map, &armv7_a9_perf_cache_map, 0xFF); } static int armv7_a5_map_event(struct perf_event *event) { - return armpmu_map_event(event, &armv7_a5_perf_map, + return map_cpu_event(event, &armv7_a5_perf_map, &armv7_a5_perf_cache_map, 0xFF); } static int armv7_a15_map_event(struct perf_event *event) { - return armpmu_map_event(event, &armv7_a15_perf_map, + return map_cpu_event(event, &armv7_a15_perf_map, &armv7_a15_perf_cache_map, 0xFF); } static int armv7_a7_map_event(struct perf_event *event) { - return armpmu_map_event(event, &armv7_a7_perf_map, + return map_cpu_event(event, &armv7_a7_perf_map, &armv7_a7_perf_cache_map, 0xFF); } @@ -1245,7 +1245,7 @@ static struct arm_pmu armv7pmu = { .max_period = (1LLU << 32) - 1, }; -static u32 __devinit armv7_read_num_pmnc_events(void) +static u32 __init armv7_read_num_pmnc_events(void) { u32 nb_cnt; @@ -1256,7 +1256,7 @@ static u32 __devinit armv7_read_num_pmnc_events(void) return nb_cnt + 1; } -static struct arm_pmu *__devinit armv7_a8_pmu_init(void) +static struct arm_pmu *__init armv7_a8_pmu_init(void) { armv7pmu.name = "ARMv7 Cortex-A8"; armv7pmu.map_event = armv7_a8_map_event; @@ -1264,7 +1264,7 @@ static struct arm_pmu *__devinit armv7_a8_pmu_init(void) return &armv7pmu; } -static struct arm_pmu *__devinit armv7_a9_pmu_init(void) +static struct arm_pmu *__init armv7_a9_pmu_init(void) { armv7pmu.name = "ARMv7 Cortex-A9"; armv7pmu.map_event = armv7_a9_map_event; @@ -1272,7 +1272,7 @@ static struct arm_pmu *__devinit armv7_a9_pmu_init(void) return &armv7pmu; } -static struct arm_pmu *__devinit armv7_a5_pmu_init(void) +static struct arm_pmu *__init armv7_a5_pmu_init(void) { armv7pmu.name = "ARMv7 Cortex-A5"; armv7pmu.map_event = armv7_a5_map_event; @@ -1280,7 +1280,7 @@ static struct arm_pmu *__devinit armv7_a5_pmu_init(void) return &armv7pmu; } -static struct arm_pmu *__devinit armv7_a15_pmu_init(void) +static struct arm_pmu *__init armv7_a15_pmu_init(void) { armv7pmu.name = "ARMv7 Cortex-A15"; armv7pmu.map_event = armv7_a15_map_event; @@ -1289,7 +1289,7 @@ static struct arm_pmu *__devinit armv7_a15_pmu_init(void) return &armv7pmu; } -static struct arm_pmu *__devinit armv7_a7_pmu_init(void) +static struct arm_pmu *__init armv7_a7_pmu_init(void) { armv7pmu.name = "ARMv7 Cortex-A7"; armv7pmu.map_event = armv7_a7_map_event; @@ -1298,27 +1298,27 @@ static struct arm_pmu *__devinit armv7_a7_pmu_init(void) return &armv7pmu; } #else -static struct arm_pmu *__devinit armv7_a8_pmu_init(void) +static struct arm_pmu *__init armv7_a8_pmu_init(void) { return NULL; } -static struct arm_pmu *__devinit armv7_a9_pmu_init(void) +static struct arm_pmu *__init armv7_a9_pmu_init(void) { return NULL; } -static struct arm_pmu *__devinit armv7_a5_pmu_init(void) +static struct arm_pmu *__init armv7_a5_pmu_init(void) { return NULL; } -static struct arm_pmu *__devinit armv7_a15_pmu_init(void) +static struct arm_pmu *__init armv7_a15_pmu_init(void) { return NULL; } -static struct arm_pmu *__devinit armv7_a7_pmu_init(void) +static struct arm_pmu *__init armv7_a7_pmu_init(void) { return NULL; } diff --git a/trunk/arch/arm/kernel/perf_event_xscale.c b/trunk/arch/arm/kernel/perf_event_xscale.c index 426e19f380a2..f759fe0bab63 100644 --- a/trunk/arch/arm/kernel/perf_event_xscale.c +++ b/trunk/arch/arm/kernel/perf_event_xscale.c @@ -430,7 +430,7 @@ xscale1pmu_write_counter(int counter, u32 val) static int xscale_map_event(struct perf_event *event) { - return armpmu_map_event(event, &xscale_perf_map, + return map_cpu_event(event, &xscale_perf_map, &xscale_perf_cache_map, 0xFF); } @@ -449,7 +449,7 @@ static struct arm_pmu xscale1pmu = { .max_period = (1LLU << 32) - 1, }; -static struct arm_pmu *__devinit xscale1pmu_init(void) +static struct arm_pmu *__init xscale1pmu_init(void) { return &xscale1pmu; } @@ -816,17 +816,17 @@ static struct arm_pmu xscale2pmu = { .max_period = (1LLU << 32) - 1, }; -static struct arm_pmu *__devinit xscale2pmu_init(void) +static struct arm_pmu *__init xscale2pmu_init(void) { return &xscale2pmu; } #else -static struct arm_pmu *__devinit xscale1pmu_init(void) +static struct arm_pmu *__init xscale1pmu_init(void) { return NULL; } -static struct arm_pmu *__devinit xscale2pmu_init(void) +static struct arm_pmu *__init xscale2pmu_init(void) { return NULL; } diff --git a/trunk/arch/arm/kernel/pmu.c b/trunk/arch/arm/kernel/pmu.c new file mode 100644 index 000000000000..2334bf8a650a --- /dev/null +++ b/trunk/arch/arm/kernel/pmu.c @@ -0,0 +1,36 @@ +/* + * linux/arch/arm/kernel/pmu.c + * + * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles + * Copyright (C) 2010 ARM Ltd, Will Deacon + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include + +#include + +/* + * PMU locking to ensure mutual exclusion between different subsystems. + */ +static unsigned long pmu_lock[BITS_TO_LONGS(ARM_NUM_PMU_DEVICES)]; + +int +reserve_pmu(enum arm_pmu_type type) +{ + return test_and_set_bit_lock(type, pmu_lock) ? -EBUSY : 0; +} +EXPORT_SYMBOL_GPL(reserve_pmu); + +void +release_pmu(enum arm_pmu_type type) +{ + clear_bit_unlock(type, pmu_lock); +} +EXPORT_SYMBOL_GPL(release_pmu); diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index b0179b89a04c..f7945218b8c6 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -420,23 +420,20 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) #endif instr = *(u32 *) pc; } else if (thumb_mode(regs)) { - if (get_user(instr, (u16 __user *)pc)) - goto die_sig; + get_user(instr, (u16 __user *)pc); if (is_wide_instruction(instr)) { unsigned int instr2; - if (get_user(instr2, (u16 __user *)pc+1)) - goto die_sig; + get_user(instr2, (u16 __user *)pc+1); instr <<= 16; instr |= instr2; } - } else if (get_user(instr, (u32 __user *)pc)) { - goto die_sig; + } else { + get_user(instr, (u32 __user *)pc); } if (call_undef_hook(regs, instr) == 0) return; -die_sig: #ifdef CONFIG_DEBUG_USER if (user_debug & UDBG_UNDEFINED) { printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", diff --git a/trunk/arch/arm/lib/delay.c b/trunk/arch/arm/lib/delay.c index 395d5fbb8fa2..d6dacc69254e 100644 --- a/trunk/arch/arm/lib/delay.c +++ b/trunk/arch/arm/lib/delay.c @@ -59,7 +59,6 @@ void __init init_current_timer_delay(unsigned long freq) { pr_info("Switching to timer-based delay loop\n"); lpj_fine = freq / HZ; - loops_per_jiffy = lpj_fine; arm_delay_ops.delay = __timer_delay; arm_delay_ops.const_udelay = __timer_const_udelay; arm_delay_ops.udelay = __timer_udelay; diff --git a/trunk/arch/arm/lib/getuser.S b/trunk/arch/arm/lib/getuser.S index 9b06bb41fca6..11093a7c3e32 100644 --- a/trunk/arch/arm/lib/getuser.S +++ b/trunk/arch/arm/lib/getuser.S @@ -16,9 +16,8 @@ * __get_user_X * * Inputs: r0 contains the address - * r1 contains the address limit, which must be preserved * Outputs: r0 is the error code - * r2 contains the zero-extended value + * r2, r3 contains the zero-extended value * lr corrupted * * No other registers must be altered. (see @@ -28,39 +27,33 @@ * Note also that it is intended that __get_user_bad is not global. */ #include -#include #include #include ENTRY(__get_user_1) - check_uaccess r0, 1, r1, r2, __get_user_bad 1: TUSER(ldrb) r2, [r0] mov r0, #0 mov pc, lr ENDPROC(__get_user_1) ENTRY(__get_user_2) - check_uaccess r0, 2, r1, r2, __get_user_bad -#ifdef CONFIG_CPU_USE_DOMAINS -rb .req ip -2: ldrbt r2, [r0], #1 -3: ldrbt rb, [r0], #0 +#ifdef CONFIG_THUMB2_KERNEL +2: TUSER(ldrb) r2, [r0] +3: TUSER(ldrb) r3, [r0, #1] #else -rb .req r0 -2: ldrb r2, [r0] -3: ldrb rb, [r0, #1] +2: TUSER(ldrb) r2, [r0], #1 +3: TUSER(ldrb) r3, [r0] #endif #ifndef __ARMEB__ - orr r2, r2, rb, lsl #8 + orr r2, r2, r3, lsl #8 #else - orr r2, rb, r2, lsl #8 + orr r2, r3, r2, lsl #8 #endif mov r0, #0 mov pc, lr ENDPROC(__get_user_2) ENTRY(__get_user_4) - check_uaccess r0, 4, r1, r2, __get_user_bad 4: TUSER(ldr) r2, [r0] mov r0, #0 mov pc, lr diff --git a/trunk/arch/arm/lib/putuser.S b/trunk/arch/arm/lib/putuser.S index 3d73dcb959b0..7db25990c589 100644 --- a/trunk/arch/arm/lib/putuser.S +++ b/trunk/arch/arm/lib/putuser.S @@ -16,7 +16,6 @@ * __put_user_X * * Inputs: r0 contains the address - * r1 contains the address limit, which must be preserved * r2, r3 contains the value * Outputs: r0 is the error code * lr corrupted @@ -28,19 +27,16 @@ * Note also that it is intended that __put_user_bad is not global. */ #include -#include #include #include ENTRY(__put_user_1) - check_uaccess r0, 1, r1, ip, __put_user_bad 1: TUSER(strb) r2, [r0] mov r0, #0 mov pc, lr ENDPROC(__put_user_1) ENTRY(__put_user_2) - check_uaccess r0, 2, r1, ip, __put_user_bad mov ip, r2, lsr #8 #ifdef CONFIG_THUMB2_KERNEL #ifndef __ARMEB__ @@ -64,14 +60,12 @@ ENTRY(__put_user_2) ENDPROC(__put_user_2) ENTRY(__put_user_4) - check_uaccess r0, 4, r1, ip, __put_user_bad 4: TUSER(str) r2, [r0] mov r0, #0 mov pc, lr ENDPROC(__put_user_4) ENTRY(__put_user_8) - check_uaccess r0, 8, r1, ip, __put_user_bad #ifdef CONFIG_THUMB2_KERNEL 5: TUSER(str) r2, [r0] 6: TUSER(str) r3, [r0, #4] diff --git a/trunk/arch/arm/mach-bcmring/arch.c b/trunk/arch/arm/mach-bcmring/arch.c index 76e795323569..45c97b1ee9b1 100644 --- a/trunk/arch/arm/mach-bcmring/arch.c +++ b/trunk/arch/arm/mach-bcmring/arch.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -115,7 +116,7 @@ static struct resource pmu_resource = { static struct platform_device pmu_device = { .name = "arm-pmu", - .id = -1, + .id = ARM_PMU_DEVICE_CPU, .resource = &pmu_resource, .num_resources = 1, }; diff --git a/trunk/arch/arm/mach-exynos/Kconfig b/trunk/arch/arm/mach-exynos/Kconfig index 6c3299ebbfc5..b5b4c8c9db11 100644 --- a/trunk/arch/arm/mach-exynos/Kconfig +++ b/trunk/arch/arm/mach-exynos/Kconfig @@ -418,8 +418,8 @@ config MACH_EXYNOS5_DT select USE_OF select ARM_AMBA help - Machine support for Samsung EXYNOS5 machine with device tree enabled. - Select this if a fdt blob is available for the EXYNOS5 SoC based board. + Machine support for Samsung Exynos4 machine with device tree enabled. + Select this if a fdt blob is available for the EXYNOS4 SoC based board. if ARCH_EXYNOS4 diff --git a/trunk/arch/arm/mach-exynos/clock-exynos4.c b/trunk/arch/arm/mach-exynos/clock-exynos4.c index 6a45c9a9abe9..2f51293c1875 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos4.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos4.c @@ -500,10 +500,6 @@ static struct clk exynos4_init_clocks_off[] = { .devname = "exynos4-fimc.3", .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 3), - }, { - .name = "tsi", - .enable = exynos4_clk_ip_fsys_ctrl, - .ctrlbit = (1 << 4), }, { .name = "hsmmc", .devname = "exynos4-sdhci.0", @@ -533,14 +529,6 @@ static struct clk exynos4_init_clocks_off[] = { .parent = &exynos4_clk_aclk_133.clk, .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 9), - }, { - .name = "onenand", - .enable = exynos4_clk_ip_fsys_ctrl, - .ctrlbit = (1 << 15), - }, { - .name = "nfcon", - .enable = exynos4_clk_ip_fsys_ctrl, - .ctrlbit = (1 << 16), }, { .name = "dac", .devname = "s5p-sdo", @@ -626,25 +614,6 @@ static struct clk exynos4_init_clocks_off[] = { .devname = "samsung-i2s.2", .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 21), - }, { - .name = "pcm", - .devname = "samsung-pcm.1", - .enable = exynos4_clk_ip_peril_ctrl, - .ctrlbit = (1 << 22), - }, { - .name = "pcm", - .devname = "samsung-pcm.2", - .enable = exynos4_clk_ip_peril_ctrl, - .ctrlbit = (1 << 23), - }, { - .name = "slimbus", - .enable = exynos4_clk_ip_peril_ctrl, - .ctrlbit = (1 << 25), - }, { - .name = "spdif", - .devname = "samsung-spdif", - .enable = exynos4_clk_ip_peril_ctrl, - .ctrlbit = (1 << 26), }, { .name = "ac97", .devname = "samsung-ac97", diff --git a/trunk/arch/arm/mach-exynos/clock-exynos5.c b/trunk/arch/arm/mach-exynos/clock-exynos5.c index 404c53d8ca8e..774533c67066 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos5.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos5.c @@ -891,13 +891,6 @@ static struct clk exynos5_clk_mdma1 = { .ctrlbit = (1 << 4), }; -static struct clk exynos5_clk_fimd1 = { - .name = "fimd", - .devname = "exynos5-fb.1", - .enable = exynos5_clk_ip_disp1_ctrl, - .ctrlbit = (1 << 0), -}; - struct clk *exynos5_clkset_group_list[] = { [0] = &clk_ext_xtal_mux, [1] = NULL, @@ -1127,18 +1120,6 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = { .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 }, }; -struct clksrc_clk exynos5_clk_sclk_fimd1 = { - .clk = { - .name = "sclk_fimd", - .devname = "exynos5-fb.1", - .enable = exynos5_clksrc_mask_disp1_0_ctrl, - .ctrlbit = (1 << 0), - }, - .sources = &exynos5_clkset_group, - .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 }, - .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 }, -}; - static struct clksrc_clk exynos5_clksrcs[] = { { .clk = { @@ -1148,6 +1129,16 @@ static struct clksrc_clk exynos5_clksrcs[] = { .ctrlbit = (1 << 16), }, .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 }, + }, { + .clk = { + .name = "sclk_fimd", + .devname = "s3cfb.1", + .enable = exynos5_clksrc_mask_disp1_0_ctrl, + .ctrlbit = (1 << 0), + }, + .sources = &exynos5_clkset_group, + .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 }, + .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 }, }, { .clk = { .name = "aclk_266_gscl", @@ -1249,14 +1240,12 @@ static struct clksrc_clk *exynos5_sysclks[] = { &exynos5_clk_mdout_spi0, &exynos5_clk_mdout_spi1, &exynos5_clk_mdout_spi2, - &exynos5_clk_sclk_fimd1, }; static struct clk *exynos5_clk_cdev[] = { &exynos5_clk_pdma0, &exynos5_clk_pdma1, &exynos5_clk_mdma1, - &exynos5_clk_fimd1, }; static struct clksrc_clk *exynos5_clksrc_cdev[] = { @@ -1285,7 +1274,6 @@ static struct clk_lookup exynos5_clk_lookup[] = { CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0), CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1), CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1), - CLKDEV_INIT("exynos5-fb.1", "lcd", &exynos5_clk_fimd1), }; static unsigned long exynos5_epll_get_rate(struct clk *clk) diff --git a/trunk/arch/arm/mach-imx/clk-imx25.c b/trunk/arch/arm/mach-imx/clk-imx25.c index 4431a62fff5b..fdd8cc87c9fe 100644 --- a/trunk/arch/arm/mach-imx/clk-imx25.c +++ b/trunk/arch/arm/mach-imx/clk-imx25.c @@ -222,8 +222,10 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); - clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); + clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0"); + clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0"); + clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1"); + clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1"); clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); diff --git a/trunk/arch/arm/mach-imx/clk-imx35.c b/trunk/arch/arm/mach-imx/clk-imx35.c index 177259b523cd..c6422fb10bae 100644 --- a/trunk/arch/arm/mach-imx/clk-imx35.c +++ b/trunk/arch/arm/mach-imx/clk-imx35.c @@ -62,8 +62,8 @@ enum mx35_clks { kpp_gate, mlb_gate, mshc_gate, owire_gate, pwm_gate, rngc_gate, rtc_gate, rtic_gate, scc_gate, sdma_gate, spba_gate, spdif_gate, ssi1_gate, ssi2_gate, uart1_gate, uart2_gate, uart3_gate, usbotg_gate, - wdog_gate, max_gate, admux_gate, csi_gate, csi_div, csi_sel, iim_gate, - gpu2d_gate, clk_max + wdog_gate, max_gate, admux_gate, csi_gate, iim_gate, gpu2d_gate, + clk_max }; static struct clk *clk[clk_max]; @@ -142,9 +142,6 @@ int __init mx35_clocks_init() clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4); - clk[csi_sel] = imx_clk_mux("csi_sel", base + MX35_CCM_PDR2, 7, 1, std_sel, ARRAY_SIZE(std_sel)); - clk[csi_div] = imx_clk_divider("csi_div", "csi_sel", base + MX35_CCM_PDR2, 16, 6); - clk[asrc_gate] = imx_clk_gate2("asrc_gate", "ipg", base + MX35_CCM_CGR0, 0); clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", base + MX35_CCM_CGR0, 2); clk[audmux_gate] = imx_clk_gate2("audmux_gate", "ipg", base + MX35_CCM_CGR0, 4); @@ -195,7 +192,7 @@ int __init mx35_clocks_init() clk[max_gate] = imx_clk_gate2("max_gate", "dummy", base + MX35_CCM_CGR2, 26); clk[admux_gate] = imx_clk_gate2("admux_gate", "ipg", base + MX35_CCM_CGR2, 30); - clk[csi_gate] = imx_clk_gate2("csi_gate", "csi_div", base + MX35_CCM_CGR3, 0); + clk[csi_gate] = imx_clk_gate2("csi_gate", "ipg", base + MX35_CCM_CGR3, 0); clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MX35_CCM_CGR3, 2); clk[gpu2d_gate] = imx_clk_gate2("gpu2d_gate", "ahb", base + MX35_CCM_CGR3, 4); @@ -231,11 +228,12 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); - clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); - clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); - clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); + clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0"); + clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0"); + clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1"); + clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1"); /* i.mx35 has the i.mx21 type uart */ clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); @@ -257,7 +255,6 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc"); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0"); - clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); clk_prepare_enable(clk[spba_gate]); clk_prepare_enable(clk[gpio1_gate]); diff --git a/trunk/arch/arm/mach-imx/clk-imx51-imx53.c b/trunk/arch/arm/mach-imx/clk-imx51-imx53.c index db70d23f95fa..4bdcaa97bd98 100644 --- a/trunk/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/trunk/arch/arm/mach-imx/clk-imx51-imx53.c @@ -49,7 +49,6 @@ static const char *mx53_tve_ext_sel[] = { "pll4_sw", "ckih1", }; static const char *tve_sel[] = { "tve_pred", "tve_ext_sel", }; static const char *ipu_sel[] = { "axi_a", "axi_b", "emi_slow_gate", "ahb", }; static const char *vpu_sel[] = { "axi_a", "axi_b", "emi_slow_gate", "ahb", }; -static const char *mx53_can_sel[] = { "ipg", "ckih1", "ckih2", "lp_apm", }; enum imx5_clks { dummy, ckil, osc, ckih1, ckih2, ahb, ipg, axi_a, axi_b, uart_pred, @@ -83,7 +82,6 @@ enum imx5_clks { ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate, ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate, epit1_ipg_gate, epit1_hf_gate, epit2_ipg_gate, epit2_hf_gate, - can_sel, can1_serial_gate, can1_ipg_gate, clk_max }; @@ -423,12 +421,8 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk[esdhc4_per_gate] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14); clk[usb_phy1_gate] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10); clk[usb_phy2_gate] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12); - clk[can_sel] = imx_clk_mux("can_sel", MXC_CCM_CSCMR2, 6, 2, - mx53_can_sel, ARRAY_SIZE(mx53_can_sel)); - clk[can1_serial_gate] = imx_clk_gate2("can1_serial_gate", "can_sel", MXC_CCM_CCGR6, 22); - clk[can1_ipg_gate] = imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR6, 20); - clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "can_sel", MXC_CCM_CCGR4, 8); - clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 6); + clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "ipg", MXC_CCM_CCGR4, 6); + clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 8); clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22); for (i = 0; i < ARRAY_SIZE(clk); i++) @@ -461,10 +455,6 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi"); - clk_register_clkdev(clk[can1_ipg_gate], "ipg", "53fc8000.can"); - clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can"); - clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can"); - clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000); diff --git a/trunk/arch/arm/mach-lpc32xx/irq.c b/trunk/arch/arm/mach-lpc32xx/irq.c index 3c6332753358..5b1cc35e6fba 100644 --- a/trunk/arch/arm/mach-lpc32xx/irq.c +++ b/trunk/arch/arm/mach-lpc32xx/irq.c @@ -283,25 +283,21 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type) case IRQ_TYPE_EDGE_RISING: /* Rising edge sensitive */ __lpc32xx_set_irq_type(d->hwirq, 1, 1); - __irq_set_handler_locked(d->hwirq, handle_edge_irq); break; case IRQ_TYPE_EDGE_FALLING: /* Falling edge sensitive */ __lpc32xx_set_irq_type(d->hwirq, 0, 1); - __irq_set_handler_locked(d->hwirq, handle_edge_irq); break; case IRQ_TYPE_LEVEL_LOW: /* Low level sensitive */ __lpc32xx_set_irq_type(d->hwirq, 0, 0); - __irq_set_handler_locked(d->hwirq, handle_level_irq); break; case IRQ_TYPE_LEVEL_HIGH: /* High level sensitive */ __lpc32xx_set_irq_type(d->hwirq, 1, 0); - __irq_set_handler_locked(d->hwirq, handle_level_irq); break; /* Other modes are not supported */ @@ -309,6 +305,9 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type) return -EINVAL; } + /* Ok to use the level handler for all types */ + irq_set_handler(d->hwirq, handle_level_irq); + return 0; } diff --git a/trunk/arch/arm/mach-lpc32xx/phy3250.c b/trunk/arch/arm/mach-lpc32xx/phy3250.c index 8f2a2f8712d7..b07dcc90829d 100644 --- a/trunk/arch/arm/mach-lpc32xx/phy3250.c +++ b/trunk/arch/arm/mach-lpc32xx/phy3250.c @@ -37,8 +37,6 @@ #include #include #include -#include -#include #include #include @@ -225,14 +223,6 @@ static struct mmci_platform_data lpc32xx_mmci_data = { * gather, and the MMCI driver doesn't do it this way */ }; -static struct lpc32xx_slc_platform_data lpc32xx_slc_data = { - .dma_filter = pl08x_filter_id, -}; - -static struct lpc32xx_mlc_platform_data lpc32xx_mlc_data = { - .dma_filter = pl08x_filter_id, -}; - static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", &lpc32xx_ssp0_data), OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", &lpc32xx_ssp1_data), @@ -240,10 +230,6 @@ static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd), OF_DEV_AUXDATA("arm,pl18x", 0x20098000, "20098000.sd", &lpc32xx_mmci_data), - OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash", - &lpc32xx_slc_data), - OF_DEV_AUXDATA("nxp,lpc3220-mlc", 0x200a8000, "200a8000.flash", - &lpc32xx_mlc_data), { } }; @@ -267,6 +253,12 @@ static void __init lpc3250_machine_init(void) of_platform_populate(NULL, of_default_bus_match_table, lpc32xx_auxdata_lookup, NULL); + + /* Register GPIOs used on this board */ + if (gpio_request(MMC_PWR_ENABLE_GPIO, "mmc_power_en")) + pr_err("Error requesting gpio %u", MMC_PWR_ENABLE_GPIO); + else if (gpio_direction_output(MMC_PWR_ENABLE_GPIO, 1)) + pr_err("Error setting gpio %u to output", MMC_PWR_ENABLE_GPIO); } static char const *lpc32xx_dt_compat[] __initdata = { diff --git a/trunk/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/trunk/arch/arm/mach-omap1/ams-delta-fiq-handler.S index d2b6acce8fc1..a051cb8ae57f 100644 --- a/trunk/arch/arm/mach-omap1/ams-delta-fiq-handler.S +++ b/trunk/arch/arm/mach-omap1/ams-delta-fiq-handler.S @@ -18,7 +18,6 @@ #include -#include #include #include "iomap.h" diff --git a/trunk/arch/arm/mach-omap1/board-ams-delta.c b/trunk/arch/arm/mach-omap1/board-ams-delta.c index 6f192c4900b1..c53469802c03 100644 --- a/trunk/arch/arm/mach-omap1/board-ams-delta.c +++ b/trunk/arch/arm/mach-omap1/board-ams-delta.c @@ -26,7 +26,6 @@ #include #include #include -#include #include @@ -38,6 +37,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-omap1/board-fsample.c b/trunk/arch/arm/mach-omap1/board-fsample.c index 6d985521a39e..6872f3fd400f 100644 --- a/trunk/arch/arm/mach-omap1/board-fsample.c +++ b/trunk/arch/arm/mach-omap1/board-fsample.c @@ -32,6 +32,7 @@ #include #include #include +#include #include diff --git a/trunk/arch/arm/mach-omap1/board-generic.c b/trunk/arch/arm/mach-omap1/board-generic.c index 04b5fdaff831..6ec385e2b98e 100644 --- a/trunk/arch/arm/mach-omap1/board-generic.c +++ b/trunk/arch/arm/mach-omap1/board-generic.c @@ -23,6 +23,7 @@ #include #include +#include #include @@ -51,6 +52,9 @@ static struct omap_usb_config generic1610_usb_config __initdata = { }; #endif +static struct omap_board_config_kernel generic_config[] __initdata = { +}; + static void __init omap_generic_init(void) { #ifdef CONFIG_ARCH_OMAP15XX @@ -72,6 +76,8 @@ static void __init omap_generic_init(void) } #endif + omap_board_config = generic_config; + omap_board_config_size = ARRAY_SIZE(generic_config); omap_serial_init(); omap_register_i2c_bus(1, 100, NULL, 0); } diff --git a/trunk/arch/arm/mach-omap1/board-htcherald.c b/trunk/arch/arm/mach-omap1/board-htcherald.c index a5ac352d68d3..b3f6e943e661 100644 --- a/trunk/arch/arm/mach-omap1/board-htcherald.c +++ b/trunk/arch/arm/mach-omap1/board-htcherald.c @@ -41,7 +41,8 @@ #include #include -#include +#include +#include #include #include diff --git a/trunk/arch/arm/mach-omap1/board-nokia770.c b/trunk/arch/arm/mach-omap1/board-nokia770.c index ec01f03d0446..2c0ca8fc3380 100644 --- a/trunk/arch/arm/mach-omap1/board-nokia770.c +++ b/trunk/arch/arm/mach-omap1/board-nokia770.c @@ -26,6 +26,7 @@ #include #include +#include #include #include #include diff --git a/trunk/arch/arm/mach-omap1/board-osk.c b/trunk/arch/arm/mach-omap1/board-osk.c index 3b2d9071022a..8784705edb60 100644 --- a/trunk/arch/arm/mach-omap1/board-osk.c +++ b/trunk/arch/arm/mach-omap1/board-osk.c @@ -39,8 +39,6 @@ #include #include #include -#include -#include #include #include diff --git a/trunk/arch/arm/mach-omap1/board-palmte.c b/trunk/arch/arm/mach-omap1/board-palmte.c index 49f8d745ea1f..26bcb9defcdc 100644 --- a/trunk/arch/arm/mach-omap1/board-palmte.c +++ b/trunk/arch/arm/mach-omap1/board-palmte.c @@ -28,7 +28,6 @@ #include #include #include -#include #include #include @@ -38,6 +37,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-omap1/board-palmtt.c b/trunk/arch/arm/mach-omap1/board-palmtt.c index 01523cd78e58..4d099446dfa8 100644 --- a/trunk/arch/arm/mach-omap1/board-palmtt.c +++ b/trunk/arch/arm/mach-omap1/board-palmtt.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include @@ -38,6 +37,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-omap1/board-palmz71.c b/trunk/arch/arm/mach-omap1/board-palmz71.c index a7abce69043a..355980321c2d 100644 --- a/trunk/arch/arm/mach-omap1/board-palmz71.c +++ b/trunk/arch/arm/mach-omap1/board-palmz71.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include @@ -40,6 +39,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-omap1/board-perseus2.c b/trunk/arch/arm/mach-omap1/board-perseus2.c index 277e0bc60a43..703d55ecffe2 100644 --- a/trunk/arch/arm/mach-omap1/board-perseus2.c +++ b/trunk/arch/arm/mach-omap1/board-perseus2.c @@ -32,6 +32,7 @@ #include #include #include +#include #include diff --git a/trunk/arch/arm/mach-omap1/board-sx1.c b/trunk/arch/arm/mach-omap1/board-sx1.c index 2e1fff26a2f3..8c665bd16ac2 100644 --- a/trunk/arch/arm/mach-omap1/board-sx1.c +++ b/trunk/arch/arm/mach-omap1/board-sx1.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-omap1/board-voiceblue.c b/trunk/arch/arm/mach-omap1/board-voiceblue.c index 1668af3017de..3497769eb353 100644 --- a/trunk/arch/arm/mach-omap1/board-voiceblue.c +++ b/trunk/arch/arm/mach-omap1/board-voiceblue.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -154,6 +155,9 @@ static struct omap_usb_config voiceblue_usb_config __initdata = { .pins[2] = 6, }; +static struct omap_board_config_kernel voiceblue_config[] = { +}; + #define MACHINE_PANICED 1 #define MACHINE_REBOOTING 2 #define MACHINE_REBOOT 4 @@ -271,6 +275,8 @@ static void __init voiceblue_init(void) voiceblue_smc91x_resources[1].start = gpio_to_irq(8); voiceblue_smc91x_resources[1].end = gpio_to_irq(8); platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices)); + omap_board_config = voiceblue_config; + omap_board_config_size = ARRAY_SIZE(voiceblue_config); omap_serial_init(); omap1_usb_init(&voiceblue_usb_config); omap_register_i2c_bus(1, 100, NULL, 0); diff --git a/trunk/arch/arm/mach-omap1/clock_data.c b/trunk/arch/arm/mach-omap1/clock_data.c index 6a32b9b0dc30..c007d80dfb62 100644 --- a/trunk/arch/arm/mach-omap1/clock_data.c +++ b/trunk/arch/arm/mach-omap1/clock_data.c @@ -25,6 +25,7 @@ #include #include #include +#include #include /* for omap_sram_reprogram_clock() */ #include @@ -787,6 +788,7 @@ u32 cpu_mask; int __init omap1_clk_init(void) { struct omap_clk *c; + const struct omap_clock_config *info; int crystal_type = 0; /* Default 12 MHz */ u32 reg; @@ -835,6 +837,12 @@ int __init omap1_clk_init(void) ck_dpll1_p = clk_get(NULL, "ck_dpll1"); ck_ref_p = clk_get(NULL, "ck_ref"); + info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); + if (info != NULL) { + if (!cpu_is_omap15xx()) + crystal_type = info->system_clock_type; + } + if (cpu_is_omap7xx()) ck_ref.rate = 13000000; if (cpu_is_omap16xx() && crystal_type == 2) diff --git a/trunk/arch/arm/mach-omap1/devices.c b/trunk/arch/arm/mach-omap1/devices.c index 05fdbd992c77..fa1fa4deb6aa 100644 --- a/trunk/arch/arm/mach-omap1/devices.c +++ b/trunk/arch/arm/mach-omap1/devices.c @@ -20,11 +20,12 @@ #include #include +#include #include #include #include +#include -#include #include #include diff --git a/trunk/arch/arm/mach-omap1/dma.c b/trunk/arch/arm/mach-omap1/dma.c index b0b0f0f27450..3ef7d52316b4 100644 --- a/trunk/arch/arm/mach-omap1/dma.c +++ b/trunk/arch/arm/mach-omap1/dma.c @@ -27,8 +27,7 @@ #include #include - -#include +#include #define OMAP1_DMA_BASE (0xfffed800) #define OMAP1_LOGICAL_DMA_CH_COUNT 17 diff --git a/trunk/arch/arm/mach-omap1/gpio15xx.c b/trunk/arch/arm/mach-omap1/gpio15xx.c index 98e6f39224a4..ebef15e5e7b7 100644 --- a/trunk/arch/arm/mach-omap1/gpio15xx.c +++ b/trunk/arch/arm/mach-omap1/gpio15xx.c @@ -17,7 +17,6 @@ */ #include -#include #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE #define OMAP1510_GPIO_BASE 0xFFFCE000 diff --git a/trunk/arch/arm/mach-omap1/gpio16xx.c b/trunk/arch/arm/mach-omap1/gpio16xx.c index 33f419236b17..2a48cd2e1754 100644 --- a/trunk/arch/arm/mach-omap1/gpio16xx.c +++ b/trunk/arch/arm/mach-omap1/gpio16xx.c @@ -17,7 +17,6 @@ */ #include -#include #define OMAP1610_GPIO1_BASE 0xfffbe400 #define OMAP1610_GPIO2_BASE 0xfffbec00 diff --git a/trunk/arch/arm/mach-omap1/gpio7xx.c b/trunk/arch/arm/mach-omap1/gpio7xx.c index 958ce9acee95..acf12b73eace 100644 --- a/trunk/arch/arm/mach-omap1/gpio7xx.c +++ b/trunk/arch/arm/mach-omap1/gpio7xx.c @@ -17,7 +17,6 @@ */ #include -#include #define OMAP7XX_GPIO1_BASE 0xfffbc000 #define OMAP7XX_GPIO2_BASE 0xfffbc800 diff --git a/trunk/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/trunk/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h index adb5e7649659..23eed0035ed8 100644 --- a/trunk/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h +++ b/trunk/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h @@ -14,6 +14,8 @@ #ifndef __AMS_DELTA_FIQ_H #define __AMS_DELTA_FIQ_H +#include + /* * Interrupt number used for passing control from FIQ to IRQ. * IRQ12, described as reserved, has been selected. diff --git a/trunk/arch/arm/mach-omap1/include/mach/gpio.h b/trunk/arch/arm/mach-omap1/include/mach/gpio.h index ebf86c0f4f46..e737706a8fe1 100644 --- a/trunk/arch/arm/mach-omap1/include/mach/gpio.h +++ b/trunk/arch/arm/mach-omap1/include/mach/gpio.h @@ -1,3 +1,5 @@ /* * arch/arm/mach-omap1/include/mach/gpio.h */ + +#include diff --git a/trunk/arch/arm/mach-omap1/include/mach/hardware.h b/trunk/arch/arm/mach-omap1/include/mach/hardware.h index 84248d250adb..01e35fa106b8 100644 --- a/trunk/arch/arm/mach-omap1/include/mach/hardware.h +++ b/trunk/arch/arm/mach-omap1/include/mach/hardware.h @@ -1,46 +1,11 @@ /* * arch/arm/mach-omap1/include/mach/hardware.h - * - * Hardware definitions for TI OMAP processors and boards - * - * NOTE: Please put device driver specific defines into a separate header - * file for each driver. - * - * Copyright (C) 2001 RidgeRun, Inc. - * Author: RidgeRun, Inc. Greg Lonnon - * - * Reorganized for Linux-2.6 by Tony Lindgren - * and Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#ifndef __ASM_ARCH_OMAP_HARDWARE_H -#define __ASM_ARCH_OMAP_HARDWARE_H +#ifndef __MACH_HARDWARE_H +#define __MACH_HARDWARE_H -#include #ifndef __ASSEMBLER__ -#include -#include - /* * NOTE: Please use ioremap + __raw_read/write where possible instead of these */ @@ -70,249 +35,7 @@ static inline u32 omap_cs3_phys(void) ? 0 : OMAP_CS3_PHYS; } -#endif /* ifndef __ASSEMBLER__ */ - -#include - -/* - * --------------------------------------------------------------------------- - * Common definitions for all OMAP processors - * NOTE: Put all processor or board specific parts to the special header - * files. - * --------------------------------------------------------------------------- - */ - -/* - * ---------------------------------------------------------------------------- - * Timers - * ---------------------------------------------------------------------------- - */ -#define OMAP_MPU_TIMER1_BASE (0xfffec500) -#define OMAP_MPU_TIMER2_BASE (0xfffec600) -#define OMAP_MPU_TIMER3_BASE (0xfffec700) -#define MPU_TIMER_FREE (1 << 6) -#define MPU_TIMER_CLOCK_ENABLE (1 << 5) -#define MPU_TIMER_AR (1 << 1) -#define MPU_TIMER_ST (1 << 0) - -/* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define CLKGEN_REG_BASE (0xfffece00) -#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) -#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) -#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) -#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) -#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) -#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) -#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) -#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -#define CK_RATEF 1 -#define CK_IDLEF 2 -#define CK_ENABLEF 4 -#define CK_SELECTF 8 -#define SETARM_IDLE_SHIFT - -/* DPLL control registers */ -#define DPLL_CTL (0xfffecf00) - -/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ -#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) -#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) -#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) -#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) -#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14) - -/* - * --------------------------------------------------------------------------- - * UPLD - * --------------------------------------------------------------------------- - */ -#define ULPD_REG_BASE (0xfffe0800) -#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) -#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) -#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) -# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ -# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ -#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) -# define SOFT_UDC_REQ (1 << 4) -# define SOFT_USB_CLK_REQ (1 << 3) -# define SOFT_DPLL_REQ (1 << 0) -#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) -#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) -#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) -#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) -#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68) -# define DIS_MMC2_DPLL_REQ (1 << 11) -# define DIS_MMC1_DPLL_REQ (1 << 10) -# define DIS_UART3_DPLL_REQ (1 << 9) -# define DIS_UART2_DPLL_REQ (1 << 8) -# define DIS_UART1_DPLL_REQ (1 << 7) -# define DIS_USB_HOST_DPLL_REQ (1 << 6) -#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74) -#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c) - -/* - * --------------------------------------------------------------------------- - * Watchdog timer - * --------------------------------------------------------------------------- - */ - -/* Watchdog timer within the OMAP3.2 gigacell */ -#define OMAP_MPU_WATCHDOG_BASE (0xfffec800) -#define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0) -#define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4) -#define OMAP_WDT_READ_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4) -#define OMAP_WDT_TIMER_MODE (OMAP_MPU_WATCHDOG_BASE + 0x8) - -/* - * --------------------------------------------------------------------------- - * Interrupts - * --------------------------------------------------------------------------- - */ -#ifdef CONFIG_ARCH_OMAP1 - -/* - * XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c - * or something similar.. -- PFM. - */ - -#define OMAP_IH1_BASE 0xfffecb00 -#define OMAP_IH2_BASE 0xfffe0000 - -#define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00) -#define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04) -#define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10) -#define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14) -#define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18) -#define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c) -#define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c) - -#define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00) -#define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04) -#define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10) -#define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14) -#define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18) -#define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c) -#define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c) - -#define IRQ_ITR_REG_OFFSET 0x00 -#define IRQ_MIR_REG_OFFSET 0x04 -#define IRQ_SIR_IRQ_REG_OFFSET 0x10 -#define IRQ_SIR_FIQ_REG_OFFSET 0x14 -#define IRQ_CONTROL_REG_OFFSET 0x18 -#define IRQ_ISR_REG_OFFSET 0x9c -#define IRQ_ILR0_REG_OFFSET 0x1c -#define IRQ_GMR_REG_OFFSET 0xa0 - +#endif #endif -/* - * ---------------------------------------------------------------------------- - * System control registers - * ---------------------------------------------------------------------------- - */ -#define MOD_CONF_CTRL_0 0xfffe1080 -#define MOD_CONF_CTRL_1 0xfffe1110 - -/* - * ---------------------------------------------------------------------------- - * Pin multiplexing registers - * ---------------------------------------------------------------------------- - */ -#define FUNC_MUX_CTRL_0 0xfffe1000 -#define FUNC_MUX_CTRL_1 0xfffe1004 -#define FUNC_MUX_CTRL_2 0xfffe1008 -#define COMP_MODE_CTRL_0 0xfffe100c -#define FUNC_MUX_CTRL_3 0xfffe1010 -#define FUNC_MUX_CTRL_4 0xfffe1014 -#define FUNC_MUX_CTRL_5 0xfffe1018 -#define FUNC_MUX_CTRL_6 0xfffe101C -#define FUNC_MUX_CTRL_7 0xfffe1020 -#define FUNC_MUX_CTRL_8 0xfffe1024 -#define FUNC_MUX_CTRL_9 0xfffe1028 -#define FUNC_MUX_CTRL_A 0xfffe102C -#define FUNC_MUX_CTRL_B 0xfffe1030 -#define FUNC_MUX_CTRL_C 0xfffe1034 -#define FUNC_MUX_CTRL_D 0xfffe1038 -#define PULL_DWN_CTRL_0 0xfffe1040 -#define PULL_DWN_CTRL_1 0xfffe1044 -#define PULL_DWN_CTRL_2 0xfffe1048 -#define PULL_DWN_CTRL_3 0xfffe104c -#define PULL_DWN_CTRL_4 0xfffe10ac - -/* OMAP-1610 specific multiplexing registers */ -#define FUNC_MUX_CTRL_E 0xfffe1090 -#define FUNC_MUX_CTRL_F 0xfffe1094 -#define FUNC_MUX_CTRL_10 0xfffe1098 -#define FUNC_MUX_CTRL_11 0xfffe109c -#define FUNC_MUX_CTRL_12 0xfffe10a0 -#define PU_PD_SEL_0 0xfffe10b4 -#define PU_PD_SEL_1 0xfffe10b8 -#define PU_PD_SEL_2 0xfffe10bc -#define PU_PD_SEL_3 0xfffe10c0 -#define PU_PD_SEL_4 0xfffe10c4 - -/* Timer32K for 1610 and 1710*/ -#define OMAP_TIMER32K_BASE 0xFFFBC400 - -/* - * --------------------------------------------------------------------------- - * TIPB bus interface - * --------------------------------------------------------------------------- - */ -#define TIPB_PUBLIC_CNTL_BASE 0xfffed300 -#define MPU_PUBLIC_TIPB_CNTL (TIPB_PUBLIC_CNTL_BASE + 0x8) -#define TIPB_PRIVATE_CNTL_BASE 0xfffeca00 -#define MPU_PRIVATE_TIPB_CNTL (TIPB_PRIVATE_CNTL_BASE + 0x8) - -/* - * ---------------------------------------------------------------------------- - * MPUI interface - * ---------------------------------------------------------------------------- - */ -#define MPUI_BASE (0xfffec900) -#define MPUI_CTRL (MPUI_BASE + 0x0) -#define MPUI_DEBUG_ADDR (MPUI_BASE + 0x4) -#define MPUI_DEBUG_DATA (MPUI_BASE + 0x8) -#define MPUI_DEBUG_FLAG (MPUI_BASE + 0xc) -#define MPUI_STATUS_REG (MPUI_BASE + 0x10) -#define MPUI_DSP_STATUS (MPUI_BASE + 0x14) -#define MPUI_DSP_BOOT_CONFIG (MPUI_BASE + 0x18) -#define MPUI_DSP_API_CONFIG (MPUI_BASE + 0x1c) - -/* - * ---------------------------------------------------------------------------- - * LED Pulse Generator - * ---------------------------------------------------------------------------- - */ -#define OMAP_LPG1_BASE 0xfffbd000 -#define OMAP_LPG2_BASE 0xfffbd800 -#define OMAP_LPG1_LCR (OMAP_LPG1_BASE + 0x00) -#define OMAP_LPG1_PMR (OMAP_LPG1_BASE + 0x04) -#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00) -#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) - -/* - * ---------------------------------------------------------------------------- - * Pulse-Width Light - * ---------------------------------------------------------------------------- - */ -#define OMAP_PWL_BASE 0xfffb5800 -#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00) -#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04) - -/* - * --------------------------------------------------------------------------- - * Processor specific defines - * --------------------------------------------------------------------------- - */ - -#include "omap7xx.h" -#include "omap1510.h" -#include "omap16xx.h" - -#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ +#include diff --git a/trunk/arch/arm/mach-omap1/include/mach/irqs.h b/trunk/arch/arm/mach-omap1/include/mach/irqs.h index 729992d7d26a..9292fdc1cb0b 100644 --- a/trunk/arch/arm/mach-omap1/include/mach/irqs.h +++ b/trunk/arch/arm/mach-omap1/include/mach/irqs.h @@ -1,268 +1,5 @@ /* - * arch/arm/plat-omap/include/mach/irqs.h - * - * Copyright (C) Greg Lonnon 2001 - * Updated for OMAP-1610 by Tony Lindgren - * - * Copyright (C) 2009 Texas Instruments - * Added OMAP4 support - Santosh Shilimkar - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * NOTE: The interrupt vectors for the OMAP-1509, OMAP-1510, and OMAP-1610 - * are different. + * arch/arm/mach-omap1/include/mach/irqs.h */ -#ifndef __ASM_ARCH_OMAP15XX_IRQS_H -#define __ASM_ARCH_OMAP15XX_IRQS_H - -/* - * IRQ numbers for interrupt handler 1 - * - * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below - * - */ -#define INT_CAMERA 1 -#define INT_FIQ 3 -#define INT_RTDX 6 -#define INT_DSP_MMU_ABORT 7 -#define INT_HOST 8 -#define INT_ABORT 9 -#define INT_BRIDGE_PRIV 13 -#define INT_GPIO_BANK1 14 -#define INT_UART3 15 -#define INT_TIMER3 16 -#define INT_DMA_CH0_6 19 -#define INT_DMA_CH1_7 20 -#define INT_DMA_CH2_8 21 -#define INT_DMA_CH3 22 -#define INT_DMA_CH4 23 -#define INT_DMA_CH5 24 -#define INT_TIMER1 26 -#define INT_WD_TIMER 27 -#define INT_BRIDGE_PUB 28 -#define INT_TIMER2 30 -#define INT_LCD_CTRL 31 - -/* - * OMAP-1510 specific IRQ numbers for interrupt handler 1 - */ -#define INT_1510_IH2_IRQ 0 -#define INT_1510_RES2 2 -#define INT_1510_SPI_TX 4 -#define INT_1510_SPI_RX 5 -#define INT_1510_DSP_MAILBOX1 10 -#define INT_1510_DSP_MAILBOX2 11 -#define INT_1510_RES12 12 -#define INT_1510_LB_MMU 17 -#define INT_1510_RES18 18 -#define INT_1510_LOCAL_BUS 29 - -/* - * OMAP-1610 specific IRQ numbers for interrupt handler 1 - */ -#define INT_1610_IH2_IRQ INT_1510_IH2_IRQ -#define INT_1610_IH2_FIQ 2 -#define INT_1610_McBSP2_TX 4 -#define INT_1610_McBSP2_RX 5 -#define INT_1610_DSP_MAILBOX1 10 -#define INT_1610_DSP_MAILBOX2 11 -#define INT_1610_LCD_LINE 12 -#define INT_1610_GPTIMER1 17 -#define INT_1610_GPTIMER2 18 -#define INT_1610_SSR_FIFO_0 29 - -/* - * OMAP-7xx specific IRQ numbers for interrupt handler 1 - */ -#define INT_7XX_IH2_FIQ 0 -#define INT_7XX_IH2_IRQ 1 -#define INT_7XX_USB_NON_ISO 2 -#define INT_7XX_USB_ISO 3 -#define INT_7XX_ICR 4 -#define INT_7XX_EAC 5 -#define INT_7XX_GPIO_BANK1 6 -#define INT_7XX_GPIO_BANK2 7 -#define INT_7XX_GPIO_BANK3 8 -#define INT_7XX_McBSP2TX 10 -#define INT_7XX_McBSP2RX 11 -#define INT_7XX_McBSP2RX_OVF 12 -#define INT_7XX_LCD_LINE 14 -#define INT_7XX_GSM_PROTECT 15 -#define INT_7XX_TIMER3 16 -#define INT_7XX_GPIO_BANK5 17 -#define INT_7XX_GPIO_BANK6 18 -#define INT_7XX_SPGIO_WR 29 - -/* - * IRQ numbers for interrupt handler 2 - * - * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below - */ -#define IH2_BASE 32 - -#define INT_KEYBOARD (1 + IH2_BASE) -#define INT_uWireTX (2 + IH2_BASE) -#define INT_uWireRX (3 + IH2_BASE) -#define INT_I2C (4 + IH2_BASE) -#define INT_MPUIO (5 + IH2_BASE) -#define INT_USB_HHC_1 (6 + IH2_BASE) -#define INT_McBSP3TX (10 + IH2_BASE) -#define INT_McBSP3RX (11 + IH2_BASE) -#define INT_McBSP1TX (12 + IH2_BASE) -#define INT_McBSP1RX (13 + IH2_BASE) -#define INT_UART1 (14 + IH2_BASE) -#define INT_UART2 (15 + IH2_BASE) -#define INT_BT_MCSI1TX (16 + IH2_BASE) -#define INT_BT_MCSI1RX (17 + IH2_BASE) -#define INT_SOSSI_MATCH (19 + IH2_BASE) -#define INT_USB_W2FC (20 + IH2_BASE) -#define INT_1WIRE (21 + IH2_BASE) -#define INT_OS_TIMER (22 + IH2_BASE) -#define INT_MMC (23 + IH2_BASE) -#define INT_GAUGE_32K (24 + IH2_BASE) -#define INT_RTC_TIMER (25 + IH2_BASE) -#define INT_RTC_ALARM (26 + IH2_BASE) -#define INT_MEM_STICK (27 + IH2_BASE) - -/* - * OMAP-1510 specific IRQ numbers for interrupt handler 2 - */ -#define INT_1510_DSP_MMU (28 + IH2_BASE) -#define INT_1510_COM_SPI_RO (31 + IH2_BASE) - -/* - * OMAP-1610 specific IRQ numbers for interrupt handler 2 - */ -#define INT_1610_FAC (0 + IH2_BASE) -#define INT_1610_USB_HHC_2 (7 + IH2_BASE) -#define INT_1610_USB_OTG (8 + IH2_BASE) -#define INT_1610_SoSSI (9 + IH2_BASE) -#define INT_1610_SoSSI_MATCH (19 + IH2_BASE) -#define INT_1610_DSP_MMU (28 + IH2_BASE) -#define INT_1610_McBSP2RX_OF (31 + IH2_BASE) -#define INT_1610_STI (32 + IH2_BASE) -#define INT_1610_STI_WAKEUP (33 + IH2_BASE) -#define INT_1610_GPTIMER3 (34 + IH2_BASE) -#define INT_1610_GPTIMER4 (35 + IH2_BASE) -#define INT_1610_GPTIMER5 (36 + IH2_BASE) -#define INT_1610_GPTIMER6 (37 + IH2_BASE) -#define INT_1610_GPTIMER7 (38 + IH2_BASE) -#define INT_1610_GPTIMER8 (39 + IH2_BASE) -#define INT_1610_GPIO_BANK2 (40 + IH2_BASE) -#define INT_1610_GPIO_BANK3 (41 + IH2_BASE) -#define INT_1610_MMC2 (42 + IH2_BASE) -#define INT_1610_CF (43 + IH2_BASE) -#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE) -#define INT_1610_GPIO_BANK4 (48 + IH2_BASE) -#define INT_1610_SPI (49 + IH2_BASE) -#define INT_1610_DMA_CH6 (53 + IH2_BASE) -#define INT_1610_DMA_CH7 (54 + IH2_BASE) -#define INT_1610_DMA_CH8 (55 + IH2_BASE) -#define INT_1610_DMA_CH9 (56 + IH2_BASE) -#define INT_1610_DMA_CH10 (57 + IH2_BASE) -#define INT_1610_DMA_CH11 (58 + IH2_BASE) -#define INT_1610_DMA_CH12 (59 + IH2_BASE) -#define INT_1610_DMA_CH13 (60 + IH2_BASE) -#define INT_1610_DMA_CH14 (61 + IH2_BASE) -#define INT_1610_DMA_CH15 (62 + IH2_BASE) -#define INT_1610_NAND (63 + IH2_BASE) -#define INT_1610_SHA1MD5 (91 + IH2_BASE) - -/* - * OMAP-7xx specific IRQ numbers for interrupt handler 2 - */ -#define INT_7XX_HW_ERRORS (0 + IH2_BASE) -#define INT_7XX_NFIQ_PWR_FAIL (1 + IH2_BASE) -#define INT_7XX_CFCD (2 + IH2_BASE) -#define INT_7XX_CFIREQ (3 + IH2_BASE) -#define INT_7XX_I2C (4 + IH2_BASE) -#define INT_7XX_PCC (5 + IH2_BASE) -#define INT_7XX_MPU_EXT_NIRQ (6 + IH2_BASE) -#define INT_7XX_SPI_100K_1 (7 + IH2_BASE) -#define INT_7XX_SYREN_SPI (8 + IH2_BASE) -#define INT_7XX_VLYNQ (9 + IH2_BASE) -#define INT_7XX_GPIO_BANK4 (10 + IH2_BASE) -#define INT_7XX_McBSP1TX (11 + IH2_BASE) -#define INT_7XX_McBSP1RX (12 + IH2_BASE) -#define INT_7XX_McBSP1RX_OF (13 + IH2_BASE) -#define INT_7XX_UART_MODEM_IRDA_2 (14 + IH2_BASE) -#define INT_7XX_UART_MODEM_1 (15 + IH2_BASE) -#define INT_7XX_MCSI (16 + IH2_BASE) -#define INT_7XX_uWireTX (17 + IH2_BASE) -#define INT_7XX_uWireRX (18 + IH2_BASE) -#define INT_7XX_SMC_CD (19 + IH2_BASE) -#define INT_7XX_SMC_IREQ (20 + IH2_BASE) -#define INT_7XX_HDQ_1WIRE (21 + IH2_BASE) -#define INT_7XX_TIMER32K (22 + IH2_BASE) -#define INT_7XX_MMC_SDIO (23 + IH2_BASE) -#define INT_7XX_UPLD (24 + IH2_BASE) -#define INT_7XX_USB_HHC_1 (27 + IH2_BASE) -#define INT_7XX_USB_HHC_2 (28 + IH2_BASE) -#define INT_7XX_USB_GENI (29 + IH2_BASE) -#define INT_7XX_USB_OTG (30 + IH2_BASE) -#define INT_7XX_CAMERA_IF (31 + IH2_BASE) -#define INT_7XX_RNG (32 + IH2_BASE) -#define INT_7XX_DUAL_MODE_TIMER (33 + IH2_BASE) -#define INT_7XX_DBB_RF_EN (34 + IH2_BASE) -#define INT_7XX_MPUIO_KEYPAD (35 + IH2_BASE) -#define INT_7XX_SHA1_MD5 (36 + IH2_BASE) -#define INT_7XX_SPI_100K_2 (37 + IH2_BASE) -#define INT_7XX_RNG_IDLE (38 + IH2_BASE) -#define INT_7XX_MPUIO (39 + IH2_BASE) -#define INT_7XX_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE) -#define INT_7XX_LLPC_OE_FALLING (41 + IH2_BASE) -#define INT_7XX_LLPC_OE_RISING (42 + IH2_BASE) -#define INT_7XX_LLPC_VSYNC (43 + IH2_BASE) -#define INT_7XX_WAKE_UP_REQ (46 + IH2_BASE) -#define INT_7XX_DMA_CH6 (53 + IH2_BASE) -#define INT_7XX_DMA_CH7 (54 + IH2_BASE) -#define INT_7XX_DMA_CH8 (55 + IH2_BASE) -#define INT_7XX_DMA_CH9 (56 + IH2_BASE) -#define INT_7XX_DMA_CH10 (57 + IH2_BASE) -#define INT_7XX_DMA_CH11 (58 + IH2_BASE) -#define INT_7XX_DMA_CH12 (59 + IH2_BASE) -#define INT_7XX_DMA_CH13 (60 + IH2_BASE) -#define INT_7XX_DMA_CH14 (61 + IH2_BASE) -#define INT_7XX_DMA_CH15 (62 + IH2_BASE) -#define INT_7XX_NAND (63 + IH2_BASE) - -/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and - * 16 MPUIO lines */ -#define OMAP_MAX_GPIO_LINES 192 -#define IH_GPIO_BASE (128 + IH2_BASE) -#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) -#define OMAP_IRQ_END (IH_MPUIO_BASE + 16) - -/* External FPGA handles interrupts on Innovator boards */ -#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END) -#ifdef CONFIG_MACH_OMAP_INNOVATOR -#define OMAP_FPGA_NR_IRQS 24 -#else -#define OMAP_FPGA_NR_IRQS 0 -#endif -#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS) - -#define NR_IRQS OMAP_FPGA_IRQ_END - -#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) - -#include - -#ifdef CONFIG_FIQ -#define FIQ_START 1024 -#endif - -#endif +#include diff --git a/trunk/arch/arm/mach-omap1/leds-h2p2-debug.c b/trunk/arch/arm/mach-omap1/leds-h2p2-debug.c index 7f4bba9fa02e..f6b14a14a957 100644 --- a/trunk/arch/arm/mach-omap1/leds-h2p2-debug.c +++ b/trunk/arch/arm/mach-omap1/leds-h2p2-debug.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-omap1/leds.c b/trunk/arch/arm/mach-omap1/leds.c index 7b1a3833165d..ae6dd93b8ddc 100644 --- a/trunk/arch/arm/mach-omap1/leds.c +++ b/trunk/arch/arm/mach-omap1/leds.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-omap1/serial.c b/trunk/arch/arm/mach-omap1/serial.c index 0d1709b1a6fe..6809c9e56c93 100644 --- a/trunk/arch/arm/mach-omap1/serial.c +++ b/trunk/arch/arm/mach-omap1/serial.c @@ -22,6 +22,7 @@ #include +#include #include #include diff --git a/trunk/arch/arm/mach-omap2/Kconfig b/trunk/arch/arm/mach-omap2/Kconfig index 346fd26f3aa6..fcd4e85c4ddc 100644 --- a/trunk/arch/arm/mach-omap2/Kconfig +++ b/trunk/arch/arm/mach-omap2/Kconfig @@ -232,11 +232,10 @@ config MACH_OMAP3_PANDORA select OMAP_PACKAGE_CBB select REGULATOR_FIXED_VOLTAGE if REGULATOR -config MACH_TOUCHBOOK +config MACH_OMAP3_TOUCHBOOK bool "OMAP3 Touch Book" depends on ARCH_OMAP3 default y - select OMAP_PACKAGE_CBB config MACH_OMAP_3430SDP bool "OMAP 3430 SDP board" diff --git a/trunk/arch/arm/mach-omap2/Makefile b/trunk/arch/arm/mach-omap2/Makefile index f629df13f157..f6a24b3f9c4f 100644 --- a/trunk/arch/arm/mach-omap2/Makefile +++ b/trunk/arch/arm/mach-omap2/Makefile @@ -194,7 +194,6 @@ obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o -obj-$(CONFIG_SOC_AM33XX) += omap_hwmod_33xx_data.o obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o # EMU peripherals @@ -256,7 +255,7 @@ obj-$(CONFIG_MACH_OMAP_3630SDP) += board-zoom-display.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o -obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o +obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o diff --git a/trunk/arch/arm/mach-omap2/board-2430sdp.c b/trunk/arch/arm/mach-omap2/board-2430sdp.c index 0900eac57d56..9511584fdc4f 100644 --- a/trunk/arch/arm/mach-omap2/board-2430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-2430sdp.c @@ -33,6 +33,7 @@ #include #include +#include #include "common.h" #include #include @@ -211,6 +212,9 @@ static struct regulator_init_data sdp2430_vmmc1 = { }; static struct twl4030_gpio_platform_data sdp2430_gpio_data = { + .gpio_base = OMAP_MAX_GPIO_LINES, + .irq_base = TWL4030_GPIO_IRQ_BASE, + .irq_end = TWL4030_GPIO_IRQ_END, }; static struct twl4030_platform_data sdp2430_twldata = { @@ -231,7 +235,7 @@ static int __init omap2430_i2c_init(void) sdp2430_i2c1_boardinfo[0].irq = gpio_to_irq(78); omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo, ARRAY_SIZE(sdp2430_i2c1_boardinfo)); - omap_pmic_init(2, 100, "twl4030", 7 + OMAP_INTC_START, + omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ, &sdp2430_twldata); return 0; } diff --git a/trunk/arch/arm/mach-omap2/board-3430sdp.c b/trunk/arch/arm/mach-omap2/board-3430sdp.c index 5453173ff57b..a98c688058a9 100644 --- a/trunk/arch/arm/mach-omap2/board-3430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-3430sdp.c @@ -25,11 +25,13 @@ #include #include +#include #include #include #include #include +#include #include #include "common.h" #include @@ -189,6 +191,9 @@ static struct omap_dss_board_info sdp3430_dss_data = { .default_device = &sdp3430_lcd_device, }; +static struct omap_board_config_kernel sdp3430_config[] __initdata = { +}; + static struct omap2_hsmmc_info mmc[] = { { .mmc = 1, @@ -228,6 +233,9 @@ static int sdp3430_twl_gpio_setup(struct device *dev, } static struct twl4030_gpio_platform_data sdp3430_gpio_data = { + .gpio_base = OMAP_MAX_GPIO_LINES, + .irq_base = TWL4030_GPIO_IRQ_BASE, + .irq_end = TWL4030_GPIO_IRQ_END, .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13) | BIT(16) | BIT(17), .setup = sdp3430_twl_gpio_setup, @@ -568,6 +576,8 @@ static void __init omap_3430sdp_init(void) int gpio_pendown; omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); + omap_board_config = sdp3430_config; + omap_board_config_size = ARRAY_SIZE(sdp3430_config); omap_hsmmc_init(mmc); omap3430_i2c_init(); omap_display_init(&sdp3430_dss_data); diff --git a/trunk/arch/arm/mach-omap2/board-3630sdp.c b/trunk/arch/arm/mach-omap2/board-3630sdp.c index 8518b1345988..2dc9ba523c7a 100644 --- a/trunk/arch/arm/mach-omap2/board-3630sdp.c +++ b/trunk/arch/arm/mach-omap2/board-3630sdp.c @@ -17,6 +17,7 @@ #include #include "common.h" +#include #include #include @@ -66,6 +67,9 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = { .reset_gpio_port[2] = -EINVAL }; +static struct omap_board_config_kernel sdp_config[] __initdata = { +}; + #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -193,6 +197,8 @@ static struct flash_partitions sdp_flash_partitions[] = { static void __init omap_sdp_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); + omap_board_config = sdp_config; + omap_board_config_size = ARRAY_SIZE(sdp_config); zoom_peripherals_init(); omap_sdrc_init(h8mbx00u0mer0em_sdrc_params, h8mbx00u0mer0em_sdrc_params); diff --git a/trunk/arch/arm/mach-omap2/board-4430sdp.c b/trunk/arch/arm/mach-omap2/board-4430sdp.c index db43e22526c0..ad8a7d94afcd 100644 --- a/trunk/arch/arm/mach-omap2/board-4430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-4430sdp.c @@ -28,11 +28,13 @@ #include #include +#include #include #include #include #include +#include #include "common.h" #include #include @@ -43,7 +45,6 @@ #include #include -#include "soc.h" #include "mux.h" #include "hsmmc.h" #include "control.h" @@ -543,6 +544,7 @@ static struct twl6040_platform_data twl6040_data = { .codec = &twl6040_codec, .vibra = &twl6040_vibra, .audpwron_gpio = 127, + .irq_base = TWL6040_CODEC_IRQ_BASE, }; static struct twl4030_platform_data sdp4430_twldata = { @@ -579,7 +581,7 @@ static int __init omap4_i2c_init(void) TWL_COMMON_REGULATOR_V1V8 | TWL_COMMON_REGULATOR_V2V1); omap4_pmic_init("twl6030", &sdp4430_twldata, - &twl6040_data, 119 + OMAP44XX_IRQ_GIC_START); + &twl6040_data, OMAP44XX_IRQ_SYS_2N); omap_register_i2c_bus(2, 400, NULL, 0); omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); diff --git a/trunk/arch/arm/mach-omap2/board-am3517crane.c b/trunk/arch/arm/mach-omap2/board-am3517crane.c index 318feadb1d6e..92432c28673d 100644 --- a/trunk/arch/arm/mach-omap2/board-am3517crane.c +++ b/trunk/arch/arm/mach-omap2/board-am3517crane.c @@ -21,10 +21,12 @@ #include #include +#include #include #include #include +#include #include "common.h" #include @@ -35,6 +37,11 @@ #define GPIO_USB_POWER 35 #define GPIO_USB_NRESET 38 + +/* Board initialization */ +static struct omap_board_config_kernel am3517_crane_config[] __initdata = { +}; + #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -60,6 +67,9 @@ static void __init am3517_crane_init(void) omap_serial_init(); omap_sdrc_init(NULL, NULL); + omap_board_config = am3517_crane_config; + omap_board_config_size = ARRAY_SIZE(am3517_crane_config); + /* Configure GPIO for EHCI port */ if (omap_mux_init_gpio(GPIO_USB_NRESET, OMAP_PIN_OUTPUT)) { pr_err("Can not configure mux for GPIO_USB_NRESET %d\n", diff --git a/trunk/arch/arm/mach-omap2/board-am3517evm.c b/trunk/arch/arm/mach-omap2/board-am3517evm.c index 403d048a00ee..18f601096ce1 100644 --- a/trunk/arch/arm/mach-omap2/board-am3517evm.c +++ b/trunk/arch/arm/mach-omap2/board-am3517evm.c @@ -25,13 +25,14 @@ #include #include #include -#include +#include #include #include #include #include +#include #include "common.h" #include #include