From bc8e3e3832f56c59b6a0de10d2cdd6e7ce113368 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Tue, 24 Jul 2007 16:38:04 +0900 Subject: [PATCH] --- yaml --- r: 62842 b: refs/heads/master c: 18d0e9b4799ff6e43613a068eba289ba4e002535 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/mips/arc/console.c | 31 ------------------------------- 2 files changed, 1 insertion(+), 32 deletions(-) delete mode 100644 trunk/arch/mips/arc/console.c diff --git a/[refs] b/[refs] index 4189f69555c4..e2dae4904cd6 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: cbe7b45c1d0fbf51eea19452ffb56aa3002fe90c +refs/heads/master: 18d0e9b4799ff6e43613a068eba289ba4e002535 diff --git a/trunk/arch/mips/arc/console.c b/trunk/arch/mips/arc/console.c deleted file mode 100644 index 0fe6032999cb..000000000000 --- a/trunk/arch/mips/arc/console.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1996 David S. Miller (dm@sgi.com) - * Compability with board caches, Ulf Carlsson - */ -#include -#include -#include - -/* - * IP22 boardcache is not compatible with board caches. Thus we disable it - * during romvec action. Since r4xx0.c is always compiled and linked with your - * kernel, this shouldn't cause any harm regardless what MIPS processor you - * have. - * - * The ARC write and read functions seem to interfere with the serial lines - * in some way. You should be careful with them. - */ - -void prom_putchar(char c) -{ - ULONG cnt; - CHAR it = c; - - bc_disable(); - ArcWrite(1, &it, 1, &cnt); - bc_enable(); -}