From bdb87d98497a7657a744c32ef73f9676fa4e1a93 Mon Sep 17 00:00:00 2001
From: Paul Mundt <lethal@linux-sh.org>
Date: Tue, 11 Jan 2011 15:02:59 +0900
Subject: [PATCH] --- yaml --- r: 230525 b: refs/heads/master c:
 efb3e34b6176d30c4fe8635fa8e1beb6280cc2cd h: refs/heads/master i:   230523:
 407a5929005da9f24d5c57c44b2876e3a68ac369 v: v3

---
 [refs]                                 |  2 +-
 trunk/arch/sh/include/asm/io.h         | 10 +++++++++-
 trunk/arch/sh/include/asm/pgtable_32.h |  7 ++++++-
 3 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index 874984fe76aa..942ee5c186e2 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 11e1ed6e88616be5489a43bc6297d9bb8464908b
+refs/heads/master: efb3e34b6176d30c4fe8635fa8e1beb6280cc2cd
diff --git a/trunk/arch/sh/include/asm/io.h b/trunk/arch/sh/include/asm/io.h
index 70c1186b5088..28c5aa58bb45 100644
--- a/trunk/arch/sh/include/asm/io.h
+++ b/trunk/arch/sh/include/asm/io.h
@@ -290,7 +290,15 @@ __ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
 	 * mapping must be done by the PMB or by using page tables.
 	 */
 	if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
-		if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE))
+		u64 flags = pgprot_val(prot);
+
+		/*
+		 * Anything using the legacy PTEA space attributes needs
+		 * to be kicked down to page table mappings.
+		 */
+		if (unlikely(flags & _PAGE_PCC_MASK))
+			return NULL;
+		if (unlikely(flags & _PAGE_CACHABLE))
 			return (void __iomem *)P1SEGADDR(offset);
 
 		return (void __iomem *)P2SEGADDR(offset);
diff --git a/trunk/arch/sh/include/asm/pgtable_32.h b/trunk/arch/sh/include/asm/pgtable_32.h
index 3cbedd21fd83..b799fe71114c 100644
--- a/trunk/arch/sh/include/asm/pgtable_32.h
+++ b/trunk/arch/sh/include/asm/pgtable_32.h
@@ -76,6 +76,10 @@
 /* Wrapper for extended mode pgprot twiddling */
 #define _PAGE_EXT(x)		((unsigned long long)(x) << 32)
 
+#ifdef CONFIG_X2TLB
+#define _PAGE_PCC_MASK	0x00000000	/* No legacy PTEA support */
+#else
+
 /* software: moves to PTEA.TC (Timing Control) */
 #define _PAGE_PCC_AREA5	0x00000000	/* use BSC registers for area5 */
 #define _PAGE_PCC_AREA6	0x80000000	/* use BSC registers for area6 */
@@ -89,7 +93,8 @@
 #define _PAGE_PCC_ATR8	0x60000000	/* Attribute Memory space, 8 bit bus */
 #define _PAGE_PCC_ATR16	0x60000001	/* Attribute Memory space, 6 bit bus */
 
-#ifndef CONFIG_X2TLB
+#define _PAGE_PCC_MASK	0xe0000001
+
 /* copy the ptea attributes */
 static inline unsigned long copy_ptea_attributes(unsigned long x)
 {