From bf84fd1384a487a7b1417efd1aaacd14175afb00 Mon Sep 17 00:00:00 2001 From: Takashi Iwai Date: Thu, 21 Jun 2012 15:30:41 +0200 Subject: [PATCH] --- yaml --- r: 311443 b: refs/heads/master c: 6db65cbb941f9d433659bdad02b307f6d94465df h: refs/heads/master i: 311441: 8355a13e59bbc257082bbdf52ca0f86a59c97c89 311439: f68df6d1607c9387b90900407419c7c1d4ca5f54 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/i915_suspend.c | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 4f45fe240404..166b414a3d9b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 58bf8062d0b293b8e1028e5b0342082002886bd4 +refs/heads/master: 6db65cbb941f9d433659bdad02b307f6d94465df diff --git a/trunk/drivers/gpu/drm/i915/i915_suspend.c b/trunk/drivers/gpu/drm/i915/i915_suspend.c index 0ede02a99d91..a748e5cabe14 100644 --- a/trunk/drivers/gpu/drm/i915/i915_suspend.c +++ b/trunk/drivers/gpu/drm/i915/i915_suspend.c @@ -740,8 +740,11 @@ static void i915_restore_display(struct drm_device *dev) if (HAS_PCH_SPLIT(dev)) { I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL); I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2); - I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL); + /* NOTE: BLC_PWM_CPU_CTL must be written after BLC_PWM_CPU_CTL2; + * otherwise we get blank eDP screen after S3 on some machines + */ I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2); + I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL); I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR);