diff --git a/[refs] b/[refs] index 90d571587edc..5d933d2e716b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a2218cac0aacecbecebd3cabc43cc8a4a09cecbb +refs/heads/master: ca5da7106214e03f5302ca630bd38a9145b27391 diff --git a/trunk/arch/arm/mach-ixp4xx/ixdp425-setup.c b/trunk/arch/arm/mach-ixp4xx/ixdp425-setup.c index 0a41080d2266..39b06ed80646 100644 --- a/trunk/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/trunk/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -123,7 +123,7 @@ static void __init ixdp425_init(void) platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices)); } -#ifdef CONFIG_ARCH_IXDP425 +#ifdef CONFIG_ARCH_IXDP465 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") /* Maintainer: MontaVista Software, Inc. */ .phys_ram = PHYS_OFFSET, diff --git a/trunk/arch/arm/mach-versatile/core.c b/trunk/arch/arm/mach-versatile/core.c index 58c1330d8638..3c8862fde51a 100644 --- a/trunk/arch/arm/mach-versatile/core.c +++ b/trunk/arch/arm/mach-versatile/core.c @@ -52,9 +52,8 @@ * * Setup a VA for the Versatile Vectored Interrupt Controller. */ -#define __io_address(n) __io(IO_ADDRESS(n)) -#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) -#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) +#define VA_VIC_BASE IO_ADDRESS(VERSATILE_VIC_BASE) +#define VA_SIC_BASE IO_ADDRESS(VERSATILE_SIC_BASE) static void vic_mask_irq(unsigned int irq) { @@ -215,7 +214,7 @@ void __init versatile_map_io(void) iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc)); } -#define VERSATILE_REFCOUNTER (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_24MHz_OFFSET) +#define VERSATILE_REFCOUNTER (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_24MHz_OFFSET) /* * This is the Versatile sched_clock implementation. This has @@ -232,7 +231,7 @@ unsigned long long sched_clock(void) } -#define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET) +#define VERSATILE_FLASHCTRL (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET) static int versatile_flash_init(void) { @@ -310,7 +309,7 @@ static struct platform_device smc91x_device = { .resource = smc91x_resources, }; -#define VERSATILE_SYSMCI (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET) +#define VERSATILE_SYSMCI (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET) unsigned int mmc_status(struct device *dev) { @@ -344,11 +343,11 @@ static const struct icst307_params versatile_oscvco_params = { static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco) { - void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET; + unsigned long sys_lock = IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET; #if defined(CONFIG_ARCH_VERSATILE_PB) - void __iomem *sys_osc = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSC4_OFFSET; + unsigned long sys_osc = IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSC4_OFFSET; #elif defined(CONFIG_MACH_VERSATILE_AB) - void __iomem *sys_osc = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSC1_OFFSET; + unsigned long sys_osc = IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSC1_OFFSET; #endif u32 val; @@ -484,7 +483,7 @@ static struct clcd_panel epson_2_2_in = { */ static struct clcd_panel *versatile_clcd_panel(void) { - void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; + unsigned long sys_clcd = IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; struct clcd_panel *panel = &vga; u32 val; @@ -511,7 +510,7 @@ static struct clcd_panel *versatile_clcd_panel(void) */ static void versatile_clcd_disable(struct clcd_fb *fb) { - void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; + unsigned long sys_clcd = IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; u32 val; val = readl(sys_clcd); @@ -523,7 +522,7 @@ static void versatile_clcd_disable(struct clcd_fb *fb) * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off */ if (fb->panel == &sanyo_2_5_in) { - void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); + unsigned long versatile_ib2_ctrl = IO_ADDRESS(VERSATILE_IB2_CTRL); unsigned long ctrl; ctrl = readl(versatile_ib2_ctrl); @@ -538,7 +537,7 @@ static void versatile_clcd_disable(struct clcd_fb *fb) */ static void versatile_clcd_enable(struct clcd_fb *fb) { - void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; + unsigned long sys_clcd = IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; u32 val; val = readl(sys_clcd); @@ -572,7 +571,7 @@ static void versatile_clcd_enable(struct clcd_fb *fb) * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on */ if (fb->panel == &sanyo_2_5_in) { - void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); + unsigned long versatile_ib2_ctrl = IO_ADDRESS(VERSATILE_IB2_CTRL); unsigned long ctrl; ctrl = readl(versatile_ib2_ctrl); @@ -721,7 +720,7 @@ static struct amba_device *amba_devs[] __initdata = { }; #ifdef CONFIG_LEDS -#define VA_LEDS_BASE (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LED_OFFSET) +#define VA_LEDS_BASE (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_LED_OFFSET) static void versatile_leds_event(led_event_t ledevt) { @@ -779,11 +778,11 @@ void __init versatile_init(void) /* * Where is the timer (VA)? */ -#define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE) -#define TIMER1_VA_BASE (__io_address(VERSATILE_TIMER0_1_BASE) + 0x20) -#define TIMER2_VA_BASE __io_address(VERSATILE_TIMER2_3_BASE) -#define TIMER3_VA_BASE (__io_address(VERSATILE_TIMER2_3_BASE) + 0x20) -#define VA_IC_BASE __io_address(VERSATILE_VIC_BASE) +#define TIMER0_VA_BASE IO_ADDRESS(VERSATILE_TIMER0_1_BASE) +#define TIMER1_VA_BASE (IO_ADDRESS(VERSATILE_TIMER0_1_BASE) + 0x20) +#define TIMER2_VA_BASE IO_ADDRESS(VERSATILE_TIMER2_3_BASE) +#define TIMER3_VA_BASE (IO_ADDRESS(VERSATILE_TIMER2_3_BASE) + 0x20) +#define VA_IC_BASE IO_ADDRESS(VERSATILE_VIC_BASE) /* * How long is the timer interval? @@ -878,12 +877,12 @@ static void __init versatile_timer_init(void) * VERSATILE_REFCLK is 32KHz * VERSATILE_TIMCLK is 1MHz */ - val = readl(__io_address(VERSATILE_SCTL_BASE)); + val = readl(IO_ADDRESS(VERSATILE_SCTL_BASE)); writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val, - __io_address(VERSATILE_SCTL_BASE)); + IO_ADDRESS(VERSATILE_SCTL_BASE)); /* * Initialise to a known state (all timers off) diff --git a/trunk/arch/i386/kernel/cpu/amd.c b/trunk/arch/i386/kernel/cpu/amd.c index 4c1ddf2b57cc..73aeaf5a9d4e 100644 --- a/trunk/arch/i386/kernel/cpu/amd.c +++ b/trunk/arch/i386/kernel/cpu/amd.c @@ -28,22 +28,6 @@ static void __init init_amd(struct cpuinfo_x86 *c) int mbytes = num_physpages >> (20-PAGE_SHIFT); int r; -#ifdef CONFIG_SMP - unsigned long value; - - /* Disable TLB flush filter by setting HWCR.FFDIS on K8 - * bit 6 of msr C001_0015 - * - * Errata 63 for SH-B3 steppings - * Errata 122 for all steppings (F+ have it disabled by default) - */ - if (c->x86 == 15) { - rdmsrl(MSR_K7_HWCR, value); - value |= 1 << 6; - wrmsrl(MSR_K7_HWCR, value); - } -#endif - /* * FIXME: We should handle the K5 here. Set up the write * range and also turn on MSR 83 bits 4 and 31 (write alloc, diff --git a/trunk/arch/ppc/boot/ld.script b/trunk/arch/ppc/boot/ld.script index d4dd8f15395e..9362193742ac 100644 --- a/trunk/arch/ppc/boot/ld.script +++ b/trunk/arch/ppc/boot/ld.script @@ -1,4 +1,4 @@ -OUTPUT_ARCH(powerpc:common) +OUTPUT_ARCH(powerpc) SECTIONS { /* Read-only sections, merged into text segment: */ diff --git a/trunk/arch/ppc/syslib/mv64x60.c b/trunk/arch/ppc/syslib/mv64x60.c index 4849850a59ed..839f8872826f 100644 --- a/trunk/arch/ppc/syslib/mv64x60.c +++ b/trunk/arch/ppc/syslib/mv64x60.c @@ -34,7 +34,7 @@ u8 mv64x60_pci_exclude_bridge = 1; DEFINE_SPINLOCK(mv64x60_lock); static phys_addr_t mv64x60_bridge_pbase; -static void __iomem *mv64x60_bridge_vbase; +static void *mv64x60_bridge_vbase; static u32 mv64x60_bridge_type = MV64x60_TYPE_INVALID; static u32 mv64x60_bridge_rev; #if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260) @@ -938,7 +938,7 @@ mv64x60_setup_for_chip(struct mv64x60_handle *bh) * * Return the virtual address of the bridge's registers. */ -void __iomem * +void * mv64x60_get_bridge_vbase(void) { return mv64x60_bridge_vbase; diff --git a/trunk/arch/s390/kernel/compat_signal.c b/trunk/arch/s390/kernel/compat_signal.c index 4ff6808456ea..7358cdb8441f 100644 --- a/trunk/arch/s390/kernel/compat_signal.c +++ b/trunk/arch/s390/kernel/compat_signal.c @@ -143,7 +143,7 @@ int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from) break; case __SI_FAULT >> 16: err |= __get_user(tmp, &from->si_addr); - to->si_addr = (void __user *)(u64) (tmp & PSW32_ADDR_INSN); + to->si_addr = (void *)(u64) (tmp & PSW32_ADDR_INSN); break; case __SI_POLL >> 16: err |= __get_user(to->si_band, &from->si_band); @@ -338,7 +338,7 @@ sys32_sigaltstack(const stack_t32 __user *uss, stack_t32 __user *uoss, err |= __get_user(kss.ss_flags, &uss->ss_flags); if (err) return -EFAULT; - kss.ss_sp = (void __user *) ss_sp; + kss.ss_sp = (void *) ss_sp; } set_fs (KERNEL_DS); @@ -461,7 +461,7 @@ asmlinkage long sys32_rt_sigreturn(struct pt_regs *regs) goto badframe; err = __get_user(ss_sp, &frame->uc.uc_stack.ss_sp); - st.ss_sp = compat_ptr(ss_sp); + st.ss_sp = (void *) A((unsigned long)ss_sp); err |= __get_user(st.ss_size, &frame->uc.uc_stack.ss_size); err |= __get_user(st.ss_flags, &frame->uc.uc_stack.ss_flags); if (err) diff --git a/trunk/arch/s390/kernel/signal.c b/trunk/arch/s390/kernel/signal.c index 6e0110d71191..6a3f5b7473a9 100644 --- a/trunk/arch/s390/kernel/signal.c +++ b/trunk/arch/s390/kernel/signal.c @@ -376,8 +376,8 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, /* Create the ucontext. */ err |= __put_user(0, &frame->uc.uc_flags); - err |= __put_user(NULL, &frame->uc.uc_link); - err |= __put_user((void __user *)current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); + err |= __put_user(0, &frame->uc.uc_link); + err |= __put_user((void *)current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); err |= __put_user(sas_ss_flags(regs->gprs[15]), &frame->uc.uc_stack.ss_flags); err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); diff --git a/trunk/arch/sparc64/kernel/cpu.c b/trunk/arch/sparc64/kernel/cpu.c index 77ef5df4e5a7..48756958116b 100644 --- a/trunk/arch/sparc64/kernel/cpu.c +++ b/trunk/arch/sparc64/kernel/cpu.c @@ -39,8 +39,6 @@ struct cpu_fp_info linux_sparc_fpu[] = { { 0x3e, 0x15, 0, "UltraSparc III+ integrated FPU"}, { 0x3e, 0x16, 0, "UltraSparc IIIi integrated FPU"}, { 0x3e, 0x18, 0, "UltraSparc IV integrated FPU"}, - { 0x3e, 0x19, 0, "UltraSparc IV+ integrated FPU"}, - { 0x3e, 0x22, 0, "UltraSparc IIIi+ integrated FPU"}, }; #define NSPARCFPU (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info)) @@ -55,8 +53,6 @@ struct cpu_iu_info linux_sparc_chips[] = { { 0x3e, 0x15, "TI UltraSparc III+ (Cheetah+)"}, { 0x3e, 0x16, "TI UltraSparc IIIi (Jalapeno)"}, { 0x3e, 0x18, "TI UltraSparc IV (Jaguar)"}, - { 0x3e, 0x19, "TI UltraSparc IV+ (Panther)"}, - { 0x3e, 0x22, "TI UltraSparc IIIi+ (Serrano)"}, }; #define NSPARCCHIPS (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info)) diff --git a/trunk/arch/sparc64/kernel/unaligned.c b/trunk/arch/sparc64/kernel/unaligned.c index 02af08ffec8f..42718f6a7d36 100644 --- a/trunk/arch/sparc64/kernel/unaligned.c +++ b/trunk/arch/sparc64/kernel/unaligned.c @@ -294,7 +294,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u kernel_mna_trap_fault(); } else { - unsigned long addr, *reg_addr; + unsigned long addr; int orig_asi, asi; addr = compute_effective_address(regs, insn, @@ -319,11 +319,11 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u }; switch (dir) { case load: - reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs); - do_int_load(reg_addr, size, (unsigned long *) addr, + do_int_load(fetch_reg_addr(((insn>>25)&0x1f), regs), + size, (unsigned long *) addr, decode_signedness(insn), asi); if (unlikely(asi != orig_asi)) { - unsigned long val_in = *reg_addr; + unsigned long val_in = *(unsigned long *) addr; switch (size) { case 2: val_in = swab16(val_in); @@ -339,7 +339,7 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u BUG(); break; }; - *reg_addr = val_in; + *(unsigned long *) addr = val_in; } break; diff --git a/trunk/arch/sparc64/kernel/us3_cpufreq.c b/trunk/arch/sparc64/kernel/us3_cpufreq.c index 0340041f6143..9080e7cd4bb0 100644 --- a/trunk/arch/sparc64/kernel/us3_cpufreq.c +++ b/trunk/arch/sparc64/kernel/us3_cpufreq.c @@ -208,10 +208,7 @@ static int __init us3_freq_init(void) impl = ((ver >> 32) & 0xffff); if (manuf == CHEETAH_MANUF && - (impl == CHEETAH_IMPL || - impl == CHEETAH_PLUS_IMPL || - impl == JAGUAR_IMPL || - impl == PANTHER_IMPL)) { + (impl == CHEETAH_IMPL || impl == CHEETAH_PLUS_IMPL)) { struct cpufreq_driver *driver; ret = -ENOMEM; diff --git a/trunk/arch/um/Makefile b/trunk/arch/um/Makefile index 7af37e342e33..5b5af95721ab 100644 --- a/trunk/arch/um/Makefile +++ b/trunk/arch/um/Makefile @@ -28,6 +28,8 @@ SYMLINK_HEADERS := $(foreach header,$(SYMLINK_HEADERS),include/asm-um/$(header)) ARCH_SYMLINKS = include/asm-um/arch $(ARCH_DIR)/include/sysdep $(ARCH_DIR)/os \ $(SYMLINK_HEADERS) $(ARCH_DIR)/include/uml-config.h +GEN_HEADERS += $(ARCH_DIR)/include/task.h $(ARCH_DIR)/include/kern_constants.h + um-modes-$(CONFIG_MODE_TT) += tt um-modes-$(CONFIG_MODE_SKAS) += skas @@ -43,7 +45,9 @@ endif ARCH_INCLUDE := -I$(ARCH_DIR)/include ifneq ($(KBUILD_SRC),) +ARCH_INCLUDE += -I$(ARCH_DIR)/include2 ARCH_INCLUDE += -I$(srctree)/$(ARCH_DIR)/include +MRPROPER_DIRS += $(ARCH_DIR)/include2 endif SYS_DIR := $(ARCH_DIR)/include/sysdep-$(SUBARCH) @@ -83,6 +87,10 @@ CONFIG_KERNEL_HALF_GIGS ?= 0 SIZE = (($(CONFIG_NEST_LEVEL) + $(CONFIG_KERNEL_HALF_GIGS)) * 0x20000000) +ifeq ($(CONFIG_MODE_SKAS), y) +$(SYS_HEADERS) : $(ARCH_DIR)/include/skas_ptregs.h +endif + .PHONY: linux all: linux @@ -103,8 +111,7 @@ else $(shell cd $(ARCH_DIR) && ln -sf Kconfig.$(SUBARCH) Kconfig.arch) endif -archprepare: $(ARCH_SYMLINKS) $(ARCH_DIR)/include/user_constants.h -prepare: $(ARCH_DIR)/include/kern_constants.h +archprepare: $(ARCH_SYMLINKS) $(SYS_HEADERS) $(GEN_HEADERS) LINK-$(CONFIG_LD_SCRIPT_STATIC) += -static LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib @@ -139,13 +146,15 @@ endef #When cleaning we don't include .config, so we don't include #TT or skas makefiles and don't clean skas_ptregs.h. CLEAN_FILES += linux x.i gmon.out $(ARCH_DIR)/include/uml-config.h \ - $(ARCH_DIR)/include/user_constants.h \ - $(ARCH_DIR)/include/kern_constants.h $(ARCH_DIR)/Kconfig.arch + $(GEN_HEADERS) $(ARCH_DIR)/include/skas_ptregs.h \ + $(ARCH_DIR)/include/user_constants.h $(ARCH_DIR)/Kconfig.arch MRPROPER_FILES += $(SYMLINK_HEADERS) $(ARCH_SYMLINKS) \ $(addprefix $(ARCH_DIR)/kernel/,$(KERN_SYMLINKS)) $(ARCH_DIR)/os archclean: + $(Q)$(MAKE) $(clean)=$(ARCH_DIR)/util + $(Q)$(MAKE) $(clean)=$(ARCH_DIR)/os-$(OS)/util @find . \( -name '*.bb' -o -name '*.bbg' -o -name '*.da' \ -o -name '*.gcov' \) -type f -print | xargs rm -f @@ -171,7 +180,9 @@ $(ARCH_DIR)/include/sysdep: @echo ' SYMLINK $@' ifneq ($(KBUILD_SRC),) $(Q)mkdir -p $(ARCH_DIR)/include - $(Q)ln -fsn $(srctree)/$(ARCH_DIR)/include/sysdep-$(SUBARCH) $(ARCH_DIR)/include/sysdep + $(Q)mkdir -p $(ARCH_DIR)/include2 + $(Q)ln -fsn sysdep-$(SUBARCH) $(ARCH_DIR)/include/sysdep + $(Q)ln -fsn $(srctree)/$(ARCH_DIR)/include/sysdep-$(SUBARCH) $(ARCH_DIR)/include2/sysdep else $(Q)cd $(ARCH_DIR)/include && ln -sf sysdep-$(SUBARCH) sysdep endif @@ -191,6 +202,8 @@ endef define filechk_gen-asm-offsets (set -e; \ + echo "#ifndef __ASM_OFFSETS_H__"; \ + echo "#define __ASM_OFFSETS_H__"; \ echo "/*"; \ echo " * DO NOT MODIFY."; \ echo " *"; \ @@ -199,7 +212,8 @@ define filechk_gen-asm-offsets echo " */"; \ echo ""; \ sed -ne "/^->/{s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; s:->::; p;}"; \ - echo ""; ) + echo ""; \ + echo "#endif" ) endef $(ARCH_DIR)/include/uml-config.h : include/linux/autoconf.h @@ -208,18 +222,50 @@ $(ARCH_DIR)/include/uml-config.h : include/linux/autoconf.h $(ARCH_DIR)/user-offsets.s: $(ARCH_DIR)/sys-$(SUBARCH)/user-offsets.c $(CC) $(USER_CFLAGS) -S -o $@ $< -$(ARCH_DIR)/include/user_constants.h: $(ARCH_DIR)/user-offsets.s +$(ARCH_DIR)/user-offsets.h: $(ARCH_DIR)/user-offsets.s $(call filechk,gen-asm-offsets) -CLEAN_FILES += $(ARCH_DIR)/user-offsets.s +CLEAN_FILES += $(ARCH_DIR)/user-offsets.s $(ARCH_DIR)/user-offsets.h $(ARCH_DIR)/kernel-offsets.s: $(ARCH_DIR)/sys-$(SUBARCH)/kernel-offsets.c \ - archprepare + $(ARCH_SYMLINKS) \ + $(SYS_DIR)/sc.h \ + include/asm include/linux/version.h \ + include/config/MARKER \ + $(ARCH_DIR)/include/user_constants.h $(CC) $(CFLAGS) $(NOSTDINC_FLAGS) $(CPPFLAGS) -S -o $@ $< -$(ARCH_DIR)/include/kern_constants.h: $(ARCH_DIR)/kernel-offsets.s +$(ARCH_DIR)/kernel-offsets.h: $(ARCH_DIR)/kernel-offsets.s $(call filechk,gen-asm-offsets) -CLEAN_FILES += $(ARCH_DIR)/kernel-offsets.s +CLEAN_FILES += $(ARCH_DIR)/kernel-offsets.s $(ARCH_DIR)/kernel-offsets.h + +$(ARCH_DIR)/include/task.h: $(ARCH_DIR)/util/mk_task + $(call filechk,gen_header) + +$(ARCH_DIR)/include/user_constants.h: $(ARCH_DIR)/os-$(OS)/util/mk_user_constants + $(call filechk,gen_header) + +$(ARCH_DIR)/include/kern_constants.h: $(ARCH_DIR)/util/mk_constants + $(call filechk,gen_header) + +$(ARCH_DIR)/include/skas_ptregs.h: $(ARCH_DIR)/kernel/skas/util/mk_ptregs + $(call filechk,gen_header) + +$(ARCH_DIR)/os-$(OS)/util/mk_user_constants: $(ARCH_DIR)/os-$(OS)/util FORCE ; + +$(ARCH_DIR)/util/mk_task $(ARCH_DIR)/util/mk_constants: $(ARCH_DIR)/include/user_constants.h $(ARCH_DIR)/util \ + FORCE ; + +$(ARCH_DIR)/kernel/skas/util/mk_ptregs: $(ARCH_DIR)/kernel/skas/util FORCE ; + +$(ARCH_DIR)/util: scripts_basic $(SYS_DIR)/sc.h $(ARCH_DIR)/kernel-offsets.h FORCE + $(Q)$(MAKE) $(build)=$@ + +$(ARCH_DIR)/kernel/skas/util: scripts_basic $(ARCH_DIR)/user-offsets.h FORCE + $(Q)$(MAKE) $(build)=$@ + +$(ARCH_DIR)/os-$(OS)/util: scripts_basic $(ARCH_DIR)/user-offsets.h FORCE + $(Q)$(MAKE) $(build)=$@ export SUBARCH USER_CFLAGS OS diff --git a/trunk/arch/um/Makefile-i386 b/trunk/arch/um/Makefile-i386 index 2ee8a2858117..1ab431a53ac3 100644 --- a/trunk/arch/um/Makefile-i386 +++ b/trunk/arch/um/Makefile-i386 @@ -32,3 +32,25 @@ CFLAGS += -U__$(SUBARCH)__ -U$(SUBARCH) ifneq ($(CONFIG_GPROF),y) ARCH_CFLAGS += -DUM_FASTCALL endif + +SYS_UTIL_DIR := $(ARCH_DIR)/sys-i386/util +SYS_HEADERS := $(SYS_DIR)/sc.h $(SYS_DIR)/thread.h + +prepare: $(SYS_HEADERS) + +$(SYS_DIR)/sc.h: $(SYS_UTIL_DIR)/mk_sc + $(call filechk,gen_header) + +$(SYS_DIR)/thread.h: $(SYS_UTIL_DIR)/mk_thread + $(call filechk,gen_header) + +$(SYS_UTIL_DIR)/mk_sc: scripts_basic $(ARCH_DIR)/user-offsets.h FORCE + $(Q)$(MAKE) $(build)=$(SYS_UTIL_DIR) $@ + +$(SYS_UTIL_DIR)/mk_thread: scripts_basic $(ARCH_DIR)/kernel-offsets.h FORCE + $(Q)$(MAKE) $(build)=$(SYS_UTIL_DIR) $@ + +$(SYS_UTIL_DIR): scripts_basic include/asm FORCE + $(Q)$(MAKE) $(build)=$(SYS_UTIL_DIR) + +CLEAN_FILES += $(SYS_HEADERS) diff --git a/trunk/arch/um/Makefile-skas b/trunk/arch/um/Makefile-skas index ac35de5316a6..fd18ec572271 100644 --- a/trunk/arch/um/Makefile-skas +++ b/trunk/arch/um/Makefile-skas @@ -10,3 +10,5 @@ CFLAGS-$(CONFIG_GCOV) += $(GCOV_OPT) CFLAGS-$(CONFIG_GPROF) += $(GPROF_OPT) LINK-$(CONFIG_GCOV) += $(GCOV_OPT) LINK-$(CONFIG_GPROF) += $(GPROF_OPT) + +GEN_HEADERS += $(ARCH_DIR)/include/skas_ptregs.h diff --git a/trunk/arch/um/Makefile-x86_64 b/trunk/arch/um/Makefile-x86_64 index 4f118d5cc2ee..436abbba409b 100644 --- a/trunk/arch/um/Makefile-x86_64 +++ b/trunk/arch/um/Makefile-x86_64 @@ -12,3 +12,24 @@ CHECKFLAGS += -m64 ELF_ARCH := i386:x86-64 ELF_FORMAT := elf64-x86-64 + +SYS_UTIL_DIR := $(ARCH_DIR)/sys-x86_64/util +SYS_DIR := $(ARCH_DIR)/include/sysdep-x86_64 + +SYS_HEADERS = $(SYS_DIR)/sc.h $(SYS_DIR)/thread.h + +prepare: $(SYS_HEADERS) + +$(SYS_DIR)/sc.h: $(SYS_UTIL_DIR)/mk_sc + $(call filechk,gen_header) + +$(SYS_DIR)/thread.h: $(SYS_UTIL_DIR)/mk_thread + $(call filechk,gen_header) + +$(SYS_UTIL_DIR)/mk_sc: scripts_basic $(ARCH_DIR)/user-offsets.h FORCE + $(Q)$(MAKE) $(build)=$(SYS_UTIL_DIR) $@ + +$(SYS_UTIL_DIR)/mk_thread: scripts_basic $(GEN_HEADERS) $(ARCH_DIR)/kernel-offsets.h FORCE + $(Q)$(MAKE) $(build)=$(SYS_UTIL_DIR) $@ + +CLEAN_FILES += $(SYS_HEADERS) diff --git a/trunk/arch/um/include/common-offsets.h b/trunk/arch/um/include/common-offsets.h index 356390d1f8b9..782ac3a3baf9 100644 --- a/trunk/arch/um/include/common-offsets.h +++ b/trunk/arch/um/include/common-offsets.h @@ -1,7 +1,7 @@ /* for use by sys-$SUBARCH/kernel-offsets.c */ -OFFSET(HOST_TASK_REGS, task_struct, thread.regs); -OFFSET(HOST_TASK_PID, task_struct, pid); +OFFSET(TASK_REGS, task_struct, thread.regs); +OFFSET(TASK_PID, task_struct, pid); DEFINE(UM_KERN_PAGE_SIZE, PAGE_SIZE); DEFINE(UM_NSEC_PER_SEC, NSEC_PER_SEC); DEFINE_STR(UM_KERN_EMERG, KERN_EMERG); diff --git a/trunk/arch/um/include/skas_ptregs.h b/trunk/arch/um/include/skas_ptregs.h deleted file mode 100644 index 73db19e9c077..000000000000 --- a/trunk/arch/um/include/skas_ptregs.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __SKAS_PT_REGS_ -#define __SKAS_PT_REGS_ - -#include - -#endif diff --git a/trunk/arch/um/include/sysdep-i386/sc.h b/trunk/arch/um/include/sysdep-i386/sc.h deleted file mode 100644 index c57d1780ad37..000000000000 --- a/trunk/arch/um/include/sysdep-i386/sc.h +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef __SYSDEP_I386_SC_H -#define __SYSDEP_I386_SC_H - -#include - -#define SC_OFFSET(sc, field) \ - *((unsigned long *) &(((char *) (sc))[HOST_##field])) -#define SC_FP_OFFSET(sc, field) \ - *((unsigned long *) &(((char *) (SC_FPSTATE(sc)))[HOST_##field])) -#define SC_FP_OFFSET_PTR(sc, field, type) \ - ((type *) &(((char *) (SC_FPSTATE(sc)))[HOST_##field])) - -#define SC_IP(sc) SC_OFFSET(sc, SC_IP) -#define SC_SP(sc) SC_OFFSET(sc, SC_SP) -#define SC_FS(sc) SC_OFFSET(sc, SC_FS) -#define SC_GS(sc) SC_OFFSET(sc, SC_GS) -#define SC_DS(sc) SC_OFFSET(sc, SC_DS) -#define SC_ES(sc) SC_OFFSET(sc, SC_ES) -#define SC_SS(sc) SC_OFFSET(sc, SC_SS) -#define SC_CS(sc) SC_OFFSET(sc, SC_CS) -#define SC_EFLAGS(sc) SC_OFFSET(sc, SC_EFLAGS) -#define SC_EAX(sc) SC_OFFSET(sc, SC_EAX) -#define SC_EBX(sc) SC_OFFSET(sc, SC_EBX) -#define SC_ECX(sc) SC_OFFSET(sc, SC_ECX) -#define SC_EDX(sc) SC_OFFSET(sc, SC_EDX) -#define SC_EDI(sc) SC_OFFSET(sc, SC_EDI) -#define SC_ESI(sc) SC_OFFSET(sc, SC_ESI) -#define SC_EBP(sc) SC_OFFSET(sc, SC_EBP) -#define SC_TRAPNO(sc) SC_OFFSET(sc, SC_TRAPNO) -#define SC_ERR(sc) SC_OFFSET(sc, SC_ERR) -#define SC_CR2(sc) SC_OFFSET(sc, SC_CR2) -#define SC_FPSTATE(sc) SC_OFFSET(sc, SC_FPSTATE) -#define SC_SIGMASK(sc) SC_OFFSET(sc, SC_SIGMASK) -#define SC_FP_CW(sc) SC_FP_OFFSET(sc, SC_FP_CW) -#define SC_FP_SW(sc) SC_FP_OFFSET(sc, SC_FP_SW) -#define SC_FP_TAG(sc) SC_FP_OFFSET(sc, SC_FP_TAG) -#define SC_FP_IPOFF(sc) SC_FP_OFFSET(sc, SC_FP_IPOFF) -#define SC_FP_CSSEL(sc) SC_FP_OFFSET(sc, SC_FP_CSSEL) -#define SC_FP_DATAOFF(sc) SC_FP_OFFSET(sc, SC_FP_DATAOFF) -#define SC_FP_DATASEL(sc) SC_FP_OFFSET(sc, SC_FP_DATASEL) -#define SC_FP_ST(sc) SC_FP_OFFSET_PTR(sc, SC_FP_ST, struct _fpstate) -#define SC_FXSR_ENV(sc) SC_FP_OFFSET_PTR(sc, SC_FXSR_ENV, void) - -#endif diff --git a/trunk/arch/um/include/sysdep-i386/thread.h b/trunk/arch/um/include/sysdep-i386/thread.h deleted file mode 100644 index e2bd6bae8b8a..000000000000 --- a/trunk/arch/um/include/sysdep-i386/thread.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __UM_THREAD_H -#define __UM_THREAD_H - -#include - -#define TASK_DEBUGREGS(task) ((unsigned long *) &(((char *) (task))[HOST_TASK_DEBUGREGS])) -#ifdef CONFIG_MODE_TT -#define TASK_EXTERN_PID(task) *((int *) &(((char *) (task))[HOST_TASK_EXTERN_PID])) -#endif - -#endif diff --git a/trunk/arch/um/include/sysdep-x86_64/sc.h b/trunk/arch/um/include/sysdep-x86_64/sc.h deleted file mode 100644 index a160d9fcc596..000000000000 --- a/trunk/arch/um/include/sysdep-x86_64/sc.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef __SYSDEP_X86_64_SC_H -#define __SYSDEP_X86_64_SC_H - -/* Copyright (C) 2003 - 2004 PathScale, Inc - * Released under the GPL - */ - -#include - -#define SC_OFFSET(sc, field) \ - *((unsigned long *) &(((char *) (sc))[HOST_##field])) - -#define SC_RBX(sc) SC_OFFSET(sc, SC_RBX) -#define SC_RCX(sc) SC_OFFSET(sc, SC_RCX) -#define SC_RDX(sc) SC_OFFSET(sc, SC_RDX) -#define SC_RSI(sc) SC_OFFSET(sc, SC_RSI) -#define SC_RDI(sc) SC_OFFSET(sc, SC_RDI) -#define SC_RBP(sc) SC_OFFSET(sc, SC_RBP) -#define SC_RAX(sc) SC_OFFSET(sc, SC_RAX) -#define SC_R8(sc) SC_OFFSET(sc, SC_R8) -#define SC_R9(sc) SC_OFFSET(sc, SC_R9) -#define SC_R10(sc) SC_OFFSET(sc, SC_R10) -#define SC_R11(sc) SC_OFFSET(sc, SC_R11) -#define SC_R12(sc) SC_OFFSET(sc, SC_R12) -#define SC_R13(sc) SC_OFFSET(sc, SC_R13) -#define SC_R14(sc) SC_OFFSET(sc, SC_R14) -#define SC_R15(sc) SC_OFFSET(sc, SC_R15) -#define SC_IP(sc) SC_OFFSET(sc, SC_IP) -#define SC_SP(sc) SC_OFFSET(sc, SC_SP) -#define SC_CR2(sc) SC_OFFSET(sc, SC_CR2) -#define SC_ERR(sc) SC_OFFSET(sc, SC_ERR) -#define SC_TRAPNO(sc) SC_OFFSET(sc, SC_TRAPNO) -#define SC_CS(sc) SC_OFFSET(sc, SC_CS) -#define SC_FS(sc) SC_OFFSET(sc, SC_FS) -#define SC_GS(sc) SC_OFFSET(sc, SC_GS) -#define SC_EFLAGS(sc) SC_OFFSET(sc, SC_EFLAGS) -#define SC_SIGMASK(sc) SC_OFFSET(sc, SC_SIGMASK) -#if 0 -#define SC_ORIG_RAX(sc) SC_OFFSET(sc, SC_ORIG_RAX) -#define SC_DS(sc) SC_OFFSET(sc, SC_DS) -#define SC_ES(sc) SC_OFFSET(sc, SC_ES) -#define SC_SS(sc) SC_OFFSET(sc, SC_SS) -#endif - -#endif diff --git a/trunk/arch/um/include/sysdep-x86_64/thread.h b/trunk/arch/um/include/sysdep-x86_64/thread.h deleted file mode 100644 index 6a76a7f3683f..000000000000 --- a/trunk/arch/um/include/sysdep-x86_64/thread.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __UM_THREAD_H -#define __UM_THREAD_H - -#include - -#ifdef CONFIG_MODE_TT -#define TASK_EXTERN_PID(task) *((int *) &(((char *) (task))[HOST_TASK_EXTERN_PID])) -#endif - -#endif diff --git a/trunk/arch/um/include/task.h b/trunk/arch/um/include/task.h deleted file mode 100644 index 6375ba7203c9..000000000000 --- a/trunk/arch/um/include/task.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __TASK_H -#define __TASK_H - -#include - -#define TASK_REGS(task) ((union uml_pt_regs *) &(((char *) (task))[HOST_TASK_REGS])) -#define TASK_PID(task) *((int *) &(((char *) (task))[HOST_TASK_PID])) - -#endif diff --git a/trunk/arch/um/kernel/skas/Makefile b/trunk/arch/um/kernel/skas/Makefile index 8de471b59c1c..db36c7c95940 100644 --- a/trunk/arch/um/kernel/skas/Makefile +++ b/trunk/arch/um/kernel/skas/Makefile @@ -6,6 +6,8 @@ obj-y := clone.o exec_kern.o mem.o mem_user.o mmu.o process.o process_kern.o \ syscall.o tlb.o trap_user.o uaccess.o +subdir- := util + USER_OBJS := process.o clone.o include arch/um/scripts/Makefile.rules diff --git a/trunk/arch/um/kernel/skas/util/Makefile b/trunk/arch/um/kernel/skas/util/Makefile new file mode 100644 index 000000000000..f7b7eba83340 --- /dev/null +++ b/trunk/arch/um/kernel/skas/util/Makefile @@ -0,0 +1,5 @@ +hostprogs-y := mk_ptregs +always := $(hostprogs-y) + +mk_ptregs-objs := mk_ptregs-$(SUBARCH).o +HOSTCFLAGS_mk_ptregs-$(SUBARCH).o := -I$(objtree)/arch/um diff --git a/trunk/arch/um/kernel/skas/util/mk_ptregs-i386.c b/trunk/arch/um/kernel/skas/util/mk_ptregs-i386.c new file mode 100644 index 000000000000..1f96e1eeb8a7 --- /dev/null +++ b/trunk/arch/um/kernel/skas/util/mk_ptregs-i386.c @@ -0,0 +1,49 @@ +#include +#include + +#define SHOW(name) printf("#define %s %d\n", #name, name) + +int main(int argc, char **argv) +{ + printf("/* Automatically generated by " + "arch/um/kernel/skas/util/mk_ptregs */\n"); + printf("\n"); + printf("#ifndef __SKAS_PT_REGS_\n"); + printf("#define __SKAS_PT_REGS_\n"); + printf("\n"); + SHOW(HOST_FRAME_SIZE); + SHOW(HOST_FP_SIZE); + SHOW(HOST_XFP_SIZE); + + SHOW(HOST_IP); + SHOW(HOST_SP); + SHOW(HOST_EFLAGS); + SHOW(HOST_EAX); + SHOW(HOST_EBX); + SHOW(HOST_ECX); + SHOW(HOST_EDX); + SHOW(HOST_ESI); + SHOW(HOST_EDI); + SHOW(HOST_EBP); + SHOW(HOST_CS); + SHOW(HOST_SS); + SHOW(HOST_DS); + SHOW(HOST_FS); + SHOW(HOST_ES); + SHOW(HOST_GS); + + printf("\n"); + printf("#endif\n"); + return(0); +} + +/* + * Overrides for Emacs so that we follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-file-style: "linux" + * End: + */ diff --git a/trunk/arch/um/kernel/skas/util/mk_ptregs-x86_64.c b/trunk/arch/um/kernel/skas/util/mk_ptregs-x86_64.c new file mode 100644 index 000000000000..5fccbfe35f78 --- /dev/null +++ b/trunk/arch/um/kernel/skas/util/mk_ptregs-x86_64.c @@ -0,0 +1,66 @@ +/* + * Copyright 2003 PathScale, Inc. + * + * Licensed under the GPL + */ + +#include +#include + +#define SHOW(name) \ + printf("#define %s (%d / sizeof(unsigned long))\n", #name, name) + +int main(int argc, char **argv) +{ + printf("/* Automatically generated by " + "arch/um/kernel/skas/util/mk_ptregs */\n"); + printf("\n"); + printf("#ifndef __SKAS_PT_REGS_\n"); + printf("#define __SKAS_PT_REGS_\n"); + SHOW(HOST_FRAME_SIZE); + SHOW(HOST_RBX); + SHOW(HOST_RCX); + SHOW(HOST_RDI); + SHOW(HOST_RSI); + SHOW(HOST_RDX); + SHOW(HOST_RBP); + SHOW(HOST_RAX); + SHOW(HOST_R8); + SHOW(HOST_R9); + SHOW(HOST_R10); + SHOW(HOST_R11); + SHOW(HOST_R12); + SHOW(HOST_R13); + SHOW(HOST_R14); + SHOW(HOST_R15); + SHOW(HOST_ORIG_RAX); + SHOW(HOST_CS); + SHOW(HOST_SS); + SHOW(HOST_EFLAGS); +#if 0 + SHOW(HOST_FS); + SHOW(HOST_GS); + SHOW(HOST_DS); + SHOW(HOST_ES); +#endif + + SHOW(HOST_IP); + SHOW(HOST_SP); + printf("#define HOST_FP_SIZE 0\n"); + printf("#define HOST_XFP_SIZE 0\n"); + printf("\n"); + printf("\n"); + printf("#endif\n"); + return(0); +} + +/* + * Overrides for Emacs so that we follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-file-style: "linux" + * End: + */ diff --git a/trunk/arch/um/os-Linux/elf_aux.c b/trunk/arch/um/os-Linux/elf_aux.c index 5a99dd3fbed0..ab33cb3c74ec 100644 --- a/trunk/arch/um/os-Linux/elf_aux.c +++ b/trunk/arch/um/os-Linux/elf_aux.c @@ -12,7 +12,7 @@ #include "init.h" #include "elf_user.h" #include "mem_user.h" -#include +#include /* Use the one from the kernel - the host may miss it, if having old headers. */ #if UM_ELF_CLASS == UM_ELFCLASS32 diff --git a/trunk/arch/um/os-Linux/util/Makefile b/trunk/arch/um/os-Linux/util/Makefile new file mode 100644 index 000000000000..9778aed0c314 --- /dev/null +++ b/trunk/arch/um/os-Linux/util/Makefile @@ -0,0 +1,4 @@ +hostprogs-y := mk_user_constants +always := $(hostprogs-y) + +HOSTCFLAGS_mk_user_constants.o := -I$(objtree)/arch/um diff --git a/trunk/arch/um/os-Linux/util/mk_user_constants.c b/trunk/arch/um/os-Linux/util/mk_user_constants.c new file mode 100644 index 000000000000..4838f30eecf0 --- /dev/null +++ b/trunk/arch/um/os-Linux/util/mk_user_constants.c @@ -0,0 +1,23 @@ +#include +#include + +int main(int argc, char **argv) +{ + printf("/*\n"); + printf(" * Generated by mk_user_constants\n"); + printf(" */\n"); + printf("\n"); + printf("#ifndef __UM_USER_CONSTANTS_H\n"); + printf("#define __UM_USER_CONSTANTS_H\n"); + printf("\n"); + /* I'd like to use FRAME_SIZE from ptrace.h here, but that's wrong on + * x86_64 (216 vs 168 bytes). user_regs_struct is the correct size on + * both x86_64 and i386. + */ + printf("#define UM_FRAME_SIZE %d\n", __UM_FRAME_SIZE); + + printf("\n"); + printf("#endif\n"); + + return(0); +} diff --git a/trunk/arch/um/sys-i386/Makefile b/trunk/arch/um/sys-i386/Makefile index 6dfeb70f6957..4ca2a229da49 100644 --- a/trunk/arch/um/sys-i386/Makefile +++ b/trunk/arch/um/sys-i386/Makefile @@ -18,4 +18,6 @@ module.c-dir = kernel $(obj)/stub_segv.o : _c_flags = $(call unprofile,$(CFLAGS)) +subdir- := util + include arch/um/scripts/Makefile.unmap diff --git a/trunk/arch/um/sys-i386/kernel-offsets.c b/trunk/arch/um/sys-i386/kernel-offsets.c index 35db85057506..a1070af2bcd8 100644 --- a/trunk/arch/um/sys-i386/kernel-offsets.c +++ b/trunk/arch/um/sys-i386/kernel-offsets.c @@ -18,9 +18,9 @@ void foo(void) { - OFFSET(HOST_TASK_DEBUGREGS, task_struct, thread.arch.debugregs); + OFFSET(TASK_DEBUGREGS, task_struct, thread.arch.debugregs); #ifdef CONFIG_MODE_TT - OFFSET(HOST_TASK_EXTERN_PID, task_struct, thread.mode.tt.extern_pid); + OFFSET(TASK_EXTERN_PID, task_struct, thread.mode.tt.extern_pid); #endif #include } diff --git a/trunk/arch/um/sys-i386/user-offsets.c b/trunk/arch/um/sys-i386/user-offsets.c index 677fc26a9bbe..3ceaabceb3d7 100644 --- a/trunk/arch/um/sys-i386/user-offsets.c +++ b/trunk/arch/um/sys-i386/user-offsets.c @@ -7,48 +7,47 @@ #define DEFINE(sym, val) \ asm volatile("\n->" #sym " %0 " #val : : "i" (val)) -#define DEFINE_LONGS(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val/sizeof(unsigned long))) - #define OFFSET(sym, str, mem) \ DEFINE(sym, offsetof(struct str, mem)); void foo(void) { - OFFSET(HOST_SC_IP, sigcontext, eip); - OFFSET(HOST_SC_SP, sigcontext, esp); - OFFSET(HOST_SC_FS, sigcontext, fs); - OFFSET(HOST_SC_GS, sigcontext, gs); - OFFSET(HOST_SC_DS, sigcontext, ds); - OFFSET(HOST_SC_ES, sigcontext, es); - OFFSET(HOST_SC_SS, sigcontext, ss); - OFFSET(HOST_SC_CS, sigcontext, cs); - OFFSET(HOST_SC_EFLAGS, sigcontext, eflags); - OFFSET(HOST_SC_EAX, sigcontext, eax); - OFFSET(HOST_SC_EBX, sigcontext, ebx); - OFFSET(HOST_SC_ECX, sigcontext, ecx); - OFFSET(HOST_SC_EDX, sigcontext, edx); - OFFSET(HOST_SC_EDI, sigcontext, edi); - OFFSET(HOST_SC_ESI, sigcontext, esi); - OFFSET(HOST_SC_EBP, sigcontext, ebp); - OFFSET(HOST_SC_TRAPNO, sigcontext, trapno); - OFFSET(HOST_SC_ERR, sigcontext, err); - OFFSET(HOST_SC_CR2, sigcontext, cr2); - OFFSET(HOST_SC_FPSTATE, sigcontext, fpstate); - OFFSET(HOST_SC_SIGMASK, sigcontext, oldmask); - OFFSET(HOST_SC_FP_CW, _fpstate, cw); - OFFSET(HOST_SC_FP_SW, _fpstate, sw); - OFFSET(HOST_SC_FP_TAG, _fpstate, tag); - OFFSET(HOST_SC_FP_IPOFF, _fpstate, ipoff); - OFFSET(HOST_SC_FP_CSSEL, _fpstate, cssel); - OFFSET(HOST_SC_FP_DATAOFF, _fpstate, dataoff); - OFFSET(HOST_SC_FP_DATASEL, _fpstate, datasel); - OFFSET(HOST_SC_FP_ST, _fpstate, _st); - OFFSET(HOST_SC_FXSR_ENV, _fpstate, _fxsr_env); + OFFSET(SC_IP, sigcontext, eip); + OFFSET(SC_SP, sigcontext, esp); + OFFSET(SC_FS, sigcontext, fs); + OFFSET(SC_GS, sigcontext, gs); + OFFSET(SC_DS, sigcontext, ds); + OFFSET(SC_ES, sigcontext, es); + OFFSET(SC_SS, sigcontext, ss); + OFFSET(SC_CS, sigcontext, cs); + OFFSET(SC_EFLAGS, sigcontext, eflags); + OFFSET(SC_EAX, sigcontext, eax); + OFFSET(SC_EBX, sigcontext, ebx); + OFFSET(SC_ECX, sigcontext, ecx); + OFFSET(SC_EDX, sigcontext, edx); + OFFSET(SC_EDI, sigcontext, edi); + OFFSET(SC_ESI, sigcontext, esi); + OFFSET(SC_EBP, sigcontext, ebp); + OFFSET(SC_TRAPNO, sigcontext, trapno); + OFFSET(SC_ERR, sigcontext, err); + OFFSET(SC_CR2, sigcontext, cr2); + OFFSET(SC_FPSTATE, sigcontext, fpstate); + OFFSET(SC_SIGMASK, sigcontext, oldmask); + OFFSET(SC_FP_CW, _fpstate, cw); + OFFSET(SC_FP_SW, _fpstate, sw); + OFFSET(SC_FP_TAG, _fpstate, tag); + OFFSET(SC_FP_IPOFF, _fpstate, ipoff); + OFFSET(SC_FP_CSSEL, _fpstate, cssel); + OFFSET(SC_FP_DATAOFF, _fpstate, dataoff); + OFFSET(SC_FP_DATASEL, _fpstate, datasel); + OFFSET(SC_FP_ST, _fpstate, _st); + OFFSET(SC_FXSR_ENV, _fpstate, _fxsr_env); - DEFINE_LONGS(HOST_FRAME_SIZE, FRAME_SIZE); - DEFINE_LONGS(HOST_FP_SIZE, sizeof(struct user_i387_struct)); - DEFINE_LONGS(HOST_XFP_SIZE, sizeof(struct user_fxsr_struct)); + DEFINE(HOST_FRAME_SIZE, FRAME_SIZE); + DEFINE(HOST_FP_SIZE, + sizeof(struct user_i387_struct) / sizeof(unsigned long)); + DEFINE(HOST_XFP_SIZE, + sizeof(struct user_fxsr_struct) / sizeof(unsigned long)); DEFINE(HOST_IP, EIP); DEFINE(HOST_SP, UESP); @@ -66,5 +65,5 @@ void foo(void) DEFINE(HOST_FS, FS); DEFINE(HOST_ES, ES); DEFINE(HOST_GS, GS); - DEFINE(UM_FRAME_SIZE, sizeof(struct user_regs_struct)); + DEFINE(__UM_FRAME_SIZE, sizeof(struct user_regs_struct)); } diff --git a/trunk/arch/um/sys-i386/util/Makefile b/trunk/arch/um/sys-i386/util/Makefile new file mode 100644 index 000000000000..bf61afd0b045 --- /dev/null +++ b/trunk/arch/um/sys-i386/util/Makefile @@ -0,0 +1,5 @@ +hostprogs-y := mk_sc mk_thread +always := $(hostprogs-y) + +HOSTCFLAGS_mk_sc.o := -I$(objtree)/arch/um +HOSTCFLAGS_mk_thread.o := -I$(objtree)/arch/um diff --git a/trunk/arch/um/sys-i386/util/mk_sc.c b/trunk/arch/um/sys-i386/util/mk_sc.c new file mode 100644 index 000000000000..04c0d73433aa --- /dev/null +++ b/trunk/arch/um/sys-i386/util/mk_sc.c @@ -0,0 +1,51 @@ +#include +#include + +#define SC_OFFSET(name, field) \ + printf("#define " #name "(sc) *((unsigned long *) &(((char *) (sc))[%d]))\n",\ + name) + +#define SC_FP_OFFSET(name, field) \ + printf("#define " #name \ + "(sc) *((unsigned long *) &(((char *) (SC_FPSTATE(sc)))[%d]))\n",\ + name) + +#define SC_FP_OFFSET_PTR(name, field, type) \ + printf("#define " #name \ + "(sc) ((" type " *) &(((char *) (SC_FPSTATE(sc)))[%d]))\n",\ + name) + +int main(int argc, char **argv) +{ + SC_OFFSET(SC_IP, eip); + SC_OFFSET(SC_SP, esp); + SC_OFFSET(SC_FS, fs); + SC_OFFSET(SC_GS, gs); + SC_OFFSET(SC_DS, ds); + SC_OFFSET(SC_ES, es); + SC_OFFSET(SC_SS, ss); + SC_OFFSET(SC_CS, cs); + SC_OFFSET(SC_EFLAGS, eflags); + SC_OFFSET(SC_EAX, eax); + SC_OFFSET(SC_EBX, ebx); + SC_OFFSET(SC_ECX, ecx); + SC_OFFSET(SC_EDX, edx); + SC_OFFSET(SC_EDI, edi); + SC_OFFSET(SC_ESI, esi); + SC_OFFSET(SC_EBP, ebp); + SC_OFFSET(SC_TRAPNO, trapno); + SC_OFFSET(SC_ERR, err); + SC_OFFSET(SC_CR2, cr2); + SC_OFFSET(SC_FPSTATE, fpstate); + SC_OFFSET(SC_SIGMASK, oldmask); + SC_FP_OFFSET(SC_FP_CW, cw); + SC_FP_OFFSET(SC_FP_SW, sw); + SC_FP_OFFSET(SC_FP_TAG, tag); + SC_FP_OFFSET(SC_FP_IPOFF, ipoff); + SC_FP_OFFSET(SC_FP_CSSEL, cssel); + SC_FP_OFFSET(SC_FP_DATAOFF, dataoff); + SC_FP_OFFSET(SC_FP_DATASEL, datasel); + SC_FP_OFFSET_PTR(SC_FP_ST, _st, "struct _fpstate"); + SC_FP_OFFSET_PTR(SC_FXSR_ENV, _fxsr_env, "void"); + return(0); +} diff --git a/trunk/arch/um/sys-i386/util/mk_thread.c b/trunk/arch/um/sys-i386/util/mk_thread.c new file mode 100644 index 000000000000..7470d0dda67e --- /dev/null +++ b/trunk/arch/um/sys-i386/util/mk_thread.c @@ -0,0 +1,22 @@ +#include +#include + +int main(int argc, char **argv) +{ + printf("/*\n"); + printf(" * Generated by mk_thread\n"); + printf(" */\n"); + printf("\n"); + printf("#ifndef __UM_THREAD_H\n"); + printf("#define __UM_THREAD_H\n"); + printf("\n"); + printf("#define TASK_DEBUGREGS(task) ((unsigned long *) " + "&(((char *) (task))[%d]))\n", TASK_DEBUGREGS); +#ifdef TASK_EXTERN_PID + printf("#define TASK_EXTERN_PID(task) *((int *) &(((char *) (task))[%d]))\n", + TASK_EXTERN_PID); +#endif + printf("\n"); + printf("#endif\n"); + return(0); +} diff --git a/trunk/arch/um/sys-x86_64/Makefile b/trunk/arch/um/sys-x86_64/Makefile index 06c3633457a2..f0ab574d1e95 100644 --- a/trunk/arch/um/sys-x86_64/Makefile +++ b/trunk/arch/um/sys-x86_64/Makefile @@ -29,4 +29,6 @@ module.c-dir = kernel $(obj)/stub_segv.o: _c_flags = $(call unprofile,$(CFLAGS)) +subdir- := util + include arch/um/scripts/Makefile.unmap diff --git a/trunk/arch/um/sys-x86_64/kernel-offsets.c b/trunk/arch/um/sys-x86_64/kernel-offsets.c index bfcb104b846e..998541eade41 100644 --- a/trunk/arch/um/sys-x86_64/kernel-offsets.c +++ b/trunk/arch/um/sys-x86_64/kernel-offsets.c @@ -19,7 +19,7 @@ void foo(void) { #ifdef CONFIG_MODE_TT - OFFSET(HOST_TASK_EXTERN_PID, task_struct, thread.mode.tt.extern_pid); + OFFSET(TASK_EXTERN_PID, task_struct, thread.mode.tt.extern_pid); #endif #include } diff --git a/trunk/arch/um/sys-x86_64/user-offsets.c b/trunk/arch/um/sys-x86_64/user-offsets.c index 5a585bfbb8c2..513d17ceafd4 100644 --- a/trunk/arch/um/sys-x86_64/user-offsets.c +++ b/trunk/arch/um/sys-x86_64/user-offsets.c @@ -16,76 +16,71 @@ typedef __u32 u32; #define DEFINE(sym, val) \ asm volatile("\n->" #sym " %0 " #val : : "i" (val)) -#define DEFINE_LONGS(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val/sizeof(unsigned long))) - #define OFFSET(sym, str, mem) \ DEFINE(sym, offsetof(struct str, mem)); void foo(void) { - OFFSET(HOST_SC_RBX, sigcontext, rbx); - OFFSET(HOST_SC_RCX, sigcontext, rcx); - OFFSET(HOST_SC_RDX, sigcontext, rdx); - OFFSET(HOST_SC_RSI, sigcontext, rsi); - OFFSET(HOST_SC_RDI, sigcontext, rdi); - OFFSET(HOST_SC_RBP, sigcontext, rbp); - OFFSET(HOST_SC_RAX, sigcontext, rax); - OFFSET(HOST_SC_R8, sigcontext, r8); - OFFSET(HOST_SC_R9, sigcontext, r9); - OFFSET(HOST_SC_R10, sigcontext, r10); - OFFSET(HOST_SC_R11, sigcontext, r11); - OFFSET(HOST_SC_R12, sigcontext, r12); - OFFSET(HOST_SC_R13, sigcontext, r13); - OFFSET(HOST_SC_R14, sigcontext, r14); - OFFSET(HOST_SC_R15, sigcontext, r15); - OFFSET(HOST_SC_IP, sigcontext, rip); - OFFSET(HOST_SC_SP, sigcontext, rsp); - OFFSET(HOST_SC_CR2, sigcontext, cr2); - OFFSET(HOST_SC_ERR, sigcontext, err); - OFFSET(HOST_SC_TRAPNO, sigcontext, trapno); - OFFSET(HOST_SC_CS, sigcontext, cs); - OFFSET(HOST_SC_FS, sigcontext, fs); - OFFSET(HOST_SC_GS, sigcontext, gs); - OFFSET(HOST_SC_EFLAGS, sigcontext, eflags); - OFFSET(HOST_SC_SIGMASK, sigcontext, oldmask); + OFFSET(SC_RBX, sigcontext, rbx); + OFFSET(SC_RCX, sigcontext, rcx); + OFFSET(SC_RDX, sigcontext, rdx); + OFFSET(SC_RSI, sigcontext, rsi); + OFFSET(SC_RDI, sigcontext, rdi); + OFFSET(SC_RBP, sigcontext, rbp); + OFFSET(SC_RAX, sigcontext, rax); + OFFSET(SC_R8, sigcontext, r8); + OFFSET(SC_R9, sigcontext, r9); + OFFSET(SC_R10, sigcontext, r10); + OFFSET(SC_R11, sigcontext, r11); + OFFSET(SC_R12, sigcontext, r12); + OFFSET(SC_R13, sigcontext, r13); + OFFSET(SC_R14, sigcontext, r14); + OFFSET(SC_R15, sigcontext, r15); + OFFSET(SC_IP, sigcontext, rip); + OFFSET(SC_SP, sigcontext, rsp); + OFFSET(SC_CR2, sigcontext, cr2); + OFFSET(SC_ERR, sigcontext, err); + OFFSET(SC_TRAPNO, sigcontext, trapno); + OFFSET(SC_CS, sigcontext, cs); + OFFSET(SC_FS, sigcontext, fs); + OFFSET(SC_GS, sigcontext, gs); + OFFSET(SC_EFLAGS, sigcontext, eflags); + OFFSET(SC_SIGMASK, sigcontext, oldmask); #if 0 - OFFSET(HOST_SC_ORIG_RAX, sigcontext, orig_rax); - OFFSET(HOST_SC_DS, sigcontext, ds); - OFFSET(HOST_SC_ES, sigcontext, es); - OFFSET(HOST_SC_SS, sigcontext, ss); + OFFSET(SC_ORIG_RAX, sigcontext, orig_rax); + OFFSET(SC_DS, sigcontext, ds); + OFFSET(SC_ES, sigcontext, es); + OFFSET(SC_SS, sigcontext, ss); #endif - DEFINE_LONGS(HOST_FRAME_SIZE, FRAME_SIZE); - DEFINE(HOST_FP_SIZE, 0); - DEFINE(HOST_XFP_SIZE, 0); - DEFINE_LONGS(HOST_RBX, RBX); - DEFINE_LONGS(HOST_RCX, RCX); - DEFINE_LONGS(HOST_RDI, RDI); - DEFINE_LONGS(HOST_RSI, RSI); - DEFINE_LONGS(HOST_RDX, RDX); - DEFINE_LONGS(HOST_RBP, RBP); - DEFINE_LONGS(HOST_RAX, RAX); - DEFINE_LONGS(HOST_R8, R8); - DEFINE_LONGS(HOST_R9, R9); - DEFINE_LONGS(HOST_R10, R10); - DEFINE_LONGS(HOST_R11, R11); - DEFINE_LONGS(HOST_R12, R12); - DEFINE_LONGS(HOST_R13, R13); - DEFINE_LONGS(HOST_R14, R14); - DEFINE_LONGS(HOST_R15, R15); - DEFINE_LONGS(HOST_ORIG_RAX, ORIG_RAX); - DEFINE_LONGS(HOST_CS, CS); - DEFINE_LONGS(HOST_SS, SS); - DEFINE_LONGS(HOST_EFLAGS, EFLAGS); + DEFINE(HOST_FRAME_SIZE, FRAME_SIZE); + DEFINE(HOST_RBX, RBX); + DEFINE(HOST_RCX, RCX); + DEFINE(HOST_RDI, RDI); + DEFINE(HOST_RSI, RSI); + DEFINE(HOST_RDX, RDX); + DEFINE(HOST_RBP, RBP); + DEFINE(HOST_RAX, RAX); + DEFINE(HOST_R8, R8); + DEFINE(HOST_R9, R9); + DEFINE(HOST_R10, R10); + DEFINE(HOST_R11, R11); + DEFINE(HOST_R12, R12); + DEFINE(HOST_R13, R13); + DEFINE(HOST_R14, R14); + DEFINE(HOST_R15, R15); + DEFINE(HOST_ORIG_RAX, ORIG_RAX); + DEFINE(HOST_CS, CS); + DEFINE(HOST_SS, SS); + DEFINE(HOST_EFLAGS, EFLAGS); #if 0 - DEFINE_LONGS(HOST_FS, FS); - DEFINE_LONGS(HOST_GS, GS); - DEFINE_LONGS(HOST_DS, DS); - DEFINE_LONGS(HOST_ES, ES); + DEFINE(HOST_FS, FS); + DEFINE(HOST_GS, GS); + DEFINE(HOST_DS, DS); + DEFINE(HOST_ES, ES); #endif - DEFINE_LONGS(HOST_IP, RIP); - DEFINE_LONGS(HOST_SP, RSP); - DEFINE(UM_FRAME_SIZE, sizeof(struct user_regs_struct)); + DEFINE(HOST_IP, RIP); + DEFINE(HOST_SP, RSP); + DEFINE(__UM_FRAME_SIZE, sizeof(struct user_regs_struct)); } diff --git a/trunk/arch/um/sys-x86_64/util/Makefile b/trunk/arch/um/sys-x86_64/util/Makefile new file mode 100644 index 000000000000..75b052cfc206 --- /dev/null +++ b/trunk/arch/um/sys-x86_64/util/Makefile @@ -0,0 +1,8 @@ +# Copyright 2003 - 2004 Pathscale, Inc +# Released under the GPL + +hostprogs-y := mk_sc mk_thread +always := $(hostprogs-y) + +HOSTCFLAGS_mk_sc.o := -I$(objtree)/arch/um +HOSTCFLAGS_mk_thread.o := -I$(objtree)/arch/um diff --git a/trunk/arch/um/sys-x86_64/util/mk_sc.c b/trunk/arch/um/sys-x86_64/util/mk_sc.c new file mode 100644 index 000000000000..7619bc377c1f --- /dev/null +++ b/trunk/arch/um/sys-x86_64/util/mk_sc.c @@ -0,0 +1,47 @@ +/* Copyright (C) 2003 - 2004 PathScale, Inc + * Released under the GPL + */ + +#include +#include + +#define SC_OFFSET(name) \ + printf("#define " #name \ + "(sc) *((unsigned long *) &(((char *) (sc))[%d]))\n",\ + name) + +int main(int argc, char **argv) +{ + SC_OFFSET(SC_RBX); + SC_OFFSET(SC_RCX); + SC_OFFSET(SC_RDX); + SC_OFFSET(SC_RSI); + SC_OFFSET(SC_RDI); + SC_OFFSET(SC_RBP); + SC_OFFSET(SC_RAX); + SC_OFFSET(SC_R8); + SC_OFFSET(SC_R9); + SC_OFFSET(SC_R10); + SC_OFFSET(SC_R11); + SC_OFFSET(SC_R12); + SC_OFFSET(SC_R13); + SC_OFFSET(SC_R14); + SC_OFFSET(SC_R15); + SC_OFFSET(SC_IP); + SC_OFFSET(SC_SP); + SC_OFFSET(SC_CR2); + SC_OFFSET(SC_ERR); + SC_OFFSET(SC_TRAPNO); + SC_OFFSET(SC_CS); + SC_OFFSET(SC_FS); + SC_OFFSET(SC_GS); + SC_OFFSET(SC_EFLAGS); + SC_OFFSET(SC_SIGMASK); +#if 0 + SC_OFFSET(SC_ORIG_RAX); + SC_OFFSET(SC_DS); + SC_OFFSET(SC_ES); + SC_OFFSET(SC_SS); +#endif + return(0); +} diff --git a/trunk/arch/um/sys-x86_64/util/mk_thread.c b/trunk/arch/um/sys-x86_64/util/mk_thread.c new file mode 100644 index 000000000000..15517396e9cf --- /dev/null +++ b/trunk/arch/um/sys-x86_64/util/mk_thread.c @@ -0,0 +1,20 @@ +#include +#include + +int main(int argc, char **argv) +{ + printf("/*\n"); + printf(" * Generated by mk_thread\n"); + printf(" */\n"); + printf("\n"); + printf("#ifndef __UM_THREAD_H\n"); + printf("#define __UM_THREAD_H\n"); + printf("\n"); +#ifdef TASK_EXTERN_PID + printf("#define TASK_EXTERN_PID(task) *((int *) &(((char *) (task))[%d]))\n", + TASK_EXTERN_PID); +#endif + printf("\n"); + printf("#endif\n"); + return(0); +} diff --git a/trunk/arch/um/util/Makefile b/trunk/arch/um/util/Makefile new file mode 100644 index 000000000000..4c7551c28033 --- /dev/null +++ b/trunk/arch/um/util/Makefile @@ -0,0 +1,5 @@ +hostprogs-y := mk_task mk_constants +always := $(hostprogs-y) + +HOSTCFLAGS_mk_task.o := -I$(objtree)/arch/um +HOSTCFLAGS_mk_constants.o := -I$(objtree)/arch/um diff --git a/trunk/arch/um/util/mk_constants.c b/trunk/arch/um/util/mk_constants.c new file mode 100644 index 000000000000..ab217becc36a --- /dev/null +++ b/trunk/arch/um/util/mk_constants.c @@ -0,0 +1,32 @@ +#include +#include + +#define SHOW_INT(sym) printf("#define %s %d\n", #sym, sym) +#define SHOW_STR(sym) printf("#define %s %s\n", #sym, sym) + +int main(int argc, char **argv) +{ + printf("/*\n"); + printf(" * Generated by mk_constants\n"); + printf(" */\n"); + printf("\n"); + printf("#ifndef __UM_CONSTANTS_H\n"); + printf("#define __UM_CONSTANTS_H\n"); + printf("\n"); + + SHOW_INT(UM_KERN_PAGE_SIZE); + + SHOW_STR(UM_KERN_EMERG); + SHOW_STR(UM_KERN_ALERT); + SHOW_STR(UM_KERN_CRIT); + SHOW_STR(UM_KERN_ERR); + SHOW_STR(UM_KERN_WARNING); + SHOW_STR(UM_KERN_NOTICE); + SHOW_STR(UM_KERN_INFO); + SHOW_STR(UM_KERN_DEBUG); + + SHOW_INT(UM_NSEC_PER_SEC); + printf("\n"); + printf("#endif\n"); + return(0); +} diff --git a/trunk/arch/um/util/mk_task.c b/trunk/arch/um/util/mk_task.c new file mode 100644 index 000000000000..36c9606505e2 --- /dev/null +++ b/trunk/arch/um/util/mk_task.c @@ -0,0 +1,30 @@ +#include +#include + +void print_ptr(char *name, char *type, int offset) +{ + printf("#define %s(task) ((%s *) &(((char *) (task))[%d]))\n", name, type, + offset); +} + +void print(char *name, char *type, int offset) +{ + printf("#define %s(task) *((%s *) &(((char *) (task))[%d]))\n", name, type, + offset); +} + +int main(int argc, char **argv) +{ + printf("/*\n"); + printf(" * Generated by mk_task\n"); + printf(" */\n"); + printf("\n"); + printf("#ifndef __TASK_H\n"); + printf("#define __TASK_H\n"); + printf("\n"); + print_ptr("TASK_REGS", "union uml_pt_regs", TASK_REGS); + print("TASK_PID", "int", TASK_PID); + printf("\n"); + printf("#endif\n"); + return(0); +} diff --git a/trunk/arch/x86_64/kernel/mce.c b/trunk/arch/x86_64/kernel/mce.c index 69541db5ff2c..08203b07f4bd 100644 --- a/trunk/arch/x86_64/kernel/mce.c +++ b/trunk/arch/x86_64/kernel/mce.c @@ -54,12 +54,9 @@ void mce_log(struct mce *mce) { unsigned next, entry; mce->finished = 0; - wmb(); + smp_wmb(); for (;;) { entry = rcu_dereference(mcelog.next); - /* The rmb forces the compiler to reload next in each - iteration */ - rmb(); for (;;) { /* When the buffer fills up discard new entries. Assume that the earlier errors are the more interesting. */ @@ -72,7 +69,6 @@ void mce_log(struct mce *mce) entry++; continue; } - break; } smp_rmb(); next = entry + 1; @@ -80,9 +76,9 @@ void mce_log(struct mce *mce) break; } memcpy(mcelog.entry + entry, mce, sizeof(struct mce)); - wmb(); + smp_wmb(); mcelog.entry[entry].finished = 1; - wmb(); + smp_wmb(); if (!test_and_set_bit(0, &console_logged)) notify_user = 1; diff --git a/trunk/arch/x86_64/kernel/setup.c b/trunk/arch/x86_64/kernel/setup.c index 257f5ba17902..238f73e1a834 100644 --- a/trunk/arch/x86_64/kernel/setup.c +++ b/trunk/arch/x86_64/kernel/setup.c @@ -831,6 +831,8 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) #endif } +#define HWCR 0xc0010015 + static int __init init_amd(struct cpuinfo_x86 *c) { int r; @@ -839,18 +841,14 @@ static int __init init_amd(struct cpuinfo_x86 *c) #ifdef CONFIG_SMP unsigned long value; - /* - * Disable TLB flush filter by setting HWCR.FFDIS on K8 - * bit 6 of msr C001_0015 - * - * Errata 63 for SH-B3 steppings - * Errata 122 for all steppings (F+ have it disabled by default) - */ - if (c->x86 == 15) { - rdmsrl(MSR_K8_HWCR, value); - value |= 1 << 6; - wrmsrl(MSR_K8_HWCR, value); - } + // Disable TLB flush filter by setting HWCR.FFDIS: + // bit 6 of msr C001_0015 + // + // Errata 63 for SH-B3 steppings + // Errata 122 for all(?) steppings + rdmsrl(HWCR, value); + value |= 1 << 6; + wrmsrl(HWCR, value); #endif /* Bit 31 in normal CPUID used for nonstandard 3DNow ID; diff --git a/trunk/drivers/char/drm/drm_drv.c b/trunk/drivers/char/drm/drm_drv.c index 041bb47b5c39..6ba48f346fcf 100644 --- a/trunk/drivers/char/drm/drm_drv.c +++ b/trunk/drivers/char/drm/drm_drv.c @@ -376,7 +376,7 @@ static int __init drm_core_init(void) goto err_p2; } - drm_proc_root = proc_mkdir("dri", NULL); + drm_proc_root = create_proc_entry("dri", S_IFDIR, NULL); if (!drm_proc_root) { DRM_ERROR("Cannot create /proc/dri\n"); ret = -1; diff --git a/trunk/drivers/char/drm/drm_proc.c b/trunk/drivers/char/drm/drm_proc.c index 977961002488..32d2bb99462c 100644 --- a/trunk/drivers/char/drm/drm_proc.c +++ b/trunk/drivers/char/drm/drm_proc.c @@ -95,7 +95,7 @@ int drm_proc_init(drm_device_t *dev, int minor, char name[64]; sprintf(name, "%d", minor); - *dev_root = proc_mkdir(name, root); + *dev_root = create_proc_entry(name, S_IFDIR, root); if (!*dev_root) { DRM_ERROR("Cannot create /proc/dri/%s\n", name); return -1; diff --git a/trunk/drivers/char/n_r3964.c b/trunk/drivers/char/n_r3964.c index 97d6dc24b800..2291a87e8ada 100644 --- a/trunk/drivers/char/n_r3964.c +++ b/trunk/drivers/char/n_r3964.c @@ -229,8 +229,8 @@ static int __init r3964_init(void) TRACE_L("line discipline %d registered", N_R3964); TRACE_L("flags=%x num=%x", tty_ldisc_N_R3964.flags, tty_ldisc_N_R3964.num); - TRACE_L("open=%p", tty_ldisc_N_R3964.open); - TRACE_L("tty_ldisc_N_R3964 = %p", &tty_ldisc_N_R3964); + TRACE_L("open=%x", (int)tty_ldisc_N_R3964.open); + TRACE_L("tty_ldisc_N_R3964 = %x", (int)&tty_ldisc_N_R3964); } else { @@ -267,8 +267,8 @@ static void add_tx_queue(struct r3964_info *pInfo, struct r3964_block_header *pH spin_unlock_irqrestore(&pInfo->lock, flags); - TRACE_Q("add_tx_queue %p, length %d, tx_first = %p", - pHeader, pHeader->length, pInfo->tx_first ); + TRACE_Q("add_tx_queue %x, length %d, tx_first = %x", + (int)pHeader, pHeader->length, (int)pInfo->tx_first ); } static void remove_from_tx_queue(struct r3964_info *pInfo, int error_code) @@ -285,10 +285,10 @@ static void remove_from_tx_queue(struct r3964_info *pInfo, int error_code) return; #ifdef DEBUG_QUEUE - printk("r3964: remove_from_tx_queue: %p, length %u - ", - pHeader, pHeader->length ); + printk("r3964: remove_from_tx_queue: %x, length %d - ", + (int)pHeader, (int)pHeader->length ); for(pDump=pHeader;pDump;pDump=pDump->next) - printk("%p ", pDump); + printk("%x ", (int)pDump); printk("\n"); #endif @@ -319,10 +319,10 @@ static void remove_from_tx_queue(struct r3964_info *pInfo, int error_code) spin_unlock_irqrestore(&pInfo->lock, flags); kfree(pHeader); - TRACE_M("remove_from_tx_queue - kfree %p",pHeader); + TRACE_M("remove_from_tx_queue - kfree %x",(int)pHeader); - TRACE_Q("remove_from_tx_queue: tx_first = %p, tx_last = %p", - pInfo->tx_first, pInfo->tx_last ); + TRACE_Q("remove_from_tx_queue: tx_first = %x, tx_last = %x", + (int)pInfo->tx_first, (int)pInfo->tx_last ); } static void add_rx_queue(struct r3964_info *pInfo, struct r3964_block_header *pHeader) @@ -346,9 +346,9 @@ static void add_rx_queue(struct r3964_info *pInfo, struct r3964_block_header *pH spin_unlock_irqrestore(&pInfo->lock, flags); - TRACE_Q("add_rx_queue: %p, length = %d, rx_first = %p, count = %d", - pHeader, pHeader->length, - pInfo->rx_first, pInfo->blocks_in_rx_queue); + TRACE_Q("add_rx_queue: %x, length = %d, rx_first = %x, count = %d", + (int)pHeader, pHeader->length, + (int)pInfo->rx_first, pInfo->blocks_in_rx_queue); } static void remove_from_rx_queue(struct r3964_info *pInfo, @@ -360,10 +360,10 @@ static void remove_from_rx_queue(struct r3964_info *pInfo, if(pHeader==NULL) return; - TRACE_Q("remove_from_rx_queue: rx_first = %p, rx_last = %p, count = %d", - pInfo->rx_first, pInfo->rx_last, pInfo->blocks_in_rx_queue ); - TRACE_Q("remove_from_rx_queue: %p, length %u", - pHeader, pHeader->length ); + TRACE_Q("remove_from_rx_queue: rx_first = %x, rx_last = %x, count = %d", + (int)pInfo->rx_first, (int)pInfo->rx_last, pInfo->blocks_in_rx_queue ); + TRACE_Q("remove_from_rx_queue: %x, length %d", + (int)pHeader, (int)pHeader->length ); spin_lock_irqsave(&pInfo->lock, flags); @@ -401,10 +401,10 @@ static void remove_from_rx_queue(struct r3964_info *pInfo, spin_unlock_irqrestore(&pInfo->lock, flags); kfree(pHeader); - TRACE_M("remove_from_rx_queue - kfree %p",pHeader); + TRACE_M("remove_from_rx_queue - kfree %x",(int)pHeader); - TRACE_Q("remove_from_rx_queue: rx_first = %p, rx_last = %p, count = %d", - pInfo->rx_first, pInfo->rx_last, pInfo->blocks_in_rx_queue ); + TRACE_Q("remove_from_rx_queue: rx_first = %x, rx_last = %x, count = %d", + (int)pInfo->rx_first, (int)pInfo->rx_last, pInfo->blocks_in_rx_queue ); } static void put_char(struct r3964_info *pInfo, unsigned char ch) @@ -506,8 +506,8 @@ static void transmit_block(struct r3964_info *pInfo) if(tty->driver->write_room) room=tty->driver->write_room(tty); - TRACE_PS("transmit_block %p, room %d, length %d", - pBlock, room, pBlock->length); + TRACE_PS("transmit_block %x, room %d, length %d", + (int)pBlock, room, pBlock->length); while(pInfo->tx_position < pBlock->length) { @@ -588,7 +588,7 @@ static void on_receive_block(struct r3964_info *pInfo) /* prepare struct r3964_block_header: */ pBlock = kmalloc(length+sizeof(struct r3964_block_header), GFP_KERNEL); - TRACE_M("on_receive_block - kmalloc %p",pBlock); + TRACE_M("on_receive_block - kmalloc %x",(int)pBlock); if(pBlock==NULL) return; @@ -868,11 +868,11 @@ static int enable_signals(struct r3964_info *pInfo, pid_t pid, int arg) if(pMsg) { kfree(pMsg); - TRACE_M("enable_signals - msg kfree %p",pMsg); + TRACE_M("enable_signals - msg kfree %x",(int)pMsg); } } kfree(pClient); - TRACE_M("enable_signals - kfree %p",pClient); + TRACE_M("enable_signals - kfree %x",(int)pClient); return 0; } } @@ -890,7 +890,7 @@ static int enable_signals(struct r3964_info *pInfo, pid_t pid, int arg) { /* add client to client list */ pClient=kmalloc(sizeof(struct r3964_client_info), GFP_KERNEL); - TRACE_M("enable_signals - kmalloc %p",pClient); + TRACE_M("enable_signals - kmalloc %x",(int)pClient); if(pClient==NULL) return -ENOMEM; @@ -954,7 +954,7 @@ static void add_msg(struct r3964_client_info *pClient, int msg_id, int arg, queue_the_message: pMsg = kmalloc(sizeof(struct r3964_message), GFP_KERNEL); - TRACE_M("add_msg - kmalloc %p",pMsg); + TRACE_M("add_msg - kmalloc %x",(int)pMsg); if(pMsg==NULL) { return; } @@ -1067,11 +1067,11 @@ static int r3964_open(struct tty_struct *tty) struct r3964_info *pInfo; TRACE_L("open"); - TRACE_L("tty=%p, PID=%d, disc_data=%p", - tty, current->pid, tty->disc_data); + TRACE_L("tty=%x, PID=%d, disc_data=%x", + (int)tty, current->pid, (int)tty->disc_data); pInfo=kmalloc(sizeof(struct r3964_info), GFP_KERNEL); - TRACE_M("r3964_open - info kmalloc %p",pInfo); + TRACE_M("r3964_open - info kmalloc %x",(int)pInfo); if(!pInfo) { @@ -1080,26 +1080,26 @@ static int r3964_open(struct tty_struct *tty) } pInfo->rx_buf = kmalloc(RX_BUF_SIZE, GFP_KERNEL); - TRACE_M("r3964_open - rx_buf kmalloc %p",pInfo->rx_buf); + TRACE_M("r3964_open - rx_buf kmalloc %x",(int)pInfo->rx_buf); if(!pInfo->rx_buf) { printk(KERN_ERR "r3964: failed to alloc receive buffer\n"); kfree(pInfo); - TRACE_M("r3964_open - info kfree %p",pInfo); + TRACE_M("r3964_open - info kfree %x",(int)pInfo); return -ENOMEM; } pInfo->tx_buf = kmalloc(TX_BUF_SIZE, GFP_KERNEL); - TRACE_M("r3964_open - tx_buf kmalloc %p",pInfo->tx_buf); + TRACE_M("r3964_open - tx_buf kmalloc %x",(int)pInfo->tx_buf); if(!pInfo->tx_buf) { printk(KERN_ERR "r3964: failed to alloc transmit buffer\n"); kfree(pInfo->rx_buf); - TRACE_M("r3964_open - rx_buf kfree %p",pInfo->rx_buf); + TRACE_M("r3964_open - rx_buf kfree %x",(int)pInfo->rx_buf); kfree(pInfo); - TRACE_M("r3964_open - info kfree %p",pInfo); + TRACE_M("r3964_open - info kfree %x",(int)pInfo); return -ENOMEM; } @@ -1154,11 +1154,11 @@ static void r3964_close(struct tty_struct *tty) if(pMsg) { kfree(pMsg); - TRACE_M("r3964_close - msg kfree %p",pMsg); + TRACE_M("r3964_close - msg kfree %x",(int)pMsg); } } kfree(pClient); - TRACE_M("r3964_close - client kfree %p",pClient); + TRACE_M("r3964_close - client kfree %x",(int)pClient); pClient=pNext; } /* Remove jobs from tx_queue: */ @@ -1177,11 +1177,11 @@ static void r3964_close(struct tty_struct *tty) /* Free buffers: */ wake_up_interruptible(&pInfo->read_wait); kfree(pInfo->rx_buf); - TRACE_M("r3964_close - rx_buf kfree %p",pInfo->rx_buf); + TRACE_M("r3964_close - rx_buf kfree %x",(int)pInfo->rx_buf); kfree(pInfo->tx_buf); - TRACE_M("r3964_close - tx_buf kfree %p",pInfo->tx_buf); + TRACE_M("r3964_close - tx_buf kfree %x",(int)pInfo->tx_buf); kfree(pInfo); - TRACE_M("r3964_close - info kfree %p",pInfo); + TRACE_M("r3964_close - info kfree %x",(int)pInfo); } static ssize_t r3964_read(struct tty_struct *tty, struct file *file, @@ -1234,7 +1234,7 @@ static ssize_t r3964_read(struct tty_struct *tty, struct file *file, count = sizeof(struct r3964_client_message); kfree(pMsg); - TRACE_M("r3964_read - msg kfree %p",pMsg); + TRACE_M("r3964_read - msg kfree %x",(int)pMsg); if (copy_to_user(buf,&theMsg, count)) return -EFAULT; @@ -1279,7 +1279,7 @@ static ssize_t r3964_write(struct tty_struct * tty, struct file * file, * Allocate a buffer for the data and copy it from the buffer with header prepended */ new_data = kmalloc (count+sizeof(struct r3964_block_header), GFP_KERNEL); - TRACE_M("r3964_write - kmalloc %p",new_data); + TRACE_M("r3964_write - kmalloc %x",(int)new_data); if (new_data == NULL) { if (pInfo->flags & R3964_DEBUG) { diff --git a/trunk/drivers/char/watchdog/mv64x60_wdt.c b/trunk/drivers/char/watchdog/mv64x60_wdt.c index 6d3ff0836c44..1436aea3b28f 100644 --- a/trunk/drivers/char/watchdog/mv64x60_wdt.c +++ b/trunk/drivers/char/watchdog/mv64x60_wdt.c @@ -87,8 +87,6 @@ static int mv64x60_wdt_open(struct inode *inode, struct file *file) mv64x60_wdt_service(); mv64x60_wdt_handler_enable(); - nonseekable_open(inode, file); - return 0; } @@ -105,9 +103,12 @@ static int mv64x60_wdt_release(struct inode *inode, struct file *file) return 0; } -static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data, +static ssize_t mv64x60_wdt_write(struct file *file, const char *data, size_t len, loff_t * ppos) { + if (*ppos != file->f_pos) + return -ESPIPE; + if (len) mv64x60_wdt_service(); @@ -118,7 +119,6 @@ static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { int timeout; - void __user *argp = (void __user *)arg; static struct watchdog_info info = { .options = WDIOF_KEEPALIVEPING, .firmware_version = 0, @@ -127,13 +127,13 @@ static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file, switch (cmd) { case WDIOC_GETSUPPORT: - if (copy_to_user(argp, &info, sizeof(info))) + if (copy_to_user((void *)arg, &info, sizeof(info))) return -EFAULT; break; case WDIOC_GETSTATUS: case WDIOC_GETBOOTSTATUS: - if (put_user(wdt_status, (int __user *)argp)) + if (put_user(wdt_status, (int *)arg)) return -EFAULT; wdt_status &= ~WDIOF_KEEPALIVEPING; break; @@ -154,7 +154,7 @@ static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file, case WDIOC_GETTIMEOUT: timeout = mv64x60_wdt_timeout * HZ; - if (put_user(timeout, (int __user *)argp)) + if (put_user(timeout, (int *)arg)) return -EFAULT; break; diff --git a/trunk/drivers/isdn/divert/divert_procfs.c b/trunk/drivers/isdn/divert/divert_procfs.c index 0b0ea26023e5..e1f0d87de0eb 100644 --- a/trunk/drivers/isdn/divert/divert_procfs.c +++ b/trunk/drivers/isdn/divert/divert_procfs.c @@ -287,12 +287,12 @@ divert_dev_init(void) init_waitqueue_head(&rd_queue); #ifdef CONFIG_PROC_FS - isdn_proc_entry = proc_mkdir("net/isdn", NULL); + isdn_proc_entry = create_proc_entry("isdn", S_IFDIR | S_IRUGO | S_IXUGO, proc_net); if (!isdn_proc_entry) return (-1); isdn_divert_entry = create_proc_entry("divert", S_IFREG | S_IRUGO, isdn_proc_entry); if (!isdn_divert_entry) { - remove_proc_entry("net/isdn", NULL); + remove_proc_entry("isdn", proc_net); return (-1); } isdn_divert_entry->proc_fops = &isdn_fops; @@ -312,7 +312,7 @@ divert_dev_deinit(void) #ifdef CONFIG_PROC_FS remove_proc_entry("divert", isdn_proc_entry); - remove_proc_entry("net/isdn", NULL); + remove_proc_entry("isdn", proc_net); #endif /* CONFIG_PROC_FS */ return (0); diff --git a/trunk/drivers/isdn/hardware/eicon/diva_didd.c b/trunk/drivers/isdn/hardware/eicon/diva_didd.c index 27204f4b111a..7fdf8ae5be52 100644 --- a/trunk/drivers/isdn/hardware/eicon/diva_didd.c +++ b/trunk/drivers/isdn/hardware/eicon/diva_didd.c @@ -30,6 +30,8 @@ static char *DRIVERNAME = static char *DRIVERLNAME = "divadidd"; char *DRIVERRELEASE_DIDD = "2.0"; +static char *main_proc_dir = "eicon"; + MODULE_DESCRIPTION("DIDD table driver for diva drivers"); MODULE_AUTHOR("Cytronics & Melware, Eicon Networks"); MODULE_SUPPORTED_DEVICE("Eicon diva drivers"); @@ -87,7 +89,7 @@ proc_read(char *page, char **start, off_t off, int count, int *eof, static int DIVA_INIT_FUNCTION create_proc(void) { - proc_net_eicon = proc_mkdir("net/eicon", NULL); + proc_net_eicon = create_proc_entry(main_proc_dir, S_IFDIR, proc_net); if (proc_net_eicon) { if ((proc_didd = @@ -103,7 +105,7 @@ static int DIVA_INIT_FUNCTION create_proc(void) static void DIVA_EXIT_FUNCTION remove_proc(void) { remove_proc_entry(DRIVERLNAME, proc_net_eicon); - remove_proc_entry("net/eicon", NULL); + remove_proc_entry(main_proc_dir, proc_net); } static int DIVA_INIT_FUNCTION divadidd_init(void) diff --git a/trunk/drivers/isdn/hardware/eicon/divasproc.c b/trunk/drivers/isdn/hardware/eicon/divasproc.c index c12efa6f8429..b6435589d459 100644 --- a/trunk/drivers/isdn/hardware/eicon/divasproc.c +++ b/trunk/drivers/isdn/hardware/eicon/divasproc.c @@ -381,7 +381,7 @@ int create_adapter_proc(diva_os_xdi_adapter_t * a) char tmp[16]; sprintf(tmp, "%s%d", adapter_dir_name, a->controller); - if (!(de = proc_mkdir(tmp, proc_net_eicon))) + if (!(de = create_proc_entry(tmp, S_IFDIR, proc_net_eicon))) return (0); a->proc_adapter_dir = (void *) de; diff --git a/trunk/drivers/isdn/hysdn/hysdn_procconf.c b/trunk/drivers/isdn/hysdn/hysdn_procconf.c index 639582f61f41..5da507e532fc 100644 --- a/trunk/drivers/isdn/hysdn/hysdn_procconf.c +++ b/trunk/drivers/isdn/hysdn/hysdn_procconf.c @@ -394,7 +394,7 @@ hysdn_procconf_init(void) hysdn_card *card; uchar conf_name[20]; - hysdn_proc_entry = proc_mkdir(PROC_SUBDIR_NAME, proc_net); + hysdn_proc_entry = create_proc_entry(PROC_SUBDIR_NAME, S_IFDIR | S_IRUGO | S_IXUGO, proc_net); if (!hysdn_proc_entry) { printk(KERN_ERR "HYSDN: unable to create hysdn subdir\n"); return (-1); diff --git a/trunk/drivers/macintosh/smu.c b/trunk/drivers/macintosh/smu.c index 9b38674fbf75..a85ac18dd21d 100644 --- a/trunk/drivers/macintosh/smu.c +++ b/trunk/drivers/macintosh/smu.c @@ -153,10 +153,8 @@ static irqreturn_t smu_db_intr(int irq, void *arg, struct pt_regs *regs) spin_lock_irqsave(&smu->lock, flags); gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); - if ((gpio & 7) != 7) { - spin_unlock_irqrestore(&smu->lock, flags); + if ((gpio & 7) != 7) return IRQ_HANDLED; - } cmd = smu->cmd_cur; smu->cmd_cur = NULL; diff --git a/trunk/drivers/media/video/cpia.c b/trunk/drivers/media/video/cpia.c index b7ec9bf45085..8c08b7f1ad23 100644 --- a/trunk/drivers/media/video/cpia.c +++ b/trunk/drivers/media/video/cpia.c @@ -1397,7 +1397,7 @@ static void destroy_proc_cpia_cam(struct cam_data *cam) static void proc_cpia_create(void) { - cpia_proc_root = proc_mkdir("cpia", NULL); + cpia_proc_root = create_proc_entry("cpia", S_IFDIR, NULL); if (cpia_proc_root) cpia_proc_root->owner = THIS_MODULE; diff --git a/trunk/drivers/media/video/rds.h b/trunk/drivers/media/video/rds.h index 0d30eb744e61..30337d0f1a87 100644 --- a/trunk/drivers/media/video/rds.h +++ b/trunk/drivers/media/video/rds.h @@ -31,7 +31,7 @@ struct rds_command { unsigned int block_count; int result; - unsigned char __user *buffer; + unsigned char *buffer; struct file *instance; poll_table *event_list; }; diff --git a/trunk/drivers/media/video/saa6588.c b/trunk/drivers/media/video/saa6588.c index 72b70eb5da1d..1a657a70ff43 100644 --- a/trunk/drivers/media/video/saa6588.c +++ b/trunk/drivers/media/video/saa6588.c @@ -157,7 +157,7 @@ static struct i2c_client client_template; /* ---------------------------------------------------------------------- */ -static int block_to_user_buf(struct saa6588 *s, unsigned char __user *user_buf) +static int block_to_user_buf(struct saa6588 *s, unsigned char *user_buf) { int i; @@ -191,7 +191,7 @@ static void read_from_buf(struct saa6588 *s, struct rds_command *a) { unsigned long flags; - unsigned char __user *buf_ptr = a->buffer; + unsigned char *buf_ptr = a->buffer; /* This is a user space buffer! */ unsigned int i; unsigned int rd_blocks; diff --git a/trunk/drivers/mtd/maps/ixp4xx.c b/trunk/drivers/mtd/maps/ixp4xx.c index bbb0e6e569a6..5afe660aa2c4 100644 --- a/trunk/drivers/mtd/maps/ixp4xx.c +++ b/trunk/drivers/mtd/maps/ixp4xx.c @@ -254,6 +254,6 @@ module_init(ixp4xx_flash_init); module_exit(ixp4xx_flash_exit); MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("MTD map driver for Intel IXP4xx systems"); +MODULE_DESCRIPTION("MTD map driver for Intel IXP4xx systems") MODULE_AUTHOR("Deepak Saxena"); diff --git a/trunk/drivers/net/Kconfig b/trunk/drivers/net/Kconfig index 2a908c4690a7..96f14ab1c1f5 100644 --- a/trunk/drivers/net/Kconfig +++ b/trunk/drivers/net/Kconfig @@ -548,14 +548,6 @@ config SUNGEM Support for the Sun GEM chip, aka Sun GigabitEthernet/P 2.0. See also . -config CASSINI - tristate "Sun Cassini support" - depends on NET_ETHERNET && PCI - select CRC32 - help - Support for the Sun Cassini chip, aka Sun GigaSwift Ethernet. See also - - config NET_VENDOR_3COM bool "3COM cards" depends on NET_ETHERNET && (ISA || EISA || MCA || PCI) diff --git a/trunk/drivers/net/Makefile b/trunk/drivers/net/Makefile index 8aeec9f2495b..8645c843cf4d 100644 --- a/trunk/drivers/net/Makefile +++ b/trunk/drivers/net/Makefile @@ -28,7 +28,6 @@ obj-$(CONFIG_SUNQE) += sunqe.o obj-$(CONFIG_SUNBMAC) += sunbmac.o obj-$(CONFIG_MYRI_SBUS) += myri_sbus.o obj-$(CONFIG_SUNGEM) += sungem.o sungem_phy.o -obj-$(CONFIG_CASSINI) += cassini.o obj-$(CONFIG_MACE) += mace.o obj-$(CONFIG_BMAC) += bmac.o diff --git a/trunk/drivers/net/cassini.c b/trunk/drivers/net/cassini.c deleted file mode 100644 index 69cb368247e7..000000000000 --- a/trunk/drivers/net/cassini.c +++ /dev/null @@ -1,5311 +0,0 @@ -/* cassini.c: Sun Microsystems Cassini(+) ethernet driver. - * - * Copyright (C) 2004 Sun Microsystems Inc. - * Copyright (C) 2003 Adrian Sun (asun@darksunrising.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA - * 02111-1307, USA. - * - * This driver uses the sungem driver (c) David Miller - * (davem@redhat.com) as its basis. - * - * The cassini chip has a number of features that distinguish it from - * the gem chip: - * 4 transmit descriptor rings that are used for either QoS (VLAN) or - * load balancing (non-VLAN mode) - * batching of multiple packets - * multiple CPU dispatching - * page-based RX descriptor engine with separate completion rings - * Gigabit support (GMII and PCS interface) - * MIF link up/down detection works - * - * RX is handled by page sized buffers that are attached as fragments to - * the skb. here's what's done: - * -- driver allocates pages at a time and keeps reference counts - * on them. - * -- the upper protocol layers assume that the header is in the skb - * itself. as a result, cassini will copy a small amount (64 bytes) - * to make them happy. - * -- driver appends the rest of the data pages as frags to skbuffs - * and increments the reference count - * -- on page reclamation, the driver swaps the page with a spare page. - * if that page is still in use, it frees its reference to that page, - * and allocates a new page for use. otherwise, it just recycles the - * the page. - * - * NOTE: cassini can parse the header. however, it's not worth it - * as long as the network stack requires a header copy. - * - * TX has 4 queues. currently these queues are used in a round-robin - * fashion for load balancing. They can also be used for QoS. for that - * to work, however, QoS information needs to be exposed down to the driver - * level so that subqueues get targetted to particular transmit rings. - * alternatively, the queues can be configured via use of the all-purpose - * ioctl. - * - * RX DATA: the rx completion ring has all the info, but the rx desc - * ring has all of the data. RX can conceivably come in under multiple - * interrupts, but the INT# assignment needs to be set up properly by - * the BIOS and conveyed to the driver. PCI BIOSes don't know how to do - * that. also, the two descriptor rings are designed to distinguish between - * encrypted and non-encrypted packets, but we use them for buffering - * instead. - * - * by default, the selective clear mask is set up to process rx packets. - */ - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include - -#define cas_page_map(x) kmap_atomic((x), KM_SKB_DATA_SOFTIRQ) -#define cas_page_unmap(x) kunmap_atomic((x), KM_SKB_DATA_SOFTIRQ) -#define CAS_NCPUS num_online_cpus() - -#if defined(CONFIG_CASSINI_NAPI) && defined(HAVE_NETDEV_POLL) -#define USE_NAPI -#define cas_skb_release(x) netif_receive_skb(x) -#else -#define cas_skb_release(x) netif_rx(x) -#endif - -/* select which firmware to use */ -#define USE_HP_WORKAROUND -#define HP_WORKAROUND_DEFAULT /* select which firmware to use as default */ -#define CAS_HP_ALT_FIRMWARE cas_prog_null /* alternate firmware */ - -#include "cassini.h" - -#define USE_TX_COMPWB /* use completion writeback registers */ -#define USE_CSMA_CD_PROTO /* standard CSMA/CD */ -#define USE_RX_BLANK /* hw interrupt mitigation */ -#undef USE_ENTROPY_DEV /* don't test for entropy device */ - -/* NOTE: these aren't useable unless PCI interrupts can be assigned. - * also, we need to make cp->lock finer-grained. - */ -#undef USE_PCI_INTB -#undef USE_PCI_INTC -#undef USE_PCI_INTD -#undef USE_QOS - -#undef USE_VPD_DEBUG /* debug vpd information if defined */ - -/* rx processing options */ -#define USE_PAGE_ORDER /* specify to allocate large rx pages */ -#define RX_DONT_BATCH 0 /* if 1, don't batch flows */ -#define RX_COPY_ALWAYS 0 /* if 0, use frags */ -#define RX_COPY_MIN 64 /* copy a little to make upper layers happy */ -#undef RX_COUNT_BUFFERS /* define to calculate RX buffer stats */ - -#define DRV_MODULE_NAME "cassini" -#define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "1.4" -#define DRV_MODULE_RELDATE "1 July 2004" - -#define CAS_DEF_MSG_ENABLE \ - (NETIF_MSG_DRV | \ - NETIF_MSG_PROBE | \ - NETIF_MSG_LINK | \ - NETIF_MSG_TIMER | \ - NETIF_MSG_IFDOWN | \ - NETIF_MSG_IFUP | \ - NETIF_MSG_RX_ERR | \ - NETIF_MSG_TX_ERR) - -/* length of time before we decide the hardware is borked, - * and dev->tx_timeout() should be called to fix the problem - */ -#define CAS_TX_TIMEOUT (HZ) -#define CAS_LINK_TIMEOUT (22*HZ/10) -#define CAS_LINK_FAST_TIMEOUT (1) - -/* timeout values for state changing. these specify the number - * of 10us delays to be used before giving up. - */ -#define STOP_TRIES_PHY 1000 -#define STOP_TRIES 5000 - -/* specify a minimum frame size to deal with some fifo issues - * max mtu == 2 * page size - ethernet header - 64 - swivel = - * 2 * page_size - 0x50 - */ -#define CAS_MIN_FRAME 97 -#define CAS_1000MB_MIN_FRAME 255 -#define CAS_MIN_MTU 60 -#define CAS_MAX_MTU min(((cp->page_size << 1) - 0x50), 9000) - -#if 1 -/* - * Eliminate these and use separate atomic counters for each, to - * avoid a race condition. - */ -#else -#define CAS_RESET_MTU 1 -#define CAS_RESET_ALL 2 -#define CAS_RESET_SPARE 3 -#endif - -static char version[] __devinitdata = - DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; - -MODULE_AUTHOR("Adrian Sun (asun@darksunrising.com)"); -MODULE_DESCRIPTION("Sun Cassini(+) ethernet driver"); -MODULE_LICENSE("GPL"); -MODULE_PARM(cassini_debug, "i"); -MODULE_PARM_DESC(cassini_debug, "Cassini bitmapped debugging message enable value"); -MODULE_PARM(link_mode, "i"); -MODULE_PARM_DESC(link_mode, "default link mode"); - -/* - * Work around for a PCS bug in which the link goes down due to the chip - * being confused and never showing a link status of "up." - */ -#define DEFAULT_LINKDOWN_TIMEOUT 5 -/* - * Value in seconds, for user input. - */ -static int linkdown_timeout = DEFAULT_LINKDOWN_TIMEOUT; -MODULE_PARM(linkdown_timeout, "i"); -MODULE_PARM_DESC(linkdown_timeout, -"min reset interval in sec. for PCS linkdown issue; disabled if not positive"); - -/* - * value in 'ticks' (units used by jiffies). Set when we init the - * module because 'HZ' in actually a function call on some flavors of - * Linux. This will default to DEFAULT_LINKDOWN_TIMEOUT * HZ. - */ -static int link_transition_timeout; - - -static int cassini_debug = -1; /* -1 == use CAS_DEF_MSG_ENABLE as value */ -static int link_mode; - -static u16 link_modes[] __devinitdata = { - BMCR_ANENABLE, /* 0 : autoneg */ - 0, /* 1 : 10bt half duplex */ - BMCR_SPEED100, /* 2 : 100bt half duplex */ - BMCR_FULLDPLX, /* 3 : 10bt full duplex */ - BMCR_SPEED100|BMCR_FULLDPLX, /* 4 : 100bt full duplex */ - CAS_BMCR_SPEED1000|BMCR_FULLDPLX /* 5 : 1000bt full duplex */ -}; - -static struct pci_device_id cas_pci_tbl[] __devinitdata = { - { PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_CASSINI, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, - { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SATURN, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, - { 0, } -}; - -MODULE_DEVICE_TABLE(pci, cas_pci_tbl); - -static void cas_set_link_modes(struct cas *cp); - -static inline void cas_lock_tx(struct cas *cp) -{ - int i; - - for (i = 0; i < N_TX_RINGS; i++) - spin_lock(&cp->tx_lock[i]); -} - -static inline void cas_lock_all(struct cas *cp) -{ - spin_lock_irq(&cp->lock); - cas_lock_tx(cp); -} - -/* WTZ: QA was finding deadlock problems with the previous - * versions after long test runs with multiple cards per machine. - * See if replacing cas_lock_all with safer versions helps. The - * symptoms QA is reporting match those we'd expect if interrupts - * aren't being properly restored, and we fixed a previous deadlock - * with similar symptoms by using save/restore versions in other - * places. - */ -#define cas_lock_all_save(cp, flags) \ -do { \ - struct cas *xxxcp = (cp); \ - spin_lock_irqsave(&xxxcp->lock, flags); \ - cas_lock_tx(xxxcp); \ -} while (0) - -static inline void cas_unlock_tx(struct cas *cp) -{ - int i; - - for (i = N_TX_RINGS; i > 0; i--) - spin_unlock(&cp->tx_lock[i - 1]); -} - -static inline void cas_unlock_all(struct cas *cp) -{ - cas_unlock_tx(cp); - spin_unlock_irq(&cp->lock); -} - -#define cas_unlock_all_restore(cp, flags) \ -do { \ - struct cas *xxxcp = (cp); \ - cas_unlock_tx(xxxcp); \ - spin_unlock_irqrestore(&xxxcp->lock, flags); \ -} while (0) - -static void cas_disable_irq(struct cas *cp, const int ring) -{ - /* Make sure we won't get any more interrupts */ - if (ring == 0) { - writel(0xFFFFFFFF, cp->regs + REG_INTR_MASK); - return; - } - - /* disable completion interrupts and selectively mask */ - if (cp->cas_flags & CAS_FLAG_REG_PLUS) { - switch (ring) { -#if defined (USE_PCI_INTB) || defined(USE_PCI_INTC) || defined(USE_PCI_INTD) -#ifdef USE_PCI_INTB - case 1: -#endif -#ifdef USE_PCI_INTC - case 2: -#endif -#ifdef USE_PCI_INTD - case 3: -#endif - writel(INTRN_MASK_CLEAR_ALL | INTRN_MASK_RX_EN, - cp->regs + REG_PLUS_INTRN_MASK(ring)); - break; -#endif - default: - writel(INTRN_MASK_CLEAR_ALL, cp->regs + - REG_PLUS_INTRN_MASK(ring)); - break; - } - } -} - -static inline void cas_mask_intr(struct cas *cp) -{ - int i; - - for (i = 0; i < N_RX_COMP_RINGS; i++) - cas_disable_irq(cp, i); -} - -static void cas_enable_irq(struct cas *cp, const int ring) -{ - if (ring == 0) { /* all but TX_DONE */ - writel(INTR_TX_DONE, cp->regs + REG_INTR_MASK); - return; - } - - if (cp->cas_flags & CAS_FLAG_REG_PLUS) { - switch (ring) { -#if defined (USE_PCI_INTB) || defined(USE_PCI_INTC) || defined(USE_PCI_INTD) -#ifdef USE_PCI_INTB - case 1: -#endif -#ifdef USE_PCI_INTC - case 2: -#endif -#ifdef USE_PCI_INTD - case 3: -#endif - writel(INTRN_MASK_RX_EN, cp->regs + - REG_PLUS_INTRN_MASK(ring)); - break; -#endif - default: - break; - } - } -} - -static inline void cas_unmask_intr(struct cas *cp) -{ - int i; - - for (i = 0; i < N_RX_COMP_RINGS; i++) - cas_enable_irq(cp, i); -} - -static inline void cas_entropy_gather(struct cas *cp) -{ -#ifdef USE_ENTROPY_DEV - if ((cp->cas_flags & CAS_FLAG_ENTROPY_DEV) == 0) - return; - - batch_entropy_store(readl(cp->regs + REG_ENTROPY_IV), - readl(cp->regs + REG_ENTROPY_IV), - sizeof(uint64_t)*8); -#endif -} - -static inline void cas_entropy_reset(struct cas *cp) -{ -#ifdef USE_ENTROPY_DEV - if ((cp->cas_flags & CAS_FLAG_ENTROPY_DEV) == 0) - return; - - writel(BIM_LOCAL_DEV_PAD | BIM_LOCAL_DEV_PROM | BIM_LOCAL_DEV_EXT, - cp->regs + REG_BIM_LOCAL_DEV_EN); - writeb(ENTROPY_RESET_STC_MODE, cp->regs + REG_ENTROPY_RESET); - writeb(0x55, cp->regs + REG_ENTROPY_RAND_REG); - - /* if we read back 0x0, we don't have an entropy device */ - if (readb(cp->regs + REG_ENTROPY_RAND_REG) == 0) - cp->cas_flags &= ~CAS_FLAG_ENTROPY_DEV; -#endif -} - -/* access to the phy. the following assumes that we've initialized the MIF to - * be in frame rather than bit-bang mode - */ -static u16 cas_phy_read(struct cas *cp, int reg) -{ - u32 cmd; - int limit = STOP_TRIES_PHY; - - cmd = MIF_FRAME_ST | MIF_FRAME_OP_READ; - cmd |= CAS_BASE(MIF_FRAME_PHY_ADDR, cp->phy_addr); - cmd |= CAS_BASE(MIF_FRAME_REG_ADDR, reg); - cmd |= MIF_FRAME_TURN_AROUND_MSB; - writel(cmd, cp->regs + REG_MIF_FRAME); - - /* poll for completion */ - while (limit-- > 0) { - udelay(10); - cmd = readl(cp->regs + REG_MIF_FRAME); - if (cmd & MIF_FRAME_TURN_AROUND_LSB) - return (cmd & MIF_FRAME_DATA_MASK); - } - return 0xFFFF; /* -1 */ -} - -static int cas_phy_write(struct cas *cp, int reg, u16 val) -{ - int limit = STOP_TRIES_PHY; - u32 cmd; - - cmd = MIF_FRAME_ST | MIF_FRAME_OP_WRITE; - cmd |= CAS_BASE(MIF_FRAME_PHY_ADDR, cp->phy_addr); - cmd |= CAS_BASE(MIF_FRAME_REG_ADDR, reg); - cmd |= MIF_FRAME_TURN_AROUND_MSB; - cmd |= val & MIF_FRAME_DATA_MASK; - writel(cmd, cp->regs + REG_MIF_FRAME); - - /* poll for completion */ - while (limit-- > 0) { - udelay(10); - cmd = readl(cp->regs + REG_MIF_FRAME); - if (cmd & MIF_FRAME_TURN_AROUND_LSB) - return 0; - } - return -1; -} - -static void cas_phy_powerup(struct cas *cp) -{ - u16 ctl = cas_phy_read(cp, MII_BMCR); - - if ((ctl & BMCR_PDOWN) == 0) - return; - ctl &= ~BMCR_PDOWN; - cas_phy_write(cp, MII_BMCR, ctl); -} - -static void cas_phy_powerdown(struct cas *cp) -{ - u16 ctl = cas_phy_read(cp, MII_BMCR); - - if (ctl & BMCR_PDOWN) - return; - ctl |= BMCR_PDOWN; - cas_phy_write(cp, MII_BMCR, ctl); -} - -/* cp->lock held. note: the last put_page will free the buffer */ -static int cas_page_free(struct cas *cp, cas_page_t *page) -{ - pci_unmap_page(cp->pdev, page->dma_addr, cp->page_size, - PCI_DMA_FROMDEVICE); - __free_pages(page->buffer, cp->page_order); - kfree(page); - return 0; -} - -#ifdef RX_COUNT_BUFFERS -#define RX_USED_ADD(x, y) ((x)->used += (y)) -#define RX_USED_SET(x, y) ((x)->used = (y)) -#else -#define RX_USED_ADD(x, y) -#define RX_USED_SET(x, y) -#endif - -/* local page allocation routines for the receive buffers. jumbo pages - * require at least 8K contiguous and 8K aligned buffers. - */ -static cas_page_t *cas_page_alloc(struct cas *cp, const int flags) -{ - cas_page_t *page; - - page = kmalloc(sizeof(cas_page_t), flags); - if (!page) - return NULL; - - INIT_LIST_HEAD(&page->list); - RX_USED_SET(page, 0); - page->buffer = alloc_pages(flags, cp->page_order); - if (!page->buffer) - goto page_err; - page->dma_addr = pci_map_page(cp->pdev, page->buffer, 0, - cp->page_size, PCI_DMA_FROMDEVICE); - return page; - -page_err: - kfree(page); - return NULL; -} - -/* initialize spare pool of rx buffers, but allocate during the open */ -static void cas_spare_init(struct cas *cp) -{ - spin_lock(&cp->rx_inuse_lock); - INIT_LIST_HEAD(&cp->rx_inuse_list); - spin_unlock(&cp->rx_inuse_lock); - - spin_lock(&cp->rx_spare_lock); - INIT_LIST_HEAD(&cp->rx_spare_list); - cp->rx_spares_needed = RX_SPARE_COUNT; - spin_unlock(&cp->rx_spare_lock); -} - -/* used on close. free all the spare buffers. */ -static void cas_spare_free(struct cas *cp) -{ - struct list_head list, *elem, *tmp; - - /* free spare buffers */ - INIT_LIST_HEAD(&list); - spin_lock(&cp->rx_spare_lock); - list_splice(&cp->rx_spare_list, &list); - INIT_LIST_HEAD(&cp->rx_spare_list); - spin_unlock(&cp->rx_spare_lock); - list_for_each_safe(elem, tmp, &list) { - cas_page_free(cp, list_entry(elem, cas_page_t, list)); - } - - INIT_LIST_HEAD(&list); -#if 1 - /* - * Looks like Adrian had protected this with a different - * lock than used everywhere else to manipulate this list. - */ - spin_lock(&cp->rx_inuse_lock); - list_splice(&cp->rx_inuse_list, &list); - INIT_LIST_HEAD(&cp->rx_inuse_list); - spin_unlock(&cp->rx_inuse_lock); -#else - spin_lock(&cp->rx_spare_lock); - list_splice(&cp->rx_inuse_list, &list); - INIT_LIST_HEAD(&cp->rx_inuse_list); - spin_unlock(&cp->rx_spare_lock); -#endif - list_for_each_safe(elem, tmp, &list) { - cas_page_free(cp, list_entry(elem, cas_page_t, list)); - } -} - -/* replenish spares if needed */ -static void cas_spare_recover(struct cas *cp, const int flags) -{ - struct list_head list, *elem, *tmp; - int needed, i; - - /* check inuse list. if we don't need any more free buffers, - * just free it - */ - - /* make a local copy of the list */ - INIT_LIST_HEAD(&list); - spin_lock(&cp->rx_inuse_lock); - list_splice(&cp->rx_inuse_list, &list); - INIT_LIST_HEAD(&cp->rx_inuse_list); - spin_unlock(&cp->rx_inuse_lock); - - list_for_each_safe(elem, tmp, &list) { - cas_page_t *page = list_entry(elem, cas_page_t, list); - - if (page_count(page->buffer) > 1) - continue; - - list_del(elem); - spin_lock(&cp->rx_spare_lock); - if (cp->rx_spares_needed > 0) { - list_add(elem, &cp->rx_spare_list); - cp->rx_spares_needed--; - spin_unlock(&cp->rx_spare_lock); - } else { - spin_unlock(&cp->rx_spare_lock); - cas_page_free(cp, page); - } - } - - /* put any inuse buffers back on the list */ - if (!list_empty(&list)) { - spin_lock(&cp->rx_inuse_lock); - list_splice(&list, &cp->rx_inuse_list); - spin_unlock(&cp->rx_inuse_lock); - } - - spin_lock(&cp->rx_spare_lock); - needed = cp->rx_spares_needed; - spin_unlock(&cp->rx_spare_lock); - if (!needed) - return; - - /* we still need spares, so try to allocate some */ - INIT_LIST_HEAD(&list); - i = 0; - while (i < needed) { - cas_page_t *spare = cas_page_alloc(cp, flags); - if (!spare) - break; - list_add(&spare->list, &list); - i++; - } - - spin_lock(&cp->rx_spare_lock); - list_splice(&list, &cp->rx_spare_list); - cp->rx_spares_needed -= i; - spin_unlock(&cp->rx_spare_lock); -} - -/* pull a page from the list. */ -static cas_page_t *cas_page_dequeue(struct cas *cp) -{ - struct list_head *entry; - int recover; - - spin_lock(&cp->rx_spare_lock); - if (list_empty(&cp->rx_spare_list)) { - /* try to do a quick recovery */ - spin_unlock(&cp->rx_spare_lock); - cas_spare_recover(cp, GFP_ATOMIC); - spin_lock(&cp->rx_spare_lock); - if (list_empty(&cp->rx_spare_list)) { - if (netif_msg_rx_err(cp)) - printk(KERN_ERR "%s: no spare buffers " - "available.\n", cp->dev->name); - spin_unlock(&cp->rx_spare_lock); - return NULL; - } - } - - entry = cp->rx_spare_list.next; - list_del(entry); - recover = ++cp->rx_spares_needed; - spin_unlock(&cp->rx_spare_lock); - - /* trigger the timer to do the recovery */ - if ((recover & (RX_SPARE_RECOVER_VAL - 1)) == 0) { -#if 1 - atomic_inc(&cp->reset_task_pending); - atomic_inc(&cp->reset_task_pending_spare); - schedule_work(&cp->reset_task); -#else - atomic_set(&cp->reset_task_pending, CAS_RESET_SPARE); - schedule_work(&cp->reset_task); -#endif - } - return list_entry(entry, cas_page_t, list); -} - - -static void cas_mif_poll(struct cas *cp, const int enable) -{ - u32 cfg; - - cfg = readl(cp->regs + REG_MIF_CFG); - cfg &= (MIF_CFG_MDIO_0 | MIF_CFG_MDIO_1); - - if (cp->phy_type & CAS_PHY_MII_MDIO1) - cfg |= MIF_CFG_PHY_SELECT; - - /* poll and interrupt on link status change. */ - if (enable) { - cfg |= MIF_CFG_POLL_EN; - cfg |= CAS_BASE(MIF_CFG_POLL_REG, MII_BMSR); - cfg |= CAS_BASE(MIF_CFG_POLL_PHY, cp->phy_addr); - } - writel((enable) ? ~(BMSR_LSTATUS | BMSR_ANEGCOMPLETE) : 0xFFFF, - cp->regs + REG_MIF_MASK); - writel(cfg, cp->regs + REG_MIF_CFG); -} - -/* Must be invoked under cp->lock */ -static void cas_begin_auto_negotiation(struct cas *cp, struct ethtool_cmd *ep) -{ - u16 ctl; -#if 1 - int lcntl; - int changed = 0; - int oldstate = cp->lstate; - int link_was_not_down = !(oldstate == link_down); -#endif - /* Setup link parameters */ - if (!ep) - goto start_aneg; - lcntl = cp->link_cntl; - if (ep->autoneg == AUTONEG_ENABLE) - cp->link_cntl = BMCR_ANENABLE; - else { - cp->link_cntl = 0; - if (ep->speed == SPEED_100) - cp->link_cntl |= BMCR_SPEED100; - else if (ep->speed == SPEED_1000) - cp->link_cntl |= CAS_BMCR_SPEED1000; - if (ep->duplex == DUPLEX_FULL) - cp->link_cntl |= BMCR_FULLDPLX; - } -#if 1 - changed = (lcntl != cp->link_cntl); -#endif -start_aneg: - if (cp->lstate == link_up) { - printk(KERN_INFO "%s: PCS link down.\n", - cp->dev->name); - } else { - if (changed) { - printk(KERN_INFO "%s: link configuration changed\n", - cp->dev->name); - } - } - cp->lstate = link_down; - cp->link_transition = LINK_TRANSITION_LINK_DOWN; - if (!cp->hw_running) - return; -#if 1 - /* - * WTZ: If the old state was link_up, we turn off the carrier - * to replicate everything we do elsewhere on a link-down - * event when we were already in a link-up state.. - */ - if (oldstate == link_up) - netif_carrier_off(cp->dev); - if (changed && link_was_not_down) { - /* - * WTZ: This branch will simply schedule a full reset after - * we explicitly changed link modes in an ioctl. See if this - * fixes the link-problems we were having for forced mode. - */ - atomic_inc(&cp->reset_task_pending); - atomic_inc(&cp->reset_task_pending_all); - schedule_work(&cp->reset_task); - cp->timer_ticks = 0; - mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); - return; - } -#endif - if (cp->phy_type & CAS_PHY_SERDES) { - u32 val = readl(cp->regs + REG_PCS_MII_CTRL); - - if (cp->link_cntl & BMCR_ANENABLE) { - val |= (PCS_MII_RESTART_AUTONEG | PCS_MII_AUTONEG_EN); - cp->lstate = link_aneg; - } else { - if (cp->link_cntl & BMCR_FULLDPLX) - val |= PCS_MII_CTRL_DUPLEX; - val &= ~PCS_MII_AUTONEG_EN; - cp->lstate = link_force_ok; - } - cp->link_transition = LINK_TRANSITION_LINK_CONFIG; - writel(val, cp->regs + REG_PCS_MII_CTRL); - - } else { - cas_mif_poll(cp, 0); - ctl = cas_phy_read(cp, MII_BMCR); - ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | - CAS_BMCR_SPEED1000 | BMCR_ANENABLE); - ctl |= cp->link_cntl; - if (ctl & BMCR_ANENABLE) { - ctl |= BMCR_ANRESTART; - cp->lstate = link_aneg; - } else { - cp->lstate = link_force_ok; - } - cp->link_transition = LINK_TRANSITION_LINK_CONFIG; - cas_phy_write(cp, MII_BMCR, ctl); - cas_mif_poll(cp, 1); - } - - cp->timer_ticks = 0; - mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); -} - -/* Must be invoked under cp->lock. */ -static int cas_reset_mii_phy(struct cas *cp) -{ - int limit = STOP_TRIES_PHY; - u16 val; - - cas_phy_write(cp, MII_BMCR, BMCR_RESET); - udelay(100); - while (limit--) { - val = cas_phy_read(cp, MII_BMCR); - if ((val & BMCR_RESET) == 0) - break; - udelay(10); - } - return (limit <= 0); -} - -static void cas_saturn_firmware_load(struct cas *cp) -{ - cas_saturn_patch_t *patch = cas_saturn_patch; - - cas_phy_powerdown(cp); - - /* expanded memory access mode */ - cas_phy_write(cp, DP83065_MII_MEM, 0x0); - - /* pointer configuration for new firmware */ - cas_phy_write(cp, DP83065_MII_REGE, 0x8ff9); - cas_phy_write(cp, DP83065_MII_REGD, 0xbd); - cas_phy_write(cp, DP83065_MII_REGE, 0x8ffa); - cas_phy_write(cp, DP83065_MII_REGD, 0x82); - cas_phy_write(cp, DP83065_MII_REGE, 0x8ffb); - cas_phy_write(cp, DP83065_MII_REGD, 0x0); - cas_phy_write(cp, DP83065_MII_REGE, 0x8ffc); - cas_phy_write(cp, DP83065_MII_REGD, 0x39); - - /* download new firmware */ - cas_phy_write(cp, DP83065_MII_MEM, 0x1); - cas_phy_write(cp, DP83065_MII_REGE, patch->addr); - while (patch->addr) { - cas_phy_write(cp, DP83065_MII_REGD, patch->val); - patch++; - } - - /* enable firmware */ - cas_phy_write(cp, DP83065_MII_REGE, 0x8ff8); - cas_phy_write(cp, DP83065_MII_REGD, 0x1); -} - - -/* phy initialization */ -static void cas_phy_init(struct cas *cp) -{ - u16 val; - - /* if we're in MII/GMII mode, set up phy */ - if (CAS_PHY_MII(cp->phy_type)) { - writel(PCS_DATAPATH_MODE_MII, - cp->regs + REG_PCS_DATAPATH_MODE); - - cas_mif_poll(cp, 0); - cas_reset_mii_phy(cp); /* take out of isolate mode */ - - if (PHY_LUCENT_B0 == cp->phy_id) { - /* workaround link up/down issue with lucent */ - cas_phy_write(cp, LUCENT_MII_REG, 0x8000); - cas_phy_write(cp, MII_BMCR, 0x00f1); - cas_phy_write(cp, LUCENT_MII_REG, 0x0); - - } else if (PHY_BROADCOM_B0 == (cp->phy_id & 0xFFFFFFFC)) { - /* workarounds for broadcom phy */ - cas_phy_write(cp, BROADCOM_MII_REG8, 0x0C20); - cas_phy_write(cp, BROADCOM_MII_REG7, 0x0012); - cas_phy_write(cp, BROADCOM_MII_REG5, 0x1804); - cas_phy_write(cp, BROADCOM_MII_REG7, 0x0013); - cas_phy_write(cp, BROADCOM_MII_REG5, 0x1204); - cas_phy_write(cp, BROADCOM_MII_REG7, 0x8006); - cas_phy_write(cp, BROADCOM_MII_REG5, 0x0132); - cas_phy_write(cp, BROADCOM_MII_REG7, 0x8006); - cas_phy_write(cp, BROADCOM_MII_REG5, 0x0232); - cas_phy_write(cp, BROADCOM_MII_REG7, 0x201F); - cas_phy_write(cp, BROADCOM_MII_REG5, 0x0A20); - - } else if (PHY_BROADCOM_5411 == cp->phy_id) { - val = cas_phy_read(cp, BROADCOM_MII_REG4); - val = cas_phy_read(cp, BROADCOM_MII_REG4); - if (val & 0x0080) { - /* link workaround */ - cas_phy_write(cp, BROADCOM_MII_REG4, - val & ~0x0080); - } - - } else if (cp->cas_flags & CAS_FLAG_SATURN) { - writel((cp->phy_type & CAS_PHY_MII_MDIO0) ? - SATURN_PCFG_FSI : 0x0, - cp->regs + REG_SATURN_PCFG); - - /* load firmware to address 10Mbps auto-negotiation - * issue. NOTE: this will need to be changed if the - * default firmware gets fixed. - */ - if (PHY_NS_DP83065 == cp->phy_id) { - cas_saturn_firmware_load(cp); - } - cas_phy_powerup(cp); - } - - /* advertise capabilities */ - val = cas_phy_read(cp, MII_BMCR); - val &= ~BMCR_ANENABLE; - cas_phy_write(cp, MII_BMCR, val); - udelay(10); - - cas_phy_write(cp, MII_ADVERTISE, - cas_phy_read(cp, MII_ADVERTISE) | - (ADVERTISE_10HALF | ADVERTISE_10FULL | - ADVERTISE_100HALF | ADVERTISE_100FULL | - CAS_ADVERTISE_PAUSE | - CAS_ADVERTISE_ASYM_PAUSE)); - - if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { - /* make sure that we don't advertise half - * duplex to avoid a chip issue - */ - val = cas_phy_read(cp, CAS_MII_1000_CTRL); - val &= ~CAS_ADVERTISE_1000HALF; - val |= CAS_ADVERTISE_1000FULL; - cas_phy_write(cp, CAS_MII_1000_CTRL, val); - } - - } else { - /* reset pcs for serdes */ - u32 val; - int limit; - - writel(PCS_DATAPATH_MODE_SERDES, - cp->regs + REG_PCS_DATAPATH_MODE); - - /* enable serdes pins on saturn */ - if (cp->cas_flags & CAS_FLAG_SATURN) - writel(0, cp->regs + REG_SATURN_PCFG); - - /* Reset PCS unit. */ - val = readl(cp->regs + REG_PCS_MII_CTRL); - val |= PCS_MII_RESET; - writel(val, cp->regs + REG_PCS_MII_CTRL); - - limit = STOP_TRIES; - while (limit-- > 0) { - udelay(10); - if ((readl(cp->regs + REG_PCS_MII_CTRL) & - PCS_MII_RESET) == 0) - break; - } - if (limit <= 0) - printk(KERN_WARNING "%s: PCS reset bit would not " - "clear [%08x].\n", cp->dev->name, - readl(cp->regs + REG_PCS_STATE_MACHINE)); - - /* Make sure PCS is disabled while changing advertisement - * configuration. - */ - writel(0x0, cp->regs + REG_PCS_CFG); - - /* Advertise all capabilities except half-duplex. */ - val = readl(cp->regs + REG_PCS_MII_ADVERT); - val &= ~PCS_MII_ADVERT_HD; - val |= (PCS_MII_ADVERT_FD | PCS_MII_ADVERT_SYM_PAUSE | - PCS_MII_ADVERT_ASYM_PAUSE); - writel(val, cp->regs + REG_PCS_MII_ADVERT); - - /* enable PCS */ - writel(PCS_CFG_EN, cp->regs + REG_PCS_CFG); - - /* pcs workaround: enable sync detect */ - writel(PCS_SERDES_CTRL_SYNCD_EN, - cp->regs + REG_PCS_SERDES_CTRL); - } -} - - -static int cas_pcs_link_check(struct cas *cp) -{ - u32 stat, state_machine; - int retval = 0; - - /* The link status bit latches on zero, so you must - * read it twice in such a case to see a transition - * to the link being up. - */ - stat = readl(cp->regs + REG_PCS_MII_STATUS); - if ((stat & PCS_MII_STATUS_LINK_STATUS) == 0) - stat = readl(cp->regs + REG_PCS_MII_STATUS); - - /* The remote-fault indication is only valid - * when autoneg has completed. - */ - if ((stat & (PCS_MII_STATUS_AUTONEG_COMP | - PCS_MII_STATUS_REMOTE_FAULT)) == - (PCS_MII_STATUS_AUTONEG_COMP | PCS_MII_STATUS_REMOTE_FAULT)) { - if (netif_msg_link(cp)) - printk(KERN_INFO "%s: PCS RemoteFault\n", - cp->dev->name); - } - - /* work around link detection issue by querying the PCS state - * machine directly. - */ - state_machine = readl(cp->regs + REG_PCS_STATE_MACHINE); - if ((state_machine & PCS_SM_LINK_STATE_MASK) != SM_LINK_STATE_UP) { - stat &= ~PCS_MII_STATUS_LINK_STATUS; - } else if (state_machine & PCS_SM_WORD_SYNC_STATE_MASK) { - stat |= PCS_MII_STATUS_LINK_STATUS; - } - - if (stat & PCS_MII_STATUS_LINK_STATUS) { - if (cp->lstate != link_up) { - if (cp->opened) { - cp->lstate = link_up; - cp->link_transition = LINK_TRANSITION_LINK_UP; - - cas_set_link_modes(cp); - netif_carrier_on(cp->dev); - } - } - } else if (cp->lstate == link_up) { - cp->lstate = link_down; - if (link_transition_timeout != 0 && - cp->link_transition != LINK_TRANSITION_REQUESTED_RESET && - !cp->link_transition_jiffies_valid) { - /* - * force a reset, as a workaround for the - * link-failure problem. May want to move this to a - * point a bit earlier in the sequence. If we had - * generated a reset a short time ago, we'll wait for - * the link timer to check the status until a - * timer expires (link_transistion_jiffies_valid is - * true when the timer is running.) Instead of using - * a system timer, we just do a check whenever the - * link timer is running - this clears the flag after - * a suitable delay. - */ - retval = 1; - cp->link_transition = LINK_TRANSITION_REQUESTED_RESET; - cp->link_transition_jiffies = jiffies; - cp->link_transition_jiffies_valid = 1; - } else { - cp->link_transition = LINK_TRANSITION_ON_FAILURE; - } - netif_carrier_off(cp->dev); - if (cp->opened && netif_msg_link(cp)) { - printk(KERN_INFO "%s: PCS link down.\n", - cp->dev->name); - } - - /* Cassini only: if you force a mode, there can be - * sync problems on link down. to fix that, the following - * things need to be checked: - * 1) read serialink state register - * 2) read pcs status register to verify link down. - * 3) if link down and serial link == 0x03, then you need - * to global reset the chip. - */ - if ((cp->cas_flags & CAS_FLAG_REG_PLUS) == 0) { - /* should check to see if we're in a forced mode */ - stat = readl(cp->regs + REG_PCS_SERDES_STATE); - if (stat == 0x03) - return 1; - } - } else if (cp->lstate == link_down) { - if (link_transition_timeout != 0 && - cp->link_transition != LINK_TRANSITION_REQUESTED_RESET && - !cp->link_transition_jiffies_valid) { - /* force a reset, as a workaround for the - * link-failure problem. May want to move - * this to a point a bit earlier in the - * sequence. - */ - retval = 1; - cp->link_transition = LINK_TRANSITION_REQUESTED_RESET; - cp->link_transition_jiffies = jiffies; - cp->link_transition_jiffies_valid = 1; - } else { - cp->link_transition = LINK_TRANSITION_STILL_FAILED; - } - } - - return retval; -} - -static int cas_pcs_interrupt(struct net_device *dev, - struct cas *cp, u32 status) -{ - u32 stat = readl(cp->regs + REG_PCS_INTR_STATUS); - - if ((stat & PCS_INTR_STATUS_LINK_CHANGE) == 0) - return 0; - return cas_pcs_link_check(cp); -} - -static int cas_txmac_interrupt(struct net_device *dev, - struct cas *cp, u32 status) -{ - u32 txmac_stat = readl(cp->regs + REG_MAC_TX_STATUS); - - if (!txmac_stat) - return 0; - - if (netif_msg_intr(cp)) - printk(KERN_DEBUG "%s: txmac interrupt, txmac_stat: 0x%x\n", - cp->dev->name, txmac_stat); - - /* Defer timer expiration is quite normal, - * don't even log the event. - */ - if ((txmac_stat & MAC_TX_DEFER_TIMER) && - !(txmac_stat & ~MAC_TX_DEFER_TIMER)) - return 0; - - spin_lock(&cp->stat_lock[0]); - if (txmac_stat & MAC_TX_UNDERRUN) { - printk(KERN_ERR "%s: TX MAC xmit underrun.\n", - dev->name); - cp->net_stats[0].tx_fifo_errors++; - } - - if (txmac_stat & MAC_TX_MAX_PACKET_ERR) { - printk(KERN_ERR "%s: TX MAC max packet size error.\n", - dev->name); - cp->net_stats[0].tx_errors++; - } - - /* The rest are all cases of one of the 16-bit TX - * counters expiring. - */ - if (txmac_stat & MAC_TX_COLL_NORMAL) - cp->net_stats[0].collisions += 0x10000; - - if (txmac_stat & MAC_TX_COLL_EXCESS) { - cp->net_stats[0].tx_aborted_errors += 0x10000; - cp->net_stats[0].collisions += 0x10000; - } - - if (txmac_stat & MAC_TX_COLL_LATE) { - cp->net_stats[0].tx_aborted_errors += 0x10000; - cp->net_stats[0].collisions += 0x10000; - } - spin_unlock(&cp->stat_lock[0]); - - /* We do not keep track of MAC_TX_COLL_FIRST and - * MAC_TX_PEAK_ATTEMPTS events. - */ - return 0; -} - -static void cas_load_firmware(struct cas *cp, cas_hp_inst_t *firmware) -{ - cas_hp_inst_t *inst; - u32 val; - int i; - - i = 0; - while ((inst = firmware) && inst->note) { - writel(i, cp->regs + REG_HP_INSTR_RAM_ADDR); - - val = CAS_BASE(HP_INSTR_RAM_HI_VAL, inst->val); - val |= CAS_BASE(HP_INSTR_RAM_HI_MASK, inst->mask); - writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_HI); - - val = CAS_BASE(HP_INSTR_RAM_MID_OUTARG, inst->outarg >> 10); - val |= CAS_BASE(HP_INSTR_RAM_MID_OUTOP, inst->outop); - val |= CAS_BASE(HP_INSTR_RAM_MID_FNEXT, inst->fnext); - val |= CAS_BASE(HP_INSTR_RAM_MID_FOFF, inst->foff); - val |= CAS_BASE(HP_INSTR_RAM_MID_SNEXT, inst->snext); - val |= CAS_BASE(HP_INSTR_RAM_MID_SOFF, inst->soff); - val |= CAS_BASE(HP_INSTR_RAM_MID_OP, inst->op); - writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_MID); - - val = CAS_BASE(HP_INSTR_RAM_LOW_OUTMASK, inst->outmask); - val |= CAS_BASE(HP_INSTR_RAM_LOW_OUTSHIFT, inst->outshift); - val |= CAS_BASE(HP_INSTR_RAM_LOW_OUTEN, inst->outenab); - val |= CAS_BASE(HP_INSTR_RAM_LOW_OUTARG, inst->outarg); - writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_LOW); - ++firmware; - ++i; - } -} - -static void cas_init_rx_dma(struct cas *cp) -{ - u64 desc_dma = cp->block_dvma; - u32 val; - int i, size; - - /* rx free descriptors */ - val = CAS_BASE(RX_CFG_SWIVEL, RX_SWIVEL_OFF_VAL); - val |= CAS_BASE(RX_CFG_DESC_RING, RX_DESC_RINGN_INDEX(0)); - val |= CAS_BASE(RX_CFG_COMP_RING, RX_COMP_RINGN_INDEX(0)); - if ((N_RX_DESC_RINGS > 1) && - (cp->cas_flags & CAS_FLAG_REG_PLUS)) /* do desc 2 */ - val |= CAS_BASE(RX_CFG_DESC_RING1, RX_DESC_RINGN_INDEX(1)); - writel(val, cp->regs + REG_RX_CFG); - - val = (unsigned long) cp->init_rxds[0] - - (unsigned long) cp->init_block; - writel((desc_dma + val) >> 32, cp->regs + REG_RX_DB_HI); - writel((desc_dma + val) & 0xffffffff, cp->regs + REG_RX_DB_LOW); - writel(RX_DESC_RINGN_SIZE(0) - 4, cp->regs + REG_RX_KICK); - - if (cp->cas_flags & CAS_FLAG_REG_PLUS) { - /* rx desc 2 is for IPSEC packets. however, - * we don't it that for that purpose. - */ - val = (unsigned long) cp->init_rxds[1] - - (unsigned long) cp->init_block; - writel((desc_dma + val) >> 32, cp->regs + REG_PLUS_RX_DB1_HI); - writel((desc_dma + val) & 0xffffffff, cp->regs + - REG_PLUS_RX_DB1_LOW); - writel(RX_DESC_RINGN_SIZE(1) - 4, cp->regs + - REG_PLUS_RX_KICK1); - } - - /* rx completion registers */ - val = (unsigned long) cp->init_rxcs[0] - - (unsigned long) cp->init_block; - writel((desc_dma + val) >> 32, cp->regs + REG_RX_CB_HI); - writel((desc_dma + val) & 0xffffffff, cp->regs + REG_RX_CB_LOW); - - if (cp->cas_flags & CAS_FLAG_REG_PLUS) { - /* rx comp 2-4 */ - for (i = 1; i < MAX_RX_COMP_RINGS; i++) { - val = (unsigned long) cp->init_rxcs[i] - - (unsigned long) cp->init_block; - writel((desc_dma + val) >> 32, cp->regs + - REG_PLUS_RX_CBN_HI(i)); - writel((desc_dma + val) & 0xffffffff, cp->regs + - REG_PLUS_RX_CBN_LOW(i)); - } - } - - /* read selective clear regs to prevent spurious interrupts - * on reset because complete == kick. - * selective clear set up to prevent interrupts on resets - */ - readl(cp->regs + REG_INTR_STATUS_ALIAS); - writel(INTR_RX_DONE | INTR_RX_BUF_UNAVAIL, cp->regs + REG_ALIAS_CLEAR); - if (cp->cas_flags & CAS_FLAG_REG_PLUS) { - for (i = 1; i < N_RX_COMP_RINGS; i++) - readl(cp->regs + REG_PLUS_INTRN_STATUS_ALIAS(i)); - - /* 2 is different from 3 and 4 */ - if (N_RX_COMP_RINGS > 1) - writel(INTR_RX_DONE_ALT | INTR_RX_BUF_UNAVAIL_1, - cp->regs + REG_PLUS_ALIASN_CLEAR(1)); - - for (i = 2; i < N_RX_COMP_RINGS; i++) - writel(INTR_RX_DONE_ALT, - cp->regs + REG_PLUS_ALIASN_CLEAR(i)); - } - - /* set up pause thresholds */ - val = CAS_BASE(RX_PAUSE_THRESH_OFF, - cp->rx_pause_off / RX_PAUSE_THRESH_QUANTUM); - val |= CAS_BASE(RX_PAUSE_THRESH_ON, - cp->rx_pause_on / RX_PAUSE_THRESH_QUANTUM); - writel(val, cp->regs + REG_RX_PAUSE_THRESH); - - /* zero out dma reassembly buffers */ - for (i = 0; i < 64; i++) { - writel(i, cp->regs + REG_RX_TABLE_ADDR); - writel(0x0, cp->regs + REG_RX_TABLE_DATA_LOW); - writel(0x0, cp->regs + REG_RX_TABLE_DATA_MID); - writel(0x0, cp->regs + REG_RX_TABLE_DATA_HI); - } - - /* make sure address register is 0 for normal operation */ - writel(0x0, cp->regs + REG_RX_CTRL_FIFO_ADDR); - writel(0x0, cp->regs + REG_RX_IPP_FIFO_ADDR); - - /* interrupt mitigation */ -#ifdef USE_RX_BLANK - val = CAS_BASE(RX_BLANK_INTR_TIME, RX_BLANK_INTR_TIME_VAL); - val |= CAS_BASE(RX_BLANK_INTR_PKT, RX_BLANK_INTR_PKT_VAL); - writel(val, cp->regs + REG_RX_BLANK); -#else - writel(0x0, cp->regs + REG_RX_BLANK); -#endif - - /* interrupt generation as a function of low water marks for - * free desc and completion entries. these are used to trigger - * housekeeping for rx descs. we don't use the free interrupt - * as it's not very useful - */ - /* val = CAS_BASE(RX_AE_THRESH_FREE, RX_AE_FREEN_VAL(0)); */ - val = CAS_BASE(RX_AE_THRESH_COMP, RX_AE_COMP_VAL); - writel(val, cp->regs + REG_RX_AE_THRESH); - if (cp->cas_flags & CAS_FLAG_REG_PLUS) { - val = CAS_BASE(RX_AE1_THRESH_FREE, RX_AE_FREEN_VAL(1)); - writel(val, cp->regs + REG_PLUS_RX_AE1_THRESH); - } - - /* Random early detect registers. useful for congestion avoidance. - * this should be tunable. - */ - writel(0x0, cp->regs + REG_RX_RED); - - /* receive page sizes. default == 2K (0x800) */ - val = 0; - if (cp->page_size == 0x1000) - val = 0x1; - else if (cp->page_size == 0x2000) - val = 0x2; - else if (cp->page_size == 0x4000) - val = 0x3; - - /* round mtu + offset. constrain to page size. */ - size = cp->dev->mtu + 64; - if (size > cp->page_size) - size = cp->page_size; - - if (size <= 0x400) - i = 0x0; - else if (size <= 0x800) - i = 0x1; - else if (size <= 0x1000) - i = 0x2; - else - i = 0x3; - - cp->mtu_stride = 1 << (i + 10); - val = CAS_BASE(RX_PAGE_SIZE, val); - val |= CAS_BASE(RX_PAGE_SIZE_MTU_STRIDE, i); - val |= CAS_BASE(RX_PAGE_SIZE_MTU_COUNT, cp->page_size >> (i + 10)); - val |= CAS_BASE(RX_PAGE_SIZE_MTU_OFF, 0x1); - writel(val, cp->regs + REG_RX_PAGE_SIZE); - - /* enable the header parser if desired */ - if (CAS_HP_FIRMWARE == cas_prog_null) - return; - - val = CAS_BASE(HP_CFG_NUM_CPU, CAS_NCPUS > 63 ? 0 : CAS_NCPUS); - val |= HP_CFG_PARSE_EN | HP_CFG_SYN_INC_MASK; - val |= CAS_BASE(HP_CFG_TCP_THRESH, HP_TCP_THRESH_VAL); - writel(val, cp->regs + REG_HP_CFG); -} - -static inline void cas_rxc_init(struct cas_rx_comp *rxc) -{ - memset(rxc, 0, sizeof(*rxc)); - rxc->word4 = cpu_to_le64(RX_COMP4_ZERO); -} - -/* NOTE: we use the ENC RX DESC ring for spares. the rx_page[0,1] - * flipping is protected by the fact that the chip will not - * hand back the same page index while it's being processed. - */ -static inline cas_page_t *cas_page_spare(struct cas *cp, const int index) -{ - cas_page_t *page = cp->rx_pages[1][index]; - cas_page_t *new; - - if (page_count(page->buffer) == 1) - return page; - - new = cas_page_dequeue(cp); - if (new) { - spin_lock(&cp->rx_inuse_lock); - list_add(&page->list, &cp->rx_inuse_list); - spin_unlock(&cp->rx_inuse_lock); - } - return new; -} - -/* this needs to be changed if we actually use the ENC RX DESC ring */ -static cas_page_t *cas_page_swap(struct cas *cp, const int ring, - const int index) -{ - cas_page_t **page0 = cp->rx_pages[0]; - cas_page_t **page1 = cp->rx_pages[1]; - - /* swap if buffer is in use */ - if (page_count(page0[index]->buffer) > 1) { - cas_page_t *new = cas_page_spare(cp, index); - if (new) { - page1[index] = page0[index]; - page0[index] = new; - } - } - RX_USED_SET(page0[index], 0); - return page0[index]; -} - -static void cas_clean_rxds(struct cas *cp) -{ - /* only clean ring 0 as ring 1 is used for spare buffers */ - struct cas_rx_desc *rxd = cp->init_rxds[0]; - int i, size; - - /* release all rx flows */ - for (i = 0; i < N_RX_FLOWS; i++) { - struct sk_buff *skb; - while ((skb = __skb_dequeue(&cp->rx_flows[i]))) { - cas_skb_release(skb); - } - } - - /* initialize descriptors */ - size = RX_DESC_RINGN_SIZE(0); - for (i = 0; i < size; i++) { - cas_page_t *page = cas_page_swap(cp, 0, i); - rxd[i].buffer = cpu_to_le64(page->dma_addr); - rxd[i].index = cpu_to_le64(CAS_BASE(RX_INDEX_NUM, i) | - CAS_BASE(RX_INDEX_RING, 0)); - } - - cp->rx_old[0] = RX_DESC_RINGN_SIZE(0) - 4; - cp->rx_last[0] = 0; - cp->cas_flags &= ~CAS_FLAG_RXD_POST(0); -} - -static void cas_clean_rxcs(struct cas *cp) -{ - int i, j; - - /* take ownership of rx comp descriptors */ - memset(cp->rx_cur, 0, sizeof(*cp->rx_cur)*N_RX_COMP_RINGS); - memset(cp->rx_new, 0, sizeof(*cp->rx_new)*N_RX_COMP_RINGS); - for (i = 0; i < N_RX_COMP_RINGS; i++) { - struct cas_rx_comp *rxc = cp->init_rxcs[i]; - for (j = 0; j < RX_COMP_RINGN_SIZE(i); j++) { - cas_rxc_init(rxc + j); - } - } -} - -#if 0 -/* When we get a RX fifo overflow, the RX unit is probably hung - * so we do the following. - * - * If any part of the reset goes wrong, we return 1 and that causes the - * whole chip to be reset. - */ -static int cas_rxmac_reset(struct cas *cp) -{ - struct net_device *dev = cp->dev; - int limit; - u32 val; - - /* First, reset MAC RX. */ - writel(cp->mac_rx_cfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG); - for (limit = 0; limit < STOP_TRIES; limit++) { - if (!(readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_EN)) - break; - udelay(10); - } - if (limit == STOP_TRIES) { - printk(KERN_ERR "%s: RX MAC will not disable, resetting whole " - "chip.\n", dev->name); - return 1; - } - - /* Second, disable RX DMA. */ - writel(0, cp->regs + REG_RX_CFG); - for (limit = 0; limit < STOP_TRIES; limit++) { - if (!(readl(cp->regs + REG_RX_CFG) & RX_CFG_DMA_EN)) - break; - udelay(10); - } - if (limit == STOP_TRIES) { - printk(KERN_ERR "%s: RX DMA will not disable, resetting whole " - "chip.\n", dev->name); - return 1; - } - - mdelay(5); - - /* Execute RX reset command. */ - writel(SW_RESET_RX, cp->regs + REG_SW_RESET); - for (limit = 0; limit < STOP_TRIES; limit++) { - if (!(readl(cp->regs + REG_SW_RESET) & SW_RESET_RX)) - break; - udelay(10); - } - if (limit == STOP_TRIES) { - printk(KERN_ERR "%s: RX reset command will not execute, " - "resetting whole chip.\n", dev->name); - return 1; - } - - /* reset driver rx state */ - cas_clean_rxds(cp); - cas_clean_rxcs(cp); - - /* Now, reprogram the rest of RX unit. */ - cas_init_rx_dma(cp); - - /* re-enable */ - val = readl(cp->regs + REG_RX_CFG); - writel(val | RX_CFG_DMA_EN, cp->regs + REG_RX_CFG); - writel(MAC_RX_FRAME_RECV, cp->regs + REG_MAC_RX_MASK); - val = readl(cp->regs + REG_MAC_RX_CFG); - writel(val | MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG); - return 0; -} -#endif - -static int cas_rxmac_interrupt(struct net_device *dev, struct cas *cp, - u32 status) -{ - u32 stat = readl(cp->regs + REG_MAC_RX_STATUS); - - if (!stat) - return 0; - - if (netif_msg_intr(cp)) - printk(KERN_DEBUG "%s: rxmac interrupt, stat: 0x%x\n", - cp->dev->name, stat); - - /* these are all rollovers */ - spin_lock(&cp->stat_lock[0]); - if (stat & MAC_RX_ALIGN_ERR) - cp->net_stats[0].rx_frame_errors += 0x10000; - - if (stat & MAC_RX_CRC_ERR) - cp->net_stats[0].rx_crc_errors += 0x10000; - - if (stat & MAC_RX_LEN_ERR) - cp->net_stats[0].rx_length_errors += 0x10000; - - if (stat & MAC_RX_OVERFLOW) { - cp->net_stats[0].rx_over_errors++; - cp->net_stats[0].rx_fifo_errors++; - } - - /* We do not track MAC_RX_FRAME_COUNT and MAC_RX_VIOL_ERR - * events. - */ - spin_unlock(&cp->stat_lock[0]); - return 0; -} - -static int cas_mac_interrupt(struct net_device *dev, struct cas *cp, - u32 status) -{ - u32 stat = readl(cp->regs + REG_MAC_CTRL_STATUS); - - if (!stat) - return 0; - - if (netif_msg_intr(cp)) - printk(KERN_DEBUG "%s: mac interrupt, stat: 0x%x\n", - cp->dev->name, stat); - - /* This interrupt is just for pause frame and pause - * tracking. It is useful for diagnostics and debug - * but probably by default we will mask these events. - */ - if (stat & MAC_CTRL_PAUSE_STATE) - cp->pause_entered++; - - if (stat & MAC_CTRL_PAUSE_RECEIVED) - cp->pause_last_time_recvd = (stat >> 16); - - return 0; -} - - -/* Must be invoked under cp->lock. */ -static inline int cas_mdio_link_not_up(struct cas *cp) -{ - u16 val; - - switch (cp->lstate) { - case link_force_ret: - if (netif_msg_link(cp)) - printk(KERN_INFO "%s: Autoneg failed again, keeping" - " forced mode\n", cp->dev->name); - cas_phy_write(cp, MII_BMCR, cp->link_fcntl); - cp->timer_ticks = 5; - cp->lstate = link_force_ok; - cp->link_transition = LINK_TRANSITION_LINK_CONFIG; - break; - - case link_aneg: - val = cas_phy_read(cp, MII_BMCR); - - /* Try forced modes. we try things in the following order: - * 1000 full -> 100 full/half -> 10 half - */ - val &= ~(BMCR_ANRESTART | BMCR_ANENABLE); - val |= BMCR_FULLDPLX; - val |= (cp->cas_flags & CAS_FLAG_1000MB_CAP) ? - CAS_BMCR_SPEED1000 : BMCR_SPEED100; - cas_phy_write(cp, MII_BMCR, val); - cp->timer_ticks = 5; - cp->lstate = link_force_try; - cp->link_transition = LINK_TRANSITION_LINK_CONFIG; - break; - - case link_force_try: - /* Downgrade from 1000 to 100 to 10 Mbps if necessary. */ - val = cas_phy_read(cp, MII_BMCR); - cp->timer_ticks = 5; - if (val & CAS_BMCR_SPEED1000) { /* gigabit */ - val &= ~CAS_BMCR_SPEED1000; - val |= (BMCR_SPEED100 | BMCR_FULLDPLX); - cas_phy_write(cp, MII_BMCR, val); - break; - } - - if (val & BMCR_SPEED100) { - if (val & BMCR_FULLDPLX) /* fd failed */ - val &= ~BMCR_FULLDPLX; - else { /* 100Mbps failed */ - val &= ~BMCR_SPEED100; - } - cas_phy_write(cp, MII_BMCR, val); - break; - } - default: - break; - } - return 0; -} - - -/* must be invoked with cp->lock held */ -static int cas_mii_link_check(struct cas *cp, const u16 bmsr) -{ - int restart; - - if (bmsr & BMSR_LSTATUS) { - /* Ok, here we got a link. If we had it due to a forced - * fallback, and we were configured for autoneg, we - * retry a short autoneg pass. If you know your hub is - * broken, use ethtool ;) - */ - if ((cp->lstate == link_force_try) && - (cp->link_cntl & BMCR_ANENABLE)) { - cp->lstate = link_force_ret; - cp->link_transition = LINK_TRANSITION_LINK_CONFIG; - cas_mif_poll(cp, 0); - cp->link_fcntl = cas_phy_read(cp, MII_BMCR); - cp->timer_ticks = 5; - if (cp->opened && netif_msg_link(cp)) - printk(KERN_INFO "%s: Got link after fallback, retrying" - " autoneg once...\n", cp->dev->name); - cas_phy_write(cp, MII_BMCR, - cp->link_fcntl | BMCR_ANENABLE | - BMCR_ANRESTART); - cas_mif_poll(cp, 1); - - } else if (cp->lstate != link_up) { - cp->lstate = link_up; - cp->link_transition = LINK_TRANSITION_LINK_UP; - - if (cp->opened) { - cas_set_link_modes(cp); - netif_carrier_on(cp->dev); - } - } - return 0; - } - - /* link not up. if the link was previously up, we restart the - * whole process - */ - restart = 0; - if (cp->lstate == link_up) { - cp->lstate = link_down; - cp->link_transition = LINK_TRANSITION_LINK_DOWN; - - netif_carrier_off(cp->dev); - if (cp->opened && netif_msg_link(cp)) - printk(KERN_INFO "%s: Link down\n", - cp->dev->name); - restart = 1; - - } else if (++cp->timer_ticks > 10) - cas_mdio_link_not_up(cp); - - return restart; -} - -static int cas_mif_interrupt(struct net_device *dev, struct cas *cp, - u32 status) -{ - u32 stat = readl(cp->regs + REG_MIF_STATUS); - u16 bmsr; - - /* check for a link change */ - if (CAS_VAL(MIF_STATUS_POLL_STATUS, stat) == 0) - return 0; - - bmsr = CAS_VAL(MIF_STATUS_POLL_DATA, stat); - return cas_mii_link_check(cp, bmsr); -} - -static int cas_pci_interrupt(struct net_device *dev, struct cas *cp, - u32 status) -{ - u32 stat = readl(cp->regs + REG_PCI_ERR_STATUS); - - if (!stat) - return 0; - - printk(KERN_ERR "%s: PCI error [%04x:%04x] ", dev->name, stat, - readl(cp->regs + REG_BIM_DIAG)); - - /* cassini+ has this reserved */ - if ((stat & PCI_ERR_BADACK) && - ((cp->cas_flags & CAS_FLAG_REG_PLUS) == 0)) - printk(" "); - - if (stat & PCI_ERR_DTRTO) - printk(" "); - if (stat & PCI_ERR_OTHER) - printk(" "); - if (stat & PCI_ERR_BIM_DMA_WRITE) - printk(" "); - if (stat & PCI_ERR_BIM_DMA_READ) - printk(" "); - printk("\n"); - - if (stat & PCI_ERR_OTHER) { - u16 cfg; - - /* Interrogate PCI config space for the - * true cause. - */ - pci_read_config_word(cp->pdev, PCI_STATUS, &cfg); - printk(KERN_ERR "%s: Read PCI cfg space status [%04x]\n", - dev->name, cfg); - if (cfg & PCI_STATUS_PARITY) - printk(KERN_ERR "%s: PCI parity error detected.\n", - dev->name); - if (cfg & PCI_STATUS_SIG_TARGET_ABORT) - printk(KERN_ERR "%s: PCI target abort.\n", - dev->name); - if (cfg & PCI_STATUS_REC_TARGET_ABORT) - printk(KERN_ERR "%s: PCI master acks target abort.\n", - dev->name); - if (cfg & PCI_STATUS_REC_MASTER_ABORT) - printk(KERN_ERR "%s: PCI master abort.\n", dev->name); - if (cfg & PCI_STATUS_SIG_SYSTEM_ERROR) - printk(KERN_ERR "%s: PCI system error SERR#.\n", - dev->name); - if (cfg & PCI_STATUS_DETECTED_PARITY) - printk(KERN_ERR "%s: PCI parity error.\n", - dev->name); - - /* Write the error bits back to clear them. */ - cfg &= (PCI_STATUS_PARITY | - PCI_STATUS_SIG_TARGET_ABORT | - PCI_STATUS_REC_TARGET_ABORT | - PCI_STATUS_REC_MASTER_ABORT | - PCI_STATUS_SIG_SYSTEM_ERROR | - PCI_STATUS_DETECTED_PARITY); - pci_write_config_word(cp->pdev, PCI_STATUS, cfg); - } - - /* For all PCI errors, we should reset the chip. */ - return 1; -} - -/* All non-normal interrupt conditions get serviced here. - * Returns non-zero if we should just exit the interrupt - * handler right now (ie. if we reset the card which invalidates - * all of the other original irq status bits). - */ -static int cas_abnormal_irq(struct net_device *dev, struct cas *cp, - u32 status) -{ - if (status & INTR_RX_TAG_ERROR) { - /* corrupt RX tag framing */ - if (netif_msg_rx_err(cp)) - printk(KERN_DEBUG "%s: corrupt rx tag framing\n", - cp->dev->name); - spin_lock(&cp->stat_lock[0]); - cp->net_stats[0].rx_errors++; - spin_unlock(&cp->stat_lock[0]); - goto do_reset; - } - - if (status & INTR_RX_LEN_MISMATCH) { - /* length mismatch. */ - if (netif_msg_rx_err(cp)) - printk(KERN_DEBUG "%s: length mismatch for rx frame\n", - cp->dev->name); - spin_lock(&cp->stat_lock[0]); - cp->net_stats[0].rx_errors++; - spin_unlock(&cp->stat_lock[0]); - goto do_reset; - } - - if (status & INTR_PCS_STATUS) { - if (cas_pcs_interrupt(dev, cp, status)) - goto do_reset; - } - - if (status & INTR_TX_MAC_STATUS) { - if (cas_txmac_interrupt(dev, cp, status)) - goto do_reset; - } - - if (status & INTR_RX_MAC_STATUS) { - if (cas_rxmac_interrupt(dev, cp, status)) - goto do_reset; - } - - if (status & INTR_MAC_CTRL_STATUS) { - if (cas_mac_interrupt(dev, cp, status)) - goto do_reset; - } - - if (status & INTR_MIF_STATUS) { - if (cas_mif_interrupt(dev, cp, status)) - goto do_reset; - } - - if (status & INTR_PCI_ERROR_STATUS) { - if (cas_pci_interrupt(dev, cp, status)) - goto do_reset; - } - return 0; - -do_reset: -#if 1 - atomic_inc(&cp->reset_task_pending); - atomic_inc(&cp->reset_task_pending_all); - printk(KERN_ERR "%s:reset called in cas_abnormal_irq [0x%x]\n", - dev->name, status); - schedule_work(&cp->reset_task); -#else - atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); - printk(KERN_ERR "reset called in cas_abnormal_irq\n"); - schedule_work(&cp->reset_task); -#endif - return 1; -} - -/* NOTE: CAS_TABORT returns 1 or 2 so that it can be used when - * determining whether to do a netif_stop/wakeup - */ -#define CAS_TABORT(x) (((x)->cas_flags & CAS_FLAG_TARGET_ABORT) ? 2 : 1) -#define CAS_ROUND_PAGE(x) (((x) + PAGE_SIZE - 1) & PAGE_MASK) -static inline int cas_calc_tabort(struct cas *cp, const unsigned long addr, - const int len) -{ - unsigned long off = addr + len; - - if (CAS_TABORT(cp) == 1) - return 0; - if ((CAS_ROUND_PAGE(off) - off) > TX_TARGET_ABORT_LEN) - return 0; - return TX_TARGET_ABORT_LEN; -} - -static inline void cas_tx_ringN(struct cas *cp, int ring, int limit) -{ - struct cas_tx_desc *txds; - struct sk_buff **skbs; - struct net_device *dev = cp->dev; - int entry, count; - - spin_lock(&cp->tx_lock[ring]); - txds = cp->init_txds[ring]; - skbs = cp->tx_skbs[ring]; - entry = cp->tx_old[ring]; - - count = TX_BUFF_COUNT(ring, entry, limit); - while (entry != limit) { - struct sk_buff *skb = skbs[entry]; - dma_addr_t daddr; - u32 dlen; - int frag; - - if (!skb) { - /* this should never occur */ - entry = TX_DESC_NEXT(ring, entry); - continue; - } - - /* however, we might get only a partial skb release. */ - count -= skb_shinfo(skb)->nr_frags + - + cp->tx_tiny_use[ring][entry].nbufs + 1; - if (count < 0) - break; - - if (netif_msg_tx_done(cp)) - printk(KERN_DEBUG "%s: tx[%d] done, slot %d\n", - cp->dev->name, ring, entry); - - skbs[entry] = NULL; - cp->tx_tiny_use[ring][entry].nbufs = 0; - - for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) { - struct cas_tx_desc *txd = txds + entry; - - daddr = le64_to_cpu(txd->buffer); - dlen = CAS_VAL(TX_DESC_BUFLEN, - le64_to_cpu(txd->control)); - pci_unmap_page(cp->pdev, daddr, dlen, - PCI_DMA_TODEVICE); - entry = TX_DESC_NEXT(ring, entry); - - /* tiny buffer may follow */ - if (cp->tx_tiny_use[ring][entry].used) { - cp->tx_tiny_use[ring][entry].used = 0; - entry = TX_DESC_NEXT(ring, entry); - } - } - - spin_lock(&cp->stat_lock[ring]); - cp->net_stats[ring].tx_packets++; - cp->net_stats[ring].tx_bytes += skb->len; - spin_unlock(&cp->stat_lock[ring]); - dev_kfree_skb_irq(skb); - } - cp->tx_old[ring] = entry; - - /* this is wrong for multiple tx rings. the net device needs - * multiple queues for this to do the right thing. we wait - * for 2*packets to be available when using tiny buffers - */ - if (netif_queue_stopped(dev) && - (TX_BUFFS_AVAIL(cp, ring) > CAS_TABORT(cp)*(MAX_SKB_FRAGS + 1))) - netif_wake_queue(dev); - spin_unlock(&cp->tx_lock[ring]); -} - -static void cas_tx(struct net_device *dev, struct cas *cp, - u32 status) -{ - int limit, ring; -#ifdef USE_TX_COMPWB - u64 compwb = le64_to_cpu(cp->init_block->tx_compwb); -#endif - if (netif_msg_intr(cp)) - printk(KERN_DEBUG "%s: tx interrupt, status: 0x%x, %lx\n", - cp->dev->name, status, compwb); - /* process all the rings */ - for (ring = 0; ring < N_TX_RINGS; ring++) { -#ifdef USE_TX_COMPWB - /* use the completion writeback registers */ - limit = (CAS_VAL(TX_COMPWB_MSB, compwb) << 8) | - CAS_VAL(TX_COMPWB_LSB, compwb); - compwb = TX_COMPWB_NEXT(compwb); -#else - limit = readl(cp->regs + REG_TX_COMPN(ring)); -#endif - if (cp->tx_old[ring] != limit) - cas_tx_ringN(cp, ring, limit); - } -} - - -static int cas_rx_process_pkt(struct cas *cp, struct cas_rx_comp *rxc, - int entry, const u64 *words, - struct sk_buff **skbref) -{ - int dlen, hlen, len, i, alloclen; - int off, swivel = RX_SWIVEL_OFF_VAL; - struct cas_page *page; - struct sk_buff *skb; - void *addr, *crcaddr; - char *p; - - hlen = CAS_VAL(RX_COMP2_HDR_SIZE, words[1]); - dlen = CAS_VAL(RX_COMP1_DATA_SIZE, words[0]); - len = hlen + dlen; - - if (RX_COPY_ALWAYS || (words[2] & RX_COMP3_SMALL_PKT)) - alloclen = len; - else - alloclen = max(hlen, RX_COPY_MIN); - - skb = dev_alloc_skb(alloclen + swivel + cp->crc_size); - if (skb == NULL) - return -1; - - *skbref = skb; - skb->dev = cp->dev; - skb_reserve(skb, swivel); - - p = skb->data; - addr = crcaddr = NULL; - if (hlen) { /* always copy header pages */ - i = CAS_VAL(RX_COMP2_HDR_INDEX, words[1]); - page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; - off = CAS_VAL(RX_COMP2_HDR_OFF, words[1]) * 0x100 + - swivel; - - i = hlen; - if (!dlen) /* attach FCS */ - i += cp->crc_size; - pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr + off, i, - PCI_DMA_FROMDEVICE); - addr = cas_page_map(page->buffer); - memcpy(p, addr + off, i); - pci_dma_sync_single_for_device(cp->pdev, page->dma_addr + off, i, - PCI_DMA_FROMDEVICE); - cas_page_unmap(addr); - RX_USED_ADD(page, 0x100); - p += hlen; - swivel = 0; - } - - - if (alloclen < (hlen + dlen)) { - skb_frag_t *frag = skb_shinfo(skb)->frags; - - /* normal or jumbo packets. we use frags */ - i = CAS_VAL(RX_COMP1_DATA_INDEX, words[0]); - page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; - off = CAS_VAL(RX_COMP1_DATA_OFF, words[0]) + swivel; - - hlen = min(cp->page_size - off, dlen); - if (hlen < 0) { - if (netif_msg_rx_err(cp)) { - printk(KERN_DEBUG "%s: rx page overflow: " - "%d\n", cp->dev->name, hlen); - } - dev_kfree_skb_irq(skb); - return -1; - } - i = hlen; - if (i == dlen) /* attach FCS */ - i += cp->crc_size; - pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr + off, i, - PCI_DMA_FROMDEVICE); - - /* make sure we always copy a header */ - swivel = 0; - if (p == (char *) skb->data) { /* not split */ - addr = cas_page_map(page->buffer); - memcpy(p, addr + off, RX_COPY_MIN); - pci_dma_sync_single_for_device(cp->pdev, page->dma_addr + off, i, - PCI_DMA_FROMDEVICE); - cas_page_unmap(addr); - off += RX_COPY_MIN; - swivel = RX_COPY_MIN; - RX_USED_ADD(page, cp->mtu_stride); - } else { - RX_USED_ADD(page, hlen); - } - skb_put(skb, alloclen); - - skb_shinfo(skb)->nr_frags++; - skb->data_len += hlen - swivel; - skb->len += hlen - swivel; - - get_page(page->buffer); - frag->page = page->buffer; - frag->page_offset = off; - frag->size = hlen - swivel; - - /* any more data? */ - if ((words[0] & RX_COMP1_SPLIT_PKT) && ((dlen -= hlen) > 0)) { - hlen = dlen; - off = 0; - - i = CAS_VAL(RX_COMP2_NEXT_INDEX, words[1]); - page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; - pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr, - hlen + cp->crc_size, - PCI_DMA_FROMDEVICE); - pci_dma_sync_single_for_device(cp->pdev, page->dma_addr, - hlen + cp->crc_size, - PCI_DMA_FROMDEVICE); - - skb_shinfo(skb)->nr_frags++; - skb->data_len += hlen; - skb->len += hlen; - frag++; - - get_page(page->buffer); - frag->page = page->buffer; - frag->page_offset = 0; - frag->size = hlen; - RX_USED_ADD(page, hlen + cp->crc_size); - } - - if (cp->crc_size) { - addr = cas_page_map(page->buffer); - crcaddr = addr + off + hlen; - } - - } else { - /* copying packet */ - if (!dlen) - goto end_copy_pkt; - - i = CAS_VAL(RX_COMP1_DATA_INDEX, words[0]); - page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; - off = CAS_VAL(RX_COMP1_DATA_OFF, words[0]) + swivel; - hlen = min(cp->page_size - off, dlen); - if (hlen < 0) { - if (netif_msg_rx_err(cp)) { - printk(KERN_DEBUG "%s: rx page overflow: " - "%d\n", cp->dev->name, hlen); - } - dev_kfree_skb_irq(skb); - return -1; - } - i = hlen; - if (i == dlen) /* attach FCS */ - i += cp->crc_size; - pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr + off, i, - PCI_DMA_FROMDEVICE); - addr = cas_page_map(page->buffer); - memcpy(p, addr + off, i); - pci_dma_sync_single_for_device(cp->pdev, page->dma_addr + off, i, - PCI_DMA_FROMDEVICE); - cas_page_unmap(addr); - if (p == (char *) skb->data) /* not split */ - RX_USED_ADD(page, cp->mtu_stride); - else - RX_USED_ADD(page, i); - - /* any more data? */ - if ((words[0] & RX_COMP1_SPLIT_PKT) && ((dlen -= hlen) > 0)) { - p += hlen; - i = CAS_VAL(RX_COMP2_NEXT_INDEX, words[1]); - page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; - pci_dma_sync_single_for_cpu(cp->pdev, page->dma_addr, - dlen + cp->crc_size, - PCI_DMA_FROMDEVICE); - addr = cas_page_map(page->buffer); - memcpy(p, addr, dlen + cp->crc_size); - pci_dma_sync_single_for_device(cp->pdev, page->dma_addr, - dlen + cp->crc_size, - PCI_DMA_FROMDEVICE); - cas_page_unmap(addr); - RX_USED_ADD(page, dlen + cp->crc_size); - } -end_copy_pkt: - if (cp->crc_size) { - addr = NULL; - crcaddr = skb->data + alloclen; - } - skb_put(skb, alloclen); - } - - i = CAS_VAL(RX_COMP4_TCP_CSUM, words[3]); - if (cp->crc_size) { - /* checksum includes FCS. strip it out. */ - i = csum_fold(csum_partial(crcaddr, cp->crc_size, i)); - if (addr) - cas_page_unmap(addr); - } - skb->csum = ntohs(i ^ 0xffff); - skb->ip_summed = CHECKSUM_HW; - skb->protocol = eth_type_trans(skb, cp->dev); - return len; -} - - -/* we can handle up to 64 rx flows at a time. we do the same thing - * as nonreassm except that we batch up the buffers. - * NOTE: we currently just treat each flow as a bunch of packets that - * we pass up. a better way would be to coalesce the packets - * into a jumbo packet. to do that, we need to do the following: - * 1) the first packet will have a clean split between header and - * data. save both. - * 2) each time the next flow packet comes in, extend the - * data length and merge the checksums. - * 3) on flow release, fix up the header. - * 4) make sure the higher layer doesn't care. - * because packets get coalesced, we shouldn't run into fragment count - * issues. - */ -static inline void cas_rx_flow_pkt(struct cas *cp, const u64 *words, - struct sk_buff *skb) -{ - int flowid = CAS_VAL(RX_COMP3_FLOWID, words[2]) & (N_RX_FLOWS - 1); - struct sk_buff_head *flow = &cp->rx_flows[flowid]; - - /* this is protected at a higher layer, so no need to - * do any additional locking here. stick the buffer - * at the end. - */ - __skb_insert(skb, flow->prev, (struct sk_buff *) flow, flow); - if (words[0] & RX_COMP1_RELEASE_FLOW) { - while ((skb = __skb_dequeue(flow))) { - cas_skb_release(skb); - } - } -} - -/* put rx descriptor back on ring. if a buffer is in use by a higher - * layer, this will need to put in a replacement. - */ -static void cas_post_page(struct cas *cp, const int ring, const int index) -{ - cas_page_t *new; - int entry; - - entry = cp->rx_old[ring]; - - new = cas_page_swap(cp, ring, index); - cp->init_rxds[ring][entry].buffer = cpu_to_le64(new->dma_addr); - cp->init_rxds[ring][entry].index = - cpu_to_le64(CAS_BASE(RX_INDEX_NUM, index) | - CAS_BASE(RX_INDEX_RING, ring)); - - entry = RX_DESC_ENTRY(ring, entry + 1); - cp->rx_old[ring] = entry; - - if (entry % 4) - return; - - if (ring == 0) - writel(entry, cp->regs + REG_RX_KICK); - else if ((N_RX_DESC_RINGS > 1) && - (cp->cas_flags & CAS_FLAG_REG_PLUS)) - writel(entry, cp->regs + REG_PLUS_RX_KICK1); -} - - -/* only when things are bad */ -static int cas_post_rxds_ringN(struct cas *cp, int ring, int num) -{ - unsigned int entry, last, count, released; - int cluster; - cas_page_t **page = cp->rx_pages[ring]; - - entry = cp->rx_old[ring]; - - if (netif_msg_intr(cp)) - printk(KERN_DEBUG "%s: rxd[%d] interrupt, done: %d\n", - cp->dev->name, ring, entry); - - cluster = -1; - count = entry & 0x3; - last = RX_DESC_ENTRY(ring, num ? entry + num - 4: entry - 4); - released = 0; - while (entry != last) { - /* make a new buffer if it's still in use */ - if (page_count(page[entry]->buffer) > 1) { - cas_page_t *new = cas_page_dequeue(cp); - if (!new) { - /* let the timer know that we need to - * do this again - */ - cp->cas_flags |= CAS_FLAG_RXD_POST(ring); - if (!timer_pending(&cp->link_timer)) - mod_timer(&cp->link_timer, jiffies + - CAS_LINK_FAST_TIMEOUT); - cp->rx_old[ring] = entry; - cp->rx_last[ring] = num ? num - released : 0; - return -ENOMEM; - } - spin_lock(&cp->rx_inuse_lock); - list_add(&page[entry]->list, &cp->rx_inuse_list); - spin_unlock(&cp->rx_inuse_lock); - cp->init_rxds[ring][entry].buffer = - cpu_to_le64(new->dma_addr); - page[entry] = new; - - } - - if (++count == 4) { - cluster = entry; - count = 0; - } - released++; - entry = RX_DESC_ENTRY(ring, entry + 1); - } - cp->rx_old[ring] = entry; - - if (cluster < 0) - return 0; - - if (ring == 0) - writel(cluster, cp->regs + REG_RX_KICK); - else if ((N_RX_DESC_RINGS > 1) && - (cp->cas_flags & CAS_FLAG_REG_PLUS)) - writel(cluster, cp->regs + REG_PLUS_RX_KICK1); - return 0; -} - - -/* process a completion ring. packets are set up in three basic ways: - * small packets: should be copied header + data in single buffer. - * large packets: header and data in a single buffer. - * split packets: header in a separate buffer from data. - * data may be in multiple pages. data may be > 256 - * bytes but in a single page. - * - * NOTE: RX page posting is done in this routine as well. while there's - * the capability of using multiple RX completion rings, it isn't - * really worthwhile due to the fact that the page posting will - * force serialization on the single descriptor ring. - */ -static int cas_rx_ringN(struct cas *cp, int ring, int budget) -{ - struct cas_rx_comp *rxcs = cp->init_rxcs[ring]; - int entry, drops; - int npackets = 0; - - if (netif_msg_intr(cp)) - printk(KERN_DEBUG "%s: rx[%d] interrupt, done: %d/%d\n", - cp->dev->name, ring, - readl(cp->regs + REG_RX_COMP_HEAD), - cp->rx_new[ring]); - - entry = cp->rx_new[ring]; - drops = 0; - while (1) { - struct cas_rx_comp *rxc = rxcs + entry; - struct sk_buff *skb; - int type, len; - u64 words[4]; - int i, dring; - - words[0] = le64_to_cpu(rxc->word1); - words[1] = le64_to_cpu(rxc->word2); - words[2] = le64_to_cpu(rxc->word3); - words[3] = le64_to_cpu(rxc->word4); - - /* don't touch if still owned by hw */ - type = CAS_VAL(RX_COMP1_TYPE, words[0]); - if (type == 0) - break; - - /* hw hasn't cleared the zero bit yet */ - if (words[3] & RX_COMP4_ZERO) { - break; - } - - /* get info on the packet */ - if (words[3] & (RX_COMP4_LEN_MISMATCH | RX_COMP4_BAD)) { - spin_lock(&cp->stat_lock[ring]); - cp->net_stats[ring].rx_errors++; - if (words[3] & RX_COMP4_LEN_MISMATCH) - cp->net_stats[ring].rx_length_errors++; - if (words[3] & RX_COMP4_BAD) - cp->net_stats[ring].rx_crc_errors++; - spin_unlock(&cp->stat_lock[ring]); - - /* We'll just return it to Cassini. */ - drop_it: - spin_lock(&cp->stat_lock[ring]); - ++cp->net_stats[ring].rx_dropped; - spin_unlock(&cp->stat_lock[ring]); - goto next; - } - - len = cas_rx_process_pkt(cp, rxc, entry, words, &skb); - if (len < 0) { - ++drops; - goto drop_it; - } - - /* see if it's a flow re-assembly or not. the driver - * itself handles release back up. - */ - if (RX_DONT_BATCH || (type == 0x2)) { - /* non-reassm: these always get released */ - cas_skb_release(skb); - } else { - cas_rx_flow_pkt(cp, words, skb); - } - - spin_lock(&cp->stat_lock[ring]); - cp->net_stats[ring].rx_packets++; - cp->net_stats[ring].rx_bytes += len; - spin_unlock(&cp->stat_lock[ring]); - cp->dev->last_rx = jiffies; - - next: - npackets++; - - /* should it be released? */ - if (words[0] & RX_COMP1_RELEASE_HDR) { - i = CAS_VAL(RX_COMP2_HDR_INDEX, words[1]); - dring = CAS_VAL(RX_INDEX_RING, i); - i = CAS_VAL(RX_INDEX_NUM, i); - cas_post_page(cp, dring, i); - } - - if (words[0] & RX_COMP1_RELEASE_DATA) { - i = CAS_VAL(RX_COMP1_DATA_INDEX, words[0]); - dring = CAS_VAL(RX_INDEX_RING, i); - i = CAS_VAL(RX_INDEX_NUM, i); - cas_post_page(cp, dring, i); - } - - if (words[0] & RX_COMP1_RELEASE_NEXT) { - i = CAS_VAL(RX_COMP2_NEXT_INDEX, words[1]); - dring = CAS_VAL(RX_INDEX_RING, i); - i = CAS_VAL(RX_INDEX_NUM, i); - cas_post_page(cp, dring, i); - } - - /* skip to the next entry */ - entry = RX_COMP_ENTRY(ring, entry + 1 + - CAS_VAL(RX_COMP1_SKIP, words[0])); -#ifdef USE_NAPI - if (budget && (npackets >= budget)) - break; -#endif - } - cp->rx_new[ring] = entry; - - if (drops) - printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", - cp->dev->name); - return npackets; -} - - -/* put completion entries back on the ring */ -static void cas_post_rxcs_ringN(struct net_device *dev, - struct cas *cp, int ring) -{ - struct cas_rx_comp *rxc = cp->init_rxcs[ring]; - int last, entry; - - last = cp->rx_cur[ring]; - entry = cp->rx_new[ring]; - if (netif_msg_intr(cp)) - printk(KERN_DEBUG "%s: rxc[%d] interrupt, done: %d/%d\n", - dev->name, ring, readl(cp->regs + REG_RX_COMP_HEAD), - entry); - - /* zero and re-mark descriptors */ - while (last != entry) { - cas_rxc_init(rxc + last); - last = RX_COMP_ENTRY(ring, last + 1); - } - cp->rx_cur[ring] = last; - - if (ring == 0) - writel(last, cp->regs + REG_RX_COMP_TAIL); - else if (cp->cas_flags & CAS_FLAG_REG_PLUS) - writel(last, cp->regs + REG_PLUS_RX_COMPN_TAIL(ring)); -} - - - -/* cassini can use all four PCI interrupts for the completion ring. - * rings 3 and 4 are identical - */ -#if defined(USE_PCI_INTC) || defined(USE_PCI_INTD) -static inline void cas_handle_irqN(struct net_device *dev, - struct cas *cp, const u32 status, - const int ring) -{ - if (status & (INTR_RX_COMP_FULL_ALT | INTR_RX_COMP_AF_ALT)) - cas_post_rxcs_ringN(dev, cp, ring); -} - -static irqreturn_t cas_interruptN(int irq, void *dev_id, struct pt_regs *regs) -{ - struct net_device *dev = dev_id; - struct cas *cp = netdev_priv(dev); - unsigned long flags; - int ring; - u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(ring)); - - /* check for shared irq */ - if (status == 0) - return IRQ_NONE; - - ring = (irq == cp->pci_irq_INTC) ? 2 : 3; - spin_lock_irqsave(&cp->lock, flags); - if (status & INTR_RX_DONE_ALT) { /* handle rx separately */ -#ifdef USE_NAPI - cas_mask_intr(cp); - netif_rx_schedule(dev); -#else - cas_rx_ringN(cp, ring, 0); -#endif - status &= ~INTR_RX_DONE_ALT; - } - - if (status) - cas_handle_irqN(dev, cp, status, ring); - spin_unlock_irqrestore(&cp->lock, flags); - return IRQ_HANDLED; -} -#endif - -#ifdef USE_PCI_INTB -/* everything but rx packets */ -static inline void cas_handle_irq1(struct cas *cp, const u32 status) -{ - if (status & INTR_RX_BUF_UNAVAIL_1) { - /* Frame arrived, no free RX buffers available. - * NOTE: we can get this on a link transition. */ - cas_post_rxds_ringN(cp, 1, 0); - spin_lock(&cp->stat_lock[1]); - cp->net_stats[1].rx_dropped++; - spin_unlock(&cp->stat_lock[1]); - } - - if (status & INTR_RX_BUF_AE_1) - cas_post_rxds_ringN(cp, 1, RX_DESC_RINGN_SIZE(1) - - RX_AE_FREEN_VAL(1)); - - if (status & (INTR_RX_COMP_AF | INTR_RX_COMP_FULL)) - cas_post_rxcs_ringN(cp, 1); -} - -/* ring 2 handles a few more events than 3 and 4 */ -static irqreturn_t cas_interrupt1(int irq, void *dev_id, struct pt_regs *regs) -{ - struct net_device *dev = dev_id; - struct cas *cp = netdev_priv(dev); - unsigned long flags; - u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(1)); - - /* check for shared interrupt */ - if (status == 0) - return IRQ_NONE; - - spin_lock_irqsave(&cp->lock, flags); - if (status & INTR_RX_DONE_ALT) { /* handle rx separately */ -#ifdef USE_NAPI - cas_mask_intr(cp); - netif_rx_schedule(dev); -#else - cas_rx_ringN(cp, 1, 0); -#endif - status &= ~INTR_RX_DONE_ALT; - } - if (status) - cas_handle_irq1(cp, status); - spin_unlock_irqrestore(&cp->lock, flags); - return IRQ_HANDLED; -} -#endif - -static inline void cas_handle_irq(struct net_device *dev, - struct cas *cp, const u32 status) -{ - /* housekeeping interrupts */ - if (status & INTR_ERROR_MASK) - cas_abnormal_irq(dev, cp, status); - - if (status & INTR_RX_BUF_UNAVAIL) { - /* Frame arrived, no free RX buffers available. - * NOTE: we can get this on a link transition. - */ - cas_post_rxds_ringN(cp, 0, 0); - spin_lock(&cp->stat_lock[0]); - cp->net_stats[0].rx_dropped++; - spin_unlock(&cp->stat_lock[0]); - } else if (status & INTR_RX_BUF_AE) { - cas_post_rxds_ringN(cp, 0, RX_DESC_RINGN_SIZE(0) - - RX_AE_FREEN_VAL(0)); - } - - if (status & (INTR_RX_COMP_AF | INTR_RX_COMP_FULL)) - cas_post_rxcs_ringN(dev, cp, 0); -} - -static irqreturn_t cas_interrupt(int irq, void *dev_id, struct pt_regs *regs) -{ - struct net_device *dev = dev_id; - struct cas *cp = netdev_priv(dev); - unsigned long flags; - u32 status = readl(cp->regs + REG_INTR_STATUS); - - if (status == 0) - return IRQ_NONE; - - spin_lock_irqsave(&cp->lock, flags); - if (status & (INTR_TX_ALL | INTR_TX_INTME)) { - cas_tx(dev, cp, status); - status &= ~(INTR_TX_ALL | INTR_TX_INTME); - } - - if (status & INTR_RX_DONE) { -#ifdef USE_NAPI - cas_mask_intr(cp); - netif_rx_schedule(dev); -#else - cas_rx_ringN(cp, 0, 0); -#endif - status &= ~INTR_RX_DONE; - } - - if (status) - cas_handle_irq(dev, cp, status); - spin_unlock_irqrestore(&cp->lock, flags); - return IRQ_HANDLED; -} - - -#ifdef USE_NAPI -static int cas_poll(struct net_device *dev, int *budget) -{ - struct cas *cp = netdev_priv(dev); - int i, enable_intr, todo, credits; - u32 status = readl(cp->regs + REG_INTR_STATUS); - unsigned long flags; - - spin_lock_irqsave(&cp->lock, flags); - cas_tx(dev, cp, status); - spin_unlock_irqrestore(&cp->lock, flags); - - /* NAPI rx packets. we spread the credits across all of the - * rxc rings - */ - todo = min(*budget, dev->quota); - - /* to make sure we're fair with the work we loop through each - * ring N_RX_COMP_RING times with a request of - * todo / N_RX_COMP_RINGS - */ - enable_intr = 1; - credits = 0; - for (i = 0; i < N_RX_COMP_RINGS; i++) { - int j; - for (j = 0; j < N_RX_COMP_RINGS; j++) { - credits += cas_rx_ringN(cp, j, todo / N_RX_COMP_RINGS); - if (credits >= todo) { - enable_intr = 0; - goto rx_comp; - } - } - } - -rx_comp: - *budget -= credits; - dev->quota -= credits; - - /* final rx completion */ - spin_lock_irqsave(&cp->lock, flags); - if (status) - cas_handle_irq(dev, cp, status); - -#ifdef USE_PCI_INTB - if (N_RX_COMP_RINGS > 1) { - status = readl(cp->regs + REG_PLUS_INTRN_STATUS(1)); - if (status) - cas_handle_irq1(dev, cp, status); - } -#endif - -#ifdef USE_PCI_INTC - if (N_RX_COMP_RINGS > 2) { - status = readl(cp->regs + REG_PLUS_INTRN_STATUS(2)); - if (status) - cas_handle_irqN(dev, cp, status, 2); - } -#endif - -#ifdef USE_PCI_INTD - if (N_RX_COMP_RINGS > 3) { - status = readl(cp->regs + REG_PLUS_INTRN_STATUS(3)); - if (status) - cas_handle_irqN(dev, cp, status, 3); - } -#endif - spin_unlock_irqrestore(&cp->lock, flags); - if (enable_intr) { - netif_rx_complete(dev); - cas_unmask_intr(cp); - return 0; - } - return 1; -} -#endif - -#ifdef CONFIG_NET_POLL_CONTROLLER -static void cas_netpoll(struct net_device *dev) -{ - struct cas *cp = netdev_priv(dev); - - cas_disable_irq(cp, 0); - cas_interrupt(cp->pdev->irq, dev, NULL); - cas_enable_irq(cp, 0); - -#ifdef USE_PCI_INTB - if (N_RX_COMP_RINGS > 1) { - /* cas_interrupt1(); */ - } -#endif -#ifdef USE_PCI_INTC - if (N_RX_COMP_RINGS > 2) { - /* cas_interruptN(); */ - } -#endif -#ifdef USE_PCI_INTD - if (N_RX_COMP_RINGS > 3) { - /* cas_interruptN(); */ - } -#endif -} -#endif - -static void cas_tx_timeout(struct net_device *dev) -{ - struct cas *cp = netdev_priv(dev); - - printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name); - if (!cp->hw_running) { - printk("%s: hrm.. hw not running!\n", dev->name); - return; - } - - printk(KERN_ERR "%s: MIF_STATE[%08x]\n", - dev->name, readl(cp->regs + REG_MIF_STATE_MACHINE)); - - printk(KERN_ERR "%s: MAC_STATE[%08x]\n", - dev->name, readl(cp->regs + REG_MAC_STATE_MACHINE)); - - printk(KERN_ERR "%s: TX_STATE[%08x:%08x:%08x] " - "FIFO[%08x:%08x:%08x] SM1[%08x] SM2[%08x]\n", - dev->name, - readl(cp->regs + REG_TX_CFG), - readl(cp->regs + REG_MAC_TX_STATUS), - readl(cp->regs + REG_MAC_TX_CFG), - readl(cp->regs + REG_TX_FIFO_PKT_CNT), - readl(cp->regs + REG_TX_FIFO_WRITE_PTR), - readl(cp->regs + REG_TX_FIFO_READ_PTR), - readl(cp->regs + REG_TX_SM_1), - readl(cp->regs + REG_TX_SM_2)); - - printk(KERN_ERR "%s: RX_STATE[%08x:%08x:%08x]\n", - dev->name, - readl(cp->regs + REG_RX_CFG), - readl(cp->regs + REG_MAC_RX_STATUS), - readl(cp->regs + REG_MAC_RX_CFG)); - - printk(KERN_ERR "%s: HP_STATE[%08x:%08x:%08x:%08x]\n", - dev->name, - readl(cp->regs + REG_HP_STATE_MACHINE), - readl(cp->regs + REG_HP_STATUS0), - readl(cp->regs + REG_HP_STATUS1), - readl(cp->regs + REG_HP_STATUS2)); - -#if 1 - atomic_inc(&cp->reset_task_pending); - atomic_inc(&cp->reset_task_pending_all); - schedule_work(&cp->reset_task); -#else - atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); - schedule_work(&cp->reset_task); -#endif -} - -static inline int cas_intme(int ring, int entry) -{ - /* Algorithm: IRQ every 1/2 of descriptors. */ - if (!(entry & ((TX_DESC_RINGN_SIZE(ring) >> 1) - 1))) - return 1; - return 0; -} - - -static void cas_write_txd(struct cas *cp, int ring, int entry, - dma_addr_t mapping, int len, u64 ctrl, int last) -{ - struct cas_tx_desc *txd = cp->init_txds[ring] + entry; - - ctrl |= CAS_BASE(TX_DESC_BUFLEN, len); - if (cas_intme(ring, entry)) - ctrl |= TX_DESC_INTME; - if (last) - ctrl |= TX_DESC_EOF; - txd->control = cpu_to_le64(ctrl); - txd->buffer = cpu_to_le64(mapping); -} - -static inline void *tx_tiny_buf(struct cas *cp, const int ring, - const int entry) -{ - return cp->tx_tiny_bufs[ring] + TX_TINY_BUF_LEN*entry; -} - -static inline dma_addr_t tx_tiny_map(struct cas *cp, const int ring, - const int entry, const int tentry) -{ - cp->tx_tiny_use[ring][tentry].nbufs++; - cp->tx_tiny_use[ring][entry].used = 1; - return cp->tx_tiny_dvma[ring] + TX_TINY_BUF_LEN*entry; -} - -static inline int cas_xmit_tx_ringN(struct cas *cp, int ring, - struct sk_buff *skb) -{ - struct net_device *dev = cp->dev; - int entry, nr_frags, frag, tabort, tentry; - dma_addr_t mapping; - unsigned long flags; - u64 ctrl; - u32 len; - - spin_lock_irqsave(&cp->tx_lock[ring], flags); - - /* This is a hard error, log it. */ - if (TX_BUFFS_AVAIL(cp, ring) <= - CAS_TABORT(cp)*(skb_shinfo(skb)->nr_frags + 1)) { - netif_stop_queue(dev); - spin_unlock_irqrestore(&cp->tx_lock[ring], flags); - printk(KERN_ERR PFX "%s: BUG! Tx Ring full when " - "queue awake!\n", dev->name); - return 1; - } - - ctrl = 0; - if (skb->ip_summed == CHECKSUM_HW) { - u64 csum_start_off, csum_stuff_off; - - csum_start_off = (u64) (skb->h.raw - skb->data); - csum_stuff_off = (u64) ((skb->h.raw + skb->csum) - skb->data); - - ctrl = TX_DESC_CSUM_EN | - CAS_BASE(TX_DESC_CSUM_START, csum_start_off) | - CAS_BASE(TX_DESC_CSUM_STUFF, csum_stuff_off); - } - - entry = cp->tx_new[ring]; - cp->tx_skbs[ring][entry] = skb; - - nr_frags = skb_shinfo(skb)->nr_frags; - len = skb_headlen(skb); - mapping = pci_map_page(cp->pdev, virt_to_page(skb->data), - offset_in_page(skb->data), len, - PCI_DMA_TODEVICE); - - tentry = entry; - tabort = cas_calc_tabort(cp, (unsigned long) skb->data, len); - if (unlikely(tabort)) { - /* NOTE: len is always > tabort */ - cas_write_txd(cp, ring, entry, mapping, len - tabort, - ctrl | TX_DESC_SOF, 0); - entry = TX_DESC_NEXT(ring, entry); - - memcpy(tx_tiny_buf(cp, ring, entry), skb->data + - len - tabort, tabort); - mapping = tx_tiny_map(cp, ring, entry, tentry); - cas_write_txd(cp, ring, entry, mapping, tabort, ctrl, - (nr_frags == 0)); - } else { - cas_write_txd(cp, ring, entry, mapping, len, ctrl | - TX_DESC_SOF, (nr_frags == 0)); - } - entry = TX_DESC_NEXT(ring, entry); - - for (frag = 0; frag < nr_frags; frag++) { - skb_frag_t *fragp = &skb_shinfo(skb)->frags[frag]; - - len = fragp->size; - mapping = pci_map_page(cp->pdev, fragp->page, - fragp->page_offset, len, - PCI_DMA_TODEVICE); - - tabort = cas_calc_tabort(cp, fragp->page_offset, len); - if (unlikely(tabort)) { - void *addr; - - /* NOTE: len is always > tabort */ - cas_write_txd(cp, ring, entry, mapping, len - tabort, - ctrl, 0); - entry = TX_DESC_NEXT(ring, entry); - - addr = cas_page_map(fragp->page); - memcpy(tx_tiny_buf(cp, ring, entry), - addr + fragp->page_offset + len - tabort, - tabort); - cas_page_unmap(addr); - mapping = tx_tiny_map(cp, ring, entry, tentry); - len = tabort; - } - - cas_write_txd(cp, ring, entry, mapping, len, ctrl, - (frag + 1 == nr_frags)); - entry = TX_DESC_NEXT(ring, entry); - } - - cp->tx_new[ring] = entry; - if (TX_BUFFS_AVAIL(cp, ring) <= CAS_TABORT(cp)*(MAX_SKB_FRAGS + 1)) - netif_stop_queue(dev); - - if (netif_msg_tx_queued(cp)) - printk(KERN_DEBUG "%s: tx[%d] queued, slot %d, skblen %d, " - "avail %d\n", - dev->name, ring, entry, skb->len, - TX_BUFFS_AVAIL(cp, ring)); - writel(entry, cp->regs + REG_TX_KICKN(ring)); - spin_unlock_irqrestore(&cp->tx_lock[ring], flags); - return 0; -} - -static int cas_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct cas *cp = netdev_priv(dev); - - /* this is only used as a load-balancing hint, so it doesn't - * need to be SMP safe - */ - static int ring; - - skb = skb_padto(skb, cp->min_frame_size); - if (!skb) - return 0; - - /* XXX: we need some higher-level QoS hooks to steer packets to - * individual queues. - */ - if (cas_xmit_tx_ringN(cp, ring++ & N_TX_RINGS_MASK, skb)) - return 1; - dev->trans_start = jiffies; - return 0; -} - -static void cas_init_tx_dma(struct cas *cp) -{ - u64 desc_dma = cp->block_dvma; - unsigned long off; - u32 val; - int i; - - /* set up tx completion writeback registers. must be 8-byte aligned */ -#ifdef USE_TX_COMPWB - off = offsetof(struct cas_init_block, tx_compwb); - writel((desc_dma + off) >> 32, cp->regs + REG_TX_COMPWB_DB_HI); - writel((desc_dma + off) & 0xffffffff, cp->regs + REG_TX_COMPWB_DB_LOW); -#endif - - /* enable completion writebacks, enable paced mode, - * disable read pipe, and disable pre-interrupt compwbs - */ - val = TX_CFG_COMPWB_Q1 | TX_CFG_COMPWB_Q2 | - TX_CFG_COMPWB_Q3 | TX_CFG_COMPWB_Q4 | - TX_CFG_DMA_RDPIPE_DIS | TX_CFG_PACED_MODE | - TX_CFG_INTR_COMPWB_DIS; - - /* write out tx ring info and tx desc bases */ - for (i = 0; i < MAX_TX_RINGS; i++) { - off = (unsigned long) cp->init_txds[i] - - (unsigned long) cp->init_block; - - val |= CAS_TX_RINGN_BASE(i); - writel((desc_dma + off) >> 32, cp->regs + REG_TX_DBN_HI(i)); - writel((desc_dma + off) & 0xffffffff, cp->regs + - REG_TX_DBN_LOW(i)); - /* don't zero out the kick register here as the system - * will wedge - */ - } - writel(val, cp->regs + REG_TX_CFG); - - /* program max burst sizes. these numbers should be different - * if doing QoS. - */ -#ifdef USE_QOS - writel(0x800, cp->regs + REG_TX_MAXBURST_0); - writel(0x1600, cp->regs + REG_TX_MAXBURST_1); - writel(0x2400, cp->regs + REG_TX_MAXBURST_2); - writel(0x4800, cp->regs + REG_TX_MAXBURST_3); -#else - writel(0x800, cp->regs + REG_TX_MAXBURST_0); - writel(0x800, cp->regs + REG_TX_MAXBURST_1); - writel(0x800, cp->regs + REG_TX_MAXBURST_2); - writel(0x800, cp->regs + REG_TX_MAXBURST_3); -#endif -} - -/* Must be invoked under cp->lock. */ -static inline void cas_init_dma(struct cas *cp) -{ - cas_init_tx_dma(cp); - cas_init_rx_dma(cp); -} - -/* Must be invoked under cp->lock. */ -static u32 cas_setup_multicast(struct cas *cp) -{ - u32 rxcfg = 0; - int i; - - if (cp->dev->flags & IFF_PROMISC) { - rxcfg |= MAC_RX_CFG_PROMISC_EN; - - } else if (cp->dev->flags & IFF_ALLMULTI) { - for (i=0; i < 16; i++) - writel(0xFFFF, cp->regs + REG_MAC_HASH_TABLEN(i)); - rxcfg |= MAC_RX_CFG_HASH_FILTER_EN; - - } else { - u16 hash_table[16]; - u32 crc; - struct dev_mc_list *dmi = cp->dev->mc_list; - int i; - - /* use the alternate mac address registers for the - * first 15 multicast addresses - */ - for (i = 1; i <= CAS_MC_EXACT_MATCH_SIZE; i++) { - if (!dmi) { - writel(0x0, cp->regs + REG_MAC_ADDRN(i*3 + 0)); - writel(0x0, cp->regs + REG_MAC_ADDRN(i*3 + 1)); - writel(0x0, cp->regs + REG_MAC_ADDRN(i*3 + 2)); - continue; - } - writel((dmi->dmi_addr[4] << 8) | dmi->dmi_addr[5], - cp->regs + REG_MAC_ADDRN(i*3 + 0)); - writel((dmi->dmi_addr[2] << 8) | dmi->dmi_addr[3], - cp->regs + REG_MAC_ADDRN(i*3 + 1)); - writel((dmi->dmi_addr[0] << 8) | dmi->dmi_addr[1], - cp->regs + REG_MAC_ADDRN(i*3 + 2)); - dmi = dmi->next; - } - - /* use hw hash table for the next series of - * multicast addresses - */ - memset(hash_table, 0, sizeof(hash_table)); - while (dmi) { - crc = ether_crc_le(ETH_ALEN, dmi->dmi_addr); - crc >>= 24; - hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf)); - dmi = dmi->next; - } - for (i=0; i < 16; i++) - writel(hash_table[i], cp->regs + - REG_MAC_HASH_TABLEN(i)); - rxcfg |= MAC_RX_CFG_HASH_FILTER_EN; - } - - return rxcfg; -} - -/* must be invoked under cp->stat_lock[N_TX_RINGS] */ -static void cas_clear_mac_err(struct cas *cp) -{ - writel(0, cp->regs + REG_MAC_COLL_NORMAL); - writel(0, cp->regs + REG_MAC_COLL_FIRST); - writel(0, cp->regs + REG_MAC_COLL_EXCESS); - writel(0, cp->regs + REG_MAC_COLL_LATE); - writel(0, cp->regs + REG_MAC_TIMER_DEFER); - writel(0, cp->regs + REG_MAC_ATTEMPTS_PEAK); - writel(0, cp->regs + REG_MAC_RECV_FRAME); - writel(0, cp->regs + REG_MAC_LEN_ERR); - writel(0, cp->regs + REG_MAC_ALIGN_ERR); - writel(0, cp->regs + REG_MAC_FCS_ERR); - writel(0, cp->regs + REG_MAC_RX_CODE_ERR); -} - - -static void cas_mac_reset(struct cas *cp) -{ - int i; - - /* do both TX and RX reset */ - writel(0x1, cp->regs + REG_MAC_TX_RESET); - writel(0x1, cp->regs + REG_MAC_RX_RESET); - - /* wait for TX */ - i = STOP_TRIES; - while (i-- > 0) { - if (readl(cp->regs + REG_MAC_TX_RESET) == 0) - break; - udelay(10); - } - - /* wait for RX */ - i = STOP_TRIES; - while (i-- > 0) { - if (readl(cp->regs + REG_MAC_RX_RESET) == 0) - break; - udelay(10); - } - - if (readl(cp->regs + REG_MAC_TX_RESET) | - readl(cp->regs + REG_MAC_RX_RESET)) - printk(KERN_ERR "%s: mac tx[%d]/rx[%d] reset failed [%08x]\n", - cp->dev->name, readl(cp->regs + REG_MAC_TX_RESET), - readl(cp->regs + REG_MAC_RX_RESET), - readl(cp->regs + REG_MAC_STATE_MACHINE)); -} - - -/* Must be invoked under cp->lock. */ -static void cas_init_mac(struct cas *cp) -{ - unsigned char *e = &cp->dev->dev_addr[0]; - int i; -#ifdef CONFIG_CASSINI_MULTICAST_REG_WRITE - u32 rxcfg; -#endif - cas_mac_reset(cp); - - /* setup core arbitration weight register */ - writel(CAWR_RR_DIS, cp->regs + REG_CAWR); - - /* XXX Use pci_dma_burst_advice() */ -#if !defined(CONFIG_SPARC64) && !defined(CONFIG_ALPHA) - /* set the infinite burst register for chips that don't have - * pci issues. - */ - if ((cp->cas_flags & CAS_FLAG_TARGET_ABORT) == 0) - writel(INF_BURST_EN, cp->regs + REG_INF_BURST); -#endif - - writel(0x1BF0, cp->regs + REG_MAC_SEND_PAUSE); - - writel(0x00, cp->regs + REG_MAC_IPG0); - writel(0x08, cp->regs + REG_MAC_IPG1); - writel(0x04, cp->regs + REG_MAC_IPG2); - - /* change later for 802.3z */ - writel(0x40, cp->regs + REG_MAC_SLOT_TIME); - - /* min frame + FCS */ - writel(ETH_ZLEN + 4, cp->regs + REG_MAC_FRAMESIZE_MIN); - - /* Ethernet payload + header + FCS + optional VLAN tag. NOTE: we - * specify the maximum frame size to prevent RX tag errors on - * oversized frames. - */ - writel(CAS_BASE(MAC_FRAMESIZE_MAX_BURST, 0x2000) | - CAS_BASE(MAC_FRAMESIZE_MAX_FRAME, - (CAS_MAX_MTU + ETH_HLEN + 4 + 4)), - cp->regs + REG_MAC_FRAMESIZE_MAX); - - /* NOTE: crc_size is used as a surrogate for half-duplex. - * workaround saturn half-duplex issue by increasing preamble - * size to 65 bytes. - */ - if ((cp->cas_flags & CAS_FLAG_SATURN) && cp->crc_size) - writel(0x41, cp->regs + REG_MAC_PA_SIZE); - else - writel(0x07, cp->regs + REG_MAC_PA_SIZE); - writel(0x04, cp->regs + REG_MAC_JAM_SIZE); - writel(0x10, cp->regs + REG_MAC_ATTEMPT_LIMIT); - writel(0x8808, cp->regs + REG_MAC_CTRL_TYPE); - - writel((e[5] | (e[4] << 8)) & 0x3ff, cp->regs + REG_MAC_RANDOM_SEED); - - writel(0, cp->regs + REG_MAC_ADDR_FILTER0); - writel(0, cp->regs + REG_MAC_ADDR_FILTER1); - writel(0, cp->regs + REG_MAC_ADDR_FILTER2); - writel(0, cp->regs + REG_MAC_ADDR_FILTER2_1_MASK); - writel(0, cp->regs + REG_MAC_ADDR_FILTER0_MASK); - - /* setup mac address in perfect filter array */ - for (i = 0; i < 45; i++) - writel(0x0, cp->regs + REG_MAC_ADDRN(i)); - - writel((e[4] << 8) | e[5], cp->regs + REG_MAC_ADDRN(0)); - writel((e[2] << 8) | e[3], cp->regs + REG_MAC_ADDRN(1)); - writel((e[0] << 8) | e[1], cp->regs + REG_MAC_ADDRN(2)); - - writel(0x0001, cp->regs + REG_MAC_ADDRN(42)); - writel(0xc200, cp->regs + REG_MAC_ADDRN(43)); - writel(0x0180, cp->regs + REG_MAC_ADDRN(44)); - -#ifndef CONFIG_CASSINI_MULTICAST_REG_WRITE - cp->mac_rx_cfg = cas_setup_multicast(cp); -#else - /* WTZ: Do what Adrian did in cas_set_multicast. Doing - * a writel does not seem to be necessary because Cassini - * seems to preserve the configuration when we do the reset. - * If the chip is in trouble, though, it is not clear if we - * can really count on this behavior. cas_set_multicast uses - * spin_lock_irqsave, but we are called only in cas_init_hw and - * cas_init_hw is protected by cas_lock_all, which calls - * spin_lock_irq (so it doesn't need to save the flags, and - * we should be OK for the writel, as that is the only - * difference). - */ - cp->mac_rx_cfg = rxcfg = cas_setup_multicast(cp); - writel(rxcfg, cp->regs + REG_MAC_RX_CFG); -#endif - spin_lock(&cp->stat_lock[N_TX_RINGS]); - cas_clear_mac_err(cp); - spin_unlock(&cp->stat_lock[N_TX_RINGS]); - - /* Setup MAC interrupts. We want to get all of the interesting - * counter expiration events, but we do not want to hear about - * normal rx/tx as the DMA engine tells us that. - */ - writel(MAC_TX_FRAME_XMIT, cp->regs + REG_MAC_TX_MASK); - writel(MAC_RX_FRAME_RECV, cp->regs + REG_MAC_RX_MASK); - - /* Don't enable even the PAUSE interrupts for now, we - * make no use of those events other than to record them. - */ - writel(0xffffffff, cp->regs + REG_MAC_CTRL_MASK); -} - -/* Must be invoked under cp->lock. */ -static void cas_init_pause_thresholds(struct cas *cp) -{ - /* Calculate pause thresholds. Setting the OFF threshold to the - * full RX fifo size effectively disables PAUSE generation - */ - if (cp->rx_fifo_size <= (2 * 1024)) { - cp->rx_pause_off = cp->rx_pause_on = cp->rx_fifo_size; - } else { - int max_frame = (cp->dev->mtu + ETH_HLEN + 4 + 4 + 64) & ~63; - if (max_frame * 3 > cp->rx_fifo_size) { - cp->rx_pause_off = 7104; - cp->rx_pause_on = 960; - } else { - int off = (cp->rx_fifo_size - (max_frame * 2)); - int on = off - max_frame; - cp->rx_pause_off = off; - cp->rx_pause_on = on; - } - } -} - -static int cas_vpd_match(const void __iomem *p, const char *str) -{ - int len = strlen(str) + 1; - int i; - - for (i = 0; i < len; i++) { - if (readb(p + i) != str[i]) - return 0; - } - return 1; -} - - -/* get the mac address by reading the vpd information in the rom. - * also get the phy type and determine if there's an entropy generator. - * NOTE: this is a bit convoluted for the following reasons: - * 1) vpd info has order-dependent mac addresses for multinic cards - * 2) the only way to determine the nic order is to use the slot - * number. - * 3) fiber cards don't have bridges, so their slot numbers don't - * mean anything. - * 4) we don't actually know we have a fiber card until after - * the mac addresses are parsed. - */ -static int cas_get_vpd_info(struct cas *cp, unsigned char *dev_addr, - const int offset) -{ - void __iomem *p = cp->regs + REG_EXPANSION_ROM_RUN_START; - void __iomem *base, *kstart; - int i, len; - int found = 0; -#define VPD_FOUND_MAC 0x01 -#define VPD_FOUND_PHY 0x02 - - int phy_type = CAS_PHY_MII_MDIO0; /* default phy type */ - int mac_off = 0; - - /* give us access to the PROM */ - writel(BIM_LOCAL_DEV_PROM | BIM_LOCAL_DEV_PAD, - cp->regs + REG_BIM_LOCAL_DEV_EN); - - /* check for an expansion rom */ - if (readb(p) != 0x55 || readb(p + 1) != 0xaa) - goto use_random_mac_addr; - - /* search for beginning of vpd */ - base = 0; - for (i = 2; i < EXPANSION_ROM_SIZE; i++) { - /* check for PCIR */ - if ((readb(p + i + 0) == 0x50) && - (readb(p + i + 1) == 0x43) && - (readb(p + i + 2) == 0x49) && - (readb(p + i + 3) == 0x52)) { - base = p + (readb(p + i + 8) | - (readb(p + i + 9) << 8)); - break; - } - } - - if (!base || (readb(base) != 0x82)) - goto use_random_mac_addr; - - i = (readb(base + 1) | (readb(base + 2) << 8)) + 3; - while (i < EXPANSION_ROM_SIZE) { - if (readb(base + i) != 0x90) /* no vpd found */ - goto use_random_mac_addr; - - /* found a vpd field */ - len = readb(base + i + 1) | (readb(base + i + 2) << 8); - - /* extract keywords */ - kstart = base + i + 3; - p = kstart; - while ((p - kstart) < len) { - int klen = readb(p + 2); - int j; - char type; - - p += 3; - - /* look for the following things: - * -- correct length == 29 - * 3 (type) + 2 (size) + - * 18 (strlen("local-mac-address") + 1) + - * 6 (mac addr) - * -- VPD Instance 'I' - * -- VPD Type Bytes 'B' - * -- VPD data length == 6 - * -- property string == local-mac-address - * - * -- correct length == 24 - * 3 (type) + 2 (size) + - * 12 (strlen("entropy-dev") + 1) + - * 7 (strlen("vms110") + 1) - * -- VPD Instance 'I' - * -- VPD Type String 'B' - * -- VPD data length == 7 - * -- property string == entropy-dev - * - * -- correct length == 18 - * 3 (type) + 2 (size) + - * 9 (strlen("phy-type") + 1) + - * 4 (strlen("pcs") + 1) - * -- VPD Instance 'I' - * -- VPD Type String 'S' - * -- VPD data length == 4 - * -- property string == phy-type - * - * -- correct length == 23 - * 3 (type) + 2 (size) + - * 14 (strlen("phy-interface") + 1) + - * 4 (strlen("pcs") + 1) - * -- VPD Instance 'I' - * -- VPD Type String 'S' - * -- VPD data length == 4 - * -- property string == phy-interface - */ - if (readb(p) != 'I') - goto next; - - /* finally, check string and length */ - type = readb(p + 3); - if (type == 'B') { - if ((klen == 29) && readb(p + 4) == 6 && - cas_vpd_match(p + 5, - "local-mac-address")) { - if (mac_off++ > offset) - goto next; - - /* set mac address */ - for (j = 0; j < 6; j++) - dev_addr[j] = - readb(p + 23 + j); - goto found_mac; - } - } - - if (type != 'S') - goto next; - -#ifdef USE_ENTROPY_DEV - if ((klen == 24) && - cas_vpd_match(p + 5, "entropy-dev") && - cas_vpd_match(p + 17, "vms110")) { - cp->cas_flags |= CAS_FLAG_ENTROPY_DEV; - goto next; - } -#endif - - if (found & VPD_FOUND_PHY) - goto next; - - if ((klen == 18) && readb(p + 4) == 4 && - cas_vpd_match(p + 5, "phy-type")) { - if (cas_vpd_match(p + 14, "pcs")) { - phy_type = CAS_PHY_SERDES; - goto found_phy; - } - } - - if ((klen == 23) && readb(p + 4) == 4 && - cas_vpd_match(p + 5, "phy-interface")) { - if (cas_vpd_match(p + 19, "pcs")) { - phy_type = CAS_PHY_SERDES; - goto found_phy; - } - } -found_mac: - found |= VPD_FOUND_MAC; - goto next; - -found_phy: - found |= VPD_FOUND_PHY; - -next: - p += klen; - } - i += len + 3; - } - -use_random_mac_addr: - if (found & VPD_FOUND_MAC) - goto done; - - /* Sun MAC prefix then 3 random bytes. */ - printk(PFX "MAC address not found in ROM VPD\n"); - dev_addr[0] = 0x08; - dev_addr[1] = 0x00; - dev_addr[2] = 0x20; - get_random_bytes(dev_addr + 3, 3); - -done: - writel(0, cp->regs + REG_BIM_LOCAL_DEV_EN); - return phy_type; -} - -/* check pci invariants */ -static void cas_check_pci_invariants(struct cas *cp) -{ - struct pci_dev *pdev = cp->pdev; - u8 rev; - - cp->cas_flags = 0; - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); - if ((pdev->vendor == PCI_VENDOR_ID_SUN) && - (pdev->device == PCI_DEVICE_ID_SUN_CASSINI)) { - if (rev >= CAS_ID_REVPLUS) - cp->cas_flags |= CAS_FLAG_REG_PLUS; - if (rev < CAS_ID_REVPLUS02u) - cp->cas_flags |= CAS_FLAG_TARGET_ABORT; - - /* Original Cassini supports HW CSUM, but it's not - * enabled by default as it can trigger TX hangs. - */ - if (rev < CAS_ID_REV2) - cp->cas_flags |= CAS_FLAG_NO_HW_CSUM; - } else { - /* Only sun has original cassini chips. */ - cp->cas_flags |= CAS_FLAG_REG_PLUS; - - /* We use a flag because the same phy might be externally - * connected. - */ - if ((pdev->vendor == PCI_VENDOR_ID_NS) && - (pdev->device == PCI_DEVICE_ID_NS_SATURN)) - cp->cas_flags |= CAS_FLAG_SATURN; - } -} - - -static int cas_check_invariants(struct cas *cp) -{ - struct pci_dev *pdev = cp->pdev; - u32 cfg; - int i; - - /* get page size for rx buffers. */ - cp->page_order = 0; -#ifdef USE_PAGE_ORDER - if (PAGE_SHIFT < CAS_JUMBO_PAGE_SHIFT) { - /* see if we can allocate larger pages */ - struct page *page = alloc_pages(GFP_ATOMIC, - CAS_JUMBO_PAGE_SHIFT - - PAGE_SHIFT); - if (page) { - __free_pages(page, CAS_JUMBO_PAGE_SHIFT - PAGE_SHIFT); - cp->page_order = CAS_JUMBO_PAGE_SHIFT - PAGE_SHIFT; - } else { - printk(PFX "MTU limited to %d bytes\n", CAS_MAX_MTU); - } - } -#endif - cp->page_size = (PAGE_SIZE << cp->page_order); - - /* Fetch the FIFO configurations. */ - cp->tx_fifo_size = readl(cp->regs + REG_TX_FIFO_SIZE) * 64; - cp->rx_fifo_size = RX_FIFO_SIZE; - - /* finish phy determination. MDIO1 takes precedence over MDIO0 if - * they're both connected. - */ - cp->phy_type = cas_get_vpd_info(cp, cp->dev->dev_addr, - PCI_SLOT(pdev->devfn)); - if (cp->phy_type & CAS_PHY_SERDES) { - cp->cas_flags |= CAS_FLAG_1000MB_CAP; - return 0; /* no more checking needed */ - } - - /* MII */ - cfg = readl(cp->regs + REG_MIF_CFG); - if (cfg & MIF_CFG_MDIO_1) { - cp->phy_type = CAS_PHY_MII_MDIO1; - } else if (cfg & MIF_CFG_MDIO_0) { - cp->phy_type = CAS_PHY_MII_MDIO0; - } - - cas_mif_poll(cp, 0); - writel(PCS_DATAPATH_MODE_MII, cp->regs + REG_PCS_DATAPATH_MODE); - - for (i = 0; i < 32; i++) { - u32 phy_id; - int j; - - for (j = 0; j < 3; j++) { - cp->phy_addr = i; - phy_id = cas_phy_read(cp, MII_PHYSID1) << 16; - phy_id |= cas_phy_read(cp, MII_PHYSID2); - if (phy_id && (phy_id != 0xFFFFFFFF)) { - cp->phy_id = phy_id; - goto done; - } - } - } - printk(KERN_ERR PFX "MII phy did not respond [%08x]\n", - readl(cp->regs + REG_MIF_STATE_MACHINE)); - return -1; - -done: - /* see if we can do gigabit */ - cfg = cas_phy_read(cp, MII_BMSR); - if ((cfg & CAS_BMSR_1000_EXTEND) && - cas_phy_read(cp, CAS_MII_1000_EXTEND)) - cp->cas_flags |= CAS_FLAG_1000MB_CAP; - return 0; -} - -/* Must be invoked under cp->lock. */ -static inline void cas_start_dma(struct cas *cp) -{ - int i; - u32 val; - int txfailed = 0; - - /* enable dma */ - val = readl(cp->regs + REG_TX_CFG) | TX_CFG_DMA_EN; - writel(val, cp->regs + REG_TX_CFG); - val = readl(cp->regs + REG_RX_CFG) | RX_CFG_DMA_EN; - writel(val, cp->regs + REG_RX_CFG); - - /* enable the mac */ - val = readl(cp->regs + REG_MAC_TX_CFG) | MAC_TX_CFG_EN; - writel(val, cp->regs + REG_MAC_TX_CFG); - val = readl(cp->regs + REG_MAC_RX_CFG) | MAC_RX_CFG_EN; - writel(val, cp->regs + REG_MAC_RX_CFG); - - i = STOP_TRIES; - while (i-- > 0) { - val = readl(cp->regs + REG_MAC_TX_CFG); - if ((val & MAC_TX_CFG_EN)) - break; - udelay(10); - } - if (i < 0) txfailed = 1; - i = STOP_TRIES; - while (i-- > 0) { - val = readl(cp->regs + REG_MAC_RX_CFG); - if ((val & MAC_RX_CFG_EN)) { - if (txfailed) { - printk(KERN_ERR - "%s: enabling mac failed [tx:%08x:%08x].\n", - cp->dev->name, - readl(cp->regs + REG_MIF_STATE_MACHINE), - readl(cp->regs + REG_MAC_STATE_MACHINE)); - } - goto enable_rx_done; - } - udelay(10); - } - printk(KERN_ERR "%s: enabling mac failed [%s:%08x:%08x].\n", - cp->dev->name, - (txfailed? "tx,rx":"rx"), - readl(cp->regs + REG_MIF_STATE_MACHINE), - readl(cp->regs + REG_MAC_STATE_MACHINE)); - -enable_rx_done: - cas_unmask_intr(cp); /* enable interrupts */ - writel(RX_DESC_RINGN_SIZE(0) - 4, cp->regs + REG_RX_KICK); - writel(0, cp->regs + REG_RX_COMP_TAIL); - - if (cp->cas_flags & CAS_FLAG_REG_PLUS) { - if (N_RX_DESC_RINGS > 1) - writel(RX_DESC_RINGN_SIZE(1) - 4, - cp->regs + REG_PLUS_RX_KICK1); - - for (i = 1; i < N_RX_COMP_RINGS; i++) - writel(0, cp->regs + REG_PLUS_RX_COMPN_TAIL(i)); - } -} - -/* Must be invoked under cp->lock. */ -static void cas_read_pcs_link_mode(struct cas *cp, int *fd, int *spd, - int *pause) -{ - u32 val = readl(cp->regs + REG_PCS_MII_LPA); - *fd = (val & PCS_MII_LPA_FD) ? 1 : 0; - *pause = (val & PCS_MII_LPA_SYM_PAUSE) ? 0x01 : 0x00; - if (val & PCS_MII_LPA_ASYM_PAUSE) - *pause |= 0x10; - *spd = 1000; -} - -/* Must be invoked under cp->lock. */ -static void cas_read_mii_link_mode(struct cas *cp, int *fd, int *spd, - int *pause) -{ - u32 val; - - *fd = 0; - *spd = 10; - *pause = 0; - - /* use GMII registers */ - val = cas_phy_read(cp, MII_LPA); - if (val & CAS_LPA_PAUSE) - *pause = 0x01; - - if (val & CAS_LPA_ASYM_PAUSE) - *pause |= 0x10; - - if (val & LPA_DUPLEX) - *fd = 1; - if (val & LPA_100) - *spd = 100; - - if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { - val = cas_phy_read(cp, CAS_MII_1000_STATUS); - if (val & (CAS_LPA_1000FULL | CAS_LPA_1000HALF)) - *spd = 1000; - if (val & CAS_LPA_1000FULL) - *fd = 1; - } -} - -/* A link-up condition has occurred, initialize and enable the - * rest of the chip. - * - * Must be invoked under cp->lock. - */ -static void cas_set_link_modes(struct cas *cp) -{ - u32 val; - int full_duplex, speed, pause; - - full_duplex = 0; - speed = 10; - pause = 0; - - if (CAS_PHY_MII(cp->phy_type)) { - cas_mif_poll(cp, 0); - val = cas_phy_read(cp, MII_BMCR); - if (val & BMCR_ANENABLE) { - cas_read_mii_link_mode(cp, &full_duplex, &speed, - &pause); - } else { - if (val & BMCR_FULLDPLX) - full_duplex = 1; - - if (val & BMCR_SPEED100) - speed = 100; - else if (val & CAS_BMCR_SPEED1000) - speed = (cp->cas_flags & CAS_FLAG_1000MB_CAP) ? - 1000 : 100; - } - cas_mif_poll(cp, 1); - - } else { - val = readl(cp->regs + REG_PCS_MII_CTRL); - cas_read_pcs_link_mode(cp, &full_duplex, &speed, &pause); - if ((val & PCS_MII_AUTONEG_EN) == 0) { - if (val & PCS_MII_CTRL_DUPLEX) - full_duplex = 1; - } - } - - if (netif_msg_link(cp)) - printk(KERN_INFO "%s: Link up at %d Mbps, %s-duplex.\n", - cp->dev->name, speed, (full_duplex ? "full" : "half")); - - val = MAC_XIF_TX_MII_OUTPUT_EN | MAC_XIF_LINK_LED; - if (CAS_PHY_MII(cp->phy_type)) { - val |= MAC_XIF_MII_BUFFER_OUTPUT_EN; - if (!full_duplex) - val |= MAC_XIF_DISABLE_ECHO; - } - if (full_duplex) - val |= MAC_XIF_FDPLX_LED; - if (speed == 1000) - val |= MAC_XIF_GMII_MODE; - writel(val, cp->regs + REG_MAC_XIF_CFG); - - /* deal with carrier and collision detect. */ - val = MAC_TX_CFG_IPG_EN; - if (full_duplex) { - val |= MAC_TX_CFG_IGNORE_CARRIER; - val |= MAC_TX_CFG_IGNORE_COLL; - } else { -#ifndef USE_CSMA_CD_PROTO - val |= MAC_TX_CFG_NEVER_GIVE_UP_EN; - val |= MAC_TX_CFG_NEVER_GIVE_UP_LIM; -#endif - } - /* val now set up for REG_MAC_TX_CFG */ - - /* If gigabit and half-duplex, enable carrier extension - * mode. increase slot time to 512 bytes as well. - * else, disable it and make sure slot time is 64 bytes. - * also activate checksum bug workaround - */ - if ((speed == 1000) && !full_duplex) { - writel(val | MAC_TX_CFG_CARRIER_EXTEND, - cp->regs + REG_MAC_TX_CFG); - - val = readl(cp->regs + REG_MAC_RX_CFG); - val &= ~MAC_RX_CFG_STRIP_FCS; /* checksum workaround */ - writel(val | MAC_RX_CFG_CARRIER_EXTEND, - cp->regs + REG_MAC_RX_CFG); - - writel(0x200, cp->regs + REG_MAC_SLOT_TIME); - - cp->crc_size = 4; - /* minimum size gigabit frame at half duplex */ - cp->min_frame_size = CAS_1000MB_MIN_FRAME; - - } else { - writel(val, cp->regs + REG_MAC_TX_CFG); - - /* checksum bug workaround. don't strip FCS when in - * half-duplex mode - */ - val = readl(cp->regs + REG_MAC_RX_CFG); - if (full_duplex) { - val |= MAC_RX_CFG_STRIP_FCS; - cp->crc_size = 0; - cp->min_frame_size = CAS_MIN_MTU; - } else { - val &= ~MAC_RX_CFG_STRIP_FCS; - cp->crc_size = 4; - cp->min_frame_size = CAS_MIN_FRAME; - } - writel(val & ~MAC_RX_CFG_CARRIER_EXTEND, - cp->regs + REG_MAC_RX_CFG); - writel(0x40, cp->regs + REG_MAC_SLOT_TIME); - } - - if (netif_msg_link(cp)) { - if (pause & 0x01) { - printk(KERN_INFO "%s: Pause is enabled " - "(rxfifo: %d off: %d on: %d)\n", - cp->dev->name, - cp->rx_fifo_size, - cp->rx_pause_off, - cp->rx_pause_on); - } else if (pause & 0x10) { - printk(KERN_INFO "%s: TX pause enabled\n", - cp->dev->name); - } else { - printk(KERN_INFO "%s: Pause is disabled\n", - cp->dev->name); - } - } - - val = readl(cp->regs + REG_MAC_CTRL_CFG); - val &= ~(MAC_CTRL_CFG_SEND_PAUSE_EN | MAC_CTRL_CFG_RECV_PAUSE_EN); - if (pause) { /* symmetric or asymmetric pause */ - val |= MAC_CTRL_CFG_SEND_PAUSE_EN; - if (pause & 0x01) { /* symmetric pause */ - val |= MAC_CTRL_CFG_RECV_PAUSE_EN; - } - } - writel(val, cp->regs + REG_MAC_CTRL_CFG); - cas_start_dma(cp); -} - -/* Must be invoked under cp->lock. */ -static void cas_init_hw(struct cas *cp, int restart_link) -{ - if (restart_link) - cas_phy_init(cp); - - cas_init_pause_thresholds(cp); - cas_init_mac(cp); - cas_init_dma(cp); - - if (restart_link) { - /* Default aneg parameters */ - cp->timer_ticks = 0; - cas_begin_auto_negotiation(cp, NULL); - } else if (cp->lstate == link_up) { - cas_set_link_modes(cp); - netif_carrier_on(cp->dev); - } -} - -/* Must be invoked under cp->lock. on earlier cassini boards, - * SOFT_0 is tied to PCI reset. we use this to force a pci reset, - * let it settle out, and then restore pci state. - */ -static void cas_hard_reset(struct cas *cp) -{ - writel(BIM_LOCAL_DEV_SOFT_0, cp->regs + REG_BIM_LOCAL_DEV_EN); - udelay(20); - pci_restore_state(cp->pdev); -} - - -static void cas_global_reset(struct cas *cp, int blkflag) -{ - int limit; - - /* issue a global reset. don't use RSTOUT. */ - if (blkflag && !CAS_PHY_MII(cp->phy_type)) { - /* For PCS, when the blkflag is set, we should set the - * SW_REST_BLOCK_PCS_SLINK bit to prevent the results of - * the last autonegotiation from being cleared. We'll - * need some special handling if the chip is set into a - * loopback mode. - */ - writel((SW_RESET_TX | SW_RESET_RX | SW_RESET_BLOCK_PCS_SLINK), - cp->regs + REG_SW_RESET); - } else { - writel(SW_RESET_TX | SW_RESET_RX, cp->regs + REG_SW_RESET); - } - - /* need to wait at least 3ms before polling register */ - mdelay(3); - - limit = STOP_TRIES; - while (limit-- > 0) { - u32 val = readl(cp->regs + REG_SW_RESET); - if ((val & (SW_RESET_TX | SW_RESET_RX)) == 0) - goto done; - udelay(10); - } - printk(KERN_ERR "%s: sw reset failed.\n", cp->dev->name); - -done: - /* enable various BIM interrupts */ - writel(BIM_CFG_DPAR_INTR_ENABLE | BIM_CFG_RMA_INTR_ENABLE | - BIM_CFG_RTA_INTR_ENABLE, cp->regs + REG_BIM_CFG); - - /* clear out pci error status mask for handled errors. - * we don't deal with DMA counter overflows as they happen - * all the time. - */ - writel(0xFFFFFFFFU & ~(PCI_ERR_BADACK | PCI_ERR_DTRTO | - PCI_ERR_OTHER | PCI_ERR_BIM_DMA_WRITE | - PCI_ERR_BIM_DMA_READ), cp->regs + - REG_PCI_ERR_STATUS_MASK); - - /* set up for MII by default to address mac rx reset timeout - * issue - */ - writel(PCS_DATAPATH_MODE_MII, cp->regs + REG_PCS_DATAPATH_MODE); -} - -static void cas_reset(struct cas *cp, int blkflag) -{ - u32 val; - - cas_mask_intr(cp); - cas_global_reset(cp, blkflag); - cas_mac_reset(cp); - cas_entropy_reset(cp); - - /* disable dma engines. */ - val = readl(cp->regs + REG_TX_CFG); - val &= ~TX_CFG_DMA_EN; - writel(val, cp->regs + REG_TX_CFG); - - val = readl(cp->regs + REG_RX_CFG); - val &= ~RX_CFG_DMA_EN; - writel(val, cp->regs + REG_RX_CFG); - - /* program header parser */ - if ((cp->cas_flags & CAS_FLAG_TARGET_ABORT) || - (CAS_HP_ALT_FIRMWARE == cas_prog_null)) { - cas_load_firmware(cp, CAS_HP_FIRMWARE); - } else { - cas_load_firmware(cp, CAS_HP_ALT_FIRMWARE); - } - - /* clear out error registers */ - spin_lock(&cp->stat_lock[N_TX_RINGS]); - cas_clear_mac_err(cp); - spin_unlock(&cp->stat_lock[N_TX_RINGS]); -} - -/* Shut down the chip, must be called with pm_sem held. */ -static void cas_shutdown(struct cas *cp) -{ - unsigned long flags; - - /* Make us not-running to avoid timers respawning */ - cp->hw_running = 0; - - del_timer_sync(&cp->link_timer); - - /* Stop the reset task */ -#if 0 - while (atomic_read(&cp->reset_task_pending_mtu) || - atomic_read(&cp->reset_task_pending_spare) || - atomic_read(&cp->reset_task_pending_all)) - schedule(); - -#else - while (atomic_read(&cp->reset_task_pending)) - schedule(); -#endif - /* Actually stop the chip */ - cas_lock_all_save(cp, flags); - cas_reset(cp, 0); - if (cp->cas_flags & CAS_FLAG_SATURN) - cas_phy_powerdown(cp); - cas_unlock_all_restore(cp, flags); -} - -static int cas_change_mtu(struct net_device *dev, int new_mtu) -{ - struct cas *cp = netdev_priv(dev); - - if (new_mtu < CAS_MIN_MTU || new_mtu > CAS_MAX_MTU) - return -EINVAL; - - dev->mtu = new_mtu; - if (!netif_running(dev) || !netif_device_present(dev)) - return 0; - - /* let the reset task handle it */ -#if 1 - atomic_inc(&cp->reset_task_pending); - if ((cp->phy_type & CAS_PHY_SERDES)) { - atomic_inc(&cp->reset_task_pending_all); - } else { - atomic_inc(&cp->reset_task_pending_mtu); - } - schedule_work(&cp->reset_task); -#else - atomic_set(&cp->reset_task_pending, (cp->phy_type & CAS_PHY_SERDES) ? - CAS_RESET_ALL : CAS_RESET_MTU); - printk(KERN_ERR "reset called in cas_change_mtu\n"); - schedule_work(&cp->reset_task); -#endif - - flush_scheduled_work(); - return 0; -} - -static void cas_clean_txd(struct cas *cp, int ring) -{ - struct cas_tx_desc *txd = cp->init_txds[ring]; - struct sk_buff *skb, **skbs = cp->tx_skbs[ring]; - u64 daddr, dlen; - int i, size; - - size = TX_DESC_RINGN_SIZE(ring); - for (i = 0; i < size; i++) { - int frag; - - if (skbs[i] == NULL) - continue; - - skb = skbs[i]; - skbs[i] = NULL; - - for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) { - int ent = i & (size - 1); - - /* first buffer is never a tiny buffer and so - * needs to be unmapped. - */ - daddr = le64_to_cpu(txd[ent].buffer); - dlen = CAS_VAL(TX_DESC_BUFLEN, - le64_to_cpu(txd[ent].control)); - pci_unmap_page(cp->pdev, daddr, dlen, - PCI_DMA_TODEVICE); - - if (frag != skb_shinfo(skb)->nr_frags) { - i++; - - /* next buffer might by a tiny buffer. - * skip past it. - */ - ent = i & (size - 1); - if (cp->tx_tiny_use[ring][ent].used) - i++; - } - } - dev_kfree_skb_any(skb); - } - - /* zero out tiny buf usage */ - memset(cp->tx_tiny_use[ring], 0, size*sizeof(*cp->tx_tiny_use[ring])); -} - -/* freed on close */ -static inline void cas_free_rx_desc(struct cas *cp, int ring) -{ - cas_page_t **page = cp->rx_pages[ring]; - int i, size; - - size = RX_DESC_RINGN_SIZE(ring); - for (i = 0; i < size; i++) { - if (page[i]) { - cas_page_free(cp, page[i]); - page[i] = NULL; - } - } -} - -static void cas_free_rxds(struct cas *cp) -{ - int i; - - for (i = 0; i < N_RX_DESC_RINGS; i++) - cas_free_rx_desc(cp, i); -} - -/* Must be invoked under cp->lock. */ -static void cas_clean_rings(struct cas *cp) -{ - int i; - - /* need to clean all tx rings */ - memset(cp->tx_old, 0, sizeof(*cp->tx_old)*N_TX_RINGS); - memset(cp->tx_new, 0, sizeof(*cp->tx_new)*N_TX_RINGS); - for (i = 0; i < N_TX_RINGS; i++) - cas_clean_txd(cp, i); - - /* zero out init block */ - memset(cp->init_block, 0, sizeof(struct cas_init_block)); - cas_clean_rxds(cp); - cas_clean_rxcs(cp); -} - -/* allocated on open */ -static inline int cas_alloc_rx_desc(struct cas *cp, int ring) -{ - cas_page_t **page = cp->rx_pages[ring]; - int size, i = 0; - - size = RX_DESC_RINGN_SIZE(ring); - for (i = 0; i < size; i++) { - if ((page[i] = cas_page_alloc(cp, GFP_KERNEL)) == NULL) - return -1; - } - return 0; -} - -static int cas_alloc_rxds(struct cas *cp) -{ - int i; - - for (i = 0; i < N_RX_DESC_RINGS; i++) { - if (cas_alloc_rx_desc(cp, i) < 0) { - cas_free_rxds(cp); - return -1; - } - } - return 0; -} - -static void cas_reset_task(void *data) -{ - struct cas *cp = (struct cas *) data; -#if 0 - int pending = atomic_read(&cp->reset_task_pending); -#else - int pending_all = atomic_read(&cp->reset_task_pending_all); - int pending_spare = atomic_read(&cp->reset_task_pending_spare); - int pending_mtu = atomic_read(&cp->reset_task_pending_mtu); - - if (pending_all == 0 && pending_spare == 0 && pending_mtu == 0) { - /* We can have more tasks scheduled than actually - * needed. - */ - atomic_dec(&cp->reset_task_pending); - return; - } -#endif - /* The link went down, we reset the ring, but keep - * DMA stopped. Use this function for reset - * on error as well. - */ - if (cp->hw_running) { - unsigned long flags; - - /* Make sure we don't get interrupts or tx packets */ - netif_device_detach(cp->dev); - cas_lock_all_save(cp, flags); - - if (cp->opened) { - /* We call cas_spare_recover when we call cas_open. - * but we do not initialize the lists cas_spare_recover - * uses until cas_open is called. - */ - cas_spare_recover(cp, GFP_ATOMIC); - } -#if 1 - /* test => only pending_spare set */ - if (!pending_all && !pending_mtu) - goto done; -#else - if (pending == CAS_RESET_SPARE) - goto done; -#endif - /* when pending == CAS_RESET_ALL, the following - * call to cas_init_hw will restart auto negotiation. - * Setting the second argument of cas_reset to - * !(pending == CAS_RESET_ALL) will set this argument - * to 1 (avoiding reinitializing the PHY for the normal - * PCS case) when auto negotiation is not restarted. - */ -#if 1 - cas_reset(cp, !(pending_all > 0)); - if (cp->opened) - cas_clean_rings(cp); - cas_init_hw(cp, (pending_all > 0)); -#else - cas_reset(cp, !(pending == CAS_RESET_ALL)); - if (cp->opened) - cas_clean_rings(cp); - cas_init_hw(cp, pending == CAS_RESET_ALL); -#endif - -done: - cas_unlock_all_restore(cp, flags); - netif_device_attach(cp->dev); - } -#if 1 - atomic_sub(pending_all, &cp->reset_task_pending_all); - atomic_sub(pending_spare, &cp->reset_task_pending_spare); - atomic_sub(pending_mtu, &cp->reset_task_pending_mtu); - atomic_dec(&cp->reset_task_pending); -#else - atomic_set(&cp->reset_task_pending, 0); -#endif -} - -static void cas_link_timer(unsigned long data) -{ - struct cas *cp = (struct cas *) data; - int mask, pending = 0, reset = 0; - unsigned long flags; - - if (link_transition_timeout != 0 && - cp->link_transition_jiffies_valid && - ((jiffies - cp->link_transition_jiffies) > - (link_transition_timeout))) { - /* One-second counter so link-down workaround doesn't - * cause resets to occur so fast as to fool the switch - * into thinking the link is down. - */ - cp->link_transition_jiffies_valid = 0; - } - - if (!cp->hw_running) - return; - - spin_lock_irqsave(&cp->lock, flags); - cas_lock_tx(cp); - cas_entropy_gather(cp); - - /* If the link task is still pending, we just - * reschedule the link timer - */ -#if 1 - if (atomic_read(&cp->reset_task_pending_all) || - atomic_read(&cp->reset_task_pending_spare) || - atomic_read(&cp->reset_task_pending_mtu)) - goto done; -#else - if (atomic_read(&cp->reset_task_pending)) - goto done; -#endif - - /* check for rx cleaning */ - if ((mask = (cp->cas_flags & CAS_FLAG_RXD_POST_MASK))) { - int i, rmask; - - for (i = 0; i < MAX_RX_DESC_RINGS; i++) { - rmask = CAS_FLAG_RXD_POST(i); - if ((mask & rmask) == 0) - continue; - - /* post_rxds will do a mod_timer */ - if (cas_post_rxds_ringN(cp, i, cp->rx_last[i]) < 0) { - pending = 1; - continue; - } - cp->cas_flags &= ~rmask; - } - } - - if (CAS_PHY_MII(cp->phy_type)) { - u16 bmsr; - cas_mif_poll(cp, 0); - bmsr = cas_phy_read(cp, MII_BMSR); - /* WTZ: Solaris driver reads this twice, but that - * may be due to the PCS case and the use of a - * common implementation. Read it twice here to be - * safe. - */ - bmsr = cas_phy_read(cp, MII_BMSR); - cas_mif_poll(cp, 1); - readl(cp->regs + REG_MIF_STATUS); /* avoid dups */ - reset = cas_mii_link_check(cp, bmsr); - } else { - reset = cas_pcs_link_check(cp); - } - - if (reset) - goto done; - - /* check for tx state machine confusion */ - if ((readl(cp->regs + REG_MAC_TX_STATUS) & MAC_TX_FRAME_XMIT) == 0) { - u32 val = readl(cp->regs + REG_MAC_STATE_MACHINE); - u32 wptr, rptr; - int tlm = CAS_VAL(MAC_SM_TLM, val); - - if (((tlm == 0x5) || (tlm == 0x3)) && - (CAS_VAL(MAC_SM_ENCAP_SM, val) == 0)) { - if (netif_msg_tx_err(cp)) - printk(KERN_DEBUG "%s: tx err: " - "MAC_STATE[%08x]\n", - cp->dev->name, val); - reset = 1; - goto done; - } - - val = readl(cp->regs + REG_TX_FIFO_PKT_CNT); - wptr = readl(cp->regs + REG_TX_FIFO_WRITE_PTR); - rptr = readl(cp->regs + REG_TX_FIFO_READ_PTR); - if ((val == 0) && (wptr != rptr)) { - if (netif_msg_tx_err(cp)) - printk(KERN_DEBUG "%s: tx err: " - "TX_FIFO[%08x:%08x:%08x]\n", - cp->dev->name, val, wptr, rptr); - reset = 1; - } - - if (reset) - cas_hard_reset(cp); - } - -done: - if (reset) { -#if 1 - atomic_inc(&cp->reset_task_pending); - atomic_inc(&cp->reset_task_pending_all); - schedule_work(&cp->reset_task); -#else - atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); - printk(KERN_ERR "reset called in cas_link_timer\n"); - schedule_work(&cp->reset_task); -#endif - } - - if (!pending) - mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); - cas_unlock_tx(cp); - spin_unlock_irqrestore(&cp->lock, flags); -} - -/* tiny buffers are used to avoid target abort issues with - * older cassini's - */ -static void cas_tx_tiny_free(struct cas *cp) -{ - struct pci_dev *pdev = cp->pdev; - int i; - - for (i = 0; i < N_TX_RINGS; i++) { - if (!cp->tx_tiny_bufs[i]) - continue; - - pci_free_consistent(pdev, TX_TINY_BUF_BLOCK, - cp->tx_tiny_bufs[i], - cp->tx_tiny_dvma[i]); - cp->tx_tiny_bufs[i] = NULL; - } -} - -static int cas_tx_tiny_alloc(struct cas *cp) -{ - struct pci_dev *pdev = cp->pdev; - int i; - - for (i = 0; i < N_TX_RINGS; i++) { - cp->tx_tiny_bufs[i] = - pci_alloc_consistent(pdev, TX_TINY_BUF_BLOCK, - &cp->tx_tiny_dvma[i]); - if (!cp->tx_tiny_bufs[i]) { - cas_tx_tiny_free(cp); - return -1; - } - } - return 0; -} - - -static int cas_open(struct net_device *dev) -{ - struct cas *cp = netdev_priv(dev); - int hw_was_up, err; - unsigned long flags; - - down(&cp->pm_sem); - - hw_was_up = cp->hw_running; - - /* The power-management semaphore protects the hw_running - * etc. state so it is safe to do this bit without cp->lock - */ - if (!cp->hw_running) { - /* Reset the chip */ - cas_lock_all_save(cp, flags); - /* We set the second arg to cas_reset to zero - * because cas_init_hw below will have its second - * argument set to non-zero, which will force - * autonegotiation to start. - */ - cas_reset(cp, 0); - cp->hw_running = 1; - cas_unlock_all_restore(cp, flags); - } - - if (cas_tx_tiny_alloc(cp) < 0) - return -ENOMEM; - - /* alloc rx descriptors */ - err = -ENOMEM; - if (cas_alloc_rxds(cp) < 0) - goto err_tx_tiny; - - /* allocate spares */ - cas_spare_init(cp); - cas_spare_recover(cp, GFP_KERNEL); - - /* We can now request the interrupt as we know it's masked - * on the controller. cassini+ has up to 4 interrupts - * that can be used, but you need to do explicit pci interrupt - * mapping to expose them - */ - if (request_irq(cp->pdev->irq, cas_interrupt, - SA_SHIRQ, dev->name, (void *) dev)) { - printk(KERN_ERR "%s: failed to request irq !\n", - cp->dev->name); - err = -EAGAIN; - goto err_spare; - } - - /* init hw */ - cas_lock_all_save(cp, flags); - cas_clean_rings(cp); - cas_init_hw(cp, !hw_was_up); - cp->opened = 1; - cas_unlock_all_restore(cp, flags); - - netif_start_queue(dev); - up(&cp->pm_sem); - return 0; - -err_spare: - cas_spare_free(cp); - cas_free_rxds(cp); -err_tx_tiny: - cas_tx_tiny_free(cp); - up(&cp->pm_sem); - return err; -} - -static int cas_close(struct net_device *dev) -{ - unsigned long flags; - struct cas *cp = netdev_priv(dev); - - /* Make sure we don't get distracted by suspend/resume */ - down(&cp->pm_sem); - - netif_stop_queue(dev); - - /* Stop traffic, mark us closed */ - cas_lock_all_save(cp, flags); - cp->opened = 0; - cas_reset(cp, 0); - cas_phy_init(cp); - cas_begin_auto_negotiation(cp, NULL); - cas_clean_rings(cp); - cas_unlock_all_restore(cp, flags); - - free_irq(cp->pdev->irq, (void *) dev); - cas_spare_free(cp); - cas_free_rxds(cp); - cas_tx_tiny_free(cp); - up(&cp->pm_sem); - return 0; -} - -static struct { - const char name[ETH_GSTRING_LEN]; -} ethtool_cassini_statnames[] = { - {"collisions"}, - {"rx_bytes"}, - {"rx_crc_errors"}, - {"rx_dropped"}, - {"rx_errors"}, - {"rx_fifo_errors"}, - {"rx_frame_errors"}, - {"rx_length_errors"}, - {"rx_over_errors"}, - {"rx_packets"}, - {"tx_aborted_errors"}, - {"tx_bytes"}, - {"tx_dropped"}, - {"tx_errors"}, - {"tx_fifo_errors"}, - {"tx_packets"} -}; -#define CAS_NUM_STAT_KEYS (sizeof(ethtool_cassini_statnames)/ETH_GSTRING_LEN) - -static struct { - const int offsets; /* neg. values for 2nd arg to cas_read_phy */ -} ethtool_register_table[] = { - {-MII_BMSR}, - {-MII_BMCR}, - {REG_CAWR}, - {REG_INF_BURST}, - {REG_BIM_CFG}, - {REG_RX_CFG}, - {REG_HP_CFG}, - {REG_MAC_TX_CFG}, - {REG_MAC_RX_CFG}, - {REG_MAC_CTRL_CFG}, - {REG_MAC_XIF_CFG}, - {REG_MIF_CFG}, - {REG_PCS_CFG}, - {REG_SATURN_PCFG}, - {REG_PCS_MII_STATUS}, - {REG_PCS_STATE_MACHINE}, - {REG_MAC_COLL_EXCESS}, - {REG_MAC_COLL_LATE} -}; -#define CAS_REG_LEN (sizeof(ethtool_register_table)/sizeof(int)) -#define CAS_MAX_REGS (sizeof (u32)*CAS_REG_LEN) - -static u8 *cas_get_regs(struct cas *cp) -{ - u8 *ptr = kmalloc(CAS_MAX_REGS, GFP_KERNEL); - u8 *p; - int i; - unsigned long flags; - - if (!ptr) - return NULL; - - spin_lock_irqsave(&cp->lock, flags); - for (i = 0, p = ptr; i < CAS_REG_LEN ; i ++, p += sizeof(u32)) { - u16 hval; - u32 val; - if (ethtool_register_table[i].offsets < 0) { - hval = cas_phy_read(cp, - -ethtool_register_table[i].offsets); - val = hval; - } else { - val= readl(cp->regs+ethtool_register_table[i].offsets); - } - memcpy(p, (u8 *)&val, sizeof(u32)); - } - spin_unlock_irqrestore(&cp->lock, flags); - - return ptr; -} - -static struct net_device_stats *cas_get_stats(struct net_device *dev) -{ - struct cas *cp = netdev_priv(dev); - struct net_device_stats *stats = cp->net_stats; - unsigned long flags; - int i; - unsigned long tmp; - - /* we collate all of the stats into net_stats[N_TX_RING] */ - if (!cp->hw_running) - return stats + N_TX_RINGS; - - /* collect outstanding stats */ - /* WTZ: the Cassini spec gives these as 16 bit counters but - * stored in 32-bit words. Added a mask of 0xffff to be safe, - * in case the chip somehow puts any garbage in the other bits. - * Also, counter usage didn't seem to mach what Adrian did - * in the parts of the code that set these quantities. Made - * that consistent. - */ - spin_lock_irqsave(&cp->stat_lock[N_TX_RINGS], flags); - stats[N_TX_RINGS].rx_crc_errors += - readl(cp->regs + REG_MAC_FCS_ERR) & 0xffff; - stats[N_TX_RINGS].rx_frame_errors += - readl(cp->regs + REG_MAC_ALIGN_ERR) &0xffff; - stats[N_TX_RINGS].rx_length_errors += - readl(cp->regs + REG_MAC_LEN_ERR) & 0xffff; -#if 1 - tmp = (readl(cp->regs + REG_MAC_COLL_EXCESS) & 0xffff) + - (readl(cp->regs + REG_MAC_COLL_LATE) & 0xffff); - stats[N_TX_RINGS].tx_aborted_errors += tmp; - stats[N_TX_RINGS].collisions += - tmp + (readl(cp->regs + REG_MAC_COLL_NORMAL) & 0xffff); -#else - stats[N_TX_RINGS].tx_aborted_errors += - readl(cp->regs + REG_MAC_COLL_EXCESS); - stats[N_TX_RINGS].collisions += readl(cp->regs + REG_MAC_COLL_EXCESS) + - readl(cp->regs + REG_MAC_COLL_LATE); -#endif - cas_clear_mac_err(cp); - - /* saved bits that are unique to ring 0 */ - spin_lock(&cp->stat_lock[0]); - stats[N_TX_RINGS].collisions += stats[0].collisions; - stats[N_TX_RINGS].rx_over_errors += stats[0].rx_over_errors; - stats[N_TX_RINGS].rx_frame_errors += stats[0].rx_frame_errors; - stats[N_TX_RINGS].rx_fifo_errors += stats[0].rx_fifo_errors; - stats[N_TX_RINGS].tx_aborted_errors += stats[0].tx_aborted_errors; - stats[N_TX_RINGS].tx_fifo_errors += stats[0].tx_fifo_errors; - spin_unlock(&cp->stat_lock[0]); - - for (i = 0; i < N_TX_RINGS; i++) { - spin_lock(&cp->stat_lock[i]); - stats[N_TX_RINGS].rx_length_errors += - stats[i].rx_length_errors; - stats[N_TX_RINGS].rx_crc_errors += stats[i].rx_crc_errors; - stats[N_TX_RINGS].rx_packets += stats[i].rx_packets; - stats[N_TX_RINGS].tx_packets += stats[i].tx_packets; - stats[N_TX_RINGS].rx_bytes += stats[i].rx_bytes; - stats[N_TX_RINGS].tx_bytes += stats[i].tx_bytes; - stats[N_TX_RINGS].rx_errors += stats[i].rx_errors; - stats[N_TX_RINGS].tx_errors += stats[i].tx_errors; - stats[N_TX_RINGS].rx_dropped += stats[i].rx_dropped; - stats[N_TX_RINGS].tx_dropped += stats[i].tx_dropped; - memset(stats + i, 0, sizeof(struct net_device_stats)); - spin_unlock(&cp->stat_lock[i]); - } - spin_unlock_irqrestore(&cp->stat_lock[N_TX_RINGS], flags); - return stats + N_TX_RINGS; -} - - -static void cas_set_multicast(struct net_device *dev) -{ - struct cas *cp = netdev_priv(dev); - u32 rxcfg, rxcfg_new; - unsigned long flags; - int limit = STOP_TRIES; - - if (!cp->hw_running) - return; - - spin_lock_irqsave(&cp->lock, flags); - rxcfg = readl(cp->regs + REG_MAC_RX_CFG); - - /* disable RX MAC and wait for completion */ - writel(rxcfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG); - while (readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_EN) { - if (!limit--) - break; - udelay(10); - } - - /* disable hash filter and wait for completion */ - limit = STOP_TRIES; - rxcfg &= ~(MAC_RX_CFG_PROMISC_EN | MAC_RX_CFG_HASH_FILTER_EN); - writel(rxcfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG); - while (readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_HASH_FILTER_EN) { - if (!limit--) - break; - udelay(10); - } - - /* program hash filters */ - cp->mac_rx_cfg = rxcfg_new = cas_setup_multicast(cp); - rxcfg |= rxcfg_new; - writel(rxcfg, cp->regs + REG_MAC_RX_CFG); - spin_unlock_irqrestore(&cp->lock, flags); -} - -/* Eventually add support for changing the advertisement - * on autoneg. - */ -static int cas_ethtool_ioctl(struct net_device *dev, void *ep_user) -{ - struct cas *cp = netdev_priv(dev); - u16 bmcr; - int full_duplex, speed, pause; - struct ethtool_cmd ecmd; - unsigned long flags; - enum link_state linkstate = link_up; - - if (copy_from_user(&ecmd, ep_user, sizeof(ecmd))) - return -EFAULT; - - switch(ecmd.cmd) { - case ETHTOOL_GDRVINFO: { - struct ethtool_drvinfo info = { cmd: ETHTOOL_GDRVINFO }; - - strncpy(info.driver, DRV_MODULE_NAME, - ETHTOOL_BUSINFO_LEN); - strncpy(info.version, DRV_MODULE_VERSION, - ETHTOOL_BUSINFO_LEN); - info.fw_version[0] = '\0'; - strncpy(info.bus_info, pci_name(cp->pdev), - ETHTOOL_BUSINFO_LEN); - info.regdump_len = cp->casreg_len < CAS_MAX_REGS ? - cp->casreg_len : CAS_MAX_REGS; - info.n_stats = CAS_NUM_STAT_KEYS; - if (copy_to_user(ep_user, &info, sizeof(info))) - return -EFAULT; - - return 0; - } - - case ETHTOOL_GSET: - ecmd.advertising = 0; - ecmd.supported = SUPPORTED_Autoneg; - if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { - ecmd.supported |= SUPPORTED_1000baseT_Full; - ecmd.advertising |= ADVERTISED_1000baseT_Full; - } - - /* Record PHY settings if HW is on. */ - spin_lock_irqsave(&cp->lock, flags); - bmcr = 0; - linkstate = cp->lstate; - if (CAS_PHY_MII(cp->phy_type)) { - ecmd.port = PORT_MII; - ecmd.transceiver = (cp->cas_flags & CAS_FLAG_SATURN) ? - XCVR_INTERNAL : XCVR_EXTERNAL; - ecmd.phy_address = cp->phy_addr; - ecmd.advertising |= ADVERTISED_TP | ADVERTISED_MII | - ADVERTISED_10baseT_Half | - ADVERTISED_10baseT_Full | - ADVERTISED_100baseT_Half | - ADVERTISED_100baseT_Full; - - ecmd.supported |= - (SUPPORTED_10baseT_Half | - SUPPORTED_10baseT_Full | - SUPPORTED_100baseT_Half | - SUPPORTED_100baseT_Full | - SUPPORTED_TP | SUPPORTED_MII); - - if (cp->hw_running) { - cas_mif_poll(cp, 0); - bmcr = cas_phy_read(cp, MII_BMCR); - cas_read_mii_link_mode(cp, &full_duplex, - &speed, &pause); - cas_mif_poll(cp, 1); - } - - } else { - ecmd.port = PORT_FIBRE; - ecmd.transceiver = XCVR_INTERNAL; - ecmd.phy_address = 0; - ecmd.supported |= SUPPORTED_FIBRE; - ecmd.advertising |= ADVERTISED_FIBRE; - - if (cp->hw_running) { - /* pcs uses the same bits as mii */ - bmcr = readl(cp->regs + REG_PCS_MII_CTRL); - cas_read_pcs_link_mode(cp, &full_duplex, - &speed, &pause); - } - } - spin_unlock_irqrestore(&cp->lock, flags); - - if (bmcr & BMCR_ANENABLE) { - ecmd.advertising |= ADVERTISED_Autoneg; - ecmd.autoneg = AUTONEG_ENABLE; - ecmd.speed = ((speed == 10) ? - SPEED_10 : - ((speed == 1000) ? - SPEED_1000 : SPEED_100)); - ecmd.duplex = full_duplex ? DUPLEX_FULL : DUPLEX_HALF; - } else { - ecmd.autoneg = AUTONEG_DISABLE; - ecmd.speed = - (bmcr & CAS_BMCR_SPEED1000) ? - SPEED_1000 : - ((bmcr & BMCR_SPEED100) ? SPEED_100: - SPEED_10); - ecmd.duplex = - (bmcr & BMCR_FULLDPLX) ? - DUPLEX_FULL : DUPLEX_HALF; - } - if (linkstate != link_up) { - /* Force these to "unknown" if the link is not up and - * autonogotiation in enabled. We can set the link - * speed to 0, but not ecmd.duplex, - * because its legal values are 0 and 1. Ethtool will - * print the value reported in parentheses after the - * word "Unknown" for unrecognized values. - * - * If in forced mode, we report the speed and duplex - * settings that we configured. - */ - if (cp->link_cntl & BMCR_ANENABLE) { - ecmd.speed = 0; - ecmd.duplex = 0xff; - } else { - ecmd.speed = SPEED_10; - if (cp->link_cntl & BMCR_SPEED100) { - ecmd.speed = SPEED_100; - } else if (cp->link_cntl & CAS_BMCR_SPEED1000) { - ecmd.speed = SPEED_1000; - } - ecmd.duplex = (cp->link_cntl & BMCR_FULLDPLX)? - DUPLEX_FULL : DUPLEX_HALF; - } - } - if (copy_to_user(ep_user, &ecmd, sizeof(ecmd))) - return -EFAULT; - return 0; - - case ETHTOOL_SSET: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - - /* Verify the settings we care about. */ - if (ecmd.autoneg != AUTONEG_ENABLE && - ecmd.autoneg != AUTONEG_DISABLE) - return -EINVAL; - - if (ecmd.autoneg == AUTONEG_DISABLE && - ((ecmd.speed != SPEED_1000 && - ecmd.speed != SPEED_100 && - ecmd.speed != SPEED_10) || - (ecmd.duplex != DUPLEX_HALF && - ecmd.duplex != DUPLEX_FULL))) - return -EINVAL; - - /* Apply settings and restart link process. */ - spin_lock_irqsave(&cp->lock, flags); - cas_begin_auto_negotiation(cp, &ecmd); - spin_unlock_irqrestore(&cp->lock, flags); - return 0; - - case ETHTOOL_NWAY_RST: - if ((cp->link_cntl & BMCR_ANENABLE) == 0) - return -EINVAL; - - /* Restart link process. */ - spin_lock_irqsave(&cp->lock, flags); - cas_begin_auto_negotiation(cp, NULL); - spin_unlock_irqrestore(&cp->lock, flags); - - return 0; - - case ETHTOOL_GWOL: - case ETHTOOL_SWOL: - break; /* doesn't exist */ - - /* get link status */ - case ETHTOOL_GLINK: { - struct ethtool_value edata = { cmd: ETHTOOL_GLINK }; - - edata.data = (cp->lstate == link_up); - if (copy_to_user(ep_user, &edata, sizeof(edata))) - return -EFAULT; - return 0; - } - - /* get message-level */ - case ETHTOOL_GMSGLVL: { - struct ethtool_value edata = { cmd: ETHTOOL_GMSGLVL }; - - edata.data = cp->msg_enable; - if (copy_to_user(ep_user, &edata, sizeof(edata))) - return -EFAULT; - return 0; - } - - /* set message-level */ - case ETHTOOL_SMSGLVL: { - struct ethtool_value edata; - - if (!capable(CAP_NET_ADMIN)) { - return (-EPERM); - } - if (copy_from_user(&edata, ep_user, sizeof(edata))) - return -EFAULT; - cp->msg_enable = edata.data; - return 0; - } - - case ETHTOOL_GREGS: { - struct ethtool_regs edata; - u8 *ptr; - int len = cp->casreg_len < CAS_MAX_REGS ? - cp->casreg_len: CAS_MAX_REGS; - - if (copy_from_user(&edata, ep_user, sizeof (edata))) - return -EFAULT; - - if (edata.len > len) - edata.len = len; - edata.version = 0; - if (copy_to_user (ep_user, &edata, sizeof(edata))) - return -EFAULT; - - /* cas_get_regs handles locks (cp->lock). */ - ptr = cas_get_regs(cp); - if (ptr == NULL) - return -ENOMEM; - if (copy_to_user(ep_user + sizeof (edata), ptr, edata.len)) - return -EFAULT; - - kfree(ptr); - return (0); - } - case ETHTOOL_GSTRINGS: { - struct ethtool_gstrings edata; - int len; - - if (copy_from_user(&edata, ep_user, sizeof(edata))) - return -EFAULT; - - len = edata.len; - switch(edata.string_set) { - case ETH_SS_STATS: - edata.len = (len < CAS_NUM_STAT_KEYS) ? - len : CAS_NUM_STAT_KEYS; - if (copy_to_user(ep_user, &edata, sizeof(edata))) - return -EFAULT; - - if (copy_to_user(ep_user + sizeof(edata), - ðtool_cassini_statnames, - (edata.len * ETH_GSTRING_LEN))) - return -EFAULT; - return 0; - default: - return -EINVAL; - } - } - case ETHTOOL_GSTATS: { - int i = 0; - u64 *tmp; - struct ethtool_stats edata; - struct net_device_stats *stats; - int len; - - if (copy_from_user(&edata, ep_user, sizeof(edata))) - return -EFAULT; - - len = edata.n_stats; - stats = cas_get_stats(cp->dev); - edata.cmd = ETHTOOL_GSTATS; - edata.n_stats = (len < CAS_NUM_STAT_KEYS) ? - len : CAS_NUM_STAT_KEYS; - if (copy_to_user(ep_user, &edata, sizeof (edata))) - return -EFAULT; - - tmp = kmalloc(sizeof(u64)*CAS_NUM_STAT_KEYS, GFP_KERNEL); - if (tmp) { - tmp[i++] = stats->collisions; - tmp[i++] = stats->rx_bytes; - tmp[i++] = stats->rx_crc_errors; - tmp[i++] = stats->rx_dropped; - tmp[i++] = stats->rx_errors; - tmp[i++] = stats->rx_fifo_errors; - tmp[i++] = stats->rx_frame_errors; - tmp[i++] = stats->rx_length_errors; - tmp[i++] = stats->rx_over_errors; - tmp[i++] = stats->rx_packets; - tmp[i++] = stats->tx_aborted_errors; - tmp[i++] = stats->tx_bytes; - tmp[i++] = stats->tx_dropped; - tmp[i++] = stats->tx_errors; - tmp[i++] = stats->tx_fifo_errors; - tmp[i++] = stats->tx_packets; - BUG_ON(i != CAS_NUM_STAT_KEYS); - - i = copy_to_user(ep_user + sizeof(edata), - tmp, sizeof(u64)*edata.n_stats); - kfree(tmp); - } else { - return -ENOMEM; - } - if (i) - return -EFAULT; - return 0; - } - } - - return -EOPNOTSUPP; -} - -static int cas_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -{ - struct cas *cp = netdev_priv(dev); - struct mii_ioctl_data *data = (struct mii_ioctl_data *)&ifr->ifr_data; - unsigned long flags; - int rc = -EOPNOTSUPP; - - /* Hold the PM semaphore while doing ioctl's or we may collide - * with open/close and power management and oops. - */ - down(&cp->pm_sem); - switch (cmd) { - case SIOCETHTOOL: - rc = cas_ethtool_ioctl(dev, ifr->ifr_data); - break; - - case SIOCGMIIPHY: /* Get address of MII PHY in use. */ - data->phy_id = cp->phy_addr; - /* Fallthrough... */ - - case SIOCGMIIREG: /* Read MII PHY register. */ - spin_lock_irqsave(&cp->lock, flags); - cas_mif_poll(cp, 0); - data->val_out = cas_phy_read(cp, data->reg_num & 0x1f); - cas_mif_poll(cp, 1); - spin_unlock_irqrestore(&cp->lock, flags); - rc = 0; - break; - - case SIOCSMIIREG: /* Write MII PHY register. */ - if (!capable(CAP_NET_ADMIN)) { - rc = -EPERM; - break; - } - spin_lock_irqsave(&cp->lock, flags); - cas_mif_poll(cp, 0); - rc = cas_phy_write(cp, data->reg_num & 0x1f, data->val_in); - cas_mif_poll(cp, 1); - spin_unlock_irqrestore(&cp->lock, flags); - break; - default: - break; - }; - - up(&cp->pm_sem); - return rc; -} - -static int __devinit cas_init_one(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - static int cas_version_printed = 0; - unsigned long casreg_base, casreg_len; - struct net_device *dev; - struct cas *cp; - int i, err, pci_using_dac; - u16 pci_cmd; - u8 orig_cacheline_size = 0, cas_cacheline_size = 0; - - if (cas_version_printed++ == 0) - printk(KERN_INFO "%s", version); - - err = pci_enable_device(pdev); - if (err) { - printk(KERN_ERR PFX "Cannot enable PCI device, " - "aborting.\n"); - return err; - } - - if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { - printk(KERN_ERR PFX "Cannot find proper PCI device " - "base address, aborting.\n"); - err = -ENODEV; - goto err_out_disable_pdev; - } - - dev = alloc_etherdev(sizeof(*cp)); - if (!dev) { - printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n"); - err = -ENOMEM; - goto err_out_disable_pdev; - } - SET_MODULE_OWNER(dev); - SET_NETDEV_DEV(dev, &pdev->dev); - - err = pci_request_regions(pdev, dev->name); - if (err) { - printk(KERN_ERR PFX "Cannot obtain PCI resources, " - "aborting.\n"); - goto err_out_free_netdev; - } - pci_set_master(pdev); - - /* we must always turn on parity response or else parity - * doesn't get generated properly. disable SERR/PERR as well. - * in addition, we want to turn MWI on. - */ - pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd); - pci_cmd &= ~PCI_COMMAND_SERR; - pci_cmd |= PCI_COMMAND_PARITY; - pci_write_config_word(pdev, PCI_COMMAND, pci_cmd); - pci_set_mwi(pdev); - /* - * On some architectures, the default cache line size set - * by pci_set_mwi reduces perforamnce. We have to increase - * it for this case. To start, we'll print some configuration - * data. - */ -#if 1 - pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, - &orig_cacheline_size); - if (orig_cacheline_size < CAS_PREF_CACHELINE_SIZE) { - cas_cacheline_size = - (CAS_PREF_CACHELINE_SIZE < SMP_CACHE_BYTES) ? - CAS_PREF_CACHELINE_SIZE : SMP_CACHE_BYTES; - if (pci_write_config_byte(pdev, - PCI_CACHE_LINE_SIZE, - cas_cacheline_size)) { - printk(KERN_ERR PFX "Could not set PCI cache " - "line size\n"); - goto err_write_cacheline; - } - } -#endif - - - /* Configure DMA attributes. */ - if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { - pci_using_dac = 1; - err = pci_set_consistent_dma_mask(pdev, - DMA_64BIT_MASK); - if (err < 0) { - printk(KERN_ERR PFX "Unable to obtain 64-bit DMA " - "for consistent allocations\n"); - goto err_out_free_res; - } - - } else { - err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); - if (err) { - printk(KERN_ERR PFX "No usable DMA configuration, " - "aborting.\n"); - goto err_out_free_res; - } - pci_using_dac = 0; - } - - casreg_base = pci_resource_start(pdev, 0); - casreg_len = pci_resource_len(pdev, 0); - - cp = netdev_priv(dev); - cp->pdev = pdev; -#if 1 - /* A value of 0 indicates we never explicitly set it */ - cp->orig_cacheline_size = cas_cacheline_size ? orig_cacheline_size: 0; -#endif - cp->dev = dev; - cp->msg_enable = (cassini_debug < 0) ? CAS_DEF_MSG_ENABLE : - cassini_debug; - - cp->link_transition = LINK_TRANSITION_UNKNOWN; - cp->link_transition_jiffies_valid = 0; - - spin_lock_init(&cp->lock); - spin_lock_init(&cp->rx_inuse_lock); - spin_lock_init(&cp->rx_spare_lock); - for (i = 0; i < N_TX_RINGS; i++) { - spin_lock_init(&cp->stat_lock[i]); - spin_lock_init(&cp->tx_lock[i]); - } - spin_lock_init(&cp->stat_lock[N_TX_RINGS]); - init_MUTEX(&cp->pm_sem); - - init_timer(&cp->link_timer); - cp->link_timer.function = cas_link_timer; - cp->link_timer.data = (unsigned long) cp; - -#if 1 - /* Just in case the implementation of atomic operations - * change so that an explicit initialization is necessary. - */ - atomic_set(&cp->reset_task_pending, 0); - atomic_set(&cp->reset_task_pending_all, 0); - atomic_set(&cp->reset_task_pending_spare, 0); - atomic_set(&cp->reset_task_pending_mtu, 0); -#endif - INIT_WORK(&cp->reset_task, cas_reset_task, cp); - - /* Default link parameters */ - if (link_mode >= 0 && link_mode <= 6) - cp->link_cntl = link_modes[link_mode]; - else - cp->link_cntl = BMCR_ANENABLE; - cp->lstate = link_down; - cp->link_transition = LINK_TRANSITION_LINK_DOWN; - netif_carrier_off(cp->dev); - cp->timer_ticks = 0; - - /* give us access to cassini registers */ - cp->regs = ioremap(casreg_base, casreg_len); - if (cp->regs == 0UL) { - printk(KERN_ERR PFX "Cannot map device registers, " - "aborting.\n"); - goto err_out_free_res; - } - cp->casreg_len = casreg_len; - - pci_save_state(pdev); - cas_check_pci_invariants(cp); - cas_hard_reset(cp); - cas_reset(cp, 0); - if (cas_check_invariants(cp)) - goto err_out_iounmap; - - cp->init_block = (struct cas_init_block *) - pci_alloc_consistent(pdev, sizeof(struct cas_init_block), - &cp->block_dvma); - if (!cp->init_block) { - printk(KERN_ERR PFX "Cannot allocate init block, " - "aborting.\n"); - goto err_out_iounmap; - } - - for (i = 0; i < N_TX_RINGS; i++) - cp->init_txds[i] = cp->init_block->txds[i]; - - for (i = 0; i < N_RX_DESC_RINGS; i++) - cp->init_rxds[i] = cp->init_block->rxds[i]; - - for (i = 0; i < N_RX_COMP_RINGS; i++) - cp->init_rxcs[i] = cp->init_block->rxcs[i]; - - for (i = 0; i < N_RX_FLOWS; i++) - skb_queue_head_init(&cp->rx_flows[i]); - - dev->open = cas_open; - dev->stop = cas_close; - dev->hard_start_xmit = cas_start_xmit; - dev->get_stats = cas_get_stats; - dev->set_multicast_list = cas_set_multicast; - dev->do_ioctl = cas_ioctl; - dev->tx_timeout = cas_tx_timeout; - dev->watchdog_timeo = CAS_TX_TIMEOUT; - dev->change_mtu = cas_change_mtu; -#ifdef USE_NAPI - dev->poll = cas_poll; - dev->weight = 64; -#endif -#ifdef CONFIG_NET_POLL_CONTROLLER - dev->poll_controller = cas_netpoll; -#endif - dev->irq = pdev->irq; - dev->dma = 0; - - /* Cassini features. */ - if ((cp->cas_flags & CAS_FLAG_NO_HW_CSUM) == 0) - dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG; - - if (pci_using_dac) - dev->features |= NETIF_F_HIGHDMA; - - if (register_netdev(dev)) { - printk(KERN_ERR PFX "Cannot register net device, " - "aborting.\n"); - goto err_out_free_consistent; - } - - i = readl(cp->regs + REG_BIM_CFG); - printk(KERN_INFO "%s: Sun Cassini%s (%sbit/%sMHz PCI/%s) " - "Ethernet[%d] ", dev->name, - (cp->cas_flags & CAS_FLAG_REG_PLUS) ? "+" : "", - (i & BIM_CFG_32BIT) ? "32" : "64", - (i & BIM_CFG_66MHZ) ? "66" : "33", - (cp->phy_type == CAS_PHY_SERDES) ? "Fi" : "Cu", pdev->irq); - - for (i = 0; i < 6; i++) - printk("%2.2x%c", dev->dev_addr[i], - i == 5 ? ' ' : ':'); - printk("\n"); - - pci_set_drvdata(pdev, dev); - cp->hw_running = 1; - cas_entropy_reset(cp); - cas_phy_init(cp); - cas_begin_auto_negotiation(cp, NULL); - return 0; - -err_out_free_consistent: - pci_free_consistent(pdev, sizeof(struct cas_init_block), - cp->init_block, cp->block_dvma); - -err_out_iounmap: - down(&cp->pm_sem); - if (cp->hw_running) - cas_shutdown(cp); - up(&cp->pm_sem); - - iounmap((void *) cp->regs); - - -err_out_free_res: - pci_release_regions(pdev); - -err_write_cacheline: - /* Try to restore it in case the error occured after we - * set it. - */ - pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, orig_cacheline_size); - -err_out_free_netdev: - free_netdev(dev); - -err_out_disable_pdev: - pci_disable_device(pdev); - pci_set_drvdata(pdev, NULL); - return -ENODEV; -} - -static void __devexit cas_remove_one(struct pci_dev *pdev) -{ - struct net_device *dev = pci_get_drvdata(pdev); - struct cas *cp; - if (!dev) - return; - - cp = netdev_priv(dev); - unregister_netdev(dev); - - down(&cp->pm_sem); - flush_scheduled_work(); - if (cp->hw_running) - cas_shutdown(cp); - up(&cp->pm_sem); - -#if 1 - if (cp->orig_cacheline_size) { - /* Restore the cache line size if we had modified - * it. - */ - pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, - cp->orig_cacheline_size); - } -#endif - pci_free_consistent(pdev, sizeof(struct cas_init_block), - cp->init_block, cp->block_dvma); - iounmap((void *) cp->regs); - free_netdev(dev); - pci_release_regions(pdev); - pci_disable_device(pdev); - pci_set_drvdata(pdev, NULL); -} - -#ifdef CONFIG_PM -static int cas_suspend(struct pci_dev *pdev, u32 state) -{ - struct net_device *dev = pci_get_drvdata(pdev); - struct cas *cp = netdev_priv(dev); - unsigned long flags; - - /* We hold the PM semaphore during entire driver - * sleep time - */ - down(&cp->pm_sem); - - /* If the driver is opened, we stop the DMA */ - if (cp->opened) { - netif_device_detach(dev); - - cas_lock_all_save(cp, flags); - - /* We can set the second arg of cas_reset to 0 - * because on resume, we'll call cas_init_hw with - * its second arg set so that autonegotiation is - * restarted. - */ - cas_reset(cp, 0); - cas_clean_rings(cp); - cas_unlock_all_restore(cp, flags); - } - - if (cp->hw_running) - cas_shutdown(cp); - - return 0; -} - -static int cas_resume(struct pci_dev *pdev) -{ - struct net_device *dev = pci_get_drvdata(pdev); - struct cas *cp = netdev_priv(dev); - - printk(KERN_INFO "%s: resuming\n", dev->name); - - cas_hard_reset(cp); - if (cp->opened) { - unsigned long flags; - cas_lock_all_save(cp, flags); - cas_reset(cp, 0); - cp->hw_running = 1; - cas_clean_rings(cp); - cas_init_hw(cp, 1); - cas_unlock_all_restore(cp, flags); - - netif_device_attach(dev); - } - up(&cp->pm_sem); - return 0; -} -#endif /* CONFIG_PM */ - -static struct pci_driver cas_driver = { - .name = DRV_MODULE_NAME, - .id_table = cas_pci_tbl, - .probe = cas_init_one, - .remove = __devexit_p(cas_remove_one), -#ifdef CONFIG_PM - .suspend = cas_suspend, - .resume = cas_resume -#endif -}; - -static int __init cas_init(void) -{ - if (linkdown_timeout > 0) - link_transition_timeout = linkdown_timeout * HZ; - else - link_transition_timeout = 0; - - return pci_module_init(&cas_driver); -} - -static void __exit cas_cleanup(void) -{ - pci_unregister_driver(&cas_driver); -} - -module_init(cas_init); -module_exit(cas_cleanup); diff --git a/trunk/drivers/net/cassini.h b/trunk/drivers/net/cassini.h deleted file mode 100644 index 88063ef16cf6..000000000000 --- a/trunk/drivers/net/cassini.h +++ /dev/null @@ -1,4425 +0,0 @@ -/* $Id: cassini.h,v 1.16 2004/08/17 21:15:16 zaumen Exp $ - * cassini.h: Definitions for Sun Microsystems Cassini(+) ethernet driver. - * - * Copyright (C) 2004 Sun Microsystems Inc. - * Copyright (c) 2003 Adrian Sun (asun@darksunrising.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA - * 02111-1307, USA. - * - * vendor id: 0x108E (Sun Microsystems, Inc.) - * device id: 0xabba (Cassini) - * revision ids: 0x01 = Cassini - * 0x02 = Cassini rev 2 - * 0x10 = Cassini+ - * 0x11 = Cassini+ 0.2u - * - * vendor id: 0x100b (National Semiconductor) - * device id: 0x0035 (DP83065/Saturn) - * revision ids: 0x30 = Saturn B2 - * - * rings are all offset from 0. - * - * there are two clock domains: - * PCI: 33/66MHz clock - * chip: 125MHz clock - */ - -#ifndef _CASSINI_H -#define _CASSINI_H - -/* cassini register map: 2M memory mapped in 32-bit memory space accessible as - * 32-bit words. there is no i/o port access. REG_ addresses are - * shared between cassini and cassini+. REG_PLUS_ addresses only - * appear in cassini+. REG_MINUS_ addresses only appear in cassini. - */ -#define CAS_ID_REV2 0x02 -#define CAS_ID_REVPLUS 0x10 -#define CAS_ID_REVPLUS02u 0x11 -#define CAS_ID_REVSATURNB2 0x30 - -/** global resources **/ - -/* this register sets the weights for the weighted round robin arbiter. e.g., - * if rx weight == 1 and tx weight == 0, rx == 2x tx transfer credit - * for its next turn to access the pci bus. - * map: 0x0 = x1, 0x1 = x2, 0x2 = x4, 0x3 = x8 - * DEFAULT: 0x0, SIZE: 5 bits - */ -#define REG_CAWR 0x0004 /* core arbitration weight */ -#define CAWR_RX_DMA_WEIGHT_SHIFT 0 -#define CAWR_RX_DMA_WEIGHT_MASK 0x03 /* [0:1] */ -#define CAWR_TX_DMA_WEIGHT_SHIFT 2 -#define CAWR_TX_DMA_WEIGHT_MASK 0x0C /* [3:2] */ -#define CAWR_RR_DIS 0x10 /* [4] */ - -/* if enabled, BIM can send bursts across PCI bus > cacheline size. burst - * sizes determined by length of packet or descriptor transfer and the - * max length allowed by the target. - * DEFAULT: 0x0, SIZE: 1 bit - */ -#define REG_INF_BURST 0x0008 /* infinite burst enable reg */ -#define INF_BURST_EN 0x1 /* enable */ - -/* top level interrupts [0-9] are auto-cleared to 0 when the status - * register is read. second level interrupts [13 - 18] are cleared at - * the source. tx completion register 3 is replicated in [19 - 31] - * DEFAULT: 0x00000000, SIZE: 29 bits - */ -#define REG_INTR_STATUS 0x000C /* interrupt status register */ -#define INTR_TX_INTME 0x00000001 /* frame w/ INT ME desc bit set - xferred from host queue to - TX FIFO */ -#define INTR_TX_ALL 0x00000002 /* all xmit frames xferred into - TX FIFO. i.e., - TX Kick == TX complete. if - PACED_MODE set, then TX FIFO - also empty */ -#define INTR_TX_DONE 0x00000004 /* any frame xferred into tx - FIFO */ -#define INTR_TX_TAG_ERROR 0x00000008 /* TX FIFO tag framing - corrupted. FATAL ERROR */ -#define INTR_RX_DONE 0x00000010 /* at least 1 frame xferred - from RX FIFO to host mem. - RX completion reg updated. - may be delayed by recv - intr blanking. */ -#define INTR_RX_BUF_UNAVAIL 0x00000020 /* no more receive buffers. - RX Kick == RX complete */ -#define INTR_RX_TAG_ERROR 0x00000040 /* RX FIFO tag framing - corrupted. FATAL ERROR */ -#define INTR_RX_COMP_FULL 0x00000080 /* no more room in completion - ring to post descriptors. - RX complete head incr to - almost reach RX complete - tail */ -#define INTR_RX_BUF_AE 0x00000100 /* less than the - programmable threshold # - of free descr avail for - hw use */ -#define INTR_RX_COMP_AF 0x00000200 /* less than the - programmable threshold # - of descr spaces for hw - use in completion descr - ring */ -#define INTR_RX_LEN_MISMATCH 0x00000400 /* len field from MAC != - len of non-reassembly pkt - from fifo during DMA or - header parser provides TCP - header and payload size > - MAC packet size. - FATAL ERROR */ -#define INTR_SUMMARY 0x00001000 /* summary interrupt bit. this - bit will be set if an interrupt - generated on the pci bus. useful - when driver is polling for - interrupts */ -#define INTR_PCS_STATUS 0x00002000 /* PCS interrupt status register */ -#define INTR_TX_MAC_STATUS 0x00004000 /* TX MAC status register has at - least 1 unmasked interrupt set */ -#define INTR_RX_MAC_STATUS 0x00008000 /* RX MAC status register has at - least 1 unmasked interrupt set */ -#define INTR_MAC_CTRL_STATUS 0x00010000 /* MAC control status register has - at least 1 unmasked interrupt - set */ -#define INTR_MIF_STATUS 0x00020000 /* MIF status register has at least - 1 unmasked interrupt set */ -#define INTR_PCI_ERROR_STATUS 0x00040000 /* PCI error status register in the - BIF has at least 1 unmasked - interrupt set */ -#define INTR_TX_COMP_3_MASK 0xFFF80000 /* mask for TX completion - 3 reg data */ -#define INTR_TX_COMP_3_SHIFT 19 -#define INTR_ERROR_MASK (INTR_MIF_STATUS | INTR_PCI_ERROR_STATUS | \ - INTR_PCS_STATUS | INTR_RX_LEN_MISMATCH | \ - INTR_TX_MAC_STATUS | INTR_RX_MAC_STATUS | \ - INTR_TX_TAG_ERROR | INTR_RX_TAG_ERROR | \ - INTR_MAC_CTRL_STATUS) - -/* determines which status events will cause an interrupt. layout same - * as REG_INTR_STATUS. - * DEFAULT: 0xFFFFFFFF, SIZE: 16 bits - */ -#define REG_INTR_MASK 0x0010 /* Interrupt mask */ - -/* top level interrupt bits that are cleared during read of REG_INTR_STATUS_ALIAS. - * useful when driver is polling for interrupts. layout same as REG_INTR_MASK. - * DEFAULT: 0x00000000, SIZE: 12 bits - */ -#define REG_ALIAS_CLEAR 0x0014 /* alias clear mask - (used w/ status alias) */ -/* same as REG_INTR_STATUS except that only bits cleared are those selected by - * REG_ALIAS_CLEAR - * DEFAULT: 0x00000000, SIZE: 29 bits - */ -#define REG_INTR_STATUS_ALIAS 0x001C /* interrupt status alias - (selective clear) */ - -/* DEFAULT: 0x0, SIZE: 3 bits */ -#define REG_PCI_ERR_STATUS 0x1000 /* PCI error status */ -#define PCI_ERR_BADACK 0x01 /* reserved in Cassini+. - set if no ACK64# during ABS64 cycle - in Cassini. */ -#define PCI_ERR_DTRTO 0x02 /* delayed xaction timeout. set if - no read retry after 2^15 clocks */ -#define PCI_ERR_OTHER 0x04 /* other PCI errors */ -#define PCI_ERR_BIM_DMA_WRITE 0x08 /* BIM received 0 count DMA write req. - unused in Cassini. */ -#define PCI_ERR_BIM_DMA_READ 0x10 /* BIM received 0 count DMA read req. - unused in Cassini. */ -#define PCI_ERR_BIM_DMA_TIMEOUT 0x20 /* BIM received 255 retries during - DMA. unused in cassini. */ - -/* mask for PCI status events that will set PCI_ERR_STATUS. if cleared, event - * causes an interrupt to be generated. - * DEFAULT: 0x7, SIZE: 3 bits - */ -#define REG_PCI_ERR_STATUS_MASK 0x1004 /* PCI Error status mask */ - -/* used to configure PCI related parameters that are not in PCI config space. - * DEFAULT: 0bxx000, SIZE: 5 bits - */ -#define REG_BIM_CFG 0x1008 /* BIM Configuration */ -#define BIM_CFG_RESERVED0 0x001 /* reserved */ -#define BIM_CFG_RESERVED1 0x002 /* reserved */ -#define BIM_CFG_64BIT_DISABLE 0x004 /* disable 64-bit mode */ -#define BIM_CFG_66MHZ 0x008 /* (ro) 1 = 66MHz, 0 = < 66MHz */ -#define BIM_CFG_32BIT 0x010 /* (ro) 1 = 32-bit slot, 0 = 64-bit */ -#define BIM_CFG_DPAR_INTR_ENABLE 0x020 /* detected parity err enable */ -#define BIM_CFG_RMA_INTR_ENABLE 0x040 /* master abort intr enable */ -#define BIM_CFG_RTA_INTR_ENABLE 0x080 /* target abort intr enable */ -#define BIM_CFG_RESERVED2 0x100 /* reserved */ -#define BIM_CFG_BIM_DISABLE 0x200 /* stop BIM DMA. use before global - reset. reserved in Cassini. */ -#define BIM_CFG_BIM_STATUS 0x400 /* (ro) 1 = BIM DMA suspended. - reserved in Cassini. */ -#define BIM_CFG_PERROR_BLOCK 0x800 /* block PERR# to pci bus. def: 0. - reserved in Cassini. */ - -/* DEFAULT: 0x00000000, SIZE: 32 bits */ -#define REG_BIM_DIAG 0x100C /* BIM Diagnostic */ -#define BIM_DIAG_MSTR_SM_MASK 0x3FFFFF00 /* PCI master controller state - machine bits [21:0] */ -#define BIM_DIAG_BRST_SM_MASK 0x7F /* PCI burst controller state - machine bits [6:0] */ - -/* writing to SW_RESET_TX and SW_RESET_RX will issue a global - * reset. poll until TX and RX read back as 0's for completion. - */ -#define REG_SW_RESET 0x1010 /* Software reset */ -#define SW_RESET_TX 0x00000001 /* reset TX DMA engine. poll until - cleared to 0. */ -#define SW_RESET_RX 0x00000002 /* reset RX DMA engine. poll until - cleared to 0. */ -#define SW_RESET_RSTOUT 0x00000004 /* force RSTOUT# pin active (low). - resets PHY and anything else - connected to RSTOUT#. RSTOUT# - is also activated by local PCI - reset when hot-swap is being - done. */ -#define SW_RESET_BLOCK_PCS_SLINK 0x00000008 /* if a global reset is done with - this bit set, PCS and SLINK - modules won't be reset. - i.e., link won't drop. */ -#define SW_RESET_BREQ_SM_MASK 0x00007F00 /* breq state machine [6:0] */ -#define SW_RESET_PCIARB_SM_MASK 0x00070000 /* pci arbitration state bits: - 0b000: ARB_IDLE1 - 0b001: ARB_IDLE2 - 0b010: ARB_WB_ACK - 0b011: ARB_WB_WAT - 0b100: ARB_RB_ACK - 0b101: ARB_RB_WAT - 0b110: ARB_RB_END - 0b111: ARB_WB_END */ -#define SW_RESET_RDPCI_SM_MASK 0x00300000 /* read pci state bits: - 0b00: RD_PCI_WAT - 0b01: RD_PCI_RDY - 0b11: RD_PCI_ACK */ -#define SW_RESET_RDARB_SM_MASK 0x00C00000 /* read arbitration state bits: - 0b00: AD_IDL_RX - 0b01: AD_ACK_RX - 0b10: AD_ACK_TX - 0b11: AD_IDL_TX */ -#define SW_RESET_WRPCI_SM_MASK 0x06000000 /* write pci state bits - 0b00: WR_PCI_WAT - 0b01: WR_PCI_RDY - 0b11: WR_PCI_ACK */ -#define SW_RESET_WRARB_SM_MASK 0x38000000 /* write arbitration state bits: - 0b000: ARB_IDLE1 - 0b001: ARB_IDLE2 - 0b010: ARB_TX_ACK - 0b011: ARB_TX_WAT - 0b100: ARB_RX_ACK - 0b110: ARB_RX_WAT */ - -/* Cassini only. 64-bit register used to check PCI datapath. when read, - * value written has both lower and upper 32-bit halves rotated to the right - * one bit position. e.g., FFFFFFFF FFFFFFFF -> 7FFFFFFF 7FFFFFFF - */ -#define REG_MINUS_BIM_DATAPATH_TEST 0x1018 /* Cassini: BIM datapath test - Cassini+: reserved */ - -/* output enables are provided for each device's chip select and for the rest - * of the outputs from cassini to its local bus devices. two sw programmable - * bits are connected to general purpus control/status bits. - * DEFAULT: 0x7 - */ -#define REG_BIM_LOCAL_DEV_EN 0x1020 /* BIM local device - output EN. default: 0x7 */ -#define BIM_LOCAL_DEV_PAD 0x01 /* address bus, RW signal, and - OE signal output enable on the - local bus interface. these - are shared between both local - bus devices. tristate when 0. */ -#define BIM_LOCAL_DEV_PROM 0x02 /* PROM chip select */ -#define BIM_LOCAL_DEV_EXT 0x04 /* secondary local bus device chip - select output enable */ -#define BIM_LOCAL_DEV_SOFT_0 0x08 /* sw programmable ctrl bit 0 */ -#define BIM_LOCAL_DEV_SOFT_1 0x10 /* sw programmable ctrl bit 1 */ -#define BIM_LOCAL_DEV_HW_RESET 0x20 /* internal hw reset. Cassini+ only. */ - -/* access 24 entry BIM read and write buffers. put address in REG_BIM_BUFFER_ADDR - * and read/write from/to it REG_BIM_BUFFER_DATA_LOW and _DATA_HI. - * _DATA_HI should be the last access of the sequence. - * DEFAULT: undefined - */ -#define REG_BIM_BUFFER_ADDR 0x1024 /* BIM buffer address. for - purposes. */ -#define BIM_BUFFER_ADDR_MASK 0x3F /* index (0 - 23) of buffer */ -#define BIM_BUFFER_WR_SELECT 0x40 /* write buffer access = 1 - read buffer access = 0 */ -/* DEFAULT: undefined */ -#define REG_BIM_BUFFER_DATA_LOW 0x1028 /* BIM buffer data low */ -#define REG_BIM_BUFFER_DATA_HI 0x102C /* BIM buffer data high */ - -/* set BIM_RAM_BIST_START to start built-in self test for BIM read buffer. - * bit auto-clears when done with status read from _SUMMARY and _PASS bits. - */ -#define REG_BIM_RAM_BIST 0x102C /* BIM RAM (read buffer) BIST - control/status */ -#define BIM_RAM_BIST_RD_START 0x01 /* start BIST for BIM read buffer */ -#define BIM_RAM_BIST_WR_START 0x02 /* start BIST for BIM write buffer. - Cassini only. reserved in - Cassini+. */ -#define BIM_RAM_BIST_RD_PASS 0x04 /* summary BIST pass status for read - buffer. */ -#define BIM_RAM_BIST_WR_PASS 0x08 /* summary BIST pass status for write - buffer. Cassini only. reserved - in Cassini+. */ -#define BIM_RAM_BIST_RD_LOW_PASS 0x10 /* read low bank passes BIST */ -#define BIM_RAM_BIST_RD_HI_PASS 0x20 /* read high bank passes BIST */ -#define BIM_RAM_BIST_WR_LOW_PASS 0x40 /* write low bank passes BIST. - Cassini only. reserved in - Cassini+. */ -#define BIM_RAM_BIST_WR_HI_PASS 0x80 /* write high bank passes BIST. - Cassini only. reserved in - Cassini+. */ - -/* ASUN: i'm not sure what this does as it's not in the spec. - * DEFAULT: 0xFC - */ -#define REG_BIM_DIAG_MUX 0x1030 /* BIM diagnostic probe mux - select register */ - -/* enable probe monitoring mode and select data appearing on the P_A* bus. bit - * values for _SEL_HI_MASK and _SEL_LOW_MASK: - * 0x0: internal probe[7:0] (pci arb state, wtc empty w, wtc full w, wtc empty w, - * wtc empty r, post pci) - * 0x1: internal probe[15:8] (pci wbuf comp, pci wpkt comp, pci rbuf comp, - * pci rpkt comp, txdma wr req, txdma wr ack, - * txdma wr rdy, txdma wr xfr done) - * 0x2: internal probe[23:16] (txdma rd req, txdma rd ack, txdma rd rdy, rxdma rd, - * rd arb state, rd pci state) - * 0x3: internal probe[31:24] (rxdma req, rxdma ack, rxdma rdy, wrarb state, - * wrpci state) - * 0x4: pci io probe[7:0] 0x5: pci io probe[15:8] - * 0x6: pci io probe[23:16] 0x7: pci io probe[31:24] - * 0x8: pci io probe[39:32] 0x9: pci io probe[47:40] - * 0xa: pci io probe[55:48] 0xb: pci io probe[63:56] - * the following are not available in Cassini: - * 0xc: rx probe[7:0] 0xd: tx probe[7:0] - * 0xe: hp probe[7:0] 0xf: mac probe[7:0] - */ -#define REG_PLUS_PROBE_MUX_SELECT 0x1034 /* Cassini+: PROBE MUX SELECT */ -#define PROBE_MUX_EN 0x80000000 /* allow probe signals to be - driven on local bus P_A[15:0] - for debugging */ -#define PROBE_MUX_SUB_MUX_MASK 0x0000FF00 /* select sub module probe signals: - 0x03 = mac[1:0] - 0x0C = rx[1:0] - 0x30 = tx[1:0] - 0xC0 = hp[1:0] */ -#define PROBE_MUX_SEL_HI_MASK 0x000000F0 /* select which module to appear - on P_A[15:8]. see above for - values. */ -#define PROBE_MUX_SEL_LOW_MASK 0x0000000F /* select which module to appear - on P_A[7:0]. see above for - values. */ - -/* values mean the same thing as REG_INTR_MASK excep that it's for INTB. - DEFAULT: 0x1F */ -#define REG_PLUS_INTR_MASK_1 0x1038 /* Cassini+: interrupt mask - register 2 for INTB */ -#define REG_PLUS_INTRN_MASK(x) (REG_PLUS_INTR_MASK_1 + ((x) - 1)*16) -/* bits correspond to both _MASK and _STATUS registers. _ALT corresponds to - * all of the alternate (2-4) INTR registers while _1 corresponds to only - * _MASK_1 and _STATUS_1 registers. - * DEFAULT: 0x7 for MASK registers, 0x0 for ALIAS_CLEAR registers - */ -#define INTR_RX_DONE_ALT 0x01 -#define INTR_RX_COMP_FULL_ALT 0x02 -#define INTR_RX_COMP_AF_ALT 0x04 -#define INTR_RX_BUF_UNAVAIL_1 0x08 -#define INTR_RX_BUF_AE_1 0x10 /* almost empty */ -#define INTRN_MASK_RX_EN 0x80 -#define INTRN_MASK_CLEAR_ALL (INTR_RX_DONE_ALT | \ - INTR_RX_COMP_FULL_ALT | \ - INTR_RX_COMP_AF_ALT | \ - INTR_RX_BUF_UNAVAIL_1 | \ - INTR_RX_BUF_AE_1) -#define REG_PLUS_INTR_STATUS_1 0x103C /* Cassini+: interrupt status - register 2 for INTB. default: 0x1F */ -#define REG_PLUS_INTRN_STATUS(x) (REG_PLUS_INTR_STATUS_1 + ((x) - 1)*16) -#define INTR_STATUS_ALT_INTX_EN 0x80 /* generate INTX when one of the - flags are set. enables desc ring. */ - -#define REG_PLUS_ALIAS_CLEAR_1 0x1040 /* Cassini+: alias clear mask - register 2 for INTB */ -#define REG_PLUS_ALIASN_CLEAR(x) (REG_PLUS_ALIAS_CLEAR_1 + ((x) - 1)*16) - -#define REG_PLUS_INTR_STATUS_ALIAS_1 0x1044 /* Cassini+: interrupt status - register alias 2 for INTB */ -#define REG_PLUS_INTRN_STATUS_ALIAS(x) (REG_PLUS_INTR_STATUS_ALIAS_1 + ((x) - 1)*16) - -#define REG_SATURN_PCFG 0x106c /* pin configuration register for - integrated macphy */ - -#define SATURN_PCFG_TLA 0x00000001 /* 1 = phy actled */ -#define SATURN_PCFG_FLA 0x00000002 /* 1 = phy link10led */ -#define SATURN_PCFG_CLA 0x00000004 /* 1 = phy link100led */ -#define SATURN_PCFG_LLA 0x00000008 /* 1 = phy link1000led */ -#define SATURN_PCFG_RLA 0x00000010 /* 1 = phy duplexled */ -#define SATURN_PCFG_PDS 0x00000020 /* phy debug mode. - 0 = normal */ -#define SATURN_PCFG_MTP 0x00000080 /* test point select */ -#define SATURN_PCFG_GMO 0x00000100 /* GMII observe. 1 = - GMII on SERDES pins for - monitoring. */ -#define SATURN_PCFG_FSI 0x00000200 /* 1 = freeze serdes/gmii. all - pins configed as outputs. - for power saving when using - internal phy. */ -#define SATURN_PCFG_LAD 0x00000800 /* 0 = mac core led ctrl - polarity from strapping - value. - 1 = mac core led ctrl - polarity active low. */ - - -/** transmit dma registers **/ -#define MAX_TX_RINGS_SHIFT 2 -#define MAX_TX_RINGS (1 << MAX_TX_RINGS_SHIFT) -#define MAX_TX_RINGS_MASK (MAX_TX_RINGS - 1) - -/* TX configuration. - * descr ring sizes size = 32 * (1 << n), n < 9. e.g., 0x8 = 8k. default: 0x8 - * DEFAULT: 0x3F000001 - */ -#define REG_TX_CFG 0x2004 /* TX config */ -#define TX_CFG_DMA_EN 0x00000001 /* enable TX DMA. if cleared, DMA - will stop after xfer of current - buffer has been completed. */ -#define TX_CFG_FIFO_PIO_SEL 0x00000002 /* TX DMA FIFO can be - accessed w/ FIFO addr - and data registers. - TX DMA should be - disabled. */ -#define TX_CFG_DESC_RING0_MASK 0x0000003C /* # desc entries in - ring 1. */ -#define TX_CFG_DESC_RING0_SHIFT 2 -#define TX_CFG_DESC_RINGN_MASK(a) (TX_CFG_DESC_RING0_MASK << (a)*4) -#define TX_CFG_DESC_RINGN_SHIFT(a) (TX_CFG_DESC_RING0_SHIFT + (a)*4) -#define TX_CFG_PACED_MODE 0x00100000 /* TX_ALL only set after - TX FIFO becomes empty. - if 0, TX_ALL set - if descr queue empty. */ -#define TX_CFG_DMA_RDPIPE_DIS 0x01000000 /* always set to 1 */ -#define TX_CFG_COMPWB_Q1 0x02000000 /* completion writeback happens at - the end of every packet kicked - through Q1. */ -#define TX_CFG_COMPWB_Q2 0x04000000 /* completion writeback happens at - the end of every packet kicked - through Q2. */ -#define TX_CFG_COMPWB_Q3 0x08000000 /* completion writeback happens at - the end of every packet kicked - through Q3 */ -#define TX_CFG_COMPWB_Q4 0x10000000 /* completion writeback happens at - the end of every packet kicked - through Q4 */ -#define TX_CFG_INTR_COMPWB_DIS 0x20000000 /* disable pre-interrupt completion - writeback */ -#define TX_CFG_CTX_SEL_MASK 0xC0000000 /* selects tx test port - connection - 0b00: tx mac req, - tx mac retry req, - tx ack and tx tag. - 0b01: txdma rd req, - txdma rd ack, - txdma rd rdy, - txdma rd type0 - 0b11: txdma wr req, - txdma wr ack, - txdma wr rdy, - txdma wr xfr done. */ -#define TX_CFG_CTX_SEL_SHIFT 30 - -/* 11-bit counters that point to next location in FIFO to be loaded/retrieved. - * used for diagnostics only. - */ -#define REG_TX_FIFO_WRITE_PTR 0x2014 /* TX FIFO write pointer */ -#define REG_TX_FIFO_SHADOW_WRITE_PTR 0x2018 /* TX FIFO shadow write - pointer. temp hold reg. - diagnostics only. */ -#define REG_TX_FIFO_READ_PTR 0x201C /* TX FIFO read pointer */ -#define REG_TX_FIFO_SHADOW_READ_PTR 0x2020 /* TX FIFO shadow read - pointer */ - -/* (ro) 11-bit up/down counter w/ # of frames currently in TX FIFO */ -#define REG_TX_FIFO_PKT_CNT 0x2024 /* TX FIFO packet counter */ - -/* current state of all state machines in TX */ -#define REG_TX_SM_1 0x2028 /* TX state machine reg #1 */ -#define TX_SM_1_CHAIN_MASK 0x000003FF /* chaining state machine */ -#define TX_SM_1_CSUM_MASK 0x00000C00 /* checksum state machine */ -#define TX_SM_1_FIFO_LOAD_MASK 0x0003F000 /* FIFO load state machine. - = 0x01 when TX disabled. */ -#define TX_SM_1_FIFO_UNLOAD_MASK 0x003C0000 /* FIFO unload state machine */ -#define TX_SM_1_CACHE_MASK 0x03C00000 /* desc. prefetch cache controller - state machine */ -#define TX_SM_1_CBQ_ARB_MASK 0xF8000000 /* CBQ arbiter state machine */ - -#define REG_TX_SM_2 0x202C /* TX state machine reg #2 */ -#define TX_SM_2_COMP_WB_MASK 0x07 /* completion writeback sm */ -#define TX_SM_2_SUB_LOAD_MASK 0x38 /* sub load state machine */ -#define TX_SM_2_KICK_MASK 0xC0 /* kick state machine */ - -/* 64-bit pointer to the transmit data buffer. only the 50 LSB are incremented - * while the upper 23 bits are taken from the TX descriptor - */ -#define REG_TX_DATA_PTR_LOW 0x2030 /* TX data pointer low */ -#define REG_TX_DATA_PTR_HI 0x2034 /* TX data pointer high */ - -/* 13 bit registers written by driver w/ descriptor value that follows - * last valid xmit descriptor. kick # and complete # values are used by - * the xmit dma engine to control tx descr fetching. if > 1 valid - * tx descr is available within the cache line being read, cassini will - * internally cache up to 4 of them. 0 on reset. _KICK = rw, _COMP = ro. - */ -#define REG_TX_KICK0 0x2038 /* TX kick reg #1 */ -#define REG_TX_KICKN(x) (REG_TX_KICK0 + (x)*4) -#define REG_TX_COMP0 0x2048 /* TX completion reg #1 */ -#define REG_TX_COMPN(x) (REG_TX_COMP0 + (x)*4) - -/* values of TX_COMPLETE_1-4 are written. each completion register - * is 2bytes in size and contiguous. 8B allocation w/ 8B alignment. - * NOTE: completion reg values are only written back prior to TX_INTME and - * TX_ALL interrupts. at all other times, the most up-to-date index values - * should be obtained from the REG_TX_COMPLETE_# registers. - * here's the layout: - * offset from base addr completion # byte - * 0 TX_COMPLETE_1_MSB - * 1 TX_COMPLETE_1_LSB - * 2 TX_COMPLETE_2_MSB - * 3 TX_COMPLETE_2_LSB - * 4 TX_COMPLETE_3_MSB - * 5 TX_COMPLETE_3_LSB - * 6 TX_COMPLETE_4_MSB - * 7 TX_COMPLETE_4_LSB - */ -#define TX_COMPWB_SIZE 8 -#define REG_TX_COMPWB_DB_LOW 0x2058 /* TX completion write back - base low */ -#define REG_TX_COMPWB_DB_HI 0x205C /* TX completion write back - base high */ -#define TX_COMPWB_MSB_MASK 0x00000000000000FFULL -#define TX_COMPWB_MSB_SHIFT 0 -#define TX_COMPWB_LSB_MASK 0x000000000000FF00ULL -#define TX_COMPWB_LSB_SHIFT 8 -#define TX_COMPWB_NEXT(x) ((x) >> 16) - -/* 53 MSB used as base address. 11 LSB assumed to be 0. TX desc pointer must - * be 2KB-aligned. */ -#define REG_TX_DB0_LOW 0x2060 /* TX descriptor base low #1 */ -#define REG_TX_DB0_HI 0x2064 /* TX descriptor base hi #1 */ -#define REG_TX_DBN_LOW(x) (REG_TX_DB0_LOW + (x)*8) -#define REG_TX_DBN_HI(x) (REG_TX_DB0_HI + (x)*8) - -/* 16-bit registers hold weights for the weighted round-robin of the - * four CBQ TX descr rings. weights correspond to # bytes xferred from - * host to TXFIFO in a round of WRR arbitration. can be set - * dynamically with new weights set upon completion of the current - * packet transfer from host memory to TXFIFO. a dummy write to any of - * these registers causes a queue1 pre-emption with all historical bw - * deficit data reset to 0 (useful when congestion requires a - * pre-emption/re-allocation of network bandwidth - */ -#define REG_TX_MAXBURST_0 0x2080 /* TX MaxBurst #1 */ -#define REG_TX_MAXBURST_1 0x2084 /* TX MaxBurst #2 */ -#define REG_TX_MAXBURST_2 0x2088 /* TX MaxBurst #3 */ -#define REG_TX_MAXBURST_3 0x208C /* TX MaxBurst #4 */ - -/* diagnostics access to any TX FIFO location. every access is 65 - * bits. _DATA_LOW = 32 LSB, _DATA_HI_T1/T0 = 32 MSB. _TAG = tag bit. - * writing _DATA_HI_T0 sets tag bit low, writing _DATA_HI_T1 sets tag - * bit high. TX_FIFO_PIO_SEL must be set for TX FIFO PIO access. if - * TX FIFO data integrity is desired, TX DMA should be - * disabled. _DATA_HI_Tx should be the last access of the sequence. - */ -#define REG_TX_FIFO_ADDR 0x2104 /* TX FIFO address */ -#define REG_TX_FIFO_TAG 0x2108 /* TX FIFO tag */ -#define REG_TX_FIFO_DATA_LOW 0x210C /* TX FIFO data low */ -#define REG_TX_FIFO_DATA_HI_T1 0x2110 /* TX FIFO data high t1 */ -#define REG_TX_FIFO_DATA_HI_T0 0x2114 /* TX FIFO data high t0 */ -#define REG_TX_FIFO_SIZE 0x2118 /* (ro) TX FIFO size = 0x090 = 9KB */ - -/* 9-bit register controls BIST of TX FIFO. bit set indicates that the BIST - * passed for the specified memory - */ -#define REG_TX_RAMBIST 0x211C /* TX RAMBIST control/status */ -#define TX_RAMBIST_STATE 0x01C0 /* progress state of RAMBIST - controller state machine */ -#define TX_RAMBIST_RAM33A_PASS 0x0020 /* RAM33A passed */ -#define TX_RAMBIST_RAM32A_PASS 0x0010 /* RAM32A passed */ -#define TX_RAMBIST_RAM33B_PASS 0x0008 /* RAM33B passed */ -#define TX_RAMBIST_RAM32B_PASS 0x0004 /* RAM32B passed */ -#define TX_RAMBIST_SUMMARY 0x0002 /* all RAM passed */ -#define TX_RAMBIST_START 0x0001 /* write 1 to start BIST. self - clears on completion. */ - -/** receive dma registers **/ -#define MAX_RX_DESC_RINGS 2 -#define MAX_RX_COMP_RINGS 4 - -/* receive DMA channel configuration. default: 0x80910 - * free ring size = (1 << n)*32 -> [32 - 8k] - * completion ring size = (1 << n)*128 -> [128 - 32k], n < 9 - * DEFAULT: 0x80910 - */ -#define REG_RX_CFG 0x4000 /* RX config */ -#define RX_CFG_DMA_EN 0x00000001 /* enable RX DMA. 0 stops - channel as soon as current - frame xfer has completed. - driver should disable MAC - for 200ms before disabling - RX */ -#define RX_CFG_DESC_RING_MASK 0x0000001E /* # desc entries in RX - free desc ring. - def: 0x8 = 8k */ -#define RX_CFG_DESC_RING_SHIFT 1 -#define RX_CFG_COMP_RING_MASK 0x000001E0 /* # desc entries in RX complete - ring. def: 0x8 = 32k */ -#define RX_CFG_COMP_RING_SHIFT 5 -#define RX_CFG_BATCH_DIS 0x00000200 /* disable receive desc - batching. def: 0x0 = - enabled */ -#define RX_CFG_SWIVEL_MASK 0x00001C00 /* byte offset of the 1st - data byte of the packet - w/in 8 byte boundares. - this swivels the data - DMA'ed to header - buffers, jumbo buffers - when header split is not - requested and MTU sized - buffers. def: 0x2 */ -#define RX_CFG_SWIVEL_SHIFT 10 - -/* cassini+ only */ -#define RX_CFG_DESC_RING1_MASK 0x000F0000 /* # of desc entries in - RX free desc ring 2. - def: 0x8 = 8k */ -#define RX_CFG_DESC_RING1_SHIFT 16 - - -/* the page size register allows cassini chips to do the following with - * received data: - * [--------------------------------------------------------------] page - * [off][buf1][pad][off][buf2][pad][off][buf3][pad][off][buf4][pad] - * |--------------| = PAGE_SIZE_BUFFER_STRIDE - * page = PAGE_SIZE - * offset = PAGE_SIZE_MTU_OFF - * for the above example, MTU_BUFFER_COUNT = 4. - * NOTE: as is apparent, you need to ensure that the following holds: - * MTU_BUFFER_COUNT <= PAGE_SIZE/PAGE_SIZE_BUFFER_STRIDE - * DEFAULT: 0x48002002 (8k pages) - */ -#define REG_RX_PAGE_SIZE 0x4004 /* RX page size */ -#define RX_PAGE_SIZE_MASK 0x00000003 /* size of pages pointed to - by receive descriptors. - if jumbo buffers are - supported the page size - should not be < 8k. - 0b00 = 2k, 0b01 = 4k - 0b10 = 8k, 0b11 = 16k - DEFAULT: 8k */ -#define RX_PAGE_SIZE_SHIFT 0 -#define RX_PAGE_SIZE_MTU_COUNT_MASK 0x00007800 /* # of MTU buffers the hw - packs into a page. - DEFAULT: 4 */ -#define RX_PAGE_SIZE_MTU_COUNT_SHIFT 11 -#define RX_PAGE_SIZE_MTU_STRIDE_MASK 0x18000000 /* # of bytes that separate - each MTU buffer + - offset from each - other. - 0b00 = 1k, 0b01 = 2k - 0b10 = 4k, 0b11 = 8k - DEFAULT: 0x1 */ -#define RX_PAGE_SIZE_MTU_STRIDE_SHIFT 27 -#define RX_PAGE_SIZE_MTU_OFF_MASK 0xC0000000 /* offset in each page that - hw writes the MTU buffer - into. - 0b00 = 0, - 0b01 = 64 bytes - 0b10 = 96, 0b11 = 128 - DEFAULT: 0x1 */ -#define RX_PAGE_SIZE_MTU_OFF_SHIFT 30 - -/* 11-bit counter points to next location in RX FIFO to be loaded/read. - * shadow write pointers enable retries in case of early receive aborts. - * DEFAULT: 0x0. generated on 64-bit boundaries. - */ -#define REG_RX_FIFO_WRITE_PTR 0x4008 /* RX FIFO write pointer */ -#define REG_RX_FIFO_READ_PTR 0x400C /* RX FIFO read pointer */ -#define REG_RX_IPP_FIFO_SHADOW_WRITE_PTR 0x4010 /* RX IPP FIFO shadow write - pointer */ -#define REG_RX_IPP_FIFO_SHADOW_READ_PTR 0x4014 /* RX IPP FIFO shadow read - pointer */ -#define REG_RX_IPP_FIFO_READ_PTR 0x400C /* RX IPP FIFO read - pointer. (8-bit counter) */ - -/* current state of RX DMA state engines + other info - * DEFAULT: 0x0 - */ -#define REG_RX_DEBUG 0x401C /* RX debug */ -#define RX_DEBUG_LOAD_STATE_MASK 0x0000000F /* load state machine w/ MAC: - 0x0 = idle, 0x1 = load_bop - 0x2 = load 1, 0x3 = load 2 - 0x4 = load 3, 0x5 = load 4 - 0x6 = last detect - 0x7 = wait req - 0x8 = wait req statuss 1st - 0x9 = load st - 0xa = bubble mac - 0xb = error */ -#define RX_DEBUG_LM_STATE_MASK 0x00000070 /* load state machine w/ HP and - RX FIFO: - 0x0 = idle, 0x1 = hp xfr - 0x2 = wait hp ready - 0x3 = wait flow code - 0x4 = fifo xfer - 0x5 = make status - 0x6 = csum ready - 0x7 = error */ -#define RX_DEBUG_FC_STATE_MASK 0x000000180 /* flow control state machine - w/ MAC: - 0x0 = idle - 0x1 = wait xoff ack - 0x2 = wait xon - 0x3 = wait xon ack */ -#define RX_DEBUG_DATA_STATE_MASK 0x000001E00 /* unload data state machine - states: - 0x0 = idle data - 0x1 = header begin - 0x2 = xfer header - 0x3 = xfer header ld - 0x4 = mtu begin - 0x5 = xfer mtu - 0x6 = xfer mtu ld - 0x7 = jumbo begin - 0x8 = xfer jumbo - 0x9 = xfer jumbo ld - 0xa = reas begin - 0xb = xfer reas - 0xc = flush tag - 0xd = xfer reas ld - 0xe = error - 0xf = bubble idle */ -#define RX_DEBUG_DESC_STATE_MASK 0x0001E000 /* unload desc state machine - states: - 0x0 = idle desc - 0x1 = wait ack - 0x9 = wait ack 2 - 0x2 = fetch desc 1 - 0xa = fetch desc 2 - 0x3 = load ptrs - 0x4 = wait dma - 0x5 = wait ack batch - 0x6 = post batch - 0x7 = xfr done */ -#define RX_DEBUG_INTR_READ_PTR_MASK 0x30000000 /* interrupt read ptr of the - interrupt queue */ -#define RX_DEBUG_INTR_WRITE_PTR_MASK 0xC0000000 /* interrupt write pointer - of the interrupt queue */ - -/* flow control frames are emmitted using two PAUSE thresholds: - * XOFF PAUSE uses pause time value pre-programmed in the Send PAUSE MAC reg - * XON PAUSE uses a pause time of 0. granularity of threshold is 64bytes. - * PAUSE thresholds defined in terms of FIFO occupancy and may be translated - * into FIFO vacancy using RX_FIFO_SIZE. setting ON will trigger XON frames - * when FIFO reaches 0. OFF threshold should not be > size of RX FIFO. max - * value is is 0x6F. - * DEFAULT: 0x00078 - */ -#define REG_RX_PAUSE_THRESH 0x4020 /* RX pause thresholds */ -#define RX_PAUSE_THRESH_QUANTUM 64 -#define RX_PAUSE_THRESH_OFF_MASK 0x000001FF /* XOFF PAUSE emitted when - RX FIFO occupancy > - value*64B */ -#define RX_PAUSE_THRESH_OFF_SHIFT 0 -#define RX_PAUSE_THRESH_ON_MASK 0x001FF000 /* XON PAUSE emitted after - emitting XOFF PAUSE when RX - FIFO occupancy falls below - this value*64B. must be - < XOFF threshold. if = - RX_FIFO_SIZE< XON frames are - never emitted. */ -#define RX_PAUSE_THRESH_ON_SHIFT 12 - -/* 13-bit register used to control RX desc fetching and intr generation. if 4+ - * valid RX descriptors are available, Cassini will read 4 at a time. - * writing N means that all desc up to *but* excluding N are available. N must - * be a multiple of 4 (N % 4 = 0). first desc should be cache-line aligned. - * DEFAULT: 0 on reset - */ -#define REG_RX_KICK 0x4024 /* RX kick reg */ - -/* 8KB aligned 64-bit pointer to the base of the RX free/completion rings. - * lower 13 bits of the low register are hard-wired to 0. - */ -#define REG_RX_DB_LOW 0x4028 /* RX descriptor ring - base low */ -#define REG_RX_DB_HI 0x402C /* RX descriptor ring - base hi */ -#define REG_RX_CB_LOW 0x4030 /* RX completion ring - base low */ -#define REG_RX_CB_HI 0x4034 /* RX completion ring - base hi */ -/* 13-bit register indicate desc used by cassini for receive frames. used - * for diagnostic purposes. - * DEFAULT: 0 on reset - */ -#define REG_RX_COMP 0x4038 /* (ro) RX completion */ - -/* HEAD and TAIL are used to control RX desc posting and interrupt - * generation. hw moves the head register to pass ownership to sw. sw - * moves the tail register to pass ownership back to hw. to give all - * entries to hw, set TAIL = HEAD. if HEAD and TAIL indicate that no - * more entries are available, DMA will pause and an interrupt will be - * generated to indicate no more entries are available. sw can use - * this interrupt to reduce the # of times it must update the - * completion tail register. - * DEFAULT: 0 on reset - */ -#define REG_RX_COMP_HEAD 0x403C /* RX completion head */ -#define REG_RX_COMP_TAIL 0x4040 /* RX completion tail */ - -/* values used for receive interrupt blanking. loaded each time the ISR is read - * DEFAULT: 0x00000000 - */ -#define REG_RX_BLANK 0x4044 /* RX blanking register - for ISR read */ -#define RX_BLANK_INTR_PKT_MASK 0x000001FF /* RX_DONE intr asserted if - this many sets of completion - writebacks (up to 2 packets) - occur since the last time - the ISR was read. 0 = no - packet blanking */ -#define RX_BLANK_INTR_PKT_SHIFT 0 -#define RX_BLANK_INTR_TIME_MASK 0x3FFFF000 /* RX_DONE interrupt asserted - if that many clocks were - counted since last time the - ISR was read. - each count is 512 core - clocks (125MHz). 0 = no - time blanking */ -#define RX_BLANK_INTR_TIME_SHIFT 12 - -/* values used for interrupt generation based on threshold values of how - * many free desc and completion entries are available for hw use. - * DEFAULT: 0x00000000 - */ -#define REG_RX_AE_THRESH 0x4048 /* RX almost empty - thresholds */ -#define RX_AE_THRESH_FREE_MASK 0x00001FFF /* RX_BUF_AE will be - generated if # desc - avail for hw use <= - # */ -#define RX_AE_THRESH_FREE_SHIFT 0 -#define RX_AE_THRESH_COMP_MASK 0x0FFFE000 /* RX_COMP_AE will be - generated if # of - completion entries - avail for hw use <= - # */ -#define RX_AE_THRESH_COMP_SHIFT 13 - -/* probabilities for random early drop (RED) thresholds on a FIFO threshold - * basis. probability should increase when the FIFO level increases. control - * packets are never dropped and not counted in stats. probability programmed - * on a 12.5% granularity. e.g., 0x1 = 1/8 packets dropped. - * DEFAULT: 0x00000000 - */ -#define REG_RX_RED 0x404C /* RX random early detect enable */ -#define RX_RED_4K_6K_FIFO_MASK 0x000000FF /* 4KB < FIFO thresh < 6KB */ -#define RX_RED_6K_8K_FIFO_MASK 0x0000FF00 /* 6KB < FIFO thresh < 8KB */ -#define RX_RED_8K_10K_FIFO_MASK 0x00FF0000 /* 8KB < FIFO thresh < 10KB */ -#define RX_RED_10K_12K_FIFO_MASK 0xFF000000 /* 10KB < FIFO thresh < 12KB */ - -/* FIFO fullness levels for RX FIFO, RX control FIFO, and RX IPP FIFO. - * RX control FIFO = # of packets in RX FIFO. - * DEFAULT: 0x0 - */ -#define REG_RX_FIFO_FULLNESS 0x4050 /* (ro) RX FIFO fullness */ -#define RX_FIFO_FULLNESS_RX_FIFO_MASK 0x3FF80000 /* level w/ 8B granularity */ -#define RX_FIFO_FULLNESS_IPP_FIFO_MASK 0x0007FF00 /* level w/ 8B granularity */ -#define RX_FIFO_FULLNESS_RX_PKT_MASK 0x000000FF /* # packets in RX FIFO */ -#define REG_RX_IPP_PACKET_COUNT 0x4054 /* RX IPP packet counter */ -#define REG_RX_WORK_DMA_PTR_LOW 0x4058 /* RX working DMA ptr low */ -#define REG_RX_WORK_DMA_PTR_HI 0x405C /* RX working DMA ptr - high */ - -/* BIST testing ro RX FIFO, RX control FIFO, and RX IPP FIFO. only RX BIST - * START/COMPLETE is writeable. START will clear when the BIST has completed - * checking all 17 RAMS. - * DEFAULT: 0bxxxx xxxxx xxxx xxxx xxxx x000 0000 0000 00x0 - */ -#define REG_RX_BIST 0x4060 /* (ro) RX BIST */ -#define RX_BIST_32A_PASS 0x80000000 /* RX FIFO 32A passed */ -#define RX_BIST_33A_PASS 0x40000000 /* RX FIFO 33A passed */ -#define RX_BIST_32B_PASS 0x20000000 /* RX FIFO 32B passed */ -#define RX_BIST_33B_PASS 0x10000000 /* RX FIFO 33B passed */ -#define RX_BIST_32C_PASS 0x08000000 /* RX FIFO 32C passed */ -#define RX_BIST_33C_PASS 0x04000000 /* RX FIFO 33C passed */ -#define RX_BIST_IPP_32A_PASS 0x02000000 /* RX IPP FIFO 33B passed */ -#define RX_BIST_IPP_33A_PASS 0x01000000 /* RX IPP FIFO 33A passed */ -#define RX_BIST_IPP_32B_PASS 0x00800000 /* RX IPP FIFO 32B passed */ -#define RX_BIST_IPP_33B_PASS 0x00400000 /* RX IPP FIFO 33B passed */ -#define RX_BIST_IPP_32C_PASS 0x00200000 /* RX IPP FIFO 32C passed */ -#define RX_BIST_IPP_33C_PASS 0x00100000 /* RX IPP FIFO 33C passed */ -#define RX_BIST_CTRL_32_PASS 0x00800000 /* RX CTRL FIFO 32 passed */ -#define RX_BIST_CTRL_33_PASS 0x00400000 /* RX CTRL FIFO 33 passed */ -#define RX_BIST_REAS_26A_PASS 0x00200000 /* RX Reas 26A passed */ -#define RX_BIST_REAS_26B_PASS 0x00100000 /* RX Reas 26B passed */ -#define RX_BIST_REAS_27_PASS 0x00080000 /* RX Reas 27 passed */ -#define RX_BIST_STATE_MASK 0x00078000 /* BIST state machine */ -#define RX_BIST_SUMMARY 0x00000002 /* when BIST complete, - summary pass bit - contains AND of BIST - results of all 16 - RAMS */ -#define RX_BIST_START 0x00000001 /* write 1 to start - BIST. self clears - on completion. */ - -/* next location in RX CTRL FIFO that will be loaded w/ data from RX IPP/read - * from to retrieve packet control info. - * DEFAULT: 0 - */ -#define REG_RX_CTRL_FIFO_WRITE_PTR 0x4064 /* (ro) RX control FIFO - write ptr */ -#define REG_RX_CTRL_FIFO_READ_PTR 0x4068 /* (ro) RX control FIFO read - ptr */ - -/* receive interrupt blanking. loaded each time interrupt alias register is - * read. - * DEFAULT: 0x0 - */ -#define REG_RX_BLANK_ALIAS_READ 0x406C /* RX blanking register for - alias read */ -#define RX_BAR_INTR_PACKET_MASK 0x000001FF /* assert RX_DONE if # - completion writebacks - > # since last ISR - read. 0 = no - blanking. up to 2 - packets per - completion wb. */ -#define RX_BAR_INTR_TIME_MASK 0x3FFFF000 /* assert RX_DONE if # - clocks > # since last - ISR read. each count - is 512 core clocks - (125MHz). 0 = no - blanking. */ - -/* diagnostic access to RX FIFO. 32 LSB accessed via DATA_LOW. 32 MSB accessed - * via DATA_HI_T0 or DATA_HI_T1. TAG reads the tag bit. writing HI_T0 - * will unset the tag bit while writing HI_T1 will set the tag bit. to reset - * to normal operation after diagnostics, write to address location 0x0. - * RX_DMA_EN bit must be set to 0x0 for RX FIFO PIO access. DATA_HI should - * be the last write access of a write sequence. - * DEFAULT: undefined - */ -#define REG_RX_FIFO_ADDR 0x4080 /* RX FIFO address */ -#define REG_RX_FIFO_TAG 0x4084 /* RX FIFO tag */ -#define REG_RX_FIFO_DATA_LOW 0x4088 /* RX FIFO data low */ -#define REG_RX_FIFO_DATA_HI_T0 0x408C /* RX FIFO data high T0 */ -#define REG_RX_FIFO_DATA_HI_T1 0x4090 /* RX FIFO data high T1 */ - -/* diagnostic assess to RX CTRL FIFO. 8-bit FIFO_ADDR holds address of - * 81 bit control entry and 6 bit flow id. LOW and MID are both 32-bit - * accesses. HI is 7-bits with 6-bit flow id and 1 bit control - * word. RX_DMA_EN must be 0 for RX CTRL FIFO PIO access. DATA_HI - * should be last write access of the write sequence. - * DEFAULT: undefined - */ -#define REG_RX_CTRL_FIFO_ADDR 0x4094 /* RX Control FIFO and - Batching FIFO addr */ -#define REG_RX_CTRL_FIFO_DATA_LOW 0x4098 /* RX Control FIFO data - low */ -#define REG_RX_CTRL_FIFO_DATA_MID 0x409C /* RX Control FIFO data - mid */ -#define REG_RX_CTRL_FIFO_DATA_HI 0x4100 /* RX Control FIFO data - hi and flow id */ -#define RX_CTRL_FIFO_DATA_HI_CTRL 0x0001 /* upper bit of ctrl word */ -#define RX_CTRL_FIFO_DATA_HI_FLOW_MASK 0x007E /* flow id */ - -/* diagnostic access to RX IPP FIFO. same semantics as RX_FIFO. - * DEFAULT: undefined - */ -#define REG_RX_IPP_FIFO_ADDR 0x4104 /* RX IPP FIFO address */ -#define REG_RX_IPP_FIFO_TAG 0x4108 /* RX IPP FIFO tag */ -#define REG_RX_IPP_FIFO_DATA_LOW 0x410C /* RX IPP FIFO data low */ -#define REG_RX_IPP_FIFO_DATA_HI_T0 0x4110 /* RX IPP FIFO data high - T0 */ -#define REG_RX_IPP_FIFO_DATA_HI_T1 0x4114 /* RX IPP FIFO data high - T1 */ - -/* 64-bit pointer to receive data buffer in host memory used for headers and - * small packets. MSB in high register. loaded by DMA state machine and - * increments as DMA writes receive data. only 50 LSB are incremented. top - * 13 bits taken from RX descriptor. - * DEFAULT: undefined - */ -#define REG_RX_HEADER_PAGE_PTR_LOW 0x4118 /* (ro) RX header page ptr - low */ -#define REG_RX_HEADER_PAGE_PTR_HI 0x411C /* (ro) RX header page ptr - high */ -#define REG_RX_MTU_PAGE_PTR_LOW 0x4120 /* (ro) RX MTU page pointer - low */ -#define REG_RX_MTU_PAGE_PTR_HI 0x4124 /* (ro) RX MTU page pointer - high */ - -/* PIO diagnostic access to RX reassembly DMA Table RAM. 6-bit register holds - * one of 64 79-bit locations in the RX Reassembly DMA table and the addr of - * one of the 64 byte locations in the Batching table. LOW holds 32 LSB. - * MID holds the next 32 LSB. HIGH holds the 15 MSB. RX_DMA_EN must be set - * to 0 for PIO access. DATA_HIGH should be last write of write sequence. - * layout: - * reassmbl ptr [78:15] | reassmbl index [14:1] | reassmbl entry valid [0] - * DEFAULT: undefined - */ -#define REG_RX_TABLE_ADDR 0x4128 /* RX reassembly DMA table - address */ -#define RX_TABLE_ADDR_MASK 0x0000003F /* address mask */ - -#define REG_RX_TABLE_DATA_LOW 0x412C /* RX reassembly DMA table - data low */ -#define REG_RX_TABLE_DATA_MID 0x4130 /* RX reassembly DMA table - data mid */ -#define REG_RX_TABLE_DATA_HI 0x4134 /* RX reassembly DMA table - data high */ - -/* cassini+ only */ -/* 8KB aligned 64-bit pointer to base of RX rings. lower 13 bits hardwired to - * 0. same semantics as primary desc/complete rings. - */ -#define REG_PLUS_RX_DB1_LOW 0x4200 /* RX descriptor ring - 2 base low */ -#define REG_PLUS_RX_DB1_HI 0x4204 /* RX descriptor ring - 2 base high */ -#define REG_PLUS_RX_CB1_LOW 0x4208 /* RX completion ring - 2 base low. 4 total */ -#define REG_PLUS_RX_CB1_HI 0x420C /* RX completion ring - 2 base high. 4 total */ -#define REG_PLUS_RX_CBN_LOW(x) (REG_PLUS_RX_CB1_LOW + 8*((x) - 1)) -#define REG_PLUS_RX_CBN_HI(x) (REG_PLUS_RX_CB1_HI + 8*((x) - 1)) -#define REG_PLUS_RX_KICK1 0x4220 /* RX Kick 2 register */ -#define REG_PLUS_RX_COMP1 0x4224 /* (ro) RX completion 2 - reg */ -#define REG_PLUS_RX_COMP1_HEAD 0x4228 /* (ro) RX completion 2 - head reg. 4 total. */ -#define REG_PLUS_RX_COMP1_TAIL 0x422C /* RX completion 2 - tail reg. 4 total. */ -#define REG_PLUS_RX_COMPN_HEAD(x) (REG_PLUS_RX_COMP1_HEAD + 8*((x) - 1)) -#define REG_PLUS_RX_COMPN_TAIL(x) (REG_PLUS_RX_COMP1_TAIL + 8*((x) - 1)) -#define REG_PLUS_RX_AE1_THRESH 0x4240 /* RX almost empty 2 - thresholds */ -#define RX_AE1_THRESH_FREE_MASK RX_AE_THRESH_FREE_MASK -#define RX_AE1_THRESH_FREE_SHIFT RX_AE_THRESH_FREE_SHIFT - -/** header parser registers **/ - -/* RX parser configuration register. - * DEFAULT: 0x1651004 - */ -#define REG_HP_CFG 0x4140 /* header parser - configuration reg */ -#define HP_CFG_PARSE_EN 0x00000001 /* enab header parsing */ -#define HP_CFG_NUM_CPU_MASK 0x000000FC /* # processors - 0 = 64. 0x3f = 63 */ -#define HP_CFG_NUM_CPU_SHIFT 2 -#define HP_CFG_SYN_INC_MASK 0x00000100 /* SYN bit won't increment - TCP seq # by one when - stored in FDBM */ -#define HP_CFG_TCP_THRESH_MASK 0x000FFE00 /* # bytes of TCP data - needed to be considered - for reassembly */ -#define HP_CFG_TCP_THRESH_SHIFT 9 - -/* access to RX Instruction RAM. 5-bit register/counter holds addr - * of 39 bit entry to be read/written. 32 LSB in _DATA_LOW. 7 MSB in _DATA_HI. - * RX_DMA_EN must be 0 for RX instr PIO access. DATA_HI should be last access - * of sequence. - * DEFAULT: undefined - */ -#define REG_HP_INSTR_RAM_ADDR 0x4144 /* HP instruction RAM - address */ -#define HP_INSTR_RAM_ADDR_MASK 0x01F /* 5-bit mask */ -#define REG_HP_INSTR_RAM_DATA_LOW 0x4148 /* HP instruction RAM - data low */ -#define HP_INSTR_RAM_LOW_OUTMASK_MASK 0x0000FFFF -#define HP_INSTR_RAM_LOW_OUTMASK_SHIFT 0 -#define HP_INSTR_RAM_LOW_OUTSHIFT_MASK 0x000F0000 -#define HP_INSTR_RAM_LOW_OUTSHIFT_SHIFT 16 -#define HP_INSTR_RAM_LOW_OUTEN_MASK 0x00300000 -#define HP_INSTR_RAM_LOW_OUTEN_SHIFT 20 -#define HP_INSTR_RAM_LOW_OUTARG_MASK 0xFFC00000 -#define HP_INSTR_RAM_LOW_OUTARG_SHIFT 22 -#define REG_HP_INSTR_RAM_DATA_MID 0x414C /* HP instruction RAM - data mid */ -#define HP_INSTR_RAM_MID_OUTARG_MASK 0x00000003 -#define HP_INSTR_RAM_MID_OUTARG_SHIFT 0 -#define HP_INSTR_RAM_MID_OUTOP_MASK 0x0000003C -#define HP_INSTR_RAM_MID_OUTOP_SHIFT 2 -#define HP_INSTR_RAM_MID_FNEXT_MASK 0x000007C0 -#define HP_INSTR_RAM_MID_FNEXT_SHIFT 6 -#define HP_INSTR_RAM_MID_FOFF_MASK 0x0003F800 -#define HP_INSTR_RAM_MID_FOFF_SHIFT 11 -#define HP_INSTR_RAM_MID_SNEXT_MASK 0x007C0000 -#define HP_INSTR_RAM_MID_SNEXT_SHIFT 18 -#define HP_INSTR_RAM_MID_SOFF_MASK 0x3F800000 -#define HP_INSTR_RAM_MID_SOFF_SHIFT 23 -#define HP_INSTR_RAM_MID_OP_MASK 0xC0000000 -#define HP_INSTR_RAM_MID_OP_SHIFT 30 -#define REG_HP_INSTR_RAM_DATA_HI 0x4150 /* HP instruction RAM - data high */ -#define HP_INSTR_RAM_HI_VAL_MASK 0x0000FFFF -#define HP_INSTR_RAM_HI_VAL_SHIFT 0 -#define HP_INSTR_RAM_HI_MASK_MASK 0xFFFF0000 -#define HP_INSTR_RAM_HI_MASK_SHIFT 16 - -/* PIO access into RX Header parser data RAM and flow database. - * 11-bit register. Data fills the LSB portion of bus if less than 32 bits. - * DATA_RAM: write RAM_FDB_DATA with index to access DATA_RAM. - * RAM bytes = 4*(x - 1) + [3:0]. e.g., 0 -> [3:0], 31 -> [123:120] - * FLOWDB: write DATA_RAM_FDB register and then read/write FDB1-12 to access - * flow database. - * RX_DMA_EN must be 0 for RX parser RAM PIO access. RX Parser RAM data reg - * should be the last write access of the write sequence. - * DEFAULT: undefined - */ -#define REG_HP_DATA_RAM_FDB_ADDR 0x4154 /* HP data and FDB - RAM address */ -#define HP_DATA_RAM_FDB_DATA_MASK 0x001F /* select 1 of 86 byte - locations in header - parser data ram to - read/write */ -#define HP_DATA_RAM_FDB_FDB_MASK 0x3F00 /* 1 of 64 353-bit locations - in the flow database */ -#define REG_HP_DATA_RAM_DATA 0x4158 /* HP data RAM data */ - -/* HP flow database registers: 1 - 12, 0x415C - 0x4188, 4 8-bit bytes - * FLOW_DB(1) = IP_SA[127:96], FLOW_DB(2) = IP_SA[95:64] - * FLOW_DB(3) = IP_SA[63:32], FLOW_DB(4) = IP_SA[31:0] - * FLOW_DB(5) = IP_DA[127:96], FLOW_DB(6) = IP_DA[95:64] - * FLOW_DB(7) = IP_DA[63:32], FLOW_DB(8) = IP_DA[31:0] - * FLOW_DB(9) = {TCP_SP[15:0],TCP_DP[15:0]} - * FLOW_DB(10) = bit 0 has value for flow valid - * FLOW_DB(11) = TCP_SEQ[63:32], FLOW_DB(12) = TCP_SEQ[31:0] - */ -#define REG_HP_FLOW_DB0 0x415C /* HP flow database 1 reg */ -#define REG_HP_FLOW_DBN(x) (REG_HP_FLOW_DB0 + (x)*4) - -/* diagnostics for RX Header Parser block. - * ASUN: the header parser state machine register is used for diagnostics - * purposes. however, the spec doesn't have any details on it. - */ -#define REG_HP_STATE_MACHINE 0x418C /* (ro) HP state machine */ -#define REG_HP_STATUS0 0x4190 /* (ro) HP status 1 */ -#define HP_STATUS0_SAP_MASK 0xFFFF0000 /* SAP */ -#define HP_STATUS0_L3_OFF_MASK 0x0000FE00 /* L3 offset */ -#define HP_STATUS0_LB_CPUNUM_MASK 0x000001F8 /* load balancing CPU - number */ -#define HP_STATUS0_HRP_OPCODE_MASK 0x00000007 /* HRP opcode */ - -#define REG_HP_STATUS1 0x4194 /* (ro) HP status 2 */ -#define HP_STATUS1_ACCUR2_MASK 0xE0000000 /* accu R2[6:4] */ -#define HP_STATUS1_FLOWID_MASK 0x1F800000 /* flow id */ -#define HP_STATUS1_TCP_OFF_MASK 0x007F0000 /* tcp payload offset */ -#define HP_STATUS1_TCP_SIZE_MASK 0x0000FFFF /* tcp payload size */ - -#define REG_HP_STATUS2 0x4198 /* (ro) HP status 3 */ -#define HP_STATUS2_ACCUR2_MASK 0xF0000000 /* accu R2[3:0] */ -#define HP_STATUS2_CSUM_OFF_MASK 0x07F00000 /* checksum start - start offset */ -#define HP_STATUS2_ACCUR1_MASK 0x000FE000 /* accu R1 */ -#define HP_STATUS2_FORCE_DROP 0x00001000 /* force drop */ -#define HP_STATUS2_BWO_REASSM 0x00000800 /* batching w/o - reassembly */ -#define HP_STATUS2_JH_SPLIT_EN 0x00000400 /* jumbo header split - enable */ -#define HP_STATUS2_FORCE_TCP_NOCHECK 0x00000200 /* force tcp no payload - check */ -#define HP_STATUS2_DATA_MASK_ZERO 0x00000100 /* mask of data length - equal to zero */ -#define HP_STATUS2_FORCE_TCP_CHECK 0x00000080 /* force tcp payload - chk */ -#define HP_STATUS2_MASK_TCP_THRESH 0x00000040 /* mask of payload - threshold */ -#define HP_STATUS2_NO_ASSIST 0x00000020 /* no assist */ -#define HP_STATUS2_CTRL_PACKET_FLAG 0x00000010 /* control packet flag */ -#define HP_STATUS2_TCP_FLAG_CHECK 0x00000008 /* tcp flag check */ -#define HP_STATUS2_SYN_FLAG 0x00000004 /* syn flag */ -#define HP_STATUS2_TCP_CHECK 0x00000002 /* tcp payload chk */ -#define HP_STATUS2_TCP_NOCHECK 0x00000001 /* tcp no payload chk */ - -/* BIST for header parser(HP) and flow database memories (FDBM). set _START - * to start BIST. controller clears _START on completion. _START can also - * be cleared to force termination of BIST. a bit set indicates that that - * memory passed its BIST. - */ -#define REG_HP_RAM_BIST 0x419C /* HP RAM BIST reg */ -#define HP_RAM_BIST_HP_DATA_PASS 0x80000000 /* HP data ram */ -#define HP_RAM_BIST_HP_INSTR0_PASS 0x40000000 /* HP instr ram 0 */ -#define HP_RAM_BIST_HP_INSTR1_PASS 0x20000000 /* HP instr ram 1 */ -#define HP_RAM_BIST_HP_INSTR2_PASS 0x10000000 /* HP instr ram 2 */ -#define HP_RAM_BIST_FDBM_AGE0_PASS 0x08000000 /* FDBM aging RAM0 */ -#define HP_RAM_BIST_FDBM_AGE1_PASS 0x04000000 /* FDBM aging RAM1 */ -#define HP_RAM_BIST_FDBM_FLOWID00_PASS 0x02000000 /* FDBM flowid RAM0 - bank 0 */ -#define HP_RAM_BIST_FDBM_FLOWID10_PASS 0x01000000 /* FDBM flowid RAM1 - bank 0 */ -#define HP_RAM_BIST_FDBM_FLOWID20_PASS 0x00800000 /* FDBM flowid RAM2 - bank 0 */ -#define HP_RAM_BIST_FDBM_FLOWID30_PASS 0x00400000 /* FDBM flowid RAM3 - bank 0 */ -#define HP_RAM_BIST_FDBM_FLOWID01_PASS 0x00200000 /* FDBM flowid RAM0 - bank 1 */ -#define HP_RAM_BIST_FDBM_FLOWID11_PASS 0x00100000 /* FDBM flowid RAM1 - bank 2 */ -#define HP_RAM_BIST_FDBM_FLOWID21_PASS 0x00080000 /* FDBM flowid RAM2 - bank 1 */ -#define HP_RAM_BIST_FDBM_FLOWID31_PASS 0x00040000 /* FDBM flowid RAM3 - bank 1 */ -#define HP_RAM_BIST_FDBM_TCPSEQ_PASS 0x00020000 /* FDBM tcp sequence - RAM */ -#define HP_RAM_BIST_SUMMARY 0x00000002 /* all BIST tests */ -#define HP_RAM_BIST_START 0x00000001 /* start/stop BIST */ - - -/** MAC registers. **/ -/* reset bits are set using a PIO write and self-cleared after the command - * execution has completed. - */ -#define REG_MAC_TX_RESET 0x6000 /* TX MAC software reset - command (default: 0x0) */ -#define REG_MAC_RX_RESET 0x6004 /* RX MAC software reset - command (default: 0x0) */ -/* execute a pause flow control frame transmission - DEFAULT: 0x0XXXX */ -#define REG_MAC_SEND_PAUSE 0x6008 /* send pause command reg */ -#define MAC_SEND_PAUSE_TIME_MASK 0x0000FFFF /* value of pause time - to be sent on network - in units of slot - times */ -#define MAC_SEND_PAUSE_SEND 0x00010000 /* send pause flow ctrl - frame on network */ - -/* bit set indicates that event occurred. auto-cleared when status register - * is read and have corresponding mask bits in mask register. events will - * trigger an interrupt if the corresponding mask bit is 0. - * status register default: 0x00000000 - * mask register default = 0xFFFFFFFF on reset - */ -#define REG_MAC_TX_STATUS 0x6010 /* TX MAC status reg */ -#define MAC_TX_FRAME_XMIT 0x0001 /* successful frame - transmision */ -#define MAC_TX_UNDERRUN 0x0002 /* terminated frame - transmission due to - data starvation in the - xmit data path */ -#define MAC_TX_MAX_PACKET_ERR 0x0004 /* frame exceeds max allowed - length passed to TX MAC - by the DMA engine */ -#define MAC_TX_COLL_NORMAL 0x0008 /* rollover of the normal - collision counter */ -#define MAC_TX_COLL_EXCESS 0x0010 /* rollover of the excessive - collision counter */ -#define MAC_TX_COLL_LATE 0x0020 /* rollover of the late - collision counter */ -#define MAC_TX_COLL_FIRST 0x0040 /* rollover of the first - collision counter */ -#define MAC_TX_DEFER_TIMER 0x0080 /* rollover of the defer - timer */ -#define MAC_TX_PEAK_ATTEMPTS 0x0100 /* rollover of the peak - attempts counter */ - -#define REG_MAC_RX_STATUS 0x6014 /* RX MAC status reg */ -#define MAC_RX_FRAME_RECV 0x0001 /* successful receipt of - a frame */ -#define MAC_RX_OVERFLOW 0x0002 /* dropped frame due to - RX FIFO overflow */ -#define MAC_RX_FRAME_COUNT 0x0004 /* rollover of receive frame - counter */ -#define MAC_RX_ALIGN_ERR 0x0008 /* rollover of alignment - error counter */ -#define MAC_RX_CRC_ERR 0x0010 /* rollover of crc error - counter */ -#define MAC_RX_LEN_ERR 0x0020 /* rollover of length - error counter */ -#define MAC_RX_VIOL_ERR 0x0040 /* rollover of code - violation error */ - -/* DEFAULT: 0xXXXX0000 on reset */ -#define REG_MAC_CTRL_STATUS 0x6018 /* MAC control status reg */ -#define MAC_CTRL_PAUSE_RECEIVED 0x00000001 /* successful - reception of a - pause control - frame */ -#define MAC_CTRL_PAUSE_STATE 0x00000002 /* MAC has made a - transition from - "not paused" to - "paused" */ -#define MAC_CTRL_NOPAUSE_STATE 0x00000004 /* MAC has made a - transition from - "paused" to "not - paused" */ -#define MAC_CTRL_PAUSE_TIME_MASK 0xFFFF0000 /* value of pause time - operand that was - received in the last - pause flow control - frame */ - -/* layout identical to TX MAC[8:0] */ -#define REG_MAC_TX_MASK 0x6020 /* TX MAC mask reg */ -/* layout identical to RX MAC[6:0] */ -#define REG_MAC_RX_MASK 0x6024 /* RX MAC mask reg */ -/* layout identical to CTRL MAC[2:0] */ -#define REG_MAC_CTRL_MASK 0x6028 /* MAC control mask reg */ - -/* to ensure proper operation, CFG_EN must be cleared to 0 and a delay - * imposed before writes to other bits in the TX_MAC_CFG register or any of - * the MAC parameters is performed. delay dependent upon time required to - * transmit a maximum size frame (= MAC_FRAMESIZE_MAX*8/Mbps). e.g., - * the delay for a 1518-byte frame on a 100Mbps network is 125us. - * alternatively, just poll TX_CFG_EN until it reads back as 0. - * NOTE: on half-duplex 1Gbps, TX_CFG_CARRIER_EXTEND and - * RX_CFG_CARRIER_EXTEND should be set and the SLOT_TIME register should - * be 0x200 (slot time of 512 bytes) - */ -#define REG_MAC_TX_CFG 0x6030 /* TX MAC config reg */ -#define MAC_TX_CFG_EN 0x0001 /* enable TX MAC. 0 will - force TXMAC state - machine to remain in - idle state or to - transition to idle state - on completion of an - ongoing packet. */ -#define MAC_TX_CFG_IGNORE_CARRIER 0x0002 /* disable CSMA/CD deferral - process. set to 1 when - full duplex and 0 when - half duplex */ -#define MAC_TX_CFG_IGNORE_COLL 0x0004 /* disable CSMA/CD backoff - algorithm. set to 1 when - full duplex and 0 when - half duplex */ -#define MAC_TX_CFG_IPG_EN 0x0008 /* enable extension of the - Rx-to-TX IPG. after - receiving a frame, TX - MAC will reset its - deferral process to - carrier sense for the - amount of time = IPG0 + - IPG1 and commit to - transmission for time - specified in IPG2. when - 0 or when xmitting frames - back-to-pack (Tx-to-Tx - IPG), TX MAC ignores - IPG0 and will only use - IPG1 for deferral time. - IPG2 still used. */ -#define MAC_TX_CFG_NEVER_GIVE_UP_EN 0x0010 /* TX MAC will not easily - give up on frame - xmission. if backoff - algorithm reaches the - ATTEMPT_LIMIT, it will - clear attempts counter - and continue trying to - send the frame as - specified by - GIVE_UP_LIM. when 0, - TX MAC will execute - standard CSMA/CD prot. */ -#define MAC_TX_CFG_NEVER_GIVE_UP_LIM 0x0020 /* when set, TX MAC will - continue to try to xmit - until successful. when - 0, TX MAC will continue - to try xmitting until - successful or backoff - algorithm reaches - ATTEMPT_LIMIT*16 */ -#define MAC_TX_CFG_NO_BACKOFF 0x0040 /* modify CSMA/CD to disable - backoff algorithm. TX - MAC will not back off - after a xmission attempt - that resulted in a - collision. */ -#define MAC_TX_CFG_SLOW_DOWN 0x0080 /* modify CSMA/CD so that - deferral process is reset - in response to carrier - sense during the entire - duration of IPG. TX MAC - will only commit to frame - xmission after frame - xmission has actually - begun. */ -#define MAC_TX_CFG_NO_FCS 0x0100 /* TX MAC will not generate - CRC for all xmitted - packets. when clear, CRC - generation is dependent - upon NO_CRC bit in the - xmit control word from - TX DMA */ -#define MAC_TX_CFG_CARRIER_EXTEND 0x0200 /* enables xmit part of the - carrier extension - feature. this allows for - longer collision domains - by extending the carrier - and collision window - from the end of FCS until - the end of the slot time - if necessary. Required - for half-duplex at 1Gbps, - clear otherwise. */ - -/* when CRC is not stripped, reassembly packets will not contain the CRC. - * these will be stripped by HRP because it reassembles layer 4 data, and the - * CRC is layer 2. however, non-reassembly packets will still contain the CRC - * when passed to the host. to ensure proper operation, need to wait 3.2ms - * after clearing RX_CFG_EN before writing to any other RX MAC registers - * or other MAC parameters. alternatively, poll RX_CFG_EN until it clears - * to 0. similary, HASH_FILTER_EN and ADDR_FILTER_EN have the same - * restrictions as CFG_EN. - */ -#define REG_MAC_RX_CFG 0x6034 /* RX MAC config reg */ -#define MAC_RX_CFG_EN 0x0001 /* enable RX MAC */ -#define MAC_RX_CFG_STRIP_PAD 0x0002 /* always program to 0. - feature not supported */ -#define MAC_RX_CFG_STRIP_FCS 0x0004 /* RX MAC will strip the - last 4 bytes of a - received frame. */ -#define MAC_RX_CFG_PROMISC_EN 0x0008 /* promiscuous mode */ -#define MAC_RX_CFG_PROMISC_GROUP_EN 0x0010 /* accept all valid - multicast frames (group - bit in DA field set) */ -#define MAC_RX_CFG_HASH_FILTER_EN 0x0020 /* use hash table to filter - multicast addresses */ -#define MAC_RX_CFG_ADDR_FILTER_EN 0x0040 /* cause RX MAC to use - address filtering regs - to filter both unicast - and multicast - addresses */ -#define MAC_RX_CFG_DISABLE_DISCARD 0x0080 /* pass errored frames to - RX DMA by setting BAD - bit but not Abort bit - in the status. CRC, - framing, and length errs - will not increment - error counters. frames - which don't match dest - addr will be passed up - w/ BAD bit set. */ -#define MAC_RX_CFG_CARRIER_EXTEND 0x0100 /* enable reception of - packet bursts generated - by carrier extension - with packet bursting - senders. only applies - to half-duplex 1Gbps */ - -/* DEFAULT: 0x0 */ -#define REG_MAC_CTRL_CFG 0x6038 /* MAC control config reg */ -#define MAC_CTRL_CFG_SEND_PAUSE_EN 0x0001 /* respond to requests for - sending pause flow ctrl - frames */ -#define MAC_CTRL_CFG_RECV_PAUSE_EN 0x0002 /* respond to received - pause flow ctrl frames */ -#define MAC_CTRL_CFG_PASS_CTRL 0x0004 /* pass valid MAC ctrl - packets to RX DMA */ - -/* to ensure proper operation, a global initialization sequence should be - * performed when a loopback config is entered or exited. if programmed after - * a hw or global sw reset, RX/TX MAC software reset and initialization - * should be done to ensure stable clocking. - * DEFAULT: 0x0 - */ -#define REG_MAC_XIF_CFG 0x603C /* XIF config reg */ -#define MAC_XIF_TX_MII_OUTPUT_EN 0x0001 /* enable output drivers - on MII xmit bus */ -#define MAC_XIF_MII_INT_LOOPBACK 0x0002 /* loopback GMII xmit data - path to GMII recv data - path. phy mode register - clock selection must be - set to GMII mode and - GMII_MODE should be set - to 1. in loopback mode, - REFCLK will drive the - entire mac core. 0 for - normal operation. */ -#define MAC_XIF_DISABLE_ECHO 0x0004 /* disables receive data - path during packet - xmission. clear to 0 - in any full duplex mode, - in any loopback mode, - or in half-duplex SERDES - or SLINK modes. set when - in half-duplex when - using external phy. */ -#define MAC_XIF_GMII_MODE 0x0008 /* MAC operates with GMII - clocks and datapath */ -#define MAC_XIF_MII_BUFFER_OUTPUT_EN 0x0010 /* MII_BUF_EN pin. enable - external tristate buffer - on the MII receive - bus. */ -#define MAC_XIF_LINK_LED 0x0020 /* LINKLED# active (low) */ -#define MAC_XIF_FDPLX_LED 0x0040 /* FDPLXLED# active (low) */ - -#define REG_MAC_IPG0 0x6040 /* inter-packet gap0 reg. - recommended: 0x00 */ -#define REG_MAC_IPG1 0x6044 /* inter-packet gap1 reg - recommended: 0x08 */ -#define REG_MAC_IPG2 0x6048 /* inter-packet gap2 reg - recommended: 0x04 */ -#define REG_MAC_SLOT_TIME 0x604C /* slot time reg - recommended: 0x40 */ -#define REG_MAC_FRAMESIZE_MIN 0x6050 /* min frame size reg - recommended: 0x40 */ - -/* FRAMESIZE_MAX holds both the max frame size as well as the max burst size. - * recommended value: 0x2000.05EE - */ -#define REG_MAC_FRAMESIZE_MAX 0x6054 /* max frame size reg */ -#define MAC_FRAMESIZE_MAX_BURST_MASK 0x3FFF0000 /* max burst size */ -#define MAC_FRAMESIZE_MAX_BURST_SHIFT 16 -#define MAC_FRAMESIZE_MAX_FRAME_MASK 0x00007FFF /* max frame size */ -#define MAC_FRAMESIZE_MAX_FRAME_SHIFT 0 -#define REG_MAC_PA_SIZE 0x6058 /* PA size reg. number of - preamble bytes that the - TX MAC will xmit at the - beginning of each frame - value should be 2 or - greater. recommended - value: 0x07 */ -#define REG_MAC_JAM_SIZE 0x605C /* jam size reg. duration - of jam in units of media - byte time. recommended - value: 0x04 */ -#define REG_MAC_ATTEMPT_LIMIT 0x6060 /* attempt limit reg. # - of attempts TX MAC will - make to xmit a frame - before it resets its - attempts counter. after - the limit has been - reached, TX MAC may or - may not drop the frame - dependent upon value - in TX_MAC_CFG. - recommended - value: 0x10 */ -#define REG_MAC_CTRL_TYPE 0x6064 /* MAC control type reg. - type field of a MAC - ctrl frame. recommended - value: 0x8808 */ - -/* mac address registers: 0 - 44, 0x6080 - 0x6130, 4 8-bit bytes. - * register contains comparison - * 0 16 MSB of primary MAC addr [47:32] of DA field - * 1 16 middle bits "" [31:16] of DA field - * 2 16 LSB "" [15:0] of DA field - * 3*x 16MSB of alt MAC addr 1-15 [47:32] of DA field - * 4*x 16 middle bits "" [31:16] - * 5*x 16 LSB "" [15:0] - * 42 16 MSB of MAC CTRL addr [47:32] of DA. - * 43 16 middle bits "" [31:16] - * 44 16 LSB "" [15:0] - * MAC CTRL addr must be the reserved multicast addr for MAC CTRL frames. - * if there is a match, MAC will set the bit for alternative address - * filter pass [15] - - * here is the map of registers given MAC address notation: a:b:c:d:e:f - * ab cd ef - * primary addr reg 2 reg 1 reg 0 - * alt addr 1 reg 5 reg 4 reg 3 - * alt addr x reg 5*x reg 4*x reg 3*x - * ctrl addr reg 44 reg 43 reg 42 - */ -#define REG_MAC_ADDR0 0x6080 /* MAC address 0 reg */ -#define REG_MAC_ADDRN(x) (REG_MAC_ADDR0 + (x)*4) -#define REG_MAC_ADDR_FILTER0 0x614C /* address filter 0 reg - [47:32] */ -#define REG_MAC_ADDR_FILTER1 0x6150 /* address filter 1 reg - [31:16] */ -#define REG_MAC_ADDR_FILTER2 0x6154 /* address filter 2 reg - [15:0] */ -#define REG_MAC_ADDR_FILTER2_1_MASK 0x6158 /* address filter 2 and 1 - mask reg. 8-bit reg - contains nibble mask for - reg 2 and 1. */ -#define REG_MAC_ADDR_FILTER0_MASK 0x615C /* address filter 0 mask - reg */ - -/* hash table registers: 0 - 15, 0x6160 - 0x619C, 4 8-bit bytes - * 16-bit registers contain bits of the hash table. - * reg x -> [16*(15 - x) + 15 : 16*(15 - x)]. - * e.g., 15 -> [15:0], 0 -> [255:240] - */ -#define REG_MAC_HASH_TABLE0 0x6160 /* hash table 0 reg */ -#define REG_MAC_HASH_TABLEN(x) (REG_MAC_HASH_TABLE0 + (x)*4) - -/* statistics registers. these registers generate an interrupt on - * overflow. recommended initialization: 0x0000. most are 16-bits except - * for PEAK_ATTEMPTS register which is 8 bits. - */ -#define REG_MAC_COLL_NORMAL 0x61A0 /* normal collision - counter. */ -#define REG_MAC_COLL_FIRST 0x61A4 /* first attempt - successful collision - counter */ -#define REG_MAC_COLL_EXCESS 0x61A8 /* excessive collision - counter */ -#define REG_MAC_COLL_LATE 0x61AC /* late collision counter */ -#define REG_MAC_TIMER_DEFER 0x61B0 /* defer timer. time base - is the media byte - clock/256 */ -#define REG_MAC_ATTEMPTS_PEAK 0x61B4 /* peak attempts reg */ -#define REG_MAC_RECV_FRAME 0x61B8 /* receive frame counter */ -#define REG_MAC_LEN_ERR 0x61BC /* length error counter */ -#define REG_MAC_ALIGN_ERR 0x61C0 /* alignment error counter */ -#define REG_MAC_FCS_ERR 0x61C4 /* FCS error counter */ -#define REG_MAC_RX_CODE_ERR 0x61C8 /* RX code violation - error counter */ - -/* misc registers */ -#define REG_MAC_RANDOM_SEED 0x61CC /* random number seed reg. - 10-bit register used as a - seed for the random number - generator for the CSMA/CD - backoff algorithm. only - programmed after power-on - reset and should be a - random value which has a - high likelihood of being - unique for each MAC - attached to a network - segment (e.g., 10 LSB of - MAC address) */ - -/* ASUN: there's a PAUSE_TIMER (ro) described, but it's not in the address - * map - */ - -/* 27-bit register has the current state for key state machines in the MAC */ -#define REG_MAC_STATE_MACHINE 0x61D0 /* (ro) state machine reg */ -#define MAC_SM_RLM_MASK 0x07800000 -#define MAC_SM_RLM_SHIFT 23 -#define MAC_SM_RX_FC_MASK 0x00700000 -#define MAC_SM_RX_FC_SHIFT 20 -#define MAC_SM_TLM_MASK 0x000F0000 -#define MAC_SM_TLM_SHIFT 16 -#define MAC_SM_ENCAP_SM_MASK 0x0000F000 -#define MAC_SM_ENCAP_SM_SHIFT 12 -#define MAC_SM_TX_REQ_MASK 0x00000C00 -#define MAC_SM_TX_REQ_SHIFT 10 -#define MAC_SM_TX_FC_MASK 0x000003C0 -#define MAC_SM_TX_FC_SHIFT 6 -#define MAC_SM_FIFO_WRITE_SEL_MASK 0x00000038 -#define MAC_SM_FIFO_WRITE_SEL_SHIFT 3 -#define MAC_SM_TX_FIFO_EMPTY_MASK 0x00000007 -#define MAC_SM_TX_FIFO_EMPTY_SHIFT 0 - -/** MIF registers. the MIF can be programmed in either bit-bang or - * frame mode. - **/ -#define REG_MIF_BIT_BANG_CLOCK 0x6200 /* MIF bit-bang clock. - 1 -> 0 will generate a - rising edge. 0 -> 1 will - generate a falling edge. */ -#define REG_MIF_BIT_BANG_DATA 0x6204 /* MIF bit-bang data. 1-bit - register generates data */ -#define REG_MIF_BIT_BANG_OUTPUT_EN 0x6208 /* MIF bit-bang output - enable. enable when - xmitting data from MIF to - transceiver. */ - -/* 32-bit register serves as an instruction register when the MIF is - * programmed in frame mode. load this register w/ a valid instruction - * (as per IEEE 802.3u MII spec). poll this register to check for instruction - * execution completion. during a read operation, this register will also - * contain the 16-bit data returned by the tranceiver. unless specified - * otherwise, fields are considered "don't care" when polling for - * completion. - */ -#define REG_MIF_FRAME 0x620C /* MIF frame/output reg */ -#define MIF_FRAME_START_MASK 0xC0000000 /* start of frame. - load w/ 01 when - issuing an instr */ -#define MIF_FRAME_ST 0x40000000 /* STart of frame */ -#define MIF_FRAME_OPCODE_MASK 0x30000000 /* opcode. 01 for a - write. 10 for a - read */ -#define MIF_FRAME_OP_READ 0x20000000 /* read OPcode */ -#define MIF_FRAME_OP_WRITE 0x10000000 /* write OPcode */ -#define MIF_FRAME_PHY_ADDR_MASK 0x0F800000 /* phy address. when - issuing an instr, - this field should be - loaded w/ the XCVR - addr */ -#define MIF_FRAME_PHY_ADDR_SHIFT 23 -#define MIF_FRAME_REG_ADDR_MASK 0x007C0000 /* register address. - when issuing an instr, - addr of register - to be read/written */ -#define MIF_FRAME_REG_ADDR_SHIFT 18 -#define MIF_FRAME_TURN_AROUND_MSB 0x00020000 /* turn around, MSB. - when issuing an instr, - set this bit to 1 */ -#define MIF_FRAME_TURN_AROUND_LSB 0x00010000 /* turn around, LSB. - when issuing an instr, - set this bit to 0. - when polling for - completion, 1 means - that instr execution - has been completed */ -#define MIF_FRAME_DATA_MASK 0x0000FFFF /* instruction payload - load with 16-bit data - to be written in - transceiver reg for a - write. doesn't matter - in a read. when - polling for - completion, field is - "don't care" for write - and 16-bit data - returned by the - transceiver for a - read (if valid bit - is set) */ -#define REG_MIF_CFG 0x6210 /* MIF config reg */ -#define MIF_CFG_PHY_SELECT 0x0001 /* 1 -> select MDIO_1 - 0 -> select MDIO_0 */ -#define MIF_CFG_POLL_EN 0x0002 /* enable polling - mechanism. if set, - BB_MODE should be 0 */ -#define MIF_CFG_BB_MODE 0x0004 /* 1 -> bit-bang mode - 0 -> frame mode */ -#define MIF_CFG_POLL_REG_MASK 0x00F8 /* register address to be - used by polling mode. - only meaningful if POLL_EN - is set to 1 */ -#define MIF_CFG_POLL_REG_SHIFT 3 -#define MIF_CFG_MDIO_0 0x0100 /* (ro) dual purpose. - when MDIO_0 is idle, - 1 -> tranceiver is - connected to MDIO_0. - when MIF is communicating - w/ MDIO_0 in bit-bang - mode, this bit indicates - the incoming bit stream - during a read op */ -#define MIF_CFG_MDIO_1 0x0200 /* (ro) dual purpose. - when MDIO_1 is idle, - 1 -> transceiver is - connected to MDIO_1. - when MIF is communicating - w/ MDIO_1 in bit-bang - mode, this bit indicates - the incoming bit stream - during a read op */ -#define MIF_CFG_POLL_PHY_MASK 0x7C00 /* tranceiver address to - be polled */ -#define MIF_CFG_POLL_PHY_SHIFT 10 - -/* 16-bit register used to determine which bits in the POLL_STATUS portion of - * the MIF_STATUS register will cause an interrupt. if a mask bit is 0, - * corresponding bit of the POLL_STATUS will generate a MIF interrupt when - * set. DEFAULT: 0xFFFF - */ -#define REG_MIF_MASK 0x6214 /* MIF mask reg */ - -/* 32-bit register used when in poll mode. auto-cleared after being read */ -#define REG_MIF_STATUS 0x6218 /* MIF status reg */ -#define MIF_STATUS_POLL_DATA_MASK 0xFFFF0000 /* poll data contains - the "latest image" - update of the XCVR - reg being read */ -#define MIF_STATUS_POLL_DATA_SHIFT 16 -#define MIF_STATUS_POLL_STATUS_MASK 0x0000FFFF /* poll status indicates - which bits in the - POLL_DATA field have - changed since the - MIF_STATUS reg was - last read */ -#define MIF_STATUS_POLL_STATUS_SHIFT 0 - -/* 7-bit register has current state for all state machines in the MIF */ -#define REG_MIF_STATE_MACHINE 0x621C /* MIF state machine reg */ -#define MIF_SM_CONTROL_MASK 0x07 /* control state machine - state */ -#define MIF_SM_EXECUTION_MASK 0x60 /* execution state machine - state */ - -/** PCS/Serialink. the following registers are equivalent to the standard - * MII management registers except that they're directly mapped in - * Cassini's register space. - **/ - -/* the auto-negotiation enable bit should be programmed the same at - * the link partner as in the local device to enable auto-negotiation to - * complete. when that bit is reprogrammed, auto-neg/manual config is - * restarted automatically. - * DEFAULT: 0x1040 - */ -#define REG_PCS_MII_CTRL 0x9000 /* PCS MII control reg */ -#define PCS_MII_CTRL_1000_SEL 0x0040 /* reads 1. ignored on - writes */ -#define PCS_MII_CTRL_COLLISION_TEST 0x0080 /* COL signal at the PCS - to MAC interface is - activated regardless - of activity */ -#define PCS_MII_CTRL_DUPLEX 0x0100 /* forced 0x0. PCS - behaviour same for - half and full dplx */ -#define PCS_MII_RESTART_AUTONEG 0x0200 /* self clearing. - restart auto- - negotiation */ -#define PCS_MII_ISOLATE 0x0400 /* read as 0. ignored - on writes */ -#define PCS_MII_POWER_DOWN 0x0800 /* read as 0. ignored - on writes */ -#define PCS_MII_AUTONEG_EN 0x1000 /* default 1. PCS goes - through automatic - link config before it - can be used. when 0, - link can be used - w/out any link config - phase */ -#define PCS_MII_10_100_SEL 0x2000 /* read as 0. ignored on - writes */ -#define PCS_MII_RESET 0x8000 /* reset PCS. self-clears - when done */ - -/* DEFAULT: 0x0108 */ -#define REG_PCS_MII_STATUS 0x9004 /* PCS MII status reg */ -#define PCS_MII_STATUS_EXTEND_CAP 0x0001 /* reads 0 */ -#define PCS_MII_STATUS_JABBER_DETECT 0x0002 /* reads 0 */ -#define PCS_MII_STATUS_LINK_STATUS 0x0004 /* 1 -> link up. - 0 -> link down. 0 is - latched so that 0 is - kept until read. read - 2x to determine if the - link has gone up again */ -#define PCS_MII_STATUS_AUTONEG_ABLE 0x0008 /* reads 1 (able to perform - auto-neg) */ -#define PCS_MII_STATUS_REMOTE_FAULT 0x0010 /* 1 -> remote fault detected - from received link code - word. only valid after - auto-neg completed */ -#define PCS_MII_STATUS_AUTONEG_COMP 0x0020 /* 1 -> auto-negotiation - completed - 0 -> auto-negotiation not - completed */ -#define PCS_MII_STATUS_EXTEND_STATUS 0x0100 /* reads as 1. used as an - indication that this is - a 1000 Base-X PHY. writes - to it are ignored */ - -/* used during auto-negotiation. - * DEFAULT: 0x00E0 - */ -#define REG_PCS_MII_ADVERT 0x9008 /* PCS MII advertisement - reg */ -#define PCS_MII_ADVERT_FD 0x0020 /* advertise full duplex - 1000 Base-X */ -#define PCS_MII_ADVERT_HD 0x0040 /* advertise half-duplex - 1000 Base-X */ -#define PCS_MII_ADVERT_SYM_PAUSE 0x0080 /* advertise PAUSE - symmetric capability */ -#define PCS_MII_ADVERT_ASYM_PAUSE 0x0100 /* advertises PAUSE - asymmetric capability */ -#define PCS_MII_ADVERT_RF_MASK 0x3000 /* remote fault. write bit13 - to optionally indicate to - link partner that chip is - going off-line. bit12 will - get set when signal - detect == FAIL and will - remain set until - successful negotiation */ -#define PCS_MII_ADVERT_ACK 0x4000 /* (ro) */ -#define PCS_MII_ADVERT_NEXT_PAGE 0x8000 /* (ro) forced 0x0 */ - -/* contents updated as a result of autonegotiation. layout and definitions - * identical to PCS_MII_ADVERT - */ -#define REG_PCS_MII_LPA 0x900C /* PCS MII link partner - ability reg */ -#define PCS_MII_LPA_FD PCS_MII_ADVERT_FD -#define PCS_MII_LPA_HD PCS_MII_ADVERT_HD -#define PCS_MII_LPA_SYM_PAUSE PCS_MII_ADVERT_SYM_PAUSE -#define PCS_MII_LPA_ASYM_PAUSE PCS_MII_ADVERT_ASYM_PAUSE -#define PCS_MII_LPA_RF_MASK PCS_MII_ADVERT_RF_MASK -#define PCS_MII_LPA_ACK PCS_MII_ADVERT_ACK -#define PCS_MII_LPA_NEXT_PAGE PCS_MII_ADVERT_NEXT_PAGE - -/* DEFAULT: 0x0 */ -#define REG_PCS_CFG 0x9010 /* PCS config reg */ -#define PCS_CFG_EN 0x01 /* enable PCS. must be - 0 when modifying - PCS_MII_ADVERT */ -#define PCS_CFG_SD_OVERRIDE 0x02 /* sets signal detect to - OK. bit is - non-resettable */ -#define PCS_CFG_SD_ACTIVE_LOW 0x04 /* changes interpretation - of optical signal to make - signal detect okay when - signal is low */ -#define PCS_CFG_JITTER_STUDY_MASK 0x18 /* used to make jitter - measurements. a single - code group is xmitted - regularly. - 0x0 = normal operation - 0x1 = high freq test - pattern, D21.5 - 0x2 = low freq test - pattern, K28.7 - 0x3 = reserved */ -#define PCS_CFG_10MS_TIMER_OVERRIDE 0x20 /* shortens 10-20ms auto- - negotiation timer to - a few cycles for test - purposes */ - -/* used for diagnostic purposes. bits 20-22 autoclear on read */ -#define REG_PCS_STATE_MACHINE 0x9014 /* (ro) PCS state machine - and diagnostic reg */ -#define PCS_SM_TX_STATE_MASK 0x0000000F /* 0 and 1 indicate - xmission of idle. - otherwise, xmission of - a packet */ -#define PCS_SM_RX_STATE_MASK 0x000000F0 /* 0 indicates reception - of idle. otherwise, - reception of packet */ -#define PCS_SM_WORD_SYNC_STATE_MASK 0x00000700 /* 0 indicates loss of - sync */ -#define PCS_SM_SEQ_DETECT_STATE_MASK 0x00001800 /* cycling through 0-3 - indicates reception of - Config codes. cycling - through 0-1 indicates - reception of idles */ -#define PCS_SM_LINK_STATE_MASK 0x0001E000 -#define SM_LINK_STATE_UP 0x00016000 /* link state is up */ - -#define PCS_SM_LOSS_LINK_C 0x00100000 /* loss of link due to - recept of Config - codes */ -#define PCS_SM_LOSS_LINK_SYNC 0x00200000 /* loss of link due to - loss of sync */ -#define PCS_SM_LOSS_SIGNAL_DETECT 0x00400000 /* signal detect goes - from OK to FAIL. bit29 - will also be set if - this is set */ -#define PCS_SM_NO_LINK_BREAKLINK 0x01000000 /* link not up due to - receipt of breaklink - C codes from partner. - C codes w/ 0 content - received triggering - start/restart of - autonegotiation. - should be sent for - no longer than 20ms */ -#define PCS_SM_NO_LINK_SERDES 0x02000000 /* serdes being - initialized. see serdes - state reg */ -#define PCS_SM_NO_LINK_C 0x04000000 /* C codes not stable or - not received */ -#define PCS_SM_NO_LINK_SYNC 0x08000000 /* word sync not - achieved */ -#define PCS_SM_NO_LINK_WAIT_C 0x10000000 /* waiting for C codes - w/ ack bit set */ -#define PCS_SM_NO_LINK_NO_IDLE 0x20000000 /* link partner continues - to send C codes - instead of idle - symbols or pkt data */ - -/* this register indicates interrupt changes in specific PCS MII status bits. - * PCS_INT may be masked at the ISR level. only a single bit is implemented - * for link status change. - */ -#define REG_PCS_INTR_STATUS 0x9018 /* PCS interrupt status */ -#define PCS_INTR_STATUS_LINK_CHANGE 0x04 /* link status has changed - since last read */ - -/* control which network interface is used. no more than one bit should - * be set. - * DEFAULT: none - */ -#define REG_PCS_DATAPATH_MODE 0x9050 /* datapath mode reg */ -#define PCS_DATAPATH_MODE_MII 0x00 /* PCS is not used and - MII/GMII is selected. - selection between MII and - GMII is controlled by - XIF_CFG */ -#define PCS_DATAPATH_MODE_SERDES 0x02 /* PCS is used via the - 10-bit interface */ - -/* input to serdes chip or serialink block */ -#define REG_PCS_SERDES_CTRL 0x9054 /* serdes control reg */ -#define PCS_SERDES_CTRL_LOOPBACK 0x01 /* enable loopback on - serdes interface */ -#define PCS_SERDES_CTRL_SYNCD_EN 0x02 /* enable sync carrier - detection. should be - 0x0 for normal - operation */ -#define PCS_SERDES_CTRL_LOCKREF 0x04 /* frequency-lock RBC[0:1] - to REFCLK when set. - when clear, receiver - clock locks to incoming - serial data */ - -/* multiplex test outputs into the PROM address (PA_3 through PA_0) pins. - * should be 0x0 for normal operations. - * 0b000 normal operation, PROM address[3:0] selected - * 0b001 rxdma req, rxdma ack, rxdma ready, rxdma read - * 0b010 rxmac req, rx ack, rx tag, rx clk shared - * 0b011 txmac req, tx ack, tx tag, tx retry req - * 0b100 tx tp3, tx tp2, tx tp1, tx tp0 - * 0b101 R period RX, R period TX, R period HP, R period BIM - * DEFAULT: 0x0 - */ -#define REG_PCS_SHARED_OUTPUT_SEL 0x9058 /* shared output select */ -#define PCS_SOS_PROM_ADDR_MASK 0x0007 - -/* used for diagnostics. this register indicates progress of the SERDES - * boot up. - * 0b00 undergoing reset - * 0b01 waiting 500us while lockrefn is asserted - * 0b10 waiting for comma detect - * 0b11 receive data is synchronized - * DEFAULT: 0x0 - */ -#define REG_PCS_SERDES_STATE 0x905C /* (ro) serdes state */ -#define PCS_SERDES_STATE_MASK 0x03 - -/* used for diagnostics. indicates number of packets transmitted or received. - * counters rollover w/out generating an interrupt. - * DEFAULT: 0x0 - */ -#define REG_PCS_PACKET_COUNT 0x9060 /* (ro) PCS packet counter */ -#define PCS_PACKET_COUNT_TX 0x000007FF /* pkts xmitted by PCS */ -#define PCS_PACKET_COUNT_RX 0x07FF0000 /* pkts recvd by PCS - whether they - encountered an error - or not */ - -/** LocalBus Devices. the following provides run-time access to the - * Cassini's PROM - ***/ -#define REG_EXPANSION_ROM_RUN_START 0x100000 /* expansion rom run time - access */ -#define REG_EXPANSION_ROM_RUN_END 0x17FFFF - -#define REG_SECOND_LOCALBUS_START 0x180000 /* secondary local bus - device */ -#define REG_SECOND_LOCALBUS_END 0x1FFFFF - -/* entropy device */ -#define REG_ENTROPY_START REG_SECOND_LOCALBUS_START -#define REG_ENTROPY_DATA (REG_ENTROPY_START + 0x00) -#define REG_ENTROPY_STATUS (REG_ENTROPY_START + 0x04) -#define ENTROPY_STATUS_DRDY 0x01 -#define ENTROPY_STATUS_BUSY 0x02 -#define ENTROPY_STATUS_CIPHER 0x04 -#define ENTROPY_STATUS_BYPASS_MASK 0x18 -#define REG_ENTROPY_MODE (REG_ENTROPY_START + 0x05) -#define ENTROPY_MODE_KEY_MASK 0x07 -#define ENTROPY_MODE_ENCRYPT 0x40 -#define REG_ENTROPY_RAND_REG (REG_ENTROPY_START + 0x06) -#define REG_ENTROPY_RESET (REG_ENTROPY_START + 0x07) -#define ENTROPY_RESET_DES_IO 0x01 -#define ENTROPY_RESET_STC_MODE 0x02 -#define ENTROPY_RESET_KEY_CACHE 0x04 -#define ENTROPY_RESET_IV 0x08 -#define REG_ENTROPY_IV (REG_ENTROPY_START + 0x08) -#define REG_ENTROPY_KEY0 (REG_ENTROPY_START + 0x10) -#define REG_ENTROPY_KEYN(x) (REG_ENTROPY_KEY0 + 4*(x)) - -/* phys of interest w/ their special mii registers */ -#define PHY_LUCENT_B0 0x00437421 -#define LUCENT_MII_REG 0x1F - -#define PHY_NS_DP83065 0x20005c78 -#define DP83065_MII_MEM 0x16 -#define DP83065_MII_REGD 0x1D -#define DP83065_MII_REGE 0x1E - -#define PHY_BROADCOM_5411 0x00206071 -#define PHY_BROADCOM_B0 0x00206050 -#define BROADCOM_MII_REG4 0x14 -#define BROADCOM_MII_REG5 0x15 -#define BROADCOM_MII_REG7 0x17 -#define BROADCOM_MII_REG8 0x18 - -#define CAS_MII_ANNPTR 0x07 -#define CAS_MII_ANNPRR 0x08 -#define CAS_MII_1000_CTRL 0x09 -#define CAS_MII_1000_STATUS 0x0A -#define CAS_MII_1000_EXTEND 0x0F - -#define CAS_BMSR_1000_EXTEND 0x0100 /* supports 1000Base-T extended status */ -/* - * if autoneg is disabled, here's the table: - * BMCR_SPEED100 = 100Mbps - * BMCR_SPEED1000 = 1000Mbps - * ~(BMCR_SPEED100 | BMCR_SPEED1000) = 10Mbps - */ -#define CAS_BMCR_SPEED1000 0x0040 /* Select 1000Mbps */ - -#define CAS_ADVERTISE_1000HALF 0x0100 -#define CAS_ADVERTISE_1000FULL 0x0200 -#define CAS_ADVERTISE_PAUSE 0x0400 -#define CAS_ADVERTISE_ASYM_PAUSE 0x0800 - -/* regular lpa register */ -#define CAS_LPA_PAUSE CAS_ADVERTISE_PAUSE -#define CAS_LPA_ASYM_PAUSE CAS_ADVERTISE_ASYM_PAUSE - -/* 1000_STATUS register */ -#define CAS_LPA_1000HALF 0x0400 -#define CAS_LPA_1000FULL 0x0800 - -#define CAS_EXTEND_1000XFULL 0x8000 -#define CAS_EXTEND_1000XHALF 0x4000 -#define CAS_EXTEND_1000TFULL 0x2000 -#define CAS_EXTEND_1000THALF 0x1000 - -/* cassini header parser firmware */ -typedef struct cas_hp_inst { - const char *note; - - u16 mask, val; - - u8 op; - u8 soff, snext; /* if match succeeds, new offset and match */ - u8 foff, fnext; /* if match fails, new offset and match */ - /* output info */ - u8 outop; /* output opcode */ - - u16 outarg; /* output argument */ - u8 outenab; /* output enable: 0 = not, 1 = if match - 2 = if !match, 3 = always */ - u8 outshift; /* barrel shift right, 4 bits */ - u16 outmask; -} cas_hp_inst_t; - -/* comparison */ -#define OP_EQ 0 /* packet == value */ -#define OP_LT 1 /* packet < value */ -#define OP_GT 2 /* packet > value */ -#define OP_NP 3 /* new packet */ - -/* output opcodes */ -#define CL_REG 0 -#define LD_FID 1 -#define LD_SEQ 2 -#define LD_CTL 3 -#define LD_SAP 4 -#define LD_R1 5 -#define LD_L3 6 -#define LD_SUM 7 -#define LD_HDR 8 -#define IM_FID 9 -#define IM_SEQ 10 -#define IM_SAP 11 -#define IM_R1 12 -#define IM_CTL 13 -#define LD_LEN 14 -#define ST_FLG 15 - -/* match setp #s for IP4TCP4 */ -#define S1_PCKT 0 -#define S1_VLAN 1 -#define S1_CFI 2 -#define S1_8023 3 -#define S1_LLC 4 -#define S1_LLCc 5 -#define S1_IPV4 6 -#define S1_IPV4c 7 -#define S1_IPV4F 8 -#define S1_TCP44 9 -#define S1_IPV6 10 -#define S1_IPV6L 11 -#define S1_IPV6c 12 -#define S1_TCP64 13 -#define S1_TCPSQ 14 -#define S1_TCPFG 15 -#define S1_TCPHL 16 -#define S1_TCPHc 17 -#define S1_CLNP 18 -#define S1_CLNP2 19 -#define S1_DROP 20 -#define S2_HTTP 21 -#define S1_ESP4 22 -#define S1_AH4 23 -#define S1_ESP6 24 -#define S1_AH6 25 - -#define CAS_PROG_IP46TCP4_PREAMBLE \ -{ "packet arrival?", 0xffff, 0x0000, OP_NP, 6, S1_VLAN, 0, S1_PCKT, \ - CL_REG, 0x3ff, 1, 0x0, 0x0000}, \ -{ "VLAN?", 0xffff, 0x8100, OP_EQ, 1, S1_CFI, 0, S1_8023, \ - IM_CTL, 0x00a, 3, 0x0, 0xffff}, \ -{ "CFI?", 0x1000, 0x1000, OP_EQ, 0, S1_DROP, 1, S1_8023, \ - CL_REG, 0x000, 0, 0x0, 0x0000}, \ -{ "8023?", 0xffff, 0x0600, OP_LT, 1, S1_LLC, 0, S1_IPV4, \ - CL_REG, 0x000, 0, 0x0, 0x0000}, \ -{ "LLC?", 0xffff, 0xaaaa, OP_EQ, 1, S1_LLCc, 0, S1_CLNP, \ - CL_REG, 0x000, 0, 0x0, 0x0000}, \ -{ "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP, \ - CL_REG, 0x000, 0, 0x0, 0x0000}, \ -{ "IPV4?", 0xffff, 0x0800, OP_EQ, 1, S1_IPV4c, 0, S1_IPV6, \ - LD_SAP, 0x100, 3, 0x0, 0xffff}, \ -{ "IPV4 cont?", 0xff00, 0x4500, OP_EQ, 3, S1_IPV4F, 0, S1_CLNP, \ - LD_SUM, 0x00a, 1, 0x0, 0x0000}, \ -{ "IPV4 frag?", 0x3fff, 0x0000, OP_EQ, 1, S1_TCP44, 0, S1_CLNP, \ - LD_LEN, 0x03e, 1, 0x0, 0xffff}, \ -{ "TCP44?", 0x00ff, 0x0006, OP_EQ, 7, S1_TCPSQ, 0, S1_CLNP, \ - LD_FID, 0x182, 1, 0x0, 0xffff}, /* FID IP4&TCP src+dst */ \ -{ "IPV6?", 0xffff, 0x86dd, OP_EQ, 1, S1_IPV6L, 0, S1_CLNP, \ - LD_SUM, 0x015, 1, 0x0, 0x0000}, \ -{ "IPV6 len", 0xf000, 0x6000, OP_EQ, 0, S1_IPV6c, 0, S1_CLNP, \ - IM_R1, 0x128, 1, 0x0, 0xffff}, \ -{ "IPV6 cont?", 0x0000, 0x0000, OP_EQ, 3, S1_TCP64, 0, S1_CLNP, \ - LD_FID, 0x484, 1, 0x0, 0xffff}, /* FID IP6&TCP src+dst */ \ -{ "TCP64?", 0xff00, 0x0600, OP_EQ, 18, S1_TCPSQ, 0, S1_CLNP, \ - LD_LEN, 0x03f, 1, 0x0, 0xffff} - -#ifdef USE_HP_IP46TCP4 -static cas_hp_inst_t cas_prog_ip46tcp4tab[] = { - CAS_PROG_IP46TCP4_PREAMBLE, - { "TCP seq", /* DADDR should point to dest port */ - 0x0000, 0x0000, OP_EQ, 0, S1_TCPFG, 4, S1_TCPFG, LD_SEQ, - 0x081, 3, 0x0, 0xffff}, /* Load TCP seq # */ - { "TCP control flags", 0x0000, 0x0000, OP_EQ, 0, S1_TCPHL, 0, - S1_TCPHL, ST_FLG, 0x045, 3, 0x0, 0x002f}, /* Load TCP flags */ - { "TCP length", 0x0000, 0x0000, OP_EQ, 0, S1_TCPHc, 0, - S1_TCPHc, LD_R1, 0x205, 3, 0xB, 0xf000}, - { "TCP length cont", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, - S1_PCKT, LD_HDR, 0x0ff, 3, 0x0, 0xffff}, - { "Cleanup", 0x0000, 0x0000, OP_EQ, 0, S1_CLNP2, 0, S1_CLNP2, - IM_CTL, 0x001, 3, 0x0, 0x0001}, - { "Cleanup 2", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x000, 0, 0x0, 0x0000}, - { "Drop packet", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x080, 3, 0x0, 0xffff}, - { NULL }, -}; -#ifdef HP_IP46TCP4_DEFAULT -#define CAS_HP_FIRMWARE cas_prog_ip46tcp4tab -#endif -#endif - -/* - * Alternate table load which excludes HTTP server traffic from reassembly. - * It is substantially similar to the basic table, with one extra state - * and a few extra compares. */ -#ifdef USE_HP_IP46TCP4NOHTTP -static cas_hp_inst_t cas_prog_ip46tcp4nohttptab[] = { - CAS_PROG_IP46TCP4_PREAMBLE, - { "TCP seq", /* DADDR should point to dest port */ - 0xFFFF, 0x0080, OP_EQ, 0, S2_HTTP, 0, S1_TCPFG, LD_SEQ, - 0x081, 3, 0x0, 0xffff} , /* Load TCP seq # */ - { "TCP control flags", 0xFFFF, 0x8080, OP_EQ, 0, S2_HTTP, 0, - S1_TCPHL, ST_FLG, 0x145, 2, 0x0, 0x002f, }, /* Load TCP flags */ - { "TCP length", 0x0000, 0x0000, OP_EQ, 0, S1_TCPHc, 0, S1_TCPHc, - LD_R1, 0x205, 3, 0xB, 0xf000}, - { "TCP length cont", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - LD_HDR, 0x0ff, 3, 0x0, 0xffff}, - { "Cleanup", 0x0000, 0x0000, OP_EQ, 0, S1_CLNP2, 0, S1_CLNP2, - IM_CTL, 0x001, 3, 0x0, 0x0001}, - { "Cleanup 2", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - CL_REG, 0x002, 3, 0x0, 0x0000}, - { "Drop packet", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x080, 3, 0x0, 0xffff}, - { "No HTTP", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x044, 3, 0x0, 0xffff}, - { NULL }, -}; -#ifdef HP_IP46TCP4NOHTTP_DEFAULT -#define CAS_HP_FIRMWARE cas_prog_ip46tcp4nohttptab -#endif -#endif - -/* match step #s for IP4FRAG */ -#define S3_IPV6c 11 -#define S3_TCP64 12 -#define S3_TCPSQ 13 -#define S3_TCPFG 14 -#define S3_TCPHL 15 -#define S3_TCPHc 16 -#define S3_FRAG 17 -#define S3_FOFF 18 -#define S3_CLNP 19 - -#ifdef USE_HP_IP4FRAG -static cas_hp_inst_t cas_prog_ip4fragtab[] = { - { "packet arrival?", 0xffff, 0x0000, OP_NP, 6, S1_VLAN, 0, S1_PCKT, - CL_REG, 0x3ff, 1, 0x0, 0x0000}, - { "VLAN?", 0xffff, 0x8100, OP_EQ, 1, S1_CFI, 0, S1_8023, - IM_CTL, 0x00a, 3, 0x0, 0xffff}, - { "CFI?", 0x1000, 0x1000, OP_EQ, 0, S3_CLNP, 1, S1_8023, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "8023?", 0xffff, 0x0600, OP_LT, 1, S1_LLC, 0, S1_IPV4, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "LLC?", 0xffff, 0xaaaa, OP_EQ, 1, S1_LLCc, 0, S3_CLNP, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "LLCc?",0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S3_CLNP, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "IPV4?", 0xffff, 0x0800, OP_EQ, 1, S1_IPV4c, 0, S1_IPV6, - LD_SAP, 0x100, 3, 0x0, 0xffff}, - { "IPV4 cont?", 0xff00, 0x4500, OP_EQ, 3, S1_IPV4F, 0, S3_CLNP, - LD_SUM, 0x00a, 1, 0x0, 0x0000}, - { "IPV4 frag?", 0x3fff, 0x0000, OP_EQ, 1, S1_TCP44, 0, S3_FRAG, - LD_LEN, 0x03e, 3, 0x0, 0xffff}, - { "TCP44?", 0x00ff, 0x0006, OP_EQ, 7, S3_TCPSQ, 0, S3_CLNP, - LD_FID, 0x182, 3, 0x0, 0xffff}, /* FID IP4&TCP src+dst */ - { "IPV6?", 0xffff, 0x86dd, OP_EQ, 1, S3_IPV6c, 0, S3_CLNP, - LD_SUM, 0x015, 1, 0x0, 0x0000}, - { "IPV6 cont?", 0xf000, 0x6000, OP_EQ, 3, S3_TCP64, 0, S3_CLNP, - LD_FID, 0x484, 1, 0x0, 0xffff}, /* FID IP6&TCP src+dst */ - { "TCP64?", 0xff00, 0x0600, OP_EQ, 18, S3_TCPSQ, 0, S3_CLNP, - LD_LEN, 0x03f, 1, 0x0, 0xffff}, - { "TCP seq", /* DADDR should point to dest port */ - 0x0000, 0x0000, OP_EQ, 0, S3_TCPFG, 4, S3_TCPFG, LD_SEQ, - 0x081, 3, 0x0, 0xffff}, /* Load TCP seq # */ - { "TCP control flags", 0x0000, 0x0000, OP_EQ, 0, S3_TCPHL, 0, - S3_TCPHL, ST_FLG, 0x045, 3, 0x0, 0x002f}, /* Load TCP flags */ - { "TCP length", 0x0000, 0x0000, OP_EQ, 0, S3_TCPHc, 0, S3_TCPHc, - LD_R1, 0x205, 3, 0xB, 0xf000}, - { "TCP length cont", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - LD_HDR, 0x0ff, 3, 0x0, 0xffff}, - { "IP4 Fragment", 0x0000, 0x0000, OP_EQ, 0, S3_FOFF, 0, S3_FOFF, - LD_FID, 0x103, 3, 0x0, 0xffff}, /* FID IP4 src+dst */ - { "IP4 frag offset", 0x0000, 0x0000, OP_EQ, 0, S3_FOFF, 0, S3_FOFF, - LD_SEQ, 0x040, 1, 0xD, 0xfff8}, - { "Cleanup", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x001, 3, 0x0, 0x0001}, - { NULL }, -}; -#ifdef HP_IP4FRAG_DEFAULT -#define CAS_HP_FIRMWARE cas_prog_ip4fragtab -#endif -#endif - -/* - * Alternate table which does batching without reassembly - */ -#ifdef USE_HP_IP46TCP4BATCH -static cas_hp_inst_t cas_prog_ip46tcp4batchtab[] = { - CAS_PROG_IP46TCP4_PREAMBLE, - { "TCP seq", /* DADDR should point to dest port */ - 0x0000, 0x0000, OP_EQ, 0, S1_TCPFG, 0, S1_TCPFG, LD_SEQ, - 0x081, 3, 0x0, 0xffff}, /* Load TCP seq # */ - { "TCP control flags", 0x0000, 0x0000, OP_EQ, 0, S1_TCPHL, 0, - S1_TCPHL, ST_FLG, 0x000, 3, 0x0, 0x0000}, /* Load TCP flags */ - { "TCP length", 0x0000, 0x0000, OP_EQ, 0, S1_TCPHc, 0, - S1_TCPHc, LD_R1, 0x205, 3, 0xB, 0xf000}, - { "TCP length cont", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, - S1_PCKT, IM_CTL, 0x040, 3, 0x0, 0xffff}, /* set batch bit */ - { "Cleanup", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x001, 3, 0x0, 0x0001}, - { "Drop packet", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, - S1_PCKT, IM_CTL, 0x080, 3, 0x0, 0xffff}, - { NULL }, -}; -#ifdef HP_IP46TCP4BATCH_DEFAULT -#define CAS_HP_FIRMWARE cas_prog_ip46tcp4batchtab -#endif -#endif - -/* Workaround for Cassini rev2 descriptor corruption problem. - * Does batching without reassembly, and sets the SAP to a known - * data pattern for all packets. - */ -#ifdef USE_HP_WORKAROUND -static cas_hp_inst_t cas_prog_workaroundtab[] = { - { "packet arrival?", 0xffff, 0x0000, OP_NP, 6, S1_VLAN, 0, - S1_PCKT, CL_REG, 0x3ff, 1, 0x0, 0x0000} , - { "VLAN?", 0xffff, 0x8100, OP_EQ, 1, S1_CFI, 0, S1_8023, - IM_CTL, 0x04a, 3, 0x0, 0xffff}, - { "CFI?", 0x1000, 0x1000, OP_EQ, 0, S1_CLNP, 1, S1_8023, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "8023?", 0xffff, 0x0600, OP_LT, 1, S1_LLC, 0, S1_IPV4, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "LLC?", 0xffff, 0xaaaa, OP_EQ, 1, S1_LLCc, 0, S1_CLNP, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "IPV4?", 0xffff, 0x0800, OP_EQ, 1, S1_IPV4c, 0, S1_IPV6, - IM_SAP, 0x6AE, 3, 0x0, 0xffff}, - { "IPV4 cont?", 0xff00, 0x4500, OP_EQ, 3, S1_IPV4F, 0, S1_CLNP, - LD_SUM, 0x00a, 1, 0x0, 0x0000}, - { "IPV4 frag?", 0x3fff, 0x0000, OP_EQ, 1, S1_TCP44, 0, S1_CLNP, - LD_LEN, 0x03e, 1, 0x0, 0xffff}, - { "TCP44?", 0x00ff, 0x0006, OP_EQ, 7, S1_TCPSQ, 0, S1_CLNP, - LD_FID, 0x182, 3, 0x0, 0xffff}, /* FID IP4&TCP src+dst */ - { "IPV6?", 0xffff, 0x86dd, OP_EQ, 1, S1_IPV6L, 0, S1_CLNP, - LD_SUM, 0x015, 1, 0x0, 0x0000}, - { "IPV6 len", 0xf000, 0x6000, OP_EQ, 0, S1_IPV6c, 0, S1_CLNP, - IM_R1, 0x128, 1, 0x0, 0xffff}, - { "IPV6 cont?", 0x0000, 0x0000, OP_EQ, 3, S1_TCP64, 0, S1_CLNP, - LD_FID, 0x484, 1, 0x0, 0xffff}, /* FID IP6&TCP src+dst */ - { "TCP64?", 0xff00, 0x0600, OP_EQ, 18, S1_TCPSQ, 0, S1_CLNP, - LD_LEN, 0x03f, 1, 0x0, 0xffff}, - { "TCP seq", /* DADDR should point to dest port */ - 0x0000, 0x0000, OP_EQ, 0, S1_TCPFG, 4, S1_TCPFG, LD_SEQ, - 0x081, 3, 0x0, 0xffff}, /* Load TCP seq # */ - { "TCP control flags", 0x0000, 0x0000, OP_EQ, 0, S1_TCPHL, 0, - S1_TCPHL, ST_FLG, 0x045, 3, 0x0, 0x002f}, /* Load TCP flags */ - { "TCP length", 0x0000, 0x0000, OP_EQ, 0, S1_TCPHc, 0, S1_TCPHc, - LD_R1, 0x205, 3, 0xB, 0xf000}, - { "TCP length cont", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, - S1_PCKT, LD_HDR, 0x0ff, 3, 0x0, 0xffff}, - { "Cleanup", 0x0000, 0x0000, OP_EQ, 0, S1_CLNP2, 0, S1_CLNP2, - IM_SAP, 0x6AE, 3, 0x0, 0xffff} , - { "Cleanup 2", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x001, 3, 0x0, 0x0001}, - { NULL }, -}; -#ifdef HP_WORKAROUND_DEFAULT -#define CAS_HP_FIRMWARE cas_prog_workaroundtab -#endif -#endif - -#ifdef USE_HP_ENCRYPT -static cas_hp_inst_t cas_prog_encryptiontab[] = { - { "packet arrival?", 0xffff, 0x0000, OP_NP, 6, S1_VLAN, 0, - S1_PCKT, CL_REG, 0x3ff, 1, 0x0, 0x0000}, - { "VLAN?", 0xffff, 0x8100, OP_EQ, 1, S1_CFI, 0, S1_8023, - IM_CTL, 0x00a, 3, 0x0, 0xffff}, -#if 0 -//"CFI?", /* 02 FIND CFI and If FIND go to S1_DROP */ -//0x1000, 0x1000, OP_EQ, 0, S1_DROP, 1, S1_8023, CL_REG, 0x000, 0, 0x0, 0x00 - 00, -#endif - { "CFI?", /* FIND CFI and If FIND go to CleanUP1 (ignore and send to host) */ - 0x1000, 0x1000, OP_EQ, 0, S1_CLNP, 1, S1_8023, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "8023?", 0xffff, 0x0600, OP_LT, 1, S1_LLC, 0, S1_IPV4, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "LLC?", 0xffff, 0xaaaa, OP_EQ, 1, S1_LLCc, 0, S1_CLNP, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP, - CL_REG, 0x000, 0, 0x0, 0x0000}, - { "IPV4?", 0xffff, 0x0800, OP_EQ, 1, S1_IPV4c, 0, S1_IPV6, - LD_SAP, 0x100, 3, 0x0, 0xffff}, - { "IPV4 cont?", 0xff00, 0x4500, OP_EQ, 3, S1_IPV4F, 0, S1_CLNP, - LD_SUM, 0x00a, 1, 0x0, 0x0000}, - { "IPV4 frag?", 0x3fff, 0x0000, OP_EQ, 1, S1_TCP44, 0, S1_CLNP, - LD_LEN, 0x03e, 1, 0x0, 0xffff}, - { "TCP44?", 0x00ff, 0x0006, OP_EQ, 7, S1_TCPSQ, 0, S1_ESP4, - LD_FID, 0x182, 1, 0x0, 0xffff}, /* FID IP4&TCP src+dst */ - { "IPV6?", 0xffff, 0x86dd, OP_EQ, 1, S1_IPV6L, 0, S1_CLNP, - LD_SUM, 0x015, 1, 0x0, 0x0000}, - { "IPV6 len", 0xf000, 0x6000, OP_EQ, 0, S1_IPV6c, 0, S1_CLNP, - IM_R1, 0x128, 1, 0x0, 0xffff}, - { "IPV6 cont?", 0x0000, 0x0000, OP_EQ, 3, S1_TCP64, 0, S1_CLNP, - LD_FID, 0x484, 1, 0x0, 0xffff}, /* FID IP6&TCP src+dst */ - { "TCP64?", -#if 0 -//@@@0xff00, 0x0600, OP_EQ, 18, S1_TCPSQ, 0, S1_ESP6, LD_LEN, 0x03f, 1, 0x0, 0xffff, -#endif - 0xff00, 0x0600, OP_EQ, 12, S1_TCPSQ, 0, S1_ESP6, LD_LEN, - 0x03f, 1, 0x0, 0xffff}, - { "TCP seq", /* 14:DADDR should point to dest port */ - 0xFFFF, 0x0080, OP_EQ, 0, S2_HTTP, 0, S1_TCPFG, LD_SEQ, - 0x081, 3, 0x0, 0xffff}, /* Load TCP seq # */ - { "TCP control flags", 0xFFFF, 0x8080, OP_EQ, 0, S2_HTTP, 0, - S1_TCPHL, ST_FLG, 0x145, 2, 0x0, 0x002f}, /* Load TCP flags */ - { "TCP length", 0x0000, 0x0000, OP_EQ, 0, S1_TCPHc, 0, S1_TCPHc, - LD_R1, 0x205, 3, 0xB, 0xf000} , - { "TCP length cont", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, - S1_PCKT, LD_HDR, 0x0ff, 3, 0x0, 0xffff}, - { "Cleanup", 0x0000, 0x0000, OP_EQ, 0, S1_CLNP2, 0, S1_CLNP2, - IM_CTL, 0x001, 3, 0x0, 0x0001}, - { "Cleanup 2", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - CL_REG, 0x002, 3, 0x0, 0x0000}, - { "Drop packet", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x080, 3, 0x0, 0xffff}, - { "No HTTP", 0x0000, 0x0000, OP_EQ, 0, S1_PCKT, 0, S1_PCKT, - IM_CTL, 0x044, 3, 0x0, 0xffff}, - { "IPV4 ESP encrypted?", /* S1_ESP4 */ - 0x00ff, 0x0032, OP_EQ, 0, S1_CLNP2, 0, S1_AH4, IM_CTL, - 0x021, 1, 0x0, 0xffff}, - { "IPV4 AH encrypted?", /* S1_AH4 */ - 0x00ff, 0x0033, OP_EQ, 0, S1_CLNP2, 0, S1_CLNP, IM_CTL, - 0x021, 1, 0x0, 0xffff}, - { "IPV6 ESP encrypted?", /* S1_ESP6 */ -#if 0 -//@@@0x00ff, 0x0032, OP_EQ, 0, S1_CLNP2, 0, S1_AH6, IM_CTL, 0x021, 1, 0x0, 0xffff, -#endif - 0xff00, 0x3200, OP_EQ, 0, S1_CLNP2, 0, S1_AH6, IM_CTL, - 0x021, 1, 0x0, 0xffff}, - { "IPV6 AH encrypted?", /* S1_AH6 */ -#if 0 -//@@@0x00ff, 0x0033, OP_EQ, 0, S1_CLNP2, 0, S1_CLNP, IM_CTL, 0x021, 1, 0x0, 0xffff, -#endif - 0xff00, 0x3300, OP_EQ, 0, S1_CLNP2, 0, S1_CLNP, IM_CTL, - 0x021, 1, 0x0, 0xffff}, - { NULL }, -}; -#ifdef HP_ENCRYPT_DEFAULT -#define CAS_HP_FIRMWARE cas_prog_encryptiontab -#endif -#endif - -static cas_hp_inst_t cas_prog_null[] = { {NULL} }; -#ifdef HP_NULL_DEFAULT -#define CAS_HP_FIRMWARE cas_prog_null -#endif - -/* firmware patch for NS_DP83065 */ -typedef struct cas_saturn_patch { - u16 addr; - u16 val; -} cas_saturn_patch_t; - -#if 1 -cas_saturn_patch_t cas_saturn_patch[] = { -{0x8200, 0x007e}, {0x8201, 0x0082}, {0x8202, 0x0009}, -{0x8203, 0x0000}, {0x8204, 0x0000}, {0x8205, 0x0000}, -{0x8206, 0x0000}, {0x8207, 0x0000}, {0x8208, 0x0000}, -{0x8209, 0x008e}, {0x820a, 0x008e}, {0x820b, 0x00ff}, -{0x820c, 0x00ce}, {0x820d, 0x0082}, {0x820e, 0x0025}, -{0x820f, 0x00ff}, {0x8210, 0x0001}, {0x8211, 0x000f}, -{0x8212, 0x00ce}, {0x8213, 0x0084}, {0x8214, 0x0026}, -{0x8215, 0x00ff}, {0x8216, 0x0001}, {0x8217, 0x0011}, -{0x8218, 0x00ce}, {0x8219, 0x0085}, {0x821a, 0x003d}, -{0x821b, 0x00df}, {0x821c, 0x00e5}, {0x821d, 0x0086}, -{0x821e, 0x0039}, {0x821f, 0x00b7}, {0x8220, 0x008f}, -{0x8221, 0x00f8}, {0x8222, 0x007e}, {0x8223, 0x00c3}, -{0x8224, 0x00c2}, {0x8225, 0x0096}, {0x8226, 0x0047}, -{0x8227, 0x0084}, {0x8228, 0x00f3}, {0x8229, 0x008a}, -{0x822a, 0x0000}, {0x822b, 0x0097}, {0x822c, 0x0047}, -{0x822d, 0x00ce}, {0x822e, 0x0082}, {0x822f, 0x0033}, -{0x8230, 0x00ff}, {0x8231, 0x0001}, {0x8232, 0x000f}, -{0x8233, 0x0096}, {0x8234, 0x0046}, {0x8235, 0x0084}, -{0x8236, 0x000c}, {0x8237, 0x0081}, {0x8238, 0x0004}, -{0x8239, 0x0027}, {0x823a, 0x000b}, {0x823b, 0x0096}, -{0x823c, 0x0046}, {0x823d, 0x0084}, {0x823e, 0x000c}, -{0x823f, 0x0081}, {0x8240, 0x0008}, {0x8241, 0x0027}, -{0x8242, 0x0057}, {0x8243, 0x007e}, {0x8244, 0x0084}, -{0x8245, 0x0025}, {0x8246, 0x0096}, {0x8247, 0x0047}, -{0x8248, 0x0084}, {0x8249, 0x00f3}, {0x824a, 0x008a}, -{0x824b, 0x0004}, {0x824c, 0x0097}, {0x824d, 0x0047}, -{0x824e, 0x00ce}, {0x824f, 0x0082}, {0x8250, 0x0054}, -{0x8251, 0x00ff}, {0x8252, 0x0001}, {0x8253, 0x000f}, -{0x8254, 0x0096}, {0x8255, 0x0046}, {0x8256, 0x0084}, -{0x8257, 0x000c}, {0x8258, 0x0081}, {0x8259, 0x0004}, -{0x825a, 0x0026}, {0x825b, 0x0038}, {0x825c, 0x00b6}, -{0x825d, 0x0012}, {0x825e, 0x0020}, {0x825f, 0x0084}, -{0x8260, 0x0020}, {0x8261, 0x0026}, {0x8262, 0x0003}, -{0x8263, 0x007e}, {0x8264, 0x0084}, {0x8265, 0x0025}, -{0x8266, 0x0096}, {0x8267, 0x007b}, {0x8268, 0x00d6}, -{0x8269, 0x007c}, {0x826a, 0x00fe}, {0x826b, 0x008f}, -{0x826c, 0x0056}, {0x826d, 0x00bd}, {0x826e, 0x00f7}, -{0x826f, 0x00b6}, {0x8270, 0x00fe}, {0x8271, 0x008f}, -{0x8272, 0x004e}, {0x8273, 0x00bd}, {0x8274, 0x00ec}, -{0x8275, 0x008e}, {0x8276, 0x00bd}, {0x8277, 0x00fa}, -{0x8278, 0x00f7}, {0x8279, 0x00bd}, {0x827a, 0x00f7}, -{0x827b, 0x0028}, {0x827c, 0x00ce}, {0x827d, 0x0082}, -{0x827e, 0x0082}, {0x827f, 0x00ff}, {0x8280, 0x0001}, -{0x8281, 0x000f}, {0x8282, 0x0096}, {0x8283, 0x0046}, -{0x8284, 0x0084}, {0x8285, 0x000c}, {0x8286, 0x0081}, -{0x8287, 0x0004}, {0x8288, 0x0026}, {0x8289, 0x000a}, -{0x828a, 0x00b6}, {0x828b, 0x0012}, {0x828c, 0x0020}, -{0x828d, 0x0084}, {0x828e, 0x0020}, {0x828f, 0x0027}, -{0x8290, 0x00b5}, {0x8291, 0x007e}, {0x8292, 0x0084}, -{0x8293, 0x0025}, {0x8294, 0x00bd}, {0x8295, 0x00f7}, -{0x8296, 0x001f}, {0x8297, 0x007e}, {0x8298, 0x0084}, -{0x8299, 0x001f}, {0x829a, 0x0096}, {0x829b, 0x0047}, -{0x829c, 0x0084}, {0x829d, 0x00f3}, {0x829e, 0x008a}, -{0x829f, 0x0008}, {0x82a0, 0x0097}, {0x82a1, 0x0047}, -{0x82a2, 0x00de}, {0x82a3, 0x00e1}, {0x82a4, 0x00ad}, -{0x82a5, 0x0000}, {0x82a6, 0x00ce}, {0x82a7, 0x0082}, -{0x82a8, 0x00af}, {0x82a9, 0x00ff}, {0x82aa, 0x0001}, -{0x82ab, 0x000f}, {0x82ac, 0x007e}, {0x82ad, 0x0084}, -{0x82ae, 0x0025}, {0x82af, 0x0096}, {0x82b0, 0x0041}, -{0x82b1, 0x0085}, {0x82b2, 0x0010}, {0x82b3, 0x0026}, -{0x82b4, 0x0006}, {0x82b5, 0x0096}, {0x82b6, 0x0023}, -{0x82b7, 0x0085}, {0x82b8, 0x0040}, {0x82b9, 0x0027}, -{0x82ba, 0x0006}, {0x82bb, 0x00bd}, {0x82bc, 0x00ed}, -{0x82bd, 0x0000}, {0x82be, 0x007e}, {0x82bf, 0x0083}, -{0x82c0, 0x00a2}, {0x82c1, 0x00de}, {0x82c2, 0x0042}, -{0x82c3, 0x00bd}, {0x82c4, 0x00eb}, {0x82c5, 0x008e}, -{0x82c6, 0x0096}, {0x82c7, 0x0024}, {0x82c8, 0x0084}, -{0x82c9, 0x0008}, {0x82ca, 0x0027}, {0x82cb, 0x0003}, -{0x82cc, 0x007e}, {0x82cd, 0x0083}, {0x82ce, 0x00df}, -{0x82cf, 0x0096}, {0x82d0, 0x007b}, {0x82d1, 0x00d6}, -{0x82d2, 0x007c}, {0x82d3, 0x00fe}, {0x82d4, 0x008f}, -{0x82d5, 0x0056}, {0x82d6, 0x00bd}, {0x82d7, 0x00f7}, -{0x82d8, 0x00b6}, {0x82d9, 0x00fe}, {0x82da, 0x008f}, -{0x82db, 0x0050}, {0x82dc, 0x00bd}, {0x82dd, 0x00ec}, -{0x82de, 0x008e}, {0x82df, 0x00bd}, {0x82e0, 0x00fa}, -{0x82e1, 0x00f7}, {0x82e2, 0x0086}, {0x82e3, 0x0011}, -{0x82e4, 0x00c6}, {0x82e5, 0x0049}, {0x82e6, 0x00bd}, -{0x82e7, 0x00e4}, {0x82e8, 0x0012}, {0x82e9, 0x00ce}, -{0x82ea, 0x0082}, {0x82eb, 0x00ef}, {0x82ec, 0x00ff}, -{0x82ed, 0x0001}, {0x82ee, 0x000f}, {0x82ef, 0x0096}, -{0x82f0, 0x0046}, {0x82f1, 0x0084}, {0x82f2, 0x000c}, -{0x82f3, 0x0081}, {0x82f4, 0x0000}, {0x82f5, 0x0027}, -{0x82f6, 0x0017}, {0x82f7, 0x00c6}, {0x82f8, 0x0049}, -{0x82f9, 0x00bd}, {0x82fa, 0x00e4}, {0x82fb, 0x0091}, -{0x82fc, 0x0024}, {0x82fd, 0x000d}, {0x82fe, 0x00b6}, -{0x82ff, 0x0012}, {0x8300, 0x0020}, {0x8301, 0x0085}, -{0x8302, 0x0020}, {0x8303, 0x0026}, {0x8304, 0x000c}, -{0x8305, 0x00ce}, {0x8306, 0x0082}, {0x8307, 0x00c1}, -{0x8308, 0x00ff}, {0x8309, 0x0001}, {0x830a, 0x000f}, -{0x830b, 0x007e}, {0x830c, 0x0084}, {0x830d, 0x0025}, -{0x830e, 0x007e}, {0x830f, 0x0084}, {0x8310, 0x0016}, -{0x8311, 0x00fe}, {0x8312, 0x008f}, {0x8313, 0x0052}, -{0x8314, 0x00bd}, {0x8315, 0x00ec}, {0x8316, 0x008e}, -{0x8317, 0x00bd}, {0x8318, 0x00fa}, {0x8319, 0x00f7}, -{0x831a, 0x0086}, {0x831b, 0x006a}, {0x831c, 0x00c6}, -{0x831d, 0x0049}, {0x831e, 0x00bd}, {0x831f, 0x00e4}, -{0x8320, 0x0012}, {0x8321, 0x00ce}, {0x8322, 0x0083}, -{0x8323, 0x0027}, {0x8324, 0x00ff}, {0x8325, 0x0001}, -{0x8326, 0x000f}, {0x8327, 0x0096}, {0x8328, 0x0046}, -{0x8329, 0x0084}, {0x832a, 0x000c}, {0x832b, 0x0081}, -{0x832c, 0x0000}, {0x832d, 0x0027}, {0x832e, 0x000a}, -{0x832f, 0x00c6}, {0x8330, 0x0049}, {0x8331, 0x00bd}, -{0x8332, 0x00e4}, {0x8333, 0x0091}, {0x8334, 0x0025}, -{0x8335, 0x0006}, {0x8336, 0x007e}, {0x8337, 0x0084}, -{0x8338, 0x0025}, {0x8339, 0x007e}, {0x833a, 0x0084}, -{0x833b, 0x0016}, {0x833c, 0x00b6}, {0x833d, 0x0018}, -{0x833e, 0x0070}, {0x833f, 0x00bb}, {0x8340, 0x0019}, -{0x8341, 0x0070}, {0x8342, 0x002a}, {0x8343, 0x0004}, -{0x8344, 0x0081}, {0x8345, 0x00af}, {0x8346, 0x002e}, -{0x8347, 0x0019}, {0x8348, 0x0096}, {0x8349, 0x007b}, -{0x834a, 0x00f6}, {0x834b, 0x0020}, {0x834c, 0x0007}, -{0x834d, 0x00fa}, {0x834e, 0x0020}, {0x834f, 0x0027}, -{0x8350, 0x00c4}, {0x8351, 0x0038}, {0x8352, 0x0081}, -{0x8353, 0x0038}, {0x8354, 0x0027}, {0x8355, 0x000b}, -{0x8356, 0x00f6}, {0x8357, 0x0020}, {0x8358, 0x0007}, -{0x8359, 0x00fa}, {0x835a, 0x0020}, {0x835b, 0x0027}, -{0x835c, 0x00cb}, {0x835d, 0x0008}, {0x835e, 0x007e}, -{0x835f, 0x0082}, {0x8360, 0x00d3}, {0x8361, 0x00bd}, -{0x8362, 0x00f7}, {0x8363, 0x0066}, {0x8364, 0x0086}, -{0x8365, 0x0074}, {0x8366, 0x00c6}, {0x8367, 0x0049}, -{0x8368, 0x00bd}, {0x8369, 0x00e4}, {0x836a, 0x0012}, -{0x836b, 0x00ce}, {0x836c, 0x0083}, {0x836d, 0x0071}, -{0x836e, 0x00ff}, {0x836f, 0x0001}, {0x8370, 0x000f}, -{0x8371, 0x0096}, {0x8372, 0x0046}, {0x8373, 0x0084}, -{0x8374, 0x000c}, {0x8375, 0x0081}, {0x8376, 0x0008}, -{0x8377, 0x0026}, {0x8378, 0x000a}, {0x8379, 0x00c6}, -{0x837a, 0x0049}, {0x837b, 0x00bd}, {0x837c, 0x00e4}, -{0x837d, 0x0091}, {0x837e, 0x0025}, {0x837f, 0x0006}, -{0x8380, 0x007e}, {0x8381, 0x0084}, {0x8382, 0x0025}, -{0x8383, 0x007e}, {0x8384, 0x0084}, {0x8385, 0x0016}, -{0x8386, 0x00bd}, {0x8387, 0x00f7}, {0x8388, 0x003e}, -{0x8389, 0x0026}, {0x838a, 0x000e}, {0x838b, 0x00bd}, -{0x838c, 0x00e5}, {0x838d, 0x0009}, {0x838e, 0x0026}, -{0x838f, 0x0006}, {0x8390, 0x00ce}, {0x8391, 0x0082}, -{0x8392, 0x00c1}, {0x8393, 0x00ff}, {0x8394, 0x0001}, -{0x8395, 0x000f}, {0x8396, 0x007e}, {0x8397, 0x0084}, -{0x8398, 0x0025}, {0x8399, 0x00fe}, {0x839a, 0x008f}, -{0x839b, 0x0054}, {0x839c, 0x00bd}, {0x839d, 0x00ec}, -{0x839e, 0x008e}, {0x839f, 0x00bd}, {0x83a0, 0x00fa}, -{0x83a1, 0x00f7}, {0x83a2, 0x00bd}, {0x83a3, 0x00f7}, -{0x83a4, 0x0033}, {0x83a5, 0x0086}, {0x83a6, 0x000f}, -{0x83a7, 0x00c6}, {0x83a8, 0x0051}, {0x83a9, 0x00bd}, -{0x83aa, 0x00e4}, {0x83ab, 0x0012}, {0x83ac, 0x00ce}, -{0x83ad, 0x0083}, {0x83ae, 0x00b2}, {0x83af, 0x00ff}, -{0x83b0, 0x0001}, {0x83b1, 0x000f}, {0x83b2, 0x0096}, -{0x83b3, 0x0046}, {0x83b4, 0x0084}, {0x83b5, 0x000c}, -{0x83b6, 0x0081}, {0x83b7, 0x0008}, {0x83b8, 0x0026}, -{0x83b9, 0x005c}, {0x83ba, 0x00b6}, {0x83bb, 0x0012}, -{0x83bc, 0x0020}, {0x83bd, 0x0084}, {0x83be, 0x003f}, -{0x83bf, 0x0081}, {0x83c0, 0x003a}, {0x83c1, 0x0027}, -{0x83c2, 0x001c}, {0x83c3, 0x0096}, {0x83c4, 0x0023}, -{0x83c5, 0x0085}, {0x83c6, 0x0040}, {0x83c7, 0x0027}, -{0x83c8, 0x0003}, {0x83c9, 0x007e}, {0x83ca, 0x0084}, -{0x83cb, 0x0025}, {0x83cc, 0x00c6}, {0x83cd, 0x0051}, -{0x83ce, 0x00bd}, {0x83cf, 0x00e4}, {0x83d0, 0x0091}, -{0x83d1, 0x0025}, {0x83d2, 0x0003}, {0x83d3, 0x007e}, -{0x83d4, 0x0084}, {0x83d5, 0x0025}, {0x83d6, 0x00ce}, -{0x83d7, 0x0082}, {0x83d8, 0x00c1}, {0x83d9, 0x00ff}, -{0x83da, 0x0001}, {0x83db, 0x000f}, {0x83dc, 0x007e}, -{0x83dd, 0x0084}, {0x83de, 0x0025}, {0x83df, 0x00bd}, -{0x83e0, 0x00f8}, {0x83e1, 0x0037}, {0x83e2, 0x007c}, -{0x83e3, 0x0000}, {0x83e4, 0x007a}, {0x83e5, 0x00ce}, -{0x83e6, 0x0083}, {0x83e7, 0x00ee}, {0x83e8, 0x00ff}, -{0x83e9, 0x0001}, {0x83ea, 0x000f}, {0x83eb, 0x007e}, -{0x83ec, 0x0084}, {0x83ed, 0x0025}, {0x83ee, 0x0096}, -{0x83ef, 0x0046}, {0x83f0, 0x0084}, {0x83f1, 0x000c}, -{0x83f2, 0x0081}, {0x83f3, 0x0008}, {0x83f4, 0x0026}, -{0x83f5, 0x0020}, {0x83f6, 0x0096}, {0x83f7, 0x0024}, -{0x83f8, 0x0084}, {0x83f9, 0x0008}, {0x83fa, 0x0026}, -{0x83fb, 0x0029}, {0x83fc, 0x00b6}, {0x83fd, 0x0018}, -{0x83fe, 0x0082}, {0x83ff, 0x00bb}, {0x8400, 0x0019}, -{0x8401, 0x0082}, {0x8402, 0x00b1}, {0x8403, 0x0001}, -{0x8404, 0x003b}, {0x8405, 0x0022}, {0x8406, 0x0009}, -{0x8407, 0x00b6}, {0x8408, 0x0012}, {0x8409, 0x0020}, -{0x840a, 0x0084}, {0x840b, 0x0037}, {0x840c, 0x0081}, -{0x840d, 0x0032}, {0x840e, 0x0027}, {0x840f, 0x0015}, -{0x8410, 0x00bd}, {0x8411, 0x00f8}, {0x8412, 0x0044}, -{0x8413, 0x007e}, {0x8414, 0x0082}, {0x8415, 0x00c1}, -{0x8416, 0x00bd}, {0x8417, 0x00f7}, {0x8418, 0x001f}, -{0x8419, 0x00bd}, {0x841a, 0x00f8}, {0x841b, 0x0044}, -{0x841c, 0x00bd}, {0x841d, 0x00fc}, {0x841e, 0x0029}, -{0x841f, 0x00ce}, {0x8420, 0x0082}, {0x8421, 0x0025}, -{0x8422, 0x00ff}, {0x8423, 0x0001}, {0x8424, 0x000f}, -{0x8425, 0x0039}, {0x8426, 0x0096}, {0x8427, 0x0047}, -{0x8428, 0x0084}, {0x8429, 0x00fc}, {0x842a, 0x008a}, -{0x842b, 0x0000}, {0x842c, 0x0097}, {0x842d, 0x0047}, -{0x842e, 0x00ce}, {0x842f, 0x0084}, {0x8430, 0x0034}, -{0x8431, 0x00ff}, {0x8432, 0x0001}, {0x8433, 0x0011}, -{0x8434, 0x0096}, {0x8435, 0x0046}, {0x8436, 0x0084}, -{0x8437, 0x0003}, {0x8438, 0x0081}, {0x8439, 0x0002}, -{0x843a, 0x0027}, {0x843b, 0x0003}, {0x843c, 0x007e}, -{0x843d, 0x0085}, {0x843e, 0x001e}, {0x843f, 0x0096}, -{0x8440, 0x0047}, {0x8441, 0x0084}, {0x8442, 0x00fc}, -{0x8443, 0x008a}, {0x8444, 0x0002}, {0x8445, 0x0097}, -{0x8446, 0x0047}, {0x8447, 0x00de}, {0x8448, 0x00e1}, -{0x8449, 0x00ad}, {0x844a, 0x0000}, {0x844b, 0x0086}, -{0x844c, 0x0001}, {0x844d, 0x00b7}, {0x844e, 0x0012}, -{0x844f, 0x0051}, {0x8450, 0x00bd}, {0x8451, 0x00f7}, -{0x8452, 0x0014}, {0x8453, 0x00b6}, {0x8454, 0x0010}, -{0x8455, 0x0031}, {0x8456, 0x0084}, {0x8457, 0x00fd}, -{0x8458, 0x00b7}, {0x8459, 0x0010}, {0x845a, 0x0031}, -{0x845b, 0x00bd}, {0x845c, 0x00f8}, {0x845d, 0x001e}, -{0x845e, 0x0096}, {0x845f, 0x0081}, {0x8460, 0x00d6}, -{0x8461, 0x0082}, {0x8462, 0x00fe}, {0x8463, 0x008f}, -{0x8464, 0x005a}, {0x8465, 0x00bd}, {0x8466, 0x00f7}, -{0x8467, 0x00b6}, {0x8468, 0x00fe}, {0x8469, 0x008f}, -{0x846a, 0x005c}, {0x846b, 0x00bd}, {0x846c, 0x00ec}, -{0x846d, 0x008e}, {0x846e, 0x00bd}, {0x846f, 0x00fa}, -{0x8470, 0x00f7}, {0x8471, 0x0086}, {0x8472, 0x0008}, -{0x8473, 0x00d6}, {0x8474, 0x0000}, {0x8475, 0x00c5}, -{0x8476, 0x0010}, {0x8477, 0x0026}, {0x8478, 0x0002}, -{0x8479, 0x008b}, {0x847a, 0x0020}, {0x847b, 0x00c6}, -{0x847c, 0x0051}, {0x847d, 0x00bd}, {0x847e, 0x00e4}, -{0x847f, 0x0012}, {0x8480, 0x00ce}, {0x8481, 0x0084}, -{0x8482, 0x0086}, {0x8483, 0x00ff}, {0x8484, 0x0001}, -{0x8485, 0x0011}, {0x8486, 0x0096}, {0x8487, 0x0046}, -{0x8488, 0x0084}, {0x8489, 0x0003}, {0x848a, 0x0081}, -{0x848b, 0x0002}, {0x848c, 0x0027}, {0x848d, 0x0003}, -{0x848e, 0x007e}, {0x848f, 0x0085}, {0x8490, 0x000f}, -{0x8491, 0x00c6}, {0x8492, 0x0051}, {0x8493, 0x00bd}, -{0x8494, 0x00e4}, {0x8495, 0x0091}, {0x8496, 0x0025}, -{0x8497, 0x0003}, {0x8498, 0x007e}, {0x8499, 0x0085}, -{0x849a, 0x001e}, {0x849b, 0x0096}, {0x849c, 0x0044}, -{0x849d, 0x0085}, {0x849e, 0x0010}, {0x849f, 0x0026}, -{0x84a0, 0x000a}, {0x84a1, 0x00b6}, {0x84a2, 0x0012}, -{0x84a3, 0x0050}, {0x84a4, 0x00ba}, {0x84a5, 0x0001}, -{0x84a6, 0x003c}, {0x84a7, 0x0085}, {0x84a8, 0x0010}, -{0x84a9, 0x0027}, {0x84aa, 0x00a8}, {0x84ab, 0x00bd}, -{0x84ac, 0x00f7}, {0x84ad, 0x0066}, {0x84ae, 0x00ce}, -{0x84af, 0x0084}, {0x84b0, 0x00b7}, {0x84b1, 0x00ff}, -{0x84b2, 0x0001}, {0x84b3, 0x0011}, {0x84b4, 0x007e}, -{0x84b5, 0x0085}, {0x84b6, 0x001e}, {0x84b7, 0x0096}, -{0x84b8, 0x0046}, {0x84b9, 0x0084}, {0x84ba, 0x0003}, -{0x84bb, 0x0081}, {0x84bc, 0x0002}, {0x84bd, 0x0026}, -{0x84be, 0x0050}, {0x84bf, 0x00b6}, {0x84c0, 0x0012}, -{0x84c1, 0x0030}, {0x84c2, 0x0084}, {0x84c3, 0x0003}, -{0x84c4, 0x0081}, {0x84c5, 0x0001}, {0x84c6, 0x0027}, -{0x84c7, 0x0003}, {0x84c8, 0x007e}, {0x84c9, 0x0085}, -{0x84ca, 0x001e}, {0x84cb, 0x0096}, {0x84cc, 0x0044}, -{0x84cd, 0x0085}, {0x84ce, 0x0010}, {0x84cf, 0x0026}, -{0x84d0, 0x0013}, {0x84d1, 0x00b6}, {0x84d2, 0x0012}, -{0x84d3, 0x0050}, {0x84d4, 0x00ba}, {0x84d5, 0x0001}, -{0x84d6, 0x003c}, {0x84d7, 0x0085}, {0x84d8, 0x0010}, -{0x84d9, 0x0026}, {0x84da, 0x0009}, {0x84db, 0x00ce}, -{0x84dc, 0x0084}, {0x84dd, 0x0053}, {0x84de, 0x00ff}, -{0x84df, 0x0001}, {0x84e0, 0x0011}, {0x84e1, 0x007e}, -{0x84e2, 0x0085}, {0x84e3, 0x001e}, {0x84e4, 0x00b6}, -{0x84e5, 0x0010}, {0x84e6, 0x0031}, {0x84e7, 0x008a}, -{0x84e8, 0x0002}, {0x84e9, 0x00b7}, {0x84ea, 0x0010}, -{0x84eb, 0x0031}, {0x84ec, 0x00bd}, {0x84ed, 0x0085}, -{0x84ee, 0x001f}, {0x84ef, 0x00bd}, {0x84f0, 0x00f8}, -{0x84f1, 0x0037}, {0x84f2, 0x007c}, {0x84f3, 0x0000}, -{0x84f4, 0x0080}, {0x84f5, 0x00ce}, {0x84f6, 0x0084}, -{0x84f7, 0x00fe}, {0x84f8, 0x00ff}, {0x84f9, 0x0001}, -{0x84fa, 0x0011}, {0x84fb, 0x007e}, {0x84fc, 0x0085}, -{0x84fd, 0x001e}, {0x84fe, 0x0096}, {0x84ff, 0x0046}, -{0x8500, 0x0084}, {0x8501, 0x0003}, {0x8502, 0x0081}, -{0x8503, 0x0002}, {0x8504, 0x0026}, {0x8505, 0x0009}, -{0x8506, 0x00b6}, {0x8507, 0x0012}, {0x8508, 0x0030}, -{0x8509, 0x0084}, {0x850a, 0x0003}, {0x850b, 0x0081}, -{0x850c, 0x0001}, {0x850d, 0x0027}, {0x850e, 0x000f}, -{0x850f, 0x00bd}, {0x8510, 0x00f8}, {0x8511, 0x0044}, -{0x8512, 0x00bd}, {0x8513, 0x00f7}, {0x8514, 0x000b}, -{0x8515, 0x00bd}, {0x8516, 0x00fc}, {0x8517, 0x0029}, -{0x8518, 0x00ce}, {0x8519, 0x0084}, {0x851a, 0x0026}, -{0x851b, 0x00ff}, {0x851c, 0x0001}, {0x851d, 0x0011}, -{0x851e, 0x0039}, {0x851f, 0x00d6}, {0x8520, 0x0022}, -{0x8521, 0x00c4}, {0x8522, 0x000f}, {0x8523, 0x00b6}, -{0x8524, 0x0012}, {0x8525, 0x0030}, {0x8526, 0x00ba}, -{0x8527, 0x0012}, {0x8528, 0x0032}, {0x8529, 0x0084}, -{0x852a, 0x0004}, {0x852b, 0x0027}, {0x852c, 0x000d}, -{0x852d, 0x0096}, {0x852e, 0x0022}, {0x852f, 0x0085}, -{0x8530, 0x0004}, {0x8531, 0x0027}, {0x8532, 0x0005}, -{0x8533, 0x00ca}, {0x8534, 0x0010}, {0x8535, 0x007e}, -{0x8536, 0x0085}, {0x8537, 0x003a}, {0x8538, 0x00ca}, -{0x8539, 0x0020}, {0x853a, 0x00d7}, {0x853b, 0x0022}, -{0x853c, 0x0039}, {0x853d, 0x0086}, {0x853e, 0x0000}, -{0x853f, 0x0097}, {0x8540, 0x0083}, {0x8541, 0x0018}, -{0x8542, 0x00ce}, {0x8543, 0x001c}, {0x8544, 0x0000}, -{0x8545, 0x00bd}, {0x8546, 0x00eb}, {0x8547, 0x0046}, -{0x8548, 0x0096}, {0x8549, 0x0057}, {0x854a, 0x0085}, -{0x854b, 0x0001}, {0x854c, 0x0027}, {0x854d, 0x0002}, -{0x854e, 0x004f}, {0x854f, 0x0039}, {0x8550, 0x0085}, -{0x8551, 0x0002}, {0x8552, 0x0027}, {0x8553, 0x0001}, -{0x8554, 0x0039}, {0x8555, 0x007f}, {0x8556, 0x008f}, -{0x8557, 0x007d}, {0x8558, 0x0086}, {0x8559, 0x0004}, -{0x855a, 0x00b7}, {0x855b, 0x0012}, {0x855c, 0x0004}, -{0x855d, 0x0086}, {0x855e, 0x0008}, {0x855f, 0x00b7}, -{0x8560, 0x0012}, {0x8561, 0x0007}, {0x8562, 0x0086}, -{0x8563, 0x0010}, {0x8564, 0x00b7}, {0x8565, 0x0012}, -{0x8566, 0x000c}, {0x8567, 0x0086}, {0x8568, 0x0007}, -{0x8569, 0x00b7}, {0x856a, 0x0012}, {0x856b, 0x0006}, -{0x856c, 0x00b6}, {0x856d, 0x008f}, {0x856e, 0x007d}, -{0x856f, 0x00b7}, {0x8570, 0x0012}, {0x8571, 0x0070}, -{0x8572, 0x0086}, {0x8573, 0x0001}, {0x8574, 0x00ba}, -{0x8575, 0x0012}, {0x8576, 0x0004}, {0x8577, 0x00b7}, -{0x8578, 0x0012}, {0x8579, 0x0004}, {0x857a, 0x0001}, -{0x857b, 0x0001}, {0x857c, 0x0001}, {0x857d, 0x0001}, -{0x857e, 0x0001}, {0x857f, 0x0001}, {0x8580, 0x00b6}, -{0x8581, 0x0012}, {0x8582, 0x0004}, {0x8583, 0x0084}, -{0x8584, 0x00fe}, {0x8585, 0x008a}, {0x8586, 0x0002}, -{0x8587, 0x00b7}, {0x8588, 0x0012}, {0x8589, 0x0004}, -{0x858a, 0x0001}, {0x858b, 0x0001}, {0x858c, 0x0001}, -{0x858d, 0x0001}, {0x858e, 0x0001}, {0x858f, 0x0001}, -{0x8590, 0x0086}, {0x8591, 0x00fd}, {0x8592, 0x00b4}, -{0x8593, 0x0012}, {0x8594, 0x0004}, {0x8595, 0x00b7}, -{0x8596, 0x0012}, {0x8597, 0x0004}, {0x8598, 0x00b6}, -{0x8599, 0x0012}, {0x859a, 0x0000}, {0x859b, 0x0084}, -{0x859c, 0x0008}, {0x859d, 0x0081}, {0x859e, 0x0008}, -{0x859f, 0x0027}, {0x85a0, 0x0016}, {0x85a1, 0x00b6}, -{0x85a2, 0x008f}, {0x85a3, 0x007d}, {0x85a4, 0x0081}, -{0x85a5, 0x000c}, {0x85a6, 0x0027}, {0x85a7, 0x0008}, -{0x85a8, 0x008b}, {0x85a9, 0x0004}, {0x85aa, 0x00b7}, -{0x85ab, 0x008f}, {0x85ac, 0x007d}, {0x85ad, 0x007e}, -{0x85ae, 0x0085}, {0x85af, 0x006c}, {0x85b0, 0x0086}, -{0x85b1, 0x0003}, {0x85b2, 0x0097}, {0x85b3, 0x0040}, -{0x85b4, 0x007e}, {0x85b5, 0x0089}, {0x85b6, 0x006e}, -{0x85b7, 0x0086}, {0x85b8, 0x0007}, {0x85b9, 0x00b7}, -{0x85ba, 0x0012}, {0x85bb, 0x0006}, {0x85bc, 0x005f}, -{0x85bd, 0x00f7}, {0x85be, 0x008f}, {0x85bf, 0x0082}, -{0x85c0, 0x005f}, {0x85c1, 0x00f7}, {0x85c2, 0x008f}, -{0x85c3, 0x007f}, {0x85c4, 0x00f7}, {0x85c5, 0x008f}, -{0x85c6, 0x0070}, {0x85c7, 0x00f7}, {0x85c8, 0x008f}, -{0x85c9, 0x0071}, {0x85ca, 0x00f7}, {0x85cb, 0x008f}, -{0x85cc, 0x0072}, {0x85cd, 0x00f7}, {0x85ce, 0x008f}, -{0x85cf, 0x0073}, {0x85d0, 0x00f7}, {0x85d1, 0x008f}, -{0x85d2, 0x0074}, {0x85d3, 0x00f7}, {0x85d4, 0x008f}, -{0x85d5, 0x0075}, {0x85d6, 0x00f7}, {0x85d7, 0x008f}, -{0x85d8, 0x0076}, {0x85d9, 0x00f7}, {0x85da, 0x008f}, -{0x85db, 0x0077}, {0x85dc, 0x00f7}, {0x85dd, 0x008f}, -{0x85de, 0x0078}, {0x85df, 0x00f7}, {0x85e0, 0x008f}, -{0x85e1, 0x0079}, {0x85e2, 0x00f7}, {0x85e3, 0x008f}, -{0x85e4, 0x007a}, {0x85e5, 0x00f7}, {0x85e6, 0x008f}, -{0x85e7, 0x007b}, {0x85e8, 0x00b6}, {0x85e9, 0x0012}, -{0x85ea, 0x0004}, {0x85eb, 0x008a}, {0x85ec, 0x0010}, -{0x85ed, 0x00b7}, {0x85ee, 0x0012}, {0x85ef, 0x0004}, -{0x85f0, 0x0086}, {0x85f1, 0x00e4}, {0x85f2, 0x00b7}, -{0x85f3, 0x0012}, {0x85f4, 0x0070}, {0x85f5, 0x00b7}, -{0x85f6, 0x0012}, {0x85f7, 0x0007}, {0x85f8, 0x00f7}, -{0x85f9, 0x0012}, {0x85fa, 0x0005}, {0x85fb, 0x00f7}, -{0x85fc, 0x0012}, {0x85fd, 0x0009}, {0x85fe, 0x0086}, -{0x85ff, 0x0008}, {0x8600, 0x00ba}, {0x8601, 0x0012}, -{0x8602, 0x0004}, {0x8603, 0x00b7}, {0x8604, 0x0012}, -{0x8605, 0x0004}, {0x8606, 0x0086}, {0x8607, 0x00f7}, -{0x8608, 0x00b4}, {0x8609, 0x0012}, {0x860a, 0x0004}, -{0x860b, 0x00b7}, {0x860c, 0x0012}, {0x860d, 0x0004}, -{0x860e, 0x0001}, {0x860f, 0x0001}, {0x8610, 0x0001}, -{0x8611, 0x0001}, {0x8612, 0x0001}, {0x8613, 0x0001}, -{0x8614, 0x00b6}, {0x8615, 0x0012}, {0x8616, 0x0008}, -{0x8617, 0x0027}, {0x8618, 0x007f}, {0x8619, 0x0081}, -{0x861a, 0x0080}, {0x861b, 0x0026}, {0x861c, 0x000b}, -{0x861d, 0x0086}, {0x861e, 0x0008}, {0x861f, 0x00ce}, -{0x8620, 0x008f}, {0x8621, 0x0079}, {0x8622, 0x00bd}, -{0x8623, 0x0089}, {0x8624, 0x007b}, {0x8625, 0x007e}, -{0x8626, 0x0086}, {0x8627, 0x008e}, {0x8628, 0x0081}, -{0x8629, 0x0040}, {0x862a, 0x0026}, {0x862b, 0x000b}, -{0x862c, 0x0086}, {0x862d, 0x0004}, {0x862e, 0x00ce}, -{0x862f, 0x008f}, {0x8630, 0x0076}, {0x8631, 0x00bd}, -{0x8632, 0x0089}, {0x8633, 0x007b}, {0x8634, 0x007e}, -{0x8635, 0x0086}, {0x8636, 0x008e}, {0x8637, 0x0081}, -{0x8638, 0x0020}, {0x8639, 0x0026}, {0x863a, 0x000b}, -{0x863b, 0x0086}, {0x863c, 0x0002}, {0x863d, 0x00ce}, -{0x863e, 0x008f}, {0x863f, 0x0073}, {0x8640, 0x00bd}, -{0x8641, 0x0089}, {0x8642, 0x007b}, {0x8643, 0x007e}, -{0x8644, 0x0086}, {0x8645, 0x008e}, {0x8646, 0x0081}, -{0x8647, 0x0010}, {0x8648, 0x0026}, {0x8649, 0x000b}, -{0x864a, 0x0086}, {0x864b, 0x0001}, {0x864c, 0x00ce}, -{0x864d, 0x008f}, {0x864e, 0x0070}, {0x864f, 0x00bd}, -{0x8650, 0x0089}, {0x8651, 0x007b}, {0x8652, 0x007e}, -{0x8653, 0x0086}, {0x8654, 0x008e}, {0x8655, 0x0081}, -{0x8656, 0x0008}, {0x8657, 0x0026}, {0x8658, 0x000b}, -{0x8659, 0x0086}, {0x865a, 0x0008}, {0x865b, 0x00ce}, -{0x865c, 0x008f}, {0x865d, 0x0079}, {0x865e, 0x00bd}, -{0x865f, 0x0089}, {0x8660, 0x007f}, {0x8661, 0x007e}, -{0x8662, 0x0086}, {0x8663, 0x008e}, {0x8664, 0x0081}, -{0x8665, 0x0004}, {0x8666, 0x0026}, {0x8667, 0x000b}, -{0x8668, 0x0086}, {0x8669, 0x0004}, {0x866a, 0x00ce}, -{0x866b, 0x008f}, {0x866c, 0x0076}, {0x866d, 0x00bd}, -{0x866e, 0x0089}, {0x866f, 0x007f}, {0x8670, 0x007e}, -{0x8671, 0x0086}, {0x8672, 0x008e}, {0x8673, 0x0081}, -{0x8674, 0x0002}, {0x8675, 0x0026}, {0x8676, 0x000b}, -{0x8677, 0x008a}, {0x8678, 0x0002}, {0x8679, 0x00ce}, -{0x867a, 0x008f}, {0x867b, 0x0073}, {0x867c, 0x00bd}, -{0x867d, 0x0089}, {0x867e, 0x007f}, {0x867f, 0x007e}, -{0x8680, 0x0086}, {0x8681, 0x008e}, {0x8682, 0x0081}, -{0x8683, 0x0001}, {0x8684, 0x0026}, {0x8685, 0x0008}, -{0x8686, 0x0086}, {0x8687, 0x0001}, {0x8688, 0x00ce}, -{0x8689, 0x008f}, {0x868a, 0x0070}, {0x868b, 0x00bd}, -{0x868c, 0x0089}, {0x868d, 0x007f}, {0x868e, 0x00b6}, -{0x868f, 0x008f}, {0x8690, 0x007f}, {0x8691, 0x0081}, -{0x8692, 0x000f}, {0x8693, 0x0026}, {0x8694, 0x0003}, -{0x8695, 0x007e}, {0x8696, 0x0087}, {0x8697, 0x0047}, -{0x8698, 0x00b6}, {0x8699, 0x0012}, {0x869a, 0x0009}, -{0x869b, 0x0084}, {0x869c, 0x0003}, {0x869d, 0x0081}, -{0x869e, 0x0003}, {0x869f, 0x0027}, {0x86a0, 0x0006}, -{0x86a1, 0x007c}, {0x86a2, 0x0012}, {0x86a3, 0x0009}, -{0x86a4, 0x007e}, {0x86a5, 0x0085}, {0x86a6, 0x00fe}, -{0x86a7, 0x00b6}, {0x86a8, 0x0012}, {0x86a9, 0x0006}, -{0x86aa, 0x0084}, {0x86ab, 0x0007}, {0x86ac, 0x0081}, -{0x86ad, 0x0007}, {0x86ae, 0x0027}, {0x86af, 0x0008}, -{0x86b0, 0x008b}, {0x86b1, 0x0001}, {0x86b2, 0x00b7}, -{0x86b3, 0x0012}, {0x86b4, 0x0006}, {0x86b5, 0x007e}, -{0x86b6, 0x0086}, {0x86b7, 0x00d5}, {0x86b8, 0x00b6}, -{0x86b9, 0x008f}, {0x86ba, 0x0082}, {0x86bb, 0x0026}, -{0x86bc, 0x000a}, {0x86bd, 0x007c}, {0x86be, 0x008f}, -{0x86bf, 0x0082}, {0x86c0, 0x004f}, {0x86c1, 0x00b7}, -{0x86c2, 0x0012}, {0x86c3, 0x0006}, {0x86c4, 0x007e}, -{0x86c5, 0x0085}, {0x86c6, 0x00c0}, {0x86c7, 0x00b6}, -{0x86c8, 0x0012}, {0x86c9, 0x0006}, {0x86ca, 0x0084}, -{0x86cb, 0x003f}, {0x86cc, 0x0081}, {0x86cd, 0x003f}, -{0x86ce, 0x0027}, {0x86cf, 0x0010}, {0x86d0, 0x008b}, -{0x86d1, 0x0008}, {0x86d2, 0x00b7}, {0x86d3, 0x0012}, -{0x86d4, 0x0006}, {0x86d5, 0x00b6}, {0x86d6, 0x0012}, -{0x86d7, 0x0009}, {0x86d8, 0x0084}, {0x86d9, 0x00fc}, -{0x86da, 0x00b7}, {0x86db, 0x0012}, {0x86dc, 0x0009}, -{0x86dd, 0x007e}, {0x86de, 0x0085}, {0x86df, 0x00fe}, -{0x86e0, 0x00ce}, {0x86e1, 0x008f}, {0x86e2, 0x0070}, -{0x86e3, 0x0018}, {0x86e4, 0x00ce}, {0x86e5, 0x008f}, -{0x86e6, 0x0084}, {0x86e7, 0x00c6}, {0x86e8, 0x000c}, -{0x86e9, 0x00bd}, {0x86ea, 0x0089}, {0x86eb, 0x006f}, -{0x86ec, 0x00ce}, {0x86ed, 0x008f}, {0x86ee, 0x0084}, -{0x86ef, 0x0018}, {0x86f0, 0x00ce}, {0x86f1, 0x008f}, -{0x86f2, 0x0070}, {0x86f3, 0x00c6}, {0x86f4, 0x000c}, -{0x86f5, 0x00bd}, {0x86f6, 0x0089}, {0x86f7, 0x006f}, -{0x86f8, 0x00d6}, {0x86f9, 0x0083}, {0x86fa, 0x00c1}, -{0x86fb, 0x004f}, {0x86fc, 0x002d}, {0x86fd, 0x0003}, -{0x86fe, 0x007e}, {0x86ff, 0x0087}, {0x8700, 0x0040}, -{0x8701, 0x00b6}, {0x8702, 0x008f}, {0x8703, 0x007f}, -{0x8704, 0x0081}, {0x8705, 0x0007}, {0x8706, 0x0027}, -{0x8707, 0x000f}, {0x8708, 0x0081}, {0x8709, 0x000b}, -{0x870a, 0x0027}, {0x870b, 0x0015}, {0x870c, 0x0081}, -{0x870d, 0x000d}, {0x870e, 0x0027}, {0x870f, 0x001b}, -{0x8710, 0x0081}, {0x8711, 0x000e}, {0x8712, 0x0027}, -{0x8713, 0x0021}, {0x8714, 0x007e}, {0x8715, 0x0087}, -{0x8716, 0x0040}, {0x8717, 0x00f7}, {0x8718, 0x008f}, -{0x8719, 0x007b}, {0x871a, 0x0086}, {0x871b, 0x0002}, -{0x871c, 0x00b7}, {0x871d, 0x008f}, {0x871e, 0x007a}, -{0x871f, 0x0020}, {0x8720, 0x001c}, {0x8721, 0x00f7}, -{0x8722, 0x008f}, {0x8723, 0x0078}, {0x8724, 0x0086}, -{0x8725, 0x0002}, {0x8726, 0x00b7}, {0x8727, 0x008f}, -{0x8728, 0x0077}, {0x8729, 0x0020}, {0x872a, 0x0012}, -{0x872b, 0x00f7}, {0x872c, 0x008f}, {0x872d, 0x0075}, -{0x872e, 0x0086}, {0x872f, 0x0002}, {0x8730, 0x00b7}, -{0x8731, 0x008f}, {0x8732, 0x0074}, {0x8733, 0x0020}, -{0x8734, 0x0008}, {0x8735, 0x00f7}, {0x8736, 0x008f}, -{0x8737, 0x0072}, {0x8738, 0x0086}, {0x8739, 0x0002}, -{0x873a, 0x00b7}, {0x873b, 0x008f}, {0x873c, 0x0071}, -{0x873d, 0x007e}, {0x873e, 0x0087}, {0x873f, 0x0047}, -{0x8740, 0x0086}, {0x8741, 0x0004}, {0x8742, 0x0097}, -{0x8743, 0x0040}, {0x8744, 0x007e}, {0x8745, 0x0089}, -{0x8746, 0x006e}, {0x8747, 0x00ce}, {0x8748, 0x008f}, -{0x8749, 0x0072}, {0x874a, 0x00bd}, {0x874b, 0x0089}, -{0x874c, 0x00f7}, {0x874d, 0x00ce}, {0x874e, 0x008f}, -{0x874f, 0x0075}, {0x8750, 0x00bd}, {0x8751, 0x0089}, -{0x8752, 0x00f7}, {0x8753, 0x00ce}, {0x8754, 0x008f}, -{0x8755, 0x0078}, {0x8756, 0x00bd}, {0x8757, 0x0089}, -{0x8758, 0x00f7}, {0x8759, 0x00ce}, {0x875a, 0x008f}, -{0x875b, 0x007b}, {0x875c, 0x00bd}, {0x875d, 0x0089}, -{0x875e, 0x00f7}, {0x875f, 0x004f}, {0x8760, 0x00b7}, -{0x8761, 0x008f}, {0x8762, 0x007d}, {0x8763, 0x00b7}, -{0x8764, 0x008f}, {0x8765, 0x0081}, {0x8766, 0x00b6}, -{0x8767, 0x008f}, {0x8768, 0x0072}, {0x8769, 0x0027}, -{0x876a, 0x0047}, {0x876b, 0x007c}, {0x876c, 0x008f}, -{0x876d, 0x007d}, {0x876e, 0x00b6}, {0x876f, 0x008f}, -{0x8770, 0x0075}, {0x8771, 0x0027}, {0x8772, 0x003f}, -{0x8773, 0x007c}, {0x8774, 0x008f}, {0x8775, 0x007d}, -{0x8776, 0x00b6}, {0x8777, 0x008f}, {0x8778, 0x0078}, -{0x8779, 0x0027}, {0x877a, 0x0037}, {0x877b, 0x007c}, -{0x877c, 0x008f}, {0x877d, 0x007d}, {0x877e, 0x00b6}, -{0x877f, 0x008f}, {0x8780, 0x007b}, {0x8781, 0x0027}, -{0x8782, 0x002f}, {0x8783, 0x007f}, {0x8784, 0x008f}, -{0x8785, 0x007d}, {0x8786, 0x007c}, {0x8787, 0x008f}, -{0x8788, 0x0081}, {0x8789, 0x007a}, {0x878a, 0x008f}, -{0x878b, 0x0072}, {0x878c, 0x0027}, {0x878d, 0x001b}, -{0x878e, 0x007c}, {0x878f, 0x008f}, {0x8790, 0x007d}, -{0x8791, 0x007a}, {0x8792, 0x008f}, {0x8793, 0x0075}, -{0x8794, 0x0027}, {0x8795, 0x0016}, {0x8796, 0x007c}, -{0x8797, 0x008f}, {0x8798, 0x007d}, {0x8799, 0x007a}, -{0x879a, 0x008f}, {0x879b, 0x0078}, {0x879c, 0x0027}, -{0x879d, 0x0011}, {0x879e, 0x007c}, {0x879f, 0x008f}, -{0x87a0, 0x007d}, {0x87a1, 0x007a}, {0x87a2, 0x008f}, -{0x87a3, 0x007b}, {0x87a4, 0x0027}, {0x87a5, 0x000c}, -{0x87a6, 0x007e}, {0x87a7, 0x0087}, {0x87a8, 0x0083}, -{0x87a9, 0x007a}, {0x87aa, 0x008f}, {0x87ab, 0x0075}, -{0x87ac, 0x007a}, {0x87ad, 0x008f}, {0x87ae, 0x0078}, -{0x87af, 0x007a}, {0x87b0, 0x008f}, {0x87b1, 0x007b}, -{0x87b2, 0x00ce}, {0x87b3, 0x00c1}, {0x87b4, 0x00fc}, -{0x87b5, 0x00f6}, {0x87b6, 0x008f}, {0x87b7, 0x007d}, -{0x87b8, 0x003a}, {0x87b9, 0x00a6}, {0x87ba, 0x0000}, -{0x87bb, 0x00b7}, {0x87bc, 0x0012}, {0x87bd, 0x0070}, -{0x87be, 0x00b6}, {0x87bf, 0x008f}, {0x87c0, 0x0072}, -{0x87c1, 0x0026}, {0x87c2, 0x0003}, {0x87c3, 0x007e}, -{0x87c4, 0x0087}, {0x87c5, 0x00fa}, {0x87c6, 0x00b6}, -{0x87c7, 0x008f}, {0x87c8, 0x0075}, {0x87c9, 0x0026}, -{0x87ca, 0x000a}, {0x87cb, 0x0018}, {0x87cc, 0x00ce}, -{0x87cd, 0x008f}, {0x87ce, 0x0073}, {0x87cf, 0x00bd}, -{0x87d0, 0x0089}, {0x87d1, 0x00d5}, {0x87d2, 0x007e}, -{0x87d3, 0x0087}, {0x87d4, 0x00fa}, {0x87d5, 0x00b6}, -{0x87d6, 0x008f}, {0x87d7, 0x0078}, {0x87d8, 0x0026}, -{0x87d9, 0x000a}, {0x87da, 0x0018}, {0x87db, 0x00ce}, -{0x87dc, 0x008f}, {0x87dd, 0x0076}, {0x87de, 0x00bd}, -{0x87df, 0x0089}, {0x87e0, 0x00d5}, {0x87e1, 0x007e}, -{0x87e2, 0x0087}, {0x87e3, 0x00fa}, {0x87e4, 0x00b6}, -{0x87e5, 0x008f}, {0x87e6, 0x007b}, {0x87e7, 0x0026}, -{0x87e8, 0x000a}, {0x87e9, 0x0018}, {0x87ea, 0x00ce}, -{0x87eb, 0x008f}, {0x87ec, 0x0079}, {0x87ed, 0x00bd}, -{0x87ee, 0x0089}, {0x87ef, 0x00d5}, {0x87f0, 0x007e}, -{0x87f1, 0x0087}, {0x87f2, 0x00fa}, {0x87f3, 0x0086}, -{0x87f4, 0x0005}, {0x87f5, 0x0097}, {0x87f6, 0x0040}, -{0x87f7, 0x007e}, {0x87f8, 0x0089}, {0x87f9, 0x0000}, -{0x87fa, 0x00b6}, {0x87fb, 0x008f}, {0x87fc, 0x0075}, -{0x87fd, 0x0081}, {0x87fe, 0x0007}, {0x87ff, 0x002e}, -{0x8800, 0x00f2}, {0x8801, 0x00f6}, {0x8802, 0x0012}, -{0x8803, 0x0006}, {0x8804, 0x00c4}, {0x8805, 0x00f8}, -{0x8806, 0x001b}, {0x8807, 0x00b7}, {0x8808, 0x0012}, -{0x8809, 0x0006}, {0x880a, 0x00b6}, {0x880b, 0x008f}, -{0x880c, 0x0078}, {0x880d, 0x0081}, {0x880e, 0x0007}, -{0x880f, 0x002e}, {0x8810, 0x00e2}, {0x8811, 0x0048}, -{0x8812, 0x0048}, {0x8813, 0x0048}, {0x8814, 0x00f6}, -{0x8815, 0x0012}, {0x8816, 0x0006}, {0x8817, 0x00c4}, -{0x8818, 0x00c7}, {0x8819, 0x001b}, {0x881a, 0x00b7}, -{0x881b, 0x0012}, {0x881c, 0x0006}, {0x881d, 0x00b6}, -{0x881e, 0x008f}, {0x881f, 0x007b}, {0x8820, 0x0081}, -{0x8821, 0x0007}, {0x8822, 0x002e}, {0x8823, 0x00cf}, -{0x8824, 0x00f6}, {0x8825, 0x0012}, {0x8826, 0x0005}, -{0x8827, 0x00c4}, {0x8828, 0x00f8}, {0x8829, 0x001b}, -{0x882a, 0x00b7}, {0x882b, 0x0012}, {0x882c, 0x0005}, -{0x882d, 0x0086}, {0x882e, 0x0000}, {0x882f, 0x00f6}, -{0x8830, 0x008f}, {0x8831, 0x0071}, {0x8832, 0x00bd}, -{0x8833, 0x0089}, {0x8834, 0x0094}, {0x8835, 0x0086}, -{0x8836, 0x0001}, {0x8837, 0x00f6}, {0x8838, 0x008f}, -{0x8839, 0x0074}, {0x883a, 0x00bd}, {0x883b, 0x0089}, -{0x883c, 0x0094}, {0x883d, 0x0086}, {0x883e, 0x0002}, -{0x883f, 0x00f6}, {0x8840, 0x008f}, {0x8841, 0x0077}, -{0x8842, 0x00bd}, {0x8843, 0x0089}, {0x8844, 0x0094}, -{0x8845, 0x0086}, {0x8846, 0x0003}, {0x8847, 0x00f6}, -{0x8848, 0x008f}, {0x8849, 0x007a}, {0x884a, 0x00bd}, -{0x884b, 0x0089}, {0x884c, 0x0094}, {0x884d, 0x00ce}, -{0x884e, 0x008f}, {0x884f, 0x0070}, {0x8850, 0x00a6}, -{0x8851, 0x0001}, {0x8852, 0x0081}, {0x8853, 0x0001}, -{0x8854, 0x0027}, {0x8855, 0x0007}, {0x8856, 0x0081}, -{0x8857, 0x0003}, {0x8858, 0x0027}, {0x8859, 0x0003}, -{0x885a, 0x007e}, {0x885b, 0x0088}, {0x885c, 0x0066}, -{0x885d, 0x00a6}, {0x885e, 0x0000}, {0x885f, 0x00b8}, -{0x8860, 0x008f}, {0x8861, 0x0081}, {0x8862, 0x0084}, -{0x8863, 0x0001}, {0x8864, 0x0026}, {0x8865, 0x000b}, -{0x8866, 0x008c}, {0x8867, 0x008f}, {0x8868, 0x0079}, -{0x8869, 0x002c}, {0x886a, 0x000e}, {0x886b, 0x0008}, -{0x886c, 0x0008}, {0x886d, 0x0008}, {0x886e, 0x007e}, -{0x886f, 0x0088}, {0x8870, 0x0050}, {0x8871, 0x00b6}, -{0x8872, 0x0012}, {0x8873, 0x0004}, {0x8874, 0x008a}, -{0x8875, 0x0040}, {0x8876, 0x00b7}, {0x8877, 0x0012}, -{0x8878, 0x0004}, {0x8879, 0x00b6}, {0x887a, 0x0012}, -{0x887b, 0x0004}, {0x887c, 0x0084}, {0x887d, 0x00fb}, -{0x887e, 0x0084}, {0x887f, 0x00ef}, {0x8880, 0x00b7}, -{0x8881, 0x0012}, {0x8882, 0x0004}, {0x8883, 0x00b6}, -{0x8884, 0x0012}, {0x8885, 0x0007}, {0x8886, 0x0036}, -{0x8887, 0x00b6}, {0x8888, 0x008f}, {0x8889, 0x007c}, -{0x888a, 0x0048}, {0x888b, 0x0048}, {0x888c, 0x00b7}, -{0x888d, 0x0012}, {0x888e, 0x0007}, {0x888f, 0x0086}, -{0x8890, 0x0001}, {0x8891, 0x00ba}, {0x8892, 0x0012}, -{0x8893, 0x0004}, {0x8894, 0x00b7}, {0x8895, 0x0012}, -{0x8896, 0x0004}, {0x8897, 0x0001}, {0x8898, 0x0001}, -{0x8899, 0x0001}, {0x889a, 0x0001}, {0x889b, 0x0001}, -{0x889c, 0x0001}, {0x889d, 0x0086}, {0x889e, 0x00fe}, -{0x889f, 0x00b4}, {0x88a0, 0x0012}, {0x88a1, 0x0004}, -{0x88a2, 0x00b7}, {0x88a3, 0x0012}, {0x88a4, 0x0004}, -{0x88a5, 0x0086}, {0x88a6, 0x0002}, {0x88a7, 0x00ba}, -{0x88a8, 0x0012}, {0x88a9, 0x0004}, {0x88aa, 0x00b7}, -{0x88ab, 0x0012}, {0x88ac, 0x0004}, {0x88ad, 0x0086}, -{0x88ae, 0x00fd}, {0x88af, 0x00b4}, {0x88b0, 0x0012}, -{0x88b1, 0x0004}, {0x88b2, 0x00b7}, {0x88b3, 0x0012}, -{0x88b4, 0x0004}, {0x88b5, 0x0032}, {0x88b6, 0x00b7}, -{0x88b7, 0x0012}, {0x88b8, 0x0007}, {0x88b9, 0x00b6}, -{0x88ba, 0x0012}, {0x88bb, 0x0000}, {0x88bc, 0x0084}, -{0x88bd, 0x0008}, {0x88be, 0x0081}, {0x88bf, 0x0008}, -{0x88c0, 0x0027}, {0x88c1, 0x000f}, {0x88c2, 0x007c}, -{0x88c3, 0x0082}, {0x88c4, 0x0008}, {0x88c5, 0x0026}, -{0x88c6, 0x0007}, {0x88c7, 0x0086}, {0x88c8, 0x0076}, -{0x88c9, 0x0097}, {0x88ca, 0x0040}, {0x88cb, 0x007e}, -{0x88cc, 0x0089}, {0x88cd, 0x006e}, {0x88ce, 0x007e}, -{0x88cf, 0x0086}, {0x88d0, 0x00ec}, {0x88d1, 0x00b6}, -{0x88d2, 0x008f}, {0x88d3, 0x007f}, {0x88d4, 0x0081}, -{0x88d5, 0x000f}, {0x88d6, 0x0027}, {0x88d7, 0x003c}, -{0x88d8, 0x00bd}, {0x88d9, 0x00e6}, {0x88da, 0x00c7}, -{0x88db, 0x00b7}, {0x88dc, 0x0012}, {0x88dd, 0x000d}, -{0x88de, 0x00bd}, {0x88df, 0x00e6}, {0x88e0, 0x00cb}, -{0x88e1, 0x00b6}, {0x88e2, 0x0012}, {0x88e3, 0x0004}, -{0x88e4, 0x008a}, {0x88e5, 0x0020}, {0x88e6, 0x00b7}, -{0x88e7, 0x0012}, {0x88e8, 0x0004}, {0x88e9, 0x00ce}, -{0x88ea, 0x00ff}, {0x88eb, 0x00ff}, {0x88ec, 0x00b6}, -{0x88ed, 0x0012}, {0x88ee, 0x0000}, {0x88ef, 0x0081}, -{0x88f0, 0x000c}, {0x88f1, 0x0026}, {0x88f2, 0x0005}, -{0x88f3, 0x0009}, {0x88f4, 0x0026}, {0x88f5, 0x00f6}, -{0x88f6, 0x0027}, {0x88f7, 0x001c}, {0x88f8, 0x00b6}, -{0x88f9, 0x0012}, {0x88fa, 0x0004}, {0x88fb, 0x0084}, -{0x88fc, 0x00df}, {0x88fd, 0x00b7}, {0x88fe, 0x0012}, -{0x88ff, 0x0004}, {0x8900, 0x0096}, {0x8901, 0x0083}, -{0x8902, 0x0081}, {0x8903, 0x0007}, {0x8904, 0x002c}, -{0x8905, 0x0005}, {0x8906, 0x007c}, {0x8907, 0x0000}, -{0x8908, 0x0083}, {0x8909, 0x0020}, {0x890a, 0x0006}, -{0x890b, 0x0096}, {0x890c, 0x0083}, {0x890d, 0x008b}, -{0x890e, 0x0008}, {0x890f, 0x0097}, {0x8910, 0x0083}, -{0x8911, 0x007e}, {0x8912, 0x0085}, {0x8913, 0x0041}, -{0x8914, 0x007f}, {0x8915, 0x008f}, {0x8916, 0x007e}, -{0x8917, 0x0086}, {0x8918, 0x0080}, {0x8919, 0x00b7}, -{0x891a, 0x0012}, {0x891b, 0x000c}, {0x891c, 0x0086}, -{0x891d, 0x0001}, {0x891e, 0x00b7}, {0x891f, 0x008f}, -{0x8920, 0x007d}, {0x8921, 0x00b6}, {0x8922, 0x0012}, -{0x8923, 0x000c}, {0x8924, 0x0084}, {0x8925, 0x007f}, -{0x8926, 0x00b7}, {0x8927, 0x0012}, {0x8928, 0x000c}, -{0x8929, 0x008a}, {0x892a, 0x0080}, {0x892b, 0x00b7}, -{0x892c, 0x0012}, {0x892d, 0x000c}, {0x892e, 0x0086}, -{0x892f, 0x000a}, {0x8930, 0x00bd}, {0x8931, 0x008a}, -{0x8932, 0x0006}, {0x8933, 0x00b6}, {0x8934, 0x0012}, -{0x8935, 0x000a}, {0x8936, 0x002a}, {0x8937, 0x0009}, -{0x8938, 0x00b6}, {0x8939, 0x0012}, {0x893a, 0x000c}, -{0x893b, 0x00ba}, {0x893c, 0x008f}, {0x893d, 0x007d}, -{0x893e, 0x00b7}, {0x893f, 0x0012}, {0x8940, 0x000c}, -{0x8941, 0x00b6}, {0x8942, 0x008f}, {0x8943, 0x007e}, -{0x8944, 0x0081}, {0x8945, 0x0060}, {0x8946, 0x0027}, -{0x8947, 0x001a}, {0x8948, 0x008b}, {0x8949, 0x0020}, -{0x894a, 0x00b7}, {0x894b, 0x008f}, {0x894c, 0x007e}, -{0x894d, 0x00b6}, {0x894e, 0x0012}, {0x894f, 0x000c}, -{0x8950, 0x0084}, {0x8951, 0x009f}, {0x8952, 0x00ba}, -{0x8953, 0x008f}, {0x8954, 0x007e}, {0x8955, 0x00b7}, -{0x8956, 0x0012}, {0x8957, 0x000c}, {0x8958, 0x00b6}, -{0x8959, 0x008f}, {0x895a, 0x007d}, {0x895b, 0x0048}, -{0x895c, 0x00b7}, {0x895d, 0x008f}, {0x895e, 0x007d}, -{0x895f, 0x007e}, {0x8960, 0x0089}, {0x8961, 0x0021}, -{0x8962, 0x00b6}, {0x8963, 0x0012}, {0x8964, 0x0004}, -{0x8965, 0x008a}, {0x8966, 0x0020}, {0x8967, 0x00b7}, -{0x8968, 0x0012}, {0x8969, 0x0004}, {0x896a, 0x00bd}, -{0x896b, 0x008a}, {0x896c, 0x000a}, {0x896d, 0x004f}, -{0x896e, 0x0039}, {0x896f, 0x00a6}, {0x8970, 0x0000}, -{0x8971, 0x0018}, {0x8972, 0x00a7}, {0x8973, 0x0000}, -{0x8974, 0x0008}, {0x8975, 0x0018}, {0x8976, 0x0008}, -{0x8977, 0x005a}, {0x8978, 0x0026}, {0x8979, 0x00f5}, -{0x897a, 0x0039}, {0x897b, 0x0036}, {0x897c, 0x006c}, -{0x897d, 0x0000}, {0x897e, 0x0032}, {0x897f, 0x00ba}, -{0x8980, 0x008f}, {0x8981, 0x007f}, {0x8982, 0x00b7}, -{0x8983, 0x008f}, {0x8984, 0x007f}, {0x8985, 0x00b6}, -{0x8986, 0x0012}, {0x8987, 0x0009}, {0x8988, 0x0084}, -{0x8989, 0x0003}, {0x898a, 0x00a7}, {0x898b, 0x0001}, -{0x898c, 0x00b6}, {0x898d, 0x0012}, {0x898e, 0x0006}, -{0x898f, 0x0084}, {0x8990, 0x003f}, {0x8991, 0x00a7}, -{0x8992, 0x0002}, {0x8993, 0x0039}, {0x8994, 0x0036}, -{0x8995, 0x0086}, {0x8996, 0x0003}, {0x8997, 0x00b7}, -{0x8998, 0x008f}, {0x8999, 0x0080}, {0x899a, 0x0032}, -{0x899b, 0x00c1}, {0x899c, 0x0000}, {0x899d, 0x0026}, -{0x899e, 0x0006}, {0x899f, 0x00b7}, {0x89a0, 0x008f}, -{0x89a1, 0x007c}, {0x89a2, 0x007e}, {0x89a3, 0x0089}, -{0x89a4, 0x00c9}, {0x89a5, 0x00c1}, {0x89a6, 0x0001}, -{0x89a7, 0x0027}, {0x89a8, 0x0018}, {0x89a9, 0x00c1}, -{0x89aa, 0x0002}, {0x89ab, 0x0027}, {0x89ac, 0x000c}, -{0x89ad, 0x00c1}, {0x89ae, 0x0003}, {0x89af, 0x0027}, -{0x89b0, 0x0000}, {0x89b1, 0x00f6}, {0x89b2, 0x008f}, -{0x89b3, 0x0080}, {0x89b4, 0x0005}, {0x89b5, 0x0005}, -{0x89b6, 0x00f7}, {0x89b7, 0x008f}, {0x89b8, 0x0080}, -{0x89b9, 0x00f6}, {0x89ba, 0x008f}, {0x89bb, 0x0080}, -{0x89bc, 0x0005}, {0x89bd, 0x0005}, {0x89be, 0x00f7}, -{0x89bf, 0x008f}, {0x89c0, 0x0080}, {0x89c1, 0x00f6}, -{0x89c2, 0x008f}, {0x89c3, 0x0080}, {0x89c4, 0x0005}, -{0x89c5, 0x0005}, {0x89c6, 0x00f7}, {0x89c7, 0x008f}, -{0x89c8, 0x0080}, {0x89c9, 0x00f6}, {0x89ca, 0x008f}, -{0x89cb, 0x0080}, {0x89cc, 0x0053}, {0x89cd, 0x00f4}, -{0x89ce, 0x0012}, {0x89cf, 0x0007}, {0x89d0, 0x001b}, -{0x89d1, 0x00b7}, {0x89d2, 0x0012}, {0x89d3, 0x0007}, -{0x89d4, 0x0039}, {0x89d5, 0x00ce}, {0x89d6, 0x008f}, -{0x89d7, 0x0070}, {0x89d8, 0x00a6}, {0x89d9, 0x0000}, -{0x89da, 0x0018}, {0x89db, 0x00e6}, {0x89dc, 0x0000}, -{0x89dd, 0x0018}, {0x89de, 0x00a7}, {0x89df, 0x0000}, -{0x89e0, 0x00e7}, {0x89e1, 0x0000}, {0x89e2, 0x00a6}, -{0x89e3, 0x0001}, {0x89e4, 0x0018}, {0x89e5, 0x00e6}, -{0x89e6, 0x0001}, {0x89e7, 0x0018}, {0x89e8, 0x00a7}, -{0x89e9, 0x0001}, {0x89ea, 0x00e7}, {0x89eb, 0x0001}, -{0x89ec, 0x00a6}, {0x89ed, 0x0002}, {0x89ee, 0x0018}, -{0x89ef, 0x00e6}, {0x89f0, 0x0002}, {0x89f1, 0x0018}, -{0x89f2, 0x00a7}, {0x89f3, 0x0002}, {0x89f4, 0x00e7}, -{0x89f5, 0x0002}, {0x89f6, 0x0039}, {0x89f7, 0x00a6}, -{0x89f8, 0x0000}, {0x89f9, 0x0084}, {0x89fa, 0x0007}, -{0x89fb, 0x00e6}, {0x89fc, 0x0000}, {0x89fd, 0x00c4}, -{0x89fe, 0x0038}, {0x89ff, 0x0054}, {0x8a00, 0x0054}, -{0x8a01, 0x0054}, {0x8a02, 0x001b}, {0x8a03, 0x00a7}, -{0x8a04, 0x0000}, {0x8a05, 0x0039}, {0x8a06, 0x004a}, -{0x8a07, 0x0026}, {0x8a08, 0x00fd}, {0x8a09, 0x0039}, -{0x8a0a, 0x0096}, {0x8a0b, 0x0022}, {0x8a0c, 0x0084}, -{0x8a0d, 0x000f}, {0x8a0e, 0x0097}, {0x8a0f, 0x0022}, -{0x8a10, 0x0086}, {0x8a11, 0x0001}, {0x8a12, 0x00b7}, -{0x8a13, 0x008f}, {0x8a14, 0x0070}, {0x8a15, 0x00b6}, -{0x8a16, 0x0012}, {0x8a17, 0x0007}, {0x8a18, 0x00b7}, -{0x8a19, 0x008f}, {0x8a1a, 0x0071}, {0x8a1b, 0x00f6}, -{0x8a1c, 0x0012}, {0x8a1d, 0x000c}, {0x8a1e, 0x00c4}, -{0x8a1f, 0x000f}, {0x8a20, 0x00c8}, {0x8a21, 0x000f}, -{0x8a22, 0x00f7}, {0x8a23, 0x008f}, {0x8a24, 0x0072}, -{0x8a25, 0x00f6}, {0x8a26, 0x008f}, {0x8a27, 0x0072}, -{0x8a28, 0x00b6}, {0x8a29, 0x008f}, {0x8a2a, 0x0071}, -{0x8a2b, 0x0084}, {0x8a2c, 0x0003}, {0x8a2d, 0x0027}, -{0x8a2e, 0x0014}, {0x8a2f, 0x0081}, {0x8a30, 0x0001}, -{0x8a31, 0x0027}, {0x8a32, 0x001c}, {0x8a33, 0x0081}, -{0x8a34, 0x0002}, {0x8a35, 0x0027}, {0x8a36, 0x0024}, -{0x8a37, 0x00f4}, {0x8a38, 0x008f}, {0x8a39, 0x0070}, -{0x8a3a, 0x0027}, {0x8a3b, 0x002a}, {0x8a3c, 0x0096}, -{0x8a3d, 0x0022}, {0x8a3e, 0x008a}, {0x8a3f, 0x0080}, -{0x8a40, 0x007e}, {0x8a41, 0x008a}, {0x8a42, 0x0064}, -{0x8a43, 0x00f4}, {0x8a44, 0x008f}, {0x8a45, 0x0070}, -{0x8a46, 0x0027}, {0x8a47, 0x001e}, {0x8a48, 0x0096}, -{0x8a49, 0x0022}, {0x8a4a, 0x008a}, {0x8a4b, 0x0010}, -{0x8a4c, 0x007e}, {0x8a4d, 0x008a}, {0x8a4e, 0x0064}, -{0x8a4f, 0x00f4}, {0x8a50, 0x008f}, {0x8a51, 0x0070}, -{0x8a52, 0x0027}, {0x8a53, 0x0012}, {0x8a54, 0x0096}, -{0x8a55, 0x0022}, {0x8a56, 0x008a}, {0x8a57, 0x0020}, -{0x8a58, 0x007e}, {0x8a59, 0x008a}, {0x8a5a, 0x0064}, -{0x8a5b, 0x00f4}, {0x8a5c, 0x008f}, {0x8a5d, 0x0070}, -{0x8a5e, 0x0027}, {0x8a5f, 0x0006}, {0x8a60, 0x0096}, -{0x8a61, 0x0022}, {0x8a62, 0x008a}, {0x8a63, 0x0040}, -{0x8a64, 0x0097}, {0x8a65, 0x0022}, {0x8a66, 0x0074}, -{0x8a67, 0x008f}, {0x8a68, 0x0071}, {0x8a69, 0x0074}, -{0x8a6a, 0x008f}, {0x8a6b, 0x0071}, {0x8a6c, 0x0078}, -{0x8a6d, 0x008f}, {0x8a6e, 0x0070}, {0x8a6f, 0x00b6}, -{0x8a70, 0x008f}, {0x8a71, 0x0070}, {0x8a72, 0x0085}, -{0x8a73, 0x0010}, {0x8a74, 0x0027}, {0x8a75, 0x00af}, -{0x8a76, 0x00d6}, {0x8a77, 0x0022}, {0x8a78, 0x00c4}, -{0x8a79, 0x0010}, {0x8a7a, 0x0058}, {0x8a7b, 0x00b6}, -{0x8a7c, 0x0012}, {0x8a7d, 0x0070}, {0x8a7e, 0x0081}, -{0x8a7f, 0x00e4}, {0x8a80, 0x0027}, {0x8a81, 0x0036}, -{0x8a82, 0x0081}, {0x8a83, 0x00e1}, {0x8a84, 0x0026}, -{0x8a85, 0x000c}, {0x8a86, 0x0096}, {0x8a87, 0x0022}, -{0x8a88, 0x0084}, {0x8a89, 0x0020}, {0x8a8a, 0x0044}, -{0x8a8b, 0x001b}, {0x8a8c, 0x00d6}, {0x8a8d, 0x0022}, -{0x8a8e, 0x00c4}, {0x8a8f, 0x00cf}, {0x8a90, 0x0020}, -{0x8a91, 0x0023}, {0x8a92, 0x0058}, {0x8a93, 0x0081}, -{0x8a94, 0x00c6}, {0x8a95, 0x0026}, {0x8a96, 0x000d}, -{0x8a97, 0x0096}, {0x8a98, 0x0022}, {0x8a99, 0x0084}, -{0x8a9a, 0x0040}, {0x8a9b, 0x0044}, {0x8a9c, 0x0044}, -{0x8a9d, 0x001b}, {0x8a9e, 0x00d6}, {0x8a9f, 0x0022}, -{0x8aa0, 0x00c4}, {0x8aa1, 0x00af}, {0x8aa2, 0x0020}, -{0x8aa3, 0x0011}, {0x8aa4, 0x0058}, {0x8aa5, 0x0081}, -{0x8aa6, 0x0027}, {0x8aa7, 0x0026}, {0x8aa8, 0x000f}, -{0x8aa9, 0x0096}, {0x8aaa, 0x0022}, {0x8aab, 0x0084}, -{0x8aac, 0x0080}, {0x8aad, 0x0044}, {0x8aae, 0x0044}, -{0x8aaf, 0x0044}, {0x8ab0, 0x001b}, {0x8ab1, 0x00d6}, -{0x8ab2, 0x0022}, {0x8ab3, 0x00c4}, {0x8ab4, 0x006f}, -{0x8ab5, 0x001b}, {0x8ab6, 0x0097}, {0x8ab7, 0x0022}, -{0x8ab8, 0x0039}, {0x8ab9, 0x0027}, {0x8aba, 0x000c}, -{0x8abb, 0x007c}, {0x8abc, 0x0082}, {0x8abd, 0x0006}, -{0x8abe, 0x00bd}, {0x8abf, 0x00d9}, {0x8ac0, 0x00ed}, -{0x8ac1, 0x00b6}, {0x8ac2, 0x0082}, {0x8ac3, 0x0007}, -{0x8ac4, 0x007e}, {0x8ac5, 0x008a}, {0x8ac6, 0x00b9}, -{0x8ac7, 0x007f}, {0x8ac8, 0x0082}, {0x8ac9, 0x0006}, -{0x8aca, 0x0039}, { 0x0, 0x0 } -}; -#else -cas_saturn_patch_t cas_saturn_patch[] = { -{0x8200, 0x007e}, {0x8201, 0x0082}, {0x8202, 0x0009}, -{0x8203, 0x0000}, {0x8204, 0x0000}, {0x8205, 0x0000}, -{0x8206, 0x0000}, {0x8207, 0x0000}, {0x8208, 0x0000}, -{0x8209, 0x008e}, {0x820a, 0x008e}, {0x820b, 0x00ff}, -{0x820c, 0x00ce}, {0x820d, 0x0082}, {0x820e, 0x0025}, -{0x820f, 0x00ff}, {0x8210, 0x0001}, {0x8211, 0x000f}, -{0x8212, 0x00ce}, {0x8213, 0x0084}, {0x8214, 0x0026}, -{0x8215, 0x00ff}, {0x8216, 0x0001}, {0x8217, 0x0011}, -{0x8218, 0x00ce}, {0x8219, 0x0085}, {0x821a, 0x003d}, -{0x821b, 0x00df}, {0x821c, 0x00e5}, {0x821d, 0x0086}, -{0x821e, 0x0039}, {0x821f, 0x00b7}, {0x8220, 0x008f}, -{0x8221, 0x00f8}, {0x8222, 0x007e}, {0x8223, 0x00c3}, -{0x8224, 0x00c2}, {0x8225, 0x0096}, {0x8226, 0x0047}, -{0x8227, 0x0084}, {0x8228, 0x00f3}, {0x8229, 0x008a}, -{0x822a, 0x0000}, {0x822b, 0x0097}, {0x822c, 0x0047}, -{0x822d, 0x00ce}, {0x822e, 0x0082}, {0x822f, 0x0033}, -{0x8230, 0x00ff}, {0x8231, 0x0001}, {0x8232, 0x000f}, -{0x8233, 0x0096}, {0x8234, 0x0046}, {0x8235, 0x0084}, -{0x8236, 0x000c}, {0x8237, 0x0081}, {0x8238, 0x0004}, -{0x8239, 0x0027}, {0x823a, 0x000b}, {0x823b, 0x0096}, -{0x823c, 0x0046}, {0x823d, 0x0084}, {0x823e, 0x000c}, -{0x823f, 0x0081}, {0x8240, 0x0008}, {0x8241, 0x0027}, -{0x8242, 0x0057}, {0x8243, 0x007e}, {0x8244, 0x0084}, -{0x8245, 0x0025}, {0x8246, 0x0096}, {0x8247, 0x0047}, -{0x8248, 0x0084}, {0x8249, 0x00f3}, {0x824a, 0x008a}, -{0x824b, 0x0004}, {0x824c, 0x0097}, {0x824d, 0x0047}, -{0x824e, 0x00ce}, {0x824f, 0x0082}, {0x8250, 0x0054}, -{0x8251, 0x00ff}, {0x8252, 0x0001}, {0x8253, 0x000f}, -{0x8254, 0x0096}, {0x8255, 0x0046}, {0x8256, 0x0084}, -{0x8257, 0x000c}, {0x8258, 0x0081}, {0x8259, 0x0004}, -{0x825a, 0x0026}, {0x825b, 0x0038}, {0x825c, 0x00b6}, -{0x825d, 0x0012}, {0x825e, 0x0020}, {0x825f, 0x0084}, -{0x8260, 0x0020}, {0x8261, 0x0026}, {0x8262, 0x0003}, -{0x8263, 0x007e}, {0x8264, 0x0084}, {0x8265, 0x0025}, -{0x8266, 0x0096}, {0x8267, 0x007b}, {0x8268, 0x00d6}, -{0x8269, 0x007c}, {0x826a, 0x00fe}, {0x826b, 0x008f}, -{0x826c, 0x0056}, {0x826d, 0x00bd}, {0x826e, 0x00f7}, -{0x826f, 0x00b6}, {0x8270, 0x00fe}, {0x8271, 0x008f}, -{0x8272, 0x004e}, {0x8273, 0x00bd}, {0x8274, 0x00ec}, -{0x8275, 0x008e}, {0x8276, 0x00bd}, {0x8277, 0x00fa}, -{0x8278, 0x00f7}, {0x8279, 0x00bd}, {0x827a, 0x00f7}, -{0x827b, 0x0028}, {0x827c, 0x00ce}, {0x827d, 0x0082}, -{0x827e, 0x0082}, {0x827f, 0x00ff}, {0x8280, 0x0001}, -{0x8281, 0x000f}, {0x8282, 0x0096}, {0x8283, 0x0046}, -{0x8284, 0x0084}, {0x8285, 0x000c}, {0x8286, 0x0081}, -{0x8287, 0x0004}, {0x8288, 0x0026}, {0x8289, 0x000a}, -{0x828a, 0x00b6}, {0x828b, 0x0012}, {0x828c, 0x0020}, -{0x828d, 0x0084}, {0x828e, 0x0020}, {0x828f, 0x0027}, -{0x8290, 0x00b5}, {0x8291, 0x007e}, {0x8292, 0x0084}, -{0x8293, 0x0025}, {0x8294, 0x00bd}, {0x8295, 0x00f7}, -{0x8296, 0x001f}, {0x8297, 0x007e}, {0x8298, 0x0084}, -{0x8299, 0x001f}, {0x829a, 0x0096}, {0x829b, 0x0047}, -{0x829c, 0x0084}, {0x829d, 0x00f3}, {0x829e, 0x008a}, -{0x829f, 0x0008}, {0x82a0, 0x0097}, {0x82a1, 0x0047}, -{0x82a2, 0x00de}, {0x82a3, 0x00e1}, {0x82a4, 0x00ad}, -{0x82a5, 0x0000}, {0x82a6, 0x00ce}, {0x82a7, 0x0082}, -{0x82a8, 0x00af}, {0x82a9, 0x00ff}, {0x82aa, 0x0001}, -{0x82ab, 0x000f}, {0x82ac, 0x007e}, {0x82ad, 0x0084}, -{0x82ae, 0x0025}, {0x82af, 0x0096}, {0x82b0, 0x0041}, -{0x82b1, 0x0085}, {0x82b2, 0x0010}, {0x82b3, 0x0026}, -{0x82b4, 0x0006}, {0x82b5, 0x0096}, {0x82b6, 0x0023}, -{0x82b7, 0x0085}, {0x82b8, 0x0040}, {0x82b9, 0x0027}, -{0x82ba, 0x0006}, {0x82bb, 0x00bd}, {0x82bc, 0x00ed}, -{0x82bd, 0x0000}, {0x82be, 0x007e}, {0x82bf, 0x0083}, -{0x82c0, 0x00a2}, {0x82c1, 0x00de}, {0x82c2, 0x0042}, -{0x82c3, 0x00bd}, {0x82c4, 0x00eb}, {0x82c5, 0x008e}, -{0x82c6, 0x0096}, {0x82c7, 0x0024}, {0x82c8, 0x0084}, -{0x82c9, 0x0008}, {0x82ca, 0x0027}, {0x82cb, 0x0003}, -{0x82cc, 0x007e}, {0x82cd, 0x0083}, {0x82ce, 0x00df}, -{0x82cf, 0x0096}, {0x82d0, 0x007b}, {0x82d1, 0x00d6}, -{0x82d2, 0x007c}, {0x82d3, 0x00fe}, {0x82d4, 0x008f}, -{0x82d5, 0x0056}, {0x82d6, 0x00bd}, {0x82d7, 0x00f7}, -{0x82d8, 0x00b6}, {0x82d9, 0x00fe}, {0x82da, 0x008f}, -{0x82db, 0x0050}, {0x82dc, 0x00bd}, {0x82dd, 0x00ec}, -{0x82de, 0x008e}, {0x82df, 0x00bd}, {0x82e0, 0x00fa}, -{0x82e1, 0x00f7}, {0x82e2, 0x0086}, {0x82e3, 0x0011}, -{0x82e4, 0x00c6}, {0x82e5, 0x0049}, {0x82e6, 0x00bd}, -{0x82e7, 0x00e4}, {0x82e8, 0x0012}, {0x82e9, 0x00ce}, -{0x82ea, 0x0082}, {0x82eb, 0x00ef}, {0x82ec, 0x00ff}, -{0x82ed, 0x0001}, {0x82ee, 0x000f}, {0x82ef, 0x0096}, -{0x82f0, 0x0046}, {0x82f1, 0x0084}, {0x82f2, 0x000c}, -{0x82f3, 0x0081}, {0x82f4, 0x0000}, {0x82f5, 0x0027}, -{0x82f6, 0x0017}, {0x82f7, 0x00c6}, {0x82f8, 0x0049}, -{0x82f9, 0x00bd}, {0x82fa, 0x00e4}, {0x82fb, 0x0091}, -{0x82fc, 0x0024}, {0x82fd, 0x000d}, {0x82fe, 0x00b6}, -{0x82ff, 0x0012}, {0x8300, 0x0020}, {0x8301, 0x0085}, -{0x8302, 0x0020}, {0x8303, 0x0026}, {0x8304, 0x000c}, -{0x8305, 0x00ce}, {0x8306, 0x0082}, {0x8307, 0x00c1}, -{0x8308, 0x00ff}, {0x8309, 0x0001}, {0x830a, 0x000f}, -{0x830b, 0x007e}, {0x830c, 0x0084}, {0x830d, 0x0025}, -{0x830e, 0x007e}, {0x830f, 0x0084}, {0x8310, 0x0016}, -{0x8311, 0x00fe}, {0x8312, 0x008f}, {0x8313, 0x0052}, -{0x8314, 0x00bd}, {0x8315, 0x00ec}, {0x8316, 0x008e}, -{0x8317, 0x00bd}, {0x8318, 0x00fa}, {0x8319, 0x00f7}, -{0x831a, 0x0086}, {0x831b, 0x006a}, {0x831c, 0x00c6}, -{0x831d, 0x0049}, {0x831e, 0x00bd}, {0x831f, 0x00e4}, -{0x8320, 0x0012}, {0x8321, 0x00ce}, {0x8322, 0x0083}, -{0x8323, 0x0027}, {0x8324, 0x00ff}, {0x8325, 0x0001}, -{0x8326, 0x000f}, {0x8327, 0x0096}, {0x8328, 0x0046}, -{0x8329, 0x0084}, {0x832a, 0x000c}, {0x832b, 0x0081}, -{0x832c, 0x0000}, {0x832d, 0x0027}, {0x832e, 0x000a}, -{0x832f, 0x00c6}, {0x8330, 0x0049}, {0x8331, 0x00bd}, -{0x8332, 0x00e4}, {0x8333, 0x0091}, {0x8334, 0x0025}, -{0x8335, 0x0006}, {0x8336, 0x007e}, {0x8337, 0x0084}, -{0x8338, 0x0025}, {0x8339, 0x007e}, {0x833a, 0x0084}, -{0x833b, 0x0016}, {0x833c, 0x00b6}, {0x833d, 0x0018}, -{0x833e, 0x0070}, {0x833f, 0x00bb}, {0x8340, 0x0019}, -{0x8341, 0x0070}, {0x8342, 0x002a}, {0x8343, 0x0004}, -{0x8344, 0x0081}, {0x8345, 0x00af}, {0x8346, 0x002e}, -{0x8347, 0x0019}, {0x8348, 0x0096}, {0x8349, 0x007b}, -{0x834a, 0x00f6}, {0x834b, 0x0020}, {0x834c, 0x0007}, -{0x834d, 0x00fa}, {0x834e, 0x0020}, {0x834f, 0x0027}, -{0x8350, 0x00c4}, {0x8351, 0x0038}, {0x8352, 0x0081}, -{0x8353, 0x0038}, {0x8354, 0x0027}, {0x8355, 0x000b}, -{0x8356, 0x00f6}, {0x8357, 0x0020}, {0x8358, 0x0007}, -{0x8359, 0x00fa}, {0x835a, 0x0020}, {0x835b, 0x0027}, -{0x835c, 0x00cb}, {0x835d, 0x0008}, {0x835e, 0x007e}, -{0x835f, 0x0082}, {0x8360, 0x00d3}, {0x8361, 0x00bd}, -{0x8362, 0x00f7}, {0x8363, 0x0066}, {0x8364, 0x0086}, -{0x8365, 0x0074}, {0x8366, 0x00c6}, {0x8367, 0x0049}, -{0x8368, 0x00bd}, {0x8369, 0x00e4}, {0x836a, 0x0012}, -{0x836b, 0x00ce}, {0x836c, 0x0083}, {0x836d, 0x0071}, -{0x836e, 0x00ff}, {0x836f, 0x0001}, {0x8370, 0x000f}, -{0x8371, 0x0096}, {0x8372, 0x0046}, {0x8373, 0x0084}, -{0x8374, 0x000c}, {0x8375, 0x0081}, {0x8376, 0x0008}, -{0x8377, 0x0026}, {0x8378, 0x000a}, {0x8379, 0x00c6}, -{0x837a, 0x0049}, {0x837b, 0x00bd}, {0x837c, 0x00e4}, -{0x837d, 0x0091}, {0x837e, 0x0025}, {0x837f, 0x0006}, -{0x8380, 0x007e}, {0x8381, 0x0084}, {0x8382, 0x0025}, -{0x8383, 0x007e}, {0x8384, 0x0084}, {0x8385, 0x0016}, -{0x8386, 0x00bd}, {0x8387, 0x00f7}, {0x8388, 0x003e}, -{0x8389, 0x0026}, {0x838a, 0x000e}, {0x838b, 0x00bd}, -{0x838c, 0x00e5}, {0x838d, 0x0009}, {0x838e, 0x0026}, -{0x838f, 0x0006}, {0x8390, 0x00ce}, {0x8391, 0x0082}, -{0x8392, 0x00c1}, {0x8393, 0x00ff}, {0x8394, 0x0001}, -{0x8395, 0x000f}, {0x8396, 0x007e}, {0x8397, 0x0084}, -{0x8398, 0x0025}, {0x8399, 0x00fe}, {0x839a, 0x008f}, -{0x839b, 0x0054}, {0x839c, 0x00bd}, {0x839d, 0x00ec}, -{0x839e, 0x008e}, {0x839f, 0x00bd}, {0x83a0, 0x00fa}, -{0x83a1, 0x00f7}, {0x83a2, 0x00bd}, {0x83a3, 0x00f7}, -{0x83a4, 0x0033}, {0x83a5, 0x0086}, {0x83a6, 0x000f}, -{0x83a7, 0x00c6}, {0x83a8, 0x0051}, {0x83a9, 0x00bd}, -{0x83aa, 0x00e4}, {0x83ab, 0x0012}, {0x83ac, 0x00ce}, -{0x83ad, 0x0083}, {0x83ae, 0x00b2}, {0x83af, 0x00ff}, -{0x83b0, 0x0001}, {0x83b1, 0x000f}, {0x83b2, 0x0096}, -{0x83b3, 0x0046}, {0x83b4, 0x0084}, {0x83b5, 0x000c}, -{0x83b6, 0x0081}, {0x83b7, 0x0008}, {0x83b8, 0x0026}, -{0x83b9, 0x005c}, {0x83ba, 0x00b6}, {0x83bb, 0x0012}, -{0x83bc, 0x0020}, {0x83bd, 0x0084}, {0x83be, 0x003f}, -{0x83bf, 0x0081}, {0x83c0, 0x003a}, {0x83c1, 0x0027}, -{0x83c2, 0x001c}, {0x83c3, 0x0096}, {0x83c4, 0x0023}, -{0x83c5, 0x0085}, {0x83c6, 0x0040}, {0x83c7, 0x0027}, -{0x83c8, 0x0003}, {0x83c9, 0x007e}, {0x83ca, 0x0084}, -{0x83cb, 0x0025}, {0x83cc, 0x00c6}, {0x83cd, 0x0051}, -{0x83ce, 0x00bd}, {0x83cf, 0x00e4}, {0x83d0, 0x0091}, -{0x83d1, 0x0025}, {0x83d2, 0x0003}, {0x83d3, 0x007e}, -{0x83d4, 0x0084}, {0x83d5, 0x0025}, {0x83d6, 0x00ce}, -{0x83d7, 0x0082}, {0x83d8, 0x00c1}, {0x83d9, 0x00ff}, -{0x83da, 0x0001}, {0x83db, 0x000f}, {0x83dc, 0x007e}, -{0x83dd, 0x0084}, {0x83de, 0x0025}, {0x83df, 0x00bd}, -{0x83e0, 0x00f8}, {0x83e1, 0x0037}, {0x83e2, 0x007c}, -{0x83e3, 0x0000}, {0x83e4, 0x007a}, {0x83e5, 0x00ce}, -{0x83e6, 0x0083}, {0x83e7, 0x00ee}, {0x83e8, 0x00ff}, -{0x83e9, 0x0001}, {0x83ea, 0x000f}, {0x83eb, 0x007e}, -{0x83ec, 0x0084}, {0x83ed, 0x0025}, {0x83ee, 0x0096}, -{0x83ef, 0x0046}, {0x83f0, 0x0084}, {0x83f1, 0x000c}, -{0x83f2, 0x0081}, {0x83f3, 0x0008}, {0x83f4, 0x0026}, -{0x83f5, 0x0020}, {0x83f6, 0x0096}, {0x83f7, 0x0024}, -{0x83f8, 0x0084}, {0x83f9, 0x0008}, {0x83fa, 0x0026}, -{0x83fb, 0x0029}, {0x83fc, 0x00b6}, {0x83fd, 0x0018}, -{0x83fe, 0x0082}, {0x83ff, 0x00bb}, {0x8400, 0x0019}, -{0x8401, 0x0082}, {0x8402, 0x00b1}, {0x8403, 0x0001}, -{0x8404, 0x003b}, {0x8405, 0x0022}, {0x8406, 0x0009}, -{0x8407, 0x00b6}, {0x8408, 0x0012}, {0x8409, 0x0020}, -{0x840a, 0x0084}, {0x840b, 0x0037}, {0x840c, 0x0081}, -{0x840d, 0x0032}, {0x840e, 0x0027}, {0x840f, 0x0015}, -{0x8410, 0x00bd}, {0x8411, 0x00f8}, {0x8412, 0x0044}, -{0x8413, 0x007e}, {0x8414, 0x0082}, {0x8415, 0x00c1}, -{0x8416, 0x00bd}, {0x8417, 0x00f7}, {0x8418, 0x001f}, -{0x8419, 0x00bd}, {0x841a, 0x00f8}, {0x841b, 0x0044}, -{0x841c, 0x00bd}, {0x841d, 0x00fc}, {0x841e, 0x0029}, -{0x841f, 0x00ce}, {0x8420, 0x0082}, {0x8421, 0x0025}, -{0x8422, 0x00ff}, {0x8423, 0x0001}, {0x8424, 0x000f}, -{0x8425, 0x0039}, {0x8426, 0x0096}, {0x8427, 0x0047}, -{0x8428, 0x0084}, {0x8429, 0x00fc}, {0x842a, 0x008a}, -{0x842b, 0x0000}, {0x842c, 0x0097}, {0x842d, 0x0047}, -{0x842e, 0x00ce}, {0x842f, 0x0084}, {0x8430, 0x0034}, -{0x8431, 0x00ff}, {0x8432, 0x0001}, {0x8433, 0x0011}, -{0x8434, 0x0096}, {0x8435, 0x0046}, {0x8436, 0x0084}, -{0x8437, 0x0003}, {0x8438, 0x0081}, {0x8439, 0x0002}, -{0x843a, 0x0027}, {0x843b, 0x0003}, {0x843c, 0x007e}, -{0x843d, 0x0085}, {0x843e, 0x001e}, {0x843f, 0x0096}, -{0x8440, 0x0047}, {0x8441, 0x0084}, {0x8442, 0x00fc}, -{0x8443, 0x008a}, {0x8444, 0x0002}, {0x8445, 0x0097}, -{0x8446, 0x0047}, {0x8447, 0x00de}, {0x8448, 0x00e1}, -{0x8449, 0x00ad}, {0x844a, 0x0000}, {0x844b, 0x0086}, -{0x844c, 0x0001}, {0x844d, 0x00b7}, {0x844e, 0x0012}, -{0x844f, 0x0051}, {0x8450, 0x00bd}, {0x8451, 0x00f7}, -{0x8452, 0x0014}, {0x8453, 0x00b6}, {0x8454, 0x0010}, -{0x8455, 0x0031}, {0x8456, 0x0084}, {0x8457, 0x00fd}, -{0x8458, 0x00b7}, {0x8459, 0x0010}, {0x845a, 0x0031}, -{0x845b, 0x00bd}, {0x845c, 0x00f8}, {0x845d, 0x001e}, -{0x845e, 0x0096}, {0x845f, 0x0081}, {0x8460, 0x00d6}, -{0x8461, 0x0082}, {0x8462, 0x00fe}, {0x8463, 0x008f}, -{0x8464, 0x005a}, {0x8465, 0x00bd}, {0x8466, 0x00f7}, -{0x8467, 0x00b6}, {0x8468, 0x00fe}, {0x8469, 0x008f}, -{0x846a, 0x005c}, {0x846b, 0x00bd}, {0x846c, 0x00ec}, -{0x846d, 0x008e}, {0x846e, 0x00bd}, {0x846f, 0x00fa}, -{0x8470, 0x00f7}, {0x8471, 0x0086}, {0x8472, 0x0008}, -{0x8473, 0x00d6}, {0x8474, 0x0000}, {0x8475, 0x00c5}, -{0x8476, 0x0010}, {0x8477, 0x0026}, {0x8478, 0x0002}, -{0x8479, 0x008b}, {0x847a, 0x0020}, {0x847b, 0x00c6}, -{0x847c, 0x0051}, {0x847d, 0x00bd}, {0x847e, 0x00e4}, -{0x847f, 0x0012}, {0x8480, 0x00ce}, {0x8481, 0x0084}, -{0x8482, 0x0086}, {0x8483, 0x00ff}, {0x8484, 0x0001}, -{0x8485, 0x0011}, {0x8486, 0x0096}, {0x8487, 0x0046}, -{0x8488, 0x0084}, {0x8489, 0x0003}, {0x848a, 0x0081}, -{0x848b, 0x0002}, {0x848c, 0x0027}, {0x848d, 0x0003}, -{0x848e, 0x007e}, {0x848f, 0x0085}, {0x8490, 0x000f}, -{0x8491, 0x00c6}, {0x8492, 0x0051}, {0x8493, 0x00bd}, -{0x8494, 0x00e4}, {0x8495, 0x0091}, {0x8496, 0x0025}, -{0x8497, 0x0003}, {0x8498, 0x007e}, {0x8499, 0x0085}, -{0x849a, 0x001e}, {0x849b, 0x0096}, {0x849c, 0x0044}, -{0x849d, 0x0085}, {0x849e, 0x0010}, {0x849f, 0x0026}, -{0x84a0, 0x000a}, {0x84a1, 0x00b6}, {0x84a2, 0x0012}, -{0x84a3, 0x0050}, {0x84a4, 0x00ba}, {0x84a5, 0x0001}, -{0x84a6, 0x003c}, {0x84a7, 0x0085}, {0x84a8, 0x0010}, -{0x84a9, 0x0027}, {0x84aa, 0x00a8}, {0x84ab, 0x00bd}, -{0x84ac, 0x00f7}, {0x84ad, 0x0066}, {0x84ae, 0x00ce}, -{0x84af, 0x0084}, {0x84b0, 0x00b7}, {0x84b1, 0x00ff}, -{0x84b2, 0x0001}, {0x84b3, 0x0011}, {0x84b4, 0x007e}, -{0x84b5, 0x0085}, {0x84b6, 0x001e}, {0x84b7, 0x0096}, -{0x84b8, 0x0046}, {0x84b9, 0x0084}, {0x84ba, 0x0003}, -{0x84bb, 0x0081}, {0x84bc, 0x0002}, {0x84bd, 0x0026}, -{0x84be, 0x0050}, {0x84bf, 0x00b6}, {0x84c0, 0x0012}, -{0x84c1, 0x0030}, {0x84c2, 0x0084}, {0x84c3, 0x0003}, -{0x84c4, 0x0081}, {0x84c5, 0x0001}, {0x84c6, 0x0027}, -{0x84c7, 0x0003}, {0x84c8, 0x007e}, {0x84c9, 0x0085}, -{0x84ca, 0x001e}, {0x84cb, 0x0096}, {0x84cc, 0x0044}, -{0x84cd, 0x0085}, {0x84ce, 0x0010}, {0x84cf, 0x0026}, -{0x84d0, 0x0013}, {0x84d1, 0x00b6}, {0x84d2, 0x0012}, -{0x84d3, 0x0050}, {0x84d4, 0x00ba}, {0x84d5, 0x0001}, -{0x84d6, 0x003c}, {0x84d7, 0x0085}, {0x84d8, 0x0010}, -{0x84d9, 0x0026}, {0x84da, 0x0009}, {0x84db, 0x00ce}, -{0x84dc, 0x0084}, {0x84dd, 0x0053}, {0x84de, 0x00ff}, -{0x84df, 0x0001}, {0x84e0, 0x0011}, {0x84e1, 0x007e}, -{0x84e2, 0x0085}, {0x84e3, 0x001e}, {0x84e4, 0x00b6}, -{0x84e5, 0x0010}, {0x84e6, 0x0031}, {0x84e7, 0x008a}, -{0x84e8, 0x0002}, {0x84e9, 0x00b7}, {0x84ea, 0x0010}, -{0x84eb, 0x0031}, {0x84ec, 0x00bd}, {0x84ed, 0x0085}, -{0x84ee, 0x001f}, {0x84ef, 0x00bd}, {0x84f0, 0x00f8}, -{0x84f1, 0x0037}, {0x84f2, 0x007c}, {0x84f3, 0x0000}, -{0x84f4, 0x0080}, {0x84f5, 0x00ce}, {0x84f6, 0x0084}, -{0x84f7, 0x00fe}, {0x84f8, 0x00ff}, {0x84f9, 0x0001}, -{0x84fa, 0x0011}, {0x84fb, 0x007e}, {0x84fc, 0x0085}, -{0x84fd, 0x001e}, {0x84fe, 0x0096}, {0x84ff, 0x0046}, -{0x8500, 0x0084}, {0x8501, 0x0003}, {0x8502, 0x0081}, -{0x8503, 0x0002}, {0x8504, 0x0026}, {0x8505, 0x0009}, -{0x8506, 0x00b6}, {0x8507, 0x0012}, {0x8508, 0x0030}, -{0x8509, 0x0084}, {0x850a, 0x0003}, {0x850b, 0x0081}, -{0x850c, 0x0001}, {0x850d, 0x0027}, {0x850e, 0x000f}, -{0x850f, 0x00bd}, {0x8510, 0x00f8}, {0x8511, 0x0044}, -{0x8512, 0x00bd}, {0x8513, 0x00f7}, {0x8514, 0x000b}, -{0x8515, 0x00bd}, {0x8516, 0x00fc}, {0x8517, 0x0029}, -{0x8518, 0x00ce}, {0x8519, 0x0084}, {0x851a, 0x0026}, -{0x851b, 0x00ff}, {0x851c, 0x0001}, {0x851d, 0x0011}, -{0x851e, 0x0039}, {0x851f, 0x00d6}, {0x8520, 0x0022}, -{0x8521, 0x00c4}, {0x8522, 0x000f}, {0x8523, 0x00b6}, -{0x8524, 0x0012}, {0x8525, 0x0030}, {0x8526, 0x00ba}, -{0x8527, 0x0012}, {0x8528, 0x0032}, {0x8529, 0x0084}, -{0x852a, 0x0004}, {0x852b, 0x0027}, {0x852c, 0x000d}, -{0x852d, 0x0096}, {0x852e, 0x0022}, {0x852f, 0x0085}, -{0x8530, 0x0004}, {0x8531, 0x0027}, {0x8532, 0x0005}, -{0x8533, 0x00ca}, {0x8534, 0x0010}, {0x8535, 0x007e}, -{0x8536, 0x0085}, {0x8537, 0x003a}, {0x8538, 0x00ca}, -{0x8539, 0x0020}, {0x853a, 0x00d7}, {0x853b, 0x0022}, -{0x853c, 0x0039}, {0x853d, 0x0086}, {0x853e, 0x0000}, -{0x853f, 0x0097}, {0x8540, 0x0083}, {0x8541, 0x0018}, -{0x8542, 0x00ce}, {0x8543, 0x001c}, {0x8544, 0x0000}, -{0x8545, 0x00bd}, {0x8546, 0x00eb}, {0x8547, 0x0046}, -{0x8548, 0x0096}, {0x8549, 0x0057}, {0x854a, 0x0085}, -{0x854b, 0x0001}, {0x854c, 0x0027}, {0x854d, 0x0002}, -{0x854e, 0x004f}, {0x854f, 0x0039}, {0x8550, 0x0085}, -{0x8551, 0x0002}, {0x8552, 0x0027}, {0x8553, 0x0001}, -{0x8554, 0x0039}, {0x8555, 0x007f}, {0x8556, 0x008f}, -{0x8557, 0x007d}, {0x8558, 0x0086}, {0x8559, 0x0004}, -{0x855a, 0x00b7}, {0x855b, 0x0012}, {0x855c, 0x0004}, -{0x855d, 0x0086}, {0x855e, 0x0008}, {0x855f, 0x00b7}, -{0x8560, 0x0012}, {0x8561, 0x0007}, {0x8562, 0x0086}, -{0x8563, 0x0010}, {0x8564, 0x00b7}, {0x8565, 0x0012}, -{0x8566, 0x000c}, {0x8567, 0x0086}, {0x8568, 0x0007}, -{0x8569, 0x00b7}, {0x856a, 0x0012}, {0x856b, 0x0006}, -{0x856c, 0x00b6}, {0x856d, 0x008f}, {0x856e, 0x007d}, -{0x856f, 0x00b7}, {0x8570, 0x0012}, {0x8571, 0x0070}, -{0x8572, 0x0086}, {0x8573, 0x0001}, {0x8574, 0x00ba}, -{0x8575, 0x0012}, {0x8576, 0x0004}, {0x8577, 0x00b7}, -{0x8578, 0x0012}, {0x8579, 0x0004}, {0x857a, 0x0001}, -{0x857b, 0x0001}, {0x857c, 0x0001}, {0x857d, 0x0001}, -{0x857e, 0x0001}, {0x857f, 0x0001}, {0x8580, 0x00b6}, -{0x8581, 0x0012}, {0x8582, 0x0004}, {0x8583, 0x0084}, -{0x8584, 0x00fe}, {0x8585, 0x008a}, {0x8586, 0x0002}, -{0x8587, 0x00b7}, {0x8588, 0x0012}, {0x8589, 0x0004}, -{0x858a, 0x0001}, {0x858b, 0x0001}, {0x858c, 0x0001}, -{0x858d, 0x0001}, {0x858e, 0x0001}, {0x858f, 0x0001}, -{0x8590, 0x0086}, {0x8591, 0x00fd}, {0x8592, 0x00b4}, -{0x8593, 0x0012}, {0x8594, 0x0004}, {0x8595, 0x00b7}, -{0x8596, 0x0012}, {0x8597, 0x0004}, {0x8598, 0x00b6}, -{0x8599, 0x0012}, {0x859a, 0x0000}, {0x859b, 0x0084}, -{0x859c, 0x0008}, {0x859d, 0x0081}, {0x859e, 0x0008}, -{0x859f, 0x0027}, {0x85a0, 0x0016}, {0x85a1, 0x00b6}, -{0x85a2, 0x008f}, {0x85a3, 0x007d}, {0x85a4, 0x0081}, -{0x85a5, 0x000c}, {0x85a6, 0x0027}, {0x85a7, 0x0008}, -{0x85a8, 0x008b}, {0x85a9, 0x0004}, {0x85aa, 0x00b7}, -{0x85ab, 0x008f}, {0x85ac, 0x007d}, {0x85ad, 0x007e}, -{0x85ae, 0x0085}, {0x85af, 0x006c}, {0x85b0, 0x0086}, -{0x85b1, 0x0003}, {0x85b2, 0x0097}, {0x85b3, 0x0040}, -{0x85b4, 0x007e}, {0x85b5, 0x0089}, {0x85b6, 0x006e}, -{0x85b7, 0x0086}, {0x85b8, 0x0007}, {0x85b9, 0x00b7}, -{0x85ba, 0x0012}, {0x85bb, 0x0006}, {0x85bc, 0x005f}, -{0x85bd, 0x00f7}, {0x85be, 0x008f}, {0x85bf, 0x0082}, -{0x85c0, 0x005f}, {0x85c1, 0x00f7}, {0x85c2, 0x008f}, -{0x85c3, 0x007f}, {0x85c4, 0x00f7}, {0x85c5, 0x008f}, -{0x85c6, 0x0070}, {0x85c7, 0x00f7}, {0x85c8, 0x008f}, -{0x85c9, 0x0071}, {0x85ca, 0x00f7}, {0x85cb, 0x008f}, -{0x85cc, 0x0072}, {0x85cd, 0x00f7}, {0x85ce, 0x008f}, -{0x85cf, 0x0073}, {0x85d0, 0x00f7}, {0x85d1, 0x008f}, -{0x85d2, 0x0074}, {0x85d3, 0x00f7}, {0x85d4, 0x008f}, -{0x85d5, 0x0075}, {0x85d6, 0x00f7}, {0x85d7, 0x008f}, -{0x85d8, 0x0076}, {0x85d9, 0x00f7}, {0x85da, 0x008f}, -{0x85db, 0x0077}, {0x85dc, 0x00f7}, {0x85dd, 0x008f}, -{0x85de, 0x0078}, {0x85df, 0x00f7}, {0x85e0, 0x008f}, -{0x85e1, 0x0079}, {0x85e2, 0x00f7}, {0x85e3, 0x008f}, -{0x85e4, 0x007a}, {0x85e5, 0x00f7}, {0x85e6, 0x008f}, -{0x85e7, 0x007b}, {0x85e8, 0x00b6}, {0x85e9, 0x0012}, -{0x85ea, 0x0004}, {0x85eb, 0x008a}, {0x85ec, 0x0010}, -{0x85ed, 0x00b7}, {0x85ee, 0x0012}, {0x85ef, 0x0004}, -{0x85f0, 0x0086}, {0x85f1, 0x00e4}, {0x85f2, 0x00b7}, -{0x85f3, 0x0012}, {0x85f4, 0x0070}, {0x85f5, 0x00b7}, -{0x85f6, 0x0012}, {0x85f7, 0x0007}, {0x85f8, 0x00f7}, -{0x85f9, 0x0012}, {0x85fa, 0x0005}, {0x85fb, 0x00f7}, -{0x85fc, 0x0012}, {0x85fd, 0x0009}, {0x85fe, 0x0086}, -{0x85ff, 0x0008}, {0x8600, 0x00ba}, {0x8601, 0x0012}, -{0x8602, 0x0004}, {0x8603, 0x00b7}, {0x8604, 0x0012}, -{0x8605, 0x0004}, {0x8606, 0x0086}, {0x8607, 0x00f7}, -{0x8608, 0x00b4}, {0x8609, 0x0012}, {0x860a, 0x0004}, -{0x860b, 0x00b7}, {0x860c, 0x0012}, {0x860d, 0x0004}, -{0x860e, 0x0001}, {0x860f, 0x0001}, {0x8610, 0x0001}, -{0x8611, 0x0001}, {0x8612, 0x0001}, {0x8613, 0x0001}, -{0x8614, 0x00b6}, {0x8615, 0x0012}, {0x8616, 0x0008}, -{0x8617, 0x0027}, {0x8618, 0x007f}, {0x8619, 0x0081}, -{0x861a, 0x0080}, {0x861b, 0x0026}, {0x861c, 0x000b}, -{0x861d, 0x0086}, {0x861e, 0x0008}, {0x861f, 0x00ce}, -{0x8620, 0x008f}, {0x8621, 0x0079}, {0x8622, 0x00bd}, -{0x8623, 0x0089}, {0x8624, 0x007b}, {0x8625, 0x007e}, -{0x8626, 0x0086}, {0x8627, 0x008e}, {0x8628, 0x0081}, -{0x8629, 0x0040}, {0x862a, 0x0026}, {0x862b, 0x000b}, -{0x862c, 0x0086}, {0x862d, 0x0004}, {0x862e, 0x00ce}, -{0x862f, 0x008f}, {0x8630, 0x0076}, {0x8631, 0x00bd}, -{0x8632, 0x0089}, {0x8633, 0x007b}, {0x8634, 0x007e}, -{0x8635, 0x0086}, {0x8636, 0x008e}, {0x8637, 0x0081}, -{0x8638, 0x0020}, {0x8639, 0x0026}, {0x863a, 0x000b}, -{0x863b, 0x0086}, {0x863c, 0x0002}, {0x863d, 0x00ce}, -{0x863e, 0x008f}, {0x863f, 0x0073}, {0x8640, 0x00bd}, -{0x8641, 0x0089}, {0x8642, 0x007b}, {0x8643, 0x007e}, -{0x8644, 0x0086}, {0x8645, 0x008e}, {0x8646, 0x0081}, -{0x8647, 0x0010}, {0x8648, 0x0026}, {0x8649, 0x000b}, -{0x864a, 0x0086}, {0x864b, 0x0001}, {0x864c, 0x00ce}, -{0x864d, 0x008f}, {0x864e, 0x0070}, {0x864f, 0x00bd}, -{0x8650, 0x0089}, {0x8651, 0x007b}, {0x8652, 0x007e}, -{0x8653, 0x0086}, {0x8654, 0x008e}, {0x8655, 0x0081}, -{0x8656, 0x0008}, {0x8657, 0x0026}, {0x8658, 0x000b}, -{0x8659, 0x0086}, {0x865a, 0x0008}, {0x865b, 0x00ce}, -{0x865c, 0x008f}, {0x865d, 0x0079}, {0x865e, 0x00bd}, -{0x865f, 0x0089}, {0x8660, 0x007f}, {0x8661, 0x007e}, -{0x8662, 0x0086}, {0x8663, 0x008e}, {0x8664, 0x0081}, -{0x8665, 0x0004}, {0x8666, 0x0026}, {0x8667, 0x000b}, -{0x8668, 0x0086}, {0x8669, 0x0004}, {0x866a, 0x00ce}, -{0x866b, 0x008f}, {0x866c, 0x0076}, {0x866d, 0x00bd}, -{0x866e, 0x0089}, {0x866f, 0x007f}, {0x8670, 0x007e}, -{0x8671, 0x0086}, {0x8672, 0x008e}, {0x8673, 0x0081}, -{0x8674, 0x0002}, {0x8675, 0x0026}, {0x8676, 0x000b}, -{0x8677, 0x008a}, {0x8678, 0x0002}, {0x8679, 0x00ce}, -{0x867a, 0x008f}, {0x867b, 0x0073}, {0x867c, 0x00bd}, -{0x867d, 0x0089}, {0x867e, 0x007f}, {0x867f, 0x007e}, -{0x8680, 0x0086}, {0x8681, 0x008e}, {0x8682, 0x0081}, -{0x8683, 0x0001}, {0x8684, 0x0026}, {0x8685, 0x0008}, -{0x8686, 0x0086}, {0x8687, 0x0001}, {0x8688, 0x00ce}, -{0x8689, 0x008f}, {0x868a, 0x0070}, {0x868b, 0x00bd}, -{0x868c, 0x0089}, {0x868d, 0x007f}, {0x868e, 0x00b6}, -{0x868f, 0x008f}, {0x8690, 0x007f}, {0x8691, 0x0081}, -{0x8692, 0x000f}, {0x8693, 0x0026}, {0x8694, 0x0003}, -{0x8695, 0x007e}, {0x8696, 0x0087}, {0x8697, 0x0047}, -{0x8698, 0x00b6}, {0x8699, 0x0012}, {0x869a, 0x0009}, -{0x869b, 0x0084}, {0x869c, 0x0003}, {0x869d, 0x0081}, -{0x869e, 0x0003}, {0x869f, 0x0027}, {0x86a0, 0x0006}, -{0x86a1, 0x007c}, {0x86a2, 0x0012}, {0x86a3, 0x0009}, -{0x86a4, 0x007e}, {0x86a5, 0x0085}, {0x86a6, 0x00fe}, -{0x86a7, 0x00b6}, {0x86a8, 0x0012}, {0x86a9, 0x0006}, -{0x86aa, 0x0084}, {0x86ab, 0x0007}, {0x86ac, 0x0081}, -{0x86ad, 0x0007}, {0x86ae, 0x0027}, {0x86af, 0x0008}, -{0x86b0, 0x008b}, {0x86b1, 0x0001}, {0x86b2, 0x00b7}, -{0x86b3, 0x0012}, {0x86b4, 0x0006}, {0x86b5, 0x007e}, -{0x86b6, 0x0086}, {0x86b7, 0x00d5}, {0x86b8, 0x00b6}, -{0x86b9, 0x008f}, {0x86ba, 0x0082}, {0x86bb, 0x0026}, -{0x86bc, 0x000a}, {0x86bd, 0x007c}, {0x86be, 0x008f}, -{0x86bf, 0x0082}, {0x86c0, 0x004f}, {0x86c1, 0x00b7}, -{0x86c2, 0x0012}, {0x86c3, 0x0006}, {0x86c4, 0x007e}, -{0x86c5, 0x0085}, {0x86c6, 0x00c0}, {0x86c7, 0x00b6}, -{0x86c8, 0x0012}, {0x86c9, 0x0006}, {0x86ca, 0x0084}, -{0x86cb, 0x003f}, {0x86cc, 0x0081}, {0x86cd, 0x003f}, -{0x86ce, 0x0027}, {0x86cf, 0x0010}, {0x86d0, 0x008b}, -{0x86d1, 0x0008}, {0x86d2, 0x00b7}, {0x86d3, 0x0012}, -{0x86d4, 0x0006}, {0x86d5, 0x00b6}, {0x86d6, 0x0012}, -{0x86d7, 0x0009}, {0x86d8, 0x0084}, {0x86d9, 0x00fc}, -{0x86da, 0x00b7}, {0x86db, 0x0012}, {0x86dc, 0x0009}, -{0x86dd, 0x007e}, {0x86de, 0x0085}, {0x86df, 0x00fe}, -{0x86e0, 0x00ce}, {0x86e1, 0x008f}, {0x86e2, 0x0070}, -{0x86e3, 0x0018}, {0x86e4, 0x00ce}, {0x86e5, 0x008f}, -{0x86e6, 0x0084}, {0x86e7, 0x00c6}, {0x86e8, 0x000c}, -{0x86e9, 0x00bd}, {0x86ea, 0x0089}, {0x86eb, 0x006f}, -{0x86ec, 0x00ce}, {0x86ed, 0x008f}, {0x86ee, 0x0084}, -{0x86ef, 0x0018}, {0x86f0, 0x00ce}, {0x86f1, 0x008f}, -{0x86f2, 0x0070}, {0x86f3, 0x00c6}, {0x86f4, 0x000c}, -{0x86f5, 0x00bd}, {0x86f6, 0x0089}, {0x86f7, 0x006f}, -{0x86f8, 0x00d6}, {0x86f9, 0x0083}, {0x86fa, 0x00c1}, -{0x86fb, 0x004f}, {0x86fc, 0x002d}, {0x86fd, 0x0003}, -{0x86fe, 0x007e}, {0x86ff, 0x0087}, {0x8700, 0x0040}, -{0x8701, 0x00b6}, {0x8702, 0x008f}, {0x8703, 0x007f}, -{0x8704, 0x0081}, {0x8705, 0x0007}, {0x8706, 0x0027}, -{0x8707, 0x000f}, {0x8708, 0x0081}, {0x8709, 0x000b}, -{0x870a, 0x0027}, {0x870b, 0x0015}, {0x870c, 0x0081}, -{0x870d, 0x000d}, {0x870e, 0x0027}, {0x870f, 0x001b}, -{0x8710, 0x0081}, {0x8711, 0x000e}, {0x8712, 0x0027}, -{0x8713, 0x0021}, {0x8714, 0x007e}, {0x8715, 0x0087}, -{0x8716, 0x0040}, {0x8717, 0x00f7}, {0x8718, 0x008f}, -{0x8719, 0x007b}, {0x871a, 0x0086}, {0x871b, 0x0002}, -{0x871c, 0x00b7}, {0x871d, 0x008f}, {0x871e, 0x007a}, -{0x871f, 0x0020}, {0x8720, 0x001c}, {0x8721, 0x00f7}, -{0x8722, 0x008f}, {0x8723, 0x0078}, {0x8724, 0x0086}, -{0x8725, 0x0002}, {0x8726, 0x00b7}, {0x8727, 0x008f}, -{0x8728, 0x0077}, {0x8729, 0x0020}, {0x872a, 0x0012}, -{0x872b, 0x00f7}, {0x872c, 0x008f}, {0x872d, 0x0075}, -{0x872e, 0x0086}, {0x872f, 0x0002}, {0x8730, 0x00b7}, -{0x8731, 0x008f}, {0x8732, 0x0074}, {0x8733, 0x0020}, -{0x8734, 0x0008}, {0x8735, 0x00f7}, {0x8736, 0x008f}, -{0x8737, 0x0072}, {0x8738, 0x0086}, {0x8739, 0x0002}, -{0x873a, 0x00b7}, {0x873b, 0x008f}, {0x873c, 0x0071}, -{0x873d, 0x007e}, {0x873e, 0x0087}, {0x873f, 0x0047}, -{0x8740, 0x0086}, {0x8741, 0x0004}, {0x8742, 0x0097}, -{0x8743, 0x0040}, {0x8744, 0x007e}, {0x8745, 0x0089}, -{0x8746, 0x006e}, {0x8747, 0x00ce}, {0x8748, 0x008f}, -{0x8749, 0x0072}, {0x874a, 0x00bd}, {0x874b, 0x0089}, -{0x874c, 0x00f7}, {0x874d, 0x00ce}, {0x874e, 0x008f}, -{0x874f, 0x0075}, {0x8750, 0x00bd}, {0x8751, 0x0089}, -{0x8752, 0x00f7}, {0x8753, 0x00ce}, {0x8754, 0x008f}, -{0x8755, 0x0078}, {0x8756, 0x00bd}, {0x8757, 0x0089}, -{0x8758, 0x00f7}, {0x8759, 0x00ce}, {0x875a, 0x008f}, -{0x875b, 0x007b}, {0x875c, 0x00bd}, {0x875d, 0x0089}, -{0x875e, 0x00f7}, {0x875f, 0x004f}, {0x8760, 0x00b7}, -{0x8761, 0x008f}, {0x8762, 0x007d}, {0x8763, 0x00b7}, -{0x8764, 0x008f}, {0x8765, 0x0081}, {0x8766, 0x00b6}, -{0x8767, 0x008f}, {0x8768, 0x0072}, {0x8769, 0x0027}, -{0x876a, 0x0047}, {0x876b, 0x007c}, {0x876c, 0x008f}, -{0x876d, 0x007d}, {0x876e, 0x00b6}, {0x876f, 0x008f}, -{0x8770, 0x0075}, {0x8771, 0x0027}, {0x8772, 0x003f}, -{0x8773, 0x007c}, {0x8774, 0x008f}, {0x8775, 0x007d}, -{0x8776, 0x00b6}, {0x8777, 0x008f}, {0x8778, 0x0078}, -{0x8779, 0x0027}, {0x877a, 0x0037}, {0x877b, 0x007c}, -{0x877c, 0x008f}, {0x877d, 0x007d}, {0x877e, 0x00b6}, -{0x877f, 0x008f}, {0x8780, 0x007b}, {0x8781, 0x0027}, -{0x8782, 0x002f}, {0x8783, 0x007f}, {0x8784, 0x008f}, -{0x8785, 0x007d}, {0x8786, 0x007c}, {0x8787, 0x008f}, -{0x8788, 0x0081}, {0x8789, 0x007a}, {0x878a, 0x008f}, -{0x878b, 0x0072}, {0x878c, 0x0027}, {0x878d, 0x001b}, -{0x878e, 0x007c}, {0x878f, 0x008f}, {0x8790, 0x007d}, -{0x8791, 0x007a}, {0x8792, 0x008f}, {0x8793, 0x0075}, -{0x8794, 0x0027}, {0x8795, 0x0016}, {0x8796, 0x007c}, -{0x8797, 0x008f}, {0x8798, 0x007d}, {0x8799, 0x007a}, -{0x879a, 0x008f}, {0x879b, 0x0078}, {0x879c, 0x0027}, -{0x879d, 0x0011}, {0x879e, 0x007c}, {0x879f, 0x008f}, -{0x87a0, 0x007d}, {0x87a1, 0x007a}, {0x87a2, 0x008f}, -{0x87a3, 0x007b}, {0x87a4, 0x0027}, {0x87a5, 0x000c}, -{0x87a6, 0x007e}, {0x87a7, 0x0087}, {0x87a8, 0x0083}, -{0x87a9, 0x007a}, {0x87aa, 0x008f}, {0x87ab, 0x0075}, -{0x87ac, 0x007a}, {0x87ad, 0x008f}, {0x87ae, 0x0078}, -{0x87af, 0x007a}, {0x87b0, 0x008f}, {0x87b1, 0x007b}, -{0x87b2, 0x00ce}, {0x87b3, 0x00c1}, {0x87b4, 0x00fc}, -{0x87b5, 0x00f6}, {0x87b6, 0x008f}, {0x87b7, 0x007d}, -{0x87b8, 0x003a}, {0x87b9, 0x00a6}, {0x87ba, 0x0000}, -{0x87bb, 0x00b7}, {0x87bc, 0x0012}, {0x87bd, 0x0070}, -{0x87be, 0x00b6}, {0x87bf, 0x008f}, {0x87c0, 0x0072}, -{0x87c1, 0x0026}, {0x87c2, 0x0003}, {0x87c3, 0x007e}, -{0x87c4, 0x0087}, {0x87c5, 0x00fa}, {0x87c6, 0x00b6}, -{0x87c7, 0x008f}, {0x87c8, 0x0075}, {0x87c9, 0x0026}, -{0x87ca, 0x000a}, {0x87cb, 0x0018}, {0x87cc, 0x00ce}, -{0x87cd, 0x008f}, {0x87ce, 0x0073}, {0x87cf, 0x00bd}, -{0x87d0, 0x0089}, {0x87d1, 0x00d5}, {0x87d2, 0x007e}, -{0x87d3, 0x0087}, {0x87d4, 0x00fa}, {0x87d5, 0x00b6}, -{0x87d6, 0x008f}, {0x87d7, 0x0078}, {0x87d8, 0x0026}, -{0x87d9, 0x000a}, {0x87da, 0x0018}, {0x87db, 0x00ce}, -{0x87dc, 0x008f}, {0x87dd, 0x0076}, {0x87de, 0x00bd}, -{0x87df, 0x0089}, {0x87e0, 0x00d5}, {0x87e1, 0x007e}, -{0x87e2, 0x0087}, {0x87e3, 0x00fa}, {0x87e4, 0x00b6}, -{0x87e5, 0x008f}, {0x87e6, 0x007b}, {0x87e7, 0x0026}, -{0x87e8, 0x000a}, {0x87e9, 0x0018}, {0x87ea, 0x00ce}, -{0x87eb, 0x008f}, {0x87ec, 0x0079}, {0x87ed, 0x00bd}, -{0x87ee, 0x0089}, {0x87ef, 0x00d5}, {0x87f0, 0x007e}, -{0x87f1, 0x0087}, {0x87f2, 0x00fa}, {0x87f3, 0x0086}, -{0x87f4, 0x0005}, {0x87f5, 0x0097}, {0x87f6, 0x0040}, -{0x87f7, 0x007e}, {0x87f8, 0x0089}, {0x87f9, 0x006e}, -{0x87fa, 0x00b6}, {0x87fb, 0x008f}, {0x87fc, 0x0075}, -{0x87fd, 0x0081}, {0x87fe, 0x0007}, {0x87ff, 0x002e}, -{0x8800, 0x00f2}, {0x8801, 0x00f6}, {0x8802, 0x0012}, -{0x8803, 0x0006}, {0x8804, 0x00c4}, {0x8805, 0x00f8}, -{0x8806, 0x001b}, {0x8807, 0x00b7}, {0x8808, 0x0012}, -{0x8809, 0x0006}, {0x880a, 0x00b6}, {0x880b, 0x008f}, -{0x880c, 0x0078}, {0x880d, 0x0081}, {0x880e, 0x0007}, -{0x880f, 0x002e}, {0x8810, 0x00e2}, {0x8811, 0x0048}, -{0x8812, 0x0048}, {0x8813, 0x0048}, {0x8814, 0x00f6}, -{0x8815, 0x0012}, {0x8816, 0x0006}, {0x8817, 0x00c4}, -{0x8818, 0x00c7}, {0x8819, 0x001b}, {0x881a, 0x00b7}, -{0x881b, 0x0012}, {0x881c, 0x0006}, {0x881d, 0x00b6}, -{0x881e, 0x008f}, {0x881f, 0x007b}, {0x8820, 0x0081}, -{0x8821, 0x0007}, {0x8822, 0x002e}, {0x8823, 0x00cf}, -{0x8824, 0x00f6}, {0x8825, 0x0012}, {0x8826, 0x0005}, -{0x8827, 0x00c4}, {0x8828, 0x00f8}, {0x8829, 0x001b}, -{0x882a, 0x00b7}, {0x882b, 0x0012}, {0x882c, 0x0005}, -{0x882d, 0x0086}, {0x882e, 0x0000}, {0x882f, 0x00f6}, -{0x8830, 0x008f}, {0x8831, 0x0071}, {0x8832, 0x00bd}, -{0x8833, 0x0089}, {0x8834, 0x0094}, {0x8835, 0x0086}, -{0x8836, 0x0001}, {0x8837, 0x00f6}, {0x8838, 0x008f}, -{0x8839, 0x0074}, {0x883a, 0x00bd}, {0x883b, 0x0089}, -{0x883c, 0x0094}, {0x883d, 0x0086}, {0x883e, 0x0002}, -{0x883f, 0x00f6}, {0x8840, 0x008f}, {0x8841, 0x0077}, -{0x8842, 0x00bd}, {0x8843, 0x0089}, {0x8844, 0x0094}, -{0x8845, 0x0086}, {0x8846, 0x0003}, {0x8847, 0x00f6}, -{0x8848, 0x008f}, {0x8849, 0x007a}, {0x884a, 0x00bd}, -{0x884b, 0x0089}, {0x884c, 0x0094}, {0x884d, 0x00ce}, -{0x884e, 0x008f}, {0x884f, 0x0070}, {0x8850, 0x00a6}, -{0x8851, 0x0001}, {0x8852, 0x0081}, {0x8853, 0x0001}, -{0x8854, 0x0027}, {0x8855, 0x0007}, {0x8856, 0x0081}, -{0x8857, 0x0003}, {0x8858, 0x0027}, {0x8859, 0x0003}, -{0x885a, 0x007e}, {0x885b, 0x0088}, {0x885c, 0x0066}, -{0x885d, 0x00a6}, {0x885e, 0x0000}, {0x885f, 0x00b8}, -{0x8860, 0x008f}, {0x8861, 0x0081}, {0x8862, 0x0084}, -{0x8863, 0x0001}, {0x8864, 0x0026}, {0x8865, 0x000b}, -{0x8866, 0x008c}, {0x8867, 0x008f}, {0x8868, 0x0079}, -{0x8869, 0x002c}, {0x886a, 0x000e}, {0x886b, 0x0008}, -{0x886c, 0x0008}, {0x886d, 0x0008}, {0x886e, 0x007e}, -{0x886f, 0x0088}, {0x8870, 0x0050}, {0x8871, 0x00b6}, -{0x8872, 0x0012}, {0x8873, 0x0004}, {0x8874, 0x008a}, -{0x8875, 0x0040}, {0x8876, 0x00b7}, {0x8877, 0x0012}, -{0x8878, 0x0004}, {0x8879, 0x00b6}, {0x887a, 0x0012}, -{0x887b, 0x0004}, {0x887c, 0x0084}, {0x887d, 0x00fb}, -{0x887e, 0x0084}, {0x887f, 0x00ef}, {0x8880, 0x00b7}, -{0x8881, 0x0012}, {0x8882, 0x0004}, {0x8883, 0x00b6}, -{0x8884, 0x0012}, {0x8885, 0x0007}, {0x8886, 0x0036}, -{0x8887, 0x00b6}, {0x8888, 0x008f}, {0x8889, 0x007c}, -{0x888a, 0x0048}, {0x888b, 0x0048}, {0x888c, 0x00b7}, -{0x888d, 0x0012}, {0x888e, 0x0007}, {0x888f, 0x0086}, -{0x8890, 0x0001}, {0x8891, 0x00ba}, {0x8892, 0x0012}, -{0x8893, 0x0004}, {0x8894, 0x00b7}, {0x8895, 0x0012}, -{0x8896, 0x0004}, {0x8897, 0x0001}, {0x8898, 0x0001}, -{0x8899, 0x0001}, {0x889a, 0x0001}, {0x889b, 0x0001}, -{0x889c, 0x0001}, {0x889d, 0x0086}, {0x889e, 0x00fe}, -{0x889f, 0x00b4}, {0x88a0, 0x0012}, {0x88a1, 0x0004}, -{0x88a2, 0x00b7}, {0x88a3, 0x0012}, {0x88a4, 0x0004}, -{0x88a5, 0x0086}, {0x88a6, 0x0002}, {0x88a7, 0x00ba}, -{0x88a8, 0x0012}, {0x88a9, 0x0004}, {0x88aa, 0x00b7}, -{0x88ab, 0x0012}, {0x88ac, 0x0004}, {0x88ad, 0x0086}, -{0x88ae, 0x00fd}, {0x88af, 0x00b4}, {0x88b0, 0x0012}, -{0x88b1, 0x0004}, {0x88b2, 0x00b7}, {0x88b3, 0x0012}, -{0x88b4, 0x0004}, {0x88b5, 0x0032}, {0x88b6, 0x00b7}, -{0x88b7, 0x0012}, {0x88b8, 0x0007}, {0x88b9, 0x00b6}, -{0x88ba, 0x0012}, {0x88bb, 0x0000}, {0x88bc, 0x0084}, -{0x88bd, 0x0008}, {0x88be, 0x0081}, {0x88bf, 0x0008}, -{0x88c0, 0x0027}, {0x88c1, 0x000f}, {0x88c2, 0x007c}, -{0x88c3, 0x0082}, {0x88c4, 0x0008}, {0x88c5, 0x0026}, -{0x88c6, 0x0007}, {0x88c7, 0x0086}, {0x88c8, 0x0076}, -{0x88c9, 0x0097}, {0x88ca, 0x0040}, {0x88cb, 0x007e}, -{0x88cc, 0x0089}, {0x88cd, 0x006e}, {0x88ce, 0x007e}, -{0x88cf, 0x0086}, {0x88d0, 0x00ec}, {0x88d1, 0x00b6}, -{0x88d2, 0x008f}, {0x88d3, 0x007f}, {0x88d4, 0x0081}, -{0x88d5, 0x000f}, {0x88d6, 0x0027}, {0x88d7, 0x003c}, -{0x88d8, 0x00bd}, {0x88d9, 0x00e6}, {0x88da, 0x00c7}, -{0x88db, 0x00b7}, {0x88dc, 0x0012}, {0x88dd, 0x000d}, -{0x88de, 0x00bd}, {0x88df, 0x00e6}, {0x88e0, 0x00cb}, -{0x88e1, 0x00b6}, {0x88e2, 0x0012}, {0x88e3, 0x0004}, -{0x88e4, 0x008a}, {0x88e5, 0x0020}, {0x88e6, 0x00b7}, -{0x88e7, 0x0012}, {0x88e8, 0x0004}, {0x88e9, 0x00ce}, -{0x88ea, 0x00ff}, {0x88eb, 0x00ff}, {0x88ec, 0x00b6}, -{0x88ed, 0x0012}, {0x88ee, 0x0000}, {0x88ef, 0x0081}, -{0x88f0, 0x000c}, {0x88f1, 0x0026}, {0x88f2, 0x0005}, -{0x88f3, 0x0009}, {0x88f4, 0x0026}, {0x88f5, 0x00f6}, -{0x88f6, 0x0027}, {0x88f7, 0x001c}, {0x88f8, 0x00b6}, -{0x88f9, 0x0012}, {0x88fa, 0x0004}, {0x88fb, 0x0084}, -{0x88fc, 0x00df}, {0x88fd, 0x00b7}, {0x88fe, 0x0012}, -{0x88ff, 0x0004}, {0x8900, 0x0096}, {0x8901, 0x0083}, -{0x8902, 0x0081}, {0x8903, 0x0007}, {0x8904, 0x002c}, -{0x8905, 0x0005}, {0x8906, 0x007c}, {0x8907, 0x0000}, -{0x8908, 0x0083}, {0x8909, 0x0020}, {0x890a, 0x0006}, -{0x890b, 0x0096}, {0x890c, 0x0083}, {0x890d, 0x008b}, -{0x890e, 0x0008}, {0x890f, 0x0097}, {0x8910, 0x0083}, -{0x8911, 0x007e}, {0x8912, 0x0085}, {0x8913, 0x0041}, -{0x8914, 0x007f}, {0x8915, 0x008f}, {0x8916, 0x007e}, -{0x8917, 0x0086}, {0x8918, 0x0080}, {0x8919, 0x00b7}, -{0x891a, 0x0012}, {0x891b, 0x000c}, {0x891c, 0x0086}, -{0x891d, 0x0001}, {0x891e, 0x00b7}, {0x891f, 0x008f}, -{0x8920, 0x007d}, {0x8921, 0x00b6}, {0x8922, 0x0012}, -{0x8923, 0x000c}, {0x8924, 0x0084}, {0x8925, 0x007f}, -{0x8926, 0x00b7}, {0x8927, 0x0012}, {0x8928, 0x000c}, -{0x8929, 0x008a}, {0x892a, 0x0080}, {0x892b, 0x00b7}, -{0x892c, 0x0012}, {0x892d, 0x000c}, {0x892e, 0x0086}, -{0x892f, 0x000a}, {0x8930, 0x00bd}, {0x8931, 0x008a}, -{0x8932, 0x0006}, {0x8933, 0x00b6}, {0x8934, 0x0012}, -{0x8935, 0x000a}, {0x8936, 0x002a}, {0x8937, 0x0009}, -{0x8938, 0x00b6}, {0x8939, 0x0012}, {0x893a, 0x000c}, -{0x893b, 0x00ba}, {0x893c, 0x008f}, {0x893d, 0x007d}, -{0x893e, 0x00b7}, {0x893f, 0x0012}, {0x8940, 0x000c}, -{0x8941, 0x00b6}, {0x8942, 0x008f}, {0x8943, 0x007e}, -{0x8944, 0x0081}, {0x8945, 0x0060}, {0x8946, 0x0027}, -{0x8947, 0x001a}, {0x8948, 0x008b}, {0x8949, 0x0020}, -{0x894a, 0x00b7}, {0x894b, 0x008f}, {0x894c, 0x007e}, -{0x894d, 0x00b6}, {0x894e, 0x0012}, {0x894f, 0x000c}, -{0x8950, 0x0084}, {0x8951, 0x009f}, {0x8952, 0x00ba}, -{0x8953, 0x008f}, {0x8954, 0x007e}, {0x8955, 0x00b7}, -{0x8956, 0x0012}, {0x8957, 0x000c}, {0x8958, 0x00b6}, -{0x8959, 0x008f}, {0x895a, 0x007d}, {0x895b, 0x0048}, -{0x895c, 0x00b7}, {0x895d, 0x008f}, {0x895e, 0x007d}, -{0x895f, 0x007e}, {0x8960, 0x0089}, {0x8961, 0x0021}, -{0x8962, 0x00b6}, {0x8963, 0x0012}, {0x8964, 0x0004}, -{0x8965, 0x008a}, {0x8966, 0x0020}, {0x8967, 0x00b7}, -{0x8968, 0x0012}, {0x8969, 0x0004}, {0x896a, 0x00bd}, -{0x896b, 0x008a}, {0x896c, 0x000a}, {0x896d, 0x004f}, -{0x896e, 0x0039}, {0x896f, 0x00a6}, {0x8970, 0x0000}, -{0x8971, 0x0018}, {0x8972, 0x00a7}, {0x8973, 0x0000}, -{0x8974, 0x0008}, {0x8975, 0x0018}, {0x8976, 0x0008}, -{0x8977, 0x005a}, {0x8978, 0x0026}, {0x8979, 0x00f5}, -{0x897a, 0x0039}, {0x897b, 0x0036}, {0x897c, 0x006c}, -{0x897d, 0x0000}, {0x897e, 0x0032}, {0x897f, 0x00ba}, -{0x8980, 0x008f}, {0x8981, 0x007f}, {0x8982, 0x00b7}, -{0x8983, 0x008f}, {0x8984, 0x007f}, {0x8985, 0x00b6}, -{0x8986, 0x0012}, {0x8987, 0x0009}, {0x8988, 0x0084}, -{0x8989, 0x0003}, {0x898a, 0x00a7}, {0x898b, 0x0001}, -{0x898c, 0x00b6}, {0x898d, 0x0012}, {0x898e, 0x0006}, -{0x898f, 0x0084}, {0x8990, 0x003f}, {0x8991, 0x00a7}, -{0x8992, 0x0002}, {0x8993, 0x0039}, {0x8994, 0x0036}, -{0x8995, 0x0086}, {0x8996, 0x0003}, {0x8997, 0x00b7}, -{0x8998, 0x008f}, {0x8999, 0x0080}, {0x899a, 0x0032}, -{0x899b, 0x00c1}, {0x899c, 0x0000}, {0x899d, 0x0026}, -{0x899e, 0x0006}, {0x899f, 0x00b7}, {0x89a0, 0x008f}, -{0x89a1, 0x007c}, {0x89a2, 0x007e}, {0x89a3, 0x0089}, -{0x89a4, 0x00c9}, {0x89a5, 0x00c1}, {0x89a6, 0x0001}, -{0x89a7, 0x0027}, {0x89a8, 0x0018}, {0x89a9, 0x00c1}, -{0x89aa, 0x0002}, {0x89ab, 0x0027}, {0x89ac, 0x000c}, -{0x89ad, 0x00c1}, {0x89ae, 0x0003}, {0x89af, 0x0027}, -{0x89b0, 0x0000}, {0x89b1, 0x00f6}, {0x89b2, 0x008f}, -{0x89b3, 0x0080}, {0x89b4, 0x0005}, {0x89b5, 0x0005}, -{0x89b6, 0x00f7}, {0x89b7, 0x008f}, {0x89b8, 0x0080}, -{0x89b9, 0x00f6}, {0x89ba, 0x008f}, {0x89bb, 0x0080}, -{0x89bc, 0x0005}, {0x89bd, 0x0005}, {0x89be, 0x00f7}, -{0x89bf, 0x008f}, {0x89c0, 0x0080}, {0x89c1, 0x00f6}, -{0x89c2, 0x008f}, {0x89c3, 0x0080}, {0x89c4, 0x0005}, -{0x89c5, 0x0005}, {0x89c6, 0x00f7}, {0x89c7, 0x008f}, -{0x89c8, 0x0080}, {0x89c9, 0x00f6}, {0x89ca, 0x008f}, -{0x89cb, 0x0080}, {0x89cc, 0x0053}, {0x89cd, 0x00f4}, -{0x89ce, 0x0012}, {0x89cf, 0x0007}, {0x89d0, 0x001b}, -{0x89d1, 0x00b7}, {0x89d2, 0x0012}, {0x89d3, 0x0007}, -{0x89d4, 0x0039}, {0x89d5, 0x00ce}, {0x89d6, 0x008f}, -{0x89d7, 0x0070}, {0x89d8, 0x00a6}, {0x89d9, 0x0000}, -{0x89da, 0x0018}, {0x89db, 0x00e6}, {0x89dc, 0x0000}, -{0x89dd, 0x0018}, {0x89de, 0x00a7}, {0x89df, 0x0000}, -{0x89e0, 0x00e7}, {0x89e1, 0x0000}, {0x89e2, 0x00a6}, -{0x89e3, 0x0001}, {0x89e4, 0x0018}, {0x89e5, 0x00e6}, -{0x89e6, 0x0001}, {0x89e7, 0x0018}, {0x89e8, 0x00a7}, -{0x89e9, 0x0001}, {0x89ea, 0x00e7}, {0x89eb, 0x0001}, -{0x89ec, 0x00a6}, {0x89ed, 0x0002}, {0x89ee, 0x0018}, -{0x89ef, 0x00e6}, {0x89f0, 0x0002}, {0x89f1, 0x0018}, -{0x89f2, 0x00a7}, {0x89f3, 0x0002}, {0x89f4, 0x00e7}, -{0x89f5, 0x0002}, {0x89f6, 0x0039}, {0x89f7, 0x00a6}, -{0x89f8, 0x0000}, {0x89f9, 0x0084}, {0x89fa, 0x0007}, -{0x89fb, 0x00e6}, {0x89fc, 0x0000}, {0x89fd, 0x00c4}, -{0x89fe, 0x0038}, {0x89ff, 0x0054}, {0x8a00, 0x0054}, -{0x8a01, 0x0054}, {0x8a02, 0x001b}, {0x8a03, 0x00a7}, -{0x8a04, 0x0000}, {0x8a05, 0x0039}, {0x8a06, 0x004a}, -{0x8a07, 0x0026}, {0x8a08, 0x00fd}, {0x8a09, 0x0039}, -{0x8a0a, 0x0096}, {0x8a0b, 0x0022}, {0x8a0c, 0x0084}, -{0x8a0d, 0x000f}, {0x8a0e, 0x0097}, {0x8a0f, 0x0022}, -{0x8a10, 0x0086}, {0x8a11, 0x0001}, {0x8a12, 0x00b7}, -{0x8a13, 0x008f}, {0x8a14, 0x0070}, {0x8a15, 0x00b6}, -{0x8a16, 0x0012}, {0x8a17, 0x0007}, {0x8a18, 0x00b7}, -{0x8a19, 0x008f}, {0x8a1a, 0x0071}, {0x8a1b, 0x00f6}, -{0x8a1c, 0x0012}, {0x8a1d, 0x000c}, {0x8a1e, 0x00c4}, -{0x8a1f, 0x000f}, {0x8a20, 0x00c8}, {0x8a21, 0x000f}, -{0x8a22, 0x00f7}, {0x8a23, 0x008f}, {0x8a24, 0x0072}, -{0x8a25, 0x00f6}, {0x8a26, 0x008f}, {0x8a27, 0x0072}, -{0x8a28, 0x00b6}, {0x8a29, 0x008f}, {0x8a2a, 0x0071}, -{0x8a2b, 0x0084}, {0x8a2c, 0x0003}, {0x8a2d, 0x0027}, -{0x8a2e, 0x0014}, {0x8a2f, 0x0081}, {0x8a30, 0x0001}, -{0x8a31, 0x0027}, {0x8a32, 0x001c}, {0x8a33, 0x0081}, -{0x8a34, 0x0002}, {0x8a35, 0x0027}, {0x8a36, 0x0024}, -{0x8a37, 0x00f4}, {0x8a38, 0x008f}, {0x8a39, 0x0070}, -{0x8a3a, 0x0027}, {0x8a3b, 0x002a}, {0x8a3c, 0x0096}, -{0x8a3d, 0x0022}, {0x8a3e, 0x008a}, {0x8a3f, 0x0080}, -{0x8a40, 0x007e}, {0x8a41, 0x008a}, {0x8a42, 0x0064}, -{0x8a43, 0x00f4}, {0x8a44, 0x008f}, {0x8a45, 0x0070}, -{0x8a46, 0x0027}, {0x8a47, 0x001e}, {0x8a48, 0x0096}, -{0x8a49, 0x0022}, {0x8a4a, 0x008a}, {0x8a4b, 0x0010}, -{0x8a4c, 0x007e}, {0x8a4d, 0x008a}, {0x8a4e, 0x0064}, -{0x8a4f, 0x00f4}, {0x8a50, 0x008f}, {0x8a51, 0x0070}, -{0x8a52, 0x0027}, {0x8a53, 0x0012}, {0x8a54, 0x0096}, -{0x8a55, 0x0022}, {0x8a56, 0x008a}, {0x8a57, 0x0020}, -{0x8a58, 0x007e}, {0x8a59, 0x008a}, {0x8a5a, 0x0064}, -{0x8a5b, 0x00f4}, {0x8a5c, 0x008f}, {0x8a5d, 0x0070}, -{0x8a5e, 0x0027}, {0x8a5f, 0x0006}, {0x8a60, 0x0096}, -{0x8a61, 0x0022}, {0x8a62, 0x008a}, {0x8a63, 0x0040}, -{0x8a64, 0x0097}, {0x8a65, 0x0022}, {0x8a66, 0x0074}, -{0x8a67, 0x008f}, {0x8a68, 0x0071}, {0x8a69, 0x0074}, -{0x8a6a, 0x008f}, {0x8a6b, 0x0071}, {0x8a6c, 0x0078}, -{0x8a6d, 0x008f}, {0x8a6e, 0x0070}, {0x8a6f, 0x00b6}, -{0x8a70, 0x008f}, {0x8a71, 0x0070}, {0x8a72, 0x0085}, -{0x8a73, 0x0010}, {0x8a74, 0x0027}, {0x8a75, 0x00af}, -{0x8a76, 0x00d6}, {0x8a77, 0x0022}, {0x8a78, 0x00c4}, -{0x8a79, 0x0010}, {0x8a7a, 0x0058}, {0x8a7b, 0x00b6}, -{0x8a7c, 0x0012}, {0x8a7d, 0x0070}, {0x8a7e, 0x0081}, -{0x8a7f, 0x00e4}, {0x8a80, 0x0027}, {0x8a81, 0x0036}, -{0x8a82, 0x0081}, {0x8a83, 0x00e1}, {0x8a84, 0x0026}, -{0x8a85, 0x000c}, {0x8a86, 0x0096}, {0x8a87, 0x0022}, -{0x8a88, 0x0084}, {0x8a89, 0x0020}, {0x8a8a, 0x0044}, -{0x8a8b, 0x001b}, {0x8a8c, 0x00d6}, {0x8a8d, 0x0022}, -{0x8a8e, 0x00c4}, {0x8a8f, 0x00cf}, {0x8a90, 0x0020}, -{0x8a91, 0x0023}, {0x8a92, 0x0058}, {0x8a93, 0x0081}, -{0x8a94, 0x00c6}, {0x8a95, 0x0026}, {0x8a96, 0x000d}, -{0x8a97, 0x0096}, {0x8a98, 0x0022}, {0x8a99, 0x0084}, -{0x8a9a, 0x0040}, {0x8a9b, 0x0044}, {0x8a9c, 0x0044}, -{0x8a9d, 0x001b}, {0x8a9e, 0x00d6}, {0x8a9f, 0x0022}, -{0x8aa0, 0x00c4}, {0x8aa1, 0x00af}, {0x8aa2, 0x0020}, -{0x8aa3, 0x0011}, {0x8aa4, 0x0058}, {0x8aa5, 0x0081}, -{0x8aa6, 0x0027}, {0x8aa7, 0x0026}, {0x8aa8, 0x000f}, -{0x8aa9, 0x0096}, {0x8aaa, 0x0022}, {0x8aab, 0x0084}, -{0x8aac, 0x0080}, {0x8aad, 0x0044}, {0x8aae, 0x0044}, -{0x8aaf, 0x0044}, {0x8ab0, 0x001b}, {0x8ab1, 0x00d6}, -{0x8ab2, 0x0022}, {0x8ab3, 0x00c4}, {0x8ab4, 0x006f}, -{0x8ab5, 0x001b}, {0x8ab6, 0x0097}, {0x8ab7, 0x0022}, -{0x8ab8, 0x0039}, {0x8ab9, 0x0027}, {0x8aba, 0x000c}, -{0x8abb, 0x007c}, {0x8abc, 0x0082}, {0x8abd, 0x0006}, -{0x8abe, 0x00bd}, {0x8abf, 0x00d9}, {0x8ac0, 0x00ed}, -{0x8ac1, 0x00b6}, {0x8ac2, 0x0082}, {0x8ac3, 0x0007}, -{0x8ac4, 0x007e}, {0x8ac5, 0x008a}, {0x8ac6, 0x00b9}, -{0x8ac7, 0x007f}, {0x8ac8, 0x0082}, {0x8ac9, 0x0006}, -{0x8aca, 0x0039}, { 0x0, 0x0 } -}; -#endif - - -/* phy types */ -#define CAS_PHY_UNKNOWN 0x00 -#define CAS_PHY_SERDES 0x01 -#define CAS_PHY_MII_MDIO0 0x02 -#define CAS_PHY_MII_MDIO1 0x04 -#define CAS_PHY_MII(x) ((x) & (CAS_PHY_MII_MDIO0 | CAS_PHY_MII_MDIO1)) - -/* _RING_INDEX is the index for the ring sizes to be used. _RING_SIZE - * is the actual size. the default index for the various rings is - * 8. NOTE: there a bunch of alignment constraints for the rings. to - * deal with that, i just allocate rings to create the desired - * alignment. here are the constraints: - * RX DESC and COMP rings must be 8KB aligned - * TX DESC must be 2KB aligned. - * if you change the numbers, be cognizant of how the alignment will change - * in INIT_BLOCK as well. - */ - -#define DESC_RING_I_TO_S(x) (32*(1 << (x))) -#define COMP_RING_I_TO_S(x) (128*(1 << (x))) -#define TX_DESC_RING_INDEX 4 /* 512 = 8k */ -#define RX_DESC_RING_INDEX 4 /* 512 = 8k */ -#define RX_COMP_RING_INDEX 4 /* 2048 = 64k: should be 4x rx ring size */ - -#if (TX_DESC_RING_INDEX > 8) || (TX_DESC_RING_INDEX < 0) -#error TX_DESC_RING_INDEX must be between 0 and 8 -#endif - -#if (RX_DESC_RING_INDEX > 8) || (RX_DESC_RING_INDEX < 0) -#error RX_DESC_RING_INDEX must be between 0 and 8 -#endif - -#if (RX_COMP_RING_INDEX > 8) || (RX_COMP_RING_INDEX < 0) -#error RX_COMP_RING_INDEX must be between 0 and 8 -#endif - -#define N_TX_RINGS MAX_TX_RINGS /* for QoS */ -#define N_TX_RINGS_MASK MAX_TX_RINGS_MASK -#define N_RX_DESC_RINGS MAX_RX_DESC_RINGS /* 1 for ipsec */ -#define N_RX_COMP_RINGS 0x1 /* for mult. PCI interrupts */ - -/* number of flows that can go through re-assembly */ -#define N_RX_FLOWS 64 - -#define TX_DESC_RING_SIZE DESC_RING_I_TO_S(TX_DESC_RING_INDEX) -#define RX_DESC_RING_SIZE DESC_RING_I_TO_S(RX_DESC_RING_INDEX) -#define RX_COMP_RING_SIZE COMP_RING_I_TO_S(RX_COMP_RING_INDEX) -#define TX_DESC_RINGN_INDEX(x) TX_DESC_RING_INDEX -#define RX_DESC_RINGN_INDEX(x) RX_DESC_RING_INDEX -#define RX_COMP_RINGN_INDEX(x) RX_COMP_RING_INDEX -#define TX_DESC_RINGN_SIZE(x) TX_DESC_RING_SIZE -#define RX_DESC_RINGN_SIZE(x) RX_DESC_RING_SIZE -#define RX_COMP_RINGN_SIZE(x) RX_COMP_RING_SIZE - -/* convert values */ -#define CAS_BASE(x, y) (((y) << (x ## _SHIFT)) & (x ## _MASK)) -#define CAS_VAL(x, y) (((y) & (x ## _MASK)) >> (x ## _SHIFT)) -#define CAS_TX_RINGN_BASE(y) ((TX_DESC_RINGN_INDEX(y) << \ - TX_CFG_DESC_RINGN_SHIFT(y)) & \ - TX_CFG_DESC_RINGN_MASK(y)) - -/* min is 2k, but we can't do jumbo frames unless it's at least 8k */ -#define CAS_MIN_PAGE_SHIFT 11 /* 2048 */ -#define CAS_JUMBO_PAGE_SHIFT 13 /* 8192 */ -#define CAS_MAX_PAGE_SHIFT 14 /* 16384 */ - -#define TX_DESC_BUFLEN_MASK 0x0000000000003FFFULL /* buffer length in - bytes. 0 - 9256 */ -#define TX_DESC_BUFLEN_SHIFT 0 -#define TX_DESC_CSUM_START_MASK 0x00000000001F8000ULL /* checksum start. # - of bytes to be - skipped before - csum calc begins. - value must be - even */ -#define TX_DESC_CSUM_START_SHIFT 15 -#define TX_DESC_CSUM_STUFF_MASK 0x000000001FE00000ULL /* checksum stuff. - byte offset w/in - the pkt for the - 1st csum byte. - must be > 8 */ -#define TX_DESC_CSUM_STUFF_SHIFT 21 -#define TX_DESC_CSUM_EN 0x0000000020000000ULL /* enable checksum */ -#define TX_DESC_EOF 0x0000000040000000ULL /* end of frame */ -#define TX_DESC_SOF 0x0000000080000000ULL /* start of frame */ -#define TX_DESC_INTME 0x0000000100000000ULL /* interrupt me */ -#define TX_DESC_NO_CRC 0x0000000200000000ULL /* debugging only. - CRC will not be - inserted into - outgoing frame. */ -struct cas_tx_desc { - u64 control; - u64 buffer; -}; - -/* descriptor ring for free buffers contains page-sized buffers. the index - * value is not used by the hw in any way. it's just stored and returned in - * the completion ring. - */ -struct cas_rx_desc { - u64 index; - u64 buffer; -}; - -/* received packets are put on the completion ring. */ -/* word 1 */ -#define RX_COMP1_DATA_SIZE_MASK 0x0000000007FFE000ULL -#define RX_COMP1_DATA_SIZE_SHIFT 13 -#define RX_COMP1_DATA_OFF_MASK 0x000001FFF8000000ULL -#define RX_COMP1_DATA_OFF_SHIFT 27 -#define RX_COMP1_DATA_INDEX_MASK 0x007FFE0000000000ULL -#define RX_COMP1_DATA_INDEX_SHIFT 41 -#define RX_COMP1_SKIP_MASK 0x0180000000000000ULL -#define RX_COMP1_SKIP_SHIFT 55 -#define RX_COMP1_RELEASE_NEXT 0x0200000000000000ULL -#define RX_COMP1_SPLIT_PKT 0x0400000000000000ULL -#define RX_COMP1_RELEASE_FLOW 0x0800000000000000ULL -#define RX_COMP1_RELEASE_DATA 0x1000000000000000ULL -#define RX_COMP1_RELEASE_HDR 0x2000000000000000ULL -#define RX_COMP1_TYPE_MASK 0xC000000000000000ULL -#define RX_COMP1_TYPE_SHIFT 62 - -/* word 2 */ -#define RX_COMP2_NEXT_INDEX_MASK 0x00000007FFE00000ULL -#define RX_COMP2_NEXT_INDEX_SHIFT 21 -#define RX_COMP2_HDR_SIZE_MASK 0x00000FF800000000ULL -#define RX_COMP2_HDR_SIZE_SHIFT 35 -#define RX_COMP2_HDR_OFF_MASK 0x0003F00000000000ULL -#define RX_COMP2_HDR_OFF_SHIFT 44 -#define RX_COMP2_HDR_INDEX_MASK 0xFFFC000000000000ULL -#define RX_COMP2_HDR_INDEX_SHIFT 50 - -/* word 3 */ -#define RX_COMP3_SMALL_PKT 0x0000000000000001ULL -#define RX_COMP3_JUMBO_PKT 0x0000000000000002ULL -#define RX_COMP3_JUMBO_HDR_SPLIT_EN 0x0000000000000004ULL -#define RX_COMP3_CSUM_START_MASK 0x000000000007F000ULL -#define RX_COMP3_CSUM_START_SHIFT 12 -#define RX_COMP3_FLOWID_MASK 0x0000000001F80000ULL -#define RX_COMP3_FLOWID_SHIFT 19 -#define RX_COMP3_OPCODE_MASK 0x000000000E000000ULL -#define RX_COMP3_OPCODE_SHIFT 25 -#define RX_COMP3_FORCE_FLAG 0x0000000010000000ULL -#define RX_COMP3_NO_ASSIST 0x0000000020000000ULL -#define RX_COMP3_LOAD_BAL_MASK 0x000001F800000000ULL -#define RX_COMP3_LOAD_BAL_SHIFT 35 -#define RX_PLUS_COMP3_ENC_PKT 0x0000020000000000ULL /* cas+ */ -#define RX_COMP3_L3_HEAD_OFF_MASK 0x0000FE0000000000ULL /* cas */ -#define RX_COMP3_L3_HEAD_OFF_SHIFT 41 -#define RX_PLUS_COMP_L3_HEAD_OFF_MASK 0x0000FC0000000000ULL /* cas+ */ -#define RX_PLUS_COMP_L3_HEAD_OFF_SHIFT 42 -#define RX_COMP3_SAP_MASK 0xFFFF000000000000ULL -#define RX_COMP3_SAP_SHIFT 48 - -/* word 4 */ -#define RX_COMP4_TCP_CSUM_MASK 0x000000000000FFFFULL -#define RX_COMP4_TCP_CSUM_SHIFT 0 -#define RX_COMP4_PKT_LEN_MASK 0x000000003FFF0000ULL -#define RX_COMP4_PKT_LEN_SHIFT 16 -#define RX_COMP4_PERFECT_MATCH_MASK 0x00000003C0000000ULL -#define RX_COMP4_PERFECT_MATCH_SHIFT 30 -#define RX_COMP4_ZERO 0x0000080000000000ULL -#define RX_COMP4_HASH_VAL_MASK 0x0FFFF00000000000ULL -#define RX_COMP4_HASH_VAL_SHIFT 44 -#define RX_COMP4_HASH_PASS 0x1000000000000000ULL -#define RX_COMP4_BAD 0x4000000000000000ULL -#define RX_COMP4_LEN_MISMATCH 0x8000000000000000ULL - -/* we encode the following: ring/index/release. only 14 bits - * are usable. - * NOTE: the encoding is dependent upon RX_DESC_RING_SIZE and - * MAX_RX_DESC_RINGS. */ -#define RX_INDEX_NUM_MASK 0x0000000000000FFFULL -#define RX_INDEX_NUM_SHIFT 0 -#define RX_INDEX_RING_MASK 0x0000000000001000ULL -#define RX_INDEX_RING_SHIFT 12 -#define RX_INDEX_RELEASE 0x0000000000002000ULL - -struct cas_rx_comp { - u64 word1; - u64 word2; - u64 word3; - u64 word4; -}; - -enum link_state { - link_down = 0, /* No link, will retry */ - link_aneg, /* Autoneg in progress */ - link_force_try, /* Try Forced link speed */ - link_force_ret, /* Forced mode worked, retrying autoneg */ - link_force_ok, /* Stay in forced mode */ - link_up /* Link is up */ -}; - -typedef struct cas_page { - struct list_head list; - struct page *buffer; - dma_addr_t dma_addr; - int used; -} cas_page_t; - - -/* some alignment constraints: - * TX DESC, RX DESC, and RX COMP must each be 8K aligned. - * TX COMPWB must be 8-byte aligned. - * to accomplish this, here's what we do: - * - * INIT_BLOCK_RX_COMP = 64k (already aligned) - * INIT_BLOCK_RX_DESC = 8k - * INIT_BLOCK_TX = 8k - * INIT_BLOCK_RX1_DESC = 8k - * TX COMPWB - */ -#define INIT_BLOCK_TX (TX_DESC_RING_SIZE) -#define INIT_BLOCK_RX_DESC (RX_DESC_RING_SIZE) -#define INIT_BLOCK_RX_COMP (RX_COMP_RING_SIZE) - -struct cas_init_block { - struct cas_rx_comp rxcs[N_RX_COMP_RINGS][INIT_BLOCK_RX_COMP]; - struct cas_rx_desc rxds[N_RX_DESC_RINGS][INIT_BLOCK_RX_DESC]; - struct cas_tx_desc txds[N_TX_RINGS][INIT_BLOCK_TX]; - u64 tx_compwb; -}; - -/* tiny buffers to deal with target abort issue. we allocate a bit - * over so that we don't have target abort issues with these buffers - * as well. - */ -#define TX_TINY_BUF_LEN 0x100 -#define TX_TINY_BUF_BLOCK ((INIT_BLOCK_TX + 1)*TX_TINY_BUF_LEN) - -struct cas_tiny_count { - int nbufs; - int used; -}; - -struct cas { - spinlock_t lock; /* for most bits */ - spinlock_t tx_lock[N_TX_RINGS]; /* tx bits */ - spinlock_t stat_lock[N_TX_RINGS + 1]; /* for stat gathering */ - spinlock_t rx_inuse_lock; /* rx inuse list */ - spinlock_t rx_spare_lock; /* rx spare list */ - - void __iomem *regs; - int tx_new[N_TX_RINGS], tx_old[N_TX_RINGS]; - int rx_old[N_RX_DESC_RINGS]; - int rx_cur[N_RX_COMP_RINGS], rx_new[N_RX_COMP_RINGS]; - int rx_last[N_RX_DESC_RINGS]; - - /* Set when chip is actually in operational state - * (ie. not power managed) */ - int hw_running; - int opened; - struct semaphore pm_sem; /* open/close/suspend/resume */ - - struct cas_init_block *init_block; - struct cas_tx_desc *init_txds[MAX_TX_RINGS]; - struct cas_rx_desc *init_rxds[MAX_RX_DESC_RINGS]; - struct cas_rx_comp *init_rxcs[MAX_RX_COMP_RINGS]; - - /* we use sk_buffs for tx and pages for rx. the rx skbuffs - * are there for flow re-assembly. */ - struct sk_buff *tx_skbs[N_TX_RINGS][TX_DESC_RING_SIZE]; - struct sk_buff_head rx_flows[N_RX_FLOWS]; - cas_page_t *rx_pages[N_RX_DESC_RINGS][RX_DESC_RING_SIZE]; - struct list_head rx_spare_list, rx_inuse_list; - int rx_spares_needed; - - /* for small packets when copying would be quicker than - mapping */ - struct cas_tiny_count tx_tiny_use[N_TX_RINGS][TX_DESC_RING_SIZE]; - u8 *tx_tiny_bufs[N_TX_RINGS]; - - u32 msg_enable; - - /* N_TX_RINGS must be >= N_RX_DESC_RINGS */ - struct net_device_stats net_stats[N_TX_RINGS + 1]; - - u32 pci_cfg[64 >> 2]; - u8 pci_revision; - - int phy_type; - int phy_addr; - u32 phy_id; -#define CAS_FLAG_1000MB_CAP 0x00000001 -#define CAS_FLAG_REG_PLUS 0x00000002 -#define CAS_FLAG_TARGET_ABORT 0x00000004 -#define CAS_FLAG_SATURN 0x00000008 -#define CAS_FLAG_RXD_POST_MASK 0x000000F0 -#define CAS_FLAG_RXD_POST_SHIFT 4 -#define CAS_FLAG_RXD_POST(x) ((1 << (CAS_FLAG_RXD_POST_SHIFT + (x))) & \ - CAS_FLAG_RXD_POST_MASK) -#define CAS_FLAG_ENTROPY_DEV 0x00000100 -#define CAS_FLAG_NO_HW_CSUM 0x00000200 - u32 cas_flags; - int packet_min; /* minimum packet size */ - int tx_fifo_size; - int rx_fifo_size; - int rx_pause_off; - int rx_pause_on; - int crc_size; /* 4 if half-duplex */ - - int pci_irq_INTC; - int min_frame_size; /* for tx fifo workaround */ - - /* page size allocation */ - int page_size; - int page_order; - int mtu_stride; - - u32 mac_rx_cfg; - - /* Autoneg & PHY control */ - int link_cntl; - int link_fcntl; - enum link_state lstate; - struct timer_list link_timer; - int timer_ticks; - struct work_struct reset_task; -#if 0 - atomic_t reset_task_pending; -#else - atomic_t reset_task_pending; - atomic_t reset_task_pending_mtu; - atomic_t reset_task_pending_spare; - atomic_t reset_task_pending_all; -#endif - -#ifdef CONFIG_CASSINI_QGE_DEBUG - atomic_t interrupt_seen; /* 1 if any interrupts are getting through */ -#endif - - /* Link-down problem workaround */ -#define LINK_TRANSITION_UNKNOWN 0 -#define LINK_TRANSITION_ON_FAILURE 1 -#define LINK_TRANSITION_STILL_FAILED 2 -#define LINK_TRANSITION_LINK_UP 3 -#define LINK_TRANSITION_LINK_CONFIG 4 -#define LINK_TRANSITION_LINK_DOWN 5 -#define LINK_TRANSITION_REQUESTED_RESET 6 - int link_transition; - int link_transition_jiffies_valid; - unsigned long link_transition_jiffies; - - /* Tuning */ - u8 orig_cacheline_size; /* value when loaded */ -#define CAS_PREF_CACHELINE_SIZE 0x20 /* Minimum desired */ - - /* Diagnostic counters and state. */ - int casreg_len; /* reg-space size for dumping */ - u64 pause_entered; - u16 pause_last_time_recvd; - - dma_addr_t block_dvma, tx_tiny_dvma[N_TX_RINGS]; - struct pci_dev *pdev; - struct net_device *dev; -}; - -#define TX_DESC_NEXT(r, x) (((x) + 1) & (TX_DESC_RINGN_SIZE(r) - 1)) -#define RX_DESC_ENTRY(r, x) ((x) & (RX_DESC_RINGN_SIZE(r) - 1)) -#define RX_COMP_ENTRY(r, x) ((x) & (RX_COMP_RINGN_SIZE(r) - 1)) - -#define TX_BUFF_COUNT(r, x, y) ((x) <= (y) ? ((y) - (x)) : \ - (TX_DESC_RINGN_SIZE(r) - (x) + (y))) - -#define TX_BUFFS_AVAIL(cp, i) ((cp)->tx_old[(i)] <= (cp)->tx_new[(i)] ? \ - (cp)->tx_old[(i)] + (TX_DESC_RINGN_SIZE(i) - 1) - (cp)->tx_new[(i)] : \ - (cp)->tx_old[(i)] - (cp)->tx_new[(i)] - 1) - -#define CAS_ALIGN(addr, align) \ - (((unsigned long) (addr) + ((align) - 1UL)) & ~((align) - 1)) - -#define RX_FIFO_SIZE 16384 -#define EXPANSION_ROM_SIZE 65536 - -#define CAS_MC_EXACT_MATCH_SIZE 15 -#define CAS_MC_HASH_SIZE 256 -#define CAS_MC_HASH_MAX (CAS_MC_EXACT_MATCH_SIZE + \ - CAS_MC_HASH_SIZE) - -#define TX_TARGET_ABORT_LEN 0x20 -#define RX_SWIVEL_OFF_VAL 0x2 -#define RX_AE_FREEN_VAL(x) (RX_DESC_RINGN_SIZE(x) >> 1) -#define RX_AE_COMP_VAL (RX_COMP_RING_SIZE >> 1) -#define RX_BLANK_INTR_PKT_VAL 0x05 -#define RX_BLANK_INTR_TIME_VAL 0x0F -#define HP_TCP_THRESH_VAL 1530 /* reduce to enable reassembly */ - -#define RX_SPARE_COUNT (RX_DESC_RING_SIZE >> 1) -#define RX_SPARE_RECOVER_VAL (RX_SPARE_COUNT >> 2) - -#endif /* _CASSINI_H */ diff --git a/trunk/drivers/net/ibmveth.c b/trunk/drivers/net/ibmveth.c index a2c4dd4fb221..32d5fabd4b10 100644 --- a/trunk/drivers/net/ibmveth.c +++ b/trunk/drivers/net/ibmveth.c @@ -99,7 +99,7 @@ static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance, struct pt_regs static inline void ibmveth_schedule_replenishing(struct ibmveth_adapter*); #ifdef CONFIG_PROC_FS -#define IBMVETH_PROC_DIR "net/ibmveth" +#define IBMVETH_PROC_DIR "ibmveth" static struct proc_dir_entry *ibmveth_proc_dir; #endif @@ -1010,7 +1010,7 @@ static int __devexit ibmveth_remove(struct vio_dev *dev) #ifdef CONFIG_PROC_FS static void ibmveth_proc_register_driver(void) { - ibmveth_proc_dir = proc_mkdir(IBMVETH_PROC_DIR, NULL); + ibmveth_proc_dir = create_proc_entry(IBMVETH_PROC_DIR, S_IFDIR, proc_net); if (ibmveth_proc_dir) { SET_MODULE_OWNER(ibmveth_proc_dir); } @@ -1018,7 +1018,7 @@ static void ibmveth_proc_register_driver(void) static void ibmveth_proc_unregister_driver(void) { - remove_proc_entry(IBMVETH_PROC_DIR, NULL); + remove_proc_entry(IBMVETH_PROC_DIR, proc_net); } static void *ibmveth_seq_start(struct seq_file *seq, loff_t *pos) diff --git a/trunk/drivers/net/irda/vlsi_ir.c b/trunk/drivers/net/irda/vlsi_ir.c index 651c5a6578fd..6d9de626c967 100644 --- a/trunk/drivers/net/irda/vlsi_ir.c +++ b/trunk/drivers/net/irda/vlsi_ir.c @@ -1875,11 +1875,11 @@ static int __init vlsi_mod_init(void) sirpulse = !!sirpulse; - /* proc_mkdir returns NULL if !CONFIG_PROC_FS. + /* create_proc_entry returns NULL if !CONFIG_PROC_FS. * Failure to create the procfs entry is handled like running * without procfs - it's not required for the driver to work. */ - vlsi_proc_root = proc_mkdir(PROC_DIR, NULL); + vlsi_proc_root = create_proc_entry(PROC_DIR, S_IFDIR, NULL); if (vlsi_proc_root) { /* protect registered procdir against module removal. * Because we are in the module init path there's no race diff --git a/trunk/drivers/net/pppoe.c b/trunk/drivers/net/pppoe.c index a842ecc60a34..82f236cc3b9b 100644 --- a/trunk/drivers/net/pppoe.c +++ b/trunk/drivers/net/pppoe.c @@ -1070,7 +1070,7 @@ static int __init pppoe_proc_init(void) { struct proc_dir_entry *p; - p = create_proc_entry("net/pppoe", S_IRUGO, NULL); + p = create_proc_entry("pppoe", S_IRUGO, proc_net); if (!p) return -ENOMEM; @@ -1142,7 +1142,7 @@ static void __exit pppoe_exit(void) dev_remove_pack(&pppoes_ptype); dev_remove_pack(&pppoed_ptype); unregister_netdevice_notifier(&pppoe_notifier); - remove_proc_entry("net/pppoe", NULL); + remove_proc_entry("pppoe", proc_net); proto_unregister(&pppoe_sk_proto); } diff --git a/trunk/drivers/net/sk98lin/skge.c b/trunk/drivers/net/sk98lin/skge.c index b18c92cb629e..2e72d79a143c 100644 --- a/trunk/drivers/net/sk98lin/skge.c +++ b/trunk/drivers/net/sk98lin/skge.c @@ -235,7 +235,7 @@ static int SkDrvDeInitAdapter(SK_AC *pAC, int devNbr); * Extern Function Prototypes * ******************************************************************************/ -static const char SKRootName[] = "net/sk98lin"; +static const char SKRootName[] = "sk98lin"; static struct proc_dir_entry *pSkRootDir; extern struct file_operations sk_proc_fops; @@ -5242,20 +5242,20 @@ static int __init skge_init(void) { int error; - pSkRootDir = proc_mkdir(SKRootName, NULL); + pSkRootDir = proc_mkdir(SKRootName, proc_net); if (pSkRootDir) pSkRootDir->owner = THIS_MODULE; error = pci_register_driver(&skge_driver); if (error) - remove_proc_entry(SKRootName, NULL); + proc_net_remove(SKRootName); return error; } static void __exit skge_exit(void) { pci_unregister_driver(&skge_driver); - remove_proc_entry(SKRootName, NULL); + proc_net_remove(SKRootName); } diff --git a/trunk/drivers/pcmcia/rsrc_nonstatic.c b/trunk/drivers/pcmcia/rsrc_nonstatic.c index f9a5c70284b5..c42455d20eb6 100644 --- a/trunk/drivers/pcmcia/rsrc_nonstatic.c +++ b/trunk/drivers/pcmcia/rsrc_nonstatic.c @@ -691,7 +691,7 @@ static int adjust_memory(struct pcmcia_socket *s, unsigned int action, unsigned unsigned long size = end - start + 1; int ret = 0; - if (end < start) + if (end <= start) return -EINVAL; down(&rsrc_sem); @@ -724,7 +724,7 @@ static int adjust_io(struct pcmcia_socket *s, unsigned int action, unsigned long unsigned long size = end - start + 1; int ret = 0; - if (end < start) + if (end <= start) return -EINVAL; if (end > IO_SPACE_LIMIT) @@ -817,7 +817,7 @@ static int nonstatic_autoadd_resources(struct pcmcia_socket *s) /* if we got at least one of IO, and one of MEM, we can be glad and * activate the PCMCIA subsystem */ - if (done == (IORESOURCE_MEM | IORESOURCE_IO)) + if (done & (IORESOURCE_MEM | IORESOURCE_IO)) s->resource_setup_done = 1; return 0; @@ -925,7 +925,7 @@ static ssize_t store_io_db(struct class_device *class_dev, const char *buf, size return -EINVAL; } } - if (end_addr < start_addr) + if (end_addr <= start_addr) return -EINVAL; ret = adjust_io(s, add, start_addr, end_addr); @@ -977,7 +977,7 @@ static ssize_t store_mem_db(struct class_device *class_dev, const char *buf, siz return -EINVAL; } } - if (end_addr < start_addr) + if (end_addr <= start_addr) return -EINVAL; ret = adjust_memory(s, add, start_addr, end_addr); diff --git a/trunk/drivers/scsi/sg.c b/trunk/drivers/scsi/sg.c index ad94367df430..4d09a6e4dd2e 100644 --- a/trunk/drivers/scsi/sg.c +++ b/trunk/drivers/scsi/sg.c @@ -2849,7 +2849,8 @@ sg_proc_init(void) struct proc_dir_entry *pdep; struct sg_proc_leaf * leaf; - sg_proc_sgp = proc_mkdir(sg_proc_sg_dirname, NULL); + sg_proc_sgp = create_proc_entry(sg_proc_sg_dirname, + S_IFDIR | S_IRUGO | S_IXUGO, NULL); if (!sg_proc_sgp) return 1; for (k = 0; k < num_leaves; ++k) { diff --git a/trunk/drivers/serial/s3c2410.c b/trunk/drivers/serial/s3c2410.c index 1195e6a0901a..c361c6fb0809 100644 --- a/trunk/drivers/serial/s3c2410.c +++ b/trunk/drivers/serial/s3c2410.c @@ -753,8 +753,8 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, { struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); struct s3c24xx_uart_port *ourport = to_ourport(port); - struct s3c24xx_uart_clksrc *clksrc = NULL; - struct clk *clk = NULL; + struct s3c24xx_uart_clksrc *clksrc; + struct clk *clk; unsigned long flags; unsigned int baud, quot; unsigned int ulcon; diff --git a/trunk/drivers/usb/media/vicam.c b/trunk/drivers/usb/media/vicam.c index 0bc0b1247a6b..4a5857c53f11 100644 --- a/trunk/drivers/usb/media/vicam.c +++ b/trunk/drivers/usb/media/vicam.c @@ -1148,7 +1148,7 @@ vicam_write_proc_gain(struct file *file, const char *buffer, static void vicam_create_proc_root(void) { - vicam_proc_root = proc_mkdir("video/vicam", NULL); + vicam_proc_root = create_proc_entry("video/vicam", S_IFDIR, 0); if (vicam_proc_root) vicam_proc_root->owner = THIS_MODULE; @@ -1181,7 +1181,7 @@ vicam_create_proc_entry(struct vicam_camera *cam) sprintf(name, "video%d", cam->vdev.minor); - cam->proc_dir = proc_mkdir(name, vicam_proc_root); + cam->proc_dir = create_proc_entry(name, S_IFDIR, vicam_proc_root); if ( !cam->proc_dir ) return; // FIXME: We should probably return an error here diff --git a/trunk/drivers/video/Kconfig b/trunk/drivers/video/Kconfig index 1cd942abb580..773ae11b4a19 100644 --- a/trunk/drivers/video/Kconfig +++ b/trunk/drivers/video/Kconfig @@ -768,7 +768,6 @@ config FB_INTEL select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - select FB_SOFT_CURSOR help This driver supports the on-board graphics built in to the Intel 830M/845G/852GM/855GM/865G chipsets. diff --git a/trunk/drivers/video/cyblafb.c b/trunk/drivers/video/cyblafb.c index 6992100a508c..ae2762cb5608 100644 --- a/trunk/drivers/video/cyblafb.c +++ b/trunk/drivers/video/cyblafb.c @@ -410,21 +410,20 @@ static void cyblafb_imageblit(struct fb_info *info, out32(GE0C,point(image->dx+image->width-1,image->dy+image->height-1)); while(index < index_end) { - const char *p = image->data + index; for(i=0;idata + index))); index+=4; } switch(width_dbs) { case 0: break; - case 8: out32(GE9C,*(u8*)p); + case 8: out32(GE9C,*((u8*)((u32)image->data+index))); index+=1; break; - case 16: out32(GE9C,*(u16*)p); + case 16: out32(GE9C,*((u16*)((u32)image->data+index))); index+=2; break; - case 24: out32(GE9C,*(u16*)p | *(u8*)(p+2)<<16); + case 24: out32(GE9C,(u32)(*((u16*)((u32)image->data+index))) | + (u32)(*((u8*)((u32)image->data+index+2)))<<16); index+=3; break; } diff --git a/trunk/drivers/video/i810/i810-i2c.c b/trunk/drivers/video/i810/i810-i2c.c index 689d2586366d..fda53aac1fc1 100644 --- a/trunk/drivers/video/i810/i810-i2c.c +++ b/trunk/drivers/video/i810/i810-i2c.c @@ -44,7 +44,7 @@ static void i810i2c_setscl(void *data, int state) { struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data; struct i810fb_par *par = chan->par; - u8 __iomem *mmio = par->mmio_start_virtual; + u8 *mmio = par->mmio_start_virtual; i810_writel(mmio, GPIOB, (state ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); @@ -55,7 +55,7 @@ static void i810i2c_setsda(void *data, int state) { struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data; struct i810fb_par *par = chan->par; - u8 __iomem *mmio = par->mmio_start_virtual; + u8 *mmio = par->mmio_start_virtual; i810_writel(mmio, GPIOB, (state ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK); @@ -66,7 +66,7 @@ static int i810i2c_getscl(void *data) { struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data; struct i810fb_par *par = chan->par; - u8 __iomem *mmio = par->mmio_start_virtual; + u8 *mmio = par->mmio_start_virtual; i810_writel(mmio, GPIOB, SCL_DIR_MASK); i810_writel(mmio, GPIOB, 0); @@ -77,7 +77,7 @@ static int i810i2c_getsda(void *data) { struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data; struct i810fb_par *par = chan->par; - u8 __iomem *mmio = par->mmio_start_virtual; + u8 *mmio = par->mmio_start_virtual; i810_writel(mmio, GPIOB, SDA_DIR_MASK); i810_writel(mmio, GPIOB, 0); @@ -88,7 +88,7 @@ static void i810ddc_setscl(void *data, int state) { struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data; struct i810fb_par *par = chan->par; - u8 __iomem *mmio = par->mmio_start_virtual; + u8 *mmio = par->mmio_start_virtual; i810_writel(mmio, GPIOA, (state ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); @@ -99,7 +99,7 @@ static void i810ddc_setsda(void *data, int state) { struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data; struct i810fb_par *par = chan->par; - u8 __iomem *mmio = par->mmio_start_virtual; + u8 *mmio = par->mmio_start_virtual; i810_writel(mmio, GPIOA, (state ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK); @@ -110,7 +110,7 @@ static int i810ddc_getscl(void *data) { struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data; struct i810fb_par *par = chan->par; - u8 __iomem *mmio = par->mmio_start_virtual; + u8 *mmio = par->mmio_start_virtual; i810_writel(mmio, GPIOA, SCL_DIR_MASK); i810_writel(mmio, GPIOA, 0); @@ -121,7 +121,7 @@ static int i810ddc_getsda(void *data) { struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data; struct i810fb_par *par = chan->par; - u8 __iomem *mmio = par->mmio_start_virtual; + u8 *mmio = par->mmio_start_virtual; i810_writel(mmio, GPIOA, SDA_DIR_MASK); i810_writel(mmio, GPIOA, 0); diff --git a/trunk/drivers/video/intelfb/intelfbdrv.c b/trunk/drivers/video/intelfb/intelfbdrv.c index 80a09344f1aa..bf62e6ed0382 100644 --- a/trunk/drivers/video/intelfb/intelfbdrv.c +++ b/trunk/drivers/video/intelfb/intelfbdrv.c @@ -226,7 +226,7 @@ MODULE_DEVICE_TABLE(pci, intelfb_pci_table); static int accel = 1; static int vram = 4; -static int hwcursor = 0; +static int hwcursor = 1; static int mtrr = 1; static int fixed = 0; static int noinit = 0; @@ -609,9 +609,15 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) dinfo->accel = 0; } + if (MB(voffset) < stolen_size) + offset = (stolen_size >> 12); + else + offset = ROUND_UP_TO_PAGE(MB(voffset))/GTT_PAGE_SIZE; + /* Framebuffer parameters - Use all the stolen memory if >= vram */ - if (ROUND_UP_TO_PAGE(stolen_size) >= MB(vram)) { + if (ROUND_UP_TO_PAGE(stolen_size) >= ((offset << 12) + MB(vram))) { dinfo->fb.size = ROUND_UP_TO_PAGE(stolen_size); + dinfo->fb.offset = 0; dinfo->fbmem_gart = 0; } else { dinfo->fb.size = MB(vram); @@ -642,11 +648,6 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) return -ENODEV; } - if (MB(voffset) < stolen_size) - offset = (stolen_size >> 12); - else - offset = ROUND_UP_TO_PAGE(MB(voffset))/GTT_PAGE_SIZE; - /* set the mem offsets - set them after the already used pages */ if (dinfo->accel) { dinfo->ring.offset = offset + gtt_info.current_memory; @@ -661,11 +662,10 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) + (dinfo->cursor.size >> 12); } - /* Allocate memories (which aren't stolen) */ /* Map the fb and MMIO regions */ /* ioremap only up to the end of used aperture */ dinfo->aperture.virtual = (u8 __iomem *)ioremap_nocache - (dinfo->aperture.physical, ((offset + dinfo->fb.offset) << 12) + (dinfo->aperture.physical, (dinfo->fb.offset << 12) + dinfo->fb.size); if (!dinfo->aperture.virtual) { ERR_MSG("Cannot remap FB region.\n"); @@ -682,6 +682,7 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) return -ENODEV; } + /* Allocate memories (which aren't stolen) */ if (dinfo->accel) { if (!(dinfo->gtt_ring_mem = agp_allocate_memory(bridge, dinfo->ring.size >> 12, @@ -1483,7 +1484,7 @@ intelfb_cursor(struct fb_info *info, struct fb_cursor *cursor) #endif if (!dinfo->hwcursor) - return soft_cursor(info, cursor); + return -ENXIO; intelfbhw_cursor_hide(dinfo); diff --git a/trunk/drivers/video/pxafb.c b/trunk/drivers/video/pxafb.c index 34d4dcc0320a..194eed0a238c 100644 --- a/trunk/drivers/video/pxafb.c +++ b/trunk/drivers/video/pxafb.c @@ -260,9 +260,9 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) } #ifdef CONFIG_CPU_FREQ - DPRINTK("dma period = %d ps, clock = %d kHz\n", - pxafb_display_dma_period(var), - get_clk_frequency_khz(0)); + pr_debug("pxafb: dma period = %d ps, clock = %d kHz\n", + pxafb_display_dma_period(var), + get_clk_frequency_khz(0)); #endif return 0; @@ -270,7 +270,7 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) static inline void pxafb_set_truecolor(u_int is_true_color) { - DPRINTK("true_color = %d\n", is_true_color); + pr_debug("pxafb: true_color = %d\n", is_true_color); // do your machine-specific setup if needed } @@ -284,7 +284,7 @@ static int pxafb_set_par(struct fb_info *info) struct fb_var_screeninfo *var = &info->var; unsigned long palette_mem_size; - DPRINTK("set_par\n"); + pr_debug("pxafb: set_par\n"); if (var->bits_per_pixel == 16) fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR; @@ -308,7 +308,7 @@ static int pxafb_set_par(struct fb_info *info) palette_mem_size = fbi->palette_size * sizeof(u16); - DPRINTK("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size); + pr_debug("pxafb: palette_mem_size = 0x%08lx\n", palette_mem_size); fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size); fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size; @@ -369,7 +369,7 @@ static int pxafb_blank(int blank, struct fb_info *info) struct pxafb_info *fbi = (struct pxafb_info *)info; int i; - DPRINTK("pxafb_blank: blank=%d\n", blank); + pr_debug("pxafb: blank=%d\n", blank); switch (blank) { case FB_BLANK_POWERDOWN: @@ -508,15 +508,15 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info * u_long flags; u_int lines_per_panel, pcd = get_pcd(var->pixclock); - DPRINTK("Configuring PXA LCD\n"); + pr_debug("pxafb: Configuring PXA LCD\n"); - DPRINTK("var: xres=%d hslen=%d lm=%d rm=%d\n", - var->xres, var->hsync_len, - var->left_margin, var->right_margin); - DPRINTK("var: yres=%d vslen=%d um=%d bm=%d\n", - var->yres, var->vsync_len, - var->upper_margin, var->lower_margin); - DPRINTK("var: pixclock=%d pcd=%d\n", var->pixclock, pcd); + pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", + var->xres, var->hsync_len, + var->left_margin, var->right_margin); + pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", + var->yres, var->vsync_len, + var->upper_margin, var->lower_margin); + pr_debug("var: pixclock=%d pcd=%d\n", var->pixclock, pcd); #if DEBUG_VAR if (var->xres < 16 || var->xres > 1024) @@ -589,10 +589,10 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info * if (pcd) new_regs.lccr3 |= LCCR3_PixClkDiv(pcd); - DPRINTK("nlccr0 = 0x%08x\n", new_regs.lccr0); - DPRINTK("nlccr1 = 0x%08x\n", new_regs.lccr1); - DPRINTK("nlccr2 = 0x%08x\n", new_regs.lccr2); - DPRINTK("nlccr3 = 0x%08x\n", new_regs.lccr3); + pr_debug("nlccr0 = 0x%08x\n", new_regs.lccr0); + pr_debug("nlccr1 = 0x%08x\n", new_regs.lccr1); + pr_debug("nlccr2 = 0x%08x\n", new_regs.lccr2); + pr_debug("nlccr3 = 0x%08x\n", new_regs.lccr3); /* Update shadow copy atomically */ local_irq_save(flags); @@ -637,24 +637,24 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info * } #if 0 - DPRINTK("fbi->dmadesc_fblow_cpu = 0x%p\n", fbi->dmadesc_fblow_cpu); - DPRINTK("fbi->dmadesc_fbhigh_cpu = 0x%p\n", fbi->dmadesc_fbhigh_cpu); - DPRINTK("fbi->dmadesc_palette_cpu = 0x%p\n", fbi->dmadesc_palette_cpu); - DPRINTK("fbi->dmadesc_fblow_dma = 0x%x\n", fbi->dmadesc_fblow_dma); - DPRINTK("fbi->dmadesc_fbhigh_dma = 0x%x\n", fbi->dmadesc_fbhigh_dma); - DPRINTK("fbi->dmadesc_palette_dma = 0x%x\n", fbi->dmadesc_palette_dma); - - DPRINTK("fbi->dmadesc_fblow_cpu->fdadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fdadr); - DPRINTK("fbi->dmadesc_fbhigh_cpu->fdadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fdadr); - DPRINTK("fbi->dmadesc_palette_cpu->fdadr = 0x%x\n", fbi->dmadesc_palette_cpu->fdadr); - - DPRINTK("fbi->dmadesc_fblow_cpu->fsadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fsadr); - DPRINTK("fbi->dmadesc_fbhigh_cpu->fsadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fsadr); - DPRINTK("fbi->dmadesc_palette_cpu->fsadr = 0x%x\n", fbi->dmadesc_palette_cpu->fsadr); - - DPRINTK("fbi->dmadesc_fblow_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fblow_cpu->ldcmd); - DPRINTK("fbi->dmadesc_fbhigh_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fbhigh_cpu->ldcmd); - DPRINTK("fbi->dmadesc_palette_cpu->ldcmd = 0x%x\n", fbi->dmadesc_palette_cpu->ldcmd); + pr_debug("fbi->dmadesc_fblow_cpu = 0x%p\n", fbi->dmadesc_fblow_cpu); + pr_debug("fbi->dmadesc_fbhigh_cpu = 0x%p\n", fbi->dmadesc_fbhigh_cpu); + pr_debug("fbi->dmadesc_palette_cpu = 0x%p\n", fbi->dmadesc_palette_cpu); + pr_debug("fbi->dmadesc_fblow_dma = 0x%x\n", fbi->dmadesc_fblow_dma); + pr_debug("fbi->dmadesc_fbhigh_dma = 0x%x\n", fbi->dmadesc_fbhigh_dma); + pr_debug("fbi->dmadesc_palette_dma = 0x%x\n", fbi->dmadesc_palette_dma); + + pr_debug("fbi->dmadesc_fblow_cpu->fdadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fdadr); + pr_debug("fbi->dmadesc_fbhigh_cpu->fdadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fdadr); + pr_debug("fbi->dmadesc_palette_cpu->fdadr = 0x%x\n", fbi->dmadesc_palette_cpu->fdadr); + + pr_debug("fbi->dmadesc_fblow_cpu->fsadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fsadr); + pr_debug("fbi->dmadesc_fbhigh_cpu->fsadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fsadr); + pr_debug("fbi->dmadesc_palette_cpu->fsadr = 0x%x\n", fbi->dmadesc_palette_cpu->fsadr); + + pr_debug("fbi->dmadesc_fblow_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fblow_cpu->ldcmd); + pr_debug("fbi->dmadesc_fbhigh_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fbhigh_cpu->ldcmd); + pr_debug("fbi->dmadesc_palette_cpu->ldcmd = 0x%x\n", fbi->dmadesc_palette_cpu->ldcmd); #endif fbi->reg_lccr0 = new_regs.lccr0; @@ -684,7 +684,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info * */ static inline void __pxafb_backlight_power(struct pxafb_info *fbi, int on) { - DPRINTK("backlight o%s\n", on ? "n" : "ff"); + pr_debug("pxafb: backlight o%s\n", on ? "n" : "ff"); if (pxafb_backlight_power) pxafb_backlight_power(on); @@ -692,7 +692,7 @@ static inline void __pxafb_backlight_power(struct pxafb_info *fbi, int on) static inline void __pxafb_lcd_power(struct pxafb_info *fbi, int on) { - DPRINTK("LCD power o%s\n", on ? "n" : "ff"); + pr_debug("pxafb: LCD power o%s\n", on ? "n" : "ff"); if (pxafb_lcd_power) pxafb_lcd_power(on); @@ -740,13 +740,13 @@ static void pxafb_setup_gpio(struct pxafb_info *fbi) static void pxafb_enable_controller(struct pxafb_info *fbi) { - DPRINTK("Enabling LCD controller\n"); - DPRINTK("fdadr0 0x%08x\n", (unsigned int) fbi->fdadr0); - DPRINTK("fdadr1 0x%08x\n", (unsigned int) fbi->fdadr1); - DPRINTK("reg_lccr0 0x%08x\n", (unsigned int) fbi->reg_lccr0); - DPRINTK("reg_lccr1 0x%08x\n", (unsigned int) fbi->reg_lccr1); - DPRINTK("reg_lccr2 0x%08x\n", (unsigned int) fbi->reg_lccr2); - DPRINTK("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3); + pr_debug("pxafb: Enabling LCD controller\n"); + pr_debug("fdadr0 0x%08x\n", (unsigned int) fbi->fdadr0); + pr_debug("fdadr1 0x%08x\n", (unsigned int) fbi->fdadr1); + pr_debug("reg_lccr0 0x%08x\n", (unsigned int) fbi->reg_lccr0); + pr_debug("reg_lccr1 0x%08x\n", (unsigned int) fbi->reg_lccr1); + pr_debug("reg_lccr2 0x%08x\n", (unsigned int) fbi->reg_lccr2); + pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3); /* enable LCD controller clock */ pxa_set_cken(CKEN16_LCD, 1); @@ -761,19 +761,19 @@ static void pxafb_enable_controller(struct pxafb_info *fbi) FDADR1 = fbi->fdadr1; LCCR0 |= LCCR0_ENB; - DPRINTK("FDADR0 0x%08x\n", (unsigned int) FDADR0); - DPRINTK("FDADR1 0x%08x\n", (unsigned int) FDADR1); - DPRINTK("LCCR0 0x%08x\n", (unsigned int) LCCR0); - DPRINTK("LCCR1 0x%08x\n", (unsigned int) LCCR1); - DPRINTK("LCCR2 0x%08x\n", (unsigned int) LCCR2); - DPRINTK("LCCR3 0x%08x\n", (unsigned int) LCCR3); + pr_debug("FDADR0 0x%08x\n", (unsigned int) FDADR0); + pr_debug("FDADR1 0x%08x\n", (unsigned int) FDADR1); + pr_debug("LCCR0 0x%08x\n", (unsigned int) LCCR0); + pr_debug("LCCR1 0x%08x\n", (unsigned int) LCCR1); + pr_debug("LCCR2 0x%08x\n", (unsigned int) LCCR2); + pr_debug("LCCR3 0x%08x\n", (unsigned int) LCCR3); } static void pxafb_disable_controller(struct pxafb_info *fbi) { DECLARE_WAITQUEUE(wait, current); - DPRINTK("Disabling LCD controller\n"); + pr_debug("pxafb: disabling LCD controller\n"); set_current_state(TASK_UNINTERRUPTIBLE); add_wait_queue(&fbi->ctrlr_wait, &wait); @@ -1039,7 +1039,7 @@ static int __init pxafb_map_video_memory(struct pxafb_info *fbi) fbi->palette_size = fbi->fb.var.bits_per_pixel == 8 ? 256 : 16; palette_mem_size = fbi->palette_size * sizeof(u16); - DPRINTK("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size); + pr_debug("pxafb: palette_mem_size = 0x%08lx\n", palette_mem_size); fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size); fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size; diff --git a/trunk/drivers/video/pxafb.h b/trunk/drivers/video/pxafb.h index 22c00be786a8..47f41f70db7a 100644 --- a/trunk/drivers/video/pxafb.h +++ b/trunk/drivers/video/pxafb.h @@ -113,15 +113,6 @@ struct pxafb_info { #define PXA_NAME "PXA" -/* - * Debug macros - */ -#if DEBUG -# define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args) -#else -# define DPRINTK(fmt, args...) -#endif - /* * Minimum X and Y resolutions */ diff --git a/trunk/drivers/video/s3c2410fb.c b/trunk/drivers/video/s3c2410fb.c index 5ab79afb53b7..00c0223a352e 100644 --- a/trunk/drivers/video/s3c2410fb.c +++ b/trunk/drivers/video/s3c2410fb.c @@ -228,8 +228,8 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var, * information */ -static void s3c2410fb_activate_var(struct s3c2410fb_info *fbi, - struct fb_var_screeninfo *var) +static int s3c2410fb_activate_var(struct s3c2410fb_info *fbi, + struct fb_var_screeninfo *var) { fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK; diff --git a/trunk/fs/read_write.c b/trunk/fs/read_write.c index a091ee4f430d..b60324aaa2b6 100644 --- a/trunk/fs/read_write.c +++ b/trunk/fs/read_write.c @@ -497,9 +497,6 @@ static ssize_t do_readv_writev(int type, struct file *file, } ret = rw_verify_area(type, file, pos, tot_len); - if (ret) - goto out; - ret = security_file_permission(file, type == READ ? MAY_READ : MAY_WRITE); if (ret) goto out; diff --git a/trunk/include/asm-arm/arch-rpc/hardware.h b/trunk/include/asm-arm/arch-rpc/hardware.h index 9d7f87375aa7..be9754a05c19 100644 --- a/trunk/include/asm-arm/arch-rpc/hardware.h +++ b/trunk/include/asm-arm/arch-rpc/hardware.h @@ -15,7 +15,7 @@ #include #ifndef __ASSEMBLY__ -#define IOMEM(x) ((void __iomem *)(unsigned long)(x)) +#define IOMEM(x) ((void __iomem *)(x)) #else #define IOMEM(x) x #endif /* __ASSEMBLY__ */ @@ -52,7 +52,7 @@ /* * IO Addresses */ -#define VIDC_BASE IOMEM(0xe0400000) +#define VIDC_BASE (void __iomem *)0xe0400000 #define EXPMASK_BASE 0xe0360000 #define IOMD_BASE IOMEM(0xe0200000) #define IOC_BASE IOMEM(0xe0200000) diff --git a/trunk/include/asm-arm/arch-versatile/io.h b/trunk/include/asm-arm/arch-versatile/io.h index 47e904cf25c7..9f895bf61494 100644 --- a/trunk/include/asm-arm/arch-versatile/io.h +++ b/trunk/include/asm-arm/arch-versatile/io.h @@ -22,11 +22,7 @@ #define IO_SPACE_LIMIT 0xffffffff -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} -#define __io(a) __io(a) +#define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) #define __mem_isa(a) (a) diff --git a/trunk/include/asm-ia64/uaccess.h b/trunk/include/asm-ia64/uaccess.h index 9adb51211c22..3a7829bb5954 100644 --- a/trunk/include/asm-ia64/uaccess.h +++ b/trunk/include/asm-ia64/uaccess.h @@ -187,8 +187,8 @@ extern void __get_user_unknown (void); ({ \ const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ __typeof__ (size) __gu_size = (size); \ - long __gu_err = -EFAULT; \ - unsigned long __gu_val = 0; \ + long __gu_err = -EFAULT, __gu_val = 0; \ + \ if (!check || __access_ok(__gu_ptr, size, segment)) \ switch (__gu_size) { \ case 1: __get_user_size(__gu_val, __gu_ptr, 1, __gu_err); break; \ @@ -240,13 +240,13 @@ extern unsigned long __must_check __copy_user (void __user *to, const void __use static inline unsigned long __copy_to_user (void __user *to, const void *from, unsigned long count) { - return __copy_user(to, (__force void __user *) from, count); + return __copy_user(to, (void __user *) from, count); } static inline unsigned long __copy_from_user (void *to, const void __user *from, unsigned long count) { - return __copy_user((__force void __user *) to, from, count); + return __copy_user((void __user *) to, from, count); } #define __copy_to_user_inatomic __copy_to_user @@ -258,7 +258,7 @@ __copy_from_user (void *to, const void __user *from, unsigned long count) long __cu_len = (n); \ \ if (__access_ok(__cu_to, __cu_len, get_fs())) \ - __cu_len = __copy_user(__cu_to, (__force void __user *) __cu_from, __cu_len); \ + __cu_len = __copy_user(__cu_to, (void __user *) __cu_from, __cu_len); \ __cu_len; \ }) @@ -270,7 +270,7 @@ __copy_from_user (void *to, const void __user *from, unsigned long count) \ __chk_user_ptr(__cu_from); \ if (__access_ok(__cu_from, __cu_len, get_fs())) \ - __cu_len = __copy_user((__force void __user *) __cu_to, __cu_from, __cu_len); \ + __cu_len = __copy_user((void __user *) __cu_to, __cu_from, __cu_len); \ __cu_len; \ }) diff --git a/trunk/include/asm-ppc/mv64x60.h b/trunk/include/asm-ppc/mv64x60.h index ee2f9188cc64..75c2ffa26b26 100644 --- a/trunk/include/asm-ppc/mv64x60.h +++ b/trunk/include/asm-ppc/mv64x60.h @@ -233,7 +233,7 @@ struct mv64x60_chip_info { struct mv64x60_handle { u32 type; /* type of bridge */ u32 rev; /* revision of bridge */ - void __iomem *v_base;/* virtual base addr of bridge regs */ + void *v_base; /* virtual base addr of bridge regs */ phys_addr_t p_base; /* physical base addr of bridge regs */ u32 pci_mode_a; /* pci 0 mode: conventional pci, pci-x*/ @@ -303,7 +303,7 @@ void mv64x60_alloc_hose(struct mv64x60_handle *bh, u32 cfg_addr, u32 cfg_data, struct pci_controller **hose); int mv64x60_get_type(struct mv64x60_handle *bh); int mv64x60_setup_for_chip(struct mv64x60_handle *bh); -void __iomem *mv64x60_get_bridge_vbase(void); +void *mv64x60_get_bridge_vbase(void); u32 mv64x60_get_bridge_type(void); u32 mv64x60_get_bridge_rev(void); void mv64x60_get_mem_windows(struct mv64x60_handle *bh, diff --git a/trunk/include/asm-ppc64/uaccess.h b/trunk/include/asm-ppc64/uaccess.h index 132c1276547b..c181a60d868c 100644 --- a/trunk/include/asm-ppc64/uaccess.h +++ b/trunk/include/asm-ppc64/uaccess.h @@ -164,8 +164,7 @@ do { \ #define __get_user_nocheck(x,ptr,size) \ ({ \ - long __gu_err; \ - unsigned long __gu_val; \ + long __gu_err, __gu_val; \ might_sleep(); \ __get_user_size(__gu_val,(ptr),(size),__gu_err,-EFAULT);\ (x) = (__typeof__(*(ptr)))__gu_val; \ @@ -174,8 +173,7 @@ do { \ #define __get_user_check(x,ptr,size) \ ({ \ - long __gu_err = -EFAULT; \ - unsigned long __gu_val = 0; \ + long __gu_err = -EFAULT, __gu_val = 0; \ const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ might_sleep(); \ if (access_ok(VERIFY_READ,__gu_addr,size)) \ diff --git a/trunk/include/asm-s390/sigcontext.h b/trunk/include/asm-s390/sigcontext.h index 803545351dd8..d57bc0cebdce 100644 --- a/trunk/include/asm-s390/sigcontext.h +++ b/trunk/include/asm-s390/sigcontext.h @@ -61,7 +61,7 @@ typedef struct struct sigcontext { unsigned long oldmask[_SIGCONTEXT_NSIG_WORDS]; - _sigregs __user *sregs; + _sigregs *sregs; }; diff --git a/trunk/include/asm-s390/signal.h b/trunk/include/asm-s390/signal.h index 7084626de215..3d6e11c6c1fd 100644 --- a/trunk/include/asm-s390/signal.h +++ b/trunk/include/asm-s390/signal.h @@ -165,7 +165,7 @@ struct sigaction { #endif /* __KERNEL__ */ typedef struct sigaltstack { - void __user *ss_sp; + void *ss_sp; int ss_flags; size_t ss_size; } stack_t; diff --git a/trunk/include/asm-sparc64/head.h b/trunk/include/asm-sparc64/head.h index 0abd3a674e8f..b63a33cf4971 100644 --- a/trunk/include/asm-sparc64/head.h +++ b/trunk/include/asm-sparc64/head.h @@ -12,12 +12,9 @@ #define __JALAPENO_ID 0x003e0016 #define CHEETAH_MANUF 0x003e -#define CHEETAH_IMPL 0x0014 /* Ultra-III */ -#define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */ -#define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */ -#define JAGUAR_IMPL 0x0018 /* Ultra-IV */ -#define PANTHER_IMPL 0x0019 /* Ultra-IV+ */ -#define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */ +#define CHEETAH_IMPL 0x0014 +#define CHEETAH_PLUS_IMPL 0x0015 +#define JALAPENO_IMPL 0x0016 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ rdpr %ver, %tmp1; \ diff --git a/trunk/include/asm-sparc64/pgtable.h b/trunk/include/asm-sparc64/pgtable.h index 53d612aba8d5..43cbb089cde2 100644 --- a/trunk/include/asm-sparc64/pgtable.h +++ b/trunk/include/asm-sparc64/pgtable.h @@ -98,9 +98,7 @@ #define _PAGE_NFO _AC(0x1000000000000000,UL) /* No Fault Only */ #define _PAGE_IE _AC(0x0800000000000000,UL) /* Invert Endianness */ #define _PAGE_SOFT2 _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ -#define _PAGE_RES1 _AC(0x0002000000000000,UL) /* Reserved */ -#define _PAGE_SZ32MB _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ -#define _PAGE_SZ256MB _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ +#define _PAGE_RES1 _AC(0x0003000000000000,UL) /* Reserved */ #define _PAGE_SN _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ #define _PAGE_RES2 _AC(0x0000780000000000,UL) /* Reserved */ #define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr[40:13]*/ diff --git a/trunk/include/asm-x86_64/msr.h b/trunk/include/asm-x86_64/msr.h index 5a7fe3c6c3d8..4d727f3f5550 100644 --- a/trunk/include/asm-x86_64/msr.h +++ b/trunk/include/asm-x86_64/msr.h @@ -234,7 +234,6 @@ static inline unsigned int cpuid_edx(unsigned int op) #define MSR_K8_TOP_MEM1 0xC001001A #define MSR_K8_TOP_MEM2 0xC001001D #define MSR_K8_SYSCFG 0xC0010010 -#define MSR_K8_HWCR 0xC0010015 /* K6 MSRs */ #define MSR_K6_EFER 0xC0000080 diff --git a/trunk/include/linux/if_ether.h b/trunk/include/linux/if_ether.h index d21c305c6c64..fc2d4c8225aa 100644 --- a/trunk/include/linux/if_ether.h +++ b/trunk/include/linux/if_ether.h @@ -111,9 +111,7 @@ static inline struct ethhdr *eth_hdr(const struct sk_buff *skb) return (struct ethhdr *)skb->mac.raw; } -#ifdef CONFIG_SYSCTL extern struct ctl_table ether_table[]; #endif -#endif #endif /* _LINUX_IF_ETHER_H */ diff --git a/trunk/include/linux/netdevice.h b/trunk/include/linux/netdevice.h index 368e4c825ff1..7c717907896d 100644 --- a/trunk/include/linux/netdevice.h +++ b/trunk/include/linux/netdevice.h @@ -265,8 +265,6 @@ struct net_device * the interface. */ char name[IFNAMSIZ]; - /* device name hash chain */ - struct hlist_node name_hlist; /* * I/O specific fields @@ -294,21 +292,6 @@ struct net_device /* ------- Fields preinitialized in Space.c finish here ------- */ - /* Net device features */ - unsigned long features; -#define NETIF_F_SG 1 /* Scatter/gather IO. */ -#define NETIF_F_IP_CSUM 2 /* Can checksum only TCP/UDP over IPv4. */ -#define NETIF_F_NO_CSUM 4 /* Does not require checksum. F.e. loopack. */ -#define NETIF_F_HW_CSUM 8 /* Can checksum all the packets. */ -#define NETIF_F_HIGHDMA 32 /* Can DMA to high memory. */ -#define NETIF_F_FRAGLIST 64 /* Scatter/gather IO. */ -#define NETIF_F_HW_VLAN_TX 128 /* Transmit VLAN hw acceleration */ -#define NETIF_F_HW_VLAN_RX 256 /* Receive VLAN hw acceleration */ -#define NETIF_F_HW_VLAN_FILTER 512 /* Receive filtering on VLAN */ -#define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */ -#define NETIF_F_TSO 2048 /* Can offload TCP/IP segmentation */ -#define NETIF_F_LLTX 4096 /* LockLess TX */ - struct net_device *next_sched; /* Interface index. Unique device identifier */ @@ -333,6 +316,9 @@ struct net_device * will (read: may be cleaned up at will). */ + /* These may be needed for future network-power-down code. */ + unsigned long trans_start; /* Time (in jiffies) of last Tx */ + unsigned long last_rx; /* Time of last Rx */ unsigned short flags; /* interface flags (a la BSD) */ unsigned short gflags; @@ -342,12 +328,15 @@ struct net_device unsigned mtu; /* interface MTU value */ unsigned short type; /* interface hardware type */ unsigned short hard_header_len; /* hardware hdr length */ + void *priv; /* pointer to private data */ struct net_device *master; /* Pointer to master device of a group, * which this device is member of. */ /* Interface address info. */ + unsigned char broadcast[MAX_ADDR_LEN]; /* hw bcast add */ + unsigned char dev_addr[MAX_ADDR_LEN]; /* hw address */ unsigned char perm_addr[MAX_ADDR_LEN]; /* permanent hw address */ unsigned char addr_len; /* hardware address length */ unsigned short dev_id; /* for shared network cards */ @@ -357,6 +346,8 @@ struct net_device int promiscuity; int allmulti; + int watchdog_timeo; + struct timer_list watchdog_timer; /* Protocol specific pointers */ @@ -367,62 +358,32 @@ struct net_device void *ec_ptr; /* Econet specific data */ void *ax25_ptr; /* AX.25 specific data */ -/* - * Cache line mostly used on receive path (including eth_type_trans()) - */ - struct list_head poll_list ____cacheline_aligned_in_smp; - /* Link to poll list */ - - int (*poll) (struct net_device *dev, int *quota); + struct list_head poll_list; /* Link to poll list */ int quota; int weight; - unsigned long last_rx; /* Time of last Rx */ - /* Interface address info used in eth_type_trans() */ - unsigned char dev_addr[MAX_ADDR_LEN]; /* hw address, (before bcast - because most packets are unicast) */ - - unsigned char broadcast[MAX_ADDR_LEN]; /* hw bcast add */ -/* - * Cache line mostly used on queue transmit path (qdisc) - */ - /* device queue lock */ - spinlock_t queue_lock ____cacheline_aligned_in_smp; struct Qdisc *qdisc; struct Qdisc *qdisc_sleeping; + struct Qdisc *qdisc_ingress; struct list_head qdisc_list; unsigned long tx_queue_len; /* Max frames per queue allowed */ /* ingress path synchronizer */ spinlock_t ingress_lock; - struct Qdisc *qdisc_ingress; - -/* - * One part is mostly used on xmit path (device) - */ /* hard_start_xmit synchronizer */ - spinlock_t xmit_lock ____cacheline_aligned_in_smp; + spinlock_t xmit_lock; /* cpu id of processor entered to hard_start_xmit or -1, if nobody entered there. */ int xmit_lock_owner; - void *priv; /* pointer to private data */ - int (*hard_start_xmit) (struct sk_buff *skb, - struct net_device *dev); - /* These may be needed for future network-power-down code. */ - unsigned long trans_start; /* Time (in jiffies) of last Tx */ - - int watchdog_timeo; /* used by dev_watchdog() */ - struct timer_list watchdog_timer; - -/* - * refcnt is a very hot point, so align it on SMP - */ + /* device queue lock */ + spinlock_t queue_lock; /* Number of references to this device */ - atomic_t refcnt ____cacheline_aligned_in_smp; - + atomic_t refcnt; /* delayed register/unregister */ struct list_head todo_list; + /* device name hash chain */ + struct hlist_node name_hlist; /* device index hash chain */ struct hlist_node index_hlist; @@ -435,6 +396,21 @@ struct net_device NETREG_RELEASED, /* called free_netdev */ } reg_state; + /* Net device features */ + unsigned long features; +#define NETIF_F_SG 1 /* Scatter/gather IO. */ +#define NETIF_F_IP_CSUM 2 /* Can checksum only TCP/UDP over IPv4. */ +#define NETIF_F_NO_CSUM 4 /* Does not require checksum. F.e. loopack. */ +#define NETIF_F_HW_CSUM 8 /* Can checksum all the packets. */ +#define NETIF_F_HIGHDMA 32 /* Can DMA to high memory. */ +#define NETIF_F_FRAGLIST 64 /* Scatter/gather IO. */ +#define NETIF_F_HW_VLAN_TX 128 /* Transmit VLAN hw acceleration */ +#define NETIF_F_HW_VLAN_RX 256 /* Receive VLAN hw acceleration */ +#define NETIF_F_HW_VLAN_FILTER 512 /* Receive filtering on VLAN */ +#define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */ +#define NETIF_F_TSO 2048 /* Can offload TCP/IP segmentation */ +#define NETIF_F_LLTX 4096 /* LockLess TX */ + /* Called after device is detached from network. */ void (*uninit)(struct net_device *dev); /* Called after last user reference disappears. */ @@ -443,7 +419,10 @@ struct net_device /* Pointers to interface service routines. */ int (*open)(struct net_device *dev); int (*stop)(struct net_device *dev); + int (*hard_start_xmit) (struct sk_buff *skb, + struct net_device *dev); #define HAVE_NETDEV_POLL + int (*poll) (struct net_device *dev, int *quota); int (*hard_header) (struct sk_buff *skb, struct net_device *dev, unsigned short type, diff --git a/trunk/include/linux/pci_ids.h b/trunk/include/linux/pci_ids.h index eb36fd293b41..68f11ac1a314 100644 --- a/trunk/include/linux/pci_ids.h +++ b/trunk/include/linux/pci_ids.h @@ -392,7 +392,6 @@ #define PCI_DEVICE_ID_NS_87560_USB 0x0012 #define PCI_DEVICE_ID_NS_83815 0x0020 #define PCI_DEVICE_ID_NS_83820 0x0022 -#define PCI_DEVICE_ID_NS_SATURN 0x0035 #define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500 #define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501 #define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502 @@ -984,7 +983,6 @@ #define PCI_DEVICE_ID_SUN_SABRE 0xa000 #define PCI_DEVICE_ID_SUN_HUMMINGBIRD 0xa001 #define PCI_DEVICE_ID_SUN_TOMATILLO 0xa801 -#define PCI_DEVICE_ID_SUN_CASSINI 0xabba #define PCI_VENDOR_ID_CMD 0x1095 #define PCI_DEVICE_ID_CMD_640 0x0640 diff --git a/trunk/include/linux/sched.h b/trunk/include/linux/sched.h index c3ba31f210a9..49e617fa0f66 100644 --- a/trunk/include/linux/sched.h +++ b/trunk/include/linux/sched.h @@ -107,25 +107,13 @@ extern unsigned long nr_iowait(void); #include -/* - * Task state bitmask. NOTE! These bits are also - * encoded in fs/proc/array.c: get_task_state(). - * - * We have two separate sets of flags: task->state - * is about runnability, while task->exit_state are - * about the task exiting. Confusing, but this way - * modifying one set can't modify the other one by - * mistake. - */ #define TASK_RUNNING 0 #define TASK_INTERRUPTIBLE 1 #define TASK_UNINTERRUPTIBLE 2 #define TASK_STOPPED 4 #define TASK_TRACED 8 -/* in tsk->exit_state */ #define EXIT_ZOMBIE 16 #define EXIT_DEAD 32 -/* in tsk->state again */ #define TASK_NONINTERACTIVE 64 #define __set_task_state(tsk, state_value) \ diff --git a/trunk/kernel/signal.c b/trunk/kernel/signal.c index 619b027e92b5..5a274705ba19 100644 --- a/trunk/kernel/signal.c +++ b/trunk/kernel/signal.c @@ -1763,8 +1763,7 @@ do_signal_stop(int signr) * stop is always done with the siglock held, * so this check has no races. */ - if (!t->exit_state && - !(t->state & (TASK_STOPPED|TASK_TRACED))) { + if (t->state < TASK_STOPPED) { stop_count++; signal_wake_up(t, 0); } diff --git a/trunk/net/appletalk/ddp.c b/trunk/net/appletalk/ddp.c index 7982656b9c83..1d31b3a3f1e5 100644 --- a/trunk/net/appletalk/ddp.c +++ b/trunk/net/appletalk/ddp.c @@ -100,7 +100,8 @@ static struct sock *atalk_search_socket(struct sockaddr_at *to, continue; if (to->sat_addr.s_net == ATADDR_ANYNET && - to->sat_addr.s_node == ATADDR_BCAST) + to->sat_addr.s_node == ATADDR_BCAST && + at->src_net == atif->address.s_net) goto found; if (to->sat_addr.s_net == at->src_net && @@ -1442,10 +1443,8 @@ static int atalk_rcv(struct sk_buff *skb, struct net_device *dev, else atif = atalk_find_interface(ddp->deh_dnet, ddp->deh_dnode); + /* Not ours, so we route the packet via the correct AppleTalk iface */ if (!atif) { - /* Not ours, so we route the packet via the correct - * AppleTalk iface - */ atalk_route_packet(skb, dev, ddp, &ddphv, origlen); goto out; } @@ -1593,6 +1592,9 @@ static int atalk_sendmsg(struct kiocb *iocb, struct socket *sock, struct msghdr if (usat->sat_addr.s_net || usat->sat_addr.s_node == ATADDR_ANYNODE) { rt = atrtr_find(&usat->sat_addr); + if (!rt) + return -ENETUNREACH; + dev = rt->dev; } else { struct atalk_addr at_hint; @@ -1601,12 +1603,11 @@ static int atalk_sendmsg(struct kiocb *iocb, struct socket *sock, struct msghdr at_hint.s_net = at->src_net; rt = atrtr_find(&at_hint); + if (!rt) + return -ENETUNREACH; + dev = rt->dev; } - if (!rt) - return -ENETUNREACH; - - dev = rt->dev; SOCK_DEBUG(sk, "SK %p: Size needed %d, device %s\n", sk, size, dev->name); @@ -1676,20 +1677,6 @@ static int atalk_sendmsg(struct kiocb *iocb, struct socket *sock, struct msghdr SOCK_DEBUG(sk, "SK %p: Loop back.\n", sk); /* loop back */ skb_orphan(skb); - if (ddp->deh_dnode == ATADDR_BCAST) { - struct atalk_addr at_lo; - - at_lo.s_node = 0; - at_lo.s_net = 0; - - rt = atrtr_find(&at_lo); - if (!rt) { - kfree_skb(skb); - return -ENETUNREACH; - } - dev = rt->dev; - skb->dev = dev; - } ddp_dl->request(ddp_dl, skb, dev->dev_addr); } else { SOCK_DEBUG(sk, "SK %p: send out.\n", sk); diff --git a/trunk/net/atm/addr.c b/trunk/net/atm/addr.c index a30d0bf48063..1c8867f7f54a 100644 --- a/trunk/net/atm/addr.c +++ b/trunk/net/atm/addr.c @@ -50,10 +50,8 @@ void atm_reset_addr(struct atm_dev *dev) struct atm_dev_addr *this, *p; spin_lock_irqsave(&dev->lock, flags); - list_for_each_entry_safe(this, p, &dev->local, entry) { - list_del(&this->entry); - kfree(this); - } + list_for_each_entry_safe(this, p, &dev->local, entry) + kfree(this); spin_unlock_irqrestore(&dev->lock, flags); notify_sigd(dev); } diff --git a/trunk/net/atm/common.c b/trunk/net/atm/common.c index 801a5813ec60..e93e838069e8 100644 --- a/trunk/net/atm/common.c +++ b/trunk/net/atm/common.c @@ -178,6 +178,8 @@ static void vcc_destroy_socket(struct sock *sk) if (vcc->push) vcc->push(vcc, NULL); /* atmarpd has no push */ + vcc_remove_socket(sk); /* no more receive */ + while ((skb = skb_dequeue(&sk->sk_receive_queue)) != NULL) { atm_return(vcc,skb->truesize); kfree_skb(skb); @@ -186,8 +188,6 @@ static void vcc_destroy_socket(struct sock *sk) module_put(vcc->dev->ops->owner); atm_dev_put(vcc->dev); } - - vcc_remove_socket(sk); } diff --git a/trunk/net/atm/ioctl.c b/trunk/net/atm/ioctl.c index a150198b05a3..d89056ec44d4 100644 --- a/trunk/net/atm/ioctl.c +++ b/trunk/net/atm/ioctl.c @@ -105,35 +105,17 @@ int vcc_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg) if (!error) sock->state = SS_CONNECTED; goto done; - case ATM_SETBACKEND: - case ATM_NEWBACKENDIF: - { - atm_backend_t backend; - error = get_user(backend, (atm_backend_t __user *) argp); - if (error) - goto done; - switch (backend) { - case ATM_BACKEND_PPP: - request_module("pppoatm"); - break; - case ATM_BACKEND_BR2684: - request_module("br2684"); - break; - } - } - break; - case ATMMPC_CTRL: - case ATMMPC_DATA: - request_module("mpoa"); - break; - case ATMARPD_CTRL: - request_module("clip"); - break; - case ATMLEC_CTRL: - request_module("lec"); + default: break; } + if (cmd == ATMMPC_CTRL || cmd == ATMMPC_DATA) + request_module("mpoa"); + if (cmd == ATMARPD_CTRL) + request_module("clip"); + if (cmd == ATMLEC_CTRL) + request_module("lec"); + error = -ENOIOCTLCMD; down(&ioctl_mutex); diff --git a/trunk/net/atm/signaling.c b/trunk/net/atm/signaling.c index e7211a7f382c..f7c449ac1800 100644 --- a/trunk/net/atm/signaling.c +++ b/trunk/net/atm/signaling.c @@ -217,9 +217,8 @@ void sigd_enq(struct atm_vcc *vcc,enum atmsvc_msg_type type, static void purge_vcc(struct atm_vcc *vcc) { if (sk_atm(vcc)->sk_family == PF_ATMSVC && - !test_bit(ATM_VF_META, &vcc->flags)) { - set_bit(ATM_VF_RELEASED, &vcc->flags); - clear_bit(ATM_VF_REGIS, &vcc->flags); + !test_bit(ATM_VF_META,&vcc->flags)) { + set_bit(ATM_VF_RELEASED,&vcc->flags); vcc_release_async(vcc, -EUNATCH); } } @@ -244,7 +243,8 @@ static void sigd_close(struct atm_vcc *vcc) sk_for_each(s, node, head) { struct atm_vcc *vcc = atm_sk(s); - purge_vcc(vcc); + if (vcc->dev) + purge_vcc(vcc); } } read_unlock(&vcc_sklist_lock); diff --git a/trunk/net/atm/svc.c b/trunk/net/atm/svc.c index d7b266136bf6..08e46052a3e4 100644 --- a/trunk/net/atm/svc.c +++ b/trunk/net/atm/svc.c @@ -302,7 +302,6 @@ static int svc_listen(struct socket *sock,int backlog) error = -EINVAL; goto out; } - vcc_insert_socket(sk); set_bit(ATM_VF_WAITING, &vcc->flags); prepare_to_wait(sk->sk_sleep, &wait, TASK_UNINTERRUPTIBLE); sigd_enq(vcc,as_listen,NULL,NULL,&vcc->local); diff --git a/trunk/net/core/datagram.c b/trunk/net/core/datagram.c index 81987df536eb..da9bf71421a7 100644 --- a/trunk/net/core/datagram.c +++ b/trunk/net/core/datagram.c @@ -211,45 +211,74 @@ void skb_free_datagram(struct sock *sk, struct sk_buff *skb) int skb_copy_datagram_iovec(const struct sk_buff *skb, int offset, struct iovec *to, int len) { - int i, err, fraglen, end = 0; - struct sk_buff *next = skb_shinfo(skb)->frag_list; -next_skb: - fraglen = skb_headlen(skb); - i = -1; + int start = skb_headlen(skb); + int i, copy = start - offset; + + /* Copy header. */ + if (copy > 0) { + if (copy > len) + copy = len; + if (memcpy_toiovec(to, skb->data + offset, copy)) + goto fault; + if ((len -= copy) == 0) + return 0; + offset += copy; + } - while (1) { - int start = end; + /* Copy paged appendix. Hmm... why does this look so complicated? */ + for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { + int end; + + BUG_TRAP(start <= offset + len); - if ((end += fraglen) > offset) { - int copy = end - offset, o = offset - start; + end = start + skb_shinfo(skb)->frags[i].size; + if ((copy = end - offset) > 0) { + int err; + u8 *vaddr; + skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; + struct page *page = frag->page; if (copy > len) copy = len; - if (i == -1) - err = memcpy_toiovec(to, skb->data + o, copy); - else { - skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; - struct page *page = frag->page; - void *p = kmap(page) + frag->page_offset + o; - err = memcpy_toiovec(to, p, copy); - kunmap(page); - } + vaddr = kmap(page); + err = memcpy_toiovec(to, vaddr + frag->page_offset + + offset - start, copy); + kunmap(page); if (err) goto fault; if (!(len -= copy)) return 0; offset += copy; } - if (++i >= skb_shinfo(skb)->nr_frags) - break; - fraglen = skb_shinfo(skb)->frags[i].size; + start = end; } - if (next) { - skb = next; - BUG_ON(skb_shinfo(skb)->frag_list); - next = skb->next; - goto next_skb; + + if (skb_shinfo(skb)->frag_list) { + struct sk_buff *list = skb_shinfo(skb)->frag_list; + + for (; list; list = list->next) { + int end; + + BUG_TRAP(start <= offset + len); + + end = start + list->len; + if ((copy = end - offset) > 0) { + if (copy > len) + copy = len; + if (skb_copy_datagram_iovec(list, + offset - start, + to, copy)) + goto fault; + if ((len -= copy) == 0) + return 0; + offset += copy; + } + start = end; + } } + if (!len) + return 0; + fault: return -EFAULT; } diff --git a/trunk/net/core/dev.c b/trunk/net/core/dev.c index 9066c874e273..37c881070963 100644 --- a/trunk/net/core/dev.c +++ b/trunk/net/core/dev.c @@ -1259,8 +1259,6 @@ int dev_queue_xmit(struct sk_buff *skb) if (skb_checksum_help(skb, 0)) goto out_kfree_skb; - spin_lock_prefetch(&dev->queue_lock); - /* Disable soft irqs for various locks below. Also * stops preemption for RCU. */ diff --git a/trunk/net/core/pktgen.c b/trunk/net/core/pktgen.c index b7f2d65a614f..ef430b1e8e42 100644 --- a/trunk/net/core/pktgen.c +++ b/trunk/net/core/pktgen.c @@ -186,7 +186,7 @@ /* Used to help with determining the pkts on receive */ #define PKTGEN_MAGIC 0xbe9be955 -#define PG_PROC_DIR "net/pktgen" +#define PG_PROC_DIR "pktgen" #define MAX_CFLOWS 65536 @@ -1476,7 +1476,18 @@ static int proc_thread_write(struct file *file, const char __user *user_buffer, static int create_proc_dir(void) { - pg_proc_dir = proc_mkdir(PG_PROC_DIR, NULL); + int len; + /* does proc_dir already exists */ + len = strlen(PG_PROC_DIR); + + for (pg_proc_dir = proc_net->subdir; pg_proc_dir; pg_proc_dir=pg_proc_dir->next) { + if ((pg_proc_dir->namelen == len) && + (! memcmp(pg_proc_dir->name, PG_PROC_DIR, len))) + break; + } + + if (!pg_proc_dir) + pg_proc_dir = create_proc_entry(PG_PROC_DIR, S_IFDIR, proc_net); if (!pg_proc_dir) return -ENODEV; @@ -1486,7 +1497,7 @@ static int create_proc_dir(void) static int remove_proc_dir(void) { - remove_proc_entry(PG_PROC_DIR, NULL); + remove_proc_entry(PG_PROC_DIR, proc_net); return 0; } @@ -2897,7 +2908,7 @@ static int pktgen_add_device(struct pktgen_thread *t, const char* ifname) pkt_dev->udp_dst_max = 9; strncpy(pkt_dev->ifname, ifname, 31); - sprintf(pkt_dev->fname, "%s/%s", PG_PROC_DIR, ifname); + sprintf(pkt_dev->fname, "net/%s/%s", PG_PROC_DIR, ifname); if (! pktgen_setup_dev(pkt_dev)) { printk("pktgen: ERROR: pktgen_setup_dev failed.\n"); @@ -2970,7 +2981,7 @@ static int pktgen_create_thread(const char* name, int cpu) spin_lock_init(&t->if_lock); t->cpu = cpu; - sprintf(t->fname, "%s/%s", PG_PROC_DIR, t->name); + sprintf(t->fname, "net/%s/%s", PG_PROC_DIR, t->name); t->proc_ent = create_proc_entry(t->fname, 0600, NULL); if (!t->proc_ent) { printk("pktgen: cannot create %s procfs entry.\n", t->fname); @@ -3053,7 +3064,7 @@ static int __init pg_init(void) create_proc_dir(); - sprintf(module_fname, "%s/pgctrl", PG_PROC_DIR); + sprintf(module_fname, "net/%s/pgctrl", PG_PROC_DIR); module_proc_ent = create_proc_entry(module_fname, 0600, NULL); if (!module_proc_ent) { printk("pktgen: ERROR: cannot create %s procfs entry.\n", module_fname); diff --git a/trunk/net/core/sock.c b/trunk/net/core/sock.c index 928d2a1d6d8e..ac63b56e23b2 100644 --- a/trunk/net/core/sock.c +++ b/trunk/net/core/sock.c @@ -660,20 +660,16 @@ struct sock *sk_alloc(int family, unsigned int __nocast priority, sock_lock_init(sk); } - if (security_sk_alloc(sk, family, priority)) - goto out_free; - - if (!try_module_get(prot->owner)) - goto out_free; + if (security_sk_alloc(sk, family, priority)) { + if (slab != NULL) + kmem_cache_free(slab, sk); + else + kfree(sk); + sk = NULL; + } else + __module_get(prot->owner); } return sk; - -out_free: - if (slab != NULL) - kmem_cache_free(slab, sk); - else - kfree(sk); - return NULL; } void sk_free(struct sock *sk) diff --git a/trunk/net/ethernet/eth.c b/trunk/net/ethernet/eth.c index 68a5ca866442..87a052a9a84f 100644 --- a/trunk/net/ethernet/eth.c +++ b/trunk/net/ethernet/eth.c @@ -146,19 +146,6 @@ int eth_rebuild_header(struct sk_buff *skb) return 0; } -static inline unsigned int compare_eth_addr(const unsigned char *__a, const unsigned char *__b) -{ - const unsigned short *dest = (unsigned short *) __a; - const unsigned short *devaddr = (unsigned short *) __b; - unsigned int res; - - BUILD_BUG_ON(ETH_ALEN != 6); - res = ((dest[0] ^ devaddr[0]) | - (dest[1] ^ devaddr[1]) | - (dest[2] ^ devaddr[2])) != 0; - - return res; -} /* * Determine the packet's protocol ID. The rule here is that we @@ -171,15 +158,16 @@ __be16 eth_type_trans(struct sk_buff *skb, struct net_device *dev) struct ethhdr *eth; unsigned char *rawp; - skb->mac.raw = skb->data; + skb->mac.raw=skb->data; skb_pull(skb,ETH_HLEN); eth = eth_hdr(skb); - if (*eth->h_dest&1) { - if (!compare_eth_addr(eth->h_dest, dev->broadcast)) - skb->pkt_type = PACKET_BROADCAST; + if(*eth->h_dest&1) + { + if(memcmp(eth->h_dest,dev->broadcast, ETH_ALEN)==0) + skb->pkt_type=PACKET_BROADCAST; else - skb->pkt_type = PACKET_MULTICAST; + skb->pkt_type=PACKET_MULTICAST; } /* @@ -190,9 +178,10 @@ __be16 eth_type_trans(struct sk_buff *skb, struct net_device *dev) * seems to set IFF_PROMISC. */ - else if(1 /*dev->flags&IFF_PROMISC*/) { - if (unlikely(compare_eth_addr(eth->h_dest, dev->dev_addr))) - skb->pkt_type = PACKET_OTHERHOST; + else if(1 /*dev->flags&IFF_PROMISC*/) + { + if(memcmp(eth->h_dest,dev->dev_addr, ETH_ALEN)) + skb->pkt_type=PACKET_OTHERHOST; } if (ntohs(eth->h_proto) >= 1536) diff --git a/trunk/net/ieee80211/ieee80211_module.c b/trunk/net/ieee80211/ieee80211_module.c index 6059e9e37123..03a47343ddc7 100644 --- a/trunk/net/ieee80211/ieee80211_module.c +++ b/trunk/net/ieee80211/ieee80211_module.c @@ -230,7 +230,7 @@ static int __init ieee80211_init(void) struct proc_dir_entry *e; ieee80211_debug_level = debug; - ieee80211_proc = proc_mkdir(DRV_NAME, proc_net); + ieee80211_proc = create_proc_entry(DRV_NAME, S_IFDIR, proc_net); if (ieee80211_proc == NULL) { IEEE80211_ERROR("Unable to create " DRV_NAME " proc directory\n"); diff --git a/trunk/net/ipv4/tcp_output.c b/trunk/net/ipv4/tcp_output.c index caf2e2cff293..d6e3d269e906 100644 --- a/trunk/net/ipv4/tcp_output.c +++ b/trunk/net/ipv4/tcp_output.c @@ -190,16 +190,15 @@ void tcp_select_initial_window(int __space, __u32 mss, } /* Set initial window to value enough for senders, - * following RFC2414. Senders, not following this RFC, + * following RFC1414. Senders, not following this RFC, * will be satisfied with 2. */ if (mss > (1<<*rcv_wscale)) { - int init_cwnd; - - if (mss > 1460) + int init_cwnd = 4; + if (mss > 1460*3) init_cwnd = 2; - else - init_cwnd = (mss > 1095) ? 3 : 4; + else if (mss > 1460) + init_cwnd = 3; if (*rcv_wnd > init_cwnd*mss) *rcv_wnd = init_cwnd*mss; } diff --git a/trunk/net/rose/af_rose.c b/trunk/net/rose/af_rose.c index 829fdbc4400b..5acb1680524a 100644 --- a/trunk/net/rose/af_rose.c +++ b/trunk/net/rose/af_rose.c @@ -1472,25 +1472,22 @@ static const char banner[] = KERN_INFO "F6FBB/G4KLX ROSE for Linux. Version 0.62 static int __init rose_proto_init(void) { int i; - int rc; + int rc = proto_register(&rose_proto, 0); - if (rose_ndevs > 0x7FFFFFFF/sizeof(struct net_device *)) { - printk(KERN_ERR "ROSE: rose_proto_init - rose_ndevs parameter to large\n"); - rc = -EINVAL; - goto out; - } - - rc = proto_register(&rose_proto, 0); if (rc != 0) goto out; rose_callsign = null_ax25_address; + if (rose_ndevs > 0x7FFFFFFF/sizeof(struct net_device *)) { + printk(KERN_ERR "ROSE: rose_proto_init - rose_ndevs parameter to large\n"); + return -1; + } + dev_rose = kmalloc(rose_ndevs * sizeof(struct net_device *), GFP_KERNEL); if (dev_rose == NULL) { printk(KERN_ERR "ROSE: rose_proto_init - unable to allocate device structure\n"); - rc = -ENOMEM; - goto out_proto_unregister; + return -1; } memset(dev_rose, 0x00, rose_ndevs * sizeof(struct net_device*)); @@ -1503,12 +1500,10 @@ static int __init rose_proto_init(void) name, rose_setup); if (!dev) { printk(KERN_ERR "ROSE: rose_proto_init - unable to allocate memory\n"); - rc = -ENOMEM; goto fail; } - rc = register_netdev(dev); - if (rc) { - printk(KERN_ERR "ROSE: netdevice registration failed\n"); + if (register_netdev(dev)) { + printk(KERN_ERR "ROSE: netdevice regeistration failed\n"); free_netdev(dev); goto fail; } @@ -1541,9 +1536,8 @@ static int __init rose_proto_init(void) free_netdev(dev_rose[i]); } kfree(dev_rose); -out_proto_unregister: proto_unregister(&rose_proto); - goto out; + return -ENOMEM; } module_init(rose_proto_init); diff --git a/trunk/net/socket.c b/trunk/net/socket.c index 3145103cdf54..dbd1a6851edd 100644 --- a/trunk/net/socket.c +++ b/trunk/net/socket.c @@ -1145,11 +1145,8 @@ static int __sock_create(int family, int type, int protocol, struct socket **res if (!try_module_get(net_families[family]->owner)) goto out_release; - if ((err = net_families[family]->create(sock, protocol)) < 0) { - sock->ops = NULL; + if ((err = net_families[family]->create(sock, protocol)) < 0) goto out_module_put; - } - /* * Now to bump the refcnt of the [loadable] module that owns this * socket at sock_release time we decrement its refcnt. @@ -1363,16 +1360,16 @@ asmlinkage long sys_accept(int fd, struct sockaddr __user *upeer_sockaddr, int _ newsock->type = sock->type; newsock->ops = sock->ops; + err = security_socket_accept(sock, newsock); + if (err) + goto out_release; + /* * We don't need try_module_get here, as the listening socket (sock) * has the protocol module (sock->ops->owner) held. */ __module_get(newsock->ops->owner); - err = security_socket_accept(sock, newsock); - if (err) - goto out_release; - err = sock->ops->accept(sock, newsock, sock->file->f_flags); if (err < 0) goto out_release;