From c068395870ce7d33c946a39adadda06a9e094a34 Mon Sep 17 00:00:00 2001 From: Matthew Fleming Date: Thu, 2 Oct 2008 12:24:05 +0100 Subject: [PATCH] --- yaml --- r: 113192 b: refs/heads/master c: 0d3e0460f307e84904968aad6cff97bd688583d8 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/mmc/core/mmc_ops.c | 8 ++++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 401efa6882d4..8a3df3800804 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7244b85bd17313d7d300ee93ec7bfbca1f4ccf3d +refs/heads/master: 0d3e0460f307e84904968aad6cff97bd688583d8 diff --git a/trunk/drivers/mmc/core/mmc_ops.c b/trunk/drivers/mmc/core/mmc_ops.c index 64b05c6270f2..9c50e6f1c236 100644 --- a/trunk/drivers/mmc/core/mmc_ops.c +++ b/trunk/drivers/mmc/core/mmc_ops.c @@ -248,8 +248,12 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host, sg_init_one(&sg, data_buf, len); - if (card) - mmc_set_data_timeout(&data, card); + /* + * The spec states that CSR and CID accesses have a timeout + * of 64 clock cycles. + */ + data.timeout_ns = 0; + data.timeout_clks = 64; mmc_wait_for_req(host, &mrq);