From c09a01f9dbc4d8a55419f24852099af76b9be2bf Mon Sep 17 00:00:00 2001
From: Karl Beldan <karl.beldan@gmail.com>
Date: Sat, 12 Jun 2010 12:25:13 +0200
Subject: [PATCH] --- yaml --- r: 207749 b: refs/heads/master c:
 1df620637fc3b252b69c92ced486b5b6b643dd1a h: refs/heads/master i:   207747:
 16b82dee6e312d2845c5efe6ab07c6d9358d93a8 v: v3

---
 [refs]                         | 2 +-
 trunk/drivers/mtd/nand/Kconfig | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 9cca6daf501d..47d4aa1d5a11 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 6175f4a194653fad46218167fac05386972d995c
+refs/heads/master: 1df620637fc3b252b69c92ced486b5b6b643dd1a
diff --git a/trunk/drivers/mtd/nand/Kconfig b/trunk/drivers/mtd/nand/Kconfig
index 4d4066f315be..1d69920a2c93 100644
--- a/trunk/drivers/mtd/nand/Kconfig
+++ b/trunk/drivers/mtd/nand/Kconfig
@@ -60,6 +60,7 @@ config MTD_NAND_DENALI
 config MTD_NAND_DENALI_SCRATCH_REG_ADDR
         hex "Denali NAND size scratch register address"
         default "0xFF108018"
+        depends on MTD_NAND_DENALI
         help
           Some platforms place the NAND chip size in a scratch register
           because (some versions of) the driver aren't able to automatically