From c106d25a0dc97ddf13239c4ee82c9a506ac7f10f Mon Sep 17 00:00:00 2001 From: Alex He Date: Fri, 30 Mar 2012 10:21:38 +0800 Subject: [PATCH] --- yaml --- r: 299157 b: refs/heads/master c: 95018a53f7653e791bba1f54c8d75d9cb700d1bd h: refs/heads/master i: 299155: 7235b758857882d49a3a52856ef16c795d551778 v: v3 --- [refs] | 2 +- trunk/drivers/usb/host/pci-quirks.c | 10 +++++++--- trunk/drivers/usb/host/xhci-ext-caps.h | 5 +++-- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 1c0e214d0e08..b90a49dc68fe 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3fc8206d3dca1550eb0a1f6e2a350881835954ba +refs/heads/master: 95018a53f7653e791bba1f54c8d75d9cb700d1bd diff --git a/trunk/drivers/usb/host/pci-quirks.c b/trunk/drivers/usb/host/pci-quirks.c index 11de5f1be981..32dada8c8b4f 100644 --- a/trunk/drivers/usb/host/pci-quirks.c +++ b/trunk/drivers/usb/host/pci-quirks.c @@ -825,9 +825,13 @@ static void __devinit quirk_usb_handoff_xhci(struct pci_dev *pdev) } } - /* Disable any BIOS SMIs */ - writel(XHCI_LEGACY_DISABLE_SMI, - base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET); + val = readl(base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET); + /* Mask off (turn off) any enabled SMIs */ + val &= XHCI_LEGACY_DISABLE_SMI; + /* Mask all SMI events bits, RW1C */ + val |= XHCI_LEGACY_SMI_EVENTS; + /* Disable any BIOS SMIs and clear all SMI events*/ + writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET); if (usb_is_intel_switchable_xhci(pdev)) usb_enable_xhci_ports(pdev); diff --git a/trunk/drivers/usb/host/xhci-ext-caps.h b/trunk/drivers/usb/host/xhci-ext-caps.h index c7f33123d4c0..377f4242dabb 100644 --- a/trunk/drivers/usb/host/xhci-ext-caps.h +++ b/trunk/drivers/usb/host/xhci-ext-caps.h @@ -62,8 +62,9 @@ /* USB Legacy Support Control and Status Register - section 7.1.2 */ /* Add this offset, plus the value of xECP in HCCPARAMS to the base address */ #define XHCI_LEGACY_CONTROL_OFFSET (0x04) -/* bits 1:2, 5:12, and 17:19 need to be preserved; bits 21:28 should be zero */ -#define XHCI_LEGACY_DISABLE_SMI ((0x3 << 1) + (0xff << 5) + (0x7 << 17)) +/* bits 1:3, 5:12, and 17:19 need to be preserved; bits 21:28 should be zero */ +#define XHCI_LEGACY_DISABLE_SMI ((0x7 << 1) + (0xff << 5) + (0x7 << 17)) +#define XHCI_LEGACY_SMI_EVENTS (0x7 << 29) /* USB 2.0 xHCI 0.96 L1C capability - section 7.2.2.1.3.2 */ #define XHCI_L1C (1 << 16)