From c16761e13ee3315bfbb87d64b035fb23c95df85d Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 5 Dec 2010 08:51:38 +0000 Subject: [PATCH] --- yaml --- r: 225748 b: refs/heads/master c: 7627dc802a98aebebc6a34e5b6558ea4717c968c h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/include/asm/hardware/entry-macro-gic.S | 7 +++++++ trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S | 5 ----- trunk/arch/arm/mach-omap2/include/mach/entry-macro.S | 1 + trunk/arch/arm/mach-realview/include/mach/entry-macro.S | 5 ----- trunk/arch/arm/mach-tegra/include/mach/entry-macro.S | 2 +- trunk/arch/arm/mach-ux500/include/mach/entry-macro.S | 1 + trunk/arch/arm/mach-vexpress/include/mach/entry-macro.S | 5 ----- 8 files changed, 11 insertions(+), 17 deletions(-) diff --git a/[refs] b/[refs] index bdb66114624d..753c63e16127 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: bef8f9ee32511a28f1c9a7d3b8c51cdac030b564 +refs/heads/master: 7627dc802a98aebebc6a34e5b6558ea4717c968c diff --git a/trunk/arch/arm/include/asm/hardware/entry-macro-gic.S b/trunk/arch/arm/include/asm/hardware/entry-macro-gic.S index 05587f125a13..c115b82fe80a 100644 --- a/trunk/arch/arm/include/asm/hardware/entry-macro-gic.S +++ b/trunk/arch/arm/include/asm/hardware/entry-macro-gic.S @@ -10,6 +10,13 @@ #include +#ifndef HAVE_GET_IRQNR_PREAMBLE + .macro get_irqnr_preamble, base, tmp + ldr \base, =gic_cpu_base_addr + ldr \base, [\base] + .endm +#endif + /* * The interrupt numbering scheme is defined in the * interrupt controller spec. To wit: diff --git a/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S index e793c3376728..6bd83ed90afe 100644 --- a/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S @@ -14,10 +14,5 @@ .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm diff --git a/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S b/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S index 2e358df3fe19..d54c4f89a8bd 100644 --- a/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -170,6 +170,7 @@ omap_irq_base: .word 0 #ifdef CONFIG_ARCH_OMAP4 +#define HAVE_GET_IRQNR_PREAMBLE #include .macro get_irqnr_preamble, base, tmp diff --git a/trunk/arch/arm/mach-realview/include/mach/entry-macro.S b/trunk/arch/arm/mach-realview/include/mach/entry-macro.S index 4417b1039615..4071164aebaa 100644 --- a/trunk/arch/arm/mach-realview/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-realview/include/mach/entry-macro.S @@ -13,11 +13,6 @@ .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm diff --git a/trunk/arch/arm/mach-tegra/include/mach/entry-macro.S b/trunk/arch/arm/mach-tegra/include/mach/entry-macro.S index dc0924915183..dd165c53889d 100644 --- a/trunk/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-tegra/include/mach/entry-macro.S @@ -16,7 +16,7 @@ #include #if defined(CONFIG_ARM_GIC) - +#define HAVE_GET_IRQNR_PREAMBLE #include /* Uses the GIC interrupt controller built into the cpu */ diff --git a/trunk/arch/arm/mach-ux500/include/mach/entry-macro.S b/trunk/arch/arm/mach-ux500/include/mach/entry-macro.S index 3cc3cdf55180..a37f585a3ecb 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-ux500/include/mach/entry-macro.S @@ -11,6 +11,7 @@ * warranty of any kind, whether express or implied. */ #include +#define HAVE_GET_IRQNR_PREAMBLE #include .macro disable_fiq diff --git a/trunk/arch/arm/mach-vexpress/include/mach/entry-macro.S b/trunk/arch/arm/mach-vexpress/include/mach/entry-macro.S index 19d5ac8ba071..73c11297509e 100644 --- a/trunk/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-vexpress/include/mach/entry-macro.S @@ -3,10 +3,5 @@ .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm