From c2a37116511adabf23ef64f257bf921e41b8d4e3 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Thu, 5 Jan 2012 19:12:57 +0900 Subject: [PATCH] --- yaml --- r: 284530 b: refs/heads/master c: ee5d19b20a711dca3848450979e3cd20b6b795cc h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/mmc/host/dw_mmc.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 2ebc27de4939..29601b21f93d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8bc0678b845531221ba2ea6efe34db66e587705b +refs/heads/master: ee5d19b20a711dca3848450979e3cd20b6b795cc diff --git a/trunk/drivers/mmc/host/dw_mmc.h b/trunk/drivers/mmc/host/dw_mmc.h index 72c071f6e001..df392a1143f2 100644 --- a/trunk/drivers/mmc/host/dw_mmc.h +++ b/trunk/drivers/mmc/host/dw_mmc.h @@ -126,7 +126,7 @@ #define SDMMC_CMD_RESP_EXP BIT(6) #define SDMMC_CMD_INDX(n) ((n) & 0x1F) /* Status register defines */ -#define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FF) +#define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FFF) /* Internal DMAC interrupt defines */ #define SDMMC_IDMAC_INT_AI BIT(9) #define SDMMC_IDMAC_INT_NI BIT(8)