From c2de8e743c6721d0b168aa37650220037a0dd35a Mon Sep 17 00:00:00 2001
From: Sanjeev Premi <premi@ti.com>
Date: Mon, 11 Jul 2011 20:50:31 +0530
Subject: [PATCH] --- yaml --- r: 261900 b: refs/heads/master c:
 e178ccb33569da17dc897a08a3865441b813bdfb h: refs/heads/master v: v3

---
 [refs]                           | 2 +-
 trunk/drivers/mfd/twl4030-madc.c | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/[refs] b/[refs]
index 51e804bd5120..43d287c1b3d1 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 2b959e7f87491453f3220bb8ab11da7ccb7f6515
+refs/heads/master: e178ccb33569da17dc897a08a3865441b813bdfb
diff --git a/trunk/drivers/mfd/twl4030-madc.c b/trunk/drivers/mfd/twl4030-madc.c
index 3941ddcf15fe..b5d598c3aa71 100644
--- a/trunk/drivers/mfd/twl4030-madc.c
+++ b/trunk/drivers/mfd/twl4030-madc.c
@@ -530,13 +530,13 @@ int twl4030_madc_conversion(struct twl4030_madc_request *req)
 	if (ret) {
 		dev_err(twl4030_madc->dev,
 			"unable to write sel register 0x%X\n", method->sel + 1);
-		return ret;
+		goto out;
 	}
 	ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, ch_lsb, method->sel);
 	if (ret) {
 		dev_err(twl4030_madc->dev,
 			"unable to write sel register 0x%X\n", method->sel + 1);
-		return ret;
+		goto out;
 	}
 	/* Select averaging for all channels if do_avg is set */
 	if (req->do_avg) {
@@ -546,7 +546,7 @@ int twl4030_madc_conversion(struct twl4030_madc_request *req)
 			dev_err(twl4030_madc->dev,
 				"unable to write avg register 0x%X\n",
 				method->avg + 1);
-			return ret;
+			goto out;
 		}
 		ret = twl_i2c_write_u8(TWL4030_MODULE_MADC,
 				       ch_lsb, method->avg);
@@ -554,7 +554,7 @@ int twl4030_madc_conversion(struct twl4030_madc_request *req)
 			dev_err(twl4030_madc->dev,
 				"unable to write sel reg 0x%X\n",
 				method->sel + 1);
-			return ret;
+			goto out;
 		}
 	}
 	if (req->type == TWL4030_MADC_IRQ_ONESHOT && req->func_cb != NULL) {