From c2f5276c9cb1f8fe5db582ec59507d2b104483b0 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 6 Sep 2007 21:32:57 +0900 Subject: [PATCH] --- yaml --- r: 64852 b: refs/heads/master c: 98f9085405b059d1e1915fbb9b861d9efcd7c597 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/mips/Kconfig | 14 --------- .../asm-mips/mach-ocelot/mach-gt64120.h | 30 ------------------- 3 files changed, 1 insertion(+), 45 deletions(-) delete mode 100644 trunk/include/asm-mips/mach-ocelot/mach-gt64120.h diff --git a/[refs] b/[refs] index ace0ae7e0710..4497b1d40869 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d6698a2cd6ba23f5f73b0115c277dca8341af4a0 +refs/heads/master: 98f9085405b059d1e1915fbb9b861d9efcd7c597 diff --git a/trunk/arch/mips/Kconfig b/trunk/arch/mips/Kconfig index 4a54d21ee17c..3b807b4bc7cd 100644 --- a/trunk/arch/mips/Kconfig +++ b/trunk/arch/mips/Kconfig @@ -818,20 +818,6 @@ config EMMA2RH config SERIAL_RM9000 bool -# -# Unfortunately not all GT64120 systems run the chip at the same clock. -# As the user for the clock rate and try to minimize the available options. -# -choice - prompt "Galileo Chip Clock" - depends on MOMENCO_OCELOT - default SYSCLK_100 if MOMENCO_OCELOT - -config SYSCLK_100 - bool "100" if MOMENCO_OCELOT - -endchoice - config ARC32 bool diff --git a/trunk/include/asm-mips/mach-ocelot/mach-gt64120.h b/trunk/include/asm-mips/mach-ocelot/mach-gt64120.h deleted file mode 100644 index a62ecb53c751..000000000000 --- a/trunk/include/asm-mips/mach-ocelot/mach-gt64120.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H -#define _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H - -/* - * PCI address allocation - */ -#define GT_PCI_MEM_BASE (0x22000000UL) -#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE -#define GT_PCI_IO_BASE (0x20000000UL) -#define GT_PCI_IO_SIZE GT_DEF_PCI0_IO_SIZE - -extern unsigned long gt64120_base; - -#define GT64120_BASE (gt64120_base) - -/* - * GT timer irq - */ -#define GT_TIMER 6 - -#endif /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */