From c396b61e89aad439d00e80cc9a2fde8ec5b644e3 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 26 Feb 2013 10:55:18 +0100 Subject: [PATCH] --- yaml --- r: 361397 b: refs/heads/master c: 5dc2eb7da1e387e31ce54f54af580c6a6f512ca6 h: refs/heads/master i: 361395: 83540695acd1c097a7406ca376d9a772cf6f5c0a v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-imx/clk-imx35.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 1425ffed60c0..ec8dd0ba9c50 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 42b84328428bfe305fcb60eb382fba60cee9071f +refs/heads/master: 5dc2eb7da1e387e31ce54f54af580c6a6f512ca6 diff --git a/trunk/arch/arm/mach-imx/clk-imx35.c b/trunk/arch/arm/mach-imx/clk-imx35.c index 74e3a34d78b8..e13a8fa5e62c 100644 --- a/trunk/arch/arm/mach-imx/clk-imx35.c +++ b/trunk/arch/arm/mach-imx/clk-imx35.c @@ -264,6 +264,7 @@ int __init mx35_clocks_init(void) clk_prepare_enable(clk[gpio3_gate]); clk_prepare_enable(clk[iim_gate]); clk_prepare_enable(clk[emi_gate]); + clk_prepare_enable(clk[max_gate]); /* * SCC is needed to boot via mmc after a watchdog reset. The clock code