From c3ebd05d2bde22742e921834c5f670273ca3aee1 Mon Sep 17 00:00:00 2001 From: Arjan van de Ven Date: Mon, 26 Jul 2010 10:04:24 +0100 Subject: [PATCH] --- yaml --- r: 202510 b: refs/heads/master c: 51cd525dce018f298568d8e2e769b1a698ef91cd h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/platform/x86/intel_scu_ipc.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 311722edf465..66cd664cb28e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9dd3adeb00b14d4b3d106360e2e33272deab35f3 +refs/heads/master: 51cd525dce018f298568d8e2e769b1a698ef91cd diff --git a/trunk/drivers/platform/x86/intel_scu_ipc.c b/trunk/drivers/platform/x86/intel_scu_ipc.c index 5258749138d6..1b0d0d54cb0f 100644 --- a/trunk/drivers/platform/x86/intel_scu_ipc.c +++ b/trunk/drivers/platform/x86/intel_scu_ipc.c @@ -58,8 +58,8 @@ #define IPC_BASE_ADDR 0xFF11C000 /* IPC1 base register address */ #define IPC_MAX_ADDR 0x100 /* Maximum IPC regisers */ -#define IPC_WWBUF_SIZE 16 /* IPC Write buffer Size */ -#define IPC_RWBUF_SIZE 16 /* IPC Read buffer Size */ +#define IPC_WWBUF_SIZE 20 /* IPC Write buffer Size */ +#define IPC_RWBUF_SIZE 20 /* IPC Read buffer Size */ #define IPC_I2C_BASE 0xFF12B000 /* I2C control register base address */ #define IPC_I2C_MAX_ADDR 0x10 /* Maximum I2C regisers */