From c427ebc301e13dfa50e421d7807e016476570f06 Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs@redhat.com>
Date: Tue, 11 Jan 2011 17:22:33 +1000
Subject: [PATCH] --- yaml --- r: 231628 b: refs/heads/master c:
 1380da4979728bdd6af0086a8c8e186da14ae673 h: refs/heads/master v: v3

---
 [refs]                                  |  2 +-
 trunk/drivers/gpu/drm/nouveau/nv40_mc.c | 14 ++------------
 2 files changed, 3 insertions(+), 13 deletions(-)

diff --git a/[refs] b/[refs]
index 3e4ebf59fee5..2e59aa6c1f46 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: c693931d93facab671bafdcebf515520663c22fc
+refs/heads/master: 1380da4979728bdd6af0086a8c8e186da14ae673
diff --git a/trunk/drivers/gpu/drm/nouveau/nv40_mc.c b/trunk/drivers/gpu/drm/nouveau/nv40_mc.c
index e4e72c12ab6a..03c0d4c3f355 100644
--- a/trunk/drivers/gpu/drm/nouveau/nv40_mc.c
+++ b/trunk/drivers/gpu/drm/nouveau/nv40_mc.c
@@ -6,27 +6,17 @@
 int
 nv40_mc_init(struct drm_device *dev)
 {
-	struct drm_nouveau_private *dev_priv = dev->dev_private;
-	uint32_t tmp;
-
 	/* Power up everything, resetting each individual unit will
 	 * be done later if needed.
 	 */
 	nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
 
-	switch (dev_priv->chipset) {
-	case 0x44:
-	case 0x46: /* G72 */
-	case 0x4e:
-	case 0x4c: /* C51_G7X */
-		tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA);
+	if (nv44_graph_class(dev)) {
+		u32 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA);
 		nv_wr32(dev, NV40_PMC_1700, tmp);
 		nv_wr32(dev, NV40_PMC_1704, 0);
 		nv_wr32(dev, NV40_PMC_1708, 0);
 		nv_wr32(dev, NV40_PMC_170C, tmp);
-		break;
-	default:
-		break;
 	}
 
 	return 0;