From c51c369b45d2c38256050aeab85da5f6f1cb4925 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 26 Jan 2012 11:15:18 -0800 Subject: [PATCH] --- yaml --- r: 287061 b: refs/heads/master c: 8a74e9ffd97dc9de063de8c02ae32db79dd60436 h: refs/heads/master i: 287059: ff9bcf7356c4cd3e9199b5452c26960efce84d58 v: v3 --- [refs] | 2 +- trunk/drivers/tty/serial/omap-serial.c | 35 +++----------------------- 2 files changed, 5 insertions(+), 32 deletions(-) diff --git a/[refs] b/[refs] index 766b55238efa..981a6838cb0a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: af681cad3f79ad8f7bd6cb170b70990aeef74233 +refs/heads/master: 8a74e9ffd97dc9de063de8c02ae32db79dd60436 diff --git a/trunk/drivers/tty/serial/omap-serial.c b/trunk/drivers/tty/serial/omap-serial.c index ca54f038ab45..1c2426931484 100644 --- a/trunk/drivers/tty/serial/omap-serial.c +++ b/trunk/drivers/tty/serial/omap-serial.c @@ -46,18 +46,6 @@ #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ -/* SCR register bitmasks */ -#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) -#define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) - -/* FCR register bitmasks */ -#define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6 -#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) -#define OMAP_UART_FCR_TX_FIFO_TRIG_SHIFT 4 - -/* TLR register bitmasks */ -#define OMAP_UART_TLR_TX_FIFO_TRIG_DMA_SHIFT 0 - static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; /* Forward declaration of functions */ @@ -706,7 +694,6 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, unsigned char efr = 0; unsigned long flags = 0; unsigned int baud, quot; - u32 tlr; switch (termios->c_cflag & CSIZE) { case CS5: @@ -824,28 +811,14 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, up->mcr = serial_in(up, UART_MCR); serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); /* FIFO ENABLE, DMA MODE */ - - up->scr |= OMAP_UART_SCR_TX_TRIG_GRANU1_MASK; - up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; + serial_out(up, UART_FCR, up->fcr); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); if (up->use_dma) { - tlr = 0; - } else { - up->scr &= ~OMAP_UART_SCR_TX_EMPTY; - - /* Set receive FIFO threshold to 1 */ - up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; - up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT); - - /* Set TX FIFO threshold to "63" (actually 1) */ - up->fcr |= (0x3 << OMAP_UART_FCR_TX_FIFO_TRIG_SHIFT); - tlr = (0xf << OMAP_UART_TLR_TX_FIFO_TRIG_DMA_SHIFT); + serial_out(up, UART_TI752_TLR, 0); + up->scr |= (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8); } - serial_out(up, UART_TI752_TLR, tlr); - serial_out(up, UART_FCR, up->fcr); - serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); - serial_out(up, UART_OMAP_SCR, up->scr); serial_out(up, UART_EFR, up->efr);