From c5bb4ff8ed3453921e34ddba1002be366125a9ad Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Sat, 5 Mar 2011 21:48:44 +0100 Subject: [PATCH] --- yaml --- r: 250076 b: refs/heads/master c: 83d74e036b94ffbf871667eede5ef02993709452 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/pci/pci.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index c0e14a1d92dd..b5881936213f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3504e47ffca5ed3f9e2cc7d37b428fbf1e00ad1b +refs/heads/master: 83d74e036b94ffbf871667eede5ef02993709452 diff --git a/trunk/drivers/pci/pci.c b/trunk/drivers/pci/pci.c index 2472e7177b4b..44d1c7c3876b 100644 --- a/trunk/drivers/pci/pci.c +++ b/trunk/drivers/pci/pci.c @@ -2479,6 +2479,21 @@ static int pci_af_flr(struct pci_dev *dev, int probe) return 0; } +/** + * pci_pm_reset - Put device into PCI_D3 and back into PCI_D0. + * @dev: Device to reset. + * @probe: If set, only check if the device can be reset this way. + * + * If @dev supports native PCI PM and its PCI_PM_CTRL_NO_SOFT_RESET flag is + * unset, it will be reinitialized internally when going from PCI_D3hot to + * PCI_D0. If that's the case and the device is not in a low-power state + * already, force it into PCI_D3hot and back to PCI_D0, causing it to be reset. + * + * NOTE: This causes the caller to sleep for twice the device power transition + * cooldown period, which for the D0->D3hot and D3hot->D0 transitions is 10 ms + * by devault (i.e. unless the @dev's d3_delay field has a different value). + * Moreover, only devices in D0 can be reset by this function. + */ static int pci_pm_reset(struct pci_dev *dev, int probe) { u16 csr;