From c8fc6842379c428fc044acdb0558e7feb3968d17 Mon Sep 17 00:00:00 2001 From: Anand Gadiyar Date: Sun, 22 Nov 2009 10:11:00 -0800 Subject: [PATCH] --- yaml --- r: 172790 b: refs/heads/master c: 83720a8230f87008deba8619428438f0276b83ca h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/plat-omap/include/plat/usb.h | 17 +++++++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index b03168d5a480..10ba5e60d297 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 56190b609b9c011363dd761838ce01cd3cd0a24f +refs/heads/master: 83720a8230f87008deba8619428438f0276b83ca diff --git a/trunk/arch/arm/plat-omap/include/plat/usb.h b/trunk/arch/arm/plat-omap/include/plat/usb.h index 33e72ca125d7..33a500eb2f93 100644 --- a/trunk/arch/arm/plat-omap/include/plat/usb.h +++ b/trunk/arch/arm/plat-omap/include/plat/usb.h @@ -5,6 +5,21 @@ #include +#define OMAP3_HS_USB_PORTS 3 +enum ehci_hcd_omap_mode { + EHCI_HCD_OMAP_MODE_UNKNOWN, + EHCI_HCD_OMAP_MODE_PHY, + EHCI_HCD_OMAP_MODE_TLL, +}; + +struct ehci_hcd_omap_platform_data { + enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS]; + unsigned phy_reset:1; + + /* have to be valid if phy_reset is true and portx is in phy mode */ + int reset_gpio_port[OMAP3_HS_USB_PORTS]; +}; + /*-------------------------------------------------------------------------*/ #define OMAP1_OTG_BASE 0xfffb0400 @@ -29,6 +44,8 @@ extern void usb_musb_init(void); +extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata); + #endif void omap_usb_init(struct omap_usb_config *pdata);