From c91a424e6a7b288bcbe71d12775b0293aeedb6d3 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Wed, 24 Oct 2012 11:31:59 -0200 Subject: [PATCH] --- yaml --- r: 345169 b: refs/heads/master c: 20474e90c948545c51da95689b8342a4f3bbaeb6 h: refs/heads/master i: 345167: c9db13ab16f28777b1938fedd1ca5650963dc862 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 14 -------------- 2 files changed, 1 insertion(+), 15 deletions(-) diff --git a/[refs] b/[refs] index b52a60086b47..392092ab28bf 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4f771f1055da08bc71a36dfdd0a2bde5beb666a4 +refs/heads/master: 20474e90c948545c51da95689b8342a4f3bbaeb6 diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index eb4dba617035..e5dc22c6a8f7 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -3228,9 +3228,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) if (encoder->pre_enable) encoder->pre_enable(encoder); - if (IS_HASWELL(dev)) - intel_ddi_enable_pipe_clock(intel_crtc); - /* Enable panel fitting for LVDS */ if (dev_priv->pch_pf_size && (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) || HAS_eDP)) { @@ -3249,11 +3246,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) */ intel_crtc_load_lut(crtc); - if (IS_HASWELL(dev)) { - intel_ddi_set_pipe_settings(crtc); - intel_ddi_enable_pipe_func(crtc); - } - intel_enable_pipe(dev_priv, pipe, is_pch_port); intel_enable_plane(dev_priv, plane, pipe); @@ -3404,16 +3396,10 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) intel_disable_pipe(dev_priv, pipe); - if (IS_HASWELL(dev)) - intel_ddi_disable_pipe_func(dev_priv, pipe); - /* Disable PF */ I915_WRITE(PF_CTL(pipe), 0); I915_WRITE(PF_WIN_SZ(pipe), 0); - if (IS_HASWELL(dev)) - intel_ddi_disable_pipe_clock(intel_crtc); - for_each_encoder_on_crtc(dev, crtc, encoder) if (encoder->post_disable) encoder->post_disable(encoder);