From c944d6ba1f99b8158f90f59d32ddb452882f5cb6 Mon Sep 17 00:00:00 2001
From: Joerg Roedel <joerg.roedel@amd.com>
Date: Tue, 5 Apr 2011 12:50:24 +0200
Subject: [PATCH] --- yaml --- r: 245391 b: refs/heads/master c:
 60f723b4117507c05c8b0b5c8b98ecc12a76878e h: refs/heads/master i:   245389:
 aa8222c4c827cebb76c71dad36e205ea086b546f   245387:
 36d9caafd576ef55b8fcde59b771d4f2dadc678d   245383:
 9f5dfd3f73320357d78d2d7355795dbb7aeb9af3   245375:
 c537cee65b20df850f3a224882d0ebfe29c4fe30 v: v3

---
 [refs]                                       | 2 +-
 trunk/arch/x86/include/asm/amd_iommu_types.h | 2 ++
 trunk/arch/x86/kernel/amd_iommu_init.c       | 4 ++++
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 2d96299014b7..dc18cee2f71a 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: cb41ed85efa01e633388314c03a4f3004c6b783b
+refs/heads/master: 60f723b4117507c05c8b0b5c8b98ecc12a76878e
diff --git a/trunk/arch/x86/include/asm/amd_iommu_types.h b/trunk/arch/x86/include/asm/amd_iommu_types.h
index f5d184e7d5be..cb811c965548 100644
--- a/trunk/arch/x86/include/asm/amd_iommu_types.h
+++ b/trunk/arch/x86/include/asm/amd_iommu_types.h
@@ -250,6 +250,8 @@ extern bool amd_iommu_dump;
 
 /* global flag if IOMMUs cache non-present entries */
 extern bool amd_iommu_np_cache;
+/* Only true if all IOMMUs support device IOTLBs */
+extern bool amd_iommu_iotlb_sup;
 
 /*
  * Make iterating over all IOMMUs easier
diff --git a/trunk/arch/x86/kernel/amd_iommu_init.c b/trunk/arch/x86/kernel/amd_iommu_init.c
index 8848dda808e2..b6c634f3dc07 100644
--- a/trunk/arch/x86/kernel/amd_iommu_init.c
+++ b/trunk/arch/x86/kernel/amd_iommu_init.c
@@ -137,6 +137,7 @@ int amd_iommus_present;
 
 /* IOMMUs have a non-present cache? */
 bool amd_iommu_np_cache __read_mostly;
+bool amd_iommu_iotlb_sup __read_mostly = true;
 
 /*
  * The ACPI table parsing functions set this variable on an error
@@ -673,6 +674,9 @@ static void __init init_iommu_from_pci(struct amd_iommu *iommu)
 					MMIO_GET_LD(range));
 	iommu->evt_msi_num = MMIO_MSI_NUM(misc);
 
+	if (!(iommu->cap & (1 << IOMMU_CAP_IOTLB)))
+		amd_iommu_iotlb_sup = false;
+
 	if (!is_rd890_iommu(iommu->dev))
 		return;