diff --git a/[refs] b/[refs]
index dbe0b7c9be17..15ca28ef7543 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
---
-refs/heads/master: bd7633195581c7665ce9dd80c665ec93466d1b64
+refs/heads/master: 1a47f7a84ef386c1f7f55f669598bd9894ceb73a
diff --git a/trunk/Documentation/DocBook/80211.tmpl b/trunk/Documentation/DocBook/80211.tmpl
index 03641a08e275..8906648f962b 100644
--- a/trunk/Documentation/DocBook/80211.tmpl
+++ b/trunk/Documentation/DocBook/80211.tmpl
@@ -268,10 +268,6 @@
!Finclude/net/mac80211.h ieee80211_ops
!Finclude/net/mac80211.h ieee80211_alloc_hw
!Finclude/net/mac80211.h ieee80211_register_hw
-!Finclude/net/mac80211.h ieee80211_get_tx_led_name
-!Finclude/net/mac80211.h ieee80211_get_rx_led_name
-!Finclude/net/mac80211.h ieee80211_get_assoc_led_name
-!Finclude/net/mac80211.h ieee80211_get_radio_led_name
!Finclude/net/mac80211.h ieee80211_unregister_hw
!Finclude/net/mac80211.h ieee80211_free_hw
@@ -382,6 +378,23 @@
+
+ LED support
+
+ Mac80211 supports various ways of blinking LEDs. Wherever possible,
+ device LEDs should be exposed as LED class devices and hooked up to
+ the appropriate trigger, which will then be triggered appropriately
+ by mac80211.
+
+!Finclude/net/mac80211.h ieee80211_get_tx_led_name
+!Finclude/net/mac80211.h ieee80211_get_rx_led_name
+!Finclude/net/mac80211.h ieee80211_get_assoc_led_name
+!Finclude/net/mac80211.h ieee80211_get_radio_led_name
+!Finclude/net/mac80211.h ieee80211_tpt_blink
+!Finclude/net/mac80211.h ieee80211_tpt_led_trigger_flags
+!Finclude/net/mac80211.h ieee80211_create_tpt_led_trigger
+
+
Hardware crypto acceleration
!Pinclude/net/mac80211.h Hardware crypto acceleration
diff --git a/trunk/Documentation/filesystems/Locking b/trunk/Documentation/filesystems/Locking
index 977d8919cc69..4471a416c274 100644
--- a/trunk/Documentation/filesystems/Locking
+++ b/trunk/Documentation/filesystems/Locking
@@ -19,6 +19,8 @@ prototypes:
void (*d_release)(struct dentry *);
void (*d_iput)(struct dentry *, struct inode *);
char *(*d_dname)((struct dentry *dentry, char *buffer, int buflen);
+ struct vfsmount *(*d_automount)(struct path *path);
+ int (*d_manage)(struct dentry *, bool);
locking rules:
rename_lock ->d_lock may block rcu-walk
@@ -29,6 +31,8 @@ d_delete: no yes no no
d_release: no no yes no
d_iput: no no yes no
d_dname: no no no no
+d_automount: no no yes no
+d_manage: no no yes (ref-walk) maybe
--------------------------- inode_operations ---------------------------
prototypes:
@@ -56,7 +60,6 @@ ata *);
ssize_t (*listxattr) (struct dentry *, char *, size_t);
int (*removexattr) (struct dentry *, const char *);
void (*truncate_range)(struct inode *, loff_t, loff_t);
- long (*fallocate)(struct inode *inode, int mode, loff_t offset, loff_t len);
int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len);
locking rules:
@@ -84,7 +87,6 @@ getxattr: no
listxattr: no
removexattr: yes
truncate_range: yes
-fallocate: no
fiemap: no
Additionally, ->rmdir(), ->unlink() and ->rename() have ->i_mutex on
victim.
@@ -343,7 +345,6 @@ prototypes:
int (*fl_grant)(struct file_lock *, struct file_lock *, int);
void (*fl_release_private)(struct file_lock *);
void (*fl_break)(struct file_lock *); /* break_lease callback */
- int (*fl_mylease)(struct file_lock *, struct file_lock *);
int (*fl_change)(struct file_lock **, int);
locking rules:
@@ -353,7 +354,6 @@ fl_notify: yes no
fl_grant: no no
fl_release_private: maybe no
fl_break: yes no
-fl_mylease: yes no
fl_change yes no
--------------------------- buffer_head -----------------------------------
@@ -435,6 +435,7 @@ prototypes:
ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *,
size_t, unsigned int);
int (*setlease)(struct file *, long, struct file_lock **);
+ long (*fallocate)(struct file *, int, loff_t, loff_t);
};
locking rules:
diff --git a/trunk/Documentation/filesystems/vfs.txt b/trunk/Documentation/filesystems/vfs.txt
index cae6d27c9f5b..94cf97b901d7 100644
--- a/trunk/Documentation/filesystems/vfs.txt
+++ b/trunk/Documentation/filesystems/vfs.txt
@@ -864,6 +864,8 @@ struct dentry_operations {
void (*d_release)(struct dentry *);
void (*d_iput)(struct dentry *, struct inode *);
char *(*d_dname)(struct dentry *, char *, int);
+ struct vfsmount *(*d_automount)(struct path *);
+ int (*d_manage)(struct dentry *, bool, bool);
};
d_revalidate: called when the VFS needs to revalidate a dentry. This
@@ -930,6 +932,47 @@ struct dentry_operations {
at the end of the buffer, and returns a pointer to the first char.
dynamic_dname() helper function is provided to take care of this.
+ d_automount: called when an automount dentry is to be traversed (optional).
+ This should create a new VFS mount record and return the record to the
+ caller. The caller is supplied with a path parameter giving the
+ automount directory to describe the automount target and the parent
+ VFS mount record to provide inheritable mount parameters. NULL should
+ be returned if someone else managed to make the automount first. If
+ the vfsmount creation failed, then an error code should be returned.
+ If -EISDIR is returned, then the directory will be treated as an
+ ordinary directory and returned to pathwalk to continue walking.
+
+ If a vfsmount is returned, the caller will attempt to mount it on the
+ mountpoint and will remove the vfsmount from its expiration list in
+ the case of failure. The vfsmount should be returned with 2 refs on
+ it to prevent automatic expiration - the caller will clean up the
+ additional ref.
+
+ This function is only used if DCACHE_NEED_AUTOMOUNT is set on the
+ dentry. This is set by __d_instantiate() if S_AUTOMOUNT is set on the
+ inode being added.
+
+ d_manage: called to allow the filesystem to manage the transition from a
+ dentry (optional). This allows autofs, for example, to hold up clients
+ waiting to explore behind a 'mountpoint' whilst letting the daemon go
+ past and construct the subtree there. 0 should be returned to let the
+ calling process continue. -EISDIR can be returned to tell pathwalk to
+ use this directory as an ordinary directory and to ignore anything
+ mounted on it and not to check the automount flag. Any other error
+ code will abort pathwalk completely.
+
+ If the 'mounting_here' parameter is true, then namespace_sem is being
+ held by the caller and the function should not initiate any mounts or
+ unmounts that it will then wait for.
+
+ If the 'rcu_walk' parameter is true, then the caller is doing a
+ pathwalk in RCU-walk mode. Sleeping is not permitted in this mode,
+ and the caller can be asked to leave it and call again by returing
+ -ECHILD.
+
+ This function is only used if DCACHE_MANAGE_TRANSIT is set on the
+ dentry being transited from.
+
Example :
static char *pipefs_dname(struct dentry *dent, char *buffer, int buflen)
diff --git a/trunk/Documentation/target/tcm_mod_builder.py b/trunk/Documentation/target/tcm_mod_builder.py
new file mode 100755
index 000000000000..dbeb8a0d7175
--- /dev/null
+++ b/trunk/Documentation/target/tcm_mod_builder.py
@@ -0,0 +1,1094 @@
+#!/usr/bin/python
+# The TCM v4 multi-protocol fabric module generation script for drivers/target/$NEW_MOD
+#
+# Copyright (c) 2010 Rising Tide Systems
+# Copyright (c) 2010 Linux-iSCSI.org
+#
+# Author: nab@kernel.org
+#
+import os, sys
+import subprocess as sub
+import string
+import re
+import optparse
+
+tcm_dir = ""
+
+fabric_ops = []
+fabric_mod_dir = ""
+fabric_mod_port = ""
+fabric_mod_init_port = ""
+
+def tcm_mod_err(msg):
+ print msg
+ sys.exit(1)
+
+def tcm_mod_create_module_subdir(fabric_mod_dir_var):
+
+ if os.path.isdir(fabric_mod_dir_var) == True:
+ return 1
+
+ print "Creating fabric_mod_dir: " + fabric_mod_dir_var
+ ret = os.mkdir(fabric_mod_dir_var)
+ if ret:
+ tcm_mod_err("Unable to mkdir " + fabric_mod_dir_var)
+
+ return
+
+def tcm_mod_build_FC_include(fabric_mod_dir_var, fabric_mod_name):
+ global fabric_mod_port
+ global fabric_mod_init_port
+ buf = ""
+
+ f = fabric_mod_dir_var + "/" + fabric_mod_name + "_base.h"
+ print "Writing file: " + f
+
+ p = open(f, 'w');
+ if not p:
+ tcm_mod_err("Unable to open file: " + f)
+
+ buf = "#define " + fabric_mod_name.upper() + "_VERSION \"v0.1\"\n"
+ buf += "#define " + fabric_mod_name.upper() + "_NAMELEN 32\n"
+ buf += "\n"
+ buf += "struct " + fabric_mod_name + "_nacl {\n"
+ buf += " /* Binary World Wide unique Port Name for FC Initiator Nport */\n"
+ buf += " u64 nport_wwpn;\n"
+ buf += " /* ASCII formatted WWPN for FC Initiator Nport */\n"
+ buf += " char nport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_nodeacl() */\n"
+ buf += " struct se_node_acl se_node_acl;\n"
+ buf += "};\n"
+ buf += "\n"
+ buf += "struct " + fabric_mod_name + "_tpg {\n"
+ buf += " /* FC lport target portal group tag for TCM */\n"
+ buf += " u16 lport_tpgt;\n"
+ buf += " /* Pointer back to " + fabric_mod_name + "_lport */\n"
+ buf += " struct " + fabric_mod_name + "_lport *lport;\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_tpg() */\n"
+ buf += " struct se_portal_group se_tpg;\n"
+ buf += "};\n"
+ buf += "\n"
+ buf += "struct " + fabric_mod_name + "_lport {\n"
+ buf += " /* SCSI protocol the lport is providing */\n"
+ buf += " u8 lport_proto_id;\n"
+ buf += " /* Binary World Wide unique Port Name for FC Target Lport */\n"
+ buf += " u64 lport_wwpn;\n"
+ buf += " /* ASCII formatted WWPN for FC Target Lport */\n"
+ buf += " char lport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_lport() */\n"
+ buf += " struct se_wwn lport_wwn;\n"
+ buf += "};\n"
+
+ ret = p.write(buf)
+ if ret:
+ tcm_mod_err("Unable to write f: " + f)
+
+ p.close()
+
+ fabric_mod_port = "lport"
+ fabric_mod_init_port = "nport"
+
+ return
+
+def tcm_mod_build_SAS_include(fabric_mod_dir_var, fabric_mod_name):
+ global fabric_mod_port
+ global fabric_mod_init_port
+ buf = ""
+
+ f = fabric_mod_dir_var + "/" + fabric_mod_name + "_base.h"
+ print "Writing file: " + f
+
+ p = open(f, 'w');
+ if not p:
+ tcm_mod_err("Unable to open file: " + f)
+
+ buf = "#define " + fabric_mod_name.upper() + "_VERSION \"v0.1\"\n"
+ buf += "#define " + fabric_mod_name.upper() + "_NAMELEN 32\n"
+ buf += "\n"
+ buf += "struct " + fabric_mod_name + "_nacl {\n"
+ buf += " /* Binary World Wide unique Port Name for SAS Initiator port */\n"
+ buf += " u64 iport_wwpn;\n"
+ buf += " /* ASCII formatted WWPN for Sas Initiator port */\n"
+ buf += " char iport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_nodeacl() */\n"
+ buf += " struct se_node_acl se_node_acl;\n"
+ buf += "};\n\n"
+ buf += "struct " + fabric_mod_name + "_tpg {\n"
+ buf += " /* SAS port target portal group tag for TCM */\n"
+ buf += " u16 tport_tpgt;\n"
+ buf += " /* Pointer back to " + fabric_mod_name + "_tport */\n"
+ buf += " struct " + fabric_mod_name + "_tport *tport;\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_tpg() */\n"
+ buf += " struct se_portal_group se_tpg;\n"
+ buf += "};\n\n"
+ buf += "struct " + fabric_mod_name + "_tport {\n"
+ buf += " /* SCSI protocol the tport is providing */\n"
+ buf += " u8 tport_proto_id;\n"
+ buf += " /* Binary World Wide unique Port Name for SAS Target port */\n"
+ buf += " u64 tport_wwpn;\n"
+ buf += " /* ASCII formatted WWPN for SAS Target port */\n"
+ buf += " char tport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_tport() */\n"
+ buf += " struct se_wwn tport_wwn;\n"
+ buf += "};\n"
+
+ ret = p.write(buf)
+ if ret:
+ tcm_mod_err("Unable to write f: " + f)
+
+ p.close()
+
+ fabric_mod_port = "tport"
+ fabric_mod_init_port = "iport"
+
+ return
+
+def tcm_mod_build_iSCSI_include(fabric_mod_dir_var, fabric_mod_name):
+ global fabric_mod_port
+ global fabric_mod_init_port
+ buf = ""
+
+ f = fabric_mod_dir_var + "/" + fabric_mod_name + "_base.h"
+ print "Writing file: " + f
+
+ p = open(f, 'w');
+ if not p:
+ tcm_mod_err("Unable to open file: " + f)
+
+ buf = "#define " + fabric_mod_name.upper() + "_VERSION \"v0.1\"\n"
+ buf += "#define " + fabric_mod_name.upper() + "_NAMELEN 32\n"
+ buf += "\n"
+ buf += "struct " + fabric_mod_name + "_nacl {\n"
+ buf += " /* ASCII formatted InitiatorName */\n"
+ buf += " char iport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_nodeacl() */\n"
+ buf += " struct se_node_acl se_node_acl;\n"
+ buf += "};\n\n"
+ buf += "struct " + fabric_mod_name + "_tpg {\n"
+ buf += " /* iSCSI target portal group tag for TCM */\n"
+ buf += " u16 tport_tpgt;\n"
+ buf += " /* Pointer back to " + fabric_mod_name + "_tport */\n"
+ buf += " struct " + fabric_mod_name + "_tport *tport;\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_tpg() */\n"
+ buf += " struct se_portal_group se_tpg;\n"
+ buf += "};\n\n"
+ buf += "struct " + fabric_mod_name + "_tport {\n"
+ buf += " /* SCSI protocol the tport is providing */\n"
+ buf += " u8 tport_proto_id;\n"
+ buf += " /* ASCII formatted TargetName for IQN */\n"
+ buf += " char tport_name[" + fabric_mod_name.upper() + "_NAMELEN];\n"
+ buf += " /* Returned by " + fabric_mod_name + "_make_tport() */\n"
+ buf += " struct se_wwn tport_wwn;\n"
+ buf += "};\n"
+
+ ret = p.write(buf)
+ if ret:
+ tcm_mod_err("Unable to write f: " + f)
+
+ p.close()
+
+ fabric_mod_port = "tport"
+ fabric_mod_init_port = "iport"
+
+ return
+
+def tcm_mod_build_base_includes(proto_ident, fabric_mod_dir_val, fabric_mod_name):
+
+ if proto_ident == "FC":
+ tcm_mod_build_FC_include(fabric_mod_dir_val, fabric_mod_name)
+ elif proto_ident == "SAS":
+ tcm_mod_build_SAS_include(fabric_mod_dir_val, fabric_mod_name)
+ elif proto_ident == "iSCSI":
+ tcm_mod_build_iSCSI_include(fabric_mod_dir_val, fabric_mod_name)
+ else:
+ print "Unsupported proto_ident: " + proto_ident
+ sys.exit(1)
+
+ return
+
+def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
+ buf = ""
+
+ f = fabric_mod_dir_var + "/" + fabric_mod_name + "_configfs.c"
+ print "Writing file: " + f
+
+ p = open(f, 'w');
+ if not p:
+ tcm_mod_err("Unable to open file: " + f)
+
+ buf = "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n\n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n\n"
+ buf += "#include <" + fabric_mod_name + "_base.h>\n"
+ buf += "#include <" + fabric_mod_name + "_fabric.h>\n\n"
+
+ buf += "/* Local pointer to allocated TCM configfs fabric module */\n"
+ buf += "struct target_fabric_configfs *" + fabric_mod_name + "_fabric_configfs;\n\n"
+
+ buf += "static struct se_node_acl *" + fabric_mod_name + "_make_nodeacl(\n"
+ buf += " struct se_portal_group *se_tpg,\n"
+ buf += " struct config_group *group,\n"
+ buf += " const char *name)\n"
+ buf += "{\n"
+ buf += " struct se_node_acl *se_nacl, *se_nacl_new;\n"
+ buf += " struct " + fabric_mod_name + "_nacl *nacl;\n"
+
+ if proto_ident == "FC" or proto_ident == "SAS":
+ buf += " u64 wwpn = 0;\n"
+
+ buf += " u32 nexus_depth;\n\n"
+ buf += " /* " + fabric_mod_name + "_parse_wwn(name, &wwpn, 1) < 0)\n"
+ buf += " return ERR_PTR(-EINVAL); */\n"
+ buf += " se_nacl_new = " + fabric_mod_name + "_alloc_fabric_acl(se_tpg);\n"
+ buf += " if (!(se_nacl_new))\n"
+ buf += " return ERR_PTR(-ENOMEM);\n"
+ buf += "//#warning FIXME: Hardcoded nexus depth in " + fabric_mod_name + "_make_nodeacl()\n"
+ buf += " nexus_depth = 1;\n"
+ buf += " /*\n"
+ buf += " * se_nacl_new may be released by core_tpg_add_initiator_node_acl()\n"
+ buf += " * when converting a NodeACL from demo mode -> explict\n"
+ buf += " */\n"
+ buf += " se_nacl = core_tpg_add_initiator_node_acl(se_tpg, se_nacl_new,\n"
+ buf += " name, nexus_depth);\n"
+ buf += " if (IS_ERR(se_nacl)) {\n"
+ buf += " " + fabric_mod_name + "_release_fabric_acl(se_tpg, se_nacl_new);\n"
+ buf += " return se_nacl;\n"
+ buf += " }\n"
+ buf += " /*\n"
+ buf += " * Locate our struct " + fabric_mod_name + "_nacl and set the FC Nport WWPN\n"
+ buf += " */\n"
+ buf += " nacl = container_of(se_nacl, struct " + fabric_mod_name + "_nacl, se_node_acl);\n"
+
+ if proto_ident == "FC" or proto_ident == "SAS":
+ buf += " nacl->" + fabric_mod_init_port + "_wwpn = wwpn;\n"
+
+ buf += " /* " + fabric_mod_name + "_format_wwn(&nacl->" + fabric_mod_init_port + "_name[0], " + fabric_mod_name.upper() + "_NAMELEN, wwpn); */\n\n"
+ buf += " return se_nacl;\n"
+ buf += "}\n\n"
+ buf += "static void " + fabric_mod_name + "_drop_nodeacl(struct se_node_acl *se_acl)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_nacl *nacl = container_of(se_acl,\n"
+ buf += " struct " + fabric_mod_name + "_nacl, se_node_acl);\n"
+ buf += " kfree(nacl);\n"
+ buf += "}\n\n"
+
+ buf += "static struct se_portal_group *" + fabric_mod_name + "_make_tpg(\n"
+ buf += " struct se_wwn *wwn,\n"
+ buf += " struct config_group *group,\n"
+ buf += " const char *name)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + "*" + fabric_mod_port + " = container_of(wwn,\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + ", " + fabric_mod_port + "_wwn);\n\n"
+ buf += " struct " + fabric_mod_name + "_tpg *tpg;\n"
+ buf += " unsigned long tpgt;\n"
+ buf += " int ret;\n\n"
+ buf += " if (strstr(name, \"tpgt_\") != name)\n"
+ buf += " return ERR_PTR(-EINVAL);\n"
+ buf += " if (strict_strtoul(name + 5, 10, &tpgt) || tpgt > UINT_MAX)\n"
+ buf += " return ERR_PTR(-EINVAL);\n\n"
+ buf += " tpg = kzalloc(sizeof(struct " + fabric_mod_name + "_tpg), GFP_KERNEL);\n"
+ buf += " if (!(tpg)) {\n"
+ buf += " printk(KERN_ERR \"Unable to allocate struct " + fabric_mod_name + "_tpg\");\n"
+ buf += " return ERR_PTR(-ENOMEM);\n"
+ buf += " }\n"
+ buf += " tpg->" + fabric_mod_port + " = " + fabric_mod_port + ";\n"
+ buf += " tpg->" + fabric_mod_port + "_tpgt = tpgt;\n\n"
+ buf += " ret = core_tpg_register(&" + fabric_mod_name + "_fabric_configfs->tf_ops, wwn,\n"
+ buf += " &tpg->se_tpg, (void *)tpg,\n"
+ buf += " TRANSPORT_TPG_TYPE_NORMAL);\n"
+ buf += " if (ret < 0) {\n"
+ buf += " kfree(tpg);\n"
+ buf += " return NULL;\n"
+ buf += " }\n"
+ buf += " return &tpg->se_tpg;\n"
+ buf += "}\n\n"
+ buf += "static void " + fabric_mod_name + "_drop_tpg(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"
+ buf += " struct " + fabric_mod_name + "_tpg, se_tpg);\n\n"
+ buf += " core_tpg_deregister(se_tpg);\n"
+ buf += " kfree(tpg);\n"
+ buf += "}\n\n"
+
+ buf += "static struct se_wwn *" + fabric_mod_name + "_make_" + fabric_mod_port + "(\n"
+ buf += " struct target_fabric_configfs *tf,\n"
+ buf += " struct config_group *group,\n"
+ buf += " const char *name)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + ";\n"
+
+ if proto_ident == "FC" or proto_ident == "SAS":
+ buf += " u64 wwpn = 0;\n\n"
+
+ buf += " /* if (" + fabric_mod_name + "_parse_wwn(name, &wwpn, 1) < 0)\n"
+ buf += " return ERR_PTR(-EINVAL); */\n\n"
+ buf += " " + fabric_mod_port + " = kzalloc(sizeof(struct " + fabric_mod_name + "_" + fabric_mod_port + "), GFP_KERNEL);\n"
+ buf += " if (!(" + fabric_mod_port + ")) {\n"
+ buf += " printk(KERN_ERR \"Unable to allocate struct " + fabric_mod_name + "_" + fabric_mod_port + "\");\n"
+ buf += " return ERR_PTR(-ENOMEM);\n"
+ buf += " }\n"
+
+ if proto_ident == "FC" or proto_ident == "SAS":
+ buf += " " + fabric_mod_port + "->" + fabric_mod_port + "_wwpn = wwpn;\n"
+
+ buf += " /* " + fabric_mod_name + "_format_wwn(&" + fabric_mod_port + "->" + fabric_mod_port + "_name[0], " + fabric_mod_name.upper() + "__NAMELEN, wwpn); */\n\n"
+ buf += " return &" + fabric_mod_port + "->" + fabric_mod_port + "_wwn;\n"
+ buf += "}\n\n"
+ buf += "static void " + fabric_mod_name + "_drop_" + fabric_mod_port + "(struct se_wwn *wwn)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = container_of(wwn,\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + ", " + fabric_mod_port + "_wwn);\n"
+ buf += " kfree(" + fabric_mod_port + ");\n"
+ buf += "}\n\n"
+ buf += "static ssize_t " + fabric_mod_name + "_wwn_show_attr_version(\n"
+ buf += " struct target_fabric_configfs *tf,\n"
+ buf += " char *page)\n"
+ buf += "{\n"
+ buf += " return sprintf(page, \"" + fabric_mod_name.upper() + " fabric module %s on %s/%s\"\n"
+ buf += " \"on \"UTS_RELEASE\"\\n\", " + fabric_mod_name.upper() + "_VERSION, utsname()->sysname,\n"
+ buf += " utsname()->machine);\n"
+ buf += "}\n\n"
+ buf += "TF_WWN_ATTR_RO(" + fabric_mod_name + ", version);\n\n"
+ buf += "static struct configfs_attribute *" + fabric_mod_name + "_wwn_attrs[] = {\n"
+ buf += " &" + fabric_mod_name + "_wwn_version.attr,\n"
+ buf += " NULL,\n"
+ buf += "};\n\n"
+
+ buf += "static struct target_core_fabric_ops " + fabric_mod_name + "_ops = {\n"
+ buf += " .get_fabric_name = " + fabric_mod_name + "_get_fabric_name,\n"
+ buf += " .get_fabric_proto_ident = " + fabric_mod_name + "_get_fabric_proto_ident,\n"
+ buf += " .tpg_get_wwn = " + fabric_mod_name + "_get_fabric_wwn,\n"
+ buf += " .tpg_get_tag = " + fabric_mod_name + "_get_tag,\n"
+ buf += " .tpg_get_default_depth = " + fabric_mod_name + "_get_default_depth,\n"
+ buf += " .tpg_get_pr_transport_id = " + fabric_mod_name + "_get_pr_transport_id,\n"
+ buf += " .tpg_get_pr_transport_id_len = " + fabric_mod_name + "_get_pr_transport_id_len,\n"
+ buf += " .tpg_parse_pr_out_transport_id = " + fabric_mod_name + "_parse_pr_out_transport_id,\n"
+ buf += " .tpg_check_demo_mode = " + fabric_mod_name + "_check_false,\n"
+ buf += " .tpg_check_demo_mode_cache = " + fabric_mod_name + "_check_true,\n"
+ buf += " .tpg_check_demo_mode_write_protect = " + fabric_mod_name + "_check_true,\n"
+ buf += " .tpg_check_prod_mode_write_protect = " + fabric_mod_name + "_check_false,\n"
+ buf += " .tpg_alloc_fabric_acl = " + fabric_mod_name + "_alloc_fabric_acl,\n"
+ buf += " .tpg_release_fabric_acl = " + fabric_mod_name + "_release_fabric_acl,\n"
+ buf += " .tpg_get_inst_index = " + fabric_mod_name + "_tpg_get_inst_index,\n"
+ buf += " .release_cmd_to_pool = " + fabric_mod_name + "_release_cmd,\n"
+ buf += " .release_cmd_direct = " + fabric_mod_name + "_release_cmd,\n"
+ buf += " .shutdown_session = " + fabric_mod_name + "_shutdown_session,\n"
+ buf += " .close_session = " + fabric_mod_name + "_close_session,\n"
+ buf += " .stop_session = " + fabric_mod_name + "_stop_session,\n"
+ buf += " .fall_back_to_erl0 = " + fabric_mod_name + "_reset_nexus,\n"
+ buf += " .sess_logged_in = " + fabric_mod_name + "_sess_logged_in,\n"
+ buf += " .sess_get_index = " + fabric_mod_name + "_sess_get_index,\n"
+ buf += " .sess_get_initiator_sid = NULL,\n"
+ buf += " .write_pending = " + fabric_mod_name + "_write_pending,\n"
+ buf += " .write_pending_status = " + fabric_mod_name + "_write_pending_status,\n"
+ buf += " .set_default_node_attributes = " + fabric_mod_name + "_set_default_node_attrs,\n"
+ buf += " .get_task_tag = " + fabric_mod_name + "_get_task_tag,\n"
+ buf += " .get_cmd_state = " + fabric_mod_name + "_get_cmd_state,\n"
+ buf += " .new_cmd_failure = " + fabric_mod_name + "_new_cmd_failure,\n"
+ buf += " .queue_data_in = " + fabric_mod_name + "_queue_data_in,\n"
+ buf += " .queue_status = " + fabric_mod_name + "_queue_status,\n"
+ buf += " .queue_tm_rsp = " + fabric_mod_name + "_queue_tm_rsp,\n"
+ buf += " .get_fabric_sense_len = " + fabric_mod_name + "_get_fabric_sense_len,\n"
+ buf += " .set_fabric_sense_len = " + fabric_mod_name + "_set_fabric_sense_len,\n"
+ buf += " .is_state_remove = " + fabric_mod_name + "_is_state_remove,\n"
+ buf += " .pack_lun = " + fabric_mod_name + "_pack_lun,\n"
+ buf += " /*\n"
+ buf += " * Setup function pointers for generic logic in target_core_fabric_configfs.c\n"
+ buf += " */\n"
+ buf += " .fabric_make_wwn = " + fabric_mod_name + "_make_" + fabric_mod_port + ",\n"
+ buf += " .fabric_drop_wwn = " + fabric_mod_name + "_drop_" + fabric_mod_port + ",\n"
+ buf += " .fabric_make_tpg = " + fabric_mod_name + "_make_tpg,\n"
+ buf += " .fabric_drop_tpg = " + fabric_mod_name + "_drop_tpg,\n"
+ buf += " .fabric_post_link = NULL,\n"
+ buf += " .fabric_pre_unlink = NULL,\n"
+ buf += " .fabric_make_np = NULL,\n"
+ buf += " .fabric_drop_np = NULL,\n"
+ buf += " .fabric_make_nodeacl = " + fabric_mod_name + "_make_nodeacl,\n"
+ buf += " .fabric_drop_nodeacl = " + fabric_mod_name + "_drop_nodeacl,\n"
+ buf += "};\n\n"
+
+ buf += "static int " + fabric_mod_name + "_register_configfs(void)\n"
+ buf += "{\n"
+ buf += " struct target_fabric_configfs *fabric;\n"
+ buf += " int ret;\n\n"
+ buf += " printk(KERN_INFO \"" + fabric_mod_name.upper() + " fabric module %s on %s/%s\"\n"
+ buf += " \" on \"UTS_RELEASE\"\\n\"," + fabric_mod_name.upper() + "_VERSION, utsname()->sysname,\n"
+ buf += " utsname()->machine);\n"
+ buf += " /*\n"
+ buf += " * Register the top level struct config_item_type with TCM core\n"
+ buf += " */\n"
+ buf += " fabric = target_fabric_configfs_init(THIS_MODULE, \"" + fabric_mod_name[4:] + "\");\n"
+ buf += " if (!(fabric)) {\n"
+ buf += " printk(KERN_ERR \"target_fabric_configfs_init() failed\\n\");\n"
+ buf += " return -ENOMEM;\n"
+ buf += " }\n"
+ buf += " /*\n"
+ buf += " * Setup fabric->tf_ops from our local " + fabric_mod_name + "_ops\n"
+ buf += " */\n"
+ buf += " fabric->tf_ops = " + fabric_mod_name + "_ops;\n"
+ buf += " /*\n"
+ buf += " * Setup default attribute lists for various fabric->tf_cit_tmpl\n"
+ buf += " */\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_wwn_cit.ct_attrs = " + fabric_mod_name + "_wwn_attrs;\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_tpg_base_cit.ct_attrs = NULL;\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_tpg_attrib_cit.ct_attrs = NULL;\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_tpg_param_cit.ct_attrs = NULL;\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_tpg_np_base_cit.ct_attrs = NULL;\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_tpg_nacl_base_cit.ct_attrs = NULL;\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_tpg_nacl_attrib_cit.ct_attrs = NULL;\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_tpg_nacl_auth_cit.ct_attrs = NULL;\n"
+ buf += " TF_CIT_TMPL(fabric)->tfc_tpg_nacl_param_cit.ct_attrs = NULL;\n"
+ buf += " /*\n"
+ buf += " * Register the fabric for use within TCM\n"
+ buf += " */\n"
+ buf += " ret = target_fabric_configfs_register(fabric);\n"
+ buf += " if (ret < 0) {\n"
+ buf += " printk(KERN_ERR \"target_fabric_configfs_register() failed\"\n"
+ buf += " \" for " + fabric_mod_name.upper() + "\\n\");\n"
+ buf += " return ret;\n"
+ buf += " }\n"
+ buf += " /*\n"
+ buf += " * Setup our local pointer to *fabric\n"
+ buf += " */\n"
+ buf += " " + fabric_mod_name + "_fabric_configfs = fabric;\n"
+ buf += " printk(KERN_INFO \"" + fabric_mod_name.upper() + "[0] - Set fabric -> " + fabric_mod_name + "_fabric_configfs\\n\");\n"
+ buf += " return 0;\n"
+ buf += "};\n\n"
+ buf += "static void " + fabric_mod_name + "_deregister_configfs(void)\n"
+ buf += "{\n"
+ buf += " if (!(" + fabric_mod_name + "_fabric_configfs))\n"
+ buf += " return;\n\n"
+ buf += " target_fabric_configfs_deregister(" + fabric_mod_name + "_fabric_configfs);\n"
+ buf += " " + fabric_mod_name + "_fabric_configfs = NULL;\n"
+ buf += " printk(KERN_INFO \"" + fabric_mod_name.upper() + "[0] - Cleared " + fabric_mod_name + "_fabric_configfs\\n\");\n"
+ buf += "};\n\n"
+
+ buf += "static int __init " + fabric_mod_name + "_init(void)\n"
+ buf += "{\n"
+ buf += " int ret;\n\n"
+ buf += " ret = " + fabric_mod_name + "_register_configfs();\n"
+ buf += " if (ret < 0)\n"
+ buf += " return ret;\n\n"
+ buf += " return 0;\n"
+ buf += "};\n\n"
+ buf += "static void " + fabric_mod_name + "_exit(void)\n"
+ buf += "{\n"
+ buf += " " + fabric_mod_name + "_deregister_configfs();\n"
+ buf += "};\n\n"
+
+ buf += "#ifdef MODULE\n"
+ buf += "MODULE_DESCRIPTION(\"" + fabric_mod_name.upper() + " series fabric driver\");\n"
+ buf += "MODULE_LICENSE(\"GPL\");\n"
+ buf += "module_init(" + fabric_mod_name + "_init);\n"
+ buf += "module_exit(" + fabric_mod_name + "_exit);\n"
+ buf += "#endif\n"
+
+ ret = p.write(buf)
+ if ret:
+ tcm_mod_err("Unable to write f: " + f)
+
+ p.close()
+
+ return
+
+def tcm_mod_scan_fabric_ops(tcm_dir):
+
+ fabric_ops_api = tcm_dir + "include/target/target_core_fabric_ops.h"
+
+ print "Using tcm_mod_scan_fabric_ops: " + fabric_ops_api
+ process_fo = 0;
+
+ p = open(fabric_ops_api, 'r')
+
+ line = p.readline()
+ while line:
+ if process_fo == 0 and re.search('struct target_core_fabric_ops {', line):
+ line = p.readline()
+ continue
+
+ if process_fo == 0:
+ process_fo = 1;
+ line = p.readline()
+ # Search for function pointer
+ if not re.search('\(\*', line):
+ continue
+
+ fabric_ops.append(line.rstrip())
+ continue
+
+ line = p.readline()
+ # Search for function pointer
+ if not re.search('\(\*', line):
+ continue
+
+ fabric_ops.append(line.rstrip())
+
+ p.close()
+ return
+
+def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name):
+ buf = ""
+ bufi = ""
+
+ f = fabric_mod_dir_var + "/" + fabric_mod_name + "_fabric.c"
+ print "Writing file: " + f
+
+ p = open(f, 'w')
+ if not p:
+ tcm_mod_err("Unable to open file: " + f)
+
+ fi = fabric_mod_dir_var + "/" + fabric_mod_name + "_fabric.h"
+ print "Writing file: " + fi
+
+ pi = open(fi, 'w')
+ if not pi:
+ tcm_mod_err("Unable to open file: " + fi)
+
+ buf = "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n\n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include \n"
+ buf += "#include <" + fabric_mod_name + "_base.h>\n"
+ buf += "#include <" + fabric_mod_name + "_fabric.h>\n\n"
+
+ buf += "int " + fabric_mod_name + "_check_true(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " return 1;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_check_true(struct se_portal_group *);\n"
+
+ buf += "int " + fabric_mod_name + "_check_false(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_check_false(struct se_portal_group *);\n"
+
+ total_fabric_ops = len(fabric_ops)
+ i = 0
+
+ while i < total_fabric_ops:
+ fo = fabric_ops[i]
+ i += 1
+# print "fabric_ops: " + fo
+
+ if re.search('get_fabric_name', fo):
+ buf += "char *" + fabric_mod_name + "_get_fabric_name(void)\n"
+ buf += "{\n"
+ buf += " return \"" + fabric_mod_name[4:] + "\";\n"
+ buf += "}\n\n"
+ bufi += "char *" + fabric_mod_name + "_get_fabric_name(void);\n"
+ continue
+
+ if re.search('get_fabric_proto_ident', fo):
+ buf += "u8 " + fabric_mod_name + "_get_fabric_proto_ident(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"
+ buf += " struct " + fabric_mod_name + "_tpg, se_tpg);\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg->" + fabric_mod_port + ";\n"
+ buf += " u8 proto_id;\n\n"
+ buf += " switch (" + fabric_mod_port + "->" + fabric_mod_port + "_proto_id) {\n"
+ if proto_ident == "FC":
+ buf += " case SCSI_PROTOCOL_FCP:\n"
+ buf += " default:\n"
+ buf += " proto_id = fc_get_fabric_proto_ident(se_tpg);\n"
+ buf += " break;\n"
+ elif proto_ident == "SAS":
+ buf += " case SCSI_PROTOCOL_SAS:\n"
+ buf += " default:\n"
+ buf += " proto_id = sas_get_fabric_proto_ident(se_tpg);\n"
+ buf += " break;\n"
+ elif proto_ident == "iSCSI":
+ buf += " case SCSI_PROTOCOL_ISCSI:\n"
+ buf += " default:\n"
+ buf += " proto_id = iscsi_get_fabric_proto_ident(se_tpg);\n"
+ buf += " break;\n"
+
+ buf += " }\n\n"
+ buf += " return proto_id;\n"
+ buf += "}\n\n"
+ bufi += "u8 " + fabric_mod_name + "_get_fabric_proto_ident(struct se_portal_group *);\n"
+
+ if re.search('get_wwn', fo):
+ buf += "char *" + fabric_mod_name + "_get_fabric_wwn(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"
+ buf += " struct " + fabric_mod_name + "_tpg, se_tpg);\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg->" + fabric_mod_port + ";\n\n"
+ buf += " return &" + fabric_mod_port + "->" + fabric_mod_port + "_name[0];\n"
+ buf += "}\n\n"
+ bufi += "char *" + fabric_mod_name + "_get_fabric_wwn(struct se_portal_group *);\n"
+
+ if re.search('get_tag', fo):
+ buf += "u16 " + fabric_mod_name + "_get_tag(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"
+ buf += " struct " + fabric_mod_name + "_tpg, se_tpg);\n"
+ buf += " return tpg->" + fabric_mod_port + "_tpgt;\n"
+ buf += "}\n\n"
+ bufi += "u16 " + fabric_mod_name + "_get_tag(struct se_portal_group *);\n"
+
+ if re.search('get_default_depth', fo):
+ buf += "u32 " + fabric_mod_name + "_get_default_depth(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " return 1;\n"
+ buf += "}\n\n"
+ bufi += "u32 " + fabric_mod_name + "_get_default_depth(struct se_portal_group *);\n"
+
+ if re.search('get_pr_transport_id\)\(', fo):
+ buf += "u32 " + fabric_mod_name + "_get_pr_transport_id(\n"
+ buf += " struct se_portal_group *se_tpg,\n"
+ buf += " struct se_node_acl *se_nacl,\n"
+ buf += " struct t10_pr_registration *pr_reg,\n"
+ buf += " int *format_code,\n"
+ buf += " unsigned char *buf)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"
+ buf += " struct " + fabric_mod_name + "_tpg, se_tpg);\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg->" + fabric_mod_port + ";\n"
+ buf += " int ret = 0;\n\n"
+ buf += " switch (" + fabric_mod_port + "->" + fabric_mod_port + "_proto_id) {\n"
+ if proto_ident == "FC":
+ buf += " case SCSI_PROTOCOL_FCP:\n"
+ buf += " default:\n"
+ buf += " ret = fc_get_pr_transport_id(se_tpg, se_nacl, pr_reg,\n"
+ buf += " format_code, buf);\n"
+ buf += " break;\n"
+ elif proto_ident == "SAS":
+ buf += " case SCSI_PROTOCOL_SAS:\n"
+ buf += " default:\n"
+ buf += " ret = sas_get_pr_transport_id(se_tpg, se_nacl, pr_reg,\n"
+ buf += " format_code, buf);\n"
+ buf += " break;\n"
+ elif proto_ident == "iSCSI":
+ buf += " case SCSI_PROTOCOL_ISCSI:\n"
+ buf += " default:\n"
+ buf += " ret = iscsi_get_pr_transport_id(se_tpg, se_nacl, pr_reg,\n"
+ buf += " format_code, buf);\n"
+ buf += " break;\n"
+
+ buf += " }\n\n"
+ buf += " return ret;\n"
+ buf += "}\n\n"
+ bufi += "u32 " + fabric_mod_name + "_get_pr_transport_id(struct se_portal_group *,\n"
+ bufi += " struct se_node_acl *, struct t10_pr_registration *,\n"
+ bufi += " int *, unsigned char *);\n"
+
+ if re.search('get_pr_transport_id_len\)\(', fo):
+ buf += "u32 " + fabric_mod_name + "_get_pr_transport_id_len(\n"
+ buf += " struct se_portal_group *se_tpg,\n"
+ buf += " struct se_node_acl *se_nacl,\n"
+ buf += " struct t10_pr_registration *pr_reg,\n"
+ buf += " int *format_code)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"
+ buf += " struct " + fabric_mod_name + "_tpg, se_tpg);\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg->" + fabric_mod_port + ";\n"
+ buf += " int ret = 0;\n\n"
+ buf += " switch (" + fabric_mod_port + "->" + fabric_mod_port + "_proto_id) {\n"
+ if proto_ident == "FC":
+ buf += " case SCSI_PROTOCOL_FCP:\n"
+ buf += " default:\n"
+ buf += " ret = fc_get_pr_transport_id_len(se_tpg, se_nacl, pr_reg,\n"
+ buf += " format_code);\n"
+ buf += " break;\n"
+ elif proto_ident == "SAS":
+ buf += " case SCSI_PROTOCOL_SAS:\n"
+ buf += " default:\n"
+ buf += " ret = sas_get_pr_transport_id_len(se_tpg, se_nacl, pr_reg,\n"
+ buf += " format_code);\n"
+ buf += " break;\n"
+ elif proto_ident == "iSCSI":
+ buf += " case SCSI_PROTOCOL_ISCSI:\n"
+ buf += " default:\n"
+ buf += " ret = iscsi_get_pr_transport_id_len(se_tpg, se_nacl, pr_reg,\n"
+ buf += " format_code);\n"
+ buf += " break;\n"
+
+
+ buf += " }\n\n"
+ buf += " return ret;\n"
+ buf += "}\n\n"
+ bufi += "u32 " + fabric_mod_name + "_get_pr_transport_id_len(struct se_portal_group *,\n"
+ bufi += " struct se_node_acl *, struct t10_pr_registration *,\n"
+ bufi += " int *);\n"
+
+ if re.search('parse_pr_out_transport_id\)\(', fo):
+ buf += "char *" + fabric_mod_name + "_parse_pr_out_transport_id(\n"
+ buf += " struct se_portal_group *se_tpg,\n"
+ buf += " const char *buf,\n"
+ buf += " u32 *out_tid_len,\n"
+ buf += " char **port_nexus_ptr)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_tpg *tpg = container_of(se_tpg,\n"
+ buf += " struct " + fabric_mod_name + "_tpg, se_tpg);\n"
+ buf += " struct " + fabric_mod_name + "_" + fabric_mod_port + " *" + fabric_mod_port + " = tpg->" + fabric_mod_port + ";\n"
+ buf += " char *tid = NULL;\n\n"
+ buf += " switch (" + fabric_mod_port + "->" + fabric_mod_port + "_proto_id) {\n"
+ if proto_ident == "FC":
+ buf += " case SCSI_PROTOCOL_FCP:\n"
+ buf += " default:\n"
+ buf += " tid = fc_parse_pr_out_transport_id(se_tpg, buf, out_tid_len,\n"
+ buf += " port_nexus_ptr);\n"
+ elif proto_ident == "SAS":
+ buf += " case SCSI_PROTOCOL_SAS:\n"
+ buf += " default:\n"
+ buf += " tid = sas_parse_pr_out_transport_id(se_tpg, buf, out_tid_len,\n"
+ buf += " port_nexus_ptr);\n"
+ elif proto_ident == "iSCSI":
+ buf += " case SCSI_PROTOCOL_ISCSI:\n"
+ buf += " default:\n"
+ buf += " tid = iscsi_parse_pr_out_transport_id(se_tpg, buf, out_tid_len,\n"
+ buf += " port_nexus_ptr);\n"
+
+ buf += " }\n\n"
+ buf += " return tid;\n"
+ buf += "}\n\n"
+ bufi += "char *" + fabric_mod_name + "_parse_pr_out_transport_id(struct se_portal_group *,\n"
+ bufi += " const char *, u32 *, char **);\n"
+
+ if re.search('alloc_fabric_acl\)\(', fo):
+ buf += "struct se_node_acl *" + fabric_mod_name + "_alloc_fabric_acl(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_nacl *nacl;\n\n"
+ buf += " nacl = kzalloc(sizeof(struct " + fabric_mod_name + "_nacl), GFP_KERNEL);\n"
+ buf += " if (!(nacl)) {\n"
+ buf += " printk(KERN_ERR \"Unable to alocate struct " + fabric_mod_name + "_nacl\\n\");\n"
+ buf += " return NULL;\n"
+ buf += " }\n\n"
+ buf += " return &nacl->se_node_acl;\n"
+ buf += "}\n\n"
+ bufi += "struct se_node_acl *" + fabric_mod_name + "_alloc_fabric_acl(struct se_portal_group *);\n"
+
+ if re.search('release_fabric_acl\)\(', fo):
+ buf += "void " + fabric_mod_name + "_release_fabric_acl(\n"
+ buf += " struct se_portal_group *se_tpg,\n"
+ buf += " struct se_node_acl *se_nacl)\n"
+ buf += "{\n"
+ buf += " struct " + fabric_mod_name + "_nacl *nacl = container_of(se_nacl,\n"
+ buf += " struct " + fabric_mod_name + "_nacl, se_node_acl);\n"
+ buf += " kfree(nacl);\n"
+ buf += "}\n\n"
+ bufi += "void " + fabric_mod_name + "_release_fabric_acl(struct se_portal_group *,\n"
+ bufi += " struct se_node_acl *);\n"
+
+ if re.search('tpg_get_inst_index\)\(', fo):
+ buf += "u32 " + fabric_mod_name + "_tpg_get_inst_index(struct se_portal_group *se_tpg)\n"
+ buf += "{\n"
+ buf += " return 1;\n"
+ buf += "}\n\n"
+ bufi += "u32 " + fabric_mod_name + "_tpg_get_inst_index(struct se_portal_group *);\n"
+
+ if re.search('release_cmd_to_pool', fo):
+ buf += "void " + fabric_mod_name + "_release_cmd(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return;\n"
+ buf += "}\n\n"
+ bufi += "void " + fabric_mod_name + "_release_cmd(struct se_cmd *);\n"
+
+ if re.search('shutdown_session\)\(', fo):
+ buf += "int " + fabric_mod_name + "_shutdown_session(struct se_session *se_sess)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_shutdown_session(struct se_session *);\n"
+
+ if re.search('close_session\)\(', fo):
+ buf += "void " + fabric_mod_name + "_close_session(struct se_session *se_sess)\n"
+ buf += "{\n"
+ buf += " return;\n"
+ buf += "}\n\n"
+ bufi += "void " + fabric_mod_name + "_close_session(struct se_session *);\n"
+
+ if re.search('stop_session\)\(', fo):
+ buf += "void " + fabric_mod_name + "_stop_session(struct se_session *se_sess, int sess_sleep , int conn_sleep)\n"
+ buf += "{\n"
+ buf += " return;\n"
+ buf += "}\n\n"
+ bufi += "void " + fabric_mod_name + "_stop_session(struct se_session *, int, int);\n"
+
+ if re.search('fall_back_to_erl0\)\(', fo):
+ buf += "void " + fabric_mod_name + "_reset_nexus(struct se_session *se_sess)\n"
+ buf += "{\n"
+ buf += " return;\n"
+ buf += "}\n\n"
+ bufi += "void " + fabric_mod_name + "_reset_nexus(struct se_session *);\n"
+
+ if re.search('sess_logged_in\)\(', fo):
+ buf += "int " + fabric_mod_name + "_sess_logged_in(struct se_session *se_sess)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_sess_logged_in(struct se_session *);\n"
+
+ if re.search('sess_get_index\)\(', fo):
+ buf += "u32 " + fabric_mod_name + "_sess_get_index(struct se_session *se_sess)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "u32 " + fabric_mod_name + "_sess_get_index(struct se_session *);\n"
+
+ if re.search('write_pending\)\(', fo):
+ buf += "int " + fabric_mod_name + "_write_pending(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_write_pending(struct se_cmd *);\n"
+
+ if re.search('write_pending_status\)\(', fo):
+ buf += "int " + fabric_mod_name + "_write_pending_status(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_write_pending_status(struct se_cmd *);\n"
+
+ if re.search('set_default_node_attributes\)\(', fo):
+ buf += "void " + fabric_mod_name + "_set_default_node_attrs(struct se_node_acl *nacl)\n"
+ buf += "{\n"
+ buf += " return;\n"
+ buf += "}\n\n"
+ bufi += "void " + fabric_mod_name + "_set_default_node_attrs(struct se_node_acl *);\n"
+
+ if re.search('get_task_tag\)\(', fo):
+ buf += "u32 " + fabric_mod_name + "_get_task_tag(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "u32 " + fabric_mod_name + "_get_task_tag(struct se_cmd *);\n"
+
+ if re.search('get_cmd_state\)\(', fo):
+ buf += "int " + fabric_mod_name + "_get_cmd_state(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_get_cmd_state(struct se_cmd *);\n"
+
+ if re.search('new_cmd_failure\)\(', fo):
+ buf += "void " + fabric_mod_name + "_new_cmd_failure(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return;\n"
+ buf += "}\n\n"
+ bufi += "void " + fabric_mod_name + "_new_cmd_failure(struct se_cmd *);\n"
+
+ if re.search('queue_data_in\)\(', fo):
+ buf += "int " + fabric_mod_name + "_queue_data_in(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_queue_data_in(struct se_cmd *);\n"
+
+ if re.search('queue_status\)\(', fo):
+ buf += "int " + fabric_mod_name + "_queue_status(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_queue_status(struct se_cmd *);\n"
+
+ if re.search('queue_tm_rsp\)\(', fo):
+ buf += "int " + fabric_mod_name + "_queue_tm_rsp(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_queue_tm_rsp(struct se_cmd *);\n"
+
+ if re.search('get_fabric_sense_len\)\(', fo):
+ buf += "u16 " + fabric_mod_name + "_get_fabric_sense_len(void)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "u16 " + fabric_mod_name + "_get_fabric_sense_len(void);\n"
+
+ if re.search('set_fabric_sense_len\)\(', fo):
+ buf += "u16 " + fabric_mod_name + "_set_fabric_sense_len(struct se_cmd *se_cmd, u32 sense_length)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "u16 " + fabric_mod_name + "_set_fabric_sense_len(struct se_cmd *, u32);\n"
+
+ if re.search('is_state_remove\)\(', fo):
+ buf += "int " + fabric_mod_name + "_is_state_remove(struct se_cmd *se_cmd)\n"
+ buf += "{\n"
+ buf += " return 0;\n"
+ buf += "}\n\n"
+ bufi += "int " + fabric_mod_name + "_is_state_remove(struct se_cmd *);\n"
+
+ if re.search('pack_lun\)\(', fo):
+ buf += "u64 " + fabric_mod_name + "_pack_lun(unsigned int lun)\n"
+ buf += "{\n"
+ buf += " WARN_ON(lun >= 256);\n"
+ buf += " /* Caller wants this byte-swapped */\n"
+ buf += " return cpu_to_le64((lun & 0xff) << 8);\n"
+ buf += "}\n\n"
+ bufi += "u64 " + fabric_mod_name + "_pack_lun(unsigned int);\n"
+
+
+ ret = p.write(buf)
+ if ret:
+ tcm_mod_err("Unable to write f: " + f)
+
+ p.close()
+
+ ret = pi.write(bufi)
+ if ret:
+ tcm_mod_err("Unable to write fi: " + fi)
+
+ pi.close()
+ return
+
+def tcm_mod_build_kbuild(fabric_mod_dir_var, fabric_mod_name):
+
+ buf = ""
+ f = fabric_mod_dir_var + "/Kbuild"
+ print "Writing file: " + f
+
+ p = open(f, 'w')
+ if not p:
+ tcm_mod_err("Unable to open file: " + f)
+
+ buf = "EXTRA_CFLAGS += -I$(srctree)/drivers/target/ -I$(srctree)/include/ -I$(srctree)/drivers/scsi/ -I$(srctree)/include/scsi/ -I$(srctree)/drivers/target/" + fabric_mod_name + "\n\n"
+ buf += fabric_mod_name + "-objs := " + fabric_mod_name + "_fabric.o \\\n"
+ buf += " " + fabric_mod_name + "_configfs.o\n"
+ buf += "obj-$(CONFIG_" + fabric_mod_name.upper() + ") += " + fabric_mod_name + ".o\n"
+
+ ret = p.write(buf)
+ if ret:
+ tcm_mod_err("Unable to write f: " + f)
+
+ p.close()
+ return
+
+def tcm_mod_build_kconfig(fabric_mod_dir_var, fabric_mod_name):
+
+ buf = ""
+ f = fabric_mod_dir_var + "/Kconfig"
+ print "Writing file: " + f
+
+ p = open(f, 'w')
+ if not p:
+ tcm_mod_err("Unable to open file: " + f)
+
+ buf = "config " + fabric_mod_name.upper() + "\n"
+ buf += " tristate \"" + fabric_mod_name.upper() + " fabric module\"\n"
+ buf += " depends on TARGET_CORE && CONFIGFS_FS\n"
+ buf += " default n\n"
+ buf += " ---help---\n"
+ buf += " Say Y here to enable the " + fabric_mod_name.upper() + " fabric module\n"
+
+ ret = p.write(buf)
+ if ret:
+ tcm_mod_err("Unable to write f: " + f)
+
+ p.close()
+ return
+
+def tcm_mod_add_kbuild(tcm_dir, fabric_mod_name):
+ buf = "obj-$(CONFIG_" + fabric_mod_name.upper() + ") += " + fabric_mod_name.lower() + "/\n"
+ kbuild = tcm_dir + "/drivers/target/Kbuild"
+
+ f = open(kbuild, 'a')
+ f.write(buf)
+ f.close()
+ return
+
+def tcm_mod_add_kconfig(tcm_dir, fabric_mod_name):
+ buf = "source \"drivers/target/" + fabric_mod_name.lower() + "/Kconfig\"\n"
+ kconfig = tcm_dir + "/drivers/target/Kconfig"
+
+ f = open(kconfig, 'a')
+ f.write(buf)
+ f.close()
+ return
+
+def main(modname, proto_ident):
+# proto_ident = "FC"
+# proto_ident = "SAS"
+# proto_ident = "iSCSI"
+
+ tcm_dir = os.getcwd();
+ tcm_dir += "/../../"
+ print "tcm_dir: " + tcm_dir
+ fabric_mod_name = modname
+ fabric_mod_dir = tcm_dir + "drivers/target/" + fabric_mod_name
+ print "Set fabric_mod_name: " + fabric_mod_name
+ print "Set fabric_mod_dir: " + fabric_mod_dir
+ print "Using proto_ident: " + proto_ident
+
+ if proto_ident != "FC" and proto_ident != "SAS" and proto_ident != "iSCSI":
+ print "Unsupported proto_ident: " + proto_ident
+ sys.exit(1)
+
+ ret = tcm_mod_create_module_subdir(fabric_mod_dir)
+ if ret:
+ print "tcm_mod_create_module_subdir() failed because module already exists!"
+ sys.exit(1)
+
+ tcm_mod_build_base_includes(proto_ident, fabric_mod_dir, fabric_mod_name)
+ tcm_mod_scan_fabric_ops(tcm_dir)
+ tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir, fabric_mod_name)
+ tcm_mod_build_configfs(proto_ident, fabric_mod_dir, fabric_mod_name)
+ tcm_mod_build_kbuild(fabric_mod_dir, fabric_mod_name)
+ tcm_mod_build_kconfig(fabric_mod_dir, fabric_mod_name)
+
+ input = raw_input("Would you like to add " + fabric_mod_name + "to drivers/target/Kbuild..? [yes,no]: ")
+ if input == "yes" or input == "y":
+ tcm_mod_add_kbuild(tcm_dir, fabric_mod_name)
+
+ input = raw_input("Would you like to add " + fabric_mod_name + "to drivers/target/Kconfig..? [yes,no]: ")
+ if input == "yes" or input == "y":
+ tcm_mod_add_kconfig(tcm_dir, fabric_mod_name)
+
+ return
+
+parser = optparse.OptionParser()
+parser.add_option('-m', '--modulename', help='Module name', dest='modname',
+ action='store', nargs=1, type='string')
+parser.add_option('-p', '--protoident', help='Protocol Ident', dest='protoident',
+ action='store', nargs=1, type='string')
+
+(opts, args) = parser.parse_args()
+
+mandatories = ['modname', 'protoident']
+for m in mandatories:
+ if not opts.__dict__[m]:
+ print "mandatory option is missing\n"
+ parser.print_help()
+ exit(-1)
+
+if __name__ == "__main__":
+
+ main(str(opts.modname), opts.protoident)
diff --git a/trunk/Documentation/target/tcm_mod_builder.txt b/trunk/Documentation/target/tcm_mod_builder.txt
new file mode 100644
index 000000000000..84533d8e747f
--- /dev/null
+++ b/trunk/Documentation/target/tcm_mod_builder.txt
@@ -0,0 +1,145 @@
+>>>>>>>>>> The TCM v4 fabric module script generator <<<<<<<<<<
+
+Greetings all,
+
+This document is intended to be a mini-HOWTO for using the tcm_mod_builder.py
+script to generate a brand new functional TCM v4 fabric .ko module of your very own,
+that once built can be immediately be loaded to start access the new TCM/ConfigFS
+fabric skeleton, by simply using:
+
+ modprobe $TCM_NEW_MOD
+ mkdir -p /sys/kernel/config/target/$TCM_NEW_MOD
+
+This script will create a new drivers/target/$TCM_NEW_MOD/, and will do the following
+
+ *) Generate new API callers for drivers/target/target_core_fabric_configs.c logic
+ ->make_nodeacl(), ->drop_nodeacl(), ->make_tpg(), ->drop_tpg()
+ ->make_wwn(), ->drop_wwn(). These are created into $TCM_NEW_MOD/$TCM_NEW_MOD_configfs.c
+ *) Generate basic infrastructure for loading/unloading LKMs and TCM/ConfigFS fabric module
+ using a skeleton struct target_core_fabric_ops API template.
+ *) Based on user defined T10 Proto_Ident for the new fabric module being built,
+ the TransportID / Initiator and Target WWPN related handlers for
+ SPC-3 persistent reservation are automatically generated in $TCM_NEW_MOD/$TCM_NEW_MOD_fabric.c
+ using drivers/target/target_core_fabric_lib.c logic.
+ *) NOP API calls for all other Data I/O path and fabric dependent attribute logic
+ in $TCM_NEW_MOD/$TCM_NEW_MOD_fabric.c
+
+tcm_mod_builder.py depends upon the mandatory '-p $PROTO_IDENT' and '-m
+$FABRIC_MOD_name' parameters, and actually running the script looks like:
+
+target:/mnt/sdb/lio-core-2.6.git/Documentation/target# python tcm_mod_builder.py -p iSCSI -m tcm_nab5000
+tcm_dir: /mnt/sdb/lio-core-2.6.git/Documentation/target/../../
+Set fabric_mod_name: tcm_nab5000
+Set fabric_mod_dir:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../drivers/target/tcm_nab5000
+Using proto_ident: iSCSI
+Creating fabric_mod_dir:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../drivers/target/tcm_nab5000
+Writing file:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../drivers/target/tcm_nab5000/tcm_nab5000_base.h
+Using tcm_mod_scan_fabric_ops:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../include/target/target_core_fabric_ops.h
+Writing file:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../drivers/target/tcm_nab5000/tcm_nab5000_fabric.c
+Writing file:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../drivers/target/tcm_nab5000/tcm_nab5000_fabric.h
+Writing file:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../drivers/target/tcm_nab5000/tcm_nab5000_configfs.c
+Writing file:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../drivers/target/tcm_nab5000/Kbuild
+Writing file:
+/mnt/sdb/lio-core-2.6.git/Documentation/target/../../drivers/target/tcm_nab5000/Kconfig
+Would you like to add tcm_nab5000to drivers/target/Kbuild..? [yes,no]: yes
+Would you like to add tcm_nab5000to drivers/target/Kconfig..? [yes,no]: yes
+
+At the end of tcm_mod_builder.py. the script will ask to add the following
+line to drivers/target/Kbuild:
+
+ obj-$(CONFIG_TCM_NAB5000) += tcm_nab5000/
+
+and the same for drivers/target/Kconfig:
+
+ source "drivers/target/tcm_nab5000/Kconfig"
+
+*) Run 'make menuconfig' and select the new CONFIG_TCM_NAB5000 item:
+
+ TCM_NAB5000 fabric module
+
+*) Build using 'make modules', once completed you will have:
+
+target:/mnt/sdb/lio-core-2.6.git# ls -la drivers/target/tcm_nab5000/
+total 1348
+drwxr-xr-x 2 root root 4096 2010-10-05 03:23 .
+drwxr-xr-x 9 root root 4096 2010-10-05 03:22 ..
+-rw-r--r-- 1 root root 282 2010-10-05 03:22 Kbuild
+-rw-r--r-- 1 root root 171 2010-10-05 03:22 Kconfig
+-rw-r--r-- 1 root root 49 2010-10-05 03:23 modules.order
+-rw-r--r-- 1 root root 738 2010-10-05 03:22 tcm_nab5000_base.h
+-rw-r--r-- 1 root root 9096 2010-10-05 03:22 tcm_nab5000_configfs.c
+-rw-r--r-- 1 root root 191200 2010-10-05 03:23 tcm_nab5000_configfs.o
+-rw-r--r-- 1 root root 40504 2010-10-05 03:23 .tcm_nab5000_configfs.o.cmd
+-rw-r--r-- 1 root root 5414 2010-10-05 03:22 tcm_nab5000_fabric.c
+-rw-r--r-- 1 root root 2016 2010-10-05 03:22 tcm_nab5000_fabric.h
+-rw-r--r-- 1 root root 190932 2010-10-05 03:23 tcm_nab5000_fabric.o
+-rw-r--r-- 1 root root 40713 2010-10-05 03:23 .tcm_nab5000_fabric.o.cmd
+-rw-r--r-- 1 root root 401861 2010-10-05 03:23 tcm_nab5000.ko
+-rw-r--r-- 1 root root 265 2010-10-05 03:23 .tcm_nab5000.ko.cmd
+-rw-r--r-- 1 root root 459 2010-10-05 03:23 tcm_nab5000.mod.c
+-rw-r--r-- 1 root root 23896 2010-10-05 03:23 tcm_nab5000.mod.o
+-rw-r--r-- 1 root root 22655 2010-10-05 03:23 .tcm_nab5000.mod.o.cmd
+-rw-r--r-- 1 root root 379022 2010-10-05 03:23 tcm_nab5000.o
+-rw-r--r-- 1 root root 211 2010-10-05 03:23 .tcm_nab5000.o.cmd
+
+*) Load the new module, create a lun_0 configfs group, and add new TCM Core
+ IBLOCK backstore symlink to port:
+
+target:/mnt/sdb/lio-core-2.6.git# insmod drivers/target/tcm_nab5000.ko
+target:/mnt/sdb/lio-core-2.6.git# mkdir -p /sys/kernel/config/target/nab5000/iqn.foo/tpgt_1/lun/lun_0
+target:/mnt/sdb/lio-core-2.6.git# cd /sys/kernel/config/target/nab5000/iqn.foo/tpgt_1/lun/lun_0/
+target:/sys/kernel/config/target/nab5000/iqn.foo/tpgt_1/lun/lun_0# ln -s /sys/kernel/config/target/core/iblock_0/lvm_test0 nab5000_port
+
+target:/sys/kernel/config/target/nab5000/iqn.foo/tpgt_1/lun/lun_0# cd -
+target:/mnt/sdb/lio-core-2.6.git# tree /sys/kernel/config/target/nab5000/
+/sys/kernel/config/target/nab5000/
+|-- discovery_auth
+|-- iqn.foo
+| `-- tpgt_1
+| |-- acls
+| |-- attrib
+| |-- lun
+| | `-- lun_0
+| | |-- alua_tg_pt_gp
+| | |-- alua_tg_pt_offline
+| | |-- alua_tg_pt_status
+| | |-- alua_tg_pt_write_md
+| | `-- nab5000_port -> ../../../../../../target/core/iblock_0/lvm_test0
+| |-- np
+| `-- param
+`-- version
+
+target:/mnt/sdb/lio-core-2.6.git# lsmod
+Module Size Used by
+tcm_nab5000 3935 4
+iscsi_target_mod 193211 0
+target_core_stgt 8090 0
+target_core_pscsi 11122 1
+target_core_file 9172 2
+target_core_iblock 9280 1
+target_core_mod 228575 31
+tcm_nab5000,iscsi_target_mod,target_core_stgt,target_core_pscsi,target_core_file,target_core_iblock
+libfc 73681 0
+scsi_debug 56265 0
+scsi_tgt 8666 1 target_core_stgt
+configfs 20644 2 target_core_mod
+
+----------------------------------------------------------------------
+
+Future TODO items:
+
+ *) Add more T10 proto_idents
+ *) Make tcm_mod_dump_fabric_ops() smarter and generate function pointer
+ defs directly from include/target/target_core_fabric_ops.h:struct target_core_fabric_ops
+ structure members.
+
+October 5th, 2010
+Nicholas A. Bellinger
diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS
index 89e4d4b145bb..1af022e63668 100644
--- a/trunk/MAINTAINERS
+++ b/trunk/MAINTAINERS
@@ -3684,7 +3684,7 @@ F: kernel/debug/
KMEMCHECK
M: Vegard Nossum
-M: Pekka Enberg
+M: Pekka Enberg
S: Maintained
F: Documentation/kmemcheck.txt
F: arch/x86/include/asm/kmemcheck.h
@@ -5646,7 +5646,7 @@ F: drivers/net/sky2.*
SLAB ALLOCATOR
M: Christoph Lameter
-M: Pekka Enberg
+M: Pekka Enberg
M: Matt Mackall
L: linux-mm@kvack.org
S: Maintained
diff --git a/trunk/arch/alpha/Kconfig b/trunk/arch/alpha/Kconfig
index 943fe6930f77..fc95ee1bcf6f 100644
--- a/trunk/arch/alpha/Kconfig
+++ b/trunk/arch/alpha/Kconfig
@@ -68,6 +68,9 @@ config GENERIC_IOMAP
bool
default n
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ def_bool y
+
config GENERIC_HARDIRQS
bool
default y
diff --git a/trunk/arch/alpha/include/asm/io.h b/trunk/arch/alpha/include/asm/io.h
index eda9b909aa05..56ff96501350 100644
--- a/trunk/arch/alpha/include/asm/io.h
+++ b/trunk/arch/alpha/include/asm/io.h
@@ -37,8 +37,9 @@
*/
extern inline void __set_hae(unsigned long new_hae)
{
- unsigned long flags;
- local_irq_save(flags);
+ unsigned long flags = swpipl(IPL_MAX);
+
+ barrier();
alpha_mv.hae_cache = new_hae;
*alpha_mv.hae_register = new_hae;
@@ -46,7 +47,8 @@ extern inline void __set_hae(unsigned long new_hae)
/* Re-read to make sure it was written. */
new_hae = *alpha_mv.hae_register;
- local_irq_restore(flags);
+ setipl(flags);
+ barrier();
}
extern inline void set_hae(unsigned long new_hae)
diff --git a/trunk/arch/alpha/kernel/Makefile b/trunk/arch/alpha/kernel/Makefile
index 1ee9b5b629b8..9bb7b858ed23 100644
--- a/trunk/arch/alpha/kernel/Makefile
+++ b/trunk/arch/alpha/kernel/Makefile
@@ -3,8 +3,8 @@
#
extra-y := head.o vmlinux.lds
-EXTRA_AFLAGS := $(KBUILD_CFLAGS)
-EXTRA_CFLAGS := -Werror -Wno-sign-compare
+asflags-y := $(KBUILD_CFLAGS)
+ccflags-y := -Werror -Wno-sign-compare
obj-y := entry.o traps.o process.o init_task.o osf_sys.o irq.o \
irq_alpha.o signal.o setup.o ptrace.o time.o \
diff --git a/trunk/arch/alpha/kernel/irq.c b/trunk/arch/alpha/kernel/irq.c
index fe912984d9b1..9ab234f48dd8 100644
--- a/trunk/arch/alpha/kernel/irq.c
+++ b/trunk/arch/alpha/kernel/irq.c
@@ -44,10 +44,11 @@ static char irq_user_affinity[NR_IRQS];
int irq_select_affinity(unsigned int irq)
{
+ struct irq_desc *desc = irq_to_desc[irq];
static int last_cpu;
int cpu = last_cpu + 1;
- if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq])
+ if (!desc || !get_irq_desc_chip(desc)->set_affinity || irq_user_affinity[irq])
return 1;
while (!cpu_possible(cpu) ||
@@ -55,8 +56,8 @@ int irq_select_affinity(unsigned int irq)
cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
last_cpu = cpu;
- cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
- irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));
+ cpumask_copy(desc->affinity, cpumask_of(cpu));
+ get_irq_desc_chip(desc)->set_affinity(irq, cpumask_of(cpu));
return 0;
}
#endif /* CONFIG_SMP */
@@ -67,6 +68,7 @@ show_interrupts(struct seq_file *p, void *v)
int j;
int irq = *(loff_t *) v;
struct irqaction * action;
+ struct irq_desc *desc;
unsigned long flags;
#ifdef CONFIG_SMP
@@ -79,8 +81,13 @@ show_interrupts(struct seq_file *p, void *v)
#endif
if (irq < ACTUAL_NR_IRQS) {
- raw_spin_lock_irqsave(&irq_desc[irq].lock, flags);
- action = irq_desc[irq].action;
+ desc = irq_to_desc(irq);
+
+ if (!desc)
+ return 0;
+
+ raw_spin_lock_irqsave(&desc->lock, flags);
+ action = desc->action;
if (!action)
goto unlock;
seq_printf(p, "%3d: ", irq);
@@ -90,7 +97,7 @@ show_interrupts(struct seq_file *p, void *v)
for_each_online_cpu(j)
seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j));
#endif
- seq_printf(p, " %14s", irq_desc[irq].chip->name);
+ seq_printf(p, " %14s", get_irq_desc_chip(desc)->name);
seq_printf(p, " %c%s",
(action->flags & IRQF_DISABLED)?'+':' ',
action->name);
@@ -103,7 +110,7 @@ show_interrupts(struct seq_file *p, void *v)
seq_putc(p, '\n');
unlock:
- raw_spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
+ raw_spin_unlock_irqrestore(&desc->lock, flags);
} else if (irq == ACTUAL_NR_IRQS) {
#ifdef CONFIG_SMP
seq_puts(p, "IPI: ");
@@ -142,8 +149,10 @@ handle_irq(int irq)
* handled by some other CPU. (or is disabled)
*/
static unsigned int illegal_count=0;
+ struct irq_desc *desc = irq_to_desc(irq);
- if ((unsigned) irq > ACTUAL_NR_IRQS && illegal_count < MAX_ILLEGAL_IRQS ) {
+ if (!desc || ((unsigned) irq > ACTUAL_NR_IRQS &&
+ illegal_count < MAX_ILLEGAL_IRQS)) {
irq_err_count++;
illegal_count++;
printk(KERN_CRIT "device_interrupt: invalid interrupt %d\n",
@@ -151,14 +160,14 @@ handle_irq(int irq)
return;
}
- irq_enter();
/*
- * __do_IRQ() must be called with IPL_MAX. Note that we do not
+ * From here we must proceed with IPL_MAX. Note that we do not
* explicitly enable interrupts afterwards - some MILO PALcode
* (namely LX164 one) seems to have severe problems with RTI
* at IPL 0.
*/
local_irq_disable();
- __do_IRQ(irq);
+ irq_enter();
+ generic_handle_irq_desc(irq, desc);
irq_exit();
}
diff --git a/trunk/arch/alpha/kernel/irq_alpha.c b/trunk/arch/alpha/kernel/irq_alpha.c
index 4c8bb374eb0a..2d0679b60939 100644
--- a/trunk/arch/alpha/kernel/irq_alpha.c
+++ b/trunk/arch/alpha/kernel/irq_alpha.c
@@ -219,31 +219,23 @@ process_mcheck_info(unsigned long vector, unsigned long la_ptr,
* processed by PALcode, and comes in via entInt vector 1.
*/
-static void rtc_enable_disable(unsigned int irq) { }
-static unsigned int rtc_startup(unsigned int irq) { return 0; }
-
struct irqaction timer_irqaction = {
.handler = timer_interrupt,
.flags = IRQF_DISABLED,
.name = "timer",
};
-static struct irq_chip rtc_irq_type = {
- .name = "RTC",
- .startup = rtc_startup,
- .shutdown = rtc_enable_disable,
- .enable = rtc_enable_disable,
- .disable = rtc_enable_disable,
- .ack = rtc_enable_disable,
- .end = rtc_enable_disable,
-};
-
void __init
init_rtc_irq(void)
{
- irq_desc[RTC_IRQ].status = IRQ_DISABLED;
- irq_desc[RTC_IRQ].chip = &rtc_irq_type;
- setup_irq(RTC_IRQ, &timer_irqaction);
+ struct irq_desc *desc = irq_to_desc(RTC_IRQ);
+
+ if (desc) {
+ desc->status |= IRQ_DISABLED;
+ set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip,
+ handle_simple_irq, "RTC");
+ setup_irq(RTC_IRQ, &timer_irqaction);
+ }
}
/* Dummy irqactions. */
diff --git a/trunk/arch/alpha/kernel/irq_i8259.c b/trunk/arch/alpha/kernel/irq_i8259.c
index 83a9ac280890..956ea0ed1694 100644
--- a/trunk/arch/alpha/kernel/irq_i8259.c
+++ b/trunk/arch/alpha/kernel/irq_i8259.c
@@ -69,28 +69,11 @@ i8259a_mask_and_ack_irq(unsigned int irq)
spin_unlock(&i8259_irq_lock);
}
-unsigned int
-i8259a_startup_irq(unsigned int irq)
-{
- i8259a_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-void
-i8259a_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- i8259a_enable_irq(irq);
-}
-
struct irq_chip i8259a_irq_type = {
.name = "XT-PIC",
- .startup = i8259a_startup_irq,
- .shutdown = i8259a_disable_irq,
- .enable = i8259a_enable_irq,
- .disable = i8259a_disable_irq,
- .ack = i8259a_mask_and_ack_irq,
- .end = i8259a_end_irq,
+ .unmask = i8259a_enable_irq,
+ .mask = i8259a_disable_irq,
+ .mask_ack = i8259a_mask_and_ack_irq,
};
void __init
@@ -107,8 +90,7 @@ init_i8259a_irqs(void)
outb(0xff, 0xA1); /* mask all of 8259A-2 */
for (i = 0; i < 16; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].chip = &i8259a_irq_type;
+ set_irq_chip_and_handler(i, &i8259a_irq_type, handle_level_irq);
}
setup_irq(2, &cascade);
diff --git a/trunk/arch/alpha/kernel/irq_pyxis.c b/trunk/arch/alpha/kernel/irq_pyxis.c
index 989ce46a0cf3..2863458c853e 100644
--- a/trunk/arch/alpha/kernel/irq_pyxis.c
+++ b/trunk/arch/alpha/kernel/irq_pyxis.c
@@ -40,20 +40,6 @@ pyxis_disable_irq(unsigned int irq)
pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
}
-static unsigned int
-pyxis_startup_irq(unsigned int irq)
-{
- pyxis_enable_irq(irq);
- return 0;
-}
-
-static void
-pyxis_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- pyxis_enable_irq(irq);
-}
-
static void
pyxis_mask_and_ack_irq(unsigned int irq)
{
@@ -72,12 +58,9 @@ pyxis_mask_and_ack_irq(unsigned int irq)
static struct irq_chip pyxis_irq_type = {
.name = "PYXIS",
- .startup = pyxis_startup_irq,
- .shutdown = pyxis_disable_irq,
- .enable = pyxis_enable_irq,
- .disable = pyxis_disable_irq,
- .ack = pyxis_mask_and_ack_irq,
- .end = pyxis_end_irq,
+ .mask_ack = pyxis_mask_and_ack_irq,
+ .mask = pyxis_disable_irq,
+ .unmask = pyxis_enable_irq,
};
void
@@ -119,8 +102,8 @@ init_pyxis_irqs(unsigned long ignore_mask)
for (i = 16; i < 48; ++i) {
if ((ignore_mask >> i) & 1)
continue;
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &pyxis_irq_type;
+ set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq);
+ irq_to_desc(i)->status |= IRQ_LEVEL;
}
setup_irq(16+7, &isa_cascade_irqaction);
diff --git a/trunk/arch/alpha/kernel/irq_srm.c b/trunk/arch/alpha/kernel/irq_srm.c
index d63e93e1e8bf..0e57e828b413 100644
--- a/trunk/arch/alpha/kernel/irq_srm.c
+++ b/trunk/arch/alpha/kernel/irq_srm.c
@@ -33,29 +33,12 @@ srm_disable_irq(unsigned int irq)
spin_unlock(&srm_irq_lock);
}
-static unsigned int
-srm_startup_irq(unsigned int irq)
-{
- srm_enable_irq(irq);
- return 0;
-}
-
-static void
-srm_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- srm_enable_irq(irq);
-}
-
/* Handle interrupts from the SRM, assuming no additional weirdness. */
static struct irq_chip srm_irq_type = {
.name = "SRM",
- .startup = srm_startup_irq,
- .shutdown = srm_disable_irq,
- .enable = srm_enable_irq,
- .disable = srm_disable_irq,
- .ack = srm_disable_irq,
- .end = srm_end_irq,
+ .unmask = srm_enable_irq,
+ .mask = srm_disable_irq,
+ .mask_ack = srm_disable_irq,
};
void __init
@@ -68,8 +51,8 @@ init_srm_irqs(long max, unsigned long ignore_mask)
for (i = 16; i < max; ++i) {
if (i < 64 && ((ignore_mask >> i) & 1))
continue;
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &srm_irq_type;
+ set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq);
+ irq_to_desc(i)->status |= IRQ_LEVEL;
}
}
diff --git a/trunk/arch/alpha/kernel/osf_sys.c b/trunk/arch/alpha/kernel/osf_sys.c
index 547e8b84b2f7..fe698b5045e9 100644
--- a/trunk/arch/alpha/kernel/osf_sys.c
+++ b/trunk/arch/alpha/kernel/osf_sys.c
@@ -951,9 +951,6 @@ SYSCALL_DEFINE2(osf_utimes, const char __user *, filename,
return do_utimes(AT_FDCWD, filename, tvs ? tv : NULL, 0);
}
-#define MAX_SELECT_SECONDS \
- ((unsigned long) (MAX_SCHEDULE_TIMEOUT / HZ)-1)
-
SYSCALL_DEFINE5(osf_select, int, n, fd_set __user *, inp, fd_set __user *, outp,
fd_set __user *, exp, struct timeval32 __user *, tvp)
{
diff --git a/trunk/arch/alpha/kernel/sys_alcor.c b/trunk/arch/alpha/kernel/sys_alcor.c
index 20a30b8b9655..7bef61768236 100644
--- a/trunk/arch/alpha/kernel/sys_alcor.c
+++ b/trunk/arch/alpha/kernel/sys_alcor.c
@@ -65,13 +65,6 @@ alcor_mask_and_ack_irq(unsigned int irq)
*(vuip)GRU_INT_CLEAR = 0; mb();
}
-static unsigned int
-alcor_startup_irq(unsigned int irq)
-{
- alcor_enable_irq(irq);
- return 0;
-}
-
static void
alcor_isa_mask_and_ack_irq(unsigned int irq)
{
@@ -82,21 +75,11 @@ alcor_isa_mask_and_ack_irq(unsigned int irq)
*(vuip)GRU_INT_CLEAR = 0; mb();
}
-static void
-alcor_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- alcor_enable_irq(irq);
-}
-
static struct irq_chip alcor_irq_type = {
.name = "ALCOR",
- .startup = alcor_startup_irq,
- .shutdown = alcor_disable_irq,
- .enable = alcor_enable_irq,
- .disable = alcor_disable_irq,
- .ack = alcor_mask_and_ack_irq,
- .end = alcor_end_irq,
+ .unmask = alcor_enable_irq,
+ .mask = alcor_disable_irq,
+ .mask_ack = alcor_mask_and_ack_irq,
};
static void
@@ -142,8 +125,8 @@ alcor_init_irq(void)
on while IRQ probing. */
if (i >= 16+20 && i <= 16+30)
continue;
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &alcor_irq_type;
+ set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq);
+ irq_to_desc(i)->status |= IRQ_LEVEL;
}
i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq;
diff --git a/trunk/arch/alpha/kernel/sys_cabriolet.c b/trunk/arch/alpha/kernel/sys_cabriolet.c
index 14c8898d19ec..b0c916493aea 100644
--- a/trunk/arch/alpha/kernel/sys_cabriolet.c
+++ b/trunk/arch/alpha/kernel/sys_cabriolet.c
@@ -57,28 +57,11 @@ cabriolet_disable_irq(unsigned int irq)
cabriolet_update_irq_hw(irq, cached_irq_mask |= 1UL << irq);
}
-static unsigned int
-cabriolet_startup_irq(unsigned int irq)
-{
- cabriolet_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-cabriolet_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- cabriolet_enable_irq(irq);
-}
-
static struct irq_chip cabriolet_irq_type = {
.name = "CABRIOLET",
- .startup = cabriolet_startup_irq,
- .shutdown = cabriolet_disable_irq,
- .enable = cabriolet_enable_irq,
- .disable = cabriolet_disable_irq,
- .ack = cabriolet_disable_irq,
- .end = cabriolet_end_irq,
+ .unmask = cabriolet_enable_irq,
+ .mask = cabriolet_disable_irq,
+ .mask_ack = cabriolet_disable_irq,
};
static void
@@ -122,8 +105,9 @@ common_init_irq(void (*srm_dev_int)(unsigned long v))
outb(0xff, 0x806);
for (i = 16; i < 35; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &cabriolet_irq_type;
+ set_irq_chip_and_handler(i, &cabriolet_irq_type,
+ handle_level_irq);
+ irq_to_desc(i)->status |= IRQ_LEVEL;
}
}
diff --git a/trunk/arch/alpha/kernel/sys_dp264.c b/trunk/arch/alpha/kernel/sys_dp264.c
index 4026502ab707..edad5f759ccd 100644
--- a/trunk/arch/alpha/kernel/sys_dp264.c
+++ b/trunk/arch/alpha/kernel/sys_dp264.c
@@ -115,20 +115,6 @@ dp264_disable_irq(unsigned int irq)
spin_unlock(&dp264_irq_lock);
}
-static unsigned int
-dp264_startup_irq(unsigned int irq)
-{
- dp264_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-dp264_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- dp264_enable_irq(irq);
-}
-
static void
clipper_enable_irq(unsigned int irq)
{
@@ -147,20 +133,6 @@ clipper_disable_irq(unsigned int irq)
spin_unlock(&dp264_irq_lock);
}
-static unsigned int
-clipper_startup_irq(unsigned int irq)
-{
- clipper_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-clipper_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- clipper_enable_irq(irq);
-}
-
static void
cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
{
@@ -200,23 +172,17 @@ clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
static struct irq_chip dp264_irq_type = {
.name = "DP264",
- .startup = dp264_startup_irq,
- .shutdown = dp264_disable_irq,
- .enable = dp264_enable_irq,
- .disable = dp264_disable_irq,
- .ack = dp264_disable_irq,
- .end = dp264_end_irq,
+ .unmask = dp264_enable_irq,
+ .mask = dp264_disable_irq,
+ .mask_ack = dp264_disable_irq,
.set_affinity = dp264_set_affinity,
};
static struct irq_chip clipper_irq_type = {
.name = "CLIPPER",
- .startup = clipper_startup_irq,
- .shutdown = clipper_disable_irq,
- .enable = clipper_enable_irq,
- .disable = clipper_disable_irq,
- .ack = clipper_disable_irq,
- .end = clipper_end_irq,
+ .unmask = clipper_enable_irq,
+ .mask = clipper_disable_irq,
+ .mask_ack = clipper_disable_irq,
.set_affinity = clipper_set_affinity,
};
@@ -302,8 +268,8 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax)
{
long i;
for (i = imin; i <= imax; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = ops;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, ops, handle_level_irq);
}
}
diff --git a/trunk/arch/alpha/kernel/sys_eb64p.c b/trunk/arch/alpha/kernel/sys_eb64p.c
index df2090ce5e7f..ae5f29d127b0 100644
--- a/trunk/arch/alpha/kernel/sys_eb64p.c
+++ b/trunk/arch/alpha/kernel/sys_eb64p.c
@@ -55,28 +55,11 @@ eb64p_disable_irq(unsigned int irq)
eb64p_update_irq_hw(irq, cached_irq_mask |= 1 << irq);
}
-static unsigned int
-eb64p_startup_irq(unsigned int irq)
-{
- eb64p_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-eb64p_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- eb64p_enable_irq(irq);
-}
-
static struct irq_chip eb64p_irq_type = {
.name = "EB64P",
- .startup = eb64p_startup_irq,
- .shutdown = eb64p_disable_irq,
- .enable = eb64p_enable_irq,
- .disable = eb64p_disable_irq,
- .ack = eb64p_disable_irq,
- .end = eb64p_end_irq,
+ .unmask = eb64p_enable_irq,
+ .mask = eb64p_disable_irq,
+ .mask_ack = eb64p_disable_irq,
};
static void
@@ -135,8 +118,8 @@ eb64p_init_irq(void)
init_i8259a_irqs();
for (i = 16; i < 32; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &eb64p_irq_type;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq);
}
common_init_isa_dma();
diff --git a/trunk/arch/alpha/kernel/sys_eiger.c b/trunk/arch/alpha/kernel/sys_eiger.c
index 3ca1dbcf4044..1121bc5c6c6c 100644
--- a/trunk/arch/alpha/kernel/sys_eiger.c
+++ b/trunk/arch/alpha/kernel/sys_eiger.c
@@ -66,28 +66,11 @@ eiger_disable_irq(unsigned int irq)
eiger_update_irq_hw(irq, mask);
}
-static unsigned int
-eiger_startup_irq(unsigned int irq)
-{
- eiger_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-eiger_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- eiger_enable_irq(irq);
-}
-
static struct irq_chip eiger_irq_type = {
.name = "EIGER",
- .startup = eiger_startup_irq,
- .shutdown = eiger_disable_irq,
- .enable = eiger_enable_irq,
- .disable = eiger_disable_irq,
- .ack = eiger_disable_irq,
- .end = eiger_end_irq,
+ .unmask = eiger_enable_irq,
+ .mask = eiger_disable_irq,
+ .mask_ack = eiger_disable_irq,
};
static void
@@ -153,8 +136,8 @@ eiger_init_irq(void)
init_i8259a_irqs();
for (i = 16; i < 128; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &eiger_irq_type;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq);
}
}
diff --git a/trunk/arch/alpha/kernel/sys_jensen.c b/trunk/arch/alpha/kernel/sys_jensen.c
index 7a7ae36fff91..34f55e03d331 100644
--- a/trunk/arch/alpha/kernel/sys_jensen.c
+++ b/trunk/arch/alpha/kernel/sys_jensen.c
@@ -62,30 +62,6 @@
* world.
*/
-static unsigned int
-jensen_local_startup(unsigned int irq)
-{
- /* the parport is really hw IRQ 1, silly Jensen. */
- if (irq == 7)
- i8259a_startup_irq(1);
- else
- /*
- * For all true local interrupts, set the flag that prevents
- * the IPL from being dropped during handler processing.
- */
- if (irq_desc[irq].action)
- irq_desc[irq].action->flags |= IRQF_DISABLED;
- return 0;
-}
-
-static void
-jensen_local_shutdown(unsigned int irq)
-{
- /* the parport is really hw IRQ 1, silly Jensen. */
- if (irq == 7)
- i8259a_disable_irq(1);
-}
-
static void
jensen_local_enable(unsigned int irq)
{
@@ -103,29 +79,18 @@ jensen_local_disable(unsigned int irq)
}
static void
-jensen_local_ack(unsigned int irq)
+jensen_local_mask_ack(unsigned int irq)
{
/* the parport is really hw IRQ 1, silly Jensen. */
if (irq == 7)
i8259a_mask_and_ack_irq(1);
}
-static void
-jensen_local_end(unsigned int irq)
-{
- /* the parport is really hw IRQ 1, silly Jensen. */
- if (irq == 7)
- i8259a_end_irq(1);
-}
-
static struct irq_chip jensen_local_irq_type = {
.name = "LOCAL",
- .startup = jensen_local_startup,
- .shutdown = jensen_local_shutdown,
- .enable = jensen_local_enable,
- .disable = jensen_local_disable,
- .ack = jensen_local_ack,
- .end = jensen_local_end,
+ .unmask = jensen_local_enable,
+ .mask = jensen_local_disable,
+ .mask_ack = jensen_local_mask_ack,
};
static void
@@ -158,7 +123,7 @@ jensen_device_interrupt(unsigned long vector)
}
/* If there is no handler yet... */
- if (irq_desc[irq].action == NULL) {
+ if (!irq_has_action(irq)) {
/* If it is a local interrupt that cannot be masked... */
if (vector >= 0x900)
{
@@ -206,11 +171,11 @@ jensen_init_irq(void)
{
init_i8259a_irqs();
- irq_desc[1].chip = &jensen_local_irq_type;
- irq_desc[4].chip = &jensen_local_irq_type;
- irq_desc[3].chip = &jensen_local_irq_type;
- irq_desc[7].chip = &jensen_local_irq_type;
- irq_desc[9].chip = &jensen_local_irq_type;
+ set_irq_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq);
+ set_irq_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq);
+ set_irq_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq);
+ set_irq_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq);
+ set_irq_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq);
common_init_isa_dma();
}
diff --git a/trunk/arch/alpha/kernel/sys_marvel.c b/trunk/arch/alpha/kernel/sys_marvel.c
index 0bb3b5c4f693..2bfc9f1b1ddc 100644
--- a/trunk/arch/alpha/kernel/sys_marvel.c
+++ b/trunk/arch/alpha/kernel/sys_marvel.c
@@ -143,20 +143,6 @@ io7_disable_irq(unsigned int irq)
spin_unlock(&io7->irq_lock);
}
-static unsigned int
-io7_startup_irq(unsigned int irq)
-{
- io7_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-io7_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- io7_enable_irq(irq);
-}
-
static void
marvel_irq_noop(unsigned int irq)
{
@@ -171,32 +157,22 @@ marvel_irq_noop_return(unsigned int irq)
static struct irq_chip marvel_legacy_irq_type = {
.name = "LEGACY",
- .startup = marvel_irq_noop_return,
- .shutdown = marvel_irq_noop,
- .enable = marvel_irq_noop,
- .disable = marvel_irq_noop,
- .ack = marvel_irq_noop,
- .end = marvel_irq_noop,
+ .mask = marvel_irq_noop,
+ .unmask = marvel_irq_noop,
};
static struct irq_chip io7_lsi_irq_type = {
.name = "LSI",
- .startup = io7_startup_irq,
- .shutdown = io7_disable_irq,
- .enable = io7_enable_irq,
- .disable = io7_disable_irq,
- .ack = io7_disable_irq,
- .end = io7_end_irq,
+ .unmask = io7_enable_irq,
+ .mask = io7_disable_irq,
+ .mask_ack = io7_disable_irq,
};
static struct irq_chip io7_msi_irq_type = {
.name = "MSI",
- .startup = io7_startup_irq,
- .shutdown = io7_disable_irq,
- .enable = io7_enable_irq,
- .disable = io7_disable_irq,
+ .unmask = io7_enable_irq,
+ .mask = io7_disable_irq,
.ack = marvel_irq_noop,
- .end = io7_end_irq,
};
static void
@@ -304,8 +280,8 @@ init_io7_irqs(struct io7 *io7,
/* Set up the lsi irqs. */
for (i = 0; i < 128; ++i) {
- irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[base + i].chip = lsi_ops;
+ irq_to_desc(base + i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq);
}
/* Disable the implemented irqs in hardware. */
@@ -318,8 +294,8 @@ init_io7_irqs(struct io7 *io7,
/* Set up the msi irqs. */
for (i = 128; i < (128 + 512); ++i) {
- irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[base + i].chip = msi_ops;
+ irq_to_desc(base + i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq);
}
for (i = 0; i < 16; ++i)
@@ -336,8 +312,8 @@ marvel_init_irq(void)
/* Reserve the legacy irqs. */
for (i = 0; i < 16; ++i) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].chip = &marvel_legacy_irq_type;
+ set_irq_chip_and_handler(i, &marvel_legacy_irq_type,
+ handle_level_irq);
}
/* Init the io7 irqs. */
diff --git a/trunk/arch/alpha/kernel/sys_mikasa.c b/trunk/arch/alpha/kernel/sys_mikasa.c
index ee8865169811..bcc1639e8efb 100644
--- a/trunk/arch/alpha/kernel/sys_mikasa.c
+++ b/trunk/arch/alpha/kernel/sys_mikasa.c
@@ -54,28 +54,11 @@ mikasa_disable_irq(unsigned int irq)
mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (irq - 16)));
}
-static unsigned int
-mikasa_startup_irq(unsigned int irq)
-{
- mikasa_enable_irq(irq);
- return 0;
-}
-
-static void
-mikasa_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- mikasa_enable_irq(irq);
-}
-
static struct irq_chip mikasa_irq_type = {
.name = "MIKASA",
- .startup = mikasa_startup_irq,
- .shutdown = mikasa_disable_irq,
- .enable = mikasa_enable_irq,
- .disable = mikasa_disable_irq,
- .ack = mikasa_disable_irq,
- .end = mikasa_end_irq,
+ .unmask = mikasa_enable_irq,
+ .mask = mikasa_disable_irq,
+ .mask_ack = mikasa_disable_irq,
};
static void
@@ -115,8 +98,8 @@ mikasa_init_irq(void)
mikasa_update_irq_hw(0);
for (i = 16; i < 32; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &mikasa_irq_type;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq);
}
init_i8259a_irqs();
diff --git a/trunk/arch/alpha/kernel/sys_noritake.c b/trunk/arch/alpha/kernel/sys_noritake.c
index 86503fe73a88..e88f4ae1260e 100644
--- a/trunk/arch/alpha/kernel/sys_noritake.c
+++ b/trunk/arch/alpha/kernel/sys_noritake.c
@@ -59,28 +59,11 @@ noritake_disable_irq(unsigned int irq)
noritake_update_irq_hw(irq, cached_irq_mask &= ~(1 << (irq - 16)));
}
-static unsigned int
-noritake_startup_irq(unsigned int irq)
-{
- noritake_enable_irq(irq);
- return 0;
-}
-
-static void
-noritake_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- noritake_enable_irq(irq);
-}
-
static struct irq_chip noritake_irq_type = {
.name = "NORITAKE",
- .startup = noritake_startup_irq,
- .shutdown = noritake_disable_irq,
- .enable = noritake_enable_irq,
- .disable = noritake_disable_irq,
- .ack = noritake_disable_irq,
- .end = noritake_end_irq,
+ .unmask = noritake_enable_irq,
+ .mask = noritake_disable_irq,
+ .mask_ack = noritake_disable_irq,
};
static void
@@ -144,8 +127,8 @@ noritake_init_irq(void)
outw(0, 0x54c);
for (i = 16; i < 48; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &noritake_irq_type;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq);
}
init_i8259a_irqs();
diff --git a/trunk/arch/alpha/kernel/sys_rawhide.c b/trunk/arch/alpha/kernel/sys_rawhide.c
index 26c322bf89ee..6a51364dd1cc 100644
--- a/trunk/arch/alpha/kernel/sys_rawhide.c
+++ b/trunk/arch/alpha/kernel/sys_rawhide.c
@@ -121,28 +121,11 @@ rawhide_mask_and_ack_irq(unsigned int irq)
spin_unlock(&rawhide_irq_lock);
}
-static unsigned int
-rawhide_startup_irq(unsigned int irq)
-{
- rawhide_enable_irq(irq);
- return 0;
-}
-
-static void
-rawhide_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- rawhide_enable_irq(irq);
-}
-
static struct irq_chip rawhide_irq_type = {
.name = "RAWHIDE",
- .startup = rawhide_startup_irq,
- .shutdown = rawhide_disable_irq,
- .enable = rawhide_enable_irq,
- .disable = rawhide_disable_irq,
- .ack = rawhide_mask_and_ack_irq,
- .end = rawhide_end_irq,
+ .unmask = rawhide_enable_irq,
+ .mask = rawhide_disable_irq,
+ .mask_ack = rawhide_mask_and_ack_irq,
};
static void
@@ -194,8 +177,8 @@ rawhide_init_irq(void)
}
for (i = 16; i < 128; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &rawhide_irq_type;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq);
}
init_i8259a_irqs();
diff --git a/trunk/arch/alpha/kernel/sys_rx164.c b/trunk/arch/alpha/kernel/sys_rx164.c
index be161129eab9..89e7e37ec84c 100644
--- a/trunk/arch/alpha/kernel/sys_rx164.c
+++ b/trunk/arch/alpha/kernel/sys_rx164.c
@@ -58,28 +58,11 @@ rx164_disable_irq(unsigned int irq)
rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
}
-static unsigned int
-rx164_startup_irq(unsigned int irq)
-{
- rx164_enable_irq(irq);
- return 0;
-}
-
-static void
-rx164_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- rx164_enable_irq(irq);
-}
-
static struct irq_chip rx164_irq_type = {
.name = "RX164",
- .startup = rx164_startup_irq,
- .shutdown = rx164_disable_irq,
- .enable = rx164_enable_irq,
- .disable = rx164_disable_irq,
- .ack = rx164_disable_irq,
- .end = rx164_end_irq,
+ .unmask = rx164_enable_irq,
+ .mask = rx164_disable_irq,
+ .mask_ack = rx164_disable_irq,
};
static void
@@ -116,8 +99,8 @@ rx164_init_irq(void)
rx164_update_irq_hw(0);
for (i = 16; i < 40; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &rx164_irq_type;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq);
}
init_i8259a_irqs();
diff --git a/trunk/arch/alpha/kernel/sys_sable.c b/trunk/arch/alpha/kernel/sys_sable.c
index b2abe27a23cf..5c4423d1b06c 100644
--- a/trunk/arch/alpha/kernel/sys_sable.c
+++ b/trunk/arch/alpha/kernel/sys_sable.c
@@ -474,20 +474,6 @@ sable_lynx_disable_irq(unsigned int irq)
#endif
}
-static unsigned int
-sable_lynx_startup_irq(unsigned int irq)
-{
- sable_lynx_enable_irq(irq);
- return 0;
-}
-
-static void
-sable_lynx_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- sable_lynx_enable_irq(irq);
-}
-
static void
sable_lynx_mask_and_ack_irq(unsigned int irq)
{
@@ -503,12 +489,9 @@ sable_lynx_mask_and_ack_irq(unsigned int irq)
static struct irq_chip sable_lynx_irq_type = {
.name = "SABLE/LYNX",
- .startup = sable_lynx_startup_irq,
- .shutdown = sable_lynx_disable_irq,
- .enable = sable_lynx_enable_irq,
- .disable = sable_lynx_disable_irq,
- .ack = sable_lynx_mask_and_ack_irq,
- .end = sable_lynx_end_irq,
+ .unmask = sable_lynx_enable_irq,
+ .mask = sable_lynx_disable_irq,
+ .mask_ack = sable_lynx_mask_and_ack_irq,
};
static void
@@ -535,8 +518,9 @@ sable_lynx_init_irq(int nr_of_irqs)
long i;
for (i = 0; i < nr_of_irqs; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &sable_lynx_irq_type;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, &sable_lynx_irq_type,
+ handle_level_irq);
}
common_init_isa_dma();
diff --git a/trunk/arch/alpha/kernel/sys_takara.c b/trunk/arch/alpha/kernel/sys_takara.c
index 4da596b6adbb..f8a1e8a862fb 100644
--- a/trunk/arch/alpha/kernel/sys_takara.c
+++ b/trunk/arch/alpha/kernel/sys_takara.c
@@ -60,28 +60,11 @@ takara_disable_irq(unsigned int irq)
takara_update_irq_hw(irq, mask);
}
-static unsigned int
-takara_startup_irq(unsigned int irq)
-{
- takara_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-takara_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- takara_enable_irq(irq);
-}
-
static struct irq_chip takara_irq_type = {
.name = "TAKARA",
- .startup = takara_startup_irq,
- .shutdown = takara_disable_irq,
- .enable = takara_enable_irq,
- .disable = takara_disable_irq,
- .ack = takara_disable_irq,
- .end = takara_end_irq,
+ .unmask = takara_enable_irq,
+ .mask = takara_disable_irq,
+ .mask_ack = takara_disable_irq,
};
static void
@@ -153,8 +136,8 @@ takara_init_irq(void)
takara_update_irq_hw(i, -1);
for (i = 16; i < 128; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = &takara_irq_type;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq);
}
common_init_isa_dma();
diff --git a/trunk/arch/alpha/kernel/sys_titan.c b/trunk/arch/alpha/kernel/sys_titan.c
index 9008d0f20c53..e02494bf5ef3 100644
--- a/trunk/arch/alpha/kernel/sys_titan.c
+++ b/trunk/arch/alpha/kernel/sys_titan.c
@@ -129,20 +129,6 @@ titan_disable_irq(unsigned int irq)
spin_unlock(&titan_irq_lock);
}
-static unsigned int
-titan_startup_irq(unsigned int irq)
-{
- titan_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-titan_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- titan_enable_irq(irq);
-}
-
static void
titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
{
@@ -189,20 +175,17 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax)
{
long i;
for (i = imin; i <= imax; ++i) {
- irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i].chip = ops;
+ irq_to_desc(i)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i, ops, handle_level_irq);
}
}
static struct irq_chip titan_irq_type = {
- .name = "TITAN",
- .startup = titan_startup_irq,
- .shutdown = titan_disable_irq,
- .enable = titan_enable_irq,
- .disable = titan_disable_irq,
- .ack = titan_disable_irq,
- .end = titan_end_irq,
- .set_affinity = titan_set_irq_affinity,
+ .name = "TITAN",
+ .unmask = titan_enable_irq,
+ .mask = titan_disable_irq,
+ .mask_ack = titan_disable_irq,
+ .set_affinity = titan_set_irq_affinity,
};
static irqreturn_t
diff --git a/trunk/arch/alpha/kernel/sys_wildfire.c b/trunk/arch/alpha/kernel/sys_wildfire.c
index 62fd972e18ef..eec52594d410 100644
--- a/trunk/arch/alpha/kernel/sys_wildfire.c
+++ b/trunk/arch/alpha/kernel/sys_wildfire.c
@@ -139,32 +139,11 @@ wildfire_mask_and_ack_irq(unsigned int irq)
spin_unlock(&wildfire_irq_lock);
}
-static unsigned int
-wildfire_startup_irq(unsigned int irq)
-{
- wildfire_enable_irq(irq);
- return 0; /* never anything pending */
-}
-
-static void
-wildfire_end_irq(unsigned int irq)
-{
-#if 0
- if (!irq_desc[irq].action)
- printk("got irq %d\n", irq);
-#endif
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- wildfire_enable_irq(irq);
-}
-
static struct irq_chip wildfire_irq_type = {
.name = "WILDFIRE",
- .startup = wildfire_startup_irq,
- .shutdown = wildfire_disable_irq,
- .enable = wildfire_enable_irq,
- .disable = wildfire_disable_irq,
- .ack = wildfire_mask_and_ack_irq,
- .end = wildfire_end_irq,
+ .unmask = wildfire_enable_irq,
+ .mask = wildfire_disable_irq,
+ .mask_ack = wildfire_mask_and_ack_irq,
};
static void __init
@@ -198,15 +177,18 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
for (i = 0; i < 16; ++i) {
if (i == 2)
continue;
- irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i+irq_bias].chip = &wildfire_irq_type;
+ irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
+ handle_level_irq);
}
- irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[36+irq_bias].chip = &wildfire_irq_type;
+ irq_to_desc(36+irq_bias)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type,
+ handle_level_irq);
for (i = 40; i < 64; ++i) {
- irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
- irq_desc[i+irq_bias].chip = &wildfire_irq_type;
+ irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
+ handle_level_irq);
}
setup_irq(32+irq_bias, &isa_enable);
diff --git a/trunk/arch/alpha/lib/Makefile b/trunk/arch/alpha/lib/Makefile
index 9b72c59c95be..c0a83ab62b78 100644
--- a/trunk/arch/alpha/lib/Makefile
+++ b/trunk/arch/alpha/lib/Makefile
@@ -2,8 +2,8 @@
# Makefile for alpha-specific library files..
#
-EXTRA_AFLAGS := $(KBUILD_CFLAGS)
-EXTRA_CFLAGS := -Werror
+asflags-y := $(KBUILD_CFLAGS)
+ccflags-y := -Werror
# Many of these routines have implementations tuned for ev6.
# Choose them iff we're targeting ev6 specifically.
diff --git a/trunk/arch/alpha/math-emu/Makefile b/trunk/arch/alpha/math-emu/Makefile
index 359ef087e69e..7f4671995245 100644
--- a/trunk/arch/alpha/math-emu/Makefile
+++ b/trunk/arch/alpha/math-emu/Makefile
@@ -2,7 +2,7 @@
# Makefile for the FPU instruction emulation.
#
-EXTRA_CFLAGS := -w
+ccflags-y := -w
obj-$(CONFIG_MATHEMU) += math-emu.o
diff --git a/trunk/arch/alpha/mm/Makefile b/trunk/arch/alpha/mm/Makefile
index 09399c5386cb..c993d3f93cf6 100644
--- a/trunk/arch/alpha/mm/Makefile
+++ b/trunk/arch/alpha/mm/Makefile
@@ -2,7 +2,7 @@
# Makefile for the linux alpha-specific parts of the memory manager.
#
-EXTRA_CFLAGS := -Werror
+ccflags-y := -Werror
obj-y := init.o fault.o extable.o
diff --git a/trunk/arch/alpha/oprofile/Makefile b/trunk/arch/alpha/oprofile/Makefile
index 4aa56247bdc6..3473de751b03 100644
--- a/trunk/arch/alpha/oprofile/Makefile
+++ b/trunk/arch/alpha/oprofile/Makefile
@@ -1,4 +1,4 @@
-EXTRA_CFLAGS := -Werror -Wno-sign-compare
+ccflags-y := -Werror -Wno-sign-compare
obj-$(CONFIG_OPROFILE) += oprofile.o
diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig
index e2f801167593..5cff165b7eb0 100644
--- a/trunk/arch/arm/Kconfig
+++ b/trunk/arch/arm/Kconfig
@@ -26,6 +26,8 @@ config ARM
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
select HAVE_C_RECORDMCOUNT
+ select HAVE_GENERIC_HARDIRQS
+ select HAVE_SPARSE_IRQ
help
The ARM series is a line of low-power-consumption RISC chip designs
licensed by ARM Ltd and targeted at embedded applications and
@@ -97,10 +99,6 @@ config MCA
(and especially the web page given
there) before attempting to build an MCA bus kernel.
-config GENERIC_HARDIRQS
- bool
- default y
-
config STACKTRACE_SUPPORT
bool
default y
@@ -180,9 +178,6 @@ config FIQ
config ARCH_MTD_XIP
bool
-config GENERIC_HARDIRQS_NO__DO_IRQ
- def_bool y
-
config ARM_L1_CACHE_SHIFT_6
bool
help
@@ -368,7 +363,7 @@ config ARCH_MXS
bool "Freescale MXS-based"
select GENERIC_CLOCKEVENTS
select ARCH_REQUIRE_GPIOLIB
- select COMMON_CLKDEV
+ select CLKDEV_LOOKUP
help
Support for Freescale MXS-based family of processors
@@ -771,6 +766,7 @@ config ARCH_S5PV310
select ARCH_SPARSEMEM_ENABLE
select GENERIC_GPIO
select HAVE_CLK
+ select ARCH_HAS_CPUFREQ
select GENERIC_CLOCKEVENTS
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_I2C if I2C
@@ -1281,7 +1277,7 @@ config SMP
config SMP_ON_UP
bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
depends on EXPERIMENTAL
- depends on SMP && !XIP
+ depends on SMP && !XIP_KERNEL
default y
help
SMP kernels contain instructions which fail on non-SMP processors.
@@ -1452,15 +1448,6 @@ config HW_PERF_EVENTS
Enable hardware performance counter support for perf events. If
disabled, perf events will use software events only.
-config SPARSE_IRQ
- def_bool n
- help
- This enables support for sparse irqs. This is useful in general
- as most CPUs have a fairly sparse array of IRQ vectors, which
- the irq_desc then maps directly on to. Systems with a high
- number of off-chip IRQs will want to treat this as
- experimental until they have been independently verified.
-
source "mm/Kconfig"
config FORCE_MAX_ZONEORDER
diff --git a/trunk/arch/arm/common/gic.c b/trunk/arch/arm/common/gic.c
index 0b89ef001330..224377211151 100644
--- a/trunk/arch/arm/common/gic.c
+++ b/trunk/arch/arm/common/gic.c
@@ -50,57 +50,56 @@ struct gic_chip_data {
static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
-static inline void __iomem *gic_dist_base(unsigned int irq)
+static inline void __iomem *gic_dist_base(struct irq_data *d)
{
- struct gic_chip_data *gic_data = get_irq_chip_data(irq);
+ struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
return gic_data->dist_base;
}
-static inline void __iomem *gic_cpu_base(unsigned int irq)
+static inline void __iomem *gic_cpu_base(struct irq_data *d)
{
- struct gic_chip_data *gic_data = get_irq_chip_data(irq);
+ struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
return gic_data->cpu_base;
}
-static inline unsigned int gic_irq(unsigned int irq)
+static inline unsigned int gic_irq(struct irq_data *d)
{
- struct gic_chip_data *gic_data = get_irq_chip_data(irq);
- return irq - gic_data->irq_offset;
+ struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
+ return d->irq - gic_data->irq_offset;
}
/*
* Routines to acknowledge, disable and enable interrupts
*/
-static void gic_ack_irq(unsigned int irq)
+static void gic_ack_irq(struct irq_data *d)
{
-
spin_lock(&irq_controller_lock);
- writel(gic_irq(irq), gic_cpu_base(irq) + GIC_CPU_EOI);
+ writel(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
spin_unlock(&irq_controller_lock);
}
-static void gic_mask_irq(unsigned int irq)
+static void gic_mask_irq(struct irq_data *d)
{
- u32 mask = 1 << (irq % 32);
+ u32 mask = 1 << (d->irq % 32);
spin_lock(&irq_controller_lock);
- writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4);
+ writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
spin_unlock(&irq_controller_lock);
}
-static void gic_unmask_irq(unsigned int irq)
+static void gic_unmask_irq(struct irq_data *d)
{
- u32 mask = 1 << (irq % 32);
+ u32 mask = 1 << (d->irq % 32);
spin_lock(&irq_controller_lock);
- writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_SET + (gic_irq(irq) / 32) * 4);
+ writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
spin_unlock(&irq_controller_lock);
}
-static int gic_set_type(unsigned int irq, unsigned int type)
+static int gic_set_type(struct irq_data *d, unsigned int type)
{
- void __iomem *base = gic_dist_base(irq);
- unsigned int gicirq = gic_irq(irq);
+ void __iomem *base = gic_dist_base(d);
+ unsigned int gicirq = gic_irq(d);
u32 enablemask = 1 << (gicirq % 32);
u32 enableoff = (gicirq / 32) * 4;
u32 confmask = 0x2 << ((gicirq % 16) * 2);
@@ -143,21 +142,22 @@ static int gic_set_type(unsigned int irq, unsigned int type)
}
#ifdef CONFIG_SMP
-static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
+static int
+gic_set_cpu(struct irq_data *d, const struct cpumask *mask_val, bool force)
{
- void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
- unsigned int shift = (irq % 4) * 8;
+ void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
+ unsigned int shift = (d->irq % 4) * 8;
unsigned int cpu = cpumask_first(mask_val);
u32 val;
struct irq_desc *desc;
spin_lock(&irq_controller_lock);
- desc = irq_to_desc(irq);
+ desc = irq_to_desc(d->irq);
if (desc == NULL) {
spin_unlock(&irq_controller_lock);
return -EINVAL;
}
- desc->node = cpu;
+ d->node = cpu;
val = readl(reg) & ~(0xff << shift);
val |= 1 << (cpu + shift);
writel(val, reg);
@@ -175,7 +175,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
unsigned long status;
/* primary controller ack'ing */
- chip->ack(irq);
+ chip->irq_ack(&desc->irq_data);
spin_lock(&irq_controller_lock);
status = readl(chip_data->cpu_base + GIC_CPU_INTACK);
@@ -193,17 +193,17 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
out:
/* primary controller unmasking */
- chip->unmask(irq);
+ chip->irq_unmask(&desc->irq_data);
}
static struct irq_chip gic_chip = {
- .name = "GIC",
- .ack = gic_ack_irq,
- .mask = gic_mask_irq,
- .unmask = gic_unmask_irq,
- .set_type = gic_set_type,
+ .name = "GIC",
+ .irq_ack = gic_ack_irq,
+ .irq_mask = gic_mask_irq,
+ .irq_unmask = gic_unmask_irq,
+ .irq_set_type = gic_set_type,
#ifdef CONFIG_SMP
- .set_affinity = gic_set_cpu,
+ .irq_set_affinity = gic_set_cpu,
#endif
};
@@ -337,7 +337,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq)
local_irq_save(flags);
irq_to_desc(irq)->status |= IRQ_NOPROBE;
- gic_unmask_irq(irq);
+ gic_unmask_irq(irq_get_irq_data(irq));
local_irq_restore(flags);
}
diff --git a/trunk/arch/arm/common/it8152.c b/trunk/arch/arm/common/it8152.c
index 665ebf7e62a6..fcddd48fe9da 100644
--- a/trunk/arch/arm/common/it8152.c
+++ b/trunk/arch/arm/common/it8152.c
@@ -31,8 +31,10 @@
#define MAX_SLOTS 21
-static void it8152_mask_irq(unsigned int irq)
+static void it8152_mask_irq(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
if (irq >= IT8152_LD_IRQ(0)) {
__raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) |
(1 << (irq - IT8152_LD_IRQ(0)))),
@@ -48,8 +50,10 @@ static void it8152_mask_irq(unsigned int irq)
}
}
-static void it8152_unmask_irq(unsigned int irq)
+static void it8152_unmask_irq(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
if (irq >= IT8152_LD_IRQ(0)) {
__raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) &
~(1 << (irq - IT8152_LD_IRQ(0)))),
@@ -67,9 +71,9 @@ static void it8152_unmask_irq(unsigned int irq)
static struct irq_chip it8152_irq_chip = {
.name = "it8152",
- .ack = it8152_mask_irq,
- .mask = it8152_mask_irq,
- .unmask = it8152_unmask_irq,
+ .irq_ack = it8152_mask_irq,
+ .irq_mask = it8152_mask_irq,
+ .irq_unmask = it8152_unmask_irq,
};
void it8152_init_irq(void)
diff --git a/trunk/arch/arm/common/locomo.c b/trunk/arch/arm/common/locomo.c
index 9dff07c80ddb..a026a6bf4892 100644
--- a/trunk/arch/arm/common/locomo.c
+++ b/trunk/arch/arm/common/locomo.c
@@ -144,7 +144,7 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc)
int req, i;
/* Acknowledge the parent IRQ */
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
/* check why this interrupt was generated */
req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00;
@@ -161,33 +161,33 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc)
}
}
-static void locomo_ack_irq(unsigned int irq)
+static void locomo_ack_irq(struct irq_data *d)
{
}
-static void locomo_mask_irq(unsigned int irq)
+static void locomo_mask_irq(struct irq_data *d)
{
- struct locomo *lchip = get_irq_chip_data(irq);
+ struct locomo *lchip = irq_data_get_irq_chip_data(d);
unsigned int r;
r = locomo_readl(lchip->base + LOCOMO_ICR);
- r &= ~(0x0010 << (irq - lchip->irq_base));
+ r &= ~(0x0010 << (d->irq - lchip->irq_base));
locomo_writel(r, lchip->base + LOCOMO_ICR);
}
-static void locomo_unmask_irq(unsigned int irq)
+static void locomo_unmask_irq(struct irq_data *d)
{
- struct locomo *lchip = get_irq_chip_data(irq);
+ struct locomo *lchip = irq_data_get_irq_chip_data(d);
unsigned int r;
r = locomo_readl(lchip->base + LOCOMO_ICR);
- r |= (0x0010 << (irq - lchip->irq_base));
+ r |= (0x0010 << (d->irq - lchip->irq_base));
locomo_writel(r, lchip->base + LOCOMO_ICR);
}
static struct irq_chip locomo_chip = {
- .name = "LOCOMO",
- .ack = locomo_ack_irq,
- .mask = locomo_mask_irq,
- .unmask = locomo_unmask_irq,
+ .name = "LOCOMO",
+ .irq_ack = locomo_ack_irq,
+ .irq_mask = locomo_mask_irq,
+ .irq_unmask = locomo_unmask_irq,
};
static void locomo_setup_irq(struct locomo *lchip)
diff --git a/trunk/arch/arm/common/sa1111.c b/trunk/arch/arm/common/sa1111.c
index c0258a8c103b..eb9796b0dab2 100644
--- a/trunk/arch/arm/common/sa1111.c
+++ b/trunk/arch/arm/common/sa1111.c
@@ -210,7 +210,7 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
@@ -228,35 +228,35 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
generic_handle_irq(i + sachip->irq_base);
/* For level-based interrupts */
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
-static void sa1111_ack_irq(unsigned int irq)
+static void sa1111_ack_irq(struct irq_data *d)
{
}
-static void sa1111_mask_lowirq(unsigned int irq)
+static void sa1111_mask_lowirq(struct irq_data *d)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie0;
ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
- ie0 &= ~SA1111_IRQMASK_LO(irq);
+ ie0 &= ~SA1111_IRQMASK_LO(d->irq);
writel(ie0, mapbase + SA1111_INTEN0);
}
-static void sa1111_unmask_lowirq(unsigned int irq)
+static void sa1111_unmask_lowirq(struct irq_data *d)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie0;
ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
- ie0 |= SA1111_IRQMASK_LO(irq);
+ ie0 |= SA1111_IRQMASK_LO(d->irq);
sa1111_writel(ie0, mapbase + SA1111_INTEN0);
}
@@ -267,11 +267,11 @@ static void sa1111_unmask_lowirq(unsigned int irq)
* be triggered. In fact, its very difficult, if not impossible to get
* INTSET to re-trigger the interrupt.
*/
-static int sa1111_retrigger_lowirq(unsigned int irq)
+static int sa1111_retrigger_lowirq(struct irq_data *d)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
- unsigned int mask = SA1111_IRQMASK_LO(irq);
+ unsigned int mask = SA1111_IRQMASK_LO(d->irq);
unsigned long ip0;
int i;
@@ -279,21 +279,21 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
for (i = 0; i < 8; i++) {
sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
- if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
+ if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask)
break;
}
if (i == 8)
printk(KERN_ERR "Danger Will Robinson: failed to "
- "re-trigger IRQ%d\n", irq);
+ "re-trigger IRQ%d\n", d->irq);
return i == 8 ? -1 : 0;
}
-static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
+static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
- unsigned int mask = SA1111_IRQMASK_LO(irq);
+ unsigned int mask = SA1111_IRQMASK_LO(d->irq);
unsigned long ip0;
if (flags == IRQ_TYPE_PROBE)
@@ -313,11 +313,11 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
return 0;
}
-static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
+static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
- unsigned int mask = SA1111_IRQMASK_LO(irq);
+ unsigned int mask = SA1111_IRQMASK_LO(d->irq);
unsigned long we0;
we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@@ -332,33 +332,33 @@ static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
static struct irq_chip sa1111_low_chip = {
.name = "SA1111-l",
- .ack = sa1111_ack_irq,
- .mask = sa1111_mask_lowirq,
- .unmask = sa1111_unmask_lowirq,
- .retrigger = sa1111_retrigger_lowirq,
- .set_type = sa1111_type_lowirq,
- .set_wake = sa1111_wake_lowirq,
+ .irq_ack = sa1111_ack_irq,
+ .irq_mask = sa1111_mask_lowirq,
+ .irq_unmask = sa1111_unmask_lowirq,
+ .irq_retrigger = sa1111_retrigger_lowirq,
+ .irq_set_type = sa1111_type_lowirq,
+ .irq_set_wake = sa1111_wake_lowirq,
};
-static void sa1111_mask_highirq(unsigned int irq)
+static void sa1111_mask_highirq(struct irq_data *d)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie1;
ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
- ie1 &= ~SA1111_IRQMASK_HI(irq);
+ ie1 &= ~SA1111_IRQMASK_HI(d->irq);
sa1111_writel(ie1, mapbase + SA1111_INTEN1);
}
-static void sa1111_unmask_highirq(unsigned int irq)
+static void sa1111_unmask_highirq(struct irq_data *d)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie1;
ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
- ie1 |= SA1111_IRQMASK_HI(irq);
+ ie1 |= SA1111_IRQMASK_HI(d->irq);
sa1111_writel(ie1, mapbase + SA1111_INTEN1);
}
@@ -369,11 +369,11 @@ static void sa1111_unmask_highirq(unsigned int irq)
* be triggered. In fact, its very difficult, if not impossible to get
* INTSET to re-trigger the interrupt.
*/
-static int sa1111_retrigger_highirq(unsigned int irq)
+static int sa1111_retrigger_highirq(struct irq_data *d)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
- unsigned int mask = SA1111_IRQMASK_HI(irq);
+ unsigned int mask = SA1111_IRQMASK_HI(d->irq);
unsigned long ip1;
int i;
@@ -387,15 +387,15 @@ static int sa1111_retrigger_highirq(unsigned int irq)
if (i == 8)
printk(KERN_ERR "Danger Will Robinson: failed to "
- "re-trigger IRQ%d\n", irq);
+ "re-trigger IRQ%d\n", d->irq);
return i == 8 ? -1 : 0;
}
-static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
+static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
- unsigned int mask = SA1111_IRQMASK_HI(irq);
+ unsigned int mask = SA1111_IRQMASK_HI(d->irq);
unsigned long ip1;
if (flags == IRQ_TYPE_PROBE)
@@ -415,11 +415,11 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
return 0;
}
-static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
+static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)
{
- struct sa1111 *sachip = get_irq_chip_data(irq);
+ struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
void __iomem *mapbase = sachip->base + SA1111_INTC;
- unsigned int mask = SA1111_IRQMASK_HI(irq);
+ unsigned int mask = SA1111_IRQMASK_HI(d->irq);
unsigned long we1;
we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@@ -434,12 +434,12 @@ static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
static struct irq_chip sa1111_high_chip = {
.name = "SA1111-h",
- .ack = sa1111_ack_irq,
- .mask = sa1111_mask_highirq,
- .unmask = sa1111_unmask_highirq,
- .retrigger = sa1111_retrigger_highirq,
- .set_type = sa1111_type_highirq,
- .set_wake = sa1111_wake_highirq,
+ .irq_ack = sa1111_ack_irq,
+ .irq_mask = sa1111_mask_highirq,
+ .irq_unmask = sa1111_unmask_highirq,
+ .irq_retrigger = sa1111_retrigger_highirq,
+ .irq_set_type = sa1111_type_highirq,
+ .irq_set_wake = sa1111_wake_highirq,
};
static void sa1111_setup_irq(struct sa1111 *sachip)
diff --git a/trunk/arch/arm/common/vic.c b/trunk/arch/arm/common/vic.c
index cb660bc54d7a..ae5fe7292e0d 100644
--- a/trunk/arch/arm/common/vic.c
+++ b/trunk/arch/arm/common/vic.c
@@ -204,26 +204,26 @@ static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 res
static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
#endif /* CONFIG_PM */
-static void vic_ack_irq(unsigned int irq)
+static void vic_ack_irq(struct irq_data *d)
{
- void __iomem *base = get_irq_chip_data(irq);
- irq &= 31;
+ void __iomem *base = irq_data_get_irq_chip_data(d);
+ unsigned int irq = d->irq & 31;
writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
/* moreover, clear the soft-triggered, in case it was the reason */
writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
}
-static void vic_mask_irq(unsigned int irq)
+static void vic_mask_irq(struct irq_data *d)
{
- void __iomem *base = get_irq_chip_data(irq);
- irq &= 31;
+ void __iomem *base = irq_data_get_irq_chip_data(d);
+ unsigned int irq = d->irq & 31;
writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
}
-static void vic_unmask_irq(unsigned int irq)
+static void vic_unmask_irq(struct irq_data *d)
{
- void __iomem *base = get_irq_chip_data(irq);
- irq &= 31;
+ void __iomem *base = irq_data_get_irq_chip_data(d);
+ unsigned int irq = d->irq & 31;
writel(1 << irq, base + VIC_INT_ENABLE);
}
@@ -242,10 +242,10 @@ static struct vic_device *vic_from_irq(unsigned int irq)
return NULL;
}
-static int vic_set_wake(unsigned int irq, unsigned int on)
+static int vic_set_wake(struct irq_data *d, unsigned int on)
{
- struct vic_device *v = vic_from_irq(irq);
- unsigned int off = irq & 31;
+ struct vic_device *v = vic_from_irq(d->irq);
+ unsigned int off = d->irq & 31;
u32 bit = 1 << off;
if (!v)
@@ -267,10 +267,10 @@ static int vic_set_wake(unsigned int irq, unsigned int on)
static struct irq_chip vic_chip = {
.name = "VIC",
- .ack = vic_ack_irq,
- .mask = vic_mask_irq,
- .unmask = vic_unmask_irq,
- .set_wake = vic_set_wake,
+ .irq_ack = vic_ack_irq,
+ .irq_mask = vic_mask_irq,
+ .irq_unmask = vic_unmask_irq,
+ .irq_set_wake = vic_set_wake,
};
static void __init vic_disable(void __iomem *base)
diff --git a/trunk/arch/arm/include/asm/bitops.h b/trunk/arch/arm/include/asm/bitops.h
index 338ff19ae447..7b1bb2bbaf88 100644
--- a/trunk/arch/arm/include/asm/bitops.h
+++ b/trunk/arch/arm/include/asm/bitops.h
@@ -285,7 +285,7 @@ static inline int fls(int x)
if (__builtin_constant_p(x))
return constant_fls(x);
- asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc");
+ asm("clz\t%0, %1" : "=r" (ret) : "r" (x));
ret = 32 - ret;
return ret;
}
diff --git a/trunk/arch/arm/include/asm/sched_clock.h b/trunk/arch/arm/include/asm/sched_clock.h
index a84628be1a7b..c8e6ddf3e860 100644
--- a/trunk/arch/arm/include/asm/sched_clock.h
+++ b/trunk/arch/arm/include/asm/sched_clock.h
@@ -115,4 +115,6 @@ static inline void init_fixed_sched_clock(struct clock_data *cd,
}
}
+extern void sched_clock_postinit(void);
+
#endif
diff --git a/trunk/arch/arm/kernel/ecard.c b/trunk/arch/arm/kernel/ecard.c
index eed2f795e1b3..2ad62df37730 100644
--- a/trunk/arch/arm/kernel/ecard.c
+++ b/trunk/arch/arm/kernel/ecard.c
@@ -443,40 +443,40 @@ static expansioncard_ops_t ecard_default_ops = {
*
* They are not meant to be called directly, but via enable/disable_irq.
*/
-static void ecard_irq_unmask(unsigned int irqnr)
+static void ecard_irq_unmask(struct irq_data *d)
{
- ecard_t *ec = slot_to_ecard(irqnr - 32);
+ ecard_t *ec = slot_to_ecard(d->irq - 32);
if (ec) {
if (!ec->ops)
ec->ops = &ecard_default_ops;
if (ec->claimed && ec->ops->irqenable)
- ec->ops->irqenable(ec, irqnr);
+ ec->ops->irqenable(ec, d->irq);
else
printk(KERN_ERR "ecard: rejecting request to "
- "enable IRQs for %d\n", irqnr);
+ "enable IRQs for %d\n", d->irq);
}
}
-static void ecard_irq_mask(unsigned int irqnr)
+static void ecard_irq_mask(struct irq_data *d)
{
- ecard_t *ec = slot_to_ecard(irqnr - 32);
+ ecard_t *ec = slot_to_ecard(d->irq - 32);
if (ec) {
if (!ec->ops)
ec->ops = &ecard_default_ops;
if (ec->ops && ec->ops->irqdisable)
- ec->ops->irqdisable(ec, irqnr);
+ ec->ops->irqdisable(ec, d->irq);
}
}
static struct irq_chip ecard_chip = {
- .name = "ECARD",
- .ack = ecard_irq_mask,
- .mask = ecard_irq_mask,
- .unmask = ecard_irq_unmask,
+ .name = "ECARD",
+ .irq_ack = ecard_irq_mask,
+ .irq_mask = ecard_irq_mask,
+ .irq_unmask = ecard_irq_unmask,
};
void ecard_enablefiq(unsigned int fiqnr)
@@ -551,7 +551,7 @@ static void ecard_check_lockup(struct irq_desc *desc)
printk(KERN_ERR "\nInterrupt lockup detected - "
"disabling all expansion card interrupts\n");
- desc->chip->mask(IRQ_EXPANSIONCARD);
+ desc->irq_data.chip->irq_mask(&desc->irq_data);
ecard_dump_irq_state();
}
} else
@@ -574,7 +574,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
ecard_t *ec;
int called = 0;
- desc->chip->mask(irq);
+ desc->irq_data.chip->irq_mask(&desc->irq_data);
for (ec = cards; ec; ec = ec->next) {
int pending;
@@ -591,7 +591,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
called ++;
}
}
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
if (called == 0)
ecard_check_lockup(desc);
diff --git a/trunk/arch/arm/kernel/head-common.S b/trunk/arch/arm/kernel/head-common.S
index bbecaac1e013..8f57515bbdb0 100644
--- a/trunk/arch/arm/kernel/head-common.S
+++ b/trunk/arch/arm/kernel/head-common.S
@@ -60,6 +60,8 @@ str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
.align
+#else
+ b __error
#endif
/*
diff --git a/trunk/arch/arm/kernel/irq.c b/trunk/arch/arm/kernel/irq.c
index 8135438b8818..28536e352deb 100644
--- a/trunk/arch/arm/kernel/irq.c
+++ b/trunk/arch/arm/kernel/irq.c
@@ -88,7 +88,7 @@ int show_interrupts(struct seq_file *p, void *v)
seq_printf(p, "%*d: ", prec, i);
for_each_present_cpu(cpu)
seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
- seq_printf(p, " %10s", desc->chip->name ? : "-");
+ seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-");
seq_printf(p, " %s", action->name);
for (action = action->next; action; action = action->next)
seq_printf(p, ", %s", action->name);
@@ -181,10 +181,11 @@ int __init arch_probe_nr_irqs(void)
static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
{
- pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->node, cpu);
+ pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->irq_data.node, cpu);
raw_spin_lock_irq(&desc->lock);
- desc->chip->set_affinity(irq, cpumask_of(cpu));
+ desc->irq_data.chip->irq_set_affinity(&desc->irq_data,
+ cpumask_of(cpu), false);
raw_spin_unlock_irq(&desc->lock);
}
@@ -199,16 +200,18 @@ void migrate_irqs(void)
struct irq_desc *desc;
for_each_irq_desc(i, desc) {
- if (desc->node == cpu) {
- unsigned int newcpu = cpumask_any_and(desc->affinity,
+ struct irq_data *d = &desc->irq_data;
+
+ if (d->node == cpu) {
+ unsigned int newcpu = cpumask_any_and(d->affinity,
cpu_online_mask);
if (newcpu >= nr_cpu_ids) {
if (printk_ratelimit())
printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
i, cpu);
- cpumask_setall(desc->affinity);
- newcpu = cpumask_any_and(desc->affinity,
+ cpumask_setall(d->affinity);
+ newcpu = cpumask_any_and(d->affinity,
cpu_online_mask);
}
diff --git a/trunk/arch/arm/kernel/process.c b/trunk/arch/arm/kernel/process.c
index e76fcaadce03..94bbedbed639 100644
--- a/trunk/arch/arm/kernel/process.c
+++ b/trunk/arch/arm/kernel/process.c
@@ -483,6 +483,7 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
}
+#ifdef CONFIG_MMU
/*
* The vectors page is always readable from user space for the
* atomic helpers and the signal restart code. Let's declare a mapping
@@ -503,3 +504,4 @@ const char *arch_vma_name(struct vm_area_struct *vma)
{
return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL;
}
+#endif
diff --git a/trunk/arch/arm/kernel/sched_clock.c b/trunk/arch/arm/kernel/sched_clock.c
index 2cdcc9287c74..9a46370fe9da 100644
--- a/trunk/arch/arm/kernel/sched_clock.c
+++ b/trunk/arch/arm/kernel/sched_clock.c
@@ -34,7 +34,7 @@ void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
sched_clock_update_fn = update;
/* calculate the mult/shift to convert counter ticks to ns. */
- clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 60);
+ clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0);
r = rate;
if (r >= 4000000) {
@@ -60,10 +60,15 @@ void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
* sets the initial epoch.
*/
sched_clock_timer.data = msecs_to_jiffies(w - (w / 10));
- sched_clock_poll(sched_clock_timer.data);
+ update();
/*
* Ensure that sched_clock() starts off at 0ns
*/
cd->epoch_ns = 0;
}
+
+void __init sched_clock_postinit(void)
+{
+ sched_clock_poll(sched_clock_timer.data);
+}
diff --git a/trunk/arch/arm/kernel/setup.c b/trunk/arch/arm/kernel/setup.c
index 3455ad33de4c..420b8d6485d6 100644
--- a/trunk/arch/arm/kernel/setup.c
+++ b/trunk/arch/arm/kernel/setup.c
@@ -518,25 +518,21 @@ setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
#endif
}
-static void __init
-request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
+static void __init request_standard_resources(struct machine_desc *mdesc)
{
+ struct memblock_region *region;
struct resource *res;
- int i;
kernel_code.start = virt_to_phys(_text);
kernel_code.end = virt_to_phys(_etext - 1);
kernel_data.start = virt_to_phys(_sdata);
kernel_data.end = virt_to_phys(_end - 1);
- for (i = 0; i < mi->nr_banks; i++) {
- if (mi->bank[i].size == 0)
- continue;
-
+ for_each_memblock(memory, region) {
res = alloc_bootmem_low(sizeof(*res));
res->name = "System RAM";
- res->start = mi->bank[i].start;
- res->end = mi->bank[i].start + mi->bank[i].size - 1;
+ res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
+ res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
request_resource(&iomem_resource, res);
@@ -650,15 +646,17 @@ static int __init parse_tag_revision(const struct tag *tag)
__tagtable(ATAG_REVISION, parse_tag_revision);
-#ifndef CONFIG_CMDLINE_FORCE
static int __init parse_tag_cmdline(const struct tag *tag)
{
+#ifndef CONFIG_CMDLINE_FORCE
strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE);
+#else
+ pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
+#endif /* CONFIG_CMDLINE_FORCE */
return 0;
}
__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
-#endif /* CONFIG_CMDLINE_FORCE */
/*
* Scan the tag table for this tag, and call its parse function.
@@ -857,7 +855,7 @@ void __init setup_arch(char **cmdline_p)
arm_memblock_init(&meminfo, mdesc);
paging_init(mdesc);
- request_standard_resources(&meminfo, mdesc);
+ request_standard_resources(mdesc);
#ifdef CONFIG_SMP
if (is_smp())
diff --git a/trunk/arch/arm/kernel/smp_twd.c b/trunk/arch/arm/kernel/smp_twd.c
index dd790745b3ef..fd9156698ab9 100644
--- a/trunk/arch/arm/kernel/smp_twd.c
+++ b/trunk/arch/arm/kernel/smp_twd.c
@@ -114,7 +114,7 @@ static void __cpuinit twd_calibrate_rate(void)
twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
- (twd_timer_rate / 100000) % 100);
+ (twd_timer_rate / 1000000) % 100);
}
load = twd_timer_rate / HZ;
diff --git a/trunk/arch/arm/kernel/stacktrace.c b/trunk/arch/arm/kernel/stacktrace.c
index c2e112e1a05f..381d23a497c1 100644
--- a/trunk/arch/arm/kernel/stacktrace.c
+++ b/trunk/arch/arm/kernel/stacktrace.c
@@ -94,10 +94,13 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
if (tsk != current) {
#ifdef CONFIG_SMP
/*
- * What guarantees do we have here that 'tsk'
- * is not running on another CPU?
+ * What guarantees do we have here that 'tsk' is not
+ * running on another CPU? For now, ignore it as we
+ * can't guarantee we won't explode.
*/
- BUG();
+ if (trace->nr_entries < trace->max_entries)
+ trace->entries[trace->nr_entries++] = ULONG_MAX;
+ return;
#else
data.no_sched_functions = 1;
frame.fp = thread_saved_fp(tsk);
diff --git a/trunk/arch/arm/kernel/time.c b/trunk/arch/arm/kernel/time.c
index f1e2eb19a67d..3d76bf233734 100644
--- a/trunk/arch/arm/kernel/time.c
+++ b/trunk/arch/arm/kernel/time.c
@@ -29,6 +29,7 @@
#include
#include
+#include
#include
#include
#include
@@ -163,5 +164,8 @@ void __init time_init(void)
{
system_timer = machine_desc->timer;
system_timer->init();
+#ifdef CONFIG_HAVE_SCHED_CLOCK
+ sched_clock_postinit();
+#endif
}
diff --git a/trunk/arch/arm/lib/delay.S b/trunk/arch/arm/lib/delay.S
index 8d6a8762ab88..3c9a05c8d20b 100644
--- a/trunk/arch/arm/lib/delay.S
+++ b/trunk/arch/arm/lib/delay.S
@@ -25,11 +25,15 @@ ENTRY(__udelay)
ldr r2, .LC1
mul r0, r2, r0
ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
+ mov r1, #-1
ldr r2, .LC0
ldr r2, [r2] @ max = 0x01ffffff
+ add r0, r0, r1, lsr #32-14
mov r0, r0, lsr #14 @ max = 0x0001ffff
+ add r2, r2, r1, lsr #32-10
mov r2, r2, lsr #10 @ max = 0x00007fff
mul r0, r2, r0 @ max = 2^32-1
+ add r0, r0, r1, lsr #32-6
movs r0, r0, lsr #6
moveq pc, lr
diff --git a/trunk/arch/arm/mach-aaec2000/core.c b/trunk/arch/arm/mach-aaec2000/core.c
index 3ef68330452a..f8465bd17e67 100644
--- a/trunk/arch/arm/mach-aaec2000/core.c
+++ b/trunk/arch/arm/mach-aaec2000/core.c
@@ -68,25 +68,25 @@ void __init aaec2000_map_io(void)
/*
* Interrupt handling routines
*/
-static void aaec2000_int_ack(unsigned int irq)
+static void aaec2000_int_ack(struct irq_data *d)
{
- IRQ_INTSR = 1 << irq;
+ IRQ_INTSR = 1 << d->irq;
}
-static void aaec2000_int_mask(unsigned int irq)
+static void aaec2000_int_mask(struct irq_data *d)
{
- IRQ_INTENC |= (1 << irq);
+ IRQ_INTENC |= (1 << d->irq);
}
-static void aaec2000_int_unmask(unsigned int irq)
+static void aaec2000_int_unmask(struct irq_data *d)
{
- IRQ_INTENS |= (1 << irq);
+ IRQ_INTENS |= (1 << d->irq);
}
static struct irq_chip aaec2000_irq_chip = {
- .ack = aaec2000_int_ack,
- .mask = aaec2000_int_mask,
- .unmask = aaec2000_int_unmask,
+ .irq_ack = aaec2000_int_ack,
+ .irq_mask = aaec2000_int_mask,
+ .irq_unmask = aaec2000_int_unmask,
};
void __init aaec2000_init_irq(void)
diff --git a/trunk/arch/arm/mach-at91/Kconfig b/trunk/arch/arm/mach-at91/Kconfig
index c015b684b4fe..19390231a0e9 100644
--- a/trunk/arch/arm/mach-at91/Kconfig
+++ b/trunk/arch/arm/mach-at91/Kconfig
@@ -362,6 +362,12 @@ config MACH_CPU9G20
Select this if you are using a Eukrea Electromatique's
CPU9G20 Board
+config MACH_ACMENETUSFOXG20
+ bool "Acme Systems srl FOX Board G20"
+ help
+ Select this if you are using Acme Systems
+ FOX Board G20
+
config MACH_PORTUXG20
bool "taskit PortuxG20"
help
@@ -381,6 +387,13 @@ config MACH_PCONTROL_G20
Select this if you are using taskit's Stamp9G20 CPU module on this
carrier board, beeing the decentralized unit of a building automation
system; featuring nvram, eth-switch, iso-rs485, display, io
+
+config MACH_GSIA18S
+ bool "GS_IA18_S board"
+ help
+ This enables support for the GS_IA18_S board
+ produced by GeoSIG Ltd company. This is an internet accelerograph.
+
endif
if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
diff --git a/trunk/arch/arm/mach-at91/Makefile b/trunk/arch/arm/mach-at91/Makefile
index d13add71f72a..a83835e0c185 100644
--- a/trunk/arch/arm/mach-at91/Makefile
+++ b/trunk/arch/arm/mach-at91/Makefile
@@ -63,9 +63,11 @@ obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
# AT91SAM9G20 board-specific support
obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
+obj-$(CONFIG_MACH_ACMENETUSFOXG20) += board-foxg20.o
obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o
+obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
# AT91SAM9260/AT91SAM9G20 board-specific support
obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
diff --git a/trunk/arch/arm/mach-at91/board-foxg20.c b/trunk/arch/arm/mach-at91/board-foxg20.c
new file mode 100644
index 000000000000..dfc7dfe738e4
--- /dev/null
+++ b/trunk/arch/arm/mach-at91/board-foxg20.c
@@ -0,0 +1,274 @@
+/*
+ * Copyright (C) 2005 SAN People
+ * Copyright (C) 2008 Atmel
+ * Copyright (C) 2010 Lee McLoughlin - lee@lmmrtech.com
+ * Copyright (C) 2010 Sergio Tanzilli - tanzilli@acmesystems.it
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+/*
+ * The FOX Board G20 hardware comes as the "Netus G20" board with
+ * just the cpu, ram, dataflash and two header connectors.
+ * This is plugged into the FOX Board which provides the ethernet,
+ * usb, rtc, leds, switch, ...
+ *
+ * For more info visit: http://www.acmesystems.it/foxg20
+ */
+
+
+static void __init foxg20_map_io(void)
+{
+ /* Initialize processor: 18.432 MHz crystal */
+ at91sam9260_initialize(18432000);
+
+ /* DBGU on ttyS0. (Rx & Tx only) */
+ at91_register_uart(0, 0, 0);
+
+ /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+ at91_register_uart(AT91SAM9260_ID_US0, 1,
+ ATMEL_UART_CTS
+ | ATMEL_UART_RTS
+ | ATMEL_UART_DTR
+ | ATMEL_UART_DSR
+ | ATMEL_UART_DCD
+ | ATMEL_UART_RI);
+
+ /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9260_ID_US1, 2,
+ ATMEL_UART_CTS
+ | ATMEL_UART_RTS);
+
+ /* USART2 on ttyS3. (Rx & Tx only) */
+ at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
+
+ /* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9260_ID_US3, 4,
+ ATMEL_UART_CTS
+ | ATMEL_UART_RTS);
+
+ /* USART4 on ttyS5. (Rx & Tx only) */
+ at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
+
+ /* USART5 on ttyS6. (Rx & Tx only) */
+ at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
+
+ /* set serial console to ttyS0 (ie, DBGU) */
+ at91_set_serial_console(0);
+
+ /* Set the internal pull-up resistor on DRXD */
+ at91_set_A_periph(AT91_PIN_PB14, 1);
+
+}
+
+static void __init foxg20_init_irq(void)
+{
+ at91sam9260_init_interrupts(NULL);
+}
+
+
+/*
+ * USB Host port
+ */
+static struct at91_usbh_data __initdata foxg20_usbh_data = {
+ .ports = 2,
+};
+
+/*
+ * USB Device port
+ */
+static struct at91_udc_data __initdata foxg20_udc_data = {
+ .vbus_pin = AT91_PIN_PC6,
+ .pullup_pin = 0, /* pull-up driven by UDC */
+};
+
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info foxg20_spi_devices[] = {
+#if !defined(CONFIG_MMC_AT91)
+ {
+ .modalias = "mtd_dataflash",
+ .chip_select = 1,
+ .max_speed_hz = 15 * 1000 * 1000,
+ .bus_num = 0,
+ },
+#endif
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata foxg20_macb_data = {
+ .phy_irq_pin = AT91_PIN_PA7,
+ .is_rmii = 1,
+};
+
+/*
+ * MCI (SD/MMC)
+ * det_pin, wp_pin and vcc_pin are not connected
+ */
+static struct at91_mmc_data __initdata foxg20_mmc_data = {
+ .slot_b = 1,
+ .wire4 = 1,
+};
+
+
+/*
+ * LEDs
+ */
+static struct gpio_led foxg20_leds[] = {
+ { /* user led, red */
+ .name = "user_led",
+ .gpio = AT91_PIN_PC7,
+ .active_low = 0,
+ .default_trigger = "heartbeat",
+ },
+};
+
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button foxg20_buttons[] = {
+ {
+ .gpio = AT91_PIN_PC4,
+ .code = BTN_1,
+ .desc = "Button 1",
+ .active_low = 1,
+ .wakeup = 1,
+ },
+};
+
+static struct gpio_keys_platform_data foxg20_button_data = {
+ .buttons = foxg20_buttons,
+ .nbuttons = ARRAY_SIZE(foxg20_buttons),
+};
+
+static struct platform_device foxg20_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &foxg20_button_data,
+ }
+};
+
+static void __init foxg20_add_device_buttons(void)
+{
+ at91_set_gpio_input(AT91_PIN_PC4, 1); /* btn1 */
+ at91_set_deglitch(AT91_PIN_PC4, 1);
+
+ platform_device_register(&foxg20_button_device);
+}
+#else
+static void __init foxg20_add_device_buttons(void) {}
+#endif
+
+
+#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE)
+static struct w1_gpio_platform_data w1_gpio_pdata = {
+ /* If you choose to use a pin other than PB16 it needs to be 3.3V */
+ .pin = AT91_PIN_PB16,
+ .is_open_drain = 1,
+};
+
+static struct platform_device w1_device = {
+ .name = "w1-gpio",
+ .id = -1,
+ .dev.platform_data = &w1_gpio_pdata,
+};
+
+static void __init at91_add_device_w1(void)
+{
+ at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
+ at91_set_multi_drive(w1_gpio_pdata.pin, 1);
+ platform_device_register(&w1_device);
+}
+
+#endif
+
+
+static struct i2c_board_info __initdata foxg20_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO("24c512", 0x50),
+ },
+};
+
+
+static void __init foxg20_board_init(void)
+{
+ /* Serial */
+ at91_add_device_serial();
+ /* USB Host */
+ at91_add_device_usbh(&foxg20_usbh_data);
+ /* USB Device */
+ at91_add_device_udc(&foxg20_udc_data);
+ /* SPI */
+ at91_add_device_spi(foxg20_spi_devices, ARRAY_SIZE(foxg20_spi_devices));
+ /* Ethernet */
+ at91_add_device_eth(&foxg20_macb_data);
+ /* MMC */
+ at91_add_device_mmc(0, &foxg20_mmc_data);
+ /* I2C */
+ at91_add_device_i2c(foxg20_i2c_devices, ARRAY_SIZE(foxg20_i2c_devices));
+ /* LEDs */
+ at91_gpio_leds(foxg20_leds, ARRAY_SIZE(foxg20_leds));
+ /* Push Buttons */
+ foxg20_add_device_buttons();
+#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE)
+ at91_add_device_w1();
+#endif
+}
+
+MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")
+ /* Maintainer: Sergio Tanzilli */
+ .boot_params = AT91_SDRAM_BASE + 0x100,
+ .timer = &at91sam926x_timer,
+ .map_io = foxg20_map_io,
+ .init_irq = foxg20_init_irq,
+ .init_machine = foxg20_board_init,
+MACHINE_END
diff --git a/trunk/arch/arm/mach-at91/board-gsia18s.c b/trunk/arch/arm/mach-at91/board-gsia18s.c
new file mode 100644
index 000000000000..bc28136ee249
--- /dev/null
+++ b/trunk/arch/arm/mach-at91/board-gsia18s.c
@@ -0,0 +1,584 @@
+/*
+ * Copyright (C) 2010 Christian Glindkamp
+ * taskit GmbH
+ * 2010 Igor Plyatov
+ * GeoSIG Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+static void __init gsia18s_map_io(void)
+{
+ stamp9g20_map_io();
+
+ /*
+ * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
+ * Used for Internal Analog Modem.
+ */
+ at91_register_uart(AT91SAM9260_ID_US0, 1,
+ ATMEL_UART_CTS | ATMEL_UART_RTS |
+ ATMEL_UART_DTR | ATMEL_UART_DSR |
+ ATMEL_UART_DCD | ATMEL_UART_RI);
+ /*
+ * USART1 on ttyS2 (Rx, Tx, CTS, RTS).
+ * Used for GPS or WiFi or Data stream.
+ */
+ at91_register_uart(AT91SAM9260_ID_US1, 2,
+ ATMEL_UART_CTS | ATMEL_UART_RTS);
+ /*
+ * USART2 on ttyS3 (Rx, Tx, CTS, RTS).
+ * Used for External Modem.
+ */
+ at91_register_uart(AT91SAM9260_ID_US2, 3,
+ ATMEL_UART_CTS | ATMEL_UART_RTS);
+ /*
+ * USART3 on ttyS4 (Rx, Tx, RTS).
+ * Used for RS-485.
+ */
+ at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
+
+ /*
+ * USART4 on ttyS5 (Rx, Tx).
+ * Used for TRX433 Radio Module.
+ */
+ at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
+}
+
+static void __init init_irq(void)
+{
+ at91sam9260_init_interrupts(NULL);
+}
+
+/*
+ * Two USB Host ports
+ */
+static struct at91_usbh_data __initdata usbh_data = {
+ .ports = 2,
+};
+
+/*
+ * USB Device port
+ */
+static struct at91_udc_data __initdata udc_data = {
+ .vbus_pin = AT91_PIN_PA22,
+ .pullup_pin = 0, /* pull-up driven by UDC */
+};
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata macb_data = {
+ .phy_irq_pin = AT91_PIN_PA28,
+ .is_rmii = 1,
+};
+
+/*
+ * LEDs and GPOs
+ */
+static struct gpio_led gpio_leds[] = {
+ {
+ .name = "gpo:spi1reset",
+ .gpio = AT91_PIN_PC1,
+ .active_low = 0,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ {
+ .name = "gpo:trig_net_out",
+ .gpio = AT91_PIN_PB20,
+ .active_low = 0,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ {
+ .name = "gpo:trig_net_dir",
+ .gpio = AT91_PIN_PB19,
+ .active_low = 0,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ {
+ .name = "gpo:charge_dis",
+ .gpio = AT91_PIN_PC2,
+ .active_low = 0,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ {
+ .name = "led:event",
+ .gpio = AT91_PIN_PB17,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ {
+ .name = "led:lan",
+ .gpio = AT91_PIN_PB18,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ {
+ .name = "led:error",
+ .gpio = AT91_PIN_PB16,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ }
+};
+
+static struct gpio_led_platform_data gpio_led_info = {
+ .leds = gpio_leds,
+ .num_leds = ARRAY_SIZE(gpio_leds),
+};
+
+static struct platform_device leds = {
+ .name = "leds-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &gpio_led_info,
+ }
+};
+
+static void __init gsia18s_leds_init(void)
+{
+ platform_device_register(&leds);
+}
+
+/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */
+static struct gpio_led pcf_gpio_leds1[] = {
+ { /* bit 0 */
+ .name = "gpo:hdc_power",
+ .gpio = PCF_GPIO_HDC_POWER,
+ .active_low = 0,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ { /* bit 1 */
+ .name = "gpo:wifi_setup",
+ .gpio = PCF_GPIO_WIFI_SETUP,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ { /* bit 2 */
+ .name = "gpo:wifi_enable",
+ .gpio = PCF_GPIO_WIFI_ENABLE,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ { /* bit 3 */
+ .name = "gpo:wifi_reset",
+ .gpio = PCF_GPIO_WIFI_RESET,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ },
+ /* bit 4 used as GPI */
+ { /* bit 5 */
+ .name = "gpo:gps_setup",
+ .gpio = PCF_GPIO_GPS_SETUP,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ { /* bit 6 */
+ .name = "gpo:gps_standby",
+ .gpio = PCF_GPIO_GPS_STANDBY,
+ .active_low = 0,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ },
+ { /* bit 7 */
+ .name = "gpo:gps_power",
+ .gpio = PCF_GPIO_GPS_POWER,
+ .active_low = 0,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ }
+};
+
+static struct gpio_led_platform_data pcf_gpio_led_info1 = {
+ .leds = pcf_gpio_leds1,
+ .num_leds = ARRAY_SIZE(pcf_gpio_leds1),
+};
+
+static struct platform_device pcf_leds1 = {
+ .name = "leds-gpio", /* GS_IA18-CB_board */
+ .id = 1,
+ .dev = {
+ .platform_data = &pcf_gpio_led_info1,
+ }
+};
+
+/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
+static struct gpio_led pcf_gpio_leds2[] = {
+ { /* bit 0 */
+ .name = "gpo:alarm_1",
+ .gpio = PCF_GPIO_ALARM1,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ { /* bit 1 */
+ .name = "gpo:alarm_2",
+ .gpio = PCF_GPIO_ALARM2,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ { /* bit 2 */
+ .name = "gpo:alarm_3",
+ .gpio = PCF_GPIO_ALARM3,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ { /* bit 3 */
+ .name = "gpo:alarm_4",
+ .gpio = PCF_GPIO_ALARM4,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ /* bits 4, 5, 6 not used */
+ { /* bit 7 */
+ .name = "gpo:alarm_v_relay_on",
+ .gpio = PCF_GPIO_ALARM_V_RELAY_ON,
+ .active_low = 0,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+};
+
+static struct gpio_led_platform_data pcf_gpio_led_info2 = {
+ .leds = pcf_gpio_leds2,
+ .num_leds = ARRAY_SIZE(pcf_gpio_leds2),
+};
+
+static struct platform_device pcf_leds2 = {
+ .name = "leds-gpio",
+ .id = 2,
+ .dev = {
+ .platform_data = &pcf_gpio_led_info2,
+ }
+};
+
+/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */
+static struct gpio_led pcf_gpio_leds3[] = {
+ { /* bit 0 */
+ .name = "gpo:modem_power",
+ .gpio = PCF_GPIO_MODEM_POWER,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ /* bits 1 and 2 not used */
+ { /* bit 3 */
+ .name = "gpo:modem_reset",
+ .gpio = PCF_GPIO_MODEM_RESET,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ },
+ /* bits 4, 5 and 6 not used */
+ { /* bit 7 */
+ .name = "gpo:trx_reset",
+ .gpio = PCF_GPIO_TRX_RESET,
+ .active_low = 1,
+ .default_trigger = "none",
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ }
+};
+
+static struct gpio_led_platform_data pcf_gpio_led_info3 = {
+ .leds = pcf_gpio_leds3,
+ .num_leds = ARRAY_SIZE(pcf_gpio_leds3),
+};
+
+static struct platform_device pcf_leds3 = {
+ .name = "leds-gpio",
+ .id = 3,
+ .dev = {
+ .platform_data = &pcf_gpio_led_info3,
+ }
+};
+
+static void __init gsia18s_pcf_leds_init(void)
+{
+ platform_device_register(&pcf_leds1);
+ platform_device_register(&pcf_leds2);
+ platform_device_register(&pcf_leds3);
+}
+
+/*
+ * SPI busses.
+ */
+static struct spi_board_info gsia18s_spi_devices[] = {
+ { /* User accessible spi0, cs0 used for communication with MSP RTC */
+ .modalias = "spidev",
+ .bus_num = 0,
+ .chip_select = 0,
+ .max_speed_hz = 580000,
+ .mode = SPI_MODE_1,
+ },
+ { /* User accessible spi1, cs0 used for communication with int. DSP */
+ .modalias = "spidev",
+ .bus_num = 1,
+ .chip_select = 0,
+ .max_speed_hz = 5600000,
+ .mode = SPI_MODE_0,
+ },
+ { /* User accessible spi1, cs1 used for communication with ext. DSP */
+ .modalias = "spidev",
+ .bus_num = 1,
+ .chip_select = 1,
+ .max_speed_hz = 5600000,
+ .mode = SPI_MODE_0,
+ },
+ { /* User accessible spi1, cs2 used for communication with ext. DSP */
+ .modalias = "spidev",
+ .bus_num = 1,
+ .chip_select = 2,
+ .max_speed_hz = 5600000,
+ .mode = SPI_MODE_0,
+ },
+ { /* User accessible spi1, cs3 used for communication with ext. DSP */
+ .modalias = "spidev",
+ .bus_num = 1,
+ .chip_select = 3,
+ .max_speed_hz = 5600000,
+ .mode = SPI_MODE_0,
+ }
+};
+
+/*
+ * GPI Buttons
+ */
+static struct gpio_keys_button buttons[] = {
+ {
+ .gpio = GPIO_TRIG_NET_IN,
+ .code = BTN_1,
+ .desc = "TRIG_NET_IN",
+ .type = EV_KEY,
+ .active_low = 0,
+ .wakeup = 1,
+ },
+ { /* SW80 on the GS_IA18_S-MN board*/
+ .gpio = GPIO_CARD_UNMOUNT_0,
+ .code = BTN_2,
+ .desc = "Card umount 0",
+ .type = EV_KEY,
+ .active_low = 1,
+ .wakeup = 1,
+ },
+ { /* SW79 on the GS_IA18_S-MN board*/
+ .gpio = GPIO_CARD_UNMOUNT_1,
+ .code = BTN_3,
+ .desc = "Card umount 1",
+ .type = EV_KEY,
+ .active_low = 1,
+ .wakeup = 1,
+ },
+ { /* SW280 on the GS_IA18-CB board*/
+ .gpio = GPIO_KEY_POWER,
+ .code = KEY_POWER,
+ .desc = "Power Off Button",
+ .type = EV_KEY,
+ .active_low = 0,
+ .wakeup = 1,
+ }
+};
+
+static struct gpio_keys_platform_data button_data = {
+ .buttons = buttons,
+ .nbuttons = ARRAY_SIZE(buttons),
+};
+
+static struct platform_device button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &button_data,
+ }
+};
+
+static void __init gsia18s_add_device_buttons(void)
+{
+ at91_set_gpio_input(GPIO_TRIG_NET_IN, 1);
+ at91_set_deglitch(GPIO_TRIG_NET_IN, 1);
+ at91_set_gpio_input(GPIO_CARD_UNMOUNT_0, 1);
+ at91_set_deglitch(GPIO_CARD_UNMOUNT_0, 1);
+ at91_set_gpio_input(GPIO_CARD_UNMOUNT_1, 1);
+ at91_set_deglitch(GPIO_CARD_UNMOUNT_1, 1);
+ at91_set_gpio_input(GPIO_KEY_POWER, 0);
+ at91_set_deglitch(GPIO_KEY_POWER, 1);
+
+ platform_device_register(&button_device);
+}
+
+/*
+ * I2C
+ */
+static int pcf8574x_0x20_setup(struct i2c_client *client, int gpio,
+ unsigned int ngpio, void *context)
+{
+ int status;
+
+ status = gpio_request(gpio + PCF_GPIO_ETH_DETECT, "eth_det");
+ if (status < 0) {
+ pr_err("error: can't request GPIO%d\n",
+ gpio + PCF_GPIO_ETH_DETECT);
+ return status;
+ }
+ status = gpio_direction_input(gpio + PCF_GPIO_ETH_DETECT);
+ if (status < 0) {
+ pr_err("error: can't setup GPIO%d as input\n",
+ gpio + PCF_GPIO_ETH_DETECT);
+ return status;
+ }
+ status = gpio_export(gpio + PCF_GPIO_ETH_DETECT, false);
+ if (status < 0) {
+ pr_err("error: can't export GPIO%d\n",
+ gpio + PCF_GPIO_ETH_DETECT);
+ return status;
+ }
+ status = gpio_sysfs_set_active_low(gpio + PCF_GPIO_ETH_DETECT, 1);
+ if (status < 0) {
+ pr_err("error: gpio_sysfs_set active_low(GPIO%d, 1)\n",
+ gpio + PCF_GPIO_ETH_DETECT);
+ return status;
+ }
+
+ return 0;
+}
+
+static int pcf8574x_0x20_teardown(struct i2c_client *client, int gpio,
+ unsigned ngpio, void *context)
+{
+ gpio_free(gpio + PCF_GPIO_ETH_DETECT);
+ return 0;
+}
+
+static struct pcf857x_platform_data pcf20_pdata = {
+ .gpio_base = GS_IA18_S_PCF_GPIO_BASE0,
+ .n_latch = (1 << 4),
+ .setup = pcf8574x_0x20_setup,
+ .teardown = pcf8574x_0x20_teardown,
+};
+
+static struct pcf857x_platform_data pcf22_pdata = {
+ .gpio_base = GS_IA18_S_PCF_GPIO_BASE1,
+};
+
+static struct pcf857x_platform_data pcf24_pdata = {
+ .gpio_base = GS_IA18_S_PCF_GPIO_BASE2,
+};
+
+static struct i2c_board_info __initdata gsia18s_i2c_devices[] = {
+ { /* U1 on the GS_IA18-CB_V3 board */
+ I2C_BOARD_INFO("pcf8574", 0x20),
+ .platform_data = &pcf20_pdata,
+ },
+ { /* U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
+ I2C_BOARD_INFO("pcf8574", 0x22),
+ .platform_data = &pcf22_pdata,
+ },
+ { /* U1 on the GS_2G-OPT23-A_V0 board (Modem) */
+ I2C_BOARD_INFO("pcf8574", 0x24),
+ .platform_data = &pcf24_pdata,
+ },
+ { /* U161 on the GS_IA18_S-MN board */
+ I2C_BOARD_INFO("24c1024", 0x50),
+ },
+ { /* U162 on the GS_IA18_S-MN board */
+ I2C_BOARD_INFO("24c01", 0x53),
+ },
+};
+
+/*
+ * Compact Flash
+ */
+static struct at91_cf_data __initdata gsia18s_cf1_data = {
+ .irq_pin = AT91_PIN_PA27,
+ .det_pin = AT91_PIN_PB30,
+ .rst_pin = AT91_PIN_PB31,
+ .chipselect = 5,
+ .flags = AT91_CF_TRUE_IDE,
+};
+
+/* Power Off by RTC */
+static void gsia18s_power_off(void)
+{
+ pr_notice("Power supply will be switched off automatically now or after 60 seconds without ArmDAS.\n");
+ at91_set_gpio_output(AT91_PIN_PA25, 1);
+ /* Spin to death... */
+ while (1)
+ ;
+}
+
+static int __init gsia18s_power_off_init(void)
+{
+ pm_power_off = gsia18s_power_off;
+ return 0;
+}
+
+/* ---------------------------------------------------------------------------*/
+
+static void __init gsia18s_board_init(void)
+{
+ stamp9g20_board_init();
+ at91_add_device_usbh(&usbh_data);
+ at91_add_device_udc(&udc_data);
+ at91_add_device_eth(&macb_data);
+ gsia18s_leds_init();
+ gsia18s_pcf_leds_init();
+ gsia18s_add_device_buttons();
+ at91_add_device_i2c(gsia18s_i2c_devices,
+ ARRAY_SIZE(gsia18s_i2c_devices));
+ at91_add_device_cf(&gsia18s_cf1_data);
+ at91_add_device_spi(gsia18s_spi_devices,
+ ARRAY_SIZE(gsia18s_spi_devices));
+ gsia18s_power_off_init();
+}
+
+MACHINE_START(GSIA18S, "GS_IA18_S")
+ .boot_params = AT91_SDRAM_BASE + 0x100,
+ .timer = &at91sam926x_timer,
+ .map_io = gsia18s_map_io,
+ .init_irq = init_irq,
+ .init_machine = gsia18s_board_init,
+MACHINE_END
diff --git a/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c b/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c
index 86ff4b52db32..6c999dbd2bcf 100644
--- a/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -37,7 +37,6 @@
#include
#include
-#include
#include
#include
#include
diff --git a/trunk/arch/arm/mach-at91/gpio.c b/trunk/arch/arm/mach-at91/gpio.c
index ae4772e744ac..af818a21587c 100644
--- a/trunk/arch/arm/mach-at91/gpio.c
+++ b/trunk/arch/arm/mach-at91/gpio.c
@@ -274,10 +274,10 @@ EXPORT_SYMBOL(at91_get_gpio_value);
static u32 wakeups[MAX_GPIO_BANKS];
static u32 backups[MAX_GPIO_BANKS];
-static int gpio_irq_set_wake(unsigned pin, unsigned state)
+static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
{
- unsigned mask = pin_to_mask(pin);
- unsigned bank = (pin - PIN_BASE) / 32;
+ unsigned mask = pin_to_mask(d->irq);
+ unsigned bank = (d->irq - PIN_BASE) / 32;
if (unlikely(bank >= MAX_GPIO_BANKS))
return -EINVAL;
@@ -344,25 +344,25 @@ void at91_gpio_resume(void)
* IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering.
*/
-static void gpio_irq_mask(unsigned pin)
+static void gpio_irq_mask(struct irq_data *d)
{
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
+ void __iomem *pio = pin_to_controller(d->irq);
+ unsigned mask = pin_to_mask(d->irq);
if (pio)
__raw_writel(mask, pio + PIO_IDR);
}
-static void gpio_irq_unmask(unsigned pin)
+static void gpio_irq_unmask(struct irq_data *d)
{
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
+ void __iomem *pio = pin_to_controller(d->irq);
+ unsigned mask = pin_to_mask(d->irq);
if (pio)
__raw_writel(mask, pio + PIO_IER);
}
-static int gpio_irq_type(unsigned pin, unsigned type)
+static int gpio_irq_type(struct irq_data *d, unsigned type)
{
switch (type) {
case IRQ_TYPE_NONE:
@@ -375,10 +375,10 @@ static int gpio_irq_type(unsigned pin, unsigned type)
static struct irq_chip gpio_irqchip = {
.name = "GPIO",
- .mask = gpio_irq_mask,
- .unmask = gpio_irq_unmask,
- .set_type = gpio_irq_type,
- .set_wake = gpio_irq_set_wake,
+ .irq_mask = gpio_irq_mask,
+ .irq_unmask = gpio_irq_unmask,
+ .irq_set_type = gpio_irq_type,
+ .irq_set_wake = gpio_irq_set_wake,
};
static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
@@ -393,7 +393,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
pio = at91_gpio->regbase;
/* temporarily mask (level sensitive) parent IRQ */
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
for (;;) {
/* Reading ISR acks pending (edge triggered) GPIO interrupts.
* When there none are pending, we're finished unless we need
@@ -419,7 +419,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
* another IRQ must be generated before it actually gets
* here to be disabled on the GPIO controller.
*/
- gpio_irq_mask(pin);
+ gpio_irq_mask(irq_get_irq_data(pin));
}
else
generic_handle_irq(pin);
@@ -429,7 +429,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
isr >>= 1;
}
}
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
/* now it may re-trigger */
}
diff --git a/trunk/arch/arm/mach-at91/include/mach/gsia18s.h b/trunk/arch/arm/mach-at91/include/mach/gsia18s.h
new file mode 100644
index 000000000000..307c194926f9
--- /dev/null
+++ b/trunk/arch/arm/mach-at91/include/mach/gsia18s.h
@@ -0,0 +1,33 @@
+/* Buttons */
+#define GPIO_TRIG_NET_IN AT91_PIN_PB21
+#define GPIO_CARD_UNMOUNT_0 AT91_PIN_PB13
+#define GPIO_CARD_UNMOUNT_1 AT91_PIN_PB12
+#define GPIO_KEY_POWER AT91_PIN_PA25
+
+/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */
+#define GS_IA18_S_PCF_GPIO_BASE0 NR_BUILTIN_GPIO
+#define PCF_GPIO_HDC_POWER (GS_IA18_S_PCF_GPIO_BASE0 + 0)
+#define PCF_GPIO_WIFI_SETUP (GS_IA18_S_PCF_GPIO_BASE0 + 1)
+#define PCF_GPIO_WIFI_ENABLE (GS_IA18_S_PCF_GPIO_BASE0 + 2)
+#define PCF_GPIO_WIFI_RESET (GS_IA18_S_PCF_GPIO_BASE0 + 3)
+#define PCF_GPIO_ETH_DETECT 4 /* this is a GPI */
+#define PCF_GPIO_GPS_SETUP (GS_IA18_S_PCF_GPIO_BASE0 + 5)
+#define PCF_GPIO_GPS_STANDBY (GS_IA18_S_PCF_GPIO_BASE0 + 6)
+#define PCF_GPIO_GPS_POWER (GS_IA18_S_PCF_GPIO_BASE0 + 7)
+
+/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
+#define GS_IA18_S_PCF_GPIO_BASE1 (GS_IA18_S_PCF_GPIO_BASE0 + 8)
+#define PCF_GPIO_ALARM1 (GS_IA18_S_PCF_GPIO_BASE1 + 0)
+#define PCF_GPIO_ALARM2 (GS_IA18_S_PCF_GPIO_BASE1 + 1)
+#define PCF_GPIO_ALARM3 (GS_IA18_S_PCF_GPIO_BASE1 + 2)
+#define PCF_GPIO_ALARM4 (GS_IA18_S_PCF_GPIO_BASE1 + 3)
+/* bits 4, 5, 6 not used */
+#define PCF_GPIO_ALARM_V_RELAY_ON (GS_IA18_S_PCF_GPIO_BASE1 + 7)
+
+/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */
+#define GS_IA18_S_PCF_GPIO_BASE2 (GS_IA18_S_PCF_GPIO_BASE1 + 8)
+#define PCF_GPIO_MODEM_POWER (GS_IA18_S_PCF_GPIO_BASE2 + 0)
+#define PCF_GPIO_MODEM_RESET (GS_IA18_S_PCF_GPIO_BASE2 + 3)
+/* bits 1, 2, 4, 5 not used */
+#define PCF_GPIO_TRX_RESET (GS_IA18_S_PCF_GPIO_BASE2 + 6)
+/* bit 7 not used */
diff --git a/trunk/arch/arm/mach-at91/irq.c b/trunk/arch/arm/mach-at91/irq.c
index da3494a53423..b56d6b3a4087 100644
--- a/trunk/arch/arm/mach-at91/irq.c
+++ b/trunk/arch/arm/mach-at91/irq.c
@@ -34,23 +34,23 @@
#include
-static void at91_aic_mask_irq(unsigned int irq)
+static void at91_aic_mask_irq(struct irq_data *d)
{
/* Disable interrupt on AIC */
- at91_sys_write(AT91_AIC_IDCR, 1 << irq);
+ at91_sys_write(AT91_AIC_IDCR, 1 << d->irq);
}
-static void at91_aic_unmask_irq(unsigned int irq)
+static void at91_aic_unmask_irq(struct irq_data *d)
{
/* Enable interrupt on AIC */
- at91_sys_write(AT91_AIC_IECR, 1 << irq);
+ at91_sys_write(AT91_AIC_IECR, 1 << d->irq);
}
unsigned int at91_extern_irq;
#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
-static int at91_aic_set_type(unsigned irq, unsigned type)
+static int at91_aic_set_type(struct irq_data *d, unsigned type)
{
unsigned int smr, srctype;
@@ -62,13 +62,13 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
srctype = AT91_AIC_SRCTYPE_RISING;
break;
case IRQ_TYPE_LEVEL_LOW:
- if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
+ if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq)) /* only supported on external interrupts */
srctype = AT91_AIC_SRCTYPE_LOW;
else
return -EINVAL;
break;
case IRQ_TYPE_EDGE_FALLING:
- if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
+ if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq)) /* only supported on external interrupts */
srctype = AT91_AIC_SRCTYPE_FALLING;
else
return -EINVAL;
@@ -77,8 +77,8 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
return -EINVAL;
}
- smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE;
- at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
+ smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
+ at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype);
return 0;
}
@@ -87,15 +87,15 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
static u32 wakeups;
static u32 backups;
-static int at91_aic_set_wake(unsigned irq, unsigned value)
+static int at91_aic_set_wake(struct irq_data *d, unsigned value)
{
- if (unlikely(irq >= 32))
+ if (unlikely(d->irq >= 32))
return -EINVAL;
if (value)
- wakeups |= (1 << irq);
+ wakeups |= (1 << d->irq);
else
- wakeups &= ~(1 << irq);
+ wakeups &= ~(1 << d->irq);
return 0;
}
@@ -119,11 +119,11 @@ void at91_irq_resume(void)
static struct irq_chip at91_aic_chip = {
.name = "AIC",
- .ack = at91_aic_mask_irq,
- .mask = at91_aic_mask_irq,
- .unmask = at91_aic_unmask_irq,
- .set_type = at91_aic_set_type,
- .set_wake = at91_aic_set_wake,
+ .irq_ack = at91_aic_mask_irq,
+ .irq_mask = at91_aic_mask_irq,
+ .irq_unmask = at91_aic_unmask_irq,
+ .irq_set_type = at91_aic_set_type,
+ .irq_set_wake = at91_aic_set_wake,
};
/*
diff --git a/trunk/arch/arm/mach-bcmring/irq.c b/trunk/arch/arm/mach-bcmring/irq.c
index e3152631eb37..84dcda0d1d9a 100644
--- a/trunk/arch/arm/mach-bcmring/irq.c
+++ b/trunk/arch/arm/mach-bcmring/irq.c
@@ -30,61 +30,61 @@
#include
#include
-static void bcmring_mask_irq0(unsigned int irq)
+static void bcmring_mask_irq0(struct irq_data *d)
{
- writel(1 << (irq - IRQ_INTC0_START),
+ writel(1 << (d->irq - IRQ_INTC0_START),
MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
}
-static void bcmring_unmask_irq0(unsigned int irq)
+static void bcmring_unmask_irq0(struct irq_data *d)
{
- writel(1 << (irq - IRQ_INTC0_START),
+ writel(1 << (d->irq - IRQ_INTC0_START),
MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
}
-static void bcmring_mask_irq1(unsigned int irq)
+static void bcmring_mask_irq1(struct irq_data *d)
{
- writel(1 << (irq - IRQ_INTC1_START),
+ writel(1 << (d->irq - IRQ_INTC1_START),
MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
}
-static void bcmring_unmask_irq1(unsigned int irq)
+static void bcmring_unmask_irq1(struct irq_data *d)
{
- writel(1 << (irq - IRQ_INTC1_START),
+ writel(1 << (d->irq - IRQ_INTC1_START),
MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
}
-static void bcmring_mask_irq2(unsigned int irq)
+static void bcmring_mask_irq2(struct irq_data *d)
{
- writel(1 << (irq - IRQ_SINTC_START),
+ writel(1 << (d->irq - IRQ_SINTC_START),
MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
}
-static void bcmring_unmask_irq2(unsigned int irq)
+static void bcmring_unmask_irq2(struct irq_data *d)
{
- writel(1 << (irq - IRQ_SINTC_START),
+ writel(1 << (d->irq - IRQ_SINTC_START),
MM_IO_BASE_SINTC + INTCHW_INTENABLE);
}
static struct irq_chip bcmring_irq0_chip = {
.name = "ARM-INTC0",
- .ack = bcmring_mask_irq0,
- .mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */
- .unmask = bcmring_unmask_irq0, /* unmaks an interrupt */
+ .irq_ack = bcmring_mask_irq0,
+ .irq_mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */
+ .irq_unmask = bcmring_unmask_irq0, /* unmaks an interrupt */
};
static struct irq_chip bcmring_irq1_chip = {
.name = "ARM-INTC1",
- .ack = bcmring_mask_irq1,
- .mask = bcmring_mask_irq1,
- .unmask = bcmring_unmask_irq1,
+ .irq_ack = bcmring_mask_irq1,
+ .irq_mask = bcmring_mask_irq1,
+ .irq_unmask = bcmring_unmask_irq1,
};
static struct irq_chip bcmring_irq2_chip = {
.name = "ARM-SINTC",
- .ack = bcmring_mask_irq2,
- .mask = bcmring_mask_irq2,
- .unmask = bcmring_unmask_irq2,
+ .irq_ack = bcmring_mask_irq2,
+ .irq_mask = bcmring_mask_irq2,
+ .irq_unmask = bcmring_unmask_irq2,
};
static void vic_init(void __iomem *base, struct irq_chip *chip,
diff --git a/trunk/arch/arm/mach-clps711x/irq.c b/trunk/arch/arm/mach-clps711x/irq.c
index 9a12d8562284..86da7a1b2bbe 100644
--- a/trunk/arch/arm/mach-clps711x/irq.c
+++ b/trunk/arch/arm/mach-clps711x/irq.c
@@ -27,24 +27,24 @@
#include
-static void int1_mask(unsigned int irq)
+static void int1_mask(struct irq_data *d)
{
u32 intmr1;
intmr1 = clps_readl(INTMR1);
- intmr1 &= ~(1 << irq);
+ intmr1 &= ~(1 << d->irq);
clps_writel(intmr1, INTMR1);
}
-static void int1_ack(unsigned int irq)
+static void int1_ack(struct irq_data *d)
{
u32 intmr1;
intmr1 = clps_readl(INTMR1);
- intmr1 &= ~(1 << irq);
+ intmr1 &= ~(1 << d->irq);
clps_writel(intmr1, INTMR1);
- switch (irq) {
+ switch (d->irq) {
case IRQ_CSINT: clps_writel(0, COEOI); break;
case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
case IRQ_TC2OI: clps_writel(0, TC2EOI); break;
@@ -54,56 +54,56 @@ static void int1_ack(unsigned int irq)
}
}
-static void int1_unmask(unsigned int irq)
+static void int1_unmask(struct irq_data *d)
{
u32 intmr1;
intmr1 = clps_readl(INTMR1);
- intmr1 |= 1 << irq;
+ intmr1 |= 1 << d->irq;
clps_writel(intmr1, INTMR1);
}
static struct irq_chip int1_chip = {
- .ack = int1_ack,
- .mask = int1_mask,
- .unmask = int1_unmask,
+ .irq_ack = int1_ack,
+ .irq_mask = int1_mask,
+ .irq_unmask = int1_unmask,
};
-static void int2_mask(unsigned int irq)
+static void int2_mask(struct irq_data *d)
{
u32 intmr2;
intmr2 = clps_readl(INTMR2);
- intmr2 &= ~(1 << (irq - 16));
+ intmr2 &= ~(1 << (d->irq - 16));
clps_writel(intmr2, INTMR2);
}
-static void int2_ack(unsigned int irq)
+static void int2_ack(struct irq_data *d)
{
u32 intmr2;
intmr2 = clps_readl(INTMR2);
- intmr2 &= ~(1 << (irq - 16));
+ intmr2 &= ~(1 << (d->irq - 16));
clps_writel(intmr2, INTMR2);
- switch (irq) {
+ switch (d->irq) {
case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
}
}
-static void int2_unmask(unsigned int irq)
+static void int2_unmask(struct irq_data *d)
{
u32 intmr2;
intmr2 = clps_readl(INTMR2);
- intmr2 |= 1 << (irq - 16);
+ intmr2 |= 1 << (d->irq - 16);
clps_writel(intmr2, INTMR2);
}
static struct irq_chip int2_chip = {
- .ack = int2_ack,
- .mask = int2_mask,
- .unmask = int2_unmask,
+ .irq_ack = int2_ack,
+ .irq_mask = int2_mask,
+ .irq_unmask = int2_unmask,
};
void __init clps711x_init_irq(void)
diff --git a/trunk/arch/arm/mach-davinci/cp_intc.c b/trunk/arch/arm/mach-davinci/cp_intc.c
index bb4c40ecb803..9abc80a86a22 100644
--- a/trunk/arch/arm/mach-davinci/cp_intc.c
+++ b/trunk/arch/arm/mach-davinci/cp_intc.c
@@ -26,30 +26,30 @@ static inline void cp_intc_write(unsigned long value, unsigned offset)
__raw_writel(value, davinci_intc_base + offset);
}
-static void cp_intc_ack_irq(unsigned int irq)
+static void cp_intc_ack_irq(struct irq_data *d)
{
- cp_intc_write(irq, CP_INTC_SYS_STAT_IDX_CLR);
+ cp_intc_write(d->irq, CP_INTC_SYS_STAT_IDX_CLR);
}
/* Disable interrupt */
-static void cp_intc_mask_irq(unsigned int irq)
+static void cp_intc_mask_irq(struct irq_data *d)
{
/* XXX don't know why we need to disable nIRQ here... */
cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
- cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_CLR);
+ cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_CLR);
cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
}
/* Enable interrupt */
-static void cp_intc_unmask_irq(unsigned int irq)
+static void cp_intc_unmask_irq(struct irq_data *d)
{
- cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_SET);
+ cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_SET);
}
-static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type)
+static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
{
- unsigned reg = BIT_WORD(irq);
- unsigned mask = BIT_MASK(irq);
+ unsigned reg = BIT_WORD(d->irq);
+ unsigned mask = BIT_MASK(d->irq);
unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg));
unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg));
@@ -85,18 +85,18 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type)
* generic drivers which call {enable|disable}_irq_wake for
* wake up interrupt sources (eg RTC on DA850).
*/
-static int cp_intc_set_wake(unsigned int irq, unsigned int on)
+static int cp_intc_set_wake(struct irq_data *d, unsigned int on)
{
return 0;
}
static struct irq_chip cp_intc_irq_chip = {
.name = "cp_intc",
- .ack = cp_intc_ack_irq,
- .mask = cp_intc_mask_irq,
- .unmask = cp_intc_unmask_irq,
- .set_type = cp_intc_set_irq_type,
- .set_wake = cp_intc_set_wake,
+ .irq_ack = cp_intc_ack_irq,
+ .irq_mask = cp_intc_mask_irq,
+ .irq_unmask = cp_intc_unmask_irq,
+ .irq_set_type = cp_intc_set_irq_type,
+ .irq_set_wake = cp_intc_set_wake,
};
void __init cp_intc_init(void)
diff --git a/trunk/arch/arm/mach-davinci/gpio.c b/trunk/arch/arm/mach-davinci/gpio.c
index bf0ff587e46a..20d66e5e4663 100644
--- a/trunk/arch/arm/mach-davinci/gpio.c
+++ b/trunk/arch/arm/mach-davinci/gpio.c
@@ -205,20 +205,20 @@ pure_initcall(davinci_gpio_setup);
* serve as EDMA event triggers.
*/
-static void gpio_irq_disable(unsigned irq)
+static void gpio_irq_disable(struct irq_data *d)
{
- struct davinci_gpio_regs __iomem *g = irq2regs(irq);
- u32 mask = (u32) get_irq_data(irq);
+ struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
+ u32 mask = (u32) irq_data_get_irq_data(d);
__raw_writel(mask, &g->clr_falling);
__raw_writel(mask, &g->clr_rising);
}
-static void gpio_irq_enable(unsigned irq)
+static void gpio_irq_enable(struct irq_data *d)
{
- struct davinci_gpio_regs __iomem *g = irq2regs(irq);
- u32 mask = (u32) get_irq_data(irq);
- unsigned status = irq_desc[irq].status;
+ struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
+ u32 mask = (u32) irq_data_get_irq_data(d);
+ unsigned status = irq_desc[d->irq].status;
status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
if (!status)
@@ -230,19 +230,19 @@ static void gpio_irq_enable(unsigned irq)
__raw_writel(mask, &g->set_rising);
}
-static int gpio_irq_type(unsigned irq, unsigned trigger)
+static int gpio_irq_type(struct irq_data *d, unsigned trigger)
{
- struct davinci_gpio_regs __iomem *g = irq2regs(irq);
- u32 mask = (u32) get_irq_data(irq);
+ struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
+ u32 mask = (u32) irq_data_get_irq_data(d);
if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
return -EINVAL;
- irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
- irq_desc[irq].status |= trigger;
+ irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK;
+ irq_desc[d->irq].status |= trigger;
/* don't enable the IRQ if it's currently disabled */
- if (irq_desc[irq].depth == 0) {
+ if (irq_desc[d->irq].depth == 0) {
__raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
? &g->set_falling : &g->clr_falling);
__raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
@@ -253,9 +253,9 @@ static int gpio_irq_type(unsigned irq, unsigned trigger)
static struct irq_chip gpio_irqchip = {
.name = "GPIO",
- .enable = gpio_irq_enable,
- .disable = gpio_irq_disable,
- .set_type = gpio_irq_type,
+ .irq_enable = gpio_irq_enable,
+ .irq_disable = gpio_irq_disable,
+ .irq_set_type = gpio_irq_type,
};
static void
@@ -269,8 +269,8 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
mask <<= 16;
/* temporarily mask (level sensitive) parent IRQ */
- desc->chip->mask(irq);
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_mask(&desc->irq_data);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
while (1) {
u32 status;
int n;
@@ -293,7 +293,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
status >>= res;
}
}
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
/* now it may re-trigger */
}
@@ -320,10 +320,10 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
return -ENODEV;
}
-static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger)
+static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger)
{
- struct davinci_gpio_regs __iomem *g = irq2regs(irq);
- u32 mask = (u32) get_irq_data(irq);
+ struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
+ u32 mask = (u32) irq_data_get_irq_data(d);
if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
return -EINVAL;
@@ -397,7 +397,7 @@ static int __init davinci_gpio_irq_setup(void)
irq = bank_irq;
gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq));
gpio_irqchip_unbanked.name = "GPIO-AINTC";
- gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked;
+ gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked;
/* default trigger: both edges */
g = gpio2regs(0);
diff --git a/trunk/arch/arm/mach-davinci/irq.c b/trunk/arch/arm/mach-davinci/irq.c
index 784ddf3c5ad4..5e05c9b64e1f 100644
--- a/trunk/arch/arm/mach-davinci/irq.c
+++ b/trunk/arch/arm/mach-davinci/irq.c
@@ -53,14 +53,14 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
}
/* Disable interrupt */
-static void davinci_mask_irq(unsigned int irq)
+static void davinci_mask_irq(struct irq_data *d)
{
unsigned int mask;
u32 l;
- mask = 1 << IRQ_BIT(irq);
+ mask = 1 << IRQ_BIT(d->irq);
- if (irq > 31) {
+ if (d->irq > 31) {
l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET);
l &= ~mask;
davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET);
@@ -72,14 +72,14 @@ static void davinci_mask_irq(unsigned int irq)
}
/* Enable interrupt */
-static void davinci_unmask_irq(unsigned int irq)
+static void davinci_unmask_irq(struct irq_data *d)
{
unsigned int mask;
u32 l;
- mask = 1 << IRQ_BIT(irq);
+ mask = 1 << IRQ_BIT(d->irq);
- if (irq > 31) {
+ if (d->irq > 31) {
l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET);
l |= mask;
davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET);
@@ -91,23 +91,23 @@ static void davinci_unmask_irq(unsigned int irq)
}
/* EOI interrupt */
-static void davinci_ack_irq(unsigned int irq)
+static void davinci_ack_irq(struct irq_data *d)
{
unsigned int mask;
- mask = 1 << IRQ_BIT(irq);
+ mask = 1 << IRQ_BIT(d->irq);
- if (irq > 31)
+ if (d->irq > 31)
davinci_irq_writel(mask, IRQ_REG1_OFFSET);
else
davinci_irq_writel(mask, IRQ_REG0_OFFSET);
}
static struct irq_chip davinci_irq_chip_0 = {
- .name = "AINTC",
- .ack = davinci_ack_irq,
- .mask = davinci_mask_irq,
- .unmask = davinci_unmask_irq,
+ .name = "AINTC",
+ .irq_ack = davinci_ack_irq,
+ .irq_mask = davinci_mask_irq,
+ .irq_unmask = davinci_unmask_irq,
};
/* ARM Interrupt Controller Initialization */
diff --git a/trunk/arch/arm/mach-dove/irq.c b/trunk/arch/arm/mach-dove/irq.c
index 61bfcb3b08c2..9317f0558b57 100644
--- a/trunk/arch/arm/mach-dove/irq.c
+++ b/trunk/arch/arm/mach-dove/irq.c
@@ -36,9 +36,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
}
}
-static void pmu_irq_mask(unsigned int irq)
+static void pmu_irq_mask(struct irq_data *d)
{
- int pin = irq_to_pmu(irq);
+ int pin = irq_to_pmu(d->irq);
u32 u;
u = readl(PMU_INTERRUPT_MASK);
@@ -46,9 +46,9 @@ static void pmu_irq_mask(unsigned int irq)
writel(u, PMU_INTERRUPT_MASK);
}
-static void pmu_irq_unmask(unsigned int irq)
+static void pmu_irq_unmask(struct irq_data *d)
{
- int pin = irq_to_pmu(irq);
+ int pin = irq_to_pmu(d->irq);
u32 u;
u = readl(PMU_INTERRUPT_MASK);
@@ -56,9 +56,9 @@ static void pmu_irq_unmask(unsigned int irq)
writel(u, PMU_INTERRUPT_MASK);
}
-static void pmu_irq_ack(unsigned int irq)
+static void pmu_irq_ack(struct irq_data *d)
{
- int pin = irq_to_pmu(irq);
+ int pin = irq_to_pmu(d->irq);
u32 u;
u = ~(1 << (pin & 31));
@@ -67,9 +67,9 @@ static void pmu_irq_ack(unsigned int irq)
static struct irq_chip pmu_irq_chip = {
.name = "pmu_irq",
- .mask = pmu_irq_mask,
- .unmask = pmu_irq_unmask,
- .ack = pmu_irq_ack,
+ .irq_mask = pmu_irq_mask,
+ .irq_unmask = pmu_irq_unmask,
+ .irq_ack = pmu_irq_ack,
};
static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
diff --git a/trunk/arch/arm/mach-ebsa110/core.c b/trunk/arch/arm/mach-ebsa110/core.c
index 5df4099fc14f..7df083f37fa7 100644
--- a/trunk/arch/arm/mach-ebsa110/core.c
+++ b/trunk/arch/arm/mach-ebsa110/core.c
@@ -35,20 +35,20 @@
#define IRQ_STAT 0xff000000 /* read */
#define IRQ_MCLR 0xff000000 /* write */
-static void ebsa110_mask_irq(unsigned int irq)
+static void ebsa110_mask_irq(struct irq_data *d)
{
- __raw_writeb(1 << irq, IRQ_MCLR);
+ __raw_writeb(1 << d->irq, IRQ_MCLR);
}
-static void ebsa110_unmask_irq(unsigned int irq)
+static void ebsa110_unmask_irq(struct irq_data *d)
{
- __raw_writeb(1 << irq, IRQ_MSET);
+ __raw_writeb(1 << d->irq, IRQ_MSET);
}
static struct irq_chip ebsa110_irq_chip = {
- .ack = ebsa110_mask_irq,
- .mask = ebsa110_mask_irq,
- .unmask = ebsa110_unmask_irq,
+ .irq_ack = ebsa110_mask_irq,
+ .irq_mask = ebsa110_mask_irq,
+ .irq_unmask = ebsa110_unmask_irq,
};
static void __init ebsa110_init_irq(void)
diff --git a/trunk/arch/arm/mach-ep93xx/gpio.c b/trunk/arch/arm/mach-ep93xx/gpio.c
index cf547ad7ebd4..f3dc76fdcea8 100644
--- a/trunk/arch/arm/mach-ep93xx/gpio.c
+++ b/trunk/arch/arm/mach-ep93xx/gpio.c
@@ -112,13 +112,13 @@ static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
generic_handle_irq(gpio_irq);
}
-static void ep93xx_gpio_irq_ack(unsigned int irq)
+static void ep93xx_gpio_irq_ack(struct irq_data *d)
{
- int line = irq_to_gpio(irq);
+ int line = irq_to_gpio(d->irq);
int port = line >> 3;
int port_mask = 1 << (line & 7);
- if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
+ if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
gpio_int_type2[port] ^= port_mask; /* switch edge direction */
ep93xx_gpio_update_int_params(port);
}
@@ -126,13 +126,13 @@ static void ep93xx_gpio_irq_ack(unsigned int irq)
__raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
}
-static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
+static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
{
- int line = irq_to_gpio(irq);
+ int line = irq_to_gpio(d->irq);
int port = line >> 3;
int port_mask = 1 << (line & 7);
- if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
+ if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
gpio_int_type2[port] ^= port_mask; /* switch edge direction */
gpio_int_unmasked[port] &= ~port_mask;
@@ -141,18 +141,18 @@ static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
__raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
}
-static void ep93xx_gpio_irq_mask(unsigned int irq)
+static void ep93xx_gpio_irq_mask(struct irq_data *d)
{
- int line = irq_to_gpio(irq);
+ int line = irq_to_gpio(d->irq);
int port = line >> 3;
gpio_int_unmasked[port] &= ~(1 << (line & 7));
ep93xx_gpio_update_int_params(port);
}
-static void ep93xx_gpio_irq_unmask(unsigned int irq)
+static void ep93xx_gpio_irq_unmask(struct irq_data *d)
{
- int line = irq_to_gpio(irq);
+ int line = irq_to_gpio(d->irq);
int port = line >> 3;
gpio_int_unmasked[port] |= 1 << (line & 7);
@@ -164,10 +164,10 @@ static void ep93xx_gpio_irq_unmask(unsigned int irq)
* edge (1) triggered, while gpio_int_type2 controls whether it
* triggers on low/falling (0) or high/rising (1).
*/
-static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
+static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
{
- struct irq_desc *desc = irq_desc + irq;
- const int gpio = irq_to_gpio(irq);
+ struct irq_desc *desc = irq_desc + d->irq;
+ const int gpio = irq_to_gpio(d->irq);
const int port = gpio >> 3;
const int port_mask = 1 << (gpio & 7);
@@ -220,11 +220,11 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
static struct irq_chip ep93xx_gpio_irq_chip = {
.name = "GPIO",
- .ack = ep93xx_gpio_irq_ack,
- .mask_ack = ep93xx_gpio_irq_mask_ack,
- .mask = ep93xx_gpio_irq_mask,
- .unmask = ep93xx_gpio_irq_unmask,
- .set_type = ep93xx_gpio_irq_type,
+ .irq_ack = ep93xx_gpio_irq_ack,
+ .irq_mask_ack = ep93xx_gpio_irq_mask_ack,
+ .irq_mask = ep93xx_gpio_irq_mask,
+ .irq_unmask = ep93xx_gpio_irq_unmask,
+ .irq_set_type = ep93xx_gpio_irq_type,
};
void __init ep93xx_gpio_init_irq(void)
diff --git a/trunk/arch/arm/mach-footbridge/common.c b/trunk/arch/arm/mach-footbridge/common.c
index 88b3dd89be89..84c5f258f2d8 100644
--- a/trunk/arch/arm/mach-footbridge/common.c
+++ b/trunk/arch/arm/mach-footbridge/common.c
@@ -75,20 +75,20 @@ static const int fb_irq_mask[] = {
IRQ_MASK_PCI_PERR, /* 19 */
};
-static void fb_mask_irq(unsigned int irq)
+static void fb_mask_irq(struct irq_data *d)
{
- *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
+ *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(d->irq)];
}
-static void fb_unmask_irq(unsigned int irq)
+static void fb_unmask_irq(struct irq_data *d)
{
- *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
+ *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(d->irq)];
}
static struct irq_chip fb_chip = {
- .ack = fb_mask_irq,
- .mask = fb_mask_irq,
- .unmask = fb_unmask_irq,
+ .irq_ack = fb_mask_irq,
+ .irq_mask = fb_mask_irq,
+ .irq_unmask = fb_unmask_irq,
};
static void __init __fb_init_irq(void)
diff --git a/trunk/arch/arm/mach-footbridge/isa-irq.c b/trunk/arch/arm/mach-footbridge/isa-irq.c
index 8bfd06aeb64d..de7a5cb5dbe1 100644
--- a/trunk/arch/arm/mach-footbridge/isa-irq.c
+++ b/trunk/arch/arm/mach-footbridge/isa-irq.c
@@ -30,61 +30,61 @@
#include "common.h"
-static void isa_mask_pic_lo_irq(unsigned int irq)
+static void isa_mask_pic_lo_irq(struct irq_data *d)
{
- unsigned int mask = 1 << (irq & 7);
+ unsigned int mask = 1 << (d->irq & 7);
outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
}
-static void isa_ack_pic_lo_irq(unsigned int irq)
+static void isa_ack_pic_lo_irq(struct irq_data *d)
{
- unsigned int mask = 1 << (irq & 7);
+ unsigned int mask = 1 << (d->irq & 7);
outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
outb(0x20, PIC_LO);
}
-static void isa_unmask_pic_lo_irq(unsigned int irq)
+static void isa_unmask_pic_lo_irq(struct irq_data *d)
{
- unsigned int mask = 1 << (irq & 7);
+ unsigned int mask = 1 << (d->irq & 7);
outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO);
}
static struct irq_chip isa_lo_chip = {
- .ack = isa_ack_pic_lo_irq,
- .mask = isa_mask_pic_lo_irq,
- .unmask = isa_unmask_pic_lo_irq,
+ .irq_ack = isa_ack_pic_lo_irq,
+ .irq_mask = isa_mask_pic_lo_irq,
+ .irq_unmask = isa_unmask_pic_lo_irq,
};
-static void isa_mask_pic_hi_irq(unsigned int irq)
+static void isa_mask_pic_hi_irq(struct irq_data *d)
{
- unsigned int mask = 1 << (irq & 7);
+ unsigned int mask = 1 << (d->irq & 7);
outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
}
-static void isa_ack_pic_hi_irq(unsigned int irq)
+static void isa_ack_pic_hi_irq(struct irq_data *d)
{
- unsigned int mask = 1 << (irq & 7);
+ unsigned int mask = 1 << (d->irq & 7);
outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
outb(0x62, PIC_LO);
outb(0x20, PIC_HI);
}
-static void isa_unmask_pic_hi_irq(unsigned int irq)
+static void isa_unmask_pic_hi_irq(struct irq_data *d)
{
- unsigned int mask = 1 << (irq & 7);
+ unsigned int mask = 1 << (d->irq & 7);
outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI);
}
static struct irq_chip isa_hi_chip = {
- .ack = isa_ack_pic_hi_irq,
- .mask = isa_mask_pic_hi_irq,
- .unmask = isa_unmask_pic_hi_irq,
+ .irq_ack = isa_ack_pic_hi_irq,
+ .irq_mask = isa_mask_pic_hi_irq,
+ .irq_unmask = isa_unmask_pic_hi_irq,
};
static void
diff --git a/trunk/arch/arm/mach-gemini/gpio.c b/trunk/arch/arm/mach-gemini/gpio.c
index fe3bd5ac8b10..fa3d333f21e1 100644
--- a/trunk/arch/arm/mach-gemini/gpio.c
+++ b/trunk/arch/arm/mach-gemini/gpio.c
@@ -54,33 +54,33 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index,
__raw_writel(reg, base + GPIO_INT_EN);
}
-static void gpio_ack_irq(unsigned int irq)
+static void gpio_ack_irq(struct irq_data *d)
{
- unsigned int gpio = irq_to_gpio(irq);
+ unsigned int gpio = irq_to_gpio(d->irq);
unsigned int base = GPIO_BASE(gpio / 32);
__raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR);
}
-static void gpio_mask_irq(unsigned int irq)
+static void gpio_mask_irq(struct irq_data *d)
{
- unsigned int gpio = irq_to_gpio(irq);
+ unsigned int gpio = irq_to_gpio(d->irq);
unsigned int base = GPIO_BASE(gpio / 32);
_set_gpio_irqenable(base, gpio % 32, 0);
}
-static void gpio_unmask_irq(unsigned int irq)
+static void gpio_unmask_irq(struct irq_data *d)
{
- unsigned int gpio = irq_to_gpio(irq);
+ unsigned int gpio = irq_to_gpio(d->irq);
unsigned int base = GPIO_BASE(gpio / 32);
_set_gpio_irqenable(base, gpio % 32, 1);
}
-static int gpio_set_irq_type(unsigned int irq, unsigned int type)
+static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
{
- unsigned int gpio = irq_to_gpio(irq);
+ unsigned int gpio = irq_to_gpio(d->irq);
unsigned int gpio_mask = 1 << (gpio % 32);
unsigned int base = GPIO_BASE(gpio / 32);
unsigned int reg_both, reg_level, reg_type;
@@ -120,7 +120,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
__raw_writel(reg_level, base + GPIO_INT_LEVEL);
__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
- gpio_ack_irq(irq);
+ gpio_ack_irq(d->irq);
return 0;
}
@@ -146,10 +146,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
static struct irq_chip gpio_irq_chip = {
.name = "GPIO",
- .ack = gpio_ack_irq,
- .mask = gpio_mask_irq,
- .unmask = gpio_unmask_irq,
- .set_type = gpio_set_irq_type,
+ .irq_ack = gpio_ack_irq,
+ .irq_mask = gpio_mask_irq,
+ .irq_unmask = gpio_unmask_irq,
+ .irq_set_type = gpio_set_irq_type,
};
static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,
diff --git a/trunk/arch/arm/mach-gemini/irq.c b/trunk/arch/arm/mach-gemini/irq.c
index 9e613ca8120d..96bc227dd849 100644
--- a/trunk/arch/arm/mach-gemini/irq.c
+++ b/trunk/arch/arm/mach-gemini/irq.c
@@ -32,34 +32,34 @@
#define FIQ_LEVEL(base_addr) (base_addr + 0x30)
#define FIQ_STATUS(base_addr) (base_addr + 0x34)
-static void gemini_ack_irq(unsigned int irq)
+static void gemini_ack_irq(struct irq_data *d)
{
- __raw_writel(1 << irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
+ __raw_writel(1 << d->irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
}
-static void gemini_mask_irq(unsigned int irq)
+static void gemini_mask_irq(struct irq_data *d)
{
unsigned int mask;
mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
- mask &= ~(1 << irq);
+ mask &= ~(1 << d->irq);
__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
}
-static void gemini_unmask_irq(unsigned int irq)
+static void gemini_unmask_irq(struct irq_data *d)
{
unsigned int mask;
mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
- mask |= (1 << irq);
+ mask |= (1 << d->irq);
__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
}
static struct irq_chip gemini_irq_chip = {
- .name = "INTC",
- .ack = gemini_ack_irq,
- .mask = gemini_mask_irq,
- .unmask = gemini_unmask_irq,
+ .name = "INTC",
+ .irq_ack = gemini_ack_irq,
+ .irq_mask = gemini_mask_irq,
+ .irq_unmask = gemini_unmask_irq,
};
static struct resource irq_resource = {
diff --git a/trunk/arch/arm/mach-h720x/common.c b/trunk/arch/arm/mach-h720x/common.c
index bdb3f6706801..1f28c90932c7 100644
--- a/trunk/arch/arm/mach-h720x/common.c
+++ b/trunk/arch/arm/mach-h720x/common.c
@@ -52,17 +52,17 @@ unsigned long h720x_gettimeoffset(void)
/*
* mask Global irq's
*/
-static void mask_global_irq (unsigned int irq )
+static void mask_global_irq(struct irq_data *d)
{
- CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << irq);
+ CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << d->irq);
}
/*
* unmask Global irq's
*/
-static void unmask_global_irq (unsigned int irq )
+static void unmask_global_irq(struct irq_data *d)
{
- CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << irq);
+ CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << d->irq);
}
@@ -70,10 +70,10 @@ static void unmask_global_irq (unsigned int irq )
* ack GPIO irq's
* Ack only for edge triggered int's valid
*/
-static void inline ack_gpio_irq(u32 irq)
+static void inline ack_gpio_irq(struct irq_data *d)
{
- u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
- u32 bit = IRQ_TO_BIT(irq);
+ u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq));
+ u32 bit = IRQ_TO_BIT(d->irq);
if ( (CPU_REG (reg_base, GPIO_EDGE) & bit))
CPU_REG (reg_base, GPIO_CLR) = bit;
}
@@ -81,20 +81,20 @@ static void inline ack_gpio_irq(u32 irq)
/*
* mask GPIO irq's
*/
-static void inline mask_gpio_irq(u32 irq)
+static void inline mask_gpio_irq(struct irq_data *d)
{
- u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
- u32 bit = IRQ_TO_BIT(irq);
+ u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq));
+ u32 bit = IRQ_TO_BIT(d->irq);
CPU_REG (reg_base, GPIO_MASK) &= ~bit;
}
/*
* unmask GPIO irq's
*/
-static void inline unmask_gpio_irq(u32 irq)
+static void inline unmask_gpio_irq(struct irq_data *d)
{
- u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
- u32 bit = IRQ_TO_BIT(irq);
+ u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq));
+ u32 bit = IRQ_TO_BIT(d->irq);
CPU_REG (reg_base, GPIO_MASK) |= bit;
}
@@ -170,15 +170,15 @@ h720x_gpioe_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
#endif
static struct irq_chip h720x_global_chip = {
- .ack = mask_global_irq,
- .mask = mask_global_irq,
- .unmask = unmask_global_irq,
+ .irq_ack = mask_global_irq,
+ .irq_mask = mask_global_irq,
+ .irq_unmask = unmask_global_irq,
};
static struct irq_chip h720x_gpio_chip = {
- .ack = ack_gpio_irq,
- .mask = mask_gpio_irq,
- .unmask = unmask_gpio_irq,
+ .irq_ack = ack_gpio_irq,
+ .irq_mask = mask_gpio_irq,
+ .irq_unmask = unmask_gpio_irq,
};
/*
diff --git a/trunk/arch/arm/mach-h720x/cpu-h7202.c b/trunk/arch/arm/mach-h720x/cpu-h7202.c
index fd33a19c813a..ac3f91442376 100644
--- a/trunk/arch/arm/mach-h720x/cpu-h7202.c
+++ b/trunk/arch/arm/mach-h720x/cpu-h7202.c
@@ -141,27 +141,27 @@ h7202_timer_interrupt(int irq, void *dev_id)
/*
* mask multiplexed timer IRQs
*/
-static void inline mask_timerx_irq (u32 irq)
+static void inline mask_timerx_irq(struct irq_data *d)
{
unsigned int bit;
- bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
+ bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1));
CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit;
}
/*
* unmask multiplexed timer IRQs
*/
-static void inline unmask_timerx_irq (u32 irq)
+static void inline unmask_timerx_irq(struct irq_data *d)
{
unsigned int bit;
- bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
+ bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1));
CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit;
}
static struct irq_chip h7202_timerx_chip = {
- .ack = mask_timerx_irq,
- .mask = mask_timerx_irq,
- .unmask = unmask_timerx_irq,
+ .irq_ack = mask_timerx_irq,
+ .irq_mask = mask_timerx_irq,
+ .irq_unmask = unmask_timerx_irq,
};
static struct irqaction h7202_timer_irq = {
diff --git a/trunk/arch/arm/mach-h720x/h7201-eval.c b/trunk/arch/arm/mach-h720x/h7201-eval.c
index 79f0b896e446..629454d71c8d 100644
--- a/trunk/arch/arm/mach-h720x/h7201-eval.c
+++ b/trunk/arch/arm/mach-h720x/h7201-eval.c
@@ -23,7 +23,6 @@
#include
#include
#include
-#include
#include
#include
#include "common.h"
diff --git a/trunk/arch/arm/mach-h720x/h7202-eval.c b/trunk/arch/arm/mach-h720x/h7202-eval.c
index cc28b1efe047..e9f46b696354 100644
--- a/trunk/arch/arm/mach-h720x/h7202-eval.c
+++ b/trunk/arch/arm/mach-h720x/h7202-eval.c
@@ -23,7 +23,6 @@
#include
#include
#include
-#include
#include
#include
#include
diff --git a/trunk/arch/arm/mach-imx/Kconfig b/trunk/arch/arm/mach-imx/Kconfig
index 17d2e608a214..56684b517070 100644
--- a/trunk/arch/arm/mach-imx/Kconfig
+++ b/trunk/arch/arm/mach-imx/Kconfig
@@ -243,6 +243,7 @@ config MACH_MX27_3DS
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_MMC
select IMX_HAVE_PLATFORM_SPI_IMX
+ select MXC_DEBUG_BOARD
select MXC_ULPI if USB_ULPI
help
Include support for MX27PDK platform. This includes specific
diff --git a/trunk/arch/arm/mach-imx/mach-mx27_3ds.c b/trunk/arch/arm/mach-imx/mach-mx27_3ds.c
index 6fd0f8f6deb6..164331518bdd 100644
--- a/trunk/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/trunk/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -37,12 +37,15 @@
#include
#include
#include
+#include
+#include
#include "devices-imx27.h"
#define SD1_EN_GPIO (GPIO_PORTB + 25)
#define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23)
#define SPI2_SS0 (GPIO_PORTD + 21)
+#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTC + 28)
static const int mx27pdk_pins[] __initconst = {
/* UART1 */
@@ -215,10 +218,10 @@ static struct regulator_init_data vgen_init = {
static struct mc13783_regulator_init_data mx27_3ds_regulators[] = {
{
- .id = MC13783_REGU_VMMC1,
+ .id = MC13783_REG_VMMC1,
.init_data = &vmmc1_init,
}, {
- .id = MC13783_REGU_VGEN,
+ .id = MC13783_REG_VGEN,
.init_data = &vgen_init,
},
};
@@ -276,6 +279,9 @@ static void __init mx27pdk_init(void)
imx27_add_spi_imx1(&spi2_pdata);
spi_register_board_info(mx27_3ds_spi_devs,
ARRAY_SIZE(mx27_3ds_spi_devs));
+
+ if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT))
+ pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
}
static void __init mx27pdk_timer_init(void)
diff --git a/trunk/arch/arm/mach-integrator/cpu.c b/trunk/arch/arm/mach-integrator/cpu.c
index a3fbcb3adc29..fbb457779895 100644
--- a/trunk/arch/arm/mach-integrator/cpu.c
+++ b/trunk/arch/arm/mach-integrator/cpu.c
@@ -173,7 +173,7 @@ static unsigned int integrator_get(unsigned int cpu)
if (machine_is_integrator()) {
vco.s = (cm_osc >> 8) & 7;
- } else if (machine_is_cintegrator()) {
+ } else {
vco.s = 1;
}
vco.v = cm_osc & 255;
diff --git a/trunk/arch/arm/mach-integrator/integrator_ap.c b/trunk/arch/arm/mach-integrator/integrator_ap.c
index 2774df8021dc..b666443b5cbb 100644
--- a/trunk/arch/arm/mach-integrator/integrator_ap.c
+++ b/trunk/arch/arm/mach-integrator/integrator_ap.c
@@ -156,21 +156,21 @@ static void __init ap_map_io(void)
#define INTEGRATOR_SC_VALID_INT 0x003fffff
-static void sc_mask_irq(unsigned int irq)
+static void sc_mask_irq(struct irq_data *d)
{
- writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_CLEAR);
+ writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_CLEAR);
}
-static void sc_unmask_irq(unsigned int irq)
+static void sc_unmask_irq(struct irq_data *d)
{
- writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET);
+ writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_SET);
}
static struct irq_chip sc_chip = {
- .name = "SC",
- .ack = sc_mask_irq,
- .mask = sc_mask_irq,
- .unmask = sc_unmask_irq,
+ .name = "SC",
+ .irq_ack = sc_mask_irq,
+ .irq_mask = sc_mask_irq,
+ .irq_unmask = sc_unmask_irq,
};
static void __init ap_init_irq(void)
diff --git a/trunk/arch/arm/mach-integrator/integrator_cp.c b/trunk/arch/arm/mach-integrator/integrator_cp.c
index 85e48a5f77b9..e9327da1382e 100644
--- a/trunk/arch/arm/mach-integrator/integrator_cp.c
+++ b/trunk/arch/arm/mach-integrator/integrator_cp.c
@@ -146,61 +146,61 @@ static void __init intcp_map_io(void)
#define sic_writel __raw_writel
#define sic_readl __raw_readl
-static void cic_mask_irq(unsigned int irq)
+static void cic_mask_irq(struct irq_data *d)
{
- irq -= IRQ_CIC_START;
+ unsigned int irq = d->irq - IRQ_CIC_START;
cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
}
-static void cic_unmask_irq(unsigned int irq)
+static void cic_unmask_irq(struct irq_data *d)
{
- irq -= IRQ_CIC_START;
+ unsigned int irq = d->irq - IRQ_CIC_START;
cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET);
}
static struct irq_chip cic_chip = {
- .name = "CIC",
- .ack = cic_mask_irq,
- .mask = cic_mask_irq,
- .unmask = cic_unmask_irq,
+ .name = "CIC",
+ .irq_ack = cic_mask_irq,
+ .irq_mask = cic_mask_irq,
+ .irq_unmask = cic_unmask_irq,
};
-static void pic_mask_irq(unsigned int irq)
+static void pic_mask_irq(struct irq_data *d)
{
- irq -= IRQ_PIC_START;
+ unsigned int irq = d->irq - IRQ_PIC_START;
pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
}
-static void pic_unmask_irq(unsigned int irq)
+static void pic_unmask_irq(struct irq_data *d)
{
- irq -= IRQ_PIC_START;
+ unsigned int irq = d->irq - IRQ_PIC_START;
pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET);
}
static struct irq_chip pic_chip = {
- .name = "PIC",
- .ack = pic_mask_irq,
- .mask = pic_mask_irq,
- .unmask = pic_unmask_irq,
+ .name = "PIC",
+ .irq_ack = pic_mask_irq,
+ .irq_mask = pic_mask_irq,
+ .irq_unmask = pic_unmask_irq,
};
-static void sic_mask_irq(unsigned int irq)
+static void sic_mask_irq(struct irq_data *d)
{
- irq -= IRQ_SIC_START;
+ unsigned int irq = d->irq - IRQ_SIC_START;
sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
}
-static void sic_unmask_irq(unsigned int irq)
+static void sic_unmask_irq(struct irq_data *d)
{
- irq -= IRQ_SIC_START;
+ unsigned int irq = d->irq - IRQ_SIC_START;
sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET);
}
static struct irq_chip sic_chip = {
- .name = "SIC",
- .ack = sic_mask_irq,
- .mask = sic_mask_irq,
- .unmask = sic_unmask_irq,
+ .name = "SIC",
+ .irq_ack = sic_mask_irq,
+ .irq_mask = sic_mask_irq,
+ .irq_unmask = sic_unmask_irq,
};
static void
diff --git a/trunk/arch/arm/mach-iop13xx/irq.c b/trunk/arch/arm/mach-iop13xx/irq.c
index 0d099ca87bdf..a233470dd10c 100644
--- a/trunk/arch/arm/mach-iop13xx/irq.c
+++ b/trunk/arch/arm/mach-iop13xx/irq.c
@@ -123,79 +123,79 @@ static void write_intsize(u32 val)
/* 0 = Interrupt Masked and 1 = Interrupt not masked */
static void
-iop13xx_irq_mask0 (unsigned int irq)
+iop13xx_irq_mask0 (struct irq_data *d)
{
- write_intctl_0(read_intctl_0() & ~(1 << (irq - 0)));
+ write_intctl_0(read_intctl_0() & ~(1 << (d->irq - 0)));
}
static void
-iop13xx_irq_mask1 (unsigned int irq)
+iop13xx_irq_mask1 (struct irq_data *d)
{
- write_intctl_1(read_intctl_1() & ~(1 << (irq - 32)));
+ write_intctl_1(read_intctl_1() & ~(1 << (d->irq - 32)));
}
static void
-iop13xx_irq_mask2 (unsigned int irq)
+iop13xx_irq_mask2 (struct irq_data *d)
{
- write_intctl_2(read_intctl_2() & ~(1 << (irq - 64)));
+ write_intctl_2(read_intctl_2() & ~(1 << (d->irq - 64)));
}
static void
-iop13xx_irq_mask3 (unsigned int irq)
+iop13xx_irq_mask3 (struct irq_data *d)
{
- write_intctl_3(read_intctl_3() & ~(1 << (irq - 96)));
+ write_intctl_3(read_intctl_3() & ~(1 << (d->irq - 96)));
}
static void
-iop13xx_irq_unmask0(unsigned int irq)
+iop13xx_irq_unmask0(struct irq_data *d)
{
- write_intctl_0(read_intctl_0() | (1 << (irq - 0)));
+ write_intctl_0(read_intctl_0() | (1 << (d->irq - 0)));
}
static void
-iop13xx_irq_unmask1(unsigned int irq)
+iop13xx_irq_unmask1(struct irq_data *d)
{
- write_intctl_1(read_intctl_1() | (1 << (irq - 32)));
+ write_intctl_1(read_intctl_1() | (1 << (d->irq - 32)));
}
static void
-iop13xx_irq_unmask2(unsigned int irq)
+iop13xx_irq_unmask2(struct irq_data *d)
{
- write_intctl_2(read_intctl_2() | (1 << (irq - 64)));
+ write_intctl_2(read_intctl_2() | (1 << (d->irq - 64)));
}
static void
-iop13xx_irq_unmask3(unsigned int irq)
+iop13xx_irq_unmask3(struct irq_data *d)
{
- write_intctl_3(read_intctl_3() | (1 << (irq - 96)));
+ write_intctl_3(read_intctl_3() | (1 << (d->irq - 96)));
}
static struct irq_chip iop13xx_irqchip1 = {
- .name = "IOP13xx-1",
- .ack = iop13xx_irq_mask0,
- .mask = iop13xx_irq_mask0,
- .unmask = iop13xx_irq_unmask0,
+ .name = "IOP13xx-1",
+ .irq_ack = iop13xx_irq_mask0,
+ .irq_mask = iop13xx_irq_mask0,
+ .irq_unmask = iop13xx_irq_unmask0,
};
static struct irq_chip iop13xx_irqchip2 = {
- .name = "IOP13xx-2",
- .ack = iop13xx_irq_mask1,
- .mask = iop13xx_irq_mask1,
- .unmask = iop13xx_irq_unmask1,
+ .name = "IOP13xx-2",
+ .irq_ack = iop13xx_irq_mask1,
+ .irq_mask = iop13xx_irq_mask1,
+ .irq_unmask = iop13xx_irq_unmask1,
};
static struct irq_chip iop13xx_irqchip3 = {
- .name = "IOP13xx-3",
- .ack = iop13xx_irq_mask2,
- .mask = iop13xx_irq_mask2,
- .unmask = iop13xx_irq_unmask2,
+ .name = "IOP13xx-3",
+ .irq_ack = iop13xx_irq_mask2,
+ .irq_mask = iop13xx_irq_mask2,
+ .irq_unmask = iop13xx_irq_unmask2,
};
static struct irq_chip iop13xx_irqchip4 = {
- .name = "IOP13xx-4",
- .ack = iop13xx_irq_mask3,
- .mask = iop13xx_irq_mask3,
- .unmask = iop13xx_irq_unmask3,
+ .name = "IOP13xx-4",
+ .irq_ack = iop13xx_irq_mask3,
+ .irq_mask = iop13xx_irq_mask3,
+ .irq_unmask = iop13xx_irq_unmask3,
};
extern void iop_init_cp6_handler(void);
diff --git a/trunk/arch/arm/mach-iop13xx/msi.c b/trunk/arch/arm/mach-iop13xx/msi.c
index 7149fcc16c8a..c9c02e3698bc 100644
--- a/trunk/arch/arm/mach-iop13xx/msi.c
+++ b/trunk/arch/arm/mach-iop13xx/msi.c
@@ -156,14 +156,14 @@ void arch_teardown_msi_irq(unsigned int irq)
destroy_irq(irq);
}
-static void iop13xx_msi_nop(unsigned int irq)
+static void iop13xx_msi_nop(struct irq_data *d)
{
return;
}
static struct irq_chip iop13xx_msi_chip = {
.name = "PCI-MSI",
- .ack = iop13xx_msi_nop,
+ .irq_ack = iop13xx_msi_nop,
.irq_enable = unmask_msi_irq,
.irq_disable = mask_msi_irq,
.irq_mask = mask_msi_irq,
diff --git a/trunk/arch/arm/mach-iop32x/irq.c b/trunk/arch/arm/mach-iop32x/irq.c
index ba59b2d17db1..d3426a120599 100644
--- a/trunk/arch/arm/mach-iop32x/irq.c
+++ b/trunk/arch/arm/mach-iop32x/irq.c
@@ -32,24 +32,24 @@ static void intstr_write(u32 val)
}
static void
-iop32x_irq_mask(unsigned int irq)
+iop32x_irq_mask(struct irq_data *d)
{
- iop32x_mask &= ~(1 << irq);
+ iop32x_mask &= ~(1 << d->irq);
intctl_write(iop32x_mask);
}
static void
-iop32x_irq_unmask(unsigned int irq)
+iop32x_irq_unmask(struct irq_data *d)
{
- iop32x_mask |= 1 << irq;
+ iop32x_mask |= 1 << d->irq;
intctl_write(iop32x_mask);
}
struct irq_chip ext_chip = {
- .name = "IOP32x",
- .ack = iop32x_irq_mask,
- .mask = iop32x_irq_mask,
- .unmask = iop32x_irq_unmask,
+ .name = "IOP32x",
+ .irq_ack = iop32x_irq_mask,
+ .irq_mask = iop32x_irq_mask,
+ .irq_unmask = iop32x_irq_unmask,
};
void __init iop32x_init_irq(void)
diff --git a/trunk/arch/arm/mach-iop33x/irq.c b/trunk/arch/arm/mach-iop33x/irq.c
index abb4ea2ed4fd..0ff2f74363a5 100644
--- a/trunk/arch/arm/mach-iop33x/irq.c
+++ b/trunk/arch/arm/mach-iop33x/irq.c
@@ -53,45 +53,45 @@ static void intsize_write(u32 val)
}
static void
-iop33x_irq_mask1 (unsigned int irq)
+iop33x_irq_mask1 (struct irq_data *d)
{
- iop33x_mask0 &= ~(1 << irq);
+ iop33x_mask0 &= ~(1 << d->irq);
intctl0_write(iop33x_mask0);
}
static void
-iop33x_irq_mask2 (unsigned int irq)
+iop33x_irq_mask2 (struct irq_data *d)
{
- iop33x_mask1 &= ~(1 << (irq - 32));
+ iop33x_mask1 &= ~(1 << (d->irq - 32));
intctl1_write(iop33x_mask1);
}
static void
-iop33x_irq_unmask1(unsigned int irq)
+iop33x_irq_unmask1(struct irq_data *d)
{
- iop33x_mask0 |= 1 << irq;
+ iop33x_mask0 |= 1 << d->irq;
intctl0_write(iop33x_mask0);
}
static void
-iop33x_irq_unmask2(unsigned int irq)
+iop33x_irq_unmask2(struct irq_data *d)
{
- iop33x_mask1 |= (1 << (irq - 32));
+ iop33x_mask1 |= (1 << (d->irq - 32));
intctl1_write(iop33x_mask1);
}
struct irq_chip iop33x_irqchip1 = {
- .name = "IOP33x-1",
- .ack = iop33x_irq_mask1,
- .mask = iop33x_irq_mask1,
- .unmask = iop33x_irq_unmask1,
+ .name = "IOP33x-1",
+ .irq_ack = iop33x_irq_mask1,
+ .irq_mask = iop33x_irq_mask1,
+ .irq_unmask = iop33x_irq_unmask1,
};
struct irq_chip iop33x_irqchip2 = {
- .name = "IOP33x-2",
- .ack = iop33x_irq_mask2,
- .mask = iop33x_irq_mask2,
- .unmask = iop33x_irq_unmask2,
+ .name = "IOP33x-2",
+ .irq_ack = iop33x_irq_mask2,
+ .irq_mask = iop33x_irq_mask2,
+ .irq_unmask = iop33x_irq_unmask2,
};
void __init iop33x_init_irq(void)
diff --git a/trunk/arch/arm/mach-ixp2000/core.c b/trunk/arch/arm/mach-ixp2000/core.c
index e24e3d05397f..5fc4e064b650 100644
--- a/trunk/arch/arm/mach-ixp2000/core.c
+++ b/trunk/arch/arm/mach-ixp2000/core.c
@@ -309,9 +309,9 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc)
}
}
-static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
+static int ixp2000_GPIO_irq_type(struct irq_data *d, unsigned int type)
{
- int line = irq - IRQ_IXP2000_GPIO0;
+ int line = d->irq - IRQ_IXP2000_GPIO0;
/*
* First, configure this GPIO line as an input.
@@ -342,8 +342,10 @@ static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
return 0;
}
-static void ixp2000_GPIO_irq_mask_ack(unsigned int irq)
+static void ixp2000_GPIO_irq_mask_ack(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
@@ -351,38 +353,42 @@ static void ixp2000_GPIO_irq_mask_ack(unsigned int irq)
ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0)));
}
-static void ixp2000_GPIO_irq_mask(unsigned int irq)
+static void ixp2000_GPIO_irq_mask(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
}
-static void ixp2000_GPIO_irq_unmask(unsigned int irq)
+static void ixp2000_GPIO_irq_unmask(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
ixp2000_reg_write(IXP2000_GPIO_INSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
}
static struct irq_chip ixp2000_GPIO_irq_chip = {
- .ack = ixp2000_GPIO_irq_mask_ack,
- .mask = ixp2000_GPIO_irq_mask,
- .unmask = ixp2000_GPIO_irq_unmask,
- .set_type = ixp2000_GPIO_irq_type,
+ .irq_ack = ixp2000_GPIO_irq_mask_ack,
+ .irq_mask = ixp2000_GPIO_irq_mask,
+ .irq_unmask = ixp2000_GPIO_irq_unmask,
+ .irq_set_type = ixp2000_GPIO_irq_type,
};
-static void ixp2000_pci_irq_mask(unsigned int irq)
+static void ixp2000_pci_irq_mask(struct irq_data *d)
{
unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
- if (irq == IRQ_IXP2000_PCIA)
+ if (d->irq == IRQ_IXP2000_PCIA)
ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26)));
- else if (irq == IRQ_IXP2000_PCIB)
+ else if (d->irq == IRQ_IXP2000_PCIB)
ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27)));
}
-static void ixp2000_pci_irq_unmask(unsigned int irq)
+static void ixp2000_pci_irq_unmask(struct irq_data *d)
{
unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
- if (irq == IRQ_IXP2000_PCIA)
+ if (d->irq == IRQ_IXP2000_PCIA)
ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 26)));
- else if (irq == IRQ_IXP2000_PCIB)
+ else if (d->irq == IRQ_IXP2000_PCIB)
ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 27)));
}
@@ -401,44 +407,44 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc)
}
}
-static void ixp2000_err_irq_mask(unsigned int irq)
+static void ixp2000_err_irq_mask(struct irq_data *d)
{
ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR,
- (1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
+ (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
}
-static void ixp2000_err_irq_unmask(unsigned int irq)
+static void ixp2000_err_irq_unmask(struct irq_data *d)
{
ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET,
- (1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
+ (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
}
static struct irq_chip ixp2000_err_irq_chip = {
- .ack = ixp2000_err_irq_mask,
- .mask = ixp2000_err_irq_mask,
- .unmask = ixp2000_err_irq_unmask
+ .irq_ack = ixp2000_err_irq_mask,
+ .irq_mask = ixp2000_err_irq_mask,
+ .irq_unmask = ixp2000_err_irq_unmask
};
static struct irq_chip ixp2000_pci_irq_chip = {
- .ack = ixp2000_pci_irq_mask,
- .mask = ixp2000_pci_irq_mask,
- .unmask = ixp2000_pci_irq_unmask
+ .irq_ack = ixp2000_pci_irq_mask,
+ .irq_mask = ixp2000_pci_irq_mask,
+ .irq_unmask = ixp2000_pci_irq_unmask
};
-static void ixp2000_irq_mask(unsigned int irq)
+static void ixp2000_irq_mask(struct irq_data *d)
{
- ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << irq));
+ ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << d->irq));
}
-static void ixp2000_irq_unmask(unsigned int irq)
+static void ixp2000_irq_unmask(struct irq_data *d)
{
- ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq));
+ ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << d->irq));
}
static struct irq_chip ixp2000_irq_chip = {
- .ack = ixp2000_irq_mask,
- .mask = ixp2000_irq_mask,
- .unmask = ixp2000_irq_unmask
+ .irq_ack = ixp2000_irq_mask,
+ .irq_mask = ixp2000_irq_mask,
+ .irq_unmask = ixp2000_irq_unmask
};
void __init ixp2000_init_irq(void)
diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2x00.c b/trunk/arch/arm/mach-ixp2000/ixdp2x00.c
index 91fffb9b2084..7d90d3f13ee8 100644
--- a/trunk/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/trunk/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -63,7 +63,7 @@ static struct slowport_cfg slowport_cpld_cfg = {
};
#endif
-static void ixdp2x00_irq_mask(unsigned int irq)
+static void ixdp2x00_irq_mask(struct irq_data *d)
{
unsigned long dummy;
static struct slowport_cfg old_cfg;
@@ -78,7 +78,7 @@ static void ixdp2x00_irq_mask(unsigned int irq)
#endif
dummy = *board_irq_mask;
- dummy |= IXP2000_BOARD_IRQ_MASK(irq);
+ dummy |= IXP2000_BOARD_IRQ_MASK(d->irq);
ixp2000_reg_wrb(board_irq_mask, dummy);
#ifdef CONFIG_ARCH_IXDP2400
@@ -87,7 +87,7 @@ static void ixdp2x00_irq_mask(unsigned int irq)
#endif
}
-static void ixdp2x00_irq_unmask(unsigned int irq)
+static void ixdp2x00_irq_unmask(struct irq_data *d)
{
unsigned long dummy;
static struct slowport_cfg old_cfg;
@@ -98,7 +98,7 @@ static void ixdp2x00_irq_unmask(unsigned int irq)
#endif
dummy = *board_irq_mask;
- dummy &= ~IXP2000_BOARD_IRQ_MASK(irq);
+ dummy &= ~IXP2000_BOARD_IRQ_MASK(d->irq);
ixp2000_reg_wrb(board_irq_mask, dummy);
if (machine_is_ixdp2400())
@@ -111,7 +111,7 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
static struct slowport_cfg old_cfg;
int i;
- desc->chip->mask(irq);
+ desc->irq_data.chip->irq_mask(&desc->irq_data);
#ifdef CONFIG_ARCH_IXDP2400
if (machine_is_ixdp2400())
@@ -133,13 +133,13 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
}
}
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
static struct irq_chip ixdp2x00_cpld_irq_chip = {
- .ack = ixdp2x00_irq_mask,
- .mask = ixdp2x00_irq_mask,
- .unmask = ixdp2x00_irq_unmask
+ .irq_ack = ixdp2x00_irq_mask,
+ .irq_mask = ixdp2x00_irq_mask,
+ .irq_unmask = ixdp2x00_irq_unmask
};
void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs)
diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2x01.c b/trunk/arch/arm/mach-ixp2000/ixdp2x01.c
index 6c121bdbe311..34b1b2af37c8 100644
--- a/trunk/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/trunk/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -48,16 +48,16 @@
/*************************************************************************
* IXDP2x01 IRQ Handling
*************************************************************************/
-static void ixdp2x01_irq_mask(unsigned int irq)
+static void ixdp2x01_irq_mask(struct irq_data *d)
{
ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG,
- IXP2000_BOARD_IRQ_MASK(irq));
+ IXP2000_BOARD_IRQ_MASK(d->irq));
}
-static void ixdp2x01_irq_unmask(unsigned int irq)
+static void ixdp2x01_irq_unmask(struct irq_data *d)
{
ixp2000_reg_write(IXDP2X01_INT_MASK_CLR_REG,
- IXP2000_BOARD_IRQ_MASK(irq));
+ IXP2000_BOARD_IRQ_MASK(d->irq));
}
static u32 valid_irq_mask;
@@ -67,7 +67,7 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)
u32 ex_interrupt;
int i;
- desc->chip->mask(irq);
+ desc->irq_data.chip->irq_mask(&desc->irq_data);
ex_interrupt = *IXDP2X01_INT_STAT_REG & valid_irq_mask;
@@ -83,13 +83,13 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)
}
}
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
static struct irq_chip ixdp2x01_irq_chip = {
- .mask = ixdp2x01_irq_mask,
- .ack = ixdp2x01_irq_mask,
- .unmask = ixdp2x01_irq_unmask
+ .irq_mask = ixdp2x01_irq_mask,
+ .irq_ack = ixdp2x01_irq_mask,
+ .irq_unmask = ixdp2x01_irq_unmask
};
/*
diff --git a/trunk/arch/arm/mach-ixp23xx/core.c b/trunk/arch/arm/mach-ixp23xx/core.c
index aa4c4420ff3d..9c8a33903216 100644
--- a/trunk/arch/arm/mach-ixp23xx/core.c
+++ b/trunk/arch/arm/mach-ixp23xx/core.c
@@ -111,9 +111,9 @@ enum ixp23xx_irq_type {
static void ixp23xx_config_irq(unsigned int, enum ixp23xx_irq_type);
-static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
+static int ixp23xx_irq_set_type(struct irq_data *d, unsigned int type)
{
- int line = irq - IRQ_IXP23XX_GPIO6 + 6;
+ int line = d->irq - IRQ_IXP23XX_GPIO6 + 6;
u32 int_style;
enum ixp23xx_irq_type irq_type;
volatile u32 *int_reg;
@@ -149,7 +149,7 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
return -EINVAL;
}
- ixp23xx_config_irq(irq, irq_type);
+ ixp23xx_config_irq(d->irq, irq_type);
if (line >= 8) { /* pins 8-15 */
line -= 8;
@@ -173,9 +173,10 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
return 0;
}
-static void ixp23xx_irq_mask(unsigned int irq)
+static void ixp23xx_irq_mask(struct irq_data *d)
{
volatile unsigned long *intr_reg;
+ unsigned int irq = d->irq;
if (irq >= 56)
irq += 8;
@@ -184,9 +185,9 @@ static void ixp23xx_irq_mask(unsigned int irq)
*intr_reg &= ~(1 << (irq % 32));
}
-static void ixp23xx_irq_ack(unsigned int irq)
+static void ixp23xx_irq_ack(struct irq_data *d)
{
- int line = irq - IRQ_IXP23XX_GPIO6 + 6;
+ int line = d->irq - IRQ_IXP23XX_GPIO6 + 6;
if ((line < 6) || (line > 15))
return;
@@ -198,11 +199,12 @@ static void ixp23xx_irq_ack(unsigned int irq)
* Level triggered interrupts on GPIO lines can only be cleared when the
* interrupt condition disappears.
*/
-static void ixp23xx_irq_level_unmask(unsigned int irq)
+static void ixp23xx_irq_level_unmask(struct irq_data *d)
{
volatile unsigned long *intr_reg;
+ unsigned int irq = d->irq;
- ixp23xx_irq_ack(irq);
+ ixp23xx_irq_ack(d);
if (irq >= 56)
irq += 8;
@@ -211,9 +213,10 @@ static void ixp23xx_irq_level_unmask(unsigned int irq)
*intr_reg |= (1 << (irq % 32));
}
-static void ixp23xx_irq_edge_unmask(unsigned int irq)
+static void ixp23xx_irq_edge_unmask(struct irq_data *d)
{
volatile unsigned long *intr_reg;
+ unsigned int irq = d->irq;
if (irq >= 56)
irq += 8;
@@ -223,26 +226,30 @@ static void ixp23xx_irq_edge_unmask(unsigned int irq)
}
static struct irq_chip ixp23xx_irq_level_chip = {
- .ack = ixp23xx_irq_mask,
- .mask = ixp23xx_irq_mask,
- .unmask = ixp23xx_irq_level_unmask,
- .set_type = ixp23xx_irq_set_type
+ .irq_ack = ixp23xx_irq_mask,
+ .irq_mask = ixp23xx_irq_mask,
+ .irq_unmask = ixp23xx_irq_level_unmask,
+ .irq_set_type = ixp23xx_irq_set_type
};
static struct irq_chip ixp23xx_irq_edge_chip = {
- .ack = ixp23xx_irq_ack,
- .mask = ixp23xx_irq_mask,
- .unmask = ixp23xx_irq_edge_unmask,
- .set_type = ixp23xx_irq_set_type
+ .irq_ack = ixp23xx_irq_ack,
+ .irq_mask = ixp23xx_irq_mask,
+ .irq_unmask = ixp23xx_irq_edge_unmask,
+ .irq_set_type = ixp23xx_irq_set_type
};
-static void ixp23xx_pci_irq_mask(unsigned int irq)
+static void ixp23xx_pci_irq_mask(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
*IXP23XX_PCI_XSCALE_INT_ENABLE &= ~(1 << (IRQ_IXP23XX_INTA + 27 - irq));
}
-static void ixp23xx_pci_irq_unmask(unsigned int irq)
+static void ixp23xx_pci_irq_unmask(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
*IXP23XX_PCI_XSCALE_INT_ENABLE |= (1 << (IRQ_IXP23XX_INTA + 27 - irq));
}
@@ -256,7 +263,7 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc)
pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS;
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
/* See which PCI_INTA, or PCI_INTB interrupted */
if (pci_interrupt & (1 << 26)) {
@@ -269,13 +276,13 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc)
generic_handle_irq(irqno);
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
static struct irq_chip ixp23xx_pci_irq_chip = {
- .ack = ixp23xx_pci_irq_mask,
- .mask = ixp23xx_pci_irq_mask,
- .unmask = ixp23xx_pci_irq_unmask
+ .irq_ack = ixp23xx_pci_irq_mask,
+ .irq_mask = ixp23xx_pci_irq_mask,
+ .irq_unmask = ixp23xx_pci_irq_unmask
};
static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type)
diff --git a/trunk/arch/arm/mach-ixp23xx/ixdp2351.c b/trunk/arch/arm/mach-ixp23xx/ixdp2351.c
index 664e39c2a903..181116aa6591 100644
--- a/trunk/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/trunk/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -48,14 +48,14 @@
/*
* IXDP2351 Interrupt Handling
*/
-static void ixdp2351_inta_mask(unsigned int irq)
+static void ixdp2351_inta_mask(struct irq_data *d)
{
- *IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(irq);
+ *IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(d->irq);
}
-static void ixdp2351_inta_unmask(unsigned int irq)
+static void ixdp2351_inta_unmask(struct irq_data *d)
{
- *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq);
+ *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(d->irq);
}
static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
@@ -64,7 +64,7 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
*IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID;
int i;
- desc->chip->mask(irq);
+ desc->irq_data.chip->irq_mask(&desc->irq_data);
for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) {
if (ex_interrupt & (1 << i)) {
@@ -74,23 +74,23 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
}
}
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
static struct irq_chip ixdp2351_inta_chip = {
- .ack = ixdp2351_inta_mask,
- .mask = ixdp2351_inta_mask,
- .unmask = ixdp2351_inta_unmask
+ .irq_ack = ixdp2351_inta_mask,
+ .irq_mask = ixdp2351_inta_mask,
+ .irq_unmask = ixdp2351_inta_unmask
};
-static void ixdp2351_intb_mask(unsigned int irq)
+static void ixdp2351_intb_mask(struct irq_data *d)
{
- *IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(irq);
+ *IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(d->irq);
}
-static void ixdp2351_intb_unmask(unsigned int irq)
+static void ixdp2351_intb_unmask(struct irq_data *d)
{
- *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq);
+ *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(d->irq);
}
static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
@@ -99,7 +99,7 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
*IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID;
int i;
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) {
if (ex_interrupt & (1 << i)) {
@@ -109,13 +109,13 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
}
}
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
static struct irq_chip ixdp2351_intb_chip = {
- .ack = ixdp2351_intb_mask,
- .mask = ixdp2351_intb_mask,
- .unmask = ixdp2351_intb_unmask
+ .irq_ack = ixdp2351_intb_mask,
+ .irq_mask = ixdp2351_intb_mask,
+ .irq_unmask = ixdp2351_intb_unmask
};
void __init ixdp2351_init_irq(void)
diff --git a/trunk/arch/arm/mach-ixp4xx/common.c b/trunk/arch/arm/mach-ixp4xx/common.c
index 4dbfcbb9163c..4dc68d6bb6be 100644
--- a/trunk/arch/arm/mach-ixp4xx/common.c
+++ b/trunk/arch/arm/mach-ixp4xx/common.c
@@ -128,9 +128,9 @@ int irq_to_gpio(unsigned int irq)
}
EXPORT_SYMBOL(irq_to_gpio);
-static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
+static int ixp4xx_set_irq_type(struct irq_data *d, unsigned int type)
{
- int line = irq2gpio[irq];
+ int line = irq2gpio[d->irq];
u32 int_style;
enum ixp4xx_irq_type irq_type;
volatile u32 *int_reg;
@@ -167,9 +167,9 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
}
if (irq_type == IXP4XX_IRQ_EDGE)
- ixp4xx_irq_edge |= (1 << irq);
+ ixp4xx_irq_edge |= (1 << d->irq);
else
- ixp4xx_irq_edge &= ~(1 << irq);
+ ixp4xx_irq_edge &= ~(1 << d->irq);
if (line >= 8) { /* pins 8-15 */
line -= 8;
@@ -188,22 +188,22 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
*int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
/* Configure the line as an input */
- gpio_line_config(irq2gpio[irq], IXP4XX_GPIO_IN);
+ gpio_line_config(irq2gpio[d->irq], IXP4XX_GPIO_IN);
return 0;
}
-static void ixp4xx_irq_mask(unsigned int irq)
+static void ixp4xx_irq_mask(struct irq_data *d)
{
- if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
- *IXP4XX_ICMR2 &= ~(1 << (irq - 32));
+ if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && d->irq >= 32)
+ *IXP4XX_ICMR2 &= ~(1 << (d->irq - 32));
else
- *IXP4XX_ICMR &= ~(1 << irq);
+ *IXP4XX_ICMR &= ~(1 << d->irq);
}
-static void ixp4xx_irq_ack(unsigned int irq)
+static void ixp4xx_irq_ack(struct irq_data *d)
{
- int line = (irq < 32) ? irq2gpio[irq] : -1;
+ int line = (d->irq < 32) ? irq2gpio[d->irq] : -1;
if (line >= 0)
*IXP4XX_GPIO_GPISR = (1 << line);
@@ -213,23 +213,23 @@ static void ixp4xx_irq_ack(unsigned int irq)
* Level triggered interrupts on GPIO lines can only be cleared when the
* interrupt condition disappears.
*/
-static void ixp4xx_irq_unmask(unsigned int irq)
+static void ixp4xx_irq_unmask(struct irq_data *d)
{
- if (!(ixp4xx_irq_edge & (1 << irq)))
- ixp4xx_irq_ack(irq);
+ if (!(ixp4xx_irq_edge & (1 << d->irq)))
+ ixp4xx_irq_ack(d);
- if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
- *IXP4XX_ICMR2 |= (1 << (irq - 32));
+ if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && d->irq >= 32)
+ *IXP4XX_ICMR2 |= (1 << (d->irq - 32));
else
- *IXP4XX_ICMR |= (1 << irq);
+ *IXP4XX_ICMR |= (1 << d->irq);
}
static struct irq_chip ixp4xx_irq_chip = {
.name = "IXP4xx",
- .ack = ixp4xx_irq_ack,
- .mask = ixp4xx_irq_mask,
- .unmask = ixp4xx_irq_unmask,
- .set_type = ixp4xx_set_irq_type,
+ .irq_ack = ixp4xx_irq_ack,
+ .irq_mask = ixp4xx_irq_mask,
+ .irq_unmask = ixp4xx_irq_unmask,
+ .irq_set_type = ixp4xx_set_irq_type,
};
void __init ixp4xx_init_irq(void)
diff --git a/trunk/arch/arm/mach-ks8695/irq.c b/trunk/arch/arm/mach-ks8695/irq.c
index e375c1d53f81..7998ccaa6333 100644
--- a/trunk/arch/arm/mach-ks8695/irq.c
+++ b/trunk/arch/arm/mach-ks8695/irq.c
@@ -34,29 +34,29 @@
#include
#include
-static void ks8695_irq_mask(unsigned int irqno)
+static void ks8695_irq_mask(struct irq_data *d)
{
unsigned long inten;
inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
- inten &= ~(1 << irqno);
+ inten &= ~(1 << d->irq);
__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
}
-static void ks8695_irq_unmask(unsigned int irqno)
+static void ks8695_irq_unmask(struct irq_data *d)
{
unsigned long inten;
inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
- inten |= (1 << irqno);
+ inten |= (1 << d->irq);
__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
}
-static void ks8695_irq_ack(unsigned int irqno)
+static void ks8695_irq_ack(struct irq_data *d)
{
- __raw_writel((1 << irqno), KS8695_IRQ_VA + KS8695_INTST);
+ __raw_writel((1 << d->irq), KS8695_IRQ_VA + KS8695_INTST);
}
@@ -64,7 +64,7 @@ static struct irq_chip ks8695_irq_level_chip;
static struct irq_chip ks8695_irq_edge_chip;
-static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
+static int ks8695_irq_set_type(struct irq_data *d, unsigned int type)
{
unsigned long ctrl, mode;
unsigned short level_triggered = 0;
@@ -93,7 +93,7 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
return -EINVAL;
}
- switch (irqno) {
+ switch (d->irq) {
case KS8695_IRQ_EXTERN0:
ctrl &= ~IOPC_IOEINT0TM;
ctrl |= IOPC_IOEINT0_MODE(mode);
@@ -115,12 +115,12 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
}
if (level_triggered) {
- set_irq_chip(irqno, &ks8695_irq_level_chip);
- set_irq_handler(irqno, handle_level_irq);
+ set_irq_chip(d->irq, &ks8695_irq_level_chip);
+ set_irq_handler(d->irq, handle_level_irq);
}
else {
- set_irq_chip(irqno, &ks8695_irq_edge_chip);
- set_irq_handler(irqno, handle_edge_irq);
+ set_irq_chip(d->irq, &ks8695_irq_edge_chip);
+ set_irq_handler(d->irq, handle_edge_irq);
}
__raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC);
@@ -128,17 +128,17 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
}
static struct irq_chip ks8695_irq_level_chip = {
- .ack = ks8695_irq_mask,
- .mask = ks8695_irq_mask,
- .unmask = ks8695_irq_unmask,
- .set_type = ks8695_irq_set_type,
+ .irq_ack = ks8695_irq_mask,
+ .irq_mask = ks8695_irq_mask,
+ .irq_unmask = ks8695_irq_unmask,
+ .irq_set_type = ks8695_irq_set_type,
};
static struct irq_chip ks8695_irq_edge_chip = {
- .ack = ks8695_irq_ack,
- .mask = ks8695_irq_mask,
- .unmask = ks8695_irq_unmask,
- .set_type = ks8695_irq_set_type,
+ .irq_ack = ks8695_irq_ack,
+ .irq_mask = ks8695_irq_mask,
+ .irq_unmask = ks8695_irq_unmask,
+ .irq_set_type = ks8695_irq_set_type,
};
void __init ks8695_init_irq(void)
@@ -164,7 +164,8 @@ void __init ks8695_init_irq(void)
/* Edge-triggered interrupts */
default:
- ks8695_irq_ack(irq); /* clear pending bit */
+ /* clear pending bit */
+ ks8695_irq_ack(irq_get_irq_data(irq));
set_irq_chip(irq, &ks8695_irq_edge_chip);
set_irq_handler(irq, handle_edge_irq);
}
diff --git a/trunk/arch/arm/mach-lh7a40x/arch-kev7a400.c b/trunk/arch/arm/mach-lh7a40x/arch-kev7a400.c
index 9088c16662e8..71129c33c7d2 100644
--- a/trunk/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/trunk/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -46,28 +46,28 @@ void __init kev7a400_map_io(void)
static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */
-static void kev7a400_ack_cpld_irq (u32 irq)
+static void kev7a400_ack_cpld_irq(struct irq_data *d)
{
- CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD);
+ CPLD_CL_INT = 1 << (d->irq - IRQ_KEV7A400_CPLD);
}
-static void kev7a400_mask_cpld_irq (u32 irq)
+static void kev7a400_mask_cpld_irq(struct irq_data *d)
{
- CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD));
+ CPLD_IRQ_mask &= ~(1 << (d->irq - IRQ_KEV7A400_CPLD));
CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
}
-static void kev7a400_unmask_cpld_irq (u32 irq)
+static void kev7a400_unmask_cpld_irq(struct irq_data *d)
{
- CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD);
+ CPLD_IRQ_mask |= 1 << (d->irq - IRQ_KEV7A400_CPLD);
CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
}
static struct irq_chip kev7a400_cpld_chip = {
- .name = "CPLD",
- .ack = kev7a400_ack_cpld_irq,
- .mask = kev7a400_mask_cpld_irq,
- .unmask = kev7a400_unmask_cpld_irq,
+ .name = "CPLD",
+ .irq_ack = kev7a400_ack_cpld_irq,
+ .irq_mask = kev7a400_mask_cpld_irq,
+ .irq_unmask = kev7a400_unmask_cpld_irq,
};
diff --git a/trunk/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/trunk/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index 7315a569aea1..e735546181ad 100644
--- a/trunk/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/trunk/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -159,7 +159,7 @@ static void __init lpd7a40x_init (void)
#endif
}
-static void lh7a40x_ack_cpld_irq (u32 irq)
+static void lh7a40x_ack_cpld_irq(struct irq_data *d)
{
/* CPLD doesn't have ack capability, but some devices may */
@@ -167,14 +167,14 @@ static void lh7a40x_ack_cpld_irq (u32 irq)
/* The touch control *must* mask the interrupt because the
* interrupt bit is read by the driver to determine if the pen
* is still down. */
- if (irq == IRQ_TOUCH)
+ if (d->irq == IRQ_TOUCH)
CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH;
#endif
}
-static void lh7a40x_mask_cpld_irq (u32 irq)
+static void lh7a40x_mask_cpld_irq(struct irq_data *d)
{
- switch (irq) {
+ switch (d->irq) {
case IRQ_LPD7A40X_ETH_INT:
CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET;
break;
@@ -186,9 +186,9 @@ static void lh7a40x_mask_cpld_irq (u32 irq)
}
}
-static void lh7a40x_unmask_cpld_irq (u32 irq)
+static void lh7a40x_unmask_cpld_irq(struct irq_data *d)
{
- switch (irq) {
+ switch (d->irq) {
case IRQ_LPD7A40X_ETH_INT:
CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET;
break;
@@ -201,17 +201,17 @@ static void lh7a40x_unmask_cpld_irq (u32 irq)
}
static struct irq_chip lpd7a40x_cpld_chip = {
- .name = "CPLD",
- .ack = lh7a40x_ack_cpld_irq,
- .mask = lh7a40x_mask_cpld_irq,
- .unmask = lh7a40x_unmask_cpld_irq,
+ .name = "CPLD",
+ .irq_ack = lh7a40x_ack_cpld_irq,
+ .irq_mask = lh7a40x_mask_cpld_irq,
+ .irq_unmask = lh7a40x_unmask_cpld_irq,
};
static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
{
unsigned int mask = CPLD_INTERRUPTS;
- desc->chip->ack (irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if ((mask & (1<<0)) == 0) /* WLAN */
generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
@@ -221,7 +221,8 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
generic_handle_irq(IRQ_TOUCH);
#endif
- desc->chip->unmask (irq); /* Level-triggered need this */
+ /* Level-triggered need this */
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
diff --git a/trunk/arch/arm/mach-lh7a40x/irq-lh7a400.c b/trunk/arch/arm/mach-lh7a40x/irq-lh7a400.c
index 1ad3afcf6b3d..f2e7e655ca35 100644
--- a/trunk/arch/arm/mach-lh7a40x/irq-lh7a400.c
+++ b/trunk/arch/arm/mach-lh7a40x/irq-lh7a400.c
@@ -21,34 +21,34 @@
/* CPU IRQ handling */
-static void lh7a400_mask_irq (u32 irq)
+static void lh7a400_mask_irq(struct irq_data *d)
{
- INTC_INTENC = (1 << irq);
+ INTC_INTENC = (1 << d->irq);
}
-static void lh7a400_unmask_irq (u32 irq)
+static void lh7a400_unmask_irq(struct irq_data *d)
{
- INTC_INTENS = (1 << irq);
+ INTC_INTENS = (1 << d->irq);
}
-static void lh7a400_ack_gpio_irq (u32 irq)
+static void lh7a400_ack_gpio_irq(struct irq_data *d)
{
- GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
- INTC_INTENC = (1 << irq);
+ GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
+ INTC_INTENC = (1 << d->irq);
}
static struct irq_chip lh7a400_internal_chip = {
- .name = "MPU",
- .ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */
- .mask = lh7a400_mask_irq,
- .unmask = lh7a400_unmask_irq,
+ .name = "MPU",
+ .irq_ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */
+ .irq_mask = lh7a400_mask_irq,
+ .irq_unmask = lh7a400_unmask_irq,
};
static struct irq_chip lh7a400_gpio_chip = {
- .name = "GPIO",
- .ack = lh7a400_ack_gpio_irq,
- .mask = lh7a400_mask_irq,
- .unmask = lh7a400_unmask_irq,
+ .name = "GPIO",
+ .irq_ack = lh7a400_ack_gpio_irq,
+ .irq_mask = lh7a400_mask_irq,
+ .irq_unmask = lh7a400_unmask_irq,
};
diff --git a/trunk/arch/arm/mach-lh7a40x/irq-lh7a404.c b/trunk/arch/arm/mach-lh7a40x/irq-lh7a404.c
index 12b045b688c6..14b173389573 100644
--- a/trunk/arch/arm/mach-lh7a40x/irq-lh7a404.c
+++ b/trunk/arch/arm/mach-lh7a40x/irq-lh7a404.c
@@ -43,64 +43,64 @@ static unsigned char irq_pri_vic2[] = {
/* CPU IRQ handling */
-static void lh7a404_vic1_mask_irq (u32 irq)
+static void lh7a404_vic1_mask_irq(struct irq_data *d)
{
- VIC1_INTENCLR = (1 << irq);
+ VIC1_INTENCLR = (1 << d->irq);
}
-static void lh7a404_vic1_unmask_irq (u32 irq)
+static void lh7a404_vic1_unmask_irq(struct irq_data *d)
{
- VIC1_INTEN = (1 << irq);
+ VIC1_INTEN = (1 << d->irq);
}
-static void lh7a404_vic2_mask_irq (u32 irq)
+static void lh7a404_vic2_mask_irq(struct irq_data *d)
{
- VIC2_INTENCLR = (1 << (irq - 32));
+ VIC2_INTENCLR = (1 << (d->irq - 32));
}
-static void lh7a404_vic2_unmask_irq (u32 irq)
+static void lh7a404_vic2_unmask_irq(struct irq_data *d)
{
- VIC2_INTEN = (1 << (irq - 32));
+ VIC2_INTEN = (1 << (d->irq - 32));
}
-static void lh7a404_vic1_ack_gpio_irq (u32 irq)
+static void lh7a404_vic1_ack_gpio_irq(struct irq_data *d)
{
- GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
- VIC1_INTENCLR = (1 << irq);
+ GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
+ VIC1_INTENCLR = (1 << d->irq);
}
-static void lh7a404_vic2_ack_gpio_irq (u32 irq)
+static void lh7a404_vic2_ack_gpio_irq(struct irq_data *d)
{
- GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
- VIC2_INTENCLR = (1 << irq);
+ GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
+ VIC2_INTENCLR = (1 << d->irq);
}
static struct irq_chip lh7a404_vic1_chip = {
- .name = "VIC1",
- .ack = lh7a404_vic1_mask_irq, /* Because level-triggered */
- .mask = lh7a404_vic1_mask_irq,
- .unmask = lh7a404_vic1_unmask_irq,
+ .name = "VIC1",
+ .irq_ack = lh7a404_vic1_mask_irq, /* Because level-triggered */
+ .irq_mask = lh7a404_vic1_mask_irq,
+ .irq_unmask = lh7a404_vic1_unmask_irq,
};
static struct irq_chip lh7a404_vic2_chip = {
- .name = "VIC2",
- .ack = lh7a404_vic2_mask_irq, /* Because level-triggered */
- .mask = lh7a404_vic2_mask_irq,
- .unmask = lh7a404_vic2_unmask_irq,
+ .name = "VIC2",
+ .irq_ack = lh7a404_vic2_mask_irq, /* Because level-triggered */
+ .irq_mask = lh7a404_vic2_mask_irq,
+ .irq_unmask = lh7a404_vic2_unmask_irq,
};
static struct irq_chip lh7a404_gpio_vic1_chip = {
- .name = "GPIO-VIC1",
- .ack = lh7a404_vic1_ack_gpio_irq,
- .mask = lh7a404_vic1_mask_irq,
- .unmask = lh7a404_vic1_unmask_irq,
+ .name = "GPIO-VIC1",
+ .irq_ack = lh7a404_vic1_ack_gpio_irq,
+ .irq_mask = lh7a404_vic1_mask_irq,
+ .irq_unmask = lh7a404_vic1_unmask_irq,
};
static struct irq_chip lh7a404_gpio_vic2_chip = {
- .name = "GPIO-VIC2",
- .ack = lh7a404_vic2_ack_gpio_irq,
- .mask = lh7a404_vic2_mask_irq,
- .unmask = lh7a404_vic2_unmask_irq,
+ .name = "GPIO-VIC2",
+ .irq_ack = lh7a404_vic2_ack_gpio_irq,
+ .irq_mask = lh7a404_vic2_mask_irq,
+ .irq_unmask = lh7a404_vic2_unmask_irq,
};
/* IRQ initialization */
diff --git a/trunk/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/trunk/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
index fd033bb4342f..1bfdcddcb93e 100644
--- a/trunk/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
+++ b/trunk/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
@@ -20,14 +20,14 @@
#include "common.h"
-static void lh7a40x_ack_cpld_irq (u32 irq)
+static void lh7a40x_ack_cpld_irq(struct irq_data *d)
{
/* CPLD doesn't have ack capability */
}
-static void lh7a40x_mask_cpld_irq (u32 irq)
+static void lh7a40x_mask_cpld_irq(struct irq_data *d)
{
- switch (irq) {
+ switch (d->irq) {
case IRQ_LPD7A40X_ETH_INT:
CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4;
break;
@@ -37,9 +37,9 @@ static void lh7a40x_mask_cpld_irq (u32 irq)
}
}
-static void lh7a40x_unmask_cpld_irq (u32 irq)
+static void lh7a40x_unmask_cpld_irq(struct irq_data *d)
{
- switch (irq) {
+ switch (d->irq) {
case IRQ_LPD7A40X_ETH_INT:
CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4;
break;
@@ -50,17 +50,17 @@ static void lh7a40x_unmask_cpld_irq (u32 irq)
}
static struct irq_chip lh7a40x_cpld_chip = {
- .name = "CPLD",
- .ack = lh7a40x_ack_cpld_irq,
- .mask = lh7a40x_mask_cpld_irq,
- .unmask = lh7a40x_unmask_cpld_irq,
+ .name = "CPLD",
+ .irq_ack = lh7a40x_ack_cpld_irq,
+ .irq_mask = lh7a40x_mask_cpld_irq,
+ .irq_unmask = lh7a40x_unmask_cpld_irq,
};
static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
{
unsigned int mask = CPLD_INTERRUPTS;
- desc->chip->ack (irq);
+ desc->irq_data.chip->ack (irq);
if ((mask & 0x1) == 0) /* WLAN */
generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
@@ -68,7 +68,7 @@ static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
if ((mask & 0x2) == 0) /* Touch */
generic_handle_irq(IRQ_LPD7A400_TS);
- desc->chip->unmask (irq); /* Level-triggered need this */
+ desc->irq_data.chip->unmask (irq); /* Level-triggered need this */
}
diff --git a/trunk/arch/arm/mach-lpc32xx/irq.c b/trunk/arch/arm/mach-lpc32xx/irq.c
index bd0df26c415b..316ecbf6c586 100644
--- a/trunk/arch/arm/mach-lpc32xx/irq.c
+++ b/trunk/arch/arm/mach-lpc32xx/irq.c
@@ -191,38 +191,38 @@ static void get_controller(unsigned int irq, unsigned int *base,
}
}
-static void lpc32xx_mask_irq(unsigned int irq)
+static void lpc32xx_mask_irq(struct irq_data *d)
{
unsigned int reg, ctrl, mask;
- get_controller(irq, &ctrl, &mask);
+ get_controller(d->irq, &ctrl, &mask);
reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) & ~mask;
__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));
}
-static void lpc32xx_unmask_irq(unsigned int irq)
+static void lpc32xx_unmask_irq(struct irq_data *d)
{
unsigned int reg, ctrl, mask;
- get_controller(irq, &ctrl, &mask);
+ get_controller(d->irq, &ctrl, &mask);
reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) | mask;
__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));
}
-static void lpc32xx_ack_irq(unsigned int irq)
+static void lpc32xx_ack_irq(struct irq_data *d)
{
unsigned int ctrl, mask;
- get_controller(irq, &ctrl, &mask);
+ get_controller(d->irq, &ctrl, &mask);
__raw_writel(mask, LPC32XX_INTC_RAW_STAT(ctrl));
/* Also need to clear pending wake event */
- if (lpc32xx_events[irq].mask != 0)
- __raw_writel(lpc32xx_events[irq].mask,
- lpc32xx_events[irq].event_group->rawstat_reg);
+ if (lpc32xx_events[d->irq].mask != 0)
+ __raw_writel(lpc32xx_events[d->irq].mask,
+ lpc32xx_events[d->irq].event_group->rawstat_reg);
}
static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level,
@@ -261,27 +261,27 @@ static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level,
}
}
-static int lpc32xx_set_irq_type(unsigned int irq, unsigned int type)
+static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
{
switch (type) {
case IRQ_TYPE_EDGE_RISING:
/* Rising edge sensitive */
- __lpc32xx_set_irq_type(irq, 1, 1);
+ __lpc32xx_set_irq_type(d->irq, 1, 1);
break;
case IRQ_TYPE_EDGE_FALLING:
/* Falling edge sensitive */
- __lpc32xx_set_irq_type(irq, 0, 1);
+ __lpc32xx_set_irq_type(d->irq, 0, 1);
break;
case IRQ_TYPE_LEVEL_LOW:
/* Low level sensitive */
- __lpc32xx_set_irq_type(irq, 0, 0);
+ __lpc32xx_set_irq_type(d->irq, 0, 0);
break;
case IRQ_TYPE_LEVEL_HIGH:
/* High level sensitive */
- __lpc32xx_set_irq_type(irq, 1, 0);
+ __lpc32xx_set_irq_type(d->irq, 1, 0);
break;
/* Other modes are not supported */
@@ -290,33 +290,33 @@ static int lpc32xx_set_irq_type(unsigned int irq, unsigned int type)
}
/* Ok to use the level handler for all types */
- set_irq_handler(irq, handle_level_irq);
+ set_irq_handler(d->irq, handle_level_irq);
return 0;
}
-static int lpc32xx_irq_wake(unsigned int irqno, unsigned int state)
+static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
{
unsigned long eventreg;
- if (lpc32xx_events[irqno].mask != 0) {
- eventreg = __raw_readl(lpc32xx_events[irqno].
+ if (lpc32xx_events[d->irq].mask != 0) {
+ eventreg = __raw_readl(lpc32xx_events[d->irq].
event_group->enab_reg);
if (state)
- eventreg |= lpc32xx_events[irqno].mask;
+ eventreg |= lpc32xx_events[d->irq].mask;
else
- eventreg &= ~lpc32xx_events[irqno].mask;
+ eventreg &= ~lpc32xx_events[d->irq].mask;
__raw_writel(eventreg,
- lpc32xx_events[irqno].event_group->enab_reg);
+ lpc32xx_events[d->irq].event_group->enab_reg);
return 0;
}
/* Clear event */
- __raw_writel(lpc32xx_events[irqno].mask,
- lpc32xx_events[irqno].event_group->rawstat_reg);
+ __raw_writel(lpc32xx_events[d->irq].mask,
+ lpc32xx_events[d->irq].event_group->rawstat_reg);
return -ENODEV;
}
@@ -336,11 +336,11 @@ static void __init lpc32xx_set_default_mappings(unsigned int apr,
}
static struct irq_chip lpc32xx_irq_chip = {
- .ack = lpc32xx_ack_irq,
- .mask = lpc32xx_mask_irq,
- .unmask = lpc32xx_unmask_irq,
- .set_type = lpc32xx_set_irq_type,
- .set_wake = lpc32xx_irq_wake
+ .irq_ack = lpc32xx_ack_irq,
+ .irq_mask = lpc32xx_mask_irq,
+ .irq_unmask = lpc32xx_unmask_irq,
+ .irq_set_type = lpc32xx_set_irq_type,
+ .irq_set_wake = lpc32xx_irq_wake
};
static void lpc32xx_sic1_handler(unsigned int irq, struct irq_desc *desc)
diff --git a/trunk/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/trunk/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index 117e30366087..4ad38629c3f6 100644
--- a/trunk/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/trunk/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -6,7 +6,7 @@
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x8 << 13)
+#define MFP_DRIVE_FAST (0x6 << 13)
/* GPIO */
#define GPIO0_GPIO MFP_CFG(GPIO0, AF0)
diff --git a/trunk/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/trunk/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
index 7e8a80f25ddc..fbd7ee8e4897 100644
--- a/trunk/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
+++ b/trunk/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
@@ -6,7 +6,7 @@
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x8 << 13)
+#define MFP_DRIVE_FAST (0x6 << 13)
/* UART2 */
#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)
diff --git a/trunk/arch/arm/mach-mmp/irq-mmp2.c b/trunk/arch/arm/mach-mmp/irq-mmp2.c
index 01342be91c3c..fa037038e7b8 100644
--- a/trunk/arch/arm/mach-mmp/irq-mmp2.c
+++ b/trunk/arch/arm/mach-mmp/irq-mmp2.c
@@ -20,48 +20,48 @@
#include "common.h"
-static void icu_mask_irq(unsigned int irq)
+static void icu_mask_irq(struct irq_data *d)
{
- uint32_t r = __raw_readl(ICU_INT_CONF(irq));
+ uint32_t r = __raw_readl(ICU_INT_CONF(d->irq));
r &= ~ICU_INT_ROUTE_PJ4_IRQ;
- __raw_writel(r, ICU_INT_CONF(irq));
+ __raw_writel(r, ICU_INT_CONF(d->irq));
}
-static void icu_unmask_irq(unsigned int irq)
+static void icu_unmask_irq(struct irq_data *d)
{
- uint32_t r = __raw_readl(ICU_INT_CONF(irq));
+ uint32_t r = __raw_readl(ICU_INT_CONF(d->irq));
r |= ICU_INT_ROUTE_PJ4_IRQ;
- __raw_writel(r, ICU_INT_CONF(irq));
+ __raw_writel(r, ICU_INT_CONF(d->irq));
}
static struct irq_chip icu_irq_chip = {
.name = "icu_irq",
- .mask = icu_mask_irq,
- .mask_ack = icu_mask_irq,
- .unmask = icu_unmask_irq,
+ .irq_mask = icu_mask_irq,
+ .irq_mask_ack = icu_mask_irq,
+ .irq_unmask = icu_unmask_irq,
};
-static void pmic_irq_ack(unsigned int irq)
+static void pmic_irq_ack(struct irq_data *d)
{
- if (irq == IRQ_MMP2_PMIC)
+ if (d->irq == IRQ_MMP2_PMIC)
mmp2_clear_pmic_int();
}
#define SECOND_IRQ_MASK(_name_, irq_base, prefix) \
-static void _name_##_mask_irq(unsigned int irq) \
+static void _name_##_mask_irq(struct irq_data *d) \
{ \
uint32_t r; \
- r = __raw_readl(prefix##_MASK) | (1 << (irq - irq_base)); \
+ r = __raw_readl(prefix##_MASK) | (1 << (d->irq - irq_base)); \
__raw_writel(r, prefix##_MASK); \
}
#define SECOND_IRQ_UNMASK(_name_, irq_base, prefix) \
-static void _name_##_unmask_irq(unsigned int irq) \
+static void _name_##_unmask_irq(struct irq_data *d) \
{ \
uint32_t r; \
- r = __raw_readl(prefix##_MASK) & ~(1 << (irq - irq_base)); \
+ r = __raw_readl(prefix##_MASK) & ~(1 << (d->irq - irq_base)); \
__raw_writel(r, prefix##_MASK); \
}
@@ -88,8 +88,8 @@ SECOND_IRQ_UNMASK(_name_, irq_base, prefix) \
SECOND_IRQ_DEMUX(_name_, irq_base, prefix) \
static struct irq_chip _name_##_irq_chip = { \
.name = #_name_, \
- .mask = _name_##_mask_irq, \
- .unmask = _name_##_unmask_irq, \
+ .irq_mask = _name_##_mask_irq, \
+ .irq_unmask = _name_##_unmask_irq, \
}
SECOND_IRQ_CHIP(pmic, IRQ_MMP2_PMIC_BASE, MMP2_ICU_INT4);
@@ -103,10 +103,12 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num)
int irq;
for (irq = start; num > 0; irq++, num--) {
+ struct irq_data *d = irq_get_irq_data(irq);
+
/* mask and clear the IRQ */
- chip->mask(irq);
- if (chip->ack)
- chip->ack(irq);
+ chip->irq_mask(d);
+ if (chip->irq_ack)
+ chip->irq_ack(d);
set_irq_chip(irq, chip);
set_irq_flags(irq, IRQF_VALID);
@@ -119,7 +121,7 @@ void __init mmp2_init_icu(void)
int irq;
for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
- icu_mask_irq(irq);
+ icu_mask_irq(irq_get_irq_data(irq));
set_irq_chip(irq, &icu_irq_chip);
set_irq_flags(irq, IRQF_VALID);
@@ -139,7 +141,7 @@ void __init mmp2_init_icu(void)
/* NOTE: IRQ_MMP2_PMIC requires the PMIC MFPR register
* to be written to clear the interrupt
*/
- pmic_irq_chip.ack = pmic_irq_ack;
+ pmic_irq_chip.irq_ack = pmic_irq_ack;
init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2);
init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2);
diff --git a/trunk/arch/arm/mach-mmp/irq-pxa168.c b/trunk/arch/arm/mach-mmp/irq-pxa168.c
index 52ff2f065eba..f86b450cb93c 100644
--- a/trunk/arch/arm/mach-mmp/irq-pxa168.c
+++ b/trunk/arch/arm/mach-mmp/irq-pxa168.c
@@ -25,21 +25,21 @@
#define PRIORITY_DEFAULT 0x1
#define PRIORITY_NONE 0x0 /* means IRQ disabled */
-static void icu_mask_irq(unsigned int irq)
+static void icu_mask_irq(struct irq_data *d)
{
- __raw_writel(PRIORITY_NONE, ICU_INT_CONF(irq));
+ __raw_writel(PRIORITY_NONE, ICU_INT_CONF(d->irq));
}
-static void icu_unmask_irq(unsigned int irq)
+static void icu_unmask_irq(struct irq_data *d)
{
- __raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(irq));
+ __raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(d->irq));
}
static struct irq_chip icu_irq_chip = {
- .name = "icu_irq",
- .ack = icu_mask_irq,
- .mask = icu_mask_irq,
- .unmask = icu_unmask_irq,
+ .name = "icu_irq",
+ .irq_ack = icu_mask_irq,
+ .irq_mask = icu_mask_irq,
+ .irq_unmask = icu_unmask_irq,
};
void __init icu_init_irq(void)
@@ -47,7 +47,7 @@ void __init icu_init_irq(void)
int irq;
for (irq = 0; irq < 64; irq++) {
- icu_mask_irq(irq);
+ icu_mask_irq(irq_get_irq_data(irq));
set_irq_chip(irq, &icu_irq_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
diff --git a/trunk/arch/arm/mach-msm/board-trout-gpio.c b/trunk/arch/arm/mach-msm/board-trout-gpio.c
index f8c09ef6666f..a604ec1e44bf 100644
--- a/trunk/arch/arm/mach-msm/board-trout-gpio.c
+++ b/trunk/arch/arm/mach-msm/board-trout-gpio.c
@@ -113,52 +113,52 @@ static struct msm_gpio_chip msm_gpio_banks[] = {
TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0),
};
-static void trout_gpio_irq_ack(unsigned int irq)
+static void trout_gpio_irq_ack(struct irq_data *d)
{
- int bank = TROUT_INT_TO_BANK(irq);
- uint8_t mask = TROUT_INT_TO_MASK(irq);
+ int bank = TROUT_INT_TO_BANK(d->irq);
+ uint8_t mask = TROUT_INT_TO_MASK(d->irq);
int reg = TROUT_BANK_TO_STAT_REG(bank);
- /*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", irq);*/
+ /*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", d->irq);*/
writeb(mask, TROUT_CPLD_BASE + reg);
}
-static void trout_gpio_irq_mask(unsigned int irq)
+static void trout_gpio_irq_mask(struct irq_data *d)
{
unsigned long flags;
uint8_t reg_val;
- int bank = TROUT_INT_TO_BANK(irq);
- uint8_t mask = TROUT_INT_TO_MASK(irq);
+ int bank = TROUT_INT_TO_BANK(d->irq);
+ uint8_t mask = TROUT_INT_TO_MASK(d->irq);
int reg = TROUT_BANK_TO_MASK_REG(bank);
local_irq_save(flags);
reg_val = trout_int_mask[bank] |= mask;
/*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n",
- irq, bank, reg_val);*/
+ d->irq, bank, reg_val);*/
writeb(reg_val, TROUT_CPLD_BASE + reg);
local_irq_restore(flags);
}
-static void trout_gpio_irq_unmask(unsigned int irq)
+static void trout_gpio_irq_unmask(struct irq_data *d)
{
unsigned long flags;
uint8_t reg_val;
- int bank = TROUT_INT_TO_BANK(irq);
- uint8_t mask = TROUT_INT_TO_MASK(irq);
+ int bank = TROUT_INT_TO_BANK(d->irq);
+ uint8_t mask = TROUT_INT_TO_MASK(d->irq);
int reg = TROUT_BANK_TO_MASK_REG(bank);
local_irq_save(flags);
reg_val = trout_int_mask[bank] &= ~mask;
/*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n",
- irq, bank, reg_val);*/
+ d->irq, bank, reg_val);*/
writeb(reg_val, TROUT_CPLD_BASE + reg);
local_irq_restore(flags);
}
-int trout_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+int trout_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
{
unsigned long flags;
- int bank = TROUT_INT_TO_BANK(irq);
- uint8_t mask = TROUT_INT_TO_MASK(irq);
+ int bank = TROUT_INT_TO_BANK(d->irq);
+ uint8_t mask = TROUT_INT_TO_MASK(d->irq);
local_irq_save(flags);
if(on)
@@ -198,15 +198,15 @@ static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
}
int_base += TROUT_INT_BANK0_COUNT;
}
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
}
static struct irq_chip trout_gpio_irq_chip = {
- .name = "troutgpio",
- .ack = trout_gpio_irq_ack,
- .mask = trout_gpio_irq_mask,
- .unmask = trout_gpio_irq_unmask,
- .set_wake = trout_gpio_irq_set_wake,
+ .name = "troutgpio",
+ .irq_ack = trout_gpio_irq_ack,
+ .irq_mask = trout_gpio_irq_mask,
+ .irq_unmask = trout_gpio_irq_unmask,
+ .irq_set_wake = trout_gpio_irq_set_wake,
};
/*
diff --git a/trunk/arch/arm/mach-msm/gpio.c b/trunk/arch/arm/mach-msm/gpio.c
index 33051b509e88..176af9dcb8ee 100644
--- a/trunk/arch/arm/mach-msm/gpio.c
+++ b/trunk/arch/arm/mach-msm/gpio.c
@@ -225,21 +225,21 @@ struct msm_gpio_chip msm_gpio_chips[] = {
#endif
};
-static void msm_gpio_irq_ack(unsigned int irq)
+static void msm_gpio_irq_ack(struct irq_data *d)
{
unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
+ struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
spin_lock_irqsave(&msm_chip->lock, irq_flags);
msm_gpio_clear_detect_status(msm_chip,
- irq - gpio_to_irq(msm_chip->chip.base));
+ d->irq - gpio_to_irq(msm_chip->chip.base));
spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
}
-static void msm_gpio_irq_mask(unsigned int irq)
+static void msm_gpio_irq_mask(struct irq_data *d)
{
unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
- unsigned offset = irq - gpio_to_irq(msm_chip->chip.base);
+ struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
+ unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
spin_lock_irqsave(&msm_chip->lock, irq_flags);
/* level triggered interrupts are also latched */
@@ -250,11 +250,11 @@ static void msm_gpio_irq_mask(unsigned int irq)
spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
}
-static void msm_gpio_irq_unmask(unsigned int irq)
+static void msm_gpio_irq_unmask(struct irq_data *d)
{
unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
- unsigned offset = irq - gpio_to_irq(msm_chip->chip.base);
+ struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
+ unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
spin_lock_irqsave(&msm_chip->lock, irq_flags);
/* level triggered interrupts are also latched */
@@ -265,11 +265,11 @@ static void msm_gpio_irq_unmask(unsigned int irq)
spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
}
-static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
{
unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
- unsigned offset = irq - gpio_to_irq(msm_chip->chip.base);
+ struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
+ unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
spin_lock_irqsave(&msm_chip->lock, irq_flags);
@@ -282,21 +282,21 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
return 0;
}
-static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq);
- unsigned offset = irq - gpio_to_irq(msm_chip->chip.base);
+ struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
+ unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
unsigned val, mask = BIT(offset);
spin_lock_irqsave(&msm_chip->lock, irq_flags);
val = readl(msm_chip->regs.int_edge);
if (flow_type & IRQ_TYPE_EDGE_BOTH) {
writel(val | mask, msm_chip->regs.int_edge);
- irq_desc[irq].handle_irq = handle_edge_irq;
+ irq_desc[d->irq].handle_irq = handle_edge_irq;
} else {
writel(val & ~mask, msm_chip->regs.int_edge);
- irq_desc[irq].handle_irq = handle_level_irq;
+ irq_desc[d->irq].handle_irq = handle_level_irq;
}
if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
msm_chip->both_edge_detect |= mask;
@@ -333,16 +333,16 @@ static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
msm_chip->chip.base + j);
}
}
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
}
static struct irq_chip msm_gpio_irq_chip = {
- .name = "msmgpio",
- .ack = msm_gpio_irq_ack,
- .mask = msm_gpio_irq_mask,
- .unmask = msm_gpio_irq_unmask,
- .set_wake = msm_gpio_irq_set_wake,
- .set_type = msm_gpio_irq_set_type,
+ .name = "msmgpio",
+ .irq_ack = msm_gpio_irq_ack,
+ .irq_mask = msm_gpio_irq_mask,
+ .irq_unmask = msm_gpio_irq_unmask,
+ .irq_set_wake = msm_gpio_irq_set_wake,
+ .irq_set_type = msm_gpio_irq_set_type,
};
static int __init msm_init_gpio(void)
diff --git a/trunk/arch/arm/mach-msm/irq-vic.c b/trunk/arch/arm/mach-msm/irq-vic.c
index 99f2c3473033..68c28bbdc969 100644
--- a/trunk/arch/arm/mach-msm/irq-vic.c
+++ b/trunk/arch/arm/mach-msm/irq-vic.c
@@ -226,19 +226,18 @@ static inline void msm_irq_write_all_regs(void __iomem *base, unsigned int val)
writel(val, base + (i * 4));
}
-static void msm_irq_ack(unsigned int irq)
+static void msm_irq_ack(struct irq_data *d)
{
- void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, irq);
- irq = 1 << (irq & 31);
- writel(irq, reg);
+ void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq);
+ writel(1 << (d->irq & 31), reg);
}
-static void msm_irq_mask(unsigned int irq)
+static void msm_irq_mask(struct irq_data *d)
{
- void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, irq);
- unsigned index = VIC_INT_TO_REG_INDEX(irq);
- uint32_t mask = 1UL << (irq & 31);
- int smsm_irq = msm_irq_to_smsm[irq];
+ void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, d->irq);
+ unsigned index = VIC_INT_TO_REG_INDEX(d->irq);
+ uint32_t mask = 1UL << (d->irq & 31);
+ int smsm_irq = msm_irq_to_smsm[d->irq];
msm_irq_shadow_reg[index].int_en[0] &= ~mask;
writel(mask, reg);
@@ -250,12 +249,12 @@ static void msm_irq_mask(unsigned int irq)
}
}
-static void msm_irq_unmask(unsigned int irq)
+static void msm_irq_unmask(struct irq_data *d)
{
- void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, irq);
- unsigned index = VIC_INT_TO_REG_INDEX(irq);
- uint32_t mask = 1UL << (irq & 31);
- int smsm_irq = msm_irq_to_smsm[irq];
+ void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, d->irq);
+ unsigned index = VIC_INT_TO_REG_INDEX(d->irq);
+ uint32_t mask = 1UL << (d->irq & 31);
+ int smsm_irq = msm_irq_to_smsm[d->irq];
msm_irq_shadow_reg[index].int_en[0] |= mask;
writel(mask, reg);
@@ -268,14 +267,14 @@ static void msm_irq_unmask(unsigned int irq)
}
}
-static int msm_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_irq_set_wake(struct irq_data *d, unsigned int on)
{
- unsigned index = VIC_INT_TO_REG_INDEX(irq);
- uint32_t mask = 1UL << (irq & 31);
- int smsm_irq = msm_irq_to_smsm[irq];
+ unsigned index = VIC_INT_TO_REG_INDEX(d->irq);
+ uint32_t mask = 1UL << (d->irq & 31);
+ int smsm_irq = msm_irq_to_smsm[d->irq];
if (smsm_irq == 0) {
- printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", irq);
+ printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", d->irq);
return -EINVAL;
}
if (on)
@@ -294,12 +293,12 @@ static int msm_irq_set_wake(unsigned int irq, unsigned int on)
return 0;
}
-static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
- void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, irq);
- void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, irq);
- unsigned index = VIC_INT_TO_REG_INDEX(irq);
- int b = 1 << (irq & 31);
+ void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, d->irq);
+ void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, d->irq);
+ unsigned index = VIC_INT_TO_REG_INDEX(d->irq);
+ int b = 1 << (d->irq & 31);
uint32_t polarity;
uint32_t type;
@@ -314,11 +313,11 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
type = msm_irq_shadow_reg[index].int_type;
if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
type |= b;
- irq_desc[irq].handle_irq = handle_edge_irq;
+ irq_desc[d->irq].handle_irq = handle_edge_irq;
}
if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
type &= ~b;
- irq_desc[irq].handle_irq = handle_level_irq;
+ irq_desc[d->irq].handle_irq = handle_level_irq;
}
writel(type, treg);
msm_irq_shadow_reg[index].int_type = type;
@@ -326,13 +325,13 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
}
static struct irq_chip msm_irq_chip = {
- .name = "msm",
- .disable = msm_irq_mask,
- .ack = msm_irq_ack,
- .mask = msm_irq_mask,
- .unmask = msm_irq_unmask,
- .set_wake = msm_irq_set_wake,
- .set_type = msm_irq_set_type,
+ .name = "msm",
+ .irq_disable = msm_irq_mask,
+ .irq_ack = msm_irq_ack,
+ .irq_mask = msm_irq_mask,
+ .irq_unmask = msm_irq_unmask,
+ .irq_set_wake = msm_irq_set_wake,
+ .irq_set_type = msm_irq_set_type,
};
void __init msm_init_irq(void)
diff --git a/trunk/arch/arm/mach-msm/irq.c b/trunk/arch/arm/mach-msm/irq.c
index 6c8d5f8caef3..0b27d899f40e 100644
--- a/trunk/arch/arm/mach-msm/irq.c
+++ b/trunk/arch/arm/mach-msm/irq.c
@@ -64,35 +64,34 @@
#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4))
#define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4))
-static void msm_irq_ack(unsigned int irq)
+static void msm_irq_ack(struct irq_data *d)
{
- void __iomem *reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0);
- irq = 1 << (irq & 31);
- writel(irq, reg);
+ void __iomem *reg = VIC_INT_CLEAR0 + ((d->irq & 32) ? 4 : 0);
+ writel(1 << (d->irq & 31), reg);
}
-static void msm_irq_mask(unsigned int irq)
+static void msm_irq_mask(struct irq_data *d)
{
- void __iomem *reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0);
- writel(1 << (irq & 31), reg);
+ void __iomem *reg = VIC_INT_ENCLEAR0 + ((d->irq & 32) ? 4 : 0);
+ writel(1 << (d->irq & 31), reg);
}
-static void msm_irq_unmask(unsigned int irq)
+static void msm_irq_unmask(struct irq_data *d)
{
- void __iomem *reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0);
- writel(1 << (irq & 31), reg);
+ void __iomem *reg = VIC_INT_ENSET0 + ((d->irq & 32) ? 4 : 0);
+ writel(1 << (d->irq & 31), reg);
}
-static int msm_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_irq_set_wake(struct irq_data *d, unsigned int on)
{
return -EINVAL;
}
-static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
- void __iomem *treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0);
- void __iomem *preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0);
- int b = 1 << (irq & 31);
+ void __iomem *treg = VIC_INT_TYPE0 + ((d->irq & 32) ? 4 : 0);
+ void __iomem *preg = VIC_INT_POLARITY0 + ((d->irq & 32) ? 4 : 0);
+ int b = 1 << (d->irq & 31);
if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
writel(readl(preg) | b, preg);
@@ -101,22 +100,22 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
writel(readl(treg) | b, treg);
- irq_desc[irq].handle_irq = handle_edge_irq;
+ irq_desc[d->irq].handle_irq = handle_edge_irq;
}
if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
writel(readl(treg) & (~b), treg);
- irq_desc[irq].handle_irq = handle_level_irq;
+ irq_desc[d->irq].handle_irq = handle_level_irq;
}
return 0;
}
static struct irq_chip msm_irq_chip = {
- .name = "msm",
- .ack = msm_irq_ack,
- .mask = msm_irq_mask,
- .unmask = msm_irq_unmask,
- .set_wake = msm_irq_set_wake,
- .set_type = msm_irq_set_type,
+ .name = "msm",
+ .irq_ack = msm_irq_ack,
+ .irq_mask = msm_irq_mask,
+ .irq_unmask = msm_irq_unmask,
+ .irq_set_wake = msm_irq_set_wake,
+ .irq_set_type = msm_irq_set_type,
};
void __init msm_init_irq(void)
diff --git a/trunk/arch/arm/mach-msm/sirc.c b/trunk/arch/arm/mach-msm/sirc.c
index 152eefda3ce6..11b54c7aeb09 100644
--- a/trunk/arch/arm/mach-msm/sirc.c
+++ b/trunk/arch/arm/mach-msm/sirc.c
@@ -42,12 +42,11 @@ static struct sirc_cascade_regs sirc_reg_table[] = {
/* Mask off the given interrupt. Keep the int_enable mask in sync with
the enable reg, so it can be restored after power collapse. */
-static void sirc_irq_mask(unsigned int irq)
+static void sirc_irq_mask(struct irq_data *d)
{
unsigned int mask;
-
- mask = 1 << (irq - FIRST_SIRC_IRQ);
+ mask = 1 << (d->irq - FIRST_SIRC_IRQ);
writel(mask, sirc_regs.int_enable_clear);
int_enable &= ~mask;
return;
@@ -55,31 +54,31 @@ static void sirc_irq_mask(unsigned int irq)
/* Unmask the given interrupt. Keep the int_enable mask in sync with
the enable reg, so it can be restored after power collapse. */
-static void sirc_irq_unmask(unsigned int irq)
+static void sirc_irq_unmask(struct irq_data *d)
{
unsigned int mask;
- mask = 1 << (irq - FIRST_SIRC_IRQ);
+ mask = 1 << (d->irq - FIRST_SIRC_IRQ);
writel(mask, sirc_regs.int_enable_set);
int_enable |= mask;
return;
}
-static void sirc_irq_ack(unsigned int irq)
+static void sirc_irq_ack(struct irq_data *d)
{
unsigned int mask;
- mask = 1 << (irq - FIRST_SIRC_IRQ);
+ mask = 1 << (d->irq - FIRST_SIRC_IRQ);
writel(mask, sirc_regs.int_clear);
return;
}
-static int sirc_irq_set_wake(unsigned int irq, unsigned int on)
+static int sirc_irq_set_wake(struct irq_data *d, unsigned int on)
{
unsigned int mask;
/* Used to set the interrupt enable mask during power collapse. */
- mask = 1 << (irq - FIRST_SIRC_IRQ);
+ mask = 1 << (d->irq - FIRST_SIRC_IRQ);
if (on)
wake_enable |= mask;
else
@@ -88,12 +87,12 @@ static int sirc_irq_set_wake(unsigned int irq, unsigned int on)
return 0;
}
-static int sirc_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
unsigned int mask;
unsigned int val;
- mask = 1 << (irq - FIRST_SIRC_IRQ);
+ mask = 1 << (d->irq - FIRST_SIRC_IRQ);
val = readl(sirc_regs.int_polarity);
if (flow_type & (IRQF_TRIGGER_LOW | IRQF_TRIGGER_FALLING))
@@ -106,10 +105,10 @@ static int sirc_irq_set_type(unsigned int irq, unsigned int flow_type)
val = readl(sirc_regs.int_type);
if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
val |= mask;
- irq_desc[irq].handle_irq = handle_edge_irq;
+ irq_desc[d->irq].handle_irq = handle_edge_irq;
} else {
val &= ~mask;
- irq_desc[irq].handle_irq = handle_level_irq;
+ irq_desc[d->irq].handle_irq = handle_level_irq;
}
writel(val, sirc_regs.int_type);
@@ -139,16 +138,16 @@ static void sirc_irq_handler(unsigned int irq, struct irq_desc *desc)
;
generic_handle_irq(sirq+FIRST_SIRC_IRQ);
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
}
static struct irq_chip sirc_irq_chip = {
- .name = "sirc",
- .ack = sirc_irq_ack,
- .mask = sirc_irq_mask,
- .unmask = sirc_irq_unmask,
- .set_wake = sirc_irq_set_wake,
- .set_type = sirc_irq_set_type,
+ .name = "sirc",
+ .irq_ack = sirc_irq_ack,
+ .irq_mask = sirc_irq_mask,
+ .irq_unmask = sirc_irq_unmask,
+ .irq_set_wake = sirc_irq_set_wake,
+ .irq_set_type = sirc_irq_set_type,
};
void __init msm_init_sirc(void)
diff --git a/trunk/arch/arm/mach-mx3/mach-mx31_3ds.c b/trunk/arch/arm/mach-mx3/mach-mx31_3ds.c
index 899a969e92fa..0d65db885be7 100644
--- a/trunk/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/trunk/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -147,10 +147,10 @@ static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
.init_data = &pwgtx_init,
}, {
- .id = MC13783_REGU_GPO1, /* Turn on 1.8V */
+ .id = MC13783_REG_GPO1, /* Turn on 1.8V */
.init_data = &gpo_init,
}, {
- .id = MC13783_REGU_GPO3, /* Turn on 3.3V */
+ .id = MC13783_REG_GPO3, /* Turn on 3.3V */
.init_data = &gpo_init,
},
};
diff --git a/trunk/arch/arm/mach-mx3/mach-mx31ads.c b/trunk/arch/arm/mach-mx3/mach-mx31ads.c
index b993b9bf6179..88b97d62b57e 100644
--- a/trunk/arch/arm/mach-mx3/mach-mx31ads.c
+++ b/trunk/arch/arm/mach-mx3/mach-mx31ads.c
@@ -162,9 +162,9 @@ static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
* Disable an expio pin's interrupt by setting the bit in the imr.
* @param irq an expio virtual irq number
*/
-static void expio_mask_irq(u32 irq)
+static void expio_mask_irq(struct irq_data *d)
{
- u32 expio = MXC_IRQ_TO_EXPIO(irq);
+ u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
/* mask the interrupt */
__raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG);
__raw_readw(PBC_INTMASK_CLEAR_REG);
@@ -174,9 +174,9 @@ static void expio_mask_irq(u32 irq)
* Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
* @param irq an expanded io virtual irq number
*/
-static void expio_ack_irq(u32 irq)
+static void expio_ack_irq(struct irq_data *d)
{
- u32 expio = MXC_IRQ_TO_EXPIO(irq);
+ u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
/* clear the interrupt status */
__raw_writew(1 << expio, PBC_INTSTATUS_REG);
}
@@ -185,18 +185,18 @@ static void expio_ack_irq(u32 irq)
* Enable a expio pin's interrupt by clearing the bit in the imr.
* @param irq a expio virtual irq number
*/
-static void expio_unmask_irq(u32 irq)
+static void expio_unmask_irq(struct irq_data *d)
{
- u32 expio = MXC_IRQ_TO_EXPIO(irq);
+ u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
/* unmask the interrupt */
__raw_writew(1 << expio, PBC_INTMASK_SET_REG);
}
static struct irq_chip expio_irq_chip = {
.name = "EXPIO(CPLD)",
- .ack = expio_ack_irq,
- .mask = expio_mask_irq,
- .unmask = expio_unmask_irq,
+ .irq_ack = expio_ack_irq,
+ .irq_mask = expio_mask_irq,
+ .irq_unmask = expio_unmask_irq,
};
static void __init mx31ads_init_expio(void)
diff --git a/trunk/arch/arm/mach-mx5/Kconfig b/trunk/arch/arm/mach-mx5/Kconfig
index 55254b6e9460..de4fa992fc3e 100644
--- a/trunk/arch/arm/mach-mx5/Kconfig
+++ b/trunk/arch/arm/mach-mx5/Kconfig
@@ -50,6 +50,7 @@ config MACH_MX51_BABBAGE
config MACH_MX51_3DS
bool "Support MX51PDK (3DS)"
select SOC_IMX51
+ select IMX_HAVE_PLATFORM_IMX_KEYPAD
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select IMX_HAVE_PLATFORM_SPI_IMX
@@ -77,6 +78,7 @@ choice
config MACH_EUKREA_MBIMX51_BASEBOARD
prompt "Eukrea MBIMX51 development board"
bool
+ select IMX_HAVE_PLATFORM_IMX_KEYPAD
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
help
This adds board specific devices that can be found on Eukrea's
@@ -124,10 +126,28 @@ config MACH_MX53_EVK
bool "Support MX53 EVK platforms"
select SOC_IMX53
select IMX_HAVE_PLATFORM_IMX_UART
+ select IMX_HAVE_PLATFORM_IMX_I2C
+ select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+ select IMX_HAVE_PLATFORM_SPI_IMX
help
Include support for MX53 EVK platform. This includes specific
configurations for the board and its peripherals.
+config MACH_MX53_SMD
+ bool "Support MX53 SMD platforms"
+ select SOC_IMX53
+ select IMX_HAVE_PLATFORM_IMX_UART
+ help
+ Include support for MX53 SMD platform. This includes specific
+ configurations for the board and its peripherals.
+
+config MACH_MX53_LOCO
+ bool "Support MX53 LOCO platforms"
+ select SOC_IMX53
+ select IMX_HAVE_PLATFORM_IMX_UART
+ help
+ Include support for MX53 LOCO platform. This includes specific
+ configurations for the board and its peripherals.
config MACH_MX50_RDP
bool "Support MX50 reference design platform"
diff --git a/trunk/arch/arm/mach-mx5/Makefile b/trunk/arch/arm/mach-mx5/Makefile
index 0c398baf11fe..0d43be98e51c 100644
--- a/trunk/arch/arm/mach-mx5/Makefile
+++ b/trunk/arch/arm/mach-mx5/Makefile
@@ -10,6 +10,8 @@ obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o
+obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o
+obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o
diff --git a/trunk/arch/arm/mach-mx5/board-mx51_3ds.c b/trunk/arch/arm/mach-mx5/board-mx51_3ds.c
index e42bd2eb034e..49d644842379 100644
--- a/trunk/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/trunk/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -12,7 +12,6 @@
#include
#include
-#include
#include
#include
@@ -120,14 +119,14 @@ static int mx51_3ds_board_keymap[] = {
KEY(3, 5, KEY_BACK)
};
-static struct matrix_keymap_data mx51_3ds_map_data = {
+static const struct matrix_keymap_data mx51_3ds_map_data __initconst = {
.keymap = mx51_3ds_board_keymap,
.keymap_size = ARRAY_SIZE(mx51_3ds_board_keymap),
};
static void mxc_init_keypad(void)
{
- mxc_register_device(&mxc_keypad_device, &mx51_3ds_map_data);
+ imx51_add_imx_keypad(&mx51_3ds_map_data);
}
#else
static inline void mxc_init_keypad(void)
diff --git a/trunk/arch/arm/mach-mx5/board-mx53_evk.c b/trunk/arch/arm/mach-mx5/board-mx53_evk.c
index fa97d0d5dd05..caee04c08238 100644
--- a/trunk/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/trunk/arch/arm/mach-mx5/board-mx53_evk.c
@@ -21,6 +21,11 @@
#include
#include
+#include
+#include
+#include
+#include
+#include
#include
#include
#include
@@ -29,6 +34,10 @@
#include
#include
+#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6)
+#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30)
+#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
+
#include "crm_regs.h"
#include "devices-imx53.h"
@@ -47,6 +56,14 @@ static iomux_v3_cfg_t mx53_evk_pads[] = {
MX53_PAD_ATA_CS_1__UART3_RXD,
MX53_PAD_ATA_DA_1__UART3_CTS,
MX53_PAD_ATA_DA_2__UART3_RTS,
+
+ MX53_PAD_EIM_D16__CSPI1_SCLK,
+ MX53_PAD_EIM_D17__CSPI1_MISO,
+ MX53_PAD_EIM_D18__CSPI1_MOSI,
+
+ /* ecspi chip select lines */
+ MX53_PAD_EIM_EB2__GPIO_2_30,
+ MX53_PAD_EIM_D19__GPIO_3_19,
};
static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = {
@@ -60,11 +77,68 @@ static inline void mx53_evk_init_uart(void)
imx53_add_imx_uart(2, &mx53_evk_uart_pdata);
}
+static const struct imxi2c_platform_data mx53_evk_i2c_data __initconst = {
+ .bitrate = 100000,
+};
+
+static inline void mx53_evk_fec_reset(void)
+{
+ int ret;
+
+ /* reset FEC PHY */
+ ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset");
+ if (ret) {
+ printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
+ return;
+ }
+ gpio_direction_output(SMD_FEC_PHY_RST, 0);
+ gpio_set_value(SMD_FEC_PHY_RST, 0);
+ msleep(1);
+ gpio_set_value(SMD_FEC_PHY_RST, 1);
+}
+
+static struct fec_platform_data mx53_evk_fec_pdata = {
+ .phy = PHY_INTERFACE_MODE_RMII,
+};
+
+static struct spi_board_info mx53_evk_spi_board_info[] __initdata = {
+ {
+ .modalias = "mtd_dataflash",
+ .max_speed_hz = 25000000,
+ .bus_num = 0,
+ .chip_select = 1,
+ .mode = SPI_MODE_0,
+ .platform_data = NULL,
+ },
+};
+
+static int mx53_evk_spi_cs[] = {
+ EVK_ECSPI1_CS0,
+ EVK_ECSPI1_CS1,
+};
+
+static const struct spi_imx_master mx53_evk_spi_data __initconst = {
+ .chipselect = mx53_evk_spi_cs,
+ .num_chipselect = ARRAY_SIZE(mx53_evk_spi_cs),
+};
+
static void __init mx53_evk_board_init(void)
{
mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads,
ARRAY_SIZE(mx53_evk_pads));
mx53_evk_init_uart();
+ mx53_evk_fec_reset();
+ imx53_add_fec(&mx53_evk_fec_pdata);
+
+ imx53_add_imx_i2c(0, &mx53_evk_i2c_data);
+ imx53_add_imx_i2c(1, &mx53_evk_i2c_data);
+
+ imx53_add_sdhci_esdhc_imx(0, NULL);
+ imx53_add_sdhci_esdhc_imx(1, NULL);
+
+ spi_register_board_info(mx53_evk_spi_board_info,
+ ARRAY_SIZE(mx53_evk_spi_board_info));
+ imx53_add_ecspi(0, &mx53_evk_spi_data);
}
static void __init mx53_evk_timer_init(void)
diff --git a/trunk/arch/arm/mach-mx5/board-mx53_loco.c b/trunk/arch/arm/mach-mx5/board-mx53_loco.c
new file mode 100644
index 000000000000..d1348e04ace3
--- /dev/null
+++ b/trunk/arch/arm/mach-mx5/board-mx53_loco.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include "crm_regs.h"
+#include "devices-imx53.h"
+
+#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
+
+static iomux_v3_cfg_t mx53_loco_pads[] = {
+ MX53_PAD_CSI0_D10__UART1_TXD,
+ MX53_PAD_CSI0_D11__UART1_RXD,
+ MX53_PAD_ATA_DIOW__UART1_TXD,
+ MX53_PAD_ATA_DMACK__UART1_RXD,
+
+ MX53_PAD_ATA_BUFFER_EN__UART2_RXD,
+ MX53_PAD_ATA_DMARQ__UART2_TXD,
+ MX53_PAD_ATA_DIOR__UART2_RTS,
+ MX53_PAD_ATA_INTRQ__UART2_CTS,
+
+ MX53_PAD_ATA_CS_0__UART3_TXD,
+ MX53_PAD_ATA_CS_1__UART3_RXD,
+ MX53_PAD_ATA_DA_1__UART3_CTS,
+ MX53_PAD_ATA_DA_2__UART3_RTS,
+};
+
+static const struct imxuart_platform_data mx53_loco_uart_data __initconst = {
+ .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static inline void mx53_loco_init_uart(void)
+{
+ imx53_add_imx_uart(0, &mx53_loco_uart_data);
+ imx53_add_imx_uart(1, &mx53_loco_uart_data);
+ imx53_add_imx_uart(2, &mx53_loco_uart_data);
+}
+
+static inline void mx53_loco_fec_reset(void)
+{
+ int ret;
+
+ /* reset FEC PHY */
+ ret = gpio_request(LOCO_FEC_PHY_RST, "fec-phy-reset");
+ if (ret) {
+ printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
+ return;
+ }
+ gpio_direction_output(LOCO_FEC_PHY_RST, 0);
+ msleep(1);
+ gpio_set_value(LOCO_FEC_PHY_RST, 1);
+}
+
+static struct fec_platform_data mx53_loco_fec_data = {
+ .phy = PHY_INTERFACE_MODE_RMII,
+};
+
+static void __init mx53_loco_board_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
+ ARRAY_SIZE(mx53_loco_pads));
+ mx53_loco_init_uart();
+ mx53_loco_fec_reset();
+ imx53_add_fec(&mx53_loco_fec_data);
+}
+
+static void __init mx53_loco_timer_init(void)
+{
+ mx53_clocks_init(32768, 24000000, 0, 0);
+}
+
+static struct sys_timer mx53_loco_timer = {
+ .init = mx53_loco_timer_init,
+};
+
+MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board")
+ .map_io = mx53_map_io,
+ .init_irq = mx53_init_irq,
+ .init_machine = mx53_loco_board_init,
+ .timer = &mx53_loco_timer,
+MACHINE_END
diff --git a/trunk/arch/arm/mach-mx5/board-mx53_smd.c b/trunk/arch/arm/mach-mx5/board-mx53_smd.c
new file mode 100644
index 000000000000..7970f7a48588
--- /dev/null
+++ b/trunk/arch/arm/mach-mx5/board-mx53_smd.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include "crm_regs.h"
+#include "devices-imx53.h"
+
+#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6)
+
+static iomux_v3_cfg_t mx53_smd_pads[] = {
+ MX53_PAD_CSI0_D10__UART1_TXD,
+ MX53_PAD_CSI0_D11__UART1_RXD,
+ MX53_PAD_ATA_DIOW__UART1_TXD,
+ MX53_PAD_ATA_DMACK__UART1_RXD,
+
+ MX53_PAD_ATA_BUFFER_EN__UART2_RXD,
+ MX53_PAD_ATA_DMARQ__UART2_TXD,
+ MX53_PAD_ATA_DIOR__UART2_RTS,
+ MX53_PAD_ATA_INTRQ__UART2_CTS,
+
+ MX53_PAD_ATA_CS_0__UART3_TXD,
+ MX53_PAD_ATA_CS_1__UART3_RXD,
+ MX53_PAD_ATA_DA_1__UART3_CTS,
+ MX53_PAD_ATA_DA_2__UART3_RTS,
+};
+
+static const struct imxuart_platform_data mx53_smd_uart_data __initconst = {
+ .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static inline void mx53_smd_init_uart(void)
+{
+ imx53_add_imx_uart(0, &mx53_smd_uart_data);
+ imx53_add_imx_uart(1, &mx53_smd_uart_data);
+ imx53_add_imx_uart(2, &mx53_smd_uart_data);
+}
+
+static inline void mx53_smd_fec_reset(void)
+{
+ int ret;
+
+ /* reset FEC PHY */
+ ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset");
+ if (ret) {
+ printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
+ return;
+ }
+ gpio_direction_output(SMD_FEC_PHY_RST, 0);
+ msleep(1);
+ gpio_set_value(SMD_FEC_PHY_RST, 1);
+}
+
+static struct fec_platform_data mx53_smd_fec_data = {
+ .phy = PHY_INTERFACE_MODE_RMII,
+};
+
+static void __init mx53_smd_board_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads,
+ ARRAY_SIZE(mx53_smd_pads));
+ mx53_smd_init_uart();
+ mx53_smd_fec_reset();
+ imx53_add_fec(&mx53_smd_fec_data);
+}
+
+static void __init mx53_smd_timer_init(void)
+{
+ mx53_clocks_init(32768, 24000000, 22579200, 0);
+}
+
+static struct sys_timer mx53_smd_timer = {
+ .init = mx53_smd_timer_init,
+};
+
+MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board")
+ .map_io = mx53_map_io,
+ .init_irq = mx53_init_irq,
+ .init_machine = mx53_smd_board_init,
+ .timer = &mx53_smd_timer,
+MACHINE_END
diff --git a/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c b/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c
index 785e1a336183..0a19e7567c0b 100644
--- a/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1191,6 +1191,11 @@ DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
NULL, NULL, &ipg_clk, &gpt_ipg_clk);
+DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,
+ NULL, NULL, &ipg_clk, NULL);
+DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
+ NULL, NULL, &ipg_clk, NULL);
+
/* I2C */
DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
NULL, NULL, &ipg_clk, NULL);
@@ -1283,6 +1288,8 @@ static struct clk_lookup mx51_lookups[] = {
_REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
_REGISTER_CLOCK(NULL, "gpt", gpt_clk)
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
+ _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)
+ _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)
_REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
_REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
_REGISTER_CLOCK("imx-i2c.2", NULL, hsi2c_clk)
@@ -1295,7 +1302,7 @@ static struct clk_lookup mx51_lookups[] = {
_REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_ahb_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk)
- _REGISTER_CLOCK("imx-keypad.0", NULL, kpp_clk)
+ _REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)
_REGISTER_CLOCK("mxc_nand", NULL, nfc_clk)
_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
@@ -1326,6 +1333,13 @@ static struct clk_lookup mx53_lookups[] = {
_REGISTER_CLOCK(NULL, "gpt", gpt_clk)
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
_REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
+ _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
+ _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
+ _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk)
+ _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk)
+ _REGISTER_CLOCK("imx53-ecspi.0", NULL, ecspi1_clk)
+ _REGISTER_CLOCK("imx53-ecspi.1", NULL, ecspi2_clk)
+ _REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk)
};
static void clk_tree_init(void)
@@ -1363,7 +1377,6 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
clk_tree_init();
- clk_set_parent(&uart_root_clk, &pll3_sw_clk);
clk_enable(&cpu_clk);
clk_enable(&main_bus_clk);
@@ -1406,6 +1419,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
clk_tree_init();
+ clk_set_parent(&uart_root_clk, &pll3_sw_clk);
clk_enable(&cpu_clk);
clk_enable(&main_bus_clk);
diff --git a/trunk/arch/arm/mach-mx5/devices-imx51.h b/trunk/arch/arm/mach-mx5/devices-imx51.h
index 6302e4670000..7fff485e5603 100644
--- a/trunk/arch/arm/mach-mx5/devices-imx51.h
+++ b/trunk/arch/arm/mach-mx5/devices-imx51.h
@@ -47,3 +47,11 @@ extern const struct imx_spi_imx_data imx51_ecspi_data[] __initconst;
extern const struct imx_imx2_wdt_data imx51_imx2_wdt_data[] __initconst;
#define imx51_add_imx2_wdt(id, pdata) \
imx_add_imx2_wdt(&imx51_imx2_wdt_data[id])
+
+extern const struct imx_mxc_pwm_data imx51_mxc_pwm_data[] __initconst;
+#define imx51_add_mxc_pwm(id) \
+ imx_add_mxc_pwm(&imx51_mxc_pwm_data[id])
+
+extern const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst;
+#define imx51_add_imx_keypad(pdata) \
+ imx_add_imx_keypad(&imx51_imx_keypad_data, pdata)
diff --git a/trunk/arch/arm/mach-mx5/devices-imx53.h b/trunk/arch/arm/mach-mx5/devices-imx53.h
index 9d0ec2507fa6..8639735a117b 100644
--- a/trunk/arch/arm/mach-mx5/devices-imx53.h
+++ b/trunk/arch/arm/mach-mx5/devices-imx53.h
@@ -8,6 +8,24 @@
#include
#include
+extern const struct imx_fec_data imx53_fec_data __initconst;
+#define imx53_add_fec(pdata) \
+ imx_add_fec(&imx53_fec_data, pdata)
+
extern const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst;
#define imx53_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx53_imx_uart_data[id], pdata)
+
+
+extern const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst;
+#define imx53_add_imx_i2c(id, pdata) \
+ imx_add_imx_i2c(&imx53_imx_i2c_data[id], pdata)
+
+extern const struct imx_sdhci_esdhc_imx_data
+imx53_sdhci_esdhc_imx_data[] __initconst;
+#define imx53_add_sdhci_esdhc_imx(id, pdata) \
+ imx_add_sdhci_esdhc_imx(&imx53_sdhci_esdhc_imx_data[id], pdata)
+
+extern const struct imx_spi_imx_data imx53_ecspi_data[] __initconst;
+#define imx53_add_ecspi(id, pdata) \
+ imx_add_spi_imx(&imx53_ecspi_data[id], pdata)
diff --git a/trunk/arch/arm/mach-mx5/devices.c b/trunk/arch/arm/mach-mx5/devices.c
index 1bda5cb339dc..153ada53e575 100644
--- a/trunk/arch/arm/mach-mx5/devices.c
+++ b/trunk/arch/arm/mach-mx5/devices.c
@@ -120,25 +120,6 @@ struct platform_device mxc_usbh2_device = {
},
};
-static struct resource mxc_kpp_resources[] = {
- {
- .start = MX51_MXC_INT_KPP,
- .end = MX51_MXC_INT_KPP,
- .flags = IORESOURCE_IRQ,
- } , {
- .start = MX51_KPP_BASE_ADDR,
- .end = MX51_KPP_BASE_ADDR + 0x8 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device mxc_keypad_device = {
- .name = "imx-keypad",
- .id = 0,
- .num_resources = ARRAY_SIZE(mxc_kpp_resources),
- .resource = mxc_kpp_resources,
-};
-
static struct mxc_gpio_port mxc_gpio_ports[] = {
{
.chip.label = "gpio-0",
diff --git a/trunk/arch/arm/mach-mx5/devices.h b/trunk/arch/arm/mach-mx5/devices.h
index 16891aa3573c..55a5129bc29f 100644
--- a/trunk/arch/arm/mach-mx5/devices.h
+++ b/trunk/arch/arm/mach-mx5/devices.h
@@ -3,4 +3,3 @@ extern struct platform_device mxc_usbh1_device;
extern struct platform_device mxc_usbh2_device;
extern struct platform_device mxc_usbdr_udc_device;
extern struct platform_device mxc_hsi2c_device;
-extern struct platform_device mxc_keypad_device;
diff --git a/trunk/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/trunk/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
index c96d018ff8a2..e83ffadb65f8 100644
--- a/trunk/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/trunk/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
@@ -21,7 +21,6 @@
#include
#include
#include
-#include
#include
#include
@@ -157,7 +156,7 @@ static int mbimx51_keymap[] = {
KEY(3, 3, KEY_ENTER),
};
-static struct matrix_keymap_data mbimx51_map_data = {
+static const struct matrix_keymap_data mbimx51_map_data __initconst = {
.keymap = mbimx51_keymap,
.keymap_size = ARRAY_SIZE(mbimx51_keymap),
};
@@ -209,7 +208,7 @@ void __init eukrea_mbimx51_baseboard_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
- mxc_register_device(&mxc_keypad_device, &mbimx51_map_data);
+ imx51_add_imx_keypad(&mbimx51_map_data);
gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
gpio_direction_input(MBIMX51_TSC2007_GPIO);
diff --git a/trunk/arch/arm/mach-mxs/Kconfig b/trunk/arch/arm/mach-mxs/Kconfig
index c4ac7b415195..8bfc8df54617 100644
--- a/trunk/arch/arm/mach-mxs/Kconfig
+++ b/trunk/arch/arm/mach-mxs/Kconfig
@@ -15,7 +15,7 @@ comment "MXS platforms:"
config MACH_MX23EVK
bool "Support MX23EVK Platform"
select SOC_IMX23
- select MXS_HAVE_PLATFORM_DUART
+ select MXS_HAVE_AMBA_DUART
default y
help
Include support for MX23EVK platform. This includes specific
@@ -24,7 +24,7 @@ config MACH_MX23EVK
config MACH_MX28EVK
bool "Support MX28EVK Platform"
select SOC_IMX28
- select MXS_HAVE_PLATFORM_DUART
+ select MXS_HAVE_AMBA_DUART
select MXS_HAVE_PLATFORM_FEC
default y
help
diff --git a/trunk/arch/arm/mach-mxs/clock-mx23.c b/trunk/arch/arm/mach-mxs/clock-mx23.c
index 8f5a19ab558c..b1a362ebfded 100644
--- a/trunk/arch/arm/mach-mxs/clock-mx23.c
+++ b/trunk/arch/arm/mach-mxs/clock-mx23.c
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
#include
#include
@@ -437,10 +438,12 @@ _DEFINE_CLOCK(clk32k_clk, XTAL, TIMROT_CLK32K_GATE, &ref_xtal_clk);
},
static struct clk_lookup lookups[] = {
- _REGISTER_CLOCK("mxs-duart.0", NULL, uart_clk)
+ /* for amba bus driver */
+ _REGISTER_CLOCK("duart", "apb_pclk", xbus_clk)
+ /* for amba-pl011 driver */
+ _REGISTER_CLOCK("duart", NULL, uart_clk)
_REGISTER_CLOCK("rtc", NULL, rtc_clk)
_REGISTER_CLOCK(NULL, "hclk", hbus_clk)
- _REGISTER_CLOCK(NULL, "xclk", xbus_clk)
_REGISTER_CLOCK(NULL, "usb", usb_clk)
_REGISTER_CLOCK(NULL, "audio", audio_clk)
_REGISTER_CLOCK(NULL, "pwm", pwm_clk)
@@ -518,6 +521,12 @@ int __init mx23_clocks_init(void)
{
clk_misc_init();
+ clk_enable(&cpu_clk);
+ clk_enable(&hbus_clk);
+ clk_enable(&xbus_clk);
+ clk_enable(&emi_clk);
+ clk_enable(&uart_clk);
+
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
mxs_timer_init(&clk32k_clk, MX23_INT_TIMER0);
diff --git a/trunk/arch/arm/mach-mxs/clock-mx28.c b/trunk/arch/arm/mach-mxs/clock-mx28.c
index 74e2103c6011..56312c092a9e 100644
--- a/trunk/arch/arm/mach-mxs/clock-mx28.c
+++ b/trunk/arch/arm/mach-mxs/clock-mx28.c
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
#include
#include
@@ -602,7 +603,12 @@ _DEFINE_CLOCK(fec_clk, ENET, DISABLE, &hbus_clk);
},
static struct clk_lookup lookups[] = {
- _REGISTER_CLOCK("mxs-duart.0", NULL, uart_clk)
+ /* for amba bus driver */
+ _REGISTER_CLOCK("duart", "apb_pclk", xbus_clk)
+ /* for amba-pl011 driver */
+ _REGISTER_CLOCK("duart", NULL, uart_clk)
+ _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
+ _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
_REGISTER_CLOCK("rtc", NULL, rtc_clk)
_REGISTER_CLOCK("pll2", NULL, pll2_clk)
@@ -726,6 +732,12 @@ int __init mx28_clocks_init(void)
{
clk_misc_init();
+ clk_enable(&cpu_clk);
+ clk_enable(&hbus_clk);
+ clk_enable(&xbus_clk);
+ clk_enable(&emi_clk);
+ clk_enable(&uart_clk);
+
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0);
diff --git a/trunk/arch/arm/mach-mxs/devices-mx23.h b/trunk/arch/arm/mach-mxs/devices-mx23.h
index d0f49fc0abb5..1256788561d0 100644
--- a/trunk/arch/arm/mach-mxs/devices-mx23.h
+++ b/trunk/arch/arm/mach-mxs/devices-mx23.h
@@ -11,6 +11,6 @@
#include
#include
-extern const struct mxs_duart_data mx23_duart_data __initconst;
+extern const struct amba_device mx23_duart_device __initconst;
#define mx23_add_duart() \
- mxs_add_duart(&mx23_duart_data)
+ mxs_add_duart(&mx23_duart_device)
diff --git a/trunk/arch/arm/mach-mxs/devices-mx28.h b/trunk/arch/arm/mach-mxs/devices-mx28.h
index 00b736c434ba..33773a6333a2 100644
--- a/trunk/arch/arm/mach-mxs/devices-mx28.h
+++ b/trunk/arch/arm/mach-mxs/devices-mx28.h
@@ -11,9 +11,9 @@
#include
#include
-extern const struct mxs_duart_data mx28_duart_data __initconst;
+extern const struct amba_device mx28_duart_device __initconst;
#define mx28_add_duart() \
- mxs_add_duart(&mx28_duart_data)
+ mxs_add_duart(&mx28_duart_device)
extern const struct mxs_fec_data mx28_fec_data[] __initconst;
#define mx28_add_fec(id, pdata) \
diff --git a/trunk/arch/arm/mach-mxs/devices.c b/trunk/arch/arm/mach-mxs/devices.c
index 6b60f02ca2e3..c20d54740b0b 100644
--- a/trunk/arch/arm/mach-mxs/devices.c
+++ b/trunk/arch/arm/mach-mxs/devices.c
@@ -19,9 +19,8 @@
#include
#include
#include
-#include
#include
-#include
+#include
struct platform_device *__init mxs_add_platform_device_dmamask(
const char *name, int id,
@@ -73,3 +72,17 @@ struct platform_device *__init mxs_add_platform_device_dmamask(
return pdev;
}
+
+int __init mxs_add_amba_device(const struct amba_device *dev)
+{
+ struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL);
+
+ if (!adev) {
+ pr_err("%s: failed to allocate memory", __func__);
+ return -ENOMEM;
+ }
+
+ *adev = *dev;
+
+ return amba_device_register(adev, &iomem_resource);
+}
diff --git a/trunk/arch/arm/mach-mxs/devices/Kconfig b/trunk/arch/arm/mach-mxs/devices/Kconfig
index a35a2dc55395..cf7dc1ae575b 100644
--- a/trunk/arch/arm/mach-mxs/devices/Kconfig
+++ b/trunk/arch/arm/mach-mxs/devices/Kconfig
@@ -1,5 +1,6 @@
-config MXS_HAVE_PLATFORM_DUART
+config MXS_HAVE_AMBA_DUART
bool
+ select ARM_AMBA
config MXS_HAVE_PLATFORM_FEC
bool
diff --git a/trunk/arch/arm/mach-mxs/devices/Makefile b/trunk/arch/arm/mach-mxs/devices/Makefile
index 4b5266a3e6d9..d0a09f6934b8 100644
--- a/trunk/arch/arm/mach-mxs/devices/Makefile
+++ b/trunk/arch/arm/mach-mxs/devices/Makefile
@@ -1,2 +1,2 @@
-obj-$(CONFIG_MXS_HAVE_PLATFORM_DUART) += platform-duart.o
+obj-$(CONFIG_MXS_HAVE_AMBA_DUART) += amba-duart.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o
diff --git a/trunk/arch/arm/mach-mxs/devices/amba-duart.c b/trunk/arch/arm/mach-mxs/devices/amba-duart.c
new file mode 100644
index 000000000000..a559db09b49c
--- /dev/null
+++ b/trunk/arch/arm/mach-mxs/devices/amba-duart.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2009-2010 Pengutronix
+ * Uwe Kleine-Koenig
+ *
+ * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+#include
+#include
+#include
+#include
+
+#define MXS_AMBA_DUART_DEVICE(name, soc) \
+const struct amba_device name##_device __initconst = { \
+ .dev = { \
+ .init_name = "duart", \
+ }, \
+ .res = { \
+ .start = soc ## _DUART_BASE_ADDR, \
+ .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \
+ .flags = IORESOURCE_MEM, \
+ }, \
+ .irq = {soc ## _INT_DUART, NO_IRQ}, \
+}
+
+#ifdef CONFIG_SOC_IMX23
+MXS_AMBA_DUART_DEVICE(mx23_duart, MX23);
+#endif
+
+#ifdef CONFIG_SOC_IMX28
+MXS_AMBA_DUART_DEVICE(mx28_duart, MX28);
+#endif
+
+int __init mxs_add_duart(const struct amba_device *dev)
+{
+ return mxs_add_amba_device(dev);
+}
diff --git a/trunk/arch/arm/mach-mxs/devices/platform-duart.c b/trunk/arch/arm/mach-mxs/devices/platform-duart.c
deleted file mode 100644
index 2fe0df5b0aad..000000000000
--- a/trunk/arch/arm/mach-mxs/devices/platform-duart.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) 2009-2010 Pengutronix
- * Uwe Kleine-Koenig
- *
- * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation.
- */
-#include
-#include
-#include
-
-#define mxs_duart_data_entry(soc) \
- { \
- .iobase = soc ## _DUART_BASE_ADDR, \
- .irq = soc ## _INT_DUART, \
- }
-
-#ifdef CONFIG_SOC_IMX23
-const struct mxs_duart_data mx23_duart_data __initconst =
- mxs_duart_data_entry(MX23);
-#endif
-
-#ifdef CONFIG_SOC_IMX28
-const struct mxs_duart_data mx28_duart_data __initconst =
- mxs_duart_data_entry(MX28);
-#endif
-
-struct platform_device *__init mxs_add_duart(
- const struct mxs_duart_data *data)
-{
- struct resource res[] = {
- {
- .start = data->iobase,
- .end = data->iobase + SZ_8K - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = data->irq,
- .end = data->irq,
- .flags = IORESOURCE_IRQ,
- },
- };
-
- return mxs_add_platform_device("mxs-duart", 0, res, ARRAY_SIZE(res),
- NULL, 0);
-}
diff --git a/trunk/arch/arm/mach-mxs/devices/platform-fec.c b/trunk/arch/arm/mach-mxs/devices/platform-fec.c
index c08168cf3dec..c42dff72b46c 100644
--- a/trunk/arch/arm/mach-mxs/devices/platform-fec.c
+++ b/trunk/arch/arm/mach-mxs/devices/platform-fec.c
@@ -45,6 +45,6 @@ struct platform_device *__init mxs_add_fec(
},
};
- return mxs_add_platform_device("fec", data->id,
+ return mxs_add_platform_device("imx28-fec", data->id,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
}
diff --git a/trunk/arch/arm/mach-mxs/include/mach/devices-common.h b/trunk/arch/arm/mach-mxs/include/mach/devices-common.h
index 3da48d4d3273..6c3d1a103433 100644
--- a/trunk/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/trunk/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
struct platform_device *mxs_add_platform_device_dmamask(
const char *name, int id,
@@ -24,14 +25,10 @@ static inline struct platform_device *mxs_add_platform_device(
name, id, res, num_resources, data, size_data, 0);
}
+int __init mxs_add_amba_device(const struct amba_device *dev);
+
/* duart */
-struct mxs_duart_data {
- resource_size_t iobase;
- resource_size_t iosize;
- resource_size_t irq;
-};
-struct platform_device *__init mxs_add_duart(
- const struct mxs_duart_data *data);
+int __init mxs_add_duart(const struct amba_device *dev);
/* fec */
#include
diff --git a/trunk/arch/arm/mach-mxs/mach-mx28evk.c b/trunk/arch/arm/mach-mxs/mach-mx28evk.c
index d162e95910f3..8e2c5975001e 100644
--- a/trunk/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/trunk/arch/arm/mach-mxs/mach-mx28evk.c
@@ -57,6 +57,19 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = {
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
MX28_PAD_ENET_CLK__CLKCTRL_ENET |
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
+ /* fec1 */
+ MX28_PAD_ENET0_CRS__ENET1_RX_EN |
+ (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
+ MX28_PAD_ENET0_RXD2__ENET1_RXD0 |
+ (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
+ MX28_PAD_ENET0_RXD3__ENET1_RXD1 |
+ (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
+ MX28_PAD_ENET0_COL__ENET1_TX_EN |
+ (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
+ MX28_PAD_ENET0_TXD2__ENET1_TXD0 |
+ (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
+ MX28_PAD_ENET0_TXD3__ENET1_TXD1 |
+ (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
/* phy power line */
MX28_PAD_SSP1_DATA3__GPIO_2_15 |
(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
@@ -106,8 +119,14 @@ static void __init mx28evk_fec_reset(void)
gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
}
-static const struct fec_platform_data mx28_fec_pdata __initconst = {
- .phy = PHY_INTERFACE_MODE_RMII,
+static struct fec_platform_data mx28_fec_pdata[] = {
+ {
+ /* fec0 */
+ .phy = PHY_INTERFACE_MODE_RMII,
+ }, {
+ /* fec1 */
+ .phy = PHY_INTERFACE_MODE_RMII,
+ },
};
static void __init mx28evk_init(void)
@@ -117,7 +136,8 @@ static void __init mx28evk_init(void)
mx28_add_duart();
mx28evk_fec_reset();
- mx28_add_fec(0, &mx28_fec_pdata);
+ mx28_add_fec(0, &mx28_fec_pdata[0]);
+ mx28_add_fec(1, &mx28_fec_pdata[1]);
}
static void __init mx28evk_timer_init(void)
diff --git a/trunk/arch/arm/mach-netx/generic.c b/trunk/arch/arm/mach-netx/generic.c
index 43da8bb4926b..29ffa750fbe6 100644
--- a/trunk/arch/arm/mach-netx/generic.c
+++ b/trunk/arch/arm/mach-netx/generic.c
@@ -88,13 +88,13 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
}
static int
-netx_hif_irq_type(unsigned int _irq, unsigned int type)
+netx_hif_irq_type(struct irq_data *d, unsigned int type)
{
unsigned int val, irq;
val = readl(NETX_DPMAS_IF_CONF1);
- irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+ irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
if (type & IRQ_TYPE_EDGE_RISING) {
DEBUG_IRQ("rising edges\n");
@@ -119,49 +119,49 @@ netx_hif_irq_type(unsigned int _irq, unsigned int type)
}
static void
-netx_hif_ack_irq(unsigned int _irq)
+netx_hif_ack_irq(struct irq_data *d)
{
unsigned int val, irq;
- irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+ irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
writel((1 << 24) << irq, NETX_DPMAS_INT_STAT);
val = readl(NETX_DPMAS_INT_EN);
val &= ~((1 << 24) << irq);
writel(val, NETX_DPMAS_INT_EN);
- DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
+ DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
}
static void
-netx_hif_mask_irq(unsigned int _irq)
+netx_hif_mask_irq(struct irq_data *d)
{
unsigned int val, irq;
- irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+ irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
val = readl(NETX_DPMAS_INT_EN);
val &= ~((1 << 24) << irq);
writel(val, NETX_DPMAS_INT_EN);
- DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
+ DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
}
static void
-netx_hif_unmask_irq(unsigned int _irq)
+netx_hif_unmask_irq(struct irq_data *d)
{
unsigned int val, irq;
- irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+ irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
val = readl(NETX_DPMAS_INT_EN);
val |= (1 << 24) << irq;
writel(val, NETX_DPMAS_INT_EN);
- DEBUG_IRQ("%s: irq %d\n", __func__, _irq);
+ DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
}
static struct irq_chip netx_hif_chip = {
- .ack = netx_hif_ack_irq,
- .mask = netx_hif_mask_irq,
- .unmask = netx_hif_unmask_irq,
- .set_type = netx_hif_irq_type,
+ .irq_ack = netx_hif_ack_irq,
+ .irq_mask = netx_hif_mask_irq,
+ .irq_unmask = netx_hif_unmask_irq,
+ .irq_set_type = netx_hif_irq_type,
};
void __init netx_init_irq(void)
diff --git a/trunk/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/trunk/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index b45bb3b802f1..0c0d5248c368 100644
--- a/trunk/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/trunk/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -37,44 +37,44 @@ void __init board_a9m9750dev_map_io(void)
ARRAY_SIZE(board_a9m9750dev_io_desc));
}
-static void a9m9750dev_fpga_ack_irq(unsigned int irq)
+static void a9m9750dev_fpga_ack_irq(struct irq_data *d)
{
/* nothing */
}
-static void a9m9750dev_fpga_mask_irq(unsigned int irq)
+static void a9m9750dev_fpga_mask_irq(struct irq_data *d)
{
u8 ier;
ier = __raw_readb(FPGA_IER);
- ier &= ~(1 << (irq - FPGA_IRQ(0)));
+ ier &= ~(1 << (d->irq - FPGA_IRQ(0)));
__raw_writeb(ier, FPGA_IER);
}
-static void a9m9750dev_fpga_maskack_irq(unsigned int irq)
+static void a9m9750dev_fpga_maskack_irq(struct irq_data *d)
{
- a9m9750dev_fpga_mask_irq(irq);
- a9m9750dev_fpga_ack_irq(irq);
+ a9m9750dev_fpga_mask_irq(d);
+ a9m9750dev_fpga_ack_irq(d);
}
-static void a9m9750dev_fpga_unmask_irq(unsigned int irq)
+static void a9m9750dev_fpga_unmask_irq(struct irq_data *d)
{
u8 ier;
ier = __raw_readb(FPGA_IER);
- ier |= 1 << (irq - FPGA_IRQ(0));
+ ier |= 1 << (d->irq - FPGA_IRQ(0));
__raw_writeb(ier, FPGA_IER);
}
static struct irq_chip a9m9750dev_fpga_chip = {
- .ack = a9m9750dev_fpga_ack_irq,
- .mask = a9m9750dev_fpga_mask_irq,
- .mask_ack = a9m9750dev_fpga_maskack_irq,
- .unmask = a9m9750dev_fpga_unmask_irq,
+ .irq_ack = a9m9750dev_fpga_ack_irq,
+ .irq_mask = a9m9750dev_fpga_mask_irq,
+ .irq_mask_ack = a9m9750dev_fpga_maskack_irq,
+ .irq_unmask = a9m9750dev_fpga_unmask_irq,
};
static void a9m9750dev_fpga_demux_handler(unsigned int irq,
@@ -82,7 +82,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
{
u8 stat = __raw_readb(FPGA_ISR);
- desc->chip->mask_ack(irq);
+ desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
while (stat != 0) {
int irqno = fls(stat) - 1;
@@ -92,7 +92,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
generic_handle_irq(FPGA_IRQ(irqno));
}
- desc->chip->unmask(irq);
+ desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
void __init board_a9m9750dev_init_irq(void)
diff --git a/trunk/arch/arm/mach-ns9xxx/irq.c b/trunk/arch/arm/mach-ns9xxx/irq.c
index 038f24d47023..389fa5c669de 100644
--- a/trunk/arch/arm/mach-ns9xxx/irq.c
+++ b/trunk/arch/arm/mach-ns9xxx/irq.c
@@ -22,40 +22,40 @@
#define irq2prio(i) (i)
#define prio2irq(p) (p)
-static void ns9xxx_mask_irq(unsigned int irq)
+static void ns9xxx_mask_irq(struct irq_data *d)
{
/* XXX: better use cpp symbols */
- int prio = irq2prio(irq);
+ int prio = irq2prio(d->irq);
u32 ic = __raw_readl(SYS_IC(prio / 4));
ic &= ~(1 << (7 + 8 * (3 - (prio & 3))));
__raw_writel(ic, SYS_IC(prio / 4));
}
-static void ns9xxx_ack_irq(unsigned int irq)
+static void ns9xxx_ack_irq(struct irq_data *d)
{
__raw_writel(0, SYS_ISRADDR);
}
-static void ns9xxx_maskack_irq(unsigned int irq)
+static void ns9xxx_maskack_irq(struct irq_data *d)
{
- ns9xxx_mask_irq(irq);
- ns9xxx_ack_irq(irq);
+ ns9xxx_mask_irq(d);
+ ns9xxx_ack_irq(d);
}
-static void ns9xxx_unmask_irq(unsigned int irq)
+static void ns9xxx_unmask_irq(struct irq_data *d)
{
/* XXX: better use cpp symbols */
- int prio = irq2prio(irq);
+ int prio = irq2prio(d->irq);
u32 ic = __raw_readl(SYS_IC(prio / 4));
ic |= 1 << (7 + 8 * (3 - (prio & 3)));
__raw_writel(ic, SYS_IC(prio / 4));
}
static struct irq_chip ns9xxx_chip = {
- .ack = ns9xxx_ack_irq,
- .mask = ns9xxx_mask_irq,
- .mask_ack = ns9xxx_maskack_irq,
- .unmask = ns9xxx_unmask_irq,
+ .irq_ack = ns9xxx_ack_irq,
+ .irq_mask = ns9xxx_mask_irq,
+ .irq_mask_ack = ns9xxx_maskack_irq,
+ .irq_unmask = ns9xxx_unmask_irq,
};
#if 0
@@ -92,10 +92,10 @@ static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
if (desc->status & IRQ_DISABLED)
out_mask:
- desc->chip->mask(irq);
+ desc->irq_data.chip->irq_mask(&desc->irq_data);
/* ack unconditionally to unmask lower prio irqs */
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
raw_spin_unlock(&desc->lock);
}
diff --git a/trunk/arch/arm/mach-nuc93x/irq.c b/trunk/arch/arm/mach-nuc93x/irq.c
index a7a88ea4ec31..1f8a05a22834 100644
--- a/trunk/arch/arm/mach-nuc93x/irq.c
+++ b/trunk/arch/arm/mach-nuc93x/irq.c
@@ -25,9 +25,9 @@
#include
#include
-static void nuc93x_irq_mask(unsigned int irq)
+static void nuc93x_irq_mask(struct irq_data *d)
{
- __raw_writel(1 << irq, REG_AIC_MDCR);
+ __raw_writel(1 << d->irq, REG_AIC_MDCR);
}
/*
@@ -35,21 +35,21 @@ static void nuc93x_irq_mask(unsigned int irq)
* to REG_AIC_EOSCR for ACK
*/
-static void nuc93x_irq_ack(unsigned int irq)
+static void nuc93x_irq_ack(struct irq_data *d)
{
__raw_writel(0x01, REG_AIC_EOSCR);
}
-static void nuc93x_irq_unmask(unsigned int irq)
+static void nuc93x_irq_unmask(struct irq_data *d)
{
- __raw_writel(1 << irq, REG_AIC_MECR);
+ __raw_writel(1 << d->irq, REG_AIC_MECR);
}
static struct irq_chip nuc93x_irq_chip = {
- .ack = nuc93x_irq_ack,
- .mask = nuc93x_irq_mask,
- .unmask = nuc93x_irq_unmask,
+ .irq_ack = nuc93x_irq_ack,
+ .irq_mask = nuc93x_irq_mask,
+ .irq_unmask = nuc93x_irq_unmask,
};
void __init nuc93x_init_irq(void)
diff --git a/trunk/arch/arm/mach-omap1/ams-delta-fiq.c b/trunk/arch/arm/mach-omap1/ams-delta-fiq.c
index 6c994e2d8879..152b32c15e28 100644
--- a/trunk/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/trunk/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -49,7 +49,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
irq_desc = irq_to_desc(IH_GPIO_BASE);
if (irq_desc)
- irq_chip = irq_desc->chip;
+ irq_chip = irq_desc->irq_data.chip;
/*
* For each handled GPIO interrupt, keep calling its interrupt handler
@@ -62,13 +62,15 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
while (irq_counter[gpio] < fiq_count) {
if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) {
+ struct irq_data *d = irq_get_irq_data(irq_num);
+
/*
* It looks like handle_edge_irq() that
* OMAP GPIO edge interrupts default to,
* expects interrupt already unmasked.
*/
- if (irq_chip && irq_chip->unmask)
- irq_chip->unmask(irq_num);
+ if (irq_chip && irq_chip->irq_unmask)
+ irq_chip->irq_unmask(d);
}
generic_handle_irq(irq_num);
diff --git a/trunk/arch/arm/mach-omap1/board-ams-delta.c b/trunk/arch/arm/mach-omap1/board-ams-delta.c
index bd0495a9ac3b..22cc8c8df6cb 100644
--- a/trunk/arch/arm/mach-omap1/board-ams-delta.c
+++ b/trunk/arch/arm/mach-omap1/board-ams-delta.c
@@ -179,6 +179,22 @@ static struct omap_board_config_kernel ams_delta_config[] = {
{ OMAP_TAG_LCD, &ams_delta_lcd_config },
};
+static struct resource ams_delta_nand_resources[] = {
+ [0] = {
+ .start = OMAP1_MPUIO_BASE,
+ .end = OMAP1_MPUIO_BASE +
+ OMAP_MPUIO_IO_CNTL + sizeof(u32) - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device ams_delta_nand_device = {
+ .name = "ams-delta-nand",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(ams_delta_nand_resources),
+ .resource = ams_delta_nand_resources,
+};
+
static struct resource ams_delta_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
@@ -265,6 +281,7 @@ static struct omap1_cam_platform_data ams_delta_camera_platform_data = {
};
static struct platform_device *ams_delta_devices[] __initdata = {
+ &ams_delta_nand_device,
&ams_delta_kp_device,
&ams_delta_lcd_device,
&ams_delta_led_device,
diff --git a/trunk/arch/arm/mach-omap1/fpga.c b/trunk/arch/arm/mach-omap1/fpga.c
index 8780e75cdc3d..0ace7998aaa5 100644
--- a/trunk/arch/arm/mach-omap1/fpga.c
+++ b/trunk/arch/arm/mach-omap1/fpga.c
@@ -30,9 +30,9 @@
#include
#include
-static void fpga_mask_irq(unsigned int irq)
+static void fpga_mask_irq(struct irq_data *d)
{
- irq -= OMAP_FPGA_IRQ_BASE;
+ unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
if (irq < 8)
__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
@@ -58,14 +58,14 @@ static inline u32 get_fpga_unmasked_irqs(void)
}
-static void fpga_ack_irq(unsigned int irq)
+static void fpga_ack_irq(struct irq_data *d)
{
/* Don't need to explicitly ACK FPGA interrupts */
}
-static void fpga_unmask_irq(unsigned int irq)
+static void fpga_unmask_irq(struct irq_data *d)
{
- irq -= OMAP_FPGA_IRQ_BASE;
+ unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
if (irq < 8)
__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
@@ -78,10 +78,10 @@ static void fpga_unmask_irq(unsigned int irq)
| (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
}
-static void fpga_mask_ack_irq(unsigned int irq)
+static void fpga_mask_ack_irq(struct irq_data *d)
{
- fpga_mask_irq(irq);
- fpga_ack_irq(irq);
+ fpga_mask_irq(d);
+ fpga_ack_irq(d);
}
void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
@@ -105,17 +105,17 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
static struct irq_chip omap_fpga_irq_ack = {
.name = "FPGA-ack",
- .ack = fpga_mask_ack_irq,
- .mask = fpga_mask_irq,
- .unmask = fpga_unmask_irq,
+ .irq_ack = fpga_mask_ack_irq,
+ .irq_mask = fpga_mask_irq,
+ .irq_unmask = fpga_unmask_irq,
};
static struct irq_chip omap_fpga_irq = {
.name = "FPGA",
- .ack = fpga_ack_irq,
- .mask = fpga_mask_irq,
- .unmask = fpga_unmask_irq,
+ .irq_ack = fpga_ack_irq,
+ .irq_mask = fpga_mask_irq,
+ .irq_unmask = fpga_unmask_irq,
};
/*
diff --git a/trunk/arch/arm/mach-omap1/irq.c b/trunk/arch/arm/mach-omap1/irq.c
index 6bddbc869f4c..47701584df35 100644
--- a/trunk/arch/arm/mach-omap1/irq.c
+++ b/trunk/arch/arm/mach-omap1/irq.c
@@ -70,48 +70,48 @@ static inline void irq_bank_writel(unsigned long value, int bank, int offset)
omap_writel(value, irq_banks[bank].base_reg + offset);
}
-static void omap_ack_irq(unsigned int irq)
+static void omap_ack_irq(struct irq_data *d)
{
- if (irq > 31)
+ if (d->irq > 31)
omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET);
omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET);
}
-static void omap_mask_irq(unsigned int irq)
+static void omap_mask_irq(struct irq_data *d)
{
- int bank = IRQ_BANK(irq);
+ int bank = IRQ_BANK(d->irq);
u32 l;
l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
- l |= 1 << IRQ_BIT(irq);
+ l |= 1 << IRQ_BIT(d->irq);
omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
}
-static void omap_unmask_irq(unsigned int irq)
+static void omap_unmask_irq(struct irq_data *d)
{
- int bank = IRQ_BANK(irq);
+ int bank = IRQ_BANK(d->irq);
u32 l;
l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
- l &= ~(1 << IRQ_BIT(irq));
+ l &= ~(1 << IRQ_BIT(d->irq));
omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
}
-static void omap_mask_ack_irq(unsigned int irq)
+static void omap_mask_ack_irq(struct irq_data *d)
{
- omap_mask_irq(irq);
- omap_ack_irq(irq);
+ omap_mask_irq(d);
+ omap_ack_irq(d);
}
-static int omap_wake_irq(unsigned int irq, unsigned int enable)
+static int omap_wake_irq(struct irq_data *d, unsigned int enable)
{
- int bank = IRQ_BANK(irq);
+ int bank = IRQ_BANK(d->irq);
if (enable)
- irq_banks[bank].wake_enable |= IRQ_BIT(irq);
+ irq_banks[bank].wake_enable |= IRQ_BIT(d->irq);
else
- irq_banks[bank].wake_enable &= ~IRQ_BIT(irq);
+ irq_banks[bank].wake_enable &= ~IRQ_BIT(d->irq);
return 0;
}
@@ -168,10 +168,10 @@ static struct omap_irq_bank omap1610_irq_banks[] = {
static struct irq_chip omap_irq_chip = {
.name = "MPU",
- .ack = omap_mask_ack_irq,
- .mask = omap_mask_irq,
- .unmask = omap_unmask_irq,
- .set_wake = omap_wake_irq,
+ .irq_ack = omap_mask_ack_irq,
+ .irq_mask = omap_mask_irq,
+ .irq_unmask = omap_unmask_irq,
+ .irq_set_wake = omap_wake_irq,
};
void __init omap_init_irq(void)
@@ -239,9 +239,9 @@ void __init omap_init_irq(void)
/* Unmask level 2 handler */
if (cpu_is_omap7xx())
- omap_unmask_irq(INT_7XX_IH2_IRQ);
+ omap_unmask_irq(irq_get_irq_data(INT_7XX_IH2_IRQ));
else if (cpu_is_omap15xx())
- omap_unmask_irq(INT_1510_IH2_IRQ);
+ omap_unmask_irq(irq_get_irq_data(INT_1510_IH2_IRQ));
else if (cpu_is_omap16xx())
- omap_unmask_irq(INT_1610_IH2_IRQ);
+ omap_unmask_irq(irq_get_irq_data(INT_1610_IH2_IRQ));
}
diff --git a/trunk/arch/arm/mach-omap2/board-4430sdp.c b/trunk/arch/arm/mach-omap2/board-4430sdp.c
index a70bdf28e2bc..07d1b20b1148 100644
--- a/trunk/arch/arm/mach-omap2/board-4430sdp.c
+++ b/trunk/arch/arm/mach-omap2/board-4430sdp.c
@@ -554,6 +554,7 @@ static void __init omap_sfh7741prox_init(void)
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
+ OMAP4_MUX(USBB2_ULPITLL_CLK, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
@@ -576,11 +577,12 @@ static void __init omap_4430sdp_init(void)
omap4_twl6030_hsmmc_init(mmc);
/* Power on the ULPI PHY */
- if (gpio_is_valid(OMAP4SDP_MDM_PWR_EN_GPIO)) {
- /* FIXME: Assumes pad is already muxed for GPIO mode */
- gpio_request(OMAP4SDP_MDM_PWR_EN_GPIO, "USBB1 PHY VMDM_3V3");
+ status = gpio_request(OMAP4SDP_MDM_PWR_EN_GPIO, "USBB1 PHY VMDM_3V3");
+ if (status)
+ pr_err("%s: Could not get USBB1 PHY GPIO\n", __func__);
+ else
gpio_direction_output(OMAP4SDP_MDM_PWR_EN_GPIO, 1);
- }
+
usb_ehci_init(&ehci_pdata);
usb_musb_init(&musb_board_data);
diff --git a/trunk/arch/arm/mach-omap2/board-igep0020.c b/trunk/arch/arm/mach-omap2/board-igep0020.c
index ebaa230e67ed..3be85a1f55f4 100644
--- a/trunk/arch/arm/mach-omap2/board-igep0020.c
+++ b/trunk/arch/arm/mach-omap2/board-igep0020.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include
#include
#include
@@ -541,6 +542,37 @@ static struct twl4030_codec_data igep2_codec_data = {
.audio = &igep2_audio_data,
};
+static int igep2_keymap[] = {
+ KEY(0, 0, KEY_LEFT),
+ KEY(0, 1, KEY_RIGHT),
+ KEY(0, 2, KEY_A),
+ KEY(0, 3, KEY_B),
+ KEY(1, 0, KEY_DOWN),
+ KEY(1, 1, KEY_UP),
+ KEY(1, 2, KEY_E),
+ KEY(1, 3, KEY_F),
+ KEY(2, 0, KEY_ENTER),
+ KEY(2, 1, KEY_I),
+ KEY(2, 2, KEY_J),
+ KEY(2, 3, KEY_K),
+ KEY(3, 0, KEY_M),
+ KEY(3, 1, KEY_N),
+ KEY(3, 2, KEY_O),
+ KEY(3, 3, KEY_P)
+};
+
+static struct matrix_keymap_data igep2_keymap_data = {
+ .keymap = igep2_keymap,
+ .keymap_size = ARRAY_SIZE(igep2_keymap),
+};
+
+static struct twl4030_keypad_data igep2_keypad_pdata = {
+ .keymap_data = &igep2_keymap_data,
+ .rows = 4,
+ .cols = 4,
+ .rep = 1,
+};
+
static struct twl4030_platform_data igep2_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
@@ -549,6 +581,7 @@ static struct twl4030_platform_data igep2_twldata = {
.usb = &igep2_usb_data,
.codec = &igep2_codec_data,
.gpio = &igep2_twl4030_gpio_pdata,
+ .keypad = &igep2_keypad_pdata,
.vmmc1 = &igep2_vmmc1,
.vpll2 = &igep2_vpll2,
.vio = &igep2_vio,
diff --git a/trunk/arch/arm/mach-omap2/board-igep0030.c b/trunk/arch/arm/mach-omap2/board-igep0030.c
index bcccd68f1856..4dc62a9b9cb2 100644
--- a/trunk/arch/arm/mach-omap2/board-igep0030.c
+++ b/trunk/arch/arm/mach-omap2/board-igep0030.c
@@ -19,6 +19,7 @@
#include
#include
+#include
#include
#include
@@ -43,7 +44,7 @@
#define IGEP3_GPIO_WIFI_NRESET 139
#define IGEP3_GPIO_BT_NRESET 137
-#define IGEP3_GPIO_USBH_NRESET 115
+#define IGEP3_GPIO_USBH_NRESET 183
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
@@ -103,7 +104,7 @@ static struct platform_device igep3_onenand_device = {
},
};
-void __init igep3_flash_init(void)
+static void __init igep3_flash_init(void)
{
u8 cs = 0;
u8 onenandcs = GPMC_CS_NUM + 1;
@@ -137,12 +138,11 @@ void __init igep3_flash_init(void)
}
#else
-void __init igep3_flash_init(void) {}
+static void __init igep3_flash_init(void) {}
#endif
-static struct regulator_consumer_supply igep3_vmmc1_supply = {
- .supply = "vmmc",
-};
+static struct regulator_consumer_supply igep3_vmmc1_supply =
+ REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0");
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
static struct regulator_init_data igep3_vmmc1 = {
@@ -159,6 +159,52 @@ static struct regulator_init_data igep3_vmmc1 = {
.consumer_supplies = &igep3_vmmc1_supply,
};
+static struct regulator_consumer_supply igep3_vio_supply =
+ REGULATOR_SUPPLY("vmmc_aux", "mmci-omap-hs.1");
+
+static struct regulator_init_data igep3_vio = {
+ .constraints = {
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .apply_uV = 1,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
+ | REGULATOR_CHANGE_MODE
+ | REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = &igep3_vio_supply,
+};
+
+static struct regulator_consumer_supply igep3_vmmc2_supply =
+ REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1");
+
+static struct regulator_init_data igep3_vmmc2 = {
+ .constraints = {
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .always_on = 1,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = &igep3_vmmc2_supply,
+};
+
+static struct fixed_voltage_config igep3_vwlan = {
+ .supply_name = "vwlan",
+ .microvolts = 3300000,
+ .gpio = -EINVAL,
+ .enabled_at_boot = 1,
+ .init_data = &igep3_vmmc2,
+};
+
+static struct platform_device igep3_vwlan_device = {
+ .name = "reg-fixed-voltage",
+ .id = 0,
+ .dev = {
+ .platform_data = &igep3_vwlan,
+ },
+};
+
static struct omap2_hsmmc_info mmc[] = {
[0] = {
.mmc = 1,
@@ -254,12 +300,6 @@ static int igep3_twl4030_gpio_setup(struct device *dev,
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
- /*
- * link regulators to MMC adapters ... we "know" the
- * regulators will be set up only *after* we return.
- */
- igep3_vmmc1_supply.dev = mmc[0].dev;
-
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
if ((gpio_request(gpio+TWL4030_GPIO_MAX+1, "gpio-led:green:d1") == 0)
@@ -287,6 +327,10 @@ static struct twl4030_usb_data igep3_twl4030_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
+static struct platform_device *igep3_devices[] __initdata = {
+ &igep3_vwlan_device,
+};
+
static void __init igep3_init_irq(void)
{
omap2_init_common_infrastructure();
@@ -303,6 +347,7 @@ static struct twl4030_platform_data igep3_twl4030_pdata = {
.usb = &igep3_twl4030_usb_data,
.gpio = &igep3_twl4030_gpio_pdata,
.vmmc1 = &igep3_vmmc1,
+ .vio = &igep3_vio,
};
static struct i2c_board_info __initdata igep3_i2c_boardinfo[] = {
@@ -363,8 +408,20 @@ static void __init igep3_wifi_bt_init(void)
void __init igep3_wifi_bt_init(void) {}
#endif
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+ .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+ .phy_reset = true,
+ .reset_gpio_port[0] = -EINVAL,
+ .reset_gpio_port[1] = IGEP3_GPIO_USBH_NRESET,
+ .reset_gpio_port[2] = -EINVAL,
+};
+
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
+ OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#endif
@@ -375,9 +432,10 @@ static void __init igep3_init(void)
/* Register I2C busses and drivers */
igep3_i2c_init();
-
+ platform_add_devices(igep3_devices, ARRAY_SIZE(igep3_devices));
omap_serial_init();
usb_musb_init(&musb_board_data);
+ usb_ehci_init(&ehci_pdata);
igep3_flash_init();
igep3_leds_init();
@@ -392,6 +450,7 @@ static void __init igep3_init(void)
MACHINE_START(IGEP0030, "IGEP OMAP3 module")
.boot_params = 0x80000100,
+ .reserve = omap_reserve,
.map_io = omap3_map_io,
.init_irq = igep3_init_irq,
.init_machine = igep3_init,
diff --git a/trunk/arch/arm/mach-omap2/board-omap3beagle.c b/trunk/arch/arm/mach-omap2/board-omap3beagle.c
index a4fe8e1ee1bd..46d814ab5656 100644
--- a/trunk/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/trunk/arch/arm/mach-omap2/board-omap3beagle.c
@@ -207,7 +207,7 @@ static struct omap_dss_device beagle_dvi_device = {
.driver_name = "generic_dpi_panel",
.data = &dvi_panel,
.phy.dpi.data_lines = 24,
- .reset_gpio = 170,
+ .reset_gpio = -EINVAL,
};
static struct omap_dss_device beagle_tv_device = {
@@ -279,6 +279,8 @@ static struct gpio_led gpio_leds[];
static int beagle_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
+ int r;
+
if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) {
mmc[0].gpio_wp = -EINVAL;
} else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) ||
@@ -299,17 +301,63 @@ static int beagle_twl_gpio_setup(struct device *dev,
/* REVISIT: need ehci-omap hooks for external VBUS
* power switch and overcurrent detect
*/
+ if (omap3_beagle_get_rev() != OMAP3BEAGLE_BOARD_XM) {
+ r = gpio_request(gpio + 1, "EHCI_nOC");
+ if (!r) {
+ r = gpio_direction_input(gpio + 1);
+ if (r)
+ gpio_free(gpio + 1);
+ }
+ if (r)
+ pr_err("%s: unable to configure EHCI_nOC\n", __func__);
+ }
- gpio_request(gpio + 1, "EHCI_nOC");
- gpio_direction_input(gpio + 1);
-
- /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
+ /*
+ * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
+ * high / others active low)
+ */
gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
- gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM)
+ gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
+ else
+ gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+
+ /* DVI reset GPIO is different between beagle revisions */
+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM)
+ beagle_dvi_device.reset_gpio = 129;
+ else
+ beagle_dvi_device.reset_gpio = 170;
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
+ /*
+ * gpio + 1 on Xm controls the TFP410's enable line (active low)
+ * gpio + 2 control varies depending on the board rev as follows:
+ * P7/P8 revisions(prototype): Camera EN
+ * A2+ revisions (production): LDO (supplies DVI, serial, led blocks)
+ */
+ if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) {
+ r = gpio_request(gpio + 1, "nDVI_PWR_EN");
+ if (!r) {
+ r = gpio_direction_output(gpio + 1, 0);
+ if (r)
+ gpio_free(gpio + 1);
+ }
+ if (r)
+ pr_err("%s: unable to configure nDVI_PWR_EN\n",
+ __func__);
+ r = gpio_request(gpio + 2, "DVI_LDO_EN");
+ if (!r) {
+ r = gpio_direction_output(gpio + 2, 1);
+ if (r)
+ gpio_free(gpio + 2);
+ }
+ if (r)
+ pr_err("%s: unable to configure DVI_LDO_EN\n",
+ __func__);
+ }
+
return 0;
}
diff --git a/trunk/arch/arm/mach-omap2/board-omap4panda.c b/trunk/arch/arm/mach-omap2/board-omap4panda.c
index 3094e2007844..e001a048dc0c 100644
--- a/trunk/arch/arm/mach-omap2/board-omap4panda.c
+++ b/trunk/arch/arm/mach-omap2/board-omap4panda.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -95,7 +96,16 @@ static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
static void __init omap4_ehci_init(void)
{
int ret;
+ struct clk *phy_ref_clk;
+ /* FREF_CLK3 provides the 19.2 MHz reference clock to the PHY */
+ phy_ref_clk = clk_get(NULL, "auxclk3_ck");
+ if (IS_ERR(phy_ref_clk)) {
+ pr_err("Cannot request auxclk3\n");
+ goto error1;
+ }
+ clk_set_rate(phy_ref_clk, 19200000);
+ clk_enable(phy_ref_clk);
/* disable the power to the usb hub prior to init */
ret = gpio_request(GPIO_HUB_POWER, "hub_power");
diff --git a/trunk/arch/arm/mach-omap2/board-zoom-peripherals.c b/trunk/arch/arm/mach-omap2/board-zoom-peripherals.c
index 14d95afa3f0d..e0e040f34c68 100644
--- a/trunk/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/trunk/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -192,7 +192,7 @@ static struct platform_device omap_vwlan_device = {
},
};
-struct wl12xx_platform_data omap_zoom_wlan_data __initdata = {
+static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = {
.irq = OMAP_GPIO_IRQ(OMAP_ZOOM_WLAN_IRQ_GPIO),
/* ZOOM ref clock is 26 MHz */
.board_ref_clock = 1,
@@ -286,7 +286,7 @@ static int zoom_twl_gpio_setup(struct device *dev,
}
/* EXTMUTE callback function */
-void zoom2_set_hs_extmute(int mute)
+static void zoom2_set_hs_extmute(int mute)
{
gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute);
}
diff --git a/trunk/arch/arm/mach-omap2/clock3xxx_data.c b/trunk/arch/arm/mach-omap2/clock3xxx_data.c
index d3ab1c9e50b0..403a4a1d3f9c 100644
--- a/trunk/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/trunk/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3286,7 +3286,7 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
- CLK("ehci-omap.0", "usbtll_fck", &usbtll_fck, CK_3430ES2 | CK_AM35XX),
+ CLK("ehci-omap.0", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
diff --git a/trunk/arch/arm/mach-omap2/clockdomain.h b/trunk/arch/arm/mach-omap2/clockdomain.h
index de3faa20b46b..9b459c26fb85 100644
--- a/trunk/arch/arm/mach-omap2/clockdomain.h
+++ b/trunk/arch/arm/mach-omap2/clockdomain.h
@@ -103,9 +103,7 @@ struct clockdomain {
const char *name;
struct powerdomain *ptr;
} pwrdm;
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
const u16 clktrctrl_mask;
-#endif
const u8 flags;
const u8 dep_bit;
const u8 prcm_partition;
diff --git a/trunk/arch/arm/mach-omap2/devices.c b/trunk/arch/arm/mach-omap2/devices.c
index 381f4eb92352..2c9c912f2c42 100644
--- a/trunk/arch/arm/mach-omap2/devices.c
+++ b/trunk/arch/arm/mach-omap2/devices.c
@@ -978,7 +978,7 @@ static int __init omap2_init_devices(void)
arch_initcall(omap2_init_devices);
#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
-struct omap_device_pm_latency omap_wdt_latency[] = {
+static struct omap_device_pm_latency omap_wdt_latency[] = {
[0] = {
.deactivate_func = omap_device_idle_hwmods,
.activate_func = omap_device_enable_hwmods,
diff --git a/trunk/arch/arm/mach-omap2/irq.c b/trunk/arch/arm/mach-omap2/irq.c
index 85bf8ca95fd3..23049c487c47 100644
--- a/trunk/arch/arm/mach-omap2/irq.c
+++ b/trunk/arch/arm/mach-omap2/irq.c
@@ -100,13 +100,14 @@ static int omap_check_spurious(unsigned int irq)
}
/* XXX: FIQ and additional INTC support (only MPU at the moment) */
-static void omap_ack_irq(unsigned int irq)
+static void omap_ack_irq(struct irq_data *d)
{
intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL);
}
-static void omap_mask_irq(unsigned int irq)
+static void omap_mask_irq(struct irq_data *d)
{
+ unsigned int irq = d->irq;
int offset = irq & (~(IRQ_BITS_PER_REG - 1));
if (cpu_is_omap34xx()) {
@@ -128,8 +129,9 @@ static void omap_mask_irq(unsigned int irq)
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
}
-static void omap_unmask_irq(unsigned int irq)
+static void omap_unmask_irq(struct irq_data *d)
{
+ unsigned int irq = d->irq;
int offset = irq & (~(IRQ_BITS_PER_REG - 1));
irq &= (IRQ_BITS_PER_REG - 1);
@@ -137,17 +139,17 @@ static void omap_unmask_irq(unsigned int irq)
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
}
-static void omap_mask_ack_irq(unsigned int irq)
+static void omap_mask_ack_irq(struct irq_data *d)
{
- omap_mask_irq(irq);
- omap_ack_irq(irq);
+ omap_mask_irq(d);
+ omap_ack_irq(d);
}
static struct irq_chip omap_irq_chip = {
- .name = "INTC",
- .ack = omap_mask_ack_irq,
- .mask = omap_mask_irq,
- .unmask = omap_unmask_irq,
+ .name = "INTC",
+ .irq_ack = omap_mask_ack_irq,
+ .irq_mask = omap_mask_irq,
+ .irq_unmask = omap_unmask_irq,
};
static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
diff --git a/trunk/arch/arm/mach-omap2/mux.c b/trunk/arch/arm/mach-omap2/mux.c
index 17bd6394d224..df8d2f2872c6 100644
--- a/trunk/arch/arm/mach-omap2/mux.c
+++ b/trunk/arch/arm/mach-omap2/mux.c
@@ -893,7 +893,7 @@ static struct omap_mux * __init omap_mux_list_add(
return NULL;
m = &entry->mux;
- memcpy(m, src, sizeof(struct omap_mux_entry));
+ entry->mux = *src;
#ifdef CONFIG_OMAP_MUX
if (omap_mux_copy_names(src, m)) {
diff --git a/trunk/arch/arm/mach-omap2/mux34xx.c b/trunk/arch/arm/mach-omap2/mux34xx.c
index 440c98e9a510..17f80e4ab162 100644
--- a/trunk/arch/arm/mach-omap2/mux34xx.c
+++ b/trunk/arch/arm/mach-omap2/mux34xx.c
@@ -703,7 +703,7 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
* Signals different on CBC package compared to the superset
*/
#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBC)
-struct omap_mux __initdata omap3_cbc_subset[] = {
+static struct omap_mux __initdata omap3_cbc_subset[] = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
@@ -721,7 +721,7 @@ struct omap_mux __initdata omap3_cbc_subset[] = {
*/
#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \
&& defined(CONFIG_OMAP_PACKAGE_CBC)
-struct omap_ball __initdata omap3_cbc_ball[] = {
+static struct omap_ball __initdata omap3_cbc_ball[] = {
_OMAP3_BALLENTRY(CAM_D0, "ae16", NULL),
_OMAP3_BALLENTRY(CAM_D1, "ae15", NULL),
_OMAP3_BALLENTRY(CAM_D10, "d25", NULL),
diff --git a/trunk/arch/arm/mach-omap2/mux44xx.c b/trunk/arch/arm/mach-omap2/mux44xx.c
index 980f11d45c79..c322e7bdaa17 100644
--- a/trunk/arch/arm/mach-omap2/mux44xx.c
+++ b/trunk/arch/arm/mach-omap2/mux44xx.c
@@ -544,7 +544,7 @@ static struct omap_mux __initdata omap4_core_muxmodes[] = {
*/
#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \
&& defined(CONFIG_OMAP_PACKAGE_CBL)
-struct omap_ball __initdata omap4_core_cbl_ball[] = {
+static struct omap_ball __initdata omap4_core_cbl_ball[] = {
_OMAP4_BALLENTRY(GPMC_AD0, "c12", NULL),
_OMAP4_BALLENTRY(GPMC_AD1, "d12", NULL),
_OMAP4_BALLENTRY(GPMC_AD2, "c13", NULL),
@@ -1262,7 +1262,7 @@ static struct omap_mux __initdata omap4_es2_core_muxmodes[] = {
*/
#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \
&& defined(CONFIG_OMAP_PACKAGE_CBS)
-struct omap_ball __initdata omap4_core_cbs_ball[] = {
+static struct omap_ball __initdata omap4_core_cbs_ball[] = {
_OMAP4_BALLENTRY(GPMC_AD0, "c12", NULL),
_OMAP4_BALLENTRY(GPMC_AD1, "d12", NULL),
_OMAP4_BALLENTRY(GPMC_AD2, "c13", NULL),
@@ -1546,7 +1546,7 @@ static struct omap_mux __initdata omap4_wkup_muxmodes[] = {
*/
#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \
&& defined(CONFIG_OMAP_PACKAGE_CBL)
-struct omap_ball __initdata omap4_wkup_cbl_cbs_ball[] = {
+static struct omap_ball __initdata omap4_wkup_cbl_cbs_ball[] = {
_OMAP4_BALLENTRY(SIM_IO, "h4", NULL),
_OMAP4_BALLENTRY(SIM_CLK, "j2", NULL),
_OMAP4_BALLENTRY(SIM_RESET, "g2", NULL),
diff --git a/trunk/arch/arm/mach-omap2/omap_twl.c b/trunk/arch/arm/mach-omap2/omap_twl.c
index 15f8c6c1bb0f..00e1d2b53683 100644
--- a/trunk/arch/arm/mach-omap2/omap_twl.c
+++ b/trunk/arch/arm/mach-omap2/omap_twl.c
@@ -20,6 +20,8 @@
#include
+#include "pm.h"
+
#define OMAP3_SRI2C_SLAVE_ADDR 0x12
#define OMAP3_VDD_MPU_SR_CONTROL_REG 0x00
#define OMAP3_VDD_CORE_SR_CONTROL_REG 0x01
@@ -60,17 +62,17 @@ static u8 smps_offset;
#define REG_SMPS_OFFSET 0xE0
-unsigned long twl4030_vsel_to_uv(const u8 vsel)
+static unsigned long twl4030_vsel_to_uv(const u8 vsel)
{
return (((vsel * 125) + 6000)) * 100;
}
-u8 twl4030_uv_to_vsel(unsigned long uv)
+static u8 twl4030_uv_to_vsel(unsigned long uv)
{
return DIV_ROUND_UP(uv - 600000, 12500);
}
-unsigned long twl6030_vsel_to_uv(const u8 vsel)
+static unsigned long twl6030_vsel_to_uv(const u8 vsel)
{
/*
* In TWL6030 depending on the value of SMPS_OFFSET
@@ -102,7 +104,7 @@ unsigned long twl6030_vsel_to_uv(const u8 vsel)
return ((((vsel - 1) * 125) + 6000)) * 100;
}
-u8 twl6030_uv_to_vsel(unsigned long uv)
+static u8 twl6030_uv_to_vsel(unsigned long uv)
{
/*
* In TWL6030 depending on the value of SMPS_OFFSET
diff --git a/trunk/arch/arm/mach-omap2/pm_bus.c b/trunk/arch/arm/mach-omap2/pm_bus.c
index 784989f8f2f5..5acd2ab298b1 100644
--- a/trunk/arch/arm/mach-omap2/pm_bus.c
+++ b/trunk/arch/arm/mach-omap2/pm_bus.c
@@ -20,7 +20,7 @@
#include
#ifdef CONFIG_PM_RUNTIME
-int omap_pm_runtime_suspend(struct device *dev)
+static int omap_pm_runtime_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
int r, ret = 0;
@@ -37,7 +37,7 @@ int omap_pm_runtime_suspend(struct device *dev)
return ret;
};
-int omap_pm_runtime_resume(struct device *dev)
+static int omap_pm_runtime_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
int r;
diff --git a/trunk/arch/arm/mach-omap2/prm2xxx_3xxx.h b/trunk/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 53d44f6e3736..49654c8d18f5 100644
--- a/trunk/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/trunk/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -228,7 +228,67 @@
#ifndef __ASSEMBLER__
-
+/*
+ * Stub omap2xxx/omap3xxx functions so that common files
+ * continue to build when custom builds are used
+ */
+#if defined(CONFIG_ARCH_OMAP4) && !(defined(CONFIG_ARCH_OMAP2) || \
+ defined(CONFIG_ARCH_OMAP3))
+static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+ return 0;
+}
+static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+}
+static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits,
+ s16 module, s16 idx)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+ return 0;
+}
+static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+ return 0;
+}
+static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+ return 0;
+}
+static inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+ return 0;
+}
+static inline int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+ return 0;
+}
+static inline int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+ return 0;
+}
+static inline int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift)
+{
+ WARN(1, "prm: omap2xxx/omap3xxx specific function and "
+ "not suppose to be used on omap4\n");
+ return 0;
+}
+#else
/* Power/reset management domain register get/set */
extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx);
extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx);
@@ -242,6 +302,7 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift);
+#endif /* CONFIG_ARCH_OMAP4 */
#endif
/*
diff --git a/trunk/arch/arm/mach-omap2/sr_device.c b/trunk/arch/arm/mach-omap2/sr_device.c
index 786d685c09a9..b1e0af18a26a 100644
--- a/trunk/arch/arm/mach-omap2/sr_device.c
+++ b/trunk/arch/arm/mach-omap2/sr_device.c
@@ -27,6 +27,7 @@
#include
#include "control.h"
+#include "pm.h"
static bool sr_enable_on_init;
diff --git a/trunk/arch/arm/mach-omap2/wd_timer.c b/trunk/arch/arm/mach-omap2/wd_timer.c
index b0c4907ab3ca..4067669d96c4 100644
--- a/trunk/arch/arm/mach-omap2/wd_timer.c
+++ b/trunk/arch/arm/mach-omap2/wd_timer.c
@@ -13,6 +13,8 @@
#include
+#include "wd_timer.h"
+
/*
* In order to avoid any assumptions from bootloader regarding WDT
* settings, WDT module is reset during init. This enables the watchdog
diff --git a/trunk/arch/arm/mach-pnx4008/irq.c b/trunk/arch/arm/mach-pnx4008/irq.c
index a9ce02b4bf17..c69c180aec76 100644
--- a/trunk/arch/arm/mach-pnx4008/irq.c
+++ b/trunk/arch/arm/mach-pnx4008/irq.c
@@ -36,44 +36,44 @@
static u8 pnx4008_irq_type[NR_IRQS] = PNX4008_IRQ_TYPES;
-static void pnx4008_mask_irq(unsigned int irq)
+static void pnx4008_mask_irq(struct irq_data *d)
{
- __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */
+ __raw_writel(__raw_readl(INTC_ER(d->irq)) & ~INTC_BIT(d->irq), INTC_ER(d->irq)); /* mask interrupt */
}
-static void pnx4008_unmask_irq(unsigned int irq)
+static void pnx4008_unmask_irq(struct irq_data *d)
{
- __raw_writel(__raw_readl(INTC_ER(irq)) | INTC_BIT(irq), INTC_ER(irq)); /* unmask interrupt */
+ __raw_writel(__raw_readl(INTC_ER(d->irq)) | INTC_BIT(d->irq), INTC_ER(d->irq)); /* unmask interrupt */
}
-static void pnx4008_mask_ack_irq(unsigned int irq)
+static void pnx4008_mask_ack_irq(struct irq_data *d)
{
- __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */
- __raw_writel(INTC_BIT(irq), INTC_SR(irq)); /* clear interrupt status */
+ __raw_writel(__raw_readl(INTC_ER(d->irq)) & ~INTC_BIT(d->irq), INTC_ER(d->irq)); /* mask interrupt */
+ __raw_writel(INTC_BIT(d->irq), INTC_SR(d->irq)); /* clear interrupt status */
}
-static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
+static int pnx4008_set_irq_type(struct irq_data *d, unsigned int type)
{
switch (type) {
case IRQ_TYPE_EDGE_RISING:
- __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */
- __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /*rising edge */
- set_irq_handler(irq, handle_edge_irq);
+ __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */
+ __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /*rising edge */
+ set_irq_handler(d->irq, handle_edge_irq);
break;
case IRQ_TYPE_EDGE_FALLING:
- __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */
- __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*falling edge */
- set_irq_handler(irq, handle_edge_irq);
+ __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */
+ __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*falling edge */
+ set_irq_handler(d->irq, handle_edge_irq);
break;
case IRQ_TYPE_LEVEL_LOW:
- __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */
- __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*low level */
- set_irq_handler(irq, handle_level_irq);
+ __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */
+ __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*low level */
+ set_irq_handler(d->irq, handle_level_irq);
break;
case IRQ_TYPE_LEVEL_HIGH:
- __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */
- __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /* high level */
- set_irq_handler(irq, handle_level_irq);
+ __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */
+ __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /* high level */
+ set_irq_handler(d->irq, handle_level_irq);
break;
/* IRQ_TYPE_EDGE_BOTH is not supported */
@@ -85,10 +85,10 @@ static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
}
static struct irq_chip pnx4008_irq_chip = {
- .ack = pnx4008_mask_ack_irq,
- .mask = pnx4008_mask_irq,
- .unmask = pnx4008_unmask_irq,
- .set_type = pnx4008_set_irq_type,
+ .irq_ack = pnx4008_mask_ack_irq,
+ .irq_mask = pnx4008_mask_irq,
+ .irq_unmask = pnx4008_unmask_irq,
+ .irq_set_type = pnx4008_set_irq_type,
};
void __init pnx4008_init_irq(void)
@@ -99,14 +99,18 @@ void __init pnx4008_init_irq(void)
for (i = 0; i < NR_IRQS; i++) {
set_irq_flags(i, IRQF_VALID);
set_irq_chip(i, &pnx4008_irq_chip);
- pnx4008_set_irq_type(i, pnx4008_irq_type[i]);
+ pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]);
}
/* configure and enable IRQ 0,1,30,31 (cascade interrupts) */
- pnx4008_set_irq_type(SUB1_IRQ_N, pnx4008_irq_type[SUB1_IRQ_N]);
- pnx4008_set_irq_type(SUB2_IRQ_N, pnx4008_irq_type[SUB2_IRQ_N]);
- pnx4008_set_irq_type(SUB1_FIQ_N, pnx4008_irq_type[SUB1_FIQ_N]);
- pnx4008_set_irq_type(SUB2_FIQ_N, pnx4008_irq_type[SUB2_FIQ_N]);
+ pnx4008_set_irq_type(irq_get_irq_data(SUB1_IRQ_N),
+ pnx4008_irq_type[SUB1_IRQ_N]);
+ pnx4008_set_irq_type(irq_get_irq_data(SUB2_IRQ_N),
+ pnx4008_irq_type[SUB2_IRQ_N]);
+ pnx4008_set_irq_type(irq_get_irq_data(SUB1_FIQ_N),
+ pnx4008_irq_type[SUB1_FIQ_N]);
+ pnx4008_set_irq_type(irq_get_irq_data(SUB2_FIQ_N),
+ pnx4008_irq_type[SUB2_FIQ_N]);
/* mask all others */
__raw_writel((1 << SUB2_FIQ_N) | (1 << SUB1_FIQ_N) |
diff --git a/trunk/arch/arm/mach-pxa/balloon3.c b/trunk/arch/arm/mach-pxa/balloon3.c
index ccb2d0cebcc3..a134a1413e01 100644
--- a/trunk/arch/arm/mach-pxa/balloon3.c
+++ b/trunk/arch/arm/mach-pxa/balloon3.c
@@ -477,25 +477,25 @@ static inline void balloon3_leds_init(void) {}
/******************************************************************************
* FPGA IRQ
******************************************************************************/
-static void balloon3_mask_irq(unsigned int irq)
+static void balloon3_mask_irq(struct irq_data *d)
{
- int balloon3_irq = (irq - BALLOON3_IRQ(0));
+ int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
balloon3_irq_enabled &= ~(1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
-static void balloon3_unmask_irq(unsigned int irq)
+static void balloon3_unmask_irq(struct irq_data *d)
{
- int balloon3_irq = (irq - BALLOON3_IRQ(0));
+ int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
balloon3_irq_enabled |= (1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
static struct irq_chip balloon3_irq_chip = {
.name = "FPGA",
- .ack = balloon3_mask_irq,
- .mask = balloon3_mask_irq,
- .unmask = balloon3_unmask_irq,
+ .irq_ack = balloon3_mask_irq,
+ .irq_mask = balloon3_mask_irq,
+ .irq_unmask = balloon3_unmask_irq,
};
static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -504,8 +504,13 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
balloon3_irq_enabled;
do {
/* clear useless edge notification */
- if (desc->chip->ack)
- desc->chip->ack(BALLOON3_AUX_NIRQ);
+ if (desc->irq_data.chip->irq_ack) {
+ struct irq_data *d;
+
+ d = irq_get_irq_data(BALLOON3_AUX_NIRQ);
+ desc->irq_data.chip->irq_ack(d);
+ }
+
while (pending) {
irq = BALLOON3_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff --git a/trunk/arch/arm/mach-pxa/clock-pxa3xx.c b/trunk/arch/arm/mach-pxa/clock-pxa3xx.c
index 1b08a34ab234..3f864cd0bd28 100644
--- a/trunk/arch/arm/mach-pxa/clock-pxa3xx.c
+++ b/trunk/arch/arm/mach-pxa/clock-pxa3xx.c
@@ -115,7 +115,6 @@ static unsigned long clk_pxa3xx_smemc_getrate(struct clk *clk)
{
unsigned long acsr = ACSR;
unsigned long memclkcfg = __raw_readl(MEMCLKCFG);
- unsigned int smcfs = (acsr >> 23) & 0x7;
return BASE_CLK * smcfs_mult[(acsr >> 23) & 0x7] /
df_clkdiv[(memclkcfg >> 16) & 0x3];
diff --git a/trunk/arch/arm/mach-pxa/cm-x2xx-pci.c b/trunk/arch/arm/mach-pxa/cm-x2xx-pci.c
index 0f3130599770..a2380cd76f80 100644
--- a/trunk/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/trunk/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(unsigned long *zone_size,
static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
{
/* clear our parent irq */
- desc->chip->ack(irq);
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
it8152_irq_demux(irq, desc);
}
diff --git a/trunk/arch/arm/mach-pxa/generic.c b/trunk/arch/arm/mach-pxa/generic.c
index d6e15f71fc09..f5d91efc2965 100644
--- a/trunk/arch/arm/mach-pxa/generic.c
+++ b/trunk/arch/arm/mach-pxa/generic.c
@@ -22,7 +22,6 @@
#include
#include
-#include
#include
#include
diff --git a/trunk/arch/arm/mach-pxa/generic.h b/trunk/arch/arm/mach-pxa/generic.h
index 6205dc9a2b9d..a079d8baa45a 100644
--- a/trunk/arch/arm/mach-pxa/generic.h
+++ b/trunk/arch/arm/mach-pxa/generic.h
@@ -9,11 +9,13 @@
* published by the Free Software Foundation.
*/
+struct irq_data;
struct sys_timer;
extern struct sys_timer pxa_timer;
extern void __init pxa_init_irq(int irq_nr,
- int (*set_wake)(unsigned int, unsigned int));
+ int (*set_wake)(struct irq_data *,
+ unsigned int));
extern void __init pxa25x_init_irq(void);
#ifdef CONFIG_CPU_PXA26x
extern void __init pxa26x_init_irq(void);
diff --git a/trunk/arch/arm/mach-pxa/irq.c b/trunk/arch/arm/mach-pxa/irq.c
index 54e91c9e71c8..2693e3c3776f 100644
--- a/trunk/arch/arm/mach-pxa/irq.c
+++ b/trunk/arch/arm/mach-pxa/irq.c
@@ -53,37 +53,48 @@ static inline int cpu_has_ipr(void)
return !cpu_is_pxa25x();
}
-static void pxa_mask_irq(unsigned int irq)
+static inline void __iomem *irq_base(int i)
+{
+ static unsigned long phys_base[] = {
+ 0x40d00000,
+ 0x40d0009c,
+ 0x40d00130,
+ };
+
+ return (void __iomem *)io_p2v(phys_base[i]);
+}
+
+static void pxa_mask_irq(struct irq_data *d)
{
- void __iomem *base = get_irq_chip_data(irq);
+ void __iomem *base = irq_data_get_irq_chip_data(d);
uint32_t icmr = __raw_readl(base + ICMR);
- icmr &= ~(1 << IRQ_BIT(irq));
+ icmr &= ~(1 << IRQ_BIT(d->irq));
__raw_writel(icmr, base + ICMR);
}
-static void pxa_unmask_irq(unsigned int irq)
+static void pxa_unmask_irq(struct irq_data *d)
{
- void __iomem *base = get_irq_chip_data(irq);
+ void __iomem *base = irq_data_get_irq_chip_data(d);
uint32_t icmr = __raw_readl(base + ICMR);
- icmr |= 1 << IRQ_BIT(irq);
+ icmr |= 1 << IRQ_BIT(d->irq);
__raw_writel(icmr, base + ICMR);
}
static struct irq_chip pxa_internal_irq_chip = {
.name = "SC",
- .ack = pxa_mask_irq,
- .mask = pxa_mask_irq,
- .unmask = pxa_unmask_irq,
+ .irq_ack = pxa_mask_irq,
+ .irq_mask = pxa_mask_irq,
+ .irq_unmask = pxa_unmask_irq,
};
/*
* GPIO IRQs for GPIO 0 and 1
*/
-static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
+static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
{
- int gpio = irq - IRQ_GPIO0;
+ int gpio = d->irq - IRQ_GPIO0;
if (__gpio_is_occupied(gpio)) {
pr_err("%s failed: GPIO is configured\n", __func__);
@@ -103,31 +114,17 @@ static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
return 0;
}
-static void pxa_ack_low_gpio(unsigned int irq)
-{
- GEDR0 = (1 << (irq - IRQ_GPIO0));
-}
-
-static void pxa_mask_low_gpio(unsigned int irq)
-{
- struct irq_desc *desc = irq_to_desc(irq);
-
- desc->chip->mask(irq);
-}
-
-static void pxa_unmask_low_gpio(unsigned int irq)
+static void pxa_ack_low_gpio(struct irq_data *d)
{
- struct irq_desc *desc = irq_to_desc(irq);
-
- desc->chip->unmask(irq);
+ GEDR0 = (1 << (d->irq - IRQ_GPIO0));
}
static struct irq_chip pxa_low_gpio_chip = {
.name = "GPIO-l",
- .ack = pxa_ack_low_gpio,
- .mask = pxa_mask_low_gpio,
- .unmask = pxa_unmask_low_gpio,
- .set_type = pxa_set_low_gpio_type,
+ .irq_ack = pxa_ack_low_gpio,
+ .irq_mask = pxa_mask_irq,
+ .irq_unmask = pxa_unmask_irq,
+ .irq_set_type = pxa_set_low_gpio_type,
};
static void __init pxa_init_low_gpio_irq(set_wake_t fn)
@@ -141,22 +138,12 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
set_irq_chip(irq, &pxa_low_gpio_chip);
+ set_irq_chip_data(irq, irq_base(0));
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID);
}
- pxa_low_gpio_chip.set_wake = fn;
-}
-
-static inline void __iomem *irq_base(int i)
-{
- static unsigned long phys_base[] = {
- 0x40d00000,
- 0x40d0009c,
- 0x40d00130,
- };
-
- return (void __iomem *)io_p2v(phys_base[i >> 5]);
+ pxa_low_gpio_chip.irq_set_wake = fn;
}
void __init pxa_init_irq(int irq_nr, set_wake_t fn)
@@ -168,7 +155,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
pxa_internal_irq_nr = irq_nr;
for (n = 0; n < irq_nr; n += 32) {
- void __iomem *base = irq_base(n);
+ void __iomem *base = irq_base(n >> 5);
__raw_writel(0, base + ICMR); /* disable all IRQs */
__raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */
@@ -188,7 +175,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
/* only unmasked interrupts kick us out of idle */
__raw_writel(1, irq_base(0) + ICCR);
- pxa_internal_irq_chip.set_wake = fn;
+ pxa_internal_irq_chip.irq_set_wake = fn;
pxa_init_low_gpio_irq(fn);
}
@@ -200,7 +187,7 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
{
int i;
- for (i = 0; i < pxa_internal_irq_nr; i += 32) {
+ for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
void __iomem *base = irq_base(i);
saved_icmr[i] = __raw_readl(base + ICMR);
@@ -219,14 +206,14 @@ static int pxa_irq_resume(struct sys_device *dev)
{
int i;
- for (i = 0; i < pxa_internal_irq_nr; i += 32) {
+ for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
void __iomem *base = irq_base(i);
__raw_writel(saved_icmr[i], base + ICMR);
__raw_writel(0, base + ICLR);
}
- if (!cpu_is_pxa25x())
+ if (cpu_has_ipr())
for (i = 0; i < pxa_internal_irq_nr; i++)
__raw_writel(saved_ipr[i], IRQ_BASE + IPR(i));
diff --git a/trunk/arch/arm/mach-pxa/lpd270.c b/trunk/arch/arm/mach-pxa/lpd270.c
index 8ab62a677807..c9a3e775c2de 100644
--- a/trunk/arch/arm/mach-pxa/lpd270.c
+++ b/trunk/arch/arm/mach-pxa/lpd270.c
@@ -95,9 +95,9 @@ static unsigned long lpd270_pin_config[] __initdata = {
static unsigned int lpd270_irq_enabled;
-static void lpd270_mask_irq(unsigned int irq)
+static void lpd270_mask_irq(struct irq_data *d)
{
- int lpd270_irq = irq - LPD270_IRQ(0);
+ int lpd270_irq = d->irq - LPD270_IRQ(0);
__raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
@@ -105,9 +105,9 @@ static void lpd270_mask_irq(unsigned int irq)
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
}
-static void lpd270_unmask_irq(unsigned int irq)
+static void lpd270_unmask_irq(struct irq_data *d)
{
- int lpd270_irq = irq - LPD270_IRQ(0);
+ int lpd270_irq = d->irq - LPD270_IRQ(0);
lpd270_irq_enabled |= 1 << lpd270_irq;
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
@@ -115,9 +115,9 @@ static void lpd270_unmask_irq(unsigned int irq)
static struct irq_chip lpd270_irq_chip = {
.name = "CPLD",
- .ack = lpd270_mask_irq,
- .mask = lpd270_mask_irq,
- .unmask = lpd270_unmask_irq,
+ .irq_ack = lpd270_mask_irq,
+ .irq_mask = lpd270_mask_irq,
+ .irq_unmask = lpd270_unmask_irq,
};
static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -126,7 +126,8 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
do {
- desc->chip->ack(irq); /* clear useless edge notification */
+ /* clear useless edge notification */
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = LPD270_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff --git a/trunk/arch/arm/mach-pxa/lubbock.c b/trunk/arch/arm/mach-pxa/lubbock.c
index 3072dbea5c1f..dca20de306bb 100644
--- a/trunk/arch/arm/mach-pxa/lubbock.c
+++ b/trunk/arch/arm/mach-pxa/lubbock.c
@@ -122,15 +122,15 @@ EXPORT_SYMBOL(lubbock_set_misc_wr);
static unsigned long lubbock_irq_enabled;
-static void lubbock_mask_irq(unsigned int irq)
+static void lubbock_mask_irq(struct irq_data *d)
{
- int lubbock_irq = (irq - LUBBOCK_IRQ(0));
+ int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
}
-static void lubbock_unmask_irq(unsigned int irq)
+static void lubbock_unmask_irq(struct irq_data *d)
{
- int lubbock_irq = (irq - LUBBOCK_IRQ(0));
+ int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq));
@@ -138,16 +138,17 @@ static void lubbock_unmask_irq(unsigned int irq)
static struct irq_chip lubbock_irq_chip = {
.name = "FPGA",
- .ack = lubbock_mask_irq,
- .mask = lubbock_mask_irq,
- .unmask = lubbock_unmask_irq,
+ .irq_ack = lubbock_mask_irq,
+ .irq_mask = lubbock_mask_irq,
+ .irq_unmask = lubbock_unmask_irq,
};
static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
do {
- desc->chip->ack(irq); /* clear our parent irq */
+ /* clear our parent irq */
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = LUBBOCK_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff --git a/trunk/arch/arm/mach-pxa/mainstone.c b/trunk/arch/arm/mach-pxa/mainstone.c
index 740c03590e3b..d4b6f2375f2c 100644
--- a/trunk/arch/arm/mach-pxa/mainstone.c
+++ b/trunk/arch/arm/mach-pxa/mainstone.c
@@ -123,15 +123,15 @@ static unsigned long mainstone_pin_config[] = {
static unsigned long mainstone_irq_enabled;
-static void mainstone_mask_irq(unsigned int irq)
+static void mainstone_mask_irq(struct irq_data *d)
{
- int mainstone_irq = (irq - MAINSTONE_IRQ(0));
+ int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
}
-static void mainstone_unmask_irq(unsigned int irq)
+static void mainstone_unmask_irq(struct irq_data *d)
{
- int mainstone_irq = (irq - MAINSTONE_IRQ(0));
+ int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
MST_INTSETCLR &= ~(1 << mainstone_irq);
MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
@@ -139,16 +139,17 @@ static void mainstone_unmask_irq(unsigned int irq)
static struct irq_chip mainstone_irq_chip = {
.name = "FPGA",
- .ack = mainstone_mask_irq,
- .mask = mainstone_mask_irq,
- .unmask = mainstone_unmask_irq,
+ .irq_ack = mainstone_mask_irq,
+ .irq_mask = mainstone_mask_irq,
+ .irq_unmask = mainstone_unmask_irq,
};
static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
do {
- desc->chip->ack(irq); /* clear useless edge notification */
+ /* clear useless edge notification */
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = MAINSTONE_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff --git a/trunk/arch/arm/mach-pxa/pcm990-baseboard.c b/trunk/arch/arm/mach-pxa/pcm990-baseboard.c
index f33647a8e0b7..90820faa711a 100644
--- a/trunk/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/trunk/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -241,23 +241,23 @@ static struct platform_device pcm990_backlight_device = {
static unsigned long pcm990_irq_enabled;
-static void pcm990_mask_ack_irq(unsigned int irq)
+static void pcm990_mask_ack_irq(struct irq_data *d)
{
- int pcm990_irq = (irq - PCM027_IRQ(0));
+ int pcm990_irq = (d->irq - PCM027_IRQ(0));
PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
}
-static void pcm990_unmask_irq(unsigned int irq)
+static void pcm990_unmask_irq(struct irq_data *d)
{
- int pcm990_irq = (irq - PCM027_IRQ(0));
+ int pcm990_irq = (d->irq - PCM027_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
PCM990_INTSETCLR |= 1 << pcm990_irq;
PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
}
static struct irq_chip pcm990_irq_chip = {
- .mask_ack = pcm990_mask_ack_irq,
- .unmask = pcm990_unmask_irq,
+ .irq_mask_ack = pcm990_mask_ack_irq,
+ .irq_unmask = pcm990_unmask_irq,
};
static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -265,7 +265,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
do {
- desc->chip->ack(irq); /* clear our parent IRQ */
+ /* clear our parent IRQ */
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = PCM027_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff --git a/trunk/arch/arm/mach-pxa/pxa25x.c b/trunk/arch/arm/mach-pxa/pxa25x.c
index 3f5241c84894..fbc5b775f895 100644
--- a/trunk/arch/arm/mach-pxa/pxa25x.c
+++ b/trunk/arch/arm/mach-pxa/pxa25x.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
@@ -282,15 +283,15 @@ static inline void pxa25x_init_pm(void) {}
/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
*/
-static int pxa25x_set_wake(unsigned int irq, unsigned int on)
+static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
{
- int gpio = IRQ_TO_GPIO(irq);
+ int gpio = IRQ_TO_GPIO(d->irq);
uint32_t mask = 0;
if (gpio >= 0 && gpio < 85)
return gpio_set_wake(gpio, on);
- if (irq == IRQ_RTCAlrm) {
+ if (d->irq == IRQ_RTCAlrm) {
mask = PWER_RTC;
goto set_pwer;
}
diff --git a/trunk/arch/arm/mach-pxa/pxa27x.c b/trunk/arch/arm/mach-pxa/pxa27x.c
index b2130b7a7b52..987301ff4c33 100644
--- a/trunk/arch/arm/mach-pxa/pxa27x.c
+++ b/trunk/arch/arm/mach-pxa/pxa27x.c
@@ -18,6 +18,7 @@
#include
#include
#include