From cc0ad47bcbf0a3718ff82f5cc62c4e4f2f0a2942 Mon Sep 17 00:00:00 2001 From: Diana CRACIUN Date: Wed, 1 Feb 2012 17:50:34 +0200 Subject: [PATCH] --- yaml --- r: 292593 b: refs/heads/master c: da3b6c0534c76bc08ce5524342586138687fd106 h: refs/heads/master i: 292591: 0bf6baf4f3e165a4d30c3e2ba323c31c9c808c17 v: v3 --- [refs] | 2 +- .../devicetree/bindings/powerpc/fsl/msi-pic.txt | 6 ++++-- trunk/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi | 6 +++--- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 005278161ed7..39f727706b40 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a2279e3fe484e89f744e03421377d5c0fca9f77d +refs/heads/master: da3b6c0534c76bc08ce5524342586138687fd106 diff --git a/trunk/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt b/trunk/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt index 5d586e1ccaf5..5693877ab377 100644 --- a/trunk/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt +++ b/trunk/Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt @@ -6,8 +6,10 @@ Required properties: etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on the parent type. -- reg : should contain the address and the length of the shared message - interrupt register set. +- reg : It may contain one or two regions. The first region should contain + the address and the length of the shared message interrupt register set. + The second region should contain the address of aliased MSIIR register for + platforms that have such an alias. - msi-available-ranges: use style section to define which msi interrupt can be used in the 256 msi interrupts. This property is diff --git a/trunk/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi b/trunk/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi index b9bada6a87dc..08f42271f86a 100644 --- a/trunk/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi +++ b/trunk/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi @@ -53,7 +53,7 @@ timer@41100 { msi0: msi@41600 { compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; + reg = <0x41600 0x200 0x44140 4>; msi-available-ranges = <0 0x100>; interrupts = < 0xe0 0 0 0 @@ -68,7 +68,7 @@ msi0: msi@41600 { msi1: msi@41800 { compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; + reg = <0x41800 0x200 0x45140 4>; msi-available-ranges = <0 0x100>; interrupts = < 0xe8 0 0 0 @@ -83,7 +83,7 @@ msi1: msi@41800 { msi2: msi@41a00 { compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; + reg = <0x41a00 0x200 0x46140 4>; msi-available-ranges = <0 0x100>; interrupts = < 0xf0 0 0 0