From cc44ba96aee842d2fb95e36061b9468478418d79 Mon Sep 17 00:00:00 2001 From: Yi Li Date: Fri, 4 Dec 2009 06:56:21 +0000 Subject: [PATCH] --- yaml --- r: 188444 b: refs/heads/master c: c9784ebb23be1e2ef23f537d6df04e0ea0206802 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/blackfin/mach-common/smp.c | 26 ++++++++++++++++++++++++-- 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index a50d8479d912..f2832337c91e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3630ac34b0ab346ff0910401dbed7af624be7027 +refs/heads/master: c9784ebb23be1e2ef23f537d6df04e0ea0206802 diff --git a/trunk/arch/blackfin/mach-common/smp.c b/trunk/arch/blackfin/mach-common/smp.c index 369e687582b7..eddb720c718e 100644 --- a/trunk/arch/blackfin/mach-common/smp.c +++ b/trunk/arch/blackfin/mach-common/smp.c @@ -122,9 +122,17 @@ static void ipi_call_function(unsigned int cpu, struct ipi_message *msg) wait = msg->call_struct.wait; cpu_clear(cpu, msg->call_struct.pending); func(info); - if (wait) + if (wait) { +#ifdef __ARCH_SYNC_CORE_DCACHE + /* + * 'wait' usually means synchronization between CPUs. + * Invalidate D cache in case shared data was changed + * by func() to ensure cache coherence. + */ + resync_core_dcache(); +#endif cpu_clear(cpu, msg->call_struct.waitmask); - else + } else kfree(msg); } @@ -219,6 +227,13 @@ int smp_call_function(void (*func)(void *info), void *info, int wait) blackfin_dcache_invalidate_range( (unsigned long)(&msg->call_struct.waitmask), (unsigned long)(&msg->call_struct.waitmask)); +#ifdef __ARCH_SYNC_CORE_DCACHE + /* + * Invalidate D cache in case shared data was changed by + * other processors to ensure cache coherence. + */ + resync_core_dcache(); +#endif kfree(msg); } return 0; @@ -261,6 +276,13 @@ int smp_call_function_single(int cpuid, void (*func) (void *info), void *info, blackfin_dcache_invalidate_range( (unsigned long)(&msg->call_struct.waitmask), (unsigned long)(&msg->call_struct.waitmask)); +#ifdef __ARCH_SYNC_CORE_DCACHE + /* + * Invalidate D cache in case shared data was changed by + * other processors to ensure cache coherence. + */ + resync_core_dcache(); +#endif kfree(msg); } return 0;