From cccd3737d01024f31be65325a9c7182ccd066798 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Sun, 2 Dec 2012 17:44:36 +0000 Subject: [PATCH] --- yaml --- r: 351157 b: refs/heads/master c: 4e3c1944808b0278ea4733afcde5cb9421f8a570 h: refs/heads/master i: 351155: aaa0d1e47b3c324e49665ebdf695f9cee4f5df7e v: v3 --- [refs] | 2 +- trunk/arch/arm/include/asm/virt.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 052e34554665..a0e7a7d62f80 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8e9c24a2b2e00368262b974d6ea1ac5310570bbe +refs/heads/master: 4e3c1944808b0278ea4733afcde5cb9421f8a570 diff --git a/trunk/arch/arm/include/asm/virt.h b/trunk/arch/arm/include/asm/virt.h index 86164df86cb4..50af92bac737 100644 --- a/trunk/arch/arm/include/asm/virt.h +++ b/trunk/arch/arm/include/asm/virt.h @@ -24,9 +24,9 @@ /* * Flag indicating that the kernel was not entered in the same mode on every * CPU. The zImage loader stashes this value in an SPSR, so we need an - * architecturally defined flag bit here (the N flag, as it happens) + * architecturally defined flag bit here. */ -#define BOOT_CPU_MODE_MISMATCH (1<<31) +#define BOOT_CPU_MODE_MISMATCH PSR_N_BIT #ifndef __ASSEMBLY__