From cd40b0897a31d7b7050dc85b0064b9389a1f9c72 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Thu, 16 Jul 2009 13:01:01 -0700 Subject: [PATCH] --- yaml --- r: 156519 b: refs/heads/master c: 390c4dd448b1a5f04ea497c20f5ff664f8eeed01 h: refs/heads/master i: 156517: 1c5a1869628efc4bafbeaf104152c972e144aaea 156515: 648f86a5952d2e81856cffa6d5779b94c9dd187a 156511: 4c0d7487de7df9e96cb0a3d5d5d75e71c566c52b v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 7 ++++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 5a420d0ddbc4..7fdb3e927aba 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: dff33cfcefa31c30b72c57f44586754ea9e8f3e2 +refs/heads/master: 390c4dd448b1a5f04ea497c20f5ff664f8eeed01 diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index 3fa0d63c83b9..890f7108e723 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -1674,7 +1674,7 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz, int pixel_size, unsigned long latency_ns) { - unsigned long entries_required, wm_size; + long entries_required, wm_size; entries_required = (clock_in_khz * pixel_size * latency_ns) / 1000000; entries_required /= wm->cacheline_size; @@ -1685,9 +1685,10 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz, DRM_DEBUG("FIFO watermark level: %d\n", wm_size); - if (wm_size > wm->max_wm) + /* Don't promote wm_size to unsigned... */ + if (wm_size > (long)wm->max_wm) wm_size = wm->max_wm; - if (wm_size == 0) + if (wm_size <= 0) wm_size = wm->default_wm; return wm_size; }