From cd570de4f27c53c1a640676b5be68546072672c9 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Thu, 8 Sep 2011 17:56:59 -0700 Subject: [PATCH] --- yaml --- r: 272633 b: refs/heads/master c: d395935f55a7ceebf22c752bbfbfe1272648a08b h: refs/heads/master i: 272631: 7c43c755c43cf5f39fe7867c728ad88d624d2165 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-tegra/tegra2_clocks.c | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index b4c71bb73f68..c07b8372af1f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 75d711662f02ad850f28507c0231cdce8fe075af +refs/heads/master: d395935f55a7ceebf22c752bbfbfe1272648a08b diff --git a/trunk/arch/arm/mach-tegra/tegra2_clocks.c b/trunk/arch/arm/mach-tegra/tegra2_clocks.c index 0fe9b3ee2947..3325cd6b7f28 100644 --- a/trunk/arch/arm/mach-tegra/tegra2_clocks.c +++ b/trunk/arch/arm/mach-tegra/tegra2_clocks.c @@ -166,13 +166,13 @@ static DEFINE_SPINLOCK(clock_register_lock); static int tegra_periph_clk_enable_refcount[3 * 32]; #define clk_writel(value, reg) \ - __raw_writel(value, (u32)reg_clk_base + (reg)) + __raw_writel(value, reg_clk_base + (reg)) #define clk_readl(reg) \ - __raw_readl((u32)reg_clk_base + (reg)) + __raw_readl(reg_clk_base + (reg)) #define pmc_writel(value, reg) \ - __raw_writel(value, (u32)reg_pmc_base + (reg)) + __raw_writel(value, reg_pmc_base + (reg)) #define pmc_readl(reg) \ - __raw_readl((u32)reg_pmc_base + (reg)) + __raw_readl(reg_pmc_base + (reg)) unsigned long clk_measure_input_freq(void) {