From cd72c4f626a00d2cf4bd07da163333b4838cbf53 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Wed, 7 Sep 2011 08:45:31 +0200 Subject: [PATCH] --- yaml --- r: 272813 b: refs/heads/master c: ea42a0d058428845047206ff895e60520a7ff256 h: refs/heads/master i: 272811: 5690a26d361a5f132e068ccd89bc6e5bb0ef9e66 v: v3 --- [refs] | 2 +- trunk/arch/arm/configs/exynos4_defconfig | 1 - trunk/arch/arm/configs/mxs_defconfig | 1 + trunk/arch/arm/mach-at91/Kconfig | 13 - trunk/arch/arm/mach-at91/Makefile | 6 +- trunk/arch/arm/mach-at91/board-rsi-ews.c | 233 ----------- trunk/arch/arm/mach-at91/board-usb-a9260.c | 230 +++++++++++ .../{board-usb-a926x.c => board-usb-a9263.c} | 179 +-------- trunk/arch/arm/mach-at91/include/mach/timex.h | 5 - trunk/arch/arm/mach-ep93xx/Kconfig | 7 - trunk/arch/arm/mach-ep93xx/Makefile | 1 - trunk/arch/arm/mach-ep93xx/vision_ep9307.c | 364 ----------------- trunk/arch/arm/mach-exynos4/Kconfig | 71 +--- trunk/arch/arm/mach-exynos4/Makefile | 12 +- .../arch/arm/mach-exynos4/clock-exynos4210.c | 139 ------- .../arch/arm/mach-exynos4/clock-exynos4212.c | 118 ------ trunk/arch/arm/mach-exynos4/clock.c | 218 ++++------- trunk/arch/arm/mach-exynos4/cpu.c | 57 +-- .../mach-exynos4/include/mach/entry-macro.S | 29 +- .../mach-exynos4/include/mach/exynos4-clock.h | 43 -- .../arch/arm/mach-exynos4/include/mach/irqs.h | 2 - .../arch/arm/mach-exynos4/include/mach/map.h | 4 +- .../mach-exynos4/include/mach/regs-clock.h | 54 +-- .../arm/mach-exynos4/include/mach/regs-mct.h | 5 +- trunk/arch/arm/mach-exynos4/mach-origen.c | 108 ------ trunk/arch/arm/mach-exynos4/mach-smdk4x12.c | 302 --------------- trunk/arch/arm/mach-exynos4/mach-smdkc210.c | 309 +++++++++++++++ trunk/arch/arm/mach-exynos4/mach-smdkv310.c | 80 +--- trunk/arch/arm/mach-exynos4/mct.c | 166 ++++---- trunk/arch/arm/mach-exynos4/platsmp.c | 13 +- trunk/arch/arm/mach-exynos4/pm.c | 79 +++- trunk/arch/arm/mach-ixp4xx/Kconfig | 19 - trunk/arch/arm/mach-ixp4xx/Makefile | 4 - .../arm/mach-ixp4xx/include/mach/uncompress.h | 3 +- trunk/arch/arm/mach-ixp4xx/miccpt-pci.c | 78 ---- trunk/arch/arm/mach-ixp4xx/omixp-setup.c | 273 ------------- trunk/arch/arm/mach-mxs/Kconfig | 17 + trunk/arch/arm/mach-mxs/Makefile | 1 + trunk/arch/arm/mach-mxs/clock-mx28.c | 16 +- trunk/arch/arm/mach-mxs/include/mach/mxs.h | 1 + .../arm/mach-mxs/include/mach/uncompress.h | 1 + trunk/arch/arm/mach-mxs/mach-m28evk.c | 366 ++++++++++++++++++ trunk/arch/arm/mach-s3c64xx/cpu.c | 22 +- trunk/arch/arm/mach-s5p64x0/dev-spi.c | 8 +- trunk/arch/arm/mach-s5p64x0/dma.c | 7 +- trunk/arch/arm/mach-s5p64x0/gpiolib.c | 7 +- trunk/arch/arm/mach-s5p64x0/irq-eint.c | 3 +- trunk/arch/arm/mach-tegra/board-harmony.c | 5 +- .../arch/arm/mach-tegra/board-paz00-pinmux.c | 3 - trunk/arch/arm/mach-tegra/board-paz00.c | 62 +-- trunk/arch/arm/mach-tegra/board-paz00.h | 16 +- .../arm/mach-tegra/board-seaboard-pinmux.c | 6 +- trunk/arch/arm/mach-tegra/board-seaboard.c | 81 +--- trunk/arch/arm/mach-tegra/board-seaboard.h | 12 +- trunk/arch/arm/mach-tegra/board-trimslice.c | 3 +- trunk/arch/arm/plat-s3c24xx/cpu.c | 9 +- trunk/arch/arm/plat-s5p/cpu.c | 46 +-- .../arch/arm/plat-s5p/include/plat/exynos4.h | 5 +- trunk/arch/arm/plat-s5p/include/plat/pll.h | 55 +-- trunk/arch/arm/plat-samsung/Makefile | 2 +- trunk/arch/arm/plat-samsung/cpu.c | 58 --- .../arch/arm/plat-samsung/include/plat/cpu.h | 113 +----- 62 files changed, 1307 insertions(+), 2846 deletions(-) delete mode 100644 trunk/arch/arm/mach-at91/board-rsi-ews.c create mode 100644 trunk/arch/arm/mach-at91/board-usb-a9260.c rename trunk/arch/arm/mach-at91/{board-usb-a926x.c => board-usb-a9263.c} (54%) delete mode 100644 trunk/arch/arm/mach-ep93xx/vision_ep9307.c delete mode 100644 trunk/arch/arm/mach-exynos4/clock-exynos4210.c delete mode 100644 trunk/arch/arm/mach-exynos4/clock-exynos4212.c delete mode 100644 trunk/arch/arm/mach-exynos4/include/mach/exynos4-clock.h delete mode 100644 trunk/arch/arm/mach-exynos4/mach-origen.c delete mode 100644 trunk/arch/arm/mach-exynos4/mach-smdk4x12.c create mode 100644 trunk/arch/arm/mach-exynos4/mach-smdkc210.c delete mode 100644 trunk/arch/arm/mach-ixp4xx/miccpt-pci.c delete mode 100644 trunk/arch/arm/mach-ixp4xx/omixp-setup.c create mode 100644 trunk/arch/arm/mach-mxs/mach-m28evk.c delete mode 100644 trunk/arch/arm/plat-samsung/cpu.c diff --git a/[refs] b/[refs] index a7fa02c74d9d..42cf5740d628 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8eb41582d2106eccc7717047d1184481f5a1b3a6 +refs/heads/master: ea42a0d058428845047206ff895e60520a7ff256 diff --git a/trunk/arch/arm/configs/exynos4_defconfig b/trunk/arch/arm/configs/exynos4_defconfig index cd40bb56e568..da53ff3b4d70 100644 --- a/trunk/arch/arm/configs/exynos4_defconfig +++ b/trunk/arch/arm/configs/exynos4_defconfig @@ -11,7 +11,6 @@ CONFIG_MACH_SMDKV310=y CONFIG_MACH_ARMLEX4210=y CONFIG_MACH_UNIVERSAL_C210=y CONFIG_MACH_NURI=y -CONFIG_MACH_ORIGEN=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_SMP=y diff --git a/trunk/arch/arm/configs/mxs_defconfig b/trunk/arch/arm/configs/mxs_defconfig index db2cb7d180dc..6ee781bf6bf1 100644 --- a/trunk/arch/arm/configs/mxs_defconfig +++ b/trunk/arch/arm/configs/mxs_defconfig @@ -26,6 +26,7 @@ CONFIG_MACH_MX23EVK=y CONFIG_MACH_MX28EVK=y CONFIG_MACH_STMP378X_DEVB=y CONFIG_MACH_TX28=y +CONFIG_MACH_M28EVK=y # CONFIG_ARM_THUMB is not set CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y diff --git a/trunk/arch/arm/mach-at91/Kconfig b/trunk/arch/arm/mach-at91/Kconfig index 04a85c546abc..22484670e7ba 100644 --- a/trunk/arch/arm/mach-at91/Kconfig +++ b/trunk/arch/arm/mach-at91/Kconfig @@ -182,11 +182,6 @@ config MACH_ECO920 help Select this if you are using the eco920 board -config MACH_RSI_EWS - bool "RSI Embedded Webserver" - depends on ARCH_AT91RM9200 - help - Select this if you are using RSIs EWS board. endif # ---------------------------------------------------------- @@ -386,14 +381,6 @@ config MACH_GSIA18S This enables support for the GS_IA18_S board produced by GeoSIG Ltd company. This is an internet accelerograph. - -config MACH_USB_A9G20 - bool "CALAO USB-A9G20" - depends on ARCH_AT91SAM9G20 - help - Select this if you are using a Calao Systems USB-A9G20. - - endif if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20) diff --git a/trunk/arch/arm/mach-at91/Makefile b/trunk/arch/arm/mach-at91/Makefile index d992dd5d9321..bf57e8b1c9d0 100644 --- a/trunk/arch/arm/mach-at91/Makefile +++ b/trunk/arch/arm/mach-at91/Makefile @@ -36,13 +36,12 @@ obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o obj-$(CONFIG_MACH_ECO920) += board-eco920.o -obj-$(CONFIG_MACH_RSI_EWS) += board-rsi-ews.o # AT91SAM9260 board-specific support obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o obj-$(CONFIG_MACH_CAM60) += board-cam60.o obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o -obj-$(CONFIG_MACH_USB_A9260) += board-usb-a926x.o +obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o obj-$(CONFIG_MACH_CPU9260) += board-cpu9krea.o @@ -54,7 +53,7 @@ obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o # AT91SAM9263 board-specific support obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o -obj-$(CONFIG_MACH_USB_A9263) += board-usb-a926x.o +obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o obj-$(CONFIG_MACH_NEOCORE926) += board-neocore926.o # AT91SAM9RL board-specific support @@ -68,7 +67,6 @@ obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o -obj-$(CONFIG_MACH_USB_A9G20) += board-usb-a926x.o # AT91SAM9260/AT91SAM9G20 board-specific support obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o diff --git a/trunk/arch/arm/mach-at91/board-rsi-ews.c b/trunk/arch/arm/mach-at91/board-rsi-ews.c deleted file mode 100644 index e927df0175df..000000000000 --- a/trunk/arch/arm/mach-at91/board-rsi-ews.c +++ /dev/null @@ -1,233 +0,0 @@ -/* - * board-rsi-ews.c - * - * Copyright (C) - * 2005 SAN People, - * 2008-2011 R-S-I Elektrotechnik GmbH & Co. KG - * - * Licensed under GPLv2 or later. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include - -#include "generic.h" - -static void __init rsi_ews_init_early(void) -{ - /* Initialize processor: 18.432 MHz crystal */ - at91_initialize(18432000); - - /* Setup the LEDs */ - at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9); - - /* DBGU on ttyS0. (Rx & Tx only) */ - /* This one is for debugging */ - at91_register_uart(0, 0, 0); - - /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ - /* Dialin/-out modem interface */ - at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS - | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD - | ATMEL_UART_RI); - - /* USART3 on ttyS4. (Rx, Tx, RTS) */ - /* RS485 communication */ - at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS); - - /* set serial console to ttyS0 (ie, DBGU) */ - at91_set_serial_console(0); -} - -/* - * Ethernet - */ -static struct at91_eth_data rsi_ews_eth_data __initdata = { - .phy_irq_pin = AT91_PIN_PC4, - .is_rmii = 1, -}; - -/* - * USB Host - */ -static struct at91_usbh_data rsi_ews_usbh_data __initdata = { - .ports = 1, -}; - -/* - * SD/MC - */ -static struct at91_mmc_data rsi_ews_mmc_data __initdata = { - .slot_b = 0, - .wire4 = 1, - .det_pin = AT91_PIN_PB27, - .wp_pin = AT91_PIN_PB29, -}; - -/* - * I2C - */ -static struct i2c_board_info rsi_ews_i2c_devices[] __initdata = { - { - I2C_BOARD_INFO("ds1337", 0x68), - }, - { - I2C_BOARD_INFO("24c01", 0x50), - } -}; - -/* - * LEDs - */ -static struct gpio_led rsi_ews_leds[] = { - { - .name = "led0", - .gpio = AT91_PIN_PB6, - .active_low = 0, - }, - { - .name = "led1", - .gpio = AT91_PIN_PB7, - .active_low = 0, - }, - { - .name = "led2", - .gpio = AT91_PIN_PB8, - .active_low = 0, - }, - { - .name = "led3", - .gpio = AT91_PIN_PB9, - .active_low = 0, - }, -}; - -/* - * DataFlash - */ -static struct spi_board_info rsi_ews_spi_devices[] = { - { /* DataFlash chip 1*/ - .modalias = "mtd_dataflash", - .chip_select = 0, - .max_speed_hz = 5 * 1000 * 1000, - }, - { /* DataFlash chip 2*/ - .modalias = "mtd_dataflash", - .chip_select = 1, - .max_speed_hz = 5 * 1000 * 1000, - }, -}; - -/* - * NOR flash - */ -static struct mtd_partition rsiews_nor_partitions[] = { - { - .name = "boot", - .offset = 0, - .size = 3 * SZ_128K, - .mask_flags = MTD_WRITEABLE - }, - { - .name = "kernel", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_2M - (3 * SZ_128K) - }, - { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_8M - }, - { - .name = "kernelupd", - .offset = MTDPART_OFS_NXTBLK, - .size = 3 * SZ_512K, - .mask_flags = MTD_WRITEABLE - }, - { - .name = "rootupd", - .offset = MTDPART_OFS_NXTBLK, - .size = 9 * SZ_512K, - .mask_flags = MTD_WRITEABLE - }, -}; - -static struct physmap_flash_data rsiews_nor_data = { - .width = 2, - .parts = rsiews_nor_partitions, - .nr_parts = ARRAY_SIZE(rsiews_nor_partitions), -}; - -#define NOR_BASE AT91_CHIPSELECT_0 -#define NOR_SIZE SZ_16M - -static struct resource nor_flash_resources[] = { - { - .start = NOR_BASE, - .end = NOR_BASE + NOR_SIZE - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device rsiews_nor_flash = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &rsiews_nor_data, - }, - .resource = nor_flash_resources, - .num_resources = ARRAY_SIZE(nor_flash_resources), -}; - -/* - * Init Func - */ -static void __init rsi_ews_board_init(void) -{ - /* Serial */ - at91_add_device_serial(); - at91_set_gpio_output(AT91_PIN_PA21, 0); - /* Ethernet */ - at91_add_device_eth(&rsi_ews_eth_data); - /* USB Host */ - at91_add_device_usbh(&rsi_ews_usbh_data); - /* I2C */ - at91_add_device_i2c(rsi_ews_i2c_devices, - ARRAY_SIZE(rsi_ews_i2c_devices)); - /* SPI */ - at91_add_device_spi(rsi_ews_spi_devices, - ARRAY_SIZE(rsi_ews_spi_devices)); - /* MMC */ - at91_add_device_mmc(0, &rsi_ews_mmc_data); - /* NOR Flash */ - platform_device_register(&rsiews_nor_flash); - /* LEDs */ - at91_gpio_leds(rsi_ews_leds, ARRAY_SIZE(rsi_ews_leds)); -} - -MACHINE_START(RSI_EWS, "RSI EWS") - /* Maintainer: Josef Holzmayr */ - .timer = &at91rm9200_timer, - .map_io = at91_map_io, - .init_early = rsi_ews_init_early, - .init_irq = at91_init_irq_default, - .init_machine = rsi_ews_board_init, -MACHINE_END diff --git a/trunk/arch/arm/mach-at91/board-usb-a9260.c b/trunk/arch/arm/mach-at91/board-usb-a9260.c new file mode 100644 index 000000000000..8c4c1a02c4be --- /dev/null +++ b/trunk/arch/arm/mach-at91/board-usb-a9260.c @@ -0,0 +1,230 @@ +/* + * linux/arch/arm/mach-at91/board-usb-a9260.c + * + * Copyright (C) 2005 SAN People + * Copyright (C) 2006 Atmel + * Copyright (C) 2007 Calao-systems + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "sam9_smc.h" +#include "generic.h" + + +static void __init ek_init_early(void) +{ + /* Initialize processor: 12.000 MHz crystal */ + at91_initialize(12000000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata ek_usbh_data = { + .ports = 2, +}; + +/* + * USB Device port + */ +static struct at91_udc_data __initdata ek_udc_data = { + .vbus_pin = AT91_PIN_PC5, + .pullup_pin = 0, /* pull-up driven by UDC */ +}; + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata ek_macb_data = { + .phy_irq_pin = AT91_PIN_PA31, + .is_rmii = 1, +}; + +/* + * NAND flash + */ +static struct mtd_partition __initdata ek_nand_partition[] = { + { + .name = "Uboot & Kernel", + .offset = 0, + .size = SZ_16M, + }, + { + .name = "Root FS", + .offset = MTDPART_OFS_NXTBLK, + .size = 120 * SZ_1M, + }, + { + .name = "FS", + .offset = MTDPART_OFS_NXTBLK, + .size = 120 * SZ_1M, + } +}; + +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) +{ + *num_partitions = ARRAY_SIZE(ek_nand_partition); + return ek_nand_partition; +} + +static struct atmel_nand_data __initdata ek_nand_data = { + .ale = 21, + .cle = 22, +// .det_pin = ... not connected + .rdy_pin = AT91_PIN_PC13, + .enable_pin = AT91_PIN_PC14, + .partition_info = nand_partitions, +}; + +static struct sam9_smc_config __initdata ek_nand_smc_config = { + .ncs_read_setup = 0, + .nrd_setup = 1, + .ncs_write_setup = 0, + .nwe_setup = 1, + + .ncs_read_pulse = 3, + .nrd_pulse = 3, + .ncs_write_pulse = 3, + .nwe_pulse = 3, + + .read_cycle = 5, + .write_cycle = 5, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8, + .tdf_cycles = 2, +}; + +static void __init ek_add_device_nand(void) +{ + /* configure chip-select 3 (NAND) */ + sam9_smc_configure(3, &ek_nand_smc_config); + + at91_add_device_nand(&ek_nand_data); +} + +/* + * GPIO Buttons + */ + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +static struct gpio_keys_button ek_buttons[] = { + { /* USER PUSH BUTTON */ + .code = KEY_ENTER, + .gpio = AT91_PIN_PB10, + .active_low = 1, + .desc = "user_pb", + .wakeup = 1, + } +}; + +static struct gpio_keys_platform_data ek_button_data = { + .buttons = ek_buttons, + .nbuttons = ARRAY_SIZE(ek_buttons), +}; + +static struct platform_device ek_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &ek_button_data, + } +}; + +static void __init ek_add_device_buttons(void) +{ + at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */ + at91_set_deglitch(AT91_PIN_PB10, 1); + + platform_device_register(&ek_button_device); +} +#else +static void __init ek_add_device_buttons(void) {} +#endif + +/* + * LEDs + */ +static struct gpio_led ek_leds[] = { + { /* user_led (green) */ + .name = "user_led", + .gpio = AT91_PIN_PB21, + .active_low = 0, + .default_trigger = "heartbeat", + } +}; + +static void __init ek_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* USB Host */ + at91_add_device_usbh(&ek_usbh_data); + /* USB Device */ + at91_add_device_udc(&ek_udc_data); + /* NAND */ + ek_add_device_nand(); + /* I2C */ + at91_add_device_i2c(NULL, 0); + /* Ethernet */ + at91_add_device_eth(&ek_macb_data); + /* Push Buttons */ + ek_add_device_buttons(); + /* LEDs */ + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); + /* shutdown controller, wakeup button (5 msec low) */ + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW + | AT91_SHDW_RTTWKEN); +} + +MACHINE_START(USB_A9260, "CALAO USB_A9260") + /* Maintainer: calao-systems */ + .timer = &at91sam926x_timer, + .map_io = at91_map_io, + .init_early = ek_init_early, + .init_irq = at91_init_irq_default, + .init_machine = ek_board_init, +MACHINE_END diff --git a/trunk/arch/arm/mach-at91/board-usb-a926x.c b/trunk/arch/arm/mach-at91/board-usb-a9263.c similarity index 54% rename from trunk/arch/arm/mach-at91/board-usb-a926x.c rename to trunk/arch/arm/mach-at91/board-usb-a9263.c index 260260b81992..25e793782a4e 100644 --- a/trunk/arch/arm/mach-at91/board-usb-a926x.c +++ b/trunk/arch/arm/mach-at91/board-usb-a9263.c @@ -1,10 +1,9 @@ /* - * linux/arch/arm/mach-at91/board-usb-a926x.c + * linux/arch/arm/mach-at91/board-usb-a9263.c * * Copyright (C) 2005 SAN People * Copyright (C) 2007 Atmel Corporation. * Copyright (C) 2007 Calao-systems - * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -29,7 +28,6 @@ #include #include #include -#include #include #include @@ -76,42 +74,10 @@ static struct at91_udc_data __initdata ek_udc_data = { .pullup_pin = 0, /* pull-up driven by UDC */ }; -static void __init ek_add_device_udc(void) -{ - if (machine_is_usb_a9260() || machine_is_usb_a9g20()) - ek_udc_data.vbus_pin = AT91_PIN_PC5; - - at91_add_device_udc(&ek_udc_data); -} - -#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) -#define MMC_SPI_CARD_DETECT_INT AT91_PIN_PC4 -static int at91_mmc_spi_init(struct device *dev, - irqreturn_t (*detect_int)(int, void *), void *data) -{ - /* Configure Interrupt pin as input, no pull-up */ - at91_set_gpio_input(MMC_SPI_CARD_DETECT_INT, 0); - return request_irq(gpio_to_irq(MMC_SPI_CARD_DETECT_INT), detect_int, - IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, - "mmc-spi-detect", data); -} - -static void at91_mmc_spi_exit(struct device *dev, void *data) -{ - free_irq(gpio_to_irq(MMC_SPI_CARD_DETECT_INT), data); -} - -static struct mmc_spi_platform_data at91_mmc_spi_pdata = { - .init = at91_mmc_spi_init, - .exit = at91_mmc_spi_exit, - .detect_delay = 100, /* msecs */ -}; -#endif - /* * SPI devices. */ -static struct spi_board_info usb_a9263_spi_devices[] = { +static struct spi_board_info ek_spi_devices[] = { #if !defined(CONFIG_MMC_AT91) { /* DataFlash chip */ .modalias = "mtd_dataflash", @@ -122,27 +88,6 @@ static struct spi_board_info usb_a9263_spi_devices[] = { #endif }; -static struct spi_board_info usb_a9g20_spi_devices[] = { -#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) - { - .modalias = "mmc_spi", - .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ - .bus_num = 1, - .chip_select = 0, - .platform_data = &at91_mmc_spi_pdata, - .mode = SPI_MODE_3, - }, -#endif -}; - -static void __init ek_add_device_spi(void) -{ - if (machine_is_usb_a9263()) - at91_add_device_spi(usb_a9263_spi_devices, ARRAY_SIZE(usb_a9263_spi_devices)); - else if (machine_is_usb_a9g20()) - at91_add_device_spi(usb_a9g20_spi_devices, ARRAY_SIZE(usb_a9g20_spi_devices)); -} - /* * MACB Ethernet device */ @@ -151,42 +96,24 @@ static struct at91_eth_data __initdata ek_macb_data = { .is_rmii = 1, }; -static void __init ek_add_device_eth(void) -{ - if (machine_is_usb_a9260() || machine_is_usb_a9g20()) - ek_macb_data.phy_irq_pin = AT91_PIN_PA31; - - at91_add_device_eth(&ek_macb_data); -} - /* * NAND flash */ static struct mtd_partition __initdata ek_nand_partition[] = { { - .name = "barebox", + .name = "Linux Kernel", .offset = 0, - .size = 3 * SZ_128K, - }, { - .name = "bareboxenv", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_128K, - }, { - .name = "bareboxenv2", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_128K, - }, { - .name = "kernel", - .offset = MTDPART_OFS_NXTBLK, - .size = 4 * SZ_1M, - }, { - .name = "rootfs", + .size = SZ_16M, + }, + { + .name = "Root FS", .offset = MTDPART_OFS_NXTBLK, .size = 120 * SZ_1M, - }, { - .name = "data", + }, + { + .name = "FS", .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL, + .size = 120 * SZ_1M, } }; @@ -205,7 +132,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { .partition_info = nand_partitions, }; -static struct sam9_smc_config __initdata usb_a9260_nand_smc_config = { +static struct sam9_smc_config __initdata ek_nand_smc_config = { .ncs_read_setup = 0, .nrd_setup = 1, .ncs_write_setup = 0, @@ -223,36 +150,10 @@ static struct sam9_smc_config __initdata usb_a9260_nand_smc_config = { .tdf_cycles = 2, }; -static struct sam9_smc_config __initdata usb_a9g20_nand_smc_config = { - .ncs_read_setup = 0, - .nrd_setup = 2, - .ncs_write_setup = 0, - .nwe_setup = 2, - - .ncs_read_pulse = 4, - .nrd_pulse = 4, - .ncs_write_pulse = 4, - .nwe_pulse = 4, - - .read_cycle = 7, - .write_cycle = 7, - - .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8, - .tdf_cycles = 3, -}; - static void __init ek_add_device_nand(void) { - if (machine_is_usb_a9260() || machine_is_usb_a9g20()) { - ek_nand_data.rdy_pin = AT91_PIN_PC13; - ek_nand_data.enable_pin = AT91_PIN_PC14; - } - /* configure chip-select 3 (NAND) */ - if (machine_is_usb_a9g20()) - sam9_smc_configure(3, &usb_a9g20_nand_smc_config); - else - sam9_smc_configure(3, &usb_a9260_nand_smc_config); + sam9_smc_configure(3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -309,19 +210,6 @@ static struct gpio_led ek_leds[] = { } }; -static struct i2c_board_info __initdata ek_i2c_devices[] = { - { - I2C_BOARD_INFO("rv3029c2", 0x56), - }, -}; - -static void __init ek_add_device_leds(void) -{ - if (machine_is_usb_a9260() || machine_is_usb_a9g20()) - ek_leds[0].active_low = 0; - - at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); -} static void __init ek_board_init(void) { @@ -330,29 +218,22 @@ static void __init ek_board_init(void) /* USB Host */ at91_add_device_usbh(&ek_usbh_data); /* USB Device */ - ek_add_device_udc(); + at91_add_device_udc(&ek_udc_data); /* SPI */ - ek_add_device_spi(); + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); /* Ethernet */ - ek_add_device_eth(); + at91_add_device_eth(&ek_macb_data); /* NAND */ ek_add_device_nand(); + /* I2C */ + at91_add_device_i2c(NULL, 0); /* Push Buttons */ ek_add_device_buttons(); /* LEDs */ - ek_add_device_leds(); - - if (machine_is_usb_a9g20()) { - /* I2C */ - at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices)); - } else { - /* I2C */ - at91_add_device_i2c(NULL, 0); - /* shutdown controller, wakeup button (5 msec low) */ - at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) - | AT91_SHDW_WKMODE0_LOW + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); + /* shutdown controller, wakeup button (5 msec low) */ + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW | AT91_SHDW_RTTWKEN); - } } MACHINE_START(USB_A9263, "CALAO USB_A9263") @@ -363,21 +244,3 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263") .init_irq = at91_init_irq_default, .init_machine = ek_board_init, MACHINE_END - -MACHINE_START(USB_A9260, "CALAO USB_A9260") - /* Maintainer: calao-systems */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -MACHINE_END - -MACHINE_START(USB_A9G20, "CALAO USB_A92G0") - /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ - .timer = &at91sam926x_timer, - .map_io = at91_map_io, - .init_early = ek_init_early, - .init_irq = at91_init_irq_default, - .init_machine = ek_board_init, -MACHINE_END diff --git a/trunk/arch/arm/mach-at91/include/mach/timex.h b/trunk/arch/arm/mach-at91/include/mach/timex.h index 85820ad801cc..31ac2d97f14c 100644 --- a/trunk/arch/arm/mach-at91/include/mach/timex.h +++ b/trunk/arch/arm/mach-at91/include/mach/timex.h @@ -64,12 +64,7 @@ #elif defined(CONFIG_ARCH_AT91SAM9G20) -#if defined(CONFIG_MACH_USB_A9G20) -#define AT91SAM9_MASTER_CLOCK 133000000 -#else #define AT91SAM9_MASTER_CLOCK 132096000 -#endif - #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) #elif defined(CONFIG_ARCH_AT91SAM9G45) diff --git a/trunk/arch/arm/mach-ep93xx/Kconfig b/trunk/arch/arm/mach-ep93xx/Kconfig index 97a249395b5a..3a08b18f6433 100644 --- a/trunk/arch/arm/mach-ep93xx/Kconfig +++ b/trunk/arch/arm/mach-ep93xx/Kconfig @@ -182,13 +182,6 @@ config MACH_TS72XX Say 'Y' here if you want your kernel to support the Technologic Systems TS-72xx board. -config MACH_VISION_EP9307 - bool "Support Vision Engraving Systems EP9307 SoM" - depends on EP93XX_SDCE0_PHYS_OFFSET - help - Say 'Y' here if you want your kernel to support the - Vision Engraving Systems EP9307 SoM. - choice prompt "Select a UART for early kernel messages" diff --git a/trunk/arch/arm/mach-ep93xx/Makefile b/trunk/arch/arm/mach-ep93xx/Makefile index 574209d9e246..3cedcf2d39e5 100644 --- a/trunk/arch/arm/mach-ep93xx/Makefile +++ b/trunk/arch/arm/mach-ep93xx/Makefile @@ -15,4 +15,3 @@ obj-$(CONFIG_MACH_MICRO9) += micro9.o obj-$(CONFIG_MACH_SIM_ONE) += simone.o obj-$(CONFIG_MACH_SNAPPER_CL15) += snappercl15.o obj-$(CONFIG_MACH_TS72XX) += ts72xx.o -obj-$(CONFIG_MACH_VISION_EP9307)+= vision_ep9307.o diff --git a/trunk/arch/arm/mach-ep93xx/vision_ep9307.c b/trunk/arch/arm/mach-ep93xx/vision_ep9307.c deleted file mode 100644 index 10f6488f6e44..000000000000 --- a/trunk/arch/arm/mach-ep93xx/vision_ep9307.c +++ /dev/null @@ -1,364 +0,0 @@ -/* - * arch/arm/mach-ep93xx/vision_ep9307.c - * Vision Engraving Systems EP9307 SoM support. - * - * Copyright (C) 2008-2011 Vision Engraving Systems - * H Hartley Sweeten - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or (at - * your option) any later version. - */ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -/************************************************************************* - * Static I/O mappings for the FPGA - *************************************************************************/ -#define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE -#define VISION_VIRT_BASE 0xfebff000 - -static struct map_desc vision_io_desc[] __initdata = { - { - .virtual = VISION_VIRT_BASE, - .pfn = __phys_to_pfn(VISION_PHYS_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static void __init vision_map_io(void) -{ - ep93xx_map_io(); - - iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc)); -} - -/************************************************************************* - * Ethernet - *************************************************************************/ -static struct ep93xx_eth_data vision_eth_data __initdata = { - .phy_id = 1, -}; - -/************************************************************************* - * Framebuffer - *************************************************************************/ -#define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1 - -static int vision_lcd_setup(struct platform_device *pdev) -{ - int err; - - err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH, - dev_name(&pdev->dev)); - if (err) - return err; - - ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS | - EP93XX_SYSCON_DEVCFG_RASONP3 | - EP93XX_SYSCON_DEVCFG_EXVC); - - return 0; -} - -static void vision_lcd_teardown(struct platform_device *pdev) -{ - gpio_free(VISION_LCD_ENABLE); -} - -static void vision_lcd_blank(int blank_mode, struct fb_info *info) -{ - if (blank_mode) - gpio_set_value(VISION_LCD_ENABLE, 0); - else - gpio_set_value(VISION_LCD_ENABLE, 1); -} - -static struct ep93xxfb_mach_info ep93xxfb_info __initdata = { - .num_modes = EP93XXFB_USE_MODEDB, - .bpp = 16, - .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING, - .setup = vision_lcd_setup, - .teardown = vision_lcd_teardown, - .blank = vision_lcd_blank, -}; - - -/************************************************************************* - * GPIO Expanders - *************************************************************************/ -#define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1) -#define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16) -#define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16) -#define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16) - -static struct pca953x_platform_data pca953x_74_gpio_data = { - .gpio_base = PCA9539_74_GPIO_BASE, - .irq_base = EP93XX_BOARD_IRQ(0), -}; - -static struct pca953x_platform_data pca953x_75_gpio_data = { - .gpio_base = PCA9539_75_GPIO_BASE, - .irq_base = -1, -}; - -static struct pca953x_platform_data pca953x_76_gpio_data = { - .gpio_base = PCA9539_76_GPIO_BASE, - .irq_base = -1, -}; - -static struct pca953x_platform_data pca953x_77_gpio_data = { - .gpio_base = PCA9539_77_GPIO_BASE, - .irq_base = -1, -}; - -/************************************************************************* - * I2C Bus - *************************************************************************/ -static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = { - .sda_pin = EP93XX_GPIO_LINE_EEDAT, - .scl_pin = EP93XX_GPIO_LINE_EECLK, -}; - -static struct i2c_board_info vision_i2c_info[] __initdata = { - { - I2C_BOARD_INFO("isl1208", 0x6f), - .irq = IRQ_EP93XX_EXT1, - }, { - I2C_BOARD_INFO("pca9539", 0x74), - .platform_data = &pca953x_74_gpio_data, - .irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)), - }, { - I2C_BOARD_INFO("pca9539", 0x75), - .platform_data = &pca953x_75_gpio_data, - }, { - I2C_BOARD_INFO("pca9539", 0x76), - .platform_data = &pca953x_76_gpio_data, - }, { - I2C_BOARD_INFO("pca9539", 0x77), - .platform_data = &pca953x_77_gpio_data, - }, -}; - -/************************************************************************* - * SPI Flash - *************************************************************************/ -#define VISION_SPI_FLASH_CS EP93XX_GPIO_LINE_EGPIO7 - -static struct mtd_partition vision_spi_flash_partitions[] = { - { - .name = "SPI bootstrap", - .offset = 0, - .size = SZ_4K, - }, { - .name = "Bootstrap config", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4K, - }, { - .name = "System config", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct flash_platform_data vision_spi_flash_data = { - .name = "SPI Flash", - .parts = vision_spi_flash_partitions, - .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions), -}; - -static int vision_spi_flash_hw_setup(struct spi_device *spi) -{ - return gpio_request_one(VISION_SPI_FLASH_CS, GPIOF_INIT_HIGH, - spi->modalias); -} - -static void vision_spi_flash_hw_cleanup(struct spi_device *spi) -{ - gpio_free(VISION_SPI_FLASH_CS); -} - -static void vision_spi_flash_hw_cs_control(struct spi_device *spi, int value) -{ - gpio_set_value(VISION_SPI_FLASH_CS, value); -} - -static struct ep93xx_spi_chip_ops vision_spi_flash_hw = { - .setup = vision_spi_flash_hw_setup, - .cleanup = vision_spi_flash_hw_cleanup, - .cs_control = vision_spi_flash_hw_cs_control, -}; - -/************************************************************************* - * SPI SD/MMC host - *************************************************************************/ -#define VISION_SPI_MMC_CS EP93XX_GPIO_LINE_G(2) -#define VISION_SPI_MMC_WP EP93XX_GPIO_LINE_F(0) -#define VISION_SPI_MMC_CD EP93XX_GPIO_LINE_EGPIO15 - -static struct gpio vision_spi_mmc_gpios[] = { - { VISION_SPI_MMC_WP, GPIOF_DIR_IN, "mmc_spi:wp" }, - { VISION_SPI_MMC_CD, GPIOF_DIR_IN, "mmc_spi:cd" }, -}; - -static int vision_spi_mmc_init(struct device *pdev, - irqreturn_t (*func)(int, void *), void *pdata) -{ - int err; - - err = gpio_request_array(vision_spi_mmc_gpios, - ARRAY_SIZE(vision_spi_mmc_gpios)); - if (err) - return err; - - err = gpio_set_debounce(VISION_SPI_MMC_CD, 1); - if (err) - goto exit_err; - - err = request_irq(gpio_to_irq(VISION_SPI_MMC_CD), func, - IRQ_TYPE_EDGE_BOTH, "mmc_spi:cd", pdata); - if (err) - goto exit_err; - - return 0; - -exit_err: - gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios)); - return err; - -} - -static void vision_spi_mmc_exit(struct device *pdev, void *pdata) -{ - free_irq(gpio_to_irq(VISION_SPI_MMC_CD), pdata); - gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios)); -} - -static int vision_spi_mmc_get_ro(struct device *pdev) -{ - return !!gpio_get_value(VISION_SPI_MMC_WP); -} - -static int vision_spi_mmc_get_cd(struct device *pdev) -{ - return !gpio_get_value(VISION_SPI_MMC_CD); -} - -static struct mmc_spi_platform_data vision_spi_mmc_data = { - .init = vision_spi_mmc_init, - .exit = vision_spi_mmc_exit, - .get_ro = vision_spi_mmc_get_ro, - .get_cd = vision_spi_mmc_get_cd, - .detect_delay = 100, - .powerup_msecs = 100, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static int vision_spi_mmc_hw_setup(struct spi_device *spi) -{ - return gpio_request_one(VISION_SPI_MMC_CS, GPIOF_INIT_HIGH, - spi->modalias); -} - -static void vision_spi_mmc_hw_cleanup(struct spi_device *spi) -{ - gpio_free(VISION_SPI_MMC_CS); -} - -static void vision_spi_mmc_hw_cs_control(struct spi_device *spi, int value) -{ - gpio_set_value(VISION_SPI_MMC_CS, value); -} - -static struct ep93xx_spi_chip_ops vision_spi_mmc_hw = { - .setup = vision_spi_mmc_hw_setup, - .cleanup = vision_spi_mmc_hw_cleanup, - .cs_control = vision_spi_mmc_hw_cs_control, -}; - -/************************************************************************* - * SPI Bus - *************************************************************************/ -static struct spi_board_info vision_spi_board_info[] __initdata = { - { - .modalias = "sst25l", - .platform_data = &vision_spi_flash_data, - .controller_data = &vision_spi_flash_hw, - .max_speed_hz = 20000000, - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_3, - }, { - .modalias = "mmc_spi", - .platform_data = &vision_spi_mmc_data, - .controller_data = &vision_spi_mmc_hw, - .max_speed_hz = 20000000, - .bus_num = 0, - .chip_select = 1, - .mode = SPI_MODE_3, - }, -}; - -static struct ep93xx_spi_info vision_spi_master __initdata = { - .num_chipselect = ARRAY_SIZE(vision_spi_board_info), -}; - -/************************************************************************* - * Machine Initialization - *************************************************************************/ -static void __init vision_init_machine(void) -{ - ep93xx_init_devices(); - ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M); - ep93xx_register_eth(&vision_eth_data, 1); - ep93xx_register_fb(&ep93xxfb_info); - ep93xx_register_pwm(1, 0); - - /* - * Request the gpio expander's interrupt gpio line now to prevent - * the kernel from doing a WARN in gpiolib:gpio_ensure_requested(). - */ - if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN, - "pca9539:74")) - pr_warn("cannot request interrupt gpio for pca9539:74\n"); - - ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info, - ARRAY_SIZE(vision_i2c_info)); - ep93xx_register_spi(&vision_spi_master, vision_spi_board_info, - ARRAY_SIZE(vision_spi_board_info)); -} - -MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") - /* Maintainer: H Hartley Sweeten */ - .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, - .map_io = vision_map_io, - .init_irq = ep93xx_init_irq, - .timer = &ep93xx_timer, - .init_machine = vision_init_machine, -MACHINE_END diff --git a/trunk/arch/arm/mach-exynos4/Kconfig b/trunk/arch/arm/mach-exynos4/Kconfig index fec23859388b..0c77ab99fa16 100644 --- a/trunk/arch/arm/mach-exynos4/Kconfig +++ b/trunk/arch/arm/mach-exynos4/Kconfig @@ -15,16 +15,6 @@ config CPU_EXYNOS4210 help Enable EXYNOS4210 CPU support -config SOC_EXYNOS4212 - bool - help - Enable EXYNOS4212 SoC support - -config SOC_EXYNOS4412 - bool - help - Enable EXYNOS4412 SoC support - config EXYNOS4_MCT bool default y @@ -121,11 +111,24 @@ config EXYNOS4_SETUP_USB_PHY menu "EXYNOS4 Machines" -comment "EXYNOS4210 Boards" - config MACH_SMDKC210 bool "SMDKC210" - select MACH_SMDKV310 + select CPU_EXYNOS4210 + select S5P_DEV_FIMD0 + select S3C_DEV_RTC + select S3C_DEV_WDT + select S3C_DEV_I2C1 + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 + select S3C_DEV_HSMMC2 + select S3C_DEV_HSMMC3 + select SAMSUNG_DEV_PWM + select SAMSUNG_DEV_BACKLIGHT + select EXYNOS4_DEV_PD + select EXYNOS4_DEV_SYSMMU + select EXYNOS4_SETUP_FIMD0 + select EXYNOS4_SETUP_I2C1 + select EXYNOS4_SETUP_SDHCI help Machine support for Samsung SMDKC210 @@ -215,48 +218,6 @@ config MACH_NURI help Machine support for Samsung Mobile NURI Board. -config MACH_ORIGEN - bool "ORIGEN" - select CPU_EXYNOS4210 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S3C_DEV_HSMMC2 - select EXYNOS4_SETUP_SDHCI - help - Machine support for ORIGEN based on Samsung EXYNOS4210 - -comment "EXYNOS4212 Boards" - -config MACH_SMDK4212 - bool "SMDK4212" - select SOC_EXYNOS4212 - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_I2C3 - select S3C_DEV_I2C7 - select S3C_DEV_RTC - select S3C_DEV_WDT - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_KEYPAD - select SAMSUNG_DEV_PWM - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_I2C3 - select EXYNOS4_SETUP_I2C7 - select EXYNOS4_SETUP_KEYPAD - select EXYNOS4_SETUP_SDHCI - help - Machine support for Samsung SMDK4212 - -comment "EXYNOS4412 Boards" - -config MACH_SMDK4412 - bool "SMDK4412" - select SOC_EXYNOS4412 - select MACH_SMDK4212 - help - Machine support for Samsung SMDK4412 - endmenu comment "Configuration for HSMMC bus width" diff --git a/trunk/arch/arm/mach-exynos4/Makefile b/trunk/arch/arm/mach-exynos4/Makefile index c9b2e1f97e44..b7fe1d7b0b1f 100644 --- a/trunk/arch/arm/mach-exynos4/Makefile +++ b/trunk/arch/arm/mach-exynos4/Makefile @@ -12,10 +12,8 @@ obj- := # Core support for EXYNOS4 system -obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o irq-eint.o dma.o pmu.o -obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o -obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o +obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o +obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o @@ -27,15 +25,11 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o # machine support -obj-$(CONFIG_MACH_SMDKC210) += mach-smdkv310.o +obj-$(CONFIG_MACH_SMDKC210) += mach-smdkc210.o obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o obj-$(CONFIG_MACH_NURI) += mach-nuri.o -obj-$(CONFIG_MACH_ORIGEN) += mach-origen.o - -obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4x12.o -obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o # device support diff --git a/trunk/arch/arm/mach-exynos4/clock-exynos4210.c b/trunk/arch/arm/mach-exynos4/clock-exynos4210.c deleted file mode 100644 index b9d5ef670eb4..000000000000 --- a/trunk/arch/arm/mach-exynos4/clock-exynos4210.c +++ /dev/null @@ -1,139 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/clock-exynos4210.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4210 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -static struct sleep_save exynos4210_clock_save[] = { - SAVE_ITEM(S5P_CLKSRC_IMAGE), - SAVE_ITEM(S5P_CLKSRC_LCD1), - SAVE_ITEM(S5P_CLKDIV_IMAGE), - SAVE_ITEM(S5P_CLKDIV_LCD1), - SAVE_ITEM(S5P_CLKSRC_MASK_LCD1), - SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4210), - SAVE_ITEM(S5P_CLKGATE_IP_LCD1), - SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210), -}; - -static struct clksrc_clk *sysclks[] = { - /* nothing here yet */ -}; - -static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKSRC_MASK_LCD1, clk, enable); -} - -static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "sclk_sata", - .id = -1, - .enable = exynos4_clksrc_mask_fsys_ctrl, - .ctrlbit = (1 << 24), - }, - .sources = &clkset_mout_corebus, - .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 24, .size = 1 }, - .reg_div = { .reg = S5P_CLKDIV_FSYS0, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimd", - .devname = "exynos4-fb.1", - .enable = exynos4_clksrc_mask_lcd1_ctrl, - .ctrlbit = (1 << 0), - }, - .sources = &clkset_group, - .reg_src = { .reg = S5P_CLKSRC_LCD1, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLKDIV_LCD1, .shift = 0, .size = 4 }, - }, -}; - -static struct clk init_clocks_off[] = { - { - .name = "sataphy", - .id = -1, - .parent = &clk_aclk_133.clk, - .enable = exynos4_clk_ip_fsys_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "sata", - .id = -1, - .parent = &clk_aclk_133.clk, - .enable = exynos4_clk_ip_fsys_ctrl, - .ctrlbit = (1 << 10), - }, { - .name = "fimd", - .devname = "exynos4-fb.1", - .enable = exynos4_clk_ip_lcd1_ctrl, - .ctrlbit = (1 << 0), - }, -}; - -#ifdef CONFIG_PM_SLEEP -static int exynos4210_clock_suspend(void) -{ - s3c_pm_do_save(exynos4210_clock_save, ARRAY_SIZE(exynos4210_clock_save)); - - return 0; -} - -static void exynos4210_clock_resume(void) -{ - s3c_pm_do_restore_core(exynos4210_clock_save, ARRAY_SIZE(exynos4210_clock_save)); -} - -#else -#define exynos4210_clock_suspend NULL -#define exynos4210_clock_resume NULL -#endif - -struct syscore_ops exynos4210_clock_syscore_ops = { - .suspend = exynos4210_clock_suspend, - .resume = exynos4210_clock_resume, -}; - -void __init exynos4210_register_clocks(void) -{ - int ptr; - - clk_mout_mpll.reg_src.reg = S5P_CLKSRC_CPU; - clk_mout_mpll.reg_src.shift = 8; - clk_mout_mpll.reg_src.size = 1; - - for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) - s3c_register_clksrc(sysclks[ptr], 1); - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); - - s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - - register_syscore_ops(&exynos4210_clock_syscore_ops); -} diff --git a/trunk/arch/arm/mach-exynos4/clock-exynos4212.c b/trunk/arch/arm/mach-exynos4/clock-exynos4212.c deleted file mode 100644 index 77d5decb34fd..000000000000 --- a/trunk/arch/arm/mach-exynos4/clock-exynos4212.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/clock-exynos4212.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4212 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -static struct sleep_save exynos4212_clock_save[] = { - SAVE_ITEM(S5P_CLKSRC_IMAGE), - SAVE_ITEM(S5P_CLKDIV_IMAGE), - SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4212), - SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4212), -}; - -static struct clk *clk_src_mpll_user_list[] = { - [0] = &clk_fin_mpll, - [1] = &clk_mout_mpll.clk, -}; - -static struct clksrc_sources clk_src_mpll_user = { - .sources = clk_src_mpll_user_list, - .nr_sources = ARRAY_SIZE(clk_src_mpll_user_list), -}; - -static struct clksrc_clk clk_mout_mpll_user = { - .clk = { - .name = "mout_mpll_user", - }, - .sources = &clk_src_mpll_user, - .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 24, .size = 1 }, -}; - -static struct clksrc_clk *sysclks[] = { - &clk_mout_mpll_user, -}; - -static struct clksrc_clk clksrcs[] = { - /* nothing here yet */ -}; - -static struct clk init_clocks_off[] = { - /* nothing here yet */ -}; - -#ifdef CONFIG_PM_SLEEP -static int exynos4212_clock_suspend(void) -{ - s3c_pm_do_save(exynos4212_clock_save, ARRAY_SIZE(exynos4212_clock_save)); - - return 0; -} - -static void exynos4212_clock_resume(void) -{ - s3c_pm_do_restore_core(exynos4212_clock_save, ARRAY_SIZE(exynos4212_clock_save)); -} - -#else -#define exynos4212_clock_suspend NULL -#define exynos4212_clock_resume NULL -#endif - -struct syscore_ops exynos4212_clock_syscore_ops = { - .suspend = exynos4212_clock_suspend, - .resume = exynos4212_clock_resume, -}; - -void __init exynos4212_register_clocks(void) -{ - int ptr; - - /* usbphy1 is removed */ - clkset_group_list[4] = NULL; - - /* mout_mpll_user is used */ - clkset_group_list[6] = &clk_mout_mpll_user.clk; - clkset_aclk_top_list[0] = &clk_mout_mpll_user.clk; - - clk_mout_mpll.reg_src.reg = S5P_CLKSRC_DMC; - clk_mout_mpll.reg_src.shift = 12; - clk_mout_mpll.reg_src.size = 1; - - for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) - s3c_register_clksrc(sysclks[ptr], 1); - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); - - s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - - register_syscore_ops(&exynos4212_clock_syscore_ops); -} diff --git a/trunk/arch/arm/mach-exynos4/clock.c b/trunk/arch/arm/mach-exynos4/clock.c index 0d59be3fa1fe..86964d2e9e1b 100644 --- a/trunk/arch/arm/mach-exynos4/clock.c +++ b/trunk/arch/arm/mach-exynos4/clock.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include @@ -21,93 +20,26 @@ #include #include #include -#include -#include #include #include #include -#include - -static struct sleep_save exynos4_clock_save[] = { - SAVE_ITEM(S5P_CLKDIV_LEFTBUS), - SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), - SAVE_ITEM(S5P_CLKDIV_RIGHTBUS), - SAVE_ITEM(S5P_CLKGATE_IP_RIGHTBUS), - SAVE_ITEM(S5P_CLKSRC_TOP0), - SAVE_ITEM(S5P_CLKSRC_TOP1), - SAVE_ITEM(S5P_CLKSRC_CAM), - SAVE_ITEM(S5P_CLKSRC_TV), - SAVE_ITEM(S5P_CLKSRC_MFC), - SAVE_ITEM(S5P_CLKSRC_G3D), - SAVE_ITEM(S5P_CLKSRC_LCD0), - SAVE_ITEM(S5P_CLKSRC_MAUDIO), - SAVE_ITEM(S5P_CLKSRC_FSYS), - SAVE_ITEM(S5P_CLKSRC_PERIL0), - SAVE_ITEM(S5P_CLKSRC_PERIL1), - SAVE_ITEM(S5P_CLKDIV_CAM), - SAVE_ITEM(S5P_CLKDIV_TV), - SAVE_ITEM(S5P_CLKDIV_MFC), - SAVE_ITEM(S5P_CLKDIV_G3D), - SAVE_ITEM(S5P_CLKDIV_LCD0), - SAVE_ITEM(S5P_CLKDIV_MAUDIO), - SAVE_ITEM(S5P_CLKDIV_FSYS0), - SAVE_ITEM(S5P_CLKDIV_FSYS1), - SAVE_ITEM(S5P_CLKDIV_FSYS2), - SAVE_ITEM(S5P_CLKDIV_FSYS3), - SAVE_ITEM(S5P_CLKDIV_PERIL0), - SAVE_ITEM(S5P_CLKDIV_PERIL1), - SAVE_ITEM(S5P_CLKDIV_PERIL2), - SAVE_ITEM(S5P_CLKDIV_PERIL3), - SAVE_ITEM(S5P_CLKDIV_PERIL4), - SAVE_ITEM(S5P_CLKDIV_PERIL5), - SAVE_ITEM(S5P_CLKDIV_TOP), - SAVE_ITEM(S5P_CLKSRC_MASK_TOP), - SAVE_ITEM(S5P_CLKSRC_MASK_CAM), - SAVE_ITEM(S5P_CLKSRC_MASK_TV), - SAVE_ITEM(S5P_CLKSRC_MASK_LCD0), - SAVE_ITEM(S5P_CLKSRC_MASK_MAUDIO), - SAVE_ITEM(S5P_CLKSRC_MASK_FSYS), - SAVE_ITEM(S5P_CLKSRC_MASK_PERIL0), - SAVE_ITEM(S5P_CLKSRC_MASK_PERIL1), - SAVE_ITEM(S5P_CLKDIV2_RATIO), - SAVE_ITEM(S5P_CLKGATE_SCLKCAM), - SAVE_ITEM(S5P_CLKGATE_IP_CAM), - SAVE_ITEM(S5P_CLKGATE_IP_TV), - SAVE_ITEM(S5P_CLKGATE_IP_MFC), - SAVE_ITEM(S5P_CLKGATE_IP_G3D), - SAVE_ITEM(S5P_CLKGATE_IP_LCD0), - SAVE_ITEM(S5P_CLKGATE_IP_FSYS), - SAVE_ITEM(S5P_CLKGATE_IP_GPS), - SAVE_ITEM(S5P_CLKGATE_IP_PERIL), - SAVE_ITEM(S5P_CLKGATE_BLOCK), - SAVE_ITEM(S5P_CLKSRC_MASK_DMC), - SAVE_ITEM(S5P_CLKSRC_DMC), - SAVE_ITEM(S5P_CLKDIV_DMC0), - SAVE_ITEM(S5P_CLKDIV_DMC1), - SAVE_ITEM(S5P_CLKGATE_IP_DMC), - SAVE_ITEM(S5P_CLKSRC_CPU), - SAVE_ITEM(S5P_CLKDIV_CPU), - SAVE_ITEM(S5P_CLKDIV_CPU + 0x4), - SAVE_ITEM(S5P_CLKGATE_SCLKCPU), - SAVE_ITEM(S5P_CLKGATE_IP_CPU), -}; - -struct clk clk_sclk_hdmi27m = { + +static struct clk clk_sclk_hdmi27m = { .name = "sclk_hdmi27m", .rate = 27000000, }; -struct clk clk_sclk_hdmiphy = { +static struct clk clk_sclk_hdmiphy = { .name = "sclk_hdmiphy", }; -struct clk clk_sclk_usbphy0 = { +static struct clk clk_sclk_usbphy0 = { .name = "sclk_usbphy0", .rate = 27000000, }; -struct clk clk_sclk_usbphy1 = { +static struct clk clk_sclk_usbphy1 = { .name = "sclk_usbphy1", }; @@ -126,7 +58,12 @@ static int exynos4_clksrc_mask_lcd0_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLKSRC_MASK_LCD0, clk, enable); } -int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable) +static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKSRC_MASK_LCD1, clk, enable); +} + +static int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKSRC_MASK_FSYS, clk, enable); } @@ -166,12 +103,12 @@ static int exynos4_clk_ip_lcd0_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLKGATE_IP_LCD0, clk, enable); } -int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable) +static int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKGATE_IP_LCD1, clk, enable); } -int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable) +static int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKGATE_IP_FSYS, clk, enable); } @@ -196,7 +133,7 @@ static struct clksrc_clk clk_mout_apll = { .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 }, }; -struct clksrc_clk clk_sclk_apll = { +static struct clksrc_clk clk_sclk_apll = { .clk = { .name = "sclk_apll", .parent = &clk_mout_apll.clk, @@ -204,7 +141,7 @@ struct clksrc_clk clk_sclk_apll = { .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 }, }; -struct clksrc_clk clk_mout_epll = { +static struct clksrc_clk clk_mout_epll = { .clk = { .name = "mout_epll", }, @@ -212,13 +149,12 @@ struct clksrc_clk clk_mout_epll = { .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 4, .size = 1 }, }; -struct clksrc_clk clk_mout_mpll = { +static struct clksrc_clk clk_mout_mpll = { .clk = { .name = "mout_mpll", }, .sources = &clk_src_mpll, - - /* reg_src will be added in each SoCs' clock */ + .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 8, .size = 1 }, }; static struct clk *clkset_moutcore_list[] = { @@ -288,12 +224,12 @@ static struct clksrc_clk clk_periphclk = { /* Core list of CMU_CORE side */ -struct clk *clkset_corebus_list[] = { +static struct clk *clkset_corebus_list[] = { [0] = &clk_mout_mpll.clk, [1] = &clk_sclk_apll.clk, }; -struct clksrc_sources clkset_mout_corebus = { +static struct clksrc_sources clkset_mout_corebus = { .sources = clkset_corebus_list, .nr_sources = ARRAY_SIZE(clkset_corebus_list), }; @@ -348,12 +284,12 @@ static struct clksrc_clk clk_pclk_acp = { /* Core list of CMU_TOP side */ -struct clk *clkset_aclk_top_list[] = { +static struct clk *clkset_aclk_top_list[] = { [0] = &clk_mout_mpll.clk, [1] = &clk_sclk_apll.clk, }; -struct clksrc_sources clkset_aclk = { +static struct clksrc_sources clkset_aclk = { .sources = clkset_aclk_top_list, .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), }; @@ -385,7 +321,7 @@ static struct clksrc_clk clk_aclk_160 = { .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 8, .size = 3 }, }; -struct clksrc_clk clk_aclk_133 = { +static struct clksrc_clk clk_aclk_133 = { .clk = { .name = "aclk_133", }, @@ -424,7 +360,7 @@ static struct clksrc_sources clkset_sclk_vpll = { .nr_sources = ARRAY_SIZE(clkset_sclk_vpll_list), }; -struct clksrc_clk clk_sclk_vpll = { +static struct clksrc_clk clk_sclk_vpll = { .clk = { .name = "sclk_vpll", }, @@ -473,6 +409,16 @@ static struct clk init_clocks_off[] = { .devname = "exynos4-fb.0", .enable = exynos4_clk_ip_lcd0_ctrl, .ctrlbit = (1 << 0), + }, { + .name = "fimd", + .devname = "exynos4-fb.1", + .enable = exynos4_clk_ip_lcd1_ctrl, + .ctrlbit = (1 << 0), + }, { + .name = "sataphy", + .parent = &clk_aclk_133.clk, + .enable = exynos4_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 3), }, { .name = "hsmmc", .devname = "s3c-sdhci.0", @@ -502,6 +448,11 @@ static struct clk init_clocks_off[] = { .parent = &clk_aclk_133.clk, .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 9), + }, { + .name = "sata", + .parent = &clk_aclk_133.clk, + .enable = exynos4_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 10), }, { .name = "pdma", .devname = "s3c-pl330.0", @@ -722,7 +673,7 @@ static struct clk init_clocks[] = { } }; -struct clk *clkset_group_list[] = { +static struct clk *clkset_group_list[] = { [0] = &clk_ext_xtal_mux, [1] = &clk_xusbxti, [2] = &clk_sclk_hdmi27m, @@ -734,7 +685,7 @@ struct clk *clkset_group_list[] = { [8] = &clk_sclk_vpll.clk, }; -struct clksrc_sources clkset_group = { +static struct clksrc_sources clkset_group = { .sources = clkset_group_list, .nr_sources = ARRAY_SIZE(clkset_group_list), }; @@ -1014,6 +965,25 @@ static struct clksrc_clk clksrcs[] = { .sources = &clkset_group, .reg_src = { .reg = S5P_CLKSRC_LCD0, .shift = 0, .size = 4 }, .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimd", + .devname = "exynos4-fb.1", + .enable = exynos4_clksrc_mask_lcd1_ctrl, + .ctrlbit = (1 << 0), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_LCD1, .shift = 0, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_LCD1, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_sata", + .enable = exynos4_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 24), + }, + .sources = &clkset_mout_corebus, + .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 24, .size = 1 }, + .reg_div = { .reg = S5P_CLKDIV_FSYS0, .shift = 20, .size = 4 }, }, { .clk = { .name = "sclk_spi", @@ -1144,13 +1114,7 @@ static int xtal_rate; static unsigned long exynos4_fout_apll_get_rate(struct clk *clk) { - if (soc_is_exynos4210()) - return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0), - pll_4508); - else if (soc_is_exynos4212() || soc_is_exynos4412()) - return s5p_get_pll35xx(xtal_rate, __raw_readl(S5P_APLL_CON0)); - else - return 0; + return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0), pll_4508); } static struct clk_ops exynos4_fout_apll_ops = { @@ -1160,10 +1124,10 @@ static struct clk_ops exynos4_fout_apll_ops = { void __init_or_cpufreq exynos4_setup_clocks(void) { struct clk *xtal_clk; - unsigned long apll = 0; - unsigned long mpll = 0; - unsigned long epll = 0; - unsigned long vpll = 0; + unsigned long apll; + unsigned long mpll; + unsigned long epll; + unsigned long vpll; unsigned long vpllsrc; unsigned long xtal; unsigned long armclk; @@ -1187,29 +1151,14 @@ void __init_or_cpufreq exynos4_setup_clocks(void) printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); - if (soc_is_exynos4210()) { - apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), - pll_4508); - mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), - pll_4508); - epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0), - __raw_readl(S5P_EPLL_CON1), pll_4600); - - vpllsrc = clk_get_rate(&clk_vpllsrc.clk); - vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), - __raw_readl(S5P_VPLL_CON1), pll_4650c); - } else if (soc_is_exynos4212() || soc_is_exynos4412()) { - apll = s5p_get_pll35xx(xtal, __raw_readl(S5P_APLL_CON0)); - mpll = s5p_get_pll35xx(xtal, __raw_readl(S5P_MPLL_CON0)); - epll = s5p_get_pll36xx(xtal, __raw_readl(S5P_EPLL_CON0), - __raw_readl(S5P_EPLL_CON1)); - - vpllsrc = clk_get_rate(&clk_vpllsrc.clk); - vpll = s5p_get_pll36xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), - __raw_readl(S5P_VPLL_CON1)); - } else { - /* nothing */ - } + apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508); + mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508); + epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0), + __raw_readl(S5P_EPLL_CON1), pll_4600); + + vpllsrc = clk_get_rate(&clk_vpllsrc.clk); + vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), + __raw_readl(S5P_VPLL_CON1), pll_4650c); clk_fout_apll.ops = &exynos4_fout_apll_ops; clk_fout_mpll.rate = mpll; @@ -1244,28 +1193,6 @@ static struct clk *clks[] __initdata = { /* Nothing here yet */ }; -#ifdef CONFIG_PM_SLEEP -static int exynos4_clock_suspend(void) -{ - s3c_pm_do_save(exynos4_clock_save, ARRAY_SIZE(exynos4_clock_save)); - return 0; -} - -static void exynos4_clock_resume(void) -{ - s3c_pm_do_restore_core(exynos4_clock_save, ARRAY_SIZE(exynos4_clock_save)); -} - -#else -#define exynos4_clock_suspend NULL -#define exynos4_clock_resume NULL -#endif - -struct syscore_ops exynos4_clock_syscore_ops = { - .suspend = exynos4_clock_suspend, - .resume = exynos4_clock_resume, -}; - void __init exynos4_register_clocks(void) { int ptr; @@ -1281,6 +1208,5 @@ void __init exynos4_register_clocks(void) s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - register_syscore_ops(&exynos4_clock_syscore_ops); s3c_pwmclk_init(); } diff --git a/trunk/arch/arm/mach-exynos4/cpu.c b/trunk/arch/arm/mach-exynos4/cpu.c index a348434f17b5..746d6fc6d397 100644 --- a/trunk/arch/arm/mach-exynos4/cpu.c +++ b/trunk/arch/arm/mach-exynos4/cpu.c @@ -32,8 +32,6 @@ #include #include -unsigned int gic_bank_offset __read_mostly; - extern int combiner_init(unsigned int combiner_nr, void __iomem *base, unsigned int irq_start); extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); @@ -45,6 +43,11 @@ static struct map_desc exynos4_iodesc[] __initdata = { .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER), .length = SZ_4K, .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SYSRAM, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM), + .length = SZ_4K, + .type = MT_DEVICE, }, { .virtual = (unsigned long)S5P_VA_CMU, .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), @@ -118,24 +121,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { }, }; -static struct map_desc exynos4_iodesc0[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4_iodesc1[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - static void exynos4_idle(void) { if (!need_resched()) @@ -158,11 +143,6 @@ void __init exynos4_map_io(void) { iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); - if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) - iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); - else - iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); - /* initialize device information early */ exynos4_default_sdhci0(); exynos4_default_sdhci1(); @@ -190,37 +170,24 @@ void __init exynos4_init_clocks(int xtal) s3c24xx_register_baseclocks(xtal); s5p_register_clocks(xtal); - - if (soc_is_exynos4210()) - exynos4210_register_clocks(); - else if (soc_is_exynos4212() || soc_is_exynos4412()) - exynos4212_register_clocks(); - exynos4_register_clocks(); exynos4_setup_clocks(); } -static void exynos4_gic_irq_fix_base(struct irq_data *d) +static void exynos4_gic_irq_eoi(struct irq_data *d) { struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); gic_data->cpu_base = S5P_VA_GIC_CPU + - (gic_bank_offset * smp_processor_id()); - - gic_data->dist_base = S5P_VA_GIC_DIST + - (gic_bank_offset * smp_processor_id()); + (EXYNOS4_GIC_BANK_OFFSET * smp_processor_id()); } void __init exynos4_init_irq(void) { int irq; - gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; - - gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); - gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base; - gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base; - gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base; + gic_init(0, IRQ_SPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); + gic_arch_extn.irq_eoi = exynos4_gic_irq_eoi; for (irq = 0; irq < MAX_COMBINER_NR; irq++) { @@ -256,11 +223,7 @@ static int __init exynos4_l2x0_cache_init(void) { /* TAG, Data Latency Control: 2cycle */ __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); - - if (soc_is_exynos4210()) - __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); - else if (soc_is_exynos4212() || soc_is_exynos4412()) - __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); + __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); /* L2X0 Prefetch Control */ __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); diff --git a/trunk/arch/arm/mach-exynos4/include/mach/entry-macro.S b/trunk/arch/arm/mach-exynos4/include/mach/entry-macro.S index 4c9adbd87eac..d7a1e281ce7a 100644 --- a/trunk/arch/arm/mach-exynos4/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-exynos4/include/mach/entry-macro.S @@ -17,25 +17,12 @@ .endm .macro get_irqnr_preamble, base, tmp - mov \tmp, #0 - - mrc p15, 0, \base, c0, c0, 5 - and \base, \base, #3 - cmp \base, #0 - beq 1f - - ldr \tmp, =gic_bank_offset - ldr \tmp, [\tmp] - cmp \base, #1 - beq 1f - - cmp \base, #2 - addeq \tmp, \tmp, \tmp - addne \tmp, \tmp, \tmp, LSL #1 - -1: ldr \base, =gic_cpu_base_addr + ldr \base, =gic_cpu_base_addr ldr \base, [\base] - add \base, \base, \tmp + mrc p15, 0, \tmp, c0, c0, 5 + and \tmp, \tmp, #3 + cmp \tmp, #1 + addeq \base, \base, #EXYNOS4_GIC_BANK_OFFSET .endm .macro arch_ret_to_user, tmp1, tmp2 @@ -93,10 +80,4 @@ /* As above, this assumes that irqstat and base are preserved.. */ .macro test_for_ltirq, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - mov \tmp, #0 - cmp \irqnr, #28 - moveq \tmp, #1 - streq \irqstat, [\base, #GIC_CPU_EOI] - cmp \tmp, #0 .endm diff --git a/trunk/arch/arm/mach-exynos4/include/mach/exynos4-clock.h b/trunk/arch/arm/mach-exynos4/include/mach/exynos4-clock.h deleted file mode 100644 index a07fcbf55251..000000000000 --- a/trunk/arch/arm/mach-exynos4/include/mach/exynos4-clock.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/include/mach/exynos4-clock.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Header file for exynos4 clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_CLOCK_H -#define __ASM_ARCH_CLOCK_H __FILE__ - -#include - -extern struct clk clk_sclk_hdmi27m; -extern struct clk clk_sclk_usbphy0; -extern struct clk clk_sclk_usbphy1; -extern struct clk clk_sclk_hdmiphy; - -extern struct clksrc_clk clk_sclk_apll; -extern struct clksrc_clk clk_mout_mpll; -extern struct clksrc_clk clk_aclk_133; -extern struct clksrc_clk clk_mout_epll; -extern struct clksrc_clk clk_sclk_vpll; - -extern struct clk *clkset_corebus_list[]; -extern struct clksrc_sources clkset_mout_corebus; - -extern struct clk *clkset_aclk_top_list[]; -extern struct clksrc_sources clkset_aclk; - -extern struct clk *clkset_group_list[]; -extern struct clksrc_sources clkset_group; - -extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable); -extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable); -extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable); - -#endif /* __ASM_ARCH_CLOCK_H */ diff --git a/trunk/arch/arm/mach-exynos4/include/mach/irqs.h b/trunk/arch/arm/mach-exynos4/include/mach/irqs.h index 2d3f6bcd9bc0..f8952f8f3757 100644 --- a/trunk/arch/arm/mach-exynos4/include/mach/irqs.h +++ b/trunk/arch/arm/mach-exynos4/include/mach/irqs.h @@ -19,8 +19,6 @@ #define IRQ_PPI(x) S5P_IRQ(x+16) -#define IRQ_MCT_LOCALTIMER IRQ_PPI(12) - /* SPI: Shared Peripheral Interrupt */ #define IRQ_SPI(x) S5P_IRQ(x+32) diff --git a/trunk/arch/arm/mach-exynos4/include/mach/map.h b/trunk/arch/arm/mach-exynos4/include/mach/map.h index 9f97eb8499ee..d32296dc65e2 100644 --- a/trunk/arch/arm/mach-exynos4/include/mach/map.h +++ b/trunk/arch/arm/mach-exynos4/include/mach/map.h @@ -23,8 +23,7 @@ #include -#define EXYNOS4_PA_SYSRAM0 0x02025000 -#define EXYNOS4_PA_SYSRAM1 0x02020000 +#define EXYNOS4_PA_SYSRAM 0x02020000 #define EXYNOS4_PA_FIMC0 0x11800000 #define EXYNOS4_PA_FIMC1 0x11810000 @@ -62,6 +61,7 @@ #define EXYNOS4_PA_GIC_CPU 0x10480000 #define EXYNOS4_PA_GIC_DIST 0x10490000 +#define EXYNOS4_GIC_BANK_OFFSET 0x8000 #define EXYNOS4_PA_COREPERI 0x10500000 #define EXYNOS4_PA_TWD 0x10500600 diff --git a/trunk/arch/arm/mach-exynos4/include/mach/regs-clock.h b/trunk/arch/arm/mach-exynos4/include/mach/regs-clock.h index 6c37ebe94829..d493fdb422ff 100644 --- a/trunk/arch/arm/mach-exynos4/include/mach/regs-clock.h +++ b/trunk/arch/arm/mach-exynos4/include/mach/regs-clock.h @@ -13,7 +13,6 @@ #ifndef __ASM_ARCH_REGS_CLOCK_H #define __ASM_ARCH_REGS_CLOCK_H __FILE__ -#include #include #define S5P_CLKREG(x) (S5P_VA_CMU + (x)) @@ -42,20 +41,12 @@ #define S5P_CLKSRC_G3D S5P_CLKREG(0x0C22C) #define S5P_CLKSRC_IMAGE S5P_CLKREG(0x0C230) #define S5P_CLKSRC_LCD0 S5P_CLKREG(0x0C234) +#define S5P_CLKSRC_LCD1 S5P_CLKREG(0x0C238) #define S5P_CLKSRC_MAUDIO S5P_CLKREG(0x0C23C) #define S5P_CLKSRC_FSYS S5P_CLKREG(0x0C240) #define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250) #define S5P_CLKSRC_PERIL1 S5P_CLKREG(0x0C254) -#define S5P_CLKSRC_MASK_TOP S5P_CLKREG(0x0C310) -#define S5P_CLKSRC_MASK_CAM S5P_CLKREG(0x0C320) -#define S5P_CLKSRC_MASK_TV S5P_CLKREG(0x0C324) -#define S5P_CLKSRC_MASK_LCD0 S5P_CLKREG(0x0C334) -#define S5P_CLKSRC_MASK_MAUDIO S5P_CLKREG(0x0C33C) -#define S5P_CLKSRC_MASK_FSYS S5P_CLKREG(0x0C340) -#define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350) -#define S5P_CLKSRC_MASK_PERIL1 S5P_CLKREG(0x0C354) - #define S5P_CLKDIV_TOP S5P_CLKREG(0x0C510) #define S5P_CLKDIV_CAM S5P_CLKREG(0x0C520) #define S5P_CLKDIV_TV S5P_CLKREG(0x0C524) @@ -63,6 +54,7 @@ #define S5P_CLKDIV_G3D S5P_CLKREG(0x0C52C) #define S5P_CLKDIV_IMAGE S5P_CLKREG(0x0C530) #define S5P_CLKDIV_LCD0 S5P_CLKREG(0x0C534) +#define S5P_CLKDIV_LCD1 S5P_CLKREG(0x0C538) #define S5P_CLKDIV_MAUDIO S5P_CLKREG(0x0C53C) #define S5P_CLKDIV_FSYS0 S5P_CLKREG(0x0C540) #define S5P_CLKDIV_FSYS1 S5P_CLKREG(0x0C544) @@ -76,6 +68,16 @@ #define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564) #define S5P_CLKDIV2_RATIO S5P_CLKREG(0x0C580) +#define S5P_CLKSRC_MASK_TOP S5P_CLKREG(0x0C310) +#define S5P_CLKSRC_MASK_CAM S5P_CLKREG(0x0C320) +#define S5P_CLKSRC_MASK_TV S5P_CLKREG(0x0C324) +#define S5P_CLKSRC_MASK_LCD0 S5P_CLKREG(0x0C334) +#define S5P_CLKSRC_MASK_LCD1 S5P_CLKREG(0x0C338) +#define S5P_CLKSRC_MASK_MAUDIO S5P_CLKREG(0x0C33C) +#define S5P_CLKSRC_MASK_FSYS S5P_CLKREG(0x0C340) +#define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350) +#define S5P_CLKSRC_MASK_PERIL1 S5P_CLKREG(0x0C354) + #define S5P_CLKDIV_STAT_TOP S5P_CLKREG(0x0C610) #define S5P_CLKGATE_SCLKCAM S5P_CLKREG(0x0C820) @@ -83,20 +85,13 @@ #define S5P_CLKGATE_IP_TV S5P_CLKREG(0x0C924) #define S5P_CLKGATE_IP_MFC S5P_CLKREG(0x0C928) #define S5P_CLKGATE_IP_G3D S5P_CLKREG(0x0C92C) -#define S5P_CLKGATE_IP_IMAGE (soc_is_exynos4210() ? \ - S5P_CLKREG(0x0C930) : \ - S5P_CLKREG(0x04930)) -#define S5P_CLKGATE_IP_IMAGE_4210 S5P_CLKREG(0x0C930) -#define S5P_CLKGATE_IP_IMAGE_4212 S5P_CLKREG(0x04930) +#define S5P_CLKGATE_IP_IMAGE S5P_CLKREG(0x0C930) #define S5P_CLKGATE_IP_LCD0 S5P_CLKREG(0x0C934) +#define S5P_CLKGATE_IP_LCD1 S5P_CLKREG(0x0C938) #define S5P_CLKGATE_IP_FSYS S5P_CLKREG(0x0C940) #define S5P_CLKGATE_IP_GPS S5P_CLKREG(0x0C94C) #define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950) -#define S5P_CLKGATE_IP_PERIR (soc_is_exynos4210() ? \ - S5P_CLKREG(0x0C960) : \ - S5P_CLKREG(0x08960)) -#define S5P_CLKGATE_IP_PERIR_4210 S5P_CLKREG(0x0C960) -#define S5P_CLKGATE_IP_PERIR_4212 S5P_CLKREG(0x08960) +#define S5P_CLKGATE_IP_PERIR S5P_CLKREG(0x0C960) #define S5P_CLKGATE_BLOCK S5P_CLKREG(0x0C970) #define S5P_CLKSRC_MASK_DMC S5P_CLKREG(0x10300) @@ -107,17 +102,11 @@ #define S5P_CLKGATE_IP_DMC S5P_CLKREG(0x10900) #define S5P_APLL_LOCK S5P_CLKREG(0x14000) -#define S5P_MPLL_LOCK (soc_is_exynos4210() ? \ - S5P_CLKREG(0x14004) : \ - S5P_CLKREG(0x10008)) +#define S5P_MPLL_LOCK S5P_CLKREG(0x14004) #define S5P_APLL_CON0 S5P_CLKREG(0x14100) #define S5P_APLL_CON1 S5P_CLKREG(0x14104) -#define S5P_MPLL_CON0 (soc_is_exynos4210() ? \ - S5P_CLKREG(0x14108) : \ - S5P_CLKREG(0x10108)) -#define S5P_MPLL_CON1 (soc_is_exynos4210() ? \ - S5P_CLKREG(0x1410C) : \ - S5P_CLKREG(0x1010C)) +#define S5P_MPLL_CON0 S5P_CLKREG(0x14108) +#define S5P_MPLL_CON1 S5P_CLKREG(0x1410C) #define S5P_CLKSRC_CPU S5P_CLKREG(0x14200) #define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400) @@ -194,13 +183,6 @@ #define S5P_CLKDIV_BUS_GPLR_SHIFT (4) #define S5P_CLKDIV_BUS_GPLR_MASK (0x7 << S5P_CLKDIV_BUS_GPLR_SHIFT) -/* Only for EXYNOS4210 */ - -#define S5P_CLKSRC_LCD1 S5P_CLKREG(0x0C238) -#define S5P_CLKSRC_MASK_LCD1 S5P_CLKREG(0x0C338) -#define S5P_CLKDIV_LCD1 S5P_CLKREG(0x0C538) -#define S5P_CLKGATE_IP_LCD1 S5P_CLKREG(0x0C938) - /* Compatibility defines and inclusion */ #include diff --git a/trunk/arch/arm/mach-exynos4/include/mach/regs-mct.h b/trunk/arch/arm/mach-exynos4/include/mach/regs-mct.h index 80dd02ad6d61..ca9c8434b023 100644 --- a/trunk/arch/arm/mach-exynos4/include/mach/regs-mct.h +++ b/trunk/arch/arm/mach-exynos4/include/mach/regs-mct.h @@ -31,9 +31,8 @@ #define EXYNOS4_MCT_G_INT_ENB EXYNOS4_MCTREG(0x248) #define EXYNOS4_MCT_G_WSTAT EXYNOS4_MCTREG(0x24C) -#define _EXYNOS4_MCT_L_BASE EXYNOS4_MCTREG(0x300) -#define EXYNOS4_MCT_L_BASE(x) (_EXYNOS4_MCT_L_BASE + (0x100 * x)) -#define EXYNOS4_MCT_L_MASK (0xffffff00) +#define EXYNOS4_MCT_L0_BASE EXYNOS4_MCTREG(0x300) +#define EXYNOS4_MCT_L1_BASE EXYNOS4_MCTREG(0x400) #define MCT_L_TCNTB_OFFSET (0x00) #define MCT_L_ICNTB_OFFSET (0x08) diff --git a/trunk/arch/arm/mach-exynos4/mach-origen.c b/trunk/arch/arm/mach-exynos4/mach-origen.c deleted file mode 100644 index b5f6f38557c9..000000000000 --- a/trunk/arch/arm/mach-exynos4/mach-origen.c +++ /dev/null @@ -1,108 +0,0 @@ -/* linux/arch/arm/mach-exynos4/mach-origen.c - * - * Copyright (c) 2011 Insignal Co., Ltd. - * http://www.insignal.co.kr/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = ORIGEN_UCON_DEFAULT, - .ulcon = ORIGEN_ULCON_DEFAULT, - .ufcon = ORIGEN_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = ORIGEN_UCON_DEFAULT, - .ulcon = ORIGEN_ULCON_DEFAULT, - .ufcon = ORIGEN_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = ORIGEN_UCON_DEFAULT, - .ulcon = ORIGEN_ULCON_DEFAULT, - .ufcon = ORIGEN_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = ORIGEN_UCON_DEFAULT, - .ulcon = ORIGEN_ULCON_DEFAULT, - .ufcon = ORIGEN_UFCON_DEFAULT, - }, -}; - -static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = EXYNOS4_GPK2(2), - .ext_cd_gpio_invert = 1, - .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, -}; - -static struct platform_device *origen_devices[] __initdata = { - &s3c_device_hsmmc2, - &s3c_device_rtc, - &s3c_device_wdt, -}; - -static void __init origen_map_io(void) -{ - s5p_init_io(NULL, 0, S5P_VA_CHIPID); - s3c24xx_init_clocks(24000000); - s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); -} - -static void __init origen_machine_init(void) -{ - s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); - platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); -} - -MACHINE_START(ORIGEN, "ORIGEN") - /* Maintainer: JeongHyeon Kim */ - .atag_offset = 0x100, - .init_irq = exynos4_init_irq, - .map_io = origen_map_io, - .init_machine = origen_machine_init, - .timer = &exynos4_timer, -MACHINE_END diff --git a/trunk/arch/arm/mach-exynos4/mach-smdk4x12.c b/trunk/arch/arm/mach-exynos4/mach-smdk4x12.c deleted file mode 100644 index fcf2e0e23d53..000000000000 --- a/trunk/arch/arm/mach-exynos4/mach-smdk4x12.c +++ /dev/null @@ -1,302 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/mach-smdk4x12.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = SMDK4X12_UCON_DEFAULT, - .ulcon = SMDK4X12_ULCON_DEFAULT, - .ufcon = SMDK4X12_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = SMDK4X12_UCON_DEFAULT, - .ulcon = SMDK4X12_ULCON_DEFAULT, - .ufcon = SMDK4X12_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = SMDK4X12_UCON_DEFAULT, - .ulcon = SMDK4X12_ULCON_DEFAULT, - .ufcon = SMDK4X12_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = SMDK4X12_UCON_DEFAULT, - .ulcon = SMDK4X12_ULCON_DEFAULT, - .ufcon = SMDK4X12_UFCON_DEFAULT, - }, -}; - -static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, - .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, -#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT - .max_width = 8, - .host_caps = MMC_CAP_8_BIT_DATA, -#endif -}; - -static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, - .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, -}; - -static struct regulator_consumer_supply max8997_buck1 = - REGULATOR_SUPPLY("vdd_arm", NULL); - -static struct regulator_consumer_supply max8997_buck2 = - REGULATOR_SUPPLY("vdd_int", NULL); - -static struct regulator_consumer_supply max8997_buck3 = - REGULATOR_SUPPLY("vdd_g3d", NULL); - -static struct regulator_init_data max8997_buck1_data = { - .constraints = { - .name = "VDD_ARM_SMDK4X12", - .min_uV = 925000, - .max_uV = 1350000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8997_buck1, -}; - -static struct regulator_init_data max8997_buck2_data = { - .constraints = { - .name = "VDD_INT_SMDK4X12", - .min_uV = 950000, - .max_uV = 1150000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8997_buck2, -}; - -static struct regulator_init_data max8997_buck3_data = { - .constraints = { - .name = "VDD_G3D_SMDK4X12", - .min_uV = 950000, - .max_uV = 1150000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8997_buck3, -}; - -static struct max8997_regulator_data smdk4x12_max8997_regulators[] = { - { MAX8997_BUCK1, &max8997_buck1_data }, - { MAX8997_BUCK2, &max8997_buck2_data }, - { MAX8997_BUCK3, &max8997_buck3_data }, -}; - -static struct max8997_platform_data smdk4x12_max8997_pdata = { - .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators), - .regulators = smdk4x12_max8997_regulators, - - .buck1_voltage[0] = 1100000, /* 1.1V */ - .buck1_voltage[1] = 1100000, /* 1.1V */ - .buck1_voltage[2] = 1100000, /* 1.1V */ - .buck1_voltage[3] = 1100000, /* 1.1V */ - .buck1_voltage[4] = 1100000, /* 1.1V */ - .buck1_voltage[5] = 1100000, /* 1.1V */ - .buck1_voltage[6] = 1000000, /* 1.0V */ - .buck1_voltage[7] = 950000, /* 0.95V */ - - .buck2_voltage[0] = 1100000, /* 1.1V */ - .buck2_voltage[1] = 1000000, /* 1.0V */ - .buck2_voltage[2] = 950000, /* 0.95V */ - .buck2_voltage[3] = 900000, /* 0.9V */ - .buck2_voltage[4] = 1100000, /* 1.1V */ - .buck2_voltage[5] = 1000000, /* 1.0V */ - .buck2_voltage[6] = 950000, /* 0.95V */ - .buck2_voltage[7] = 900000, /* 0.9V */ - - .buck5_voltage[0] = 1100000, /* 1.1V */ - .buck5_voltage[1] = 1100000, /* 1.1V */ - .buck5_voltage[2] = 1100000, /* 1.1V */ - .buck5_voltage[3] = 1100000, /* 1.1V */ - .buck5_voltage[4] = 1100000, /* 1.1V */ - .buck5_voltage[5] = 1100000, /* 1.1V */ - .buck5_voltage[6] = 1100000, /* 1.1V */ - .buck5_voltage[7] = 1100000, /* 1.1V */ -}; - -static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = { - { - I2C_BOARD_INFO("max8997", 0x66), - .platform_data = &smdk4x12_max8997_pdata, - } -}; - -static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = { - { I2C_BOARD_INFO("wm8994", 0x1a), } -}; - -static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = { - /* nothing here yet */ -}; - -static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = { - /* nothing here yet */ -}; - -static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = { - .no = EXYNOS4_GPD0(1), - .func = S3C_GPIO_SFN(2), -}; - -static struct platform_pwm_backlight_data smdk4x12_bl_data = { - .pwm_id = 1, - .pwm_period_ns = 1000, -}; - -static uint32_t smdk4x12_keymap[] __initdata = { - /* KEY(row, col, keycode) */ - KEY(1, 0, KEY_D), KEY(1, 1, KEY_A), KEY(1, 2, KEY_B), - KEY(1, 3, KEY_E), KEY(1, 4, KEY_C) -}; - -static struct matrix_keymap_data smdk4x12_keymap_data __initdata = { - .keymap = smdk4x12_keymap, - .keymap_size = ARRAY_SIZE(smdk4x12_keymap), -}; - -static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = { - .keymap_data = &smdk4x12_keymap_data, - .rows = 2, - .cols = 5, -}; - -static struct platform_device *smdk4x12_devices[] __initdata = { - &s3c_device_hsmmc2, - &s3c_device_hsmmc3, - &s3c_device_i2c0, - &s3c_device_i2c1, - &s3c_device_i2c3, - &s3c_device_i2c7, - &s3c_device_rtc, - &s3c_device_wdt, - &samsung_device_keypad, -}; - -static void __init smdk4x12_map_io(void) -{ - clk_xusbxti.rate = 24000000; - - s5p_init_io(NULL, 0, S5P_VA_CHIPID); - s3c24xx_init_clocks(clk_xusbxti.rate); - s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); -} - -static void __init smdk4x12_machine_init(void) -{ - s3c_i2c0_set_platdata(NULL); - i2c_register_board_info(0, smdk4x12_i2c_devs0, - ARRAY_SIZE(smdk4x12_i2c_devs0)); - - s3c_i2c1_set_platdata(NULL); - i2c_register_board_info(1, smdk4x12_i2c_devs1, - ARRAY_SIZE(smdk4x12_i2c_devs1)); - - s3c_i2c3_set_platdata(NULL); - i2c_register_board_info(3, smdk4x12_i2c_devs3, - ARRAY_SIZE(smdk4x12_i2c_devs3)); - - s3c_i2c7_set_platdata(NULL); - i2c_register_board_info(7, smdk4x12_i2c_devs7, - ARRAY_SIZE(smdk4x12_i2c_devs7)); - - samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data); - - samsung_keypad_set_platdata(&smdk4x12_keypad_data); - - s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata); - s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata); - - platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices)); -} - -MACHINE_START(SMDK4212, "SMDK4212") - /* Maintainer: Kukjin Kim */ - .atag_offset = 0x100, - .init_irq = exynos4_init_irq, - .map_io = smdk4x12_map_io, - .init_machine = smdk4x12_machine_init, - .timer = &exynos4_timer, -MACHINE_END - -MACHINE_START(SMDK4412, "SMDK4412") - /* Maintainer: Kukjin Kim */ - /* Maintainer: Changhwan Youn */ - .atag_offset = 0x100, - .init_irq = exynos4_init_irq, - .map_io = smdk4x12_map_io, - .init_machine = smdk4x12_machine_init, - .timer = &exynos4_timer, -MACHINE_END diff --git a/trunk/arch/arm/mach-exynos4/mach-smdkc210.c b/trunk/arch/arm/mach-exynos4/mach-smdkc210.c new file mode 100644 index 000000000000..a7c65e05c1eb --- /dev/null +++ b/trunk/arch/arm/mach-exynos4/mach-smdkc210.c @@ -0,0 +1,309 @@ +/* linux/arch/arm/mach-exynos4/mach-smdkc210.c + * + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include