From ce4d71e87bc3407b9e3779c413c8591bda7361da Mon Sep 17 00:00:00 2001 From: Marcin Slusarz Date: Mon, 8 Oct 2012 00:49:27 +0200 Subject: [PATCH] --- yaml --- r: 332993 b: refs/heads/master c: b47f1421ad2946b71b32e613d161a8ee43d2d019 h: refs/heads/master i: 332991: 91692df8e4d27a1d12d4d0b2b8b7393a6a0f6191 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index ca66aab0b3ef..fca19890a041 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d489738951200a12171a63c29e8cd4876031a03b +refs/heads/master: b47f1421ad2946b71b32e613d161a8ee43d2d019 diff --git a/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c b/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c index fd181fbceddb..f4147f67eda6 100644 --- a/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c +++ b/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c @@ -90,6 +90,7 @@ nv50_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine, return ret; priv->base.pll_set = nv50_clock_pll_set; + priv->base.pll_calc = nv04_clock_pll_calc; return 0; }