From cec116154480169abe4ca1a5dd5a0f8b2d8bd83f Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Tue, 5 Jul 2011 15:44:46 +0100 Subject: [PATCH] --- yaml --- r: 259701 b: refs/heads/master c: 52b6ba09eeba5d48dd8f20cf07a85e81b7acacf4 h: refs/heads/master i: 259699: 168c9bc0a8e24401e5fb938c574d161a219e5455 v: v3 --- [refs] | 2 +- trunk/drivers/staging/gma500/psb_intel_display.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 9d102f9e5537..1118863b2193 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6a8ca6f5ffbca4ef92da34bd28465539c511b97e +refs/heads/master: 52b6ba09eeba5d48dd8f20cf07a85e81b7acacf4 diff --git a/trunk/drivers/staging/gma500/psb_intel_display.c b/trunk/drivers/staging/gma500/psb_intel_display.c index 65426682c44c..cc7237e2d6b0 100644 --- a/trunk/drivers/staging/gma500/psb_intel_display.c +++ b/trunk/drivers/staging/gma500/psb_intel_display.c @@ -1278,6 +1278,19 @@ const struct drm_crtc_funcs psb_intel_crtc_funcs = { .destroy = psb_intel_crtc_destroy, }; +/* + * Set the default value of cursor control and base register + * to zero. This is a workaround for h/w defect on Oaktrail + */ +static void psb_intel_cursor_init(struct drm_device *dev, int pipe) +{ + u32 control[3] = { CURACNTR, CURBCNTR, CURCCNTR }; + u32 base[3] = { CURABASE, CURBBASE, CURCBASE }; + + REG_WRITE(control[pipe], 0); + REG_WRITE(base[pipe], 0); +} + void psb_intel_crtc_init(struct drm_device *dev, int pipe, struct psb_intel_mode_device *mode_dev) { @@ -1341,6 +1354,7 @@ void psb_intel_crtc_init(struct drm_device *dev, int pipe, psb_intel_crtc->mode_set.connectors = (struct drm_connector **) (psb_intel_crtc + 1); psb_intel_crtc->mode_set.num_connectors = 0; + psb_intel_cursor_init(dev, pipe); } int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,