From cf6d34a877ec5a0bd2a79c23aa835cb179148a01 Mon Sep 17 00:00:00 2001
From: Colin Cross <ccross@android.com>
Date: Wed, 8 Sep 2010 19:41:58 -0700
Subject: [PATCH] --- yaml --- r: 235236 b: refs/heads/master c:
 14133add42928d6759f35f5d94938adf2cda2bb6 h: refs/heads/master v: v3

---
 [refs]                                    | 2 +-
 trunk/arch/arm/mach-tegra/tegra2_clocks.c | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index 7cf53df560a6..544968ff7030 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 2b84cb4faab698b1708ce841c554546b1c9b2261
+refs/heads/master: 14133add42928d6759f35f5d94938adf2cda2bb6
diff --git a/trunk/arch/arm/mach-tegra/tegra2_clocks.c b/trunk/arch/arm/mach-tegra/tegra2_clocks.c
index 6442abe0120d..600a5a473ab5 100644
--- a/trunk/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/trunk/arch/arm/mach-tegra/tegra2_clocks.c
@@ -620,7 +620,6 @@ static int tegra2_pll_clk_set_rate(struct clk *c, unsigned long rate)
 	const struct clk_pll_table *sel;
 
 	pr_debug("%s: %s %lu\n", __func__, c->name, rate);
-	BUG_ON(c->refcnt != 0);
 
 	input_rate = c->parent->rate;
 	for (sel = c->pll_table; sel->input_rate != 0; sel++) {