From cfb637a22da68e8b3559949d7acfd440f34e48e8 Mon Sep 17 00:00:00 2001
From: Nicolas Ferre <nicolas.ferre@atmel.com>
Date: Fri, 22 Oct 2010 17:53:39 +0200
Subject: [PATCH] --- yaml --- r: 217327 b: refs/heads/master c:
 8aeeda822fbfe7da2d4ea391a9757e9532796598 h: refs/heads/master i:   217325:
 0422195402d828537d523081a84839d6ad9e5772   217323:
 3f34748c08ba6b360072ba23f07f899d084071d8   217319:
 30c67a62efeb1cac5af7402b7e3d9ea8a61585e3   217311:
 f43d9198fbbee962eccc216b75b7daae17da2af1 v: v3

---
 [refs]                        | 2 +-
 trunk/arch/arm/mach-at91/pm.c | 6 ++++--
 trunk/arch/arm/mach-at91/pm.h | 4 ++++
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index 512bcf5cc06c..ae2b85049a52 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: bb413db591d53c29292868577068fa822b84da82
+refs/heads/master: 8aeeda822fbfe7da2d4ea391a9757e9532796598
diff --git a/trunk/arch/arm/mach-at91/pm.c b/trunk/arch/arm/mach-at91/pm.c
index 615668986480..87a31baf1cb3 100644
--- a/trunk/arch/arm/mach-at91/pm.c
+++ b/trunk/arch/arm/mach-at91/pm.c
@@ -258,16 +258,18 @@ static int at91_pm_enter(suspend_state_t state)
 			 * NOTE: the Wait-for-Interrupt instruction needs to be
 			 * in icache so no SDRAM accesses are needed until the
 			 * wakeup IRQ occurs and self-refresh is terminated.
+			 * For ARM 926 based chips, this requirement is weaker
+			 * as at91sam9 can access a RAM in self-refresh mode.
 			 */
 			asm("b 1f; .align 5; 1:");
 			asm("mcr p15, 0, r0, c7, c10, 4");	/* drain write buffer */
 			saved_lpr = sdram_selfrefresh_enable();
-			asm("mcr p15, 0, r0, c7, c0, 4");	/* wait for interrupt */
+			wait_for_interrupt_enable();
 			sdram_selfrefresh_disable(saved_lpr);
 			break;
 
 		case PM_SUSPEND_ON:
-			asm("mcr p15, 0, r0, c7, c0, 4");	/* wait for interrupt */
+			cpu_do_idle();
 			break;
 
 		default:
diff --git a/trunk/arch/arm/mach-at91/pm.h b/trunk/arch/arm/mach-at91/pm.h
index 8c87d0c1b8f8..2c4424bfa6c4 100644
--- a/trunk/arch/arm/mach-at91/pm.h
+++ b/trunk/arch/arm/mach-at91/pm.h
@@ -21,6 +21,7 @@ static inline u32 sdram_selfrefresh_enable(void)
 }
 
 #define sdram_selfrefresh_disable(saved_lpr)	at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
+#define wait_for_interrupt_enable()		asm("mcr p15, 0, r0, c7, c0, 4")
 
 #elif defined(CONFIG_ARCH_AT91CAP9)
 #include <mach/at91cap9_ddrsdr.h>
@@ -38,6 +39,7 @@ static inline u32 sdram_selfrefresh_enable(void)
 }
 
 #define sdram_selfrefresh_disable(saved_lpr)	at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr)
+#define wait_for_interrupt_enable()		cpu_do_idle()
 
 #elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9_ddrsdr.h>
@@ -74,6 +76,7 @@ static inline u32 sdram_selfrefresh_enable(void)
 		at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \
 		at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \
 	} while (0)
+#define wait_for_interrupt_enable()		cpu_do_idle()
 
 #else
 #include <mach/at91sam9_sdramc.h>
@@ -98,5 +101,6 @@ static inline u32 sdram_selfrefresh_enable(void)
 }
 
 #define sdram_selfrefresh_disable(saved_lpr)	at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
+#define wait_for_interrupt_enable()		cpu_do_idle()
 
 #endif