From d09d9413408f1485646baf6c5cd53b921a0c90a9 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Tue, 23 Oct 2012 18:30:00 -0200 Subject: [PATCH] --- yaml --- r: 345178 b: refs/heads/master c: c9809791ae0ae3e5792fc6ad3d4a5d9658aadc62 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/i915_reg.h | 19 ++++++++++--------- trunk/drivers/gpu/drm/i915/intel_ddi.c | 18 +++++++++--------- 3 files changed, 20 insertions(+), 19 deletions(-) diff --git a/[refs] b/[refs] index 957d35fbebbd..93eeeaba9180 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 702e7a56af3780d8b3a717f698209bef44187bb0 +refs/heads/master: c9809791ae0ae3e5792fc6ad3d4a5d9658aadc62 diff --git a/trunk/drivers/gpu/drm/i915/i915_reg.h b/trunk/drivers/gpu/drm/i915/i915_reg.h index de3908680f37..3790503abd10 100644 --- a/trunk/drivers/gpu/drm/i915/i915_reg.h +++ b/trunk/drivers/gpu/drm/i915/i915_reg.h @@ -4556,15 +4556,16 @@ #define TRANS_CLK_SEL_DISABLED (0x0<<29) #define TRANS_CLK_SEL_PORT(x) ((x+1)<<29) -#define _PIPEA_MSA_MISC 0x60410 -#define _PIPEB_MSA_MISC 0x61410 -#define PIPE_MSA_MISC(pipe) _PIPE(pipe, _PIPEA_MSA_MISC, _PIPEB_MSA_MISC) -#define PIPE_MSA_SYNC_CLK (1<<0) -#define PIPE_MSA_6_BPC (0<<5) -#define PIPE_MSA_8_BPC (1<<5) -#define PIPE_MSA_10_BPC (2<<5) -#define PIPE_MSA_12_BPC (3<<5) -#define PIPE_MSA_16_BPC (4<<5) +#define _TRANSA_MSA_MISC 0x60410 +#define _TRANSB_MSA_MISC 0x61410 +#define TRANS_MSA_MISC(tran) _TRANSCODER(tran, _TRANSA_MSA_MISC, \ + _TRANSB_MSA_MISC) +#define TRANS_MSA_SYNC_CLK (1<<0) +#define TRANS_MSA_6_BPC (0<<5) +#define TRANS_MSA_8_BPC (1<<5) +#define TRANS_MSA_10_BPC (2<<5) +#define TRANS_MSA_12_BPC (3<<5) +#define TRANS_MSA_16_BPC (4<<5) /* LCPLL Control */ #define LCPLL_CTL 0x130040 diff --git a/trunk/drivers/gpu/drm/i915/intel_ddi.c b/trunk/drivers/gpu/drm/i915/intel_ddi.c index 4b5366b9b04d..c3d06532e9c5 100644 --- a/trunk/drivers/gpu/drm/i915/intel_ddi.c +++ b/trunk/drivers/gpu/drm/i915/intel_ddi.c @@ -888,32 +888,32 @@ void intel_ddi_set_pipe_settings(struct drm_crtc *crtc) struct drm_i915_private *dev_priv = crtc->dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); - enum pipe pipe = intel_crtc->pipe; + enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; int type = intel_encoder->type; uint32_t temp; if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) { - temp = PIPE_MSA_SYNC_CLK; + temp = TRANS_MSA_SYNC_CLK; switch (intel_crtc->bpp) { case 18: - temp |= PIPE_MSA_6_BPC; + temp |= TRANS_MSA_6_BPC; break; case 24: - temp |= PIPE_MSA_8_BPC; + temp |= TRANS_MSA_8_BPC; break; case 30: - temp |= PIPE_MSA_10_BPC; + temp |= TRANS_MSA_10_BPC; break; case 36: - temp |= PIPE_MSA_12_BPC; + temp |= TRANS_MSA_12_BPC; break; default: - temp |= PIPE_MSA_8_BPC; - WARN(1, "%d bpp unsupported by pipe DDI function\n", + temp |= TRANS_MSA_8_BPC; + WARN(1, "%d bpp unsupported by DDI function\n", intel_crtc->bpp); } - I915_WRITE(PIPE_MSA_MISC(pipe), temp); + I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp); } }