From d0e6125c2928e19b0da7854e5671a332bb3d676a Mon Sep 17 00:00:00 2001
From: Paul Walmsley <paul@pwsan.com>
Date: Thu, 5 Feb 2009 20:45:28 -0700
Subject: [PATCH] --- yaml --- r: 137364 b: refs/heads/master c:
 7eb1afc9765d07c9036b1ad9e7c03e5bd1a58a2b h: refs/heads/master v: v3

---
 [refs]                                       |  2 +-
 trunk/arch/arm/mach-omap2/powerdomains.h     |  3 ++-
 trunk/arch/arm/mach-omap2/powerdomains34xx.h | 25 ++++++++++++++++++--
 3 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/[refs] b/[refs]
index cf9c816025b8..c4e12f453a7d 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d41ad52040dee5043ce6b1d49a1c8864706d2bfd
+refs/heads/master: 7eb1afc9765d07c9036b1ad9e7c03e5bd1a58a2b
diff --git a/trunk/arch/arm/mach-omap2/powerdomains.h b/trunk/arch/arm/mach-omap2/powerdomains.h
index 1329443f2cd5..691470ea4c6a 100644
--- a/trunk/arch/arm/mach-omap2/powerdomains.h
+++ b/trunk/arch/arm/mach-omap2/powerdomains.h
@@ -171,7 +171,8 @@ static struct powerdomain *powerdomains_omap[] __initdata = {
 	&iva2_pwrdm,
 	&mpu_34xx_pwrdm,
 	&neon_pwrdm,
-	&core_34xx_pwrdm,
+	&core_34xx_pre_es3_1_pwrdm,
+	&core_34xx_es3_1_pwrdm,
 	&cam_pwrdm,
 	&dss_pwrdm,
 	&per_pwrdm,
diff --git a/trunk/arch/arm/mach-omap2/powerdomains34xx.h b/trunk/arch/arm/mach-omap2/powerdomains34xx.h
index 78acfce8bbdc..4dcf94b800ab 100644
--- a/trunk/arch/arm/mach-omap2/powerdomains34xx.h
+++ b/trunk/arch/arm/mach-omap2/powerdomains34xx.h
@@ -200,12 +200,33 @@ static struct powerdomain mpu_34xx_pwrdm = {
 };
 
 /* No wkdeps or sleepdeps for 34xx core apparently */
-static struct powerdomain core_34xx_pwrdm = {
+static struct powerdomain core_34xx_pre_es3_1_pwrdm = {
 	.name		  = "core_pwrdm",
 	.prcm_offs	  = CORE_MOD,
-	.omap_chip	  = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+	.omap_chip	  = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
+					   CHIP_IS_OMAP3430ES2 |
+					   CHIP_IS_OMAP3430ES3_0),
+	.pwrsts		  = PWRSTS_OFF_RET_ON,
+	.dep_bit	  = OMAP3430_EN_CORE_SHIFT,
+	.banks		  = 2,
+	.pwrsts_mem_ret	  = {
+		[0] = PWRSTS_OFF_RET,	 /* MEM1RETSTATE */
+		[1] = PWRSTS_OFF_RET,	 /* MEM2RETSTATE */
+	},
+	.pwrsts_mem_on	  = {
+		[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
+		[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
+	},
+};
+
+/* No wkdeps or sleepdeps for 34xx core apparently */
+static struct powerdomain core_34xx_es3_1_pwrdm = {
+	.name		  = "core_pwrdm",
+	.prcm_offs	  = CORE_MOD,
+	.omap_chip	  = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
 	.dep_bit	  = OMAP3430_EN_CORE_SHIFT,
+	.flags		  = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
 	.banks		  = 2,
 	.pwrsts_mem_ret	  = {
 		[0] = PWRSTS_OFF_RET,	 /* MEM1RETSTATE */