diff --git a/[refs] b/[refs] index 6fed01809f63..44d5b0c1649e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4450cb7d586c3d8f6615ee437eab1d1e064b20c0 +refs/heads/master: 2c1706dda36757984f841a7735b9abe2d9ac57fe diff --git a/trunk/Documentation/ABI/testing/sysfs-block-rssd b/trunk/Documentation/ABI/testing/sysfs-block-rssd index 679ce3543122..beef30c046b0 100644 --- a/trunk/Documentation/ABI/testing/sysfs-block-rssd +++ b/trunk/Documentation/ABI/testing/sysfs-block-rssd @@ -1,26 +1,5 @@ -What: /sys/block/rssd*/registers -Date: March 2012 -KernelVersion: 3.3 -Contact: Asai Thambi S P -Description: This is a read-only file. Dumps below driver information and - hardware registers. - - S ACTive - - Command Issue - - Completed - - PORT IRQ STAT - - HOST IRQ STAT - - Allocated - - Commands in Q - What: /sys/block/rssd*/status Date: April 2012 KernelVersion: 3.4 Contact: Asai Thambi S P Description: This is a read-only file. Indicates the status of the device. - -What: /sys/block/rssd*/flags -Date: May 2012 -KernelVersion: 3.5 -Contact: Asai Thambi S P -Description: This is a read-only file. Dumps the flags in port and driver - data structure diff --git a/trunk/Documentation/device-mapper/verity.txt b/trunk/Documentation/device-mapper/verity.txt index 32e48797a14f..9884681535ee 100644 --- a/trunk/Documentation/device-mapper/verity.txt +++ b/trunk/Documentation/device-mapper/verity.txt @@ -7,39 +7,39 @@ This target is read-only. Construction Parameters ======================= - + - This is the version number of the on-disk format. + This is the type of the on-disk hash format. 0 is the original format used in the Chromium OS. - The salt is appended when hashing, digests are stored continuously and - the rest of the block is padded with zeros. + The salt is appended when hashing, digests are stored continuously and + the rest of the block is padded with zeros. 1 is the current format that should be used for new devices. - The salt is prepended when hashing and each digest is - padded with zeros to the power of two. + The salt is prepended when hashing and each digest is + padded with zeros to the power of two. - This is the device containing the data the integrity of which needs to be + This is the device containing data, the integrity of which needs to be checked. It may be specified as a path, like /dev/sdaX, or a device number, :. - This is the device that that supplies the hash tree data. It may be + This is the device that supplies the hash tree data. It may be specified similarly to the device path and may be the same device. If the - same device is used, the hash_start should be outside of the dm-verity - configured device size. + same device is used, the hash_start should be outside the configured + dm-verity device. - The block size on a data device. Each block corresponds to one digest on - the hash device. + The block size on a data device in bytes. + Each block corresponds to one digest on the hash device. - The size of a hash block. + The size of a hash block in bytes. The number of data blocks on the data device. Additional blocks are @@ -65,7 +65,7 @@ Construction Parameters Theory of operation =================== -dm-verity is meant to be setup as part of a verified boot path. This +dm-verity is meant to be set up as part of a verified boot path. This may be anything ranging from a boot using tboot or trustedgrub to just booting from a known-good device (like a USB drive or CD). @@ -73,20 +73,20 @@ When a dm-verity device is configured, it is expected that the caller has been authenticated in some way (cryptographic signatures, etc). After instantiation, all hashes will be verified on-demand during disk access. If they cannot be verified up to the root node of the -tree, the root hash, then the I/O will fail. This should identify +tree, the root hash, then the I/O will fail. This should detect tampering with any data on the device and the hash data. Cryptographic hashes are used to assert the integrity of the device on a -per-block basis. This allows for a lightweight hash computation on first read -into the page cache. Block hashes are stored linearly-aligned to the nearest -block the size of a page. +per-block basis. This allows for a lightweight hash computation on first read +into the page cache. Block hashes are stored linearly, aligned to the nearest +block size. Hash Tree --------- Each node in the tree is a cryptographic hash. If it is a leaf node, the hash -is of some block data on disk. If it is an intermediary node, then the hash is -of a number of child nodes. +of some data block on disk is calculated. If it is an intermediary node, +the hash of a number of child nodes is calculated. Each entry in the tree is a collection of neighboring nodes that fit in one block. The number is determined based on block_size and the size of the @@ -110,63 +110,23 @@ alg = sha256, num_blocks = 32768, block_size = 4096 On-disk format ============== -Below is the recommended on-disk format. The verity kernel code does not -read the on-disk header. It only reads the hash blocks which directly -follow the header. It is expected that a user-space tool will verify the -integrity of the verity_header and then call dmsetup with the correct -parameters. Alternatively, the header can be omitted and the dmsetup -parameters can be passed via the kernel command-line in a rooted chain -of trust where the command-line is verified. +The verity kernel code does not read the verity metadata on-disk header. +It only reads the hash blocks which directly follow the header. +It is expected that a user-space tool will verify the integrity of the +verity header. -The on-disk format is especially useful in cases where the hash blocks -are on a separate partition. The magic number allows easy identification -of the partition contents. Alternatively, the hash blocks can be stored -in the same partition as the data to be verified. In such a configuration -the filesystem on the partition would be sized a little smaller than -the full-partition, leaving room for the hash blocks. - -struct superblock { - uint8_t signature[8] - "verity\0\0"; - - uint8_t version; - 1 - current format - - uint8_t data_block_bits; - log2(data block size) - - uint8_t hash_block_bits; - log2(hash block size) - - uint8_t pad1[1]; - zero padding - - uint16_t salt_size; - big-endian salt size - - uint8_t pad2[2]; - zero padding - - uint32_t data_blocks_hi; - big-endian high 32 bits of the 64-bit number of data blocks - - uint32_t data_blocks_lo; - big-endian low 32 bits of the 64-bit number of data blocks - - uint8_t algorithm[16]; - cryptographic algorithm - - uint8_t salt[384]; - salt (the salt size is specified above) - - uint8_t pad3[88]; - zero padding to 512-byte boundary -} +Alternatively, the header can be omitted and the dmsetup parameters can +be passed via the kernel command-line in a rooted chain of trust where +the command-line is verified. Directly following the header (and with sector number padded to the next hash block boundary) are the hash blocks which are stored a depth at a time (starting from the root), sorted in order of increasing index. +The full specification of kernel parameters and on-disk metadata format +is available at the cryptsetup project's wiki page + http://code.google.com/p/cryptsetup/wiki/DMVerity + Status ====== V (for Valid) is returned if every check performed so far was valid. @@ -174,21 +134,22 @@ If any check failed, C (for Corruption) is returned. Example ======= - -Setup a device: - dmsetup create vroot --table \ - "0 2097152 "\ - "verity 1 /dev/sda1 /dev/sda2 4096 4096 2097152 1 "\ +Set up a device: + # dmsetup create vroot --readonly --table \ + "0 2097152 verity 1 /dev/sda1 /dev/sda2 4096 4096 262144 1 sha256 "\ "4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076 "\ "1234000000000000000000000000000000000000000000000000000000000000" A command line tool veritysetup is available to compute or verify -the hash tree or activate the kernel driver. This is available from -the LVM2 upstream repository and may be supplied as a package called -device-mapper-verity-tools: - git://sources.redhat.com/git/lvm2 - http://sourceware.org/git/?p=lvm2.git - http://sourceware.org/cgi-bin/cvsweb.cgi/LVM2/verity?cvsroot=lvm2 - -veritysetup -a vroot /dev/sda1 /dev/sda2 \ - 4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076 +the hash tree or activate the kernel device. This is available from +the cryptsetup upstream repository http://code.google.com/p/cryptsetup/ +(as a libcryptsetup extension). + +Create hash on the device: + # veritysetup format /dev/sda1 /dev/sda2 + ... + Root hash: 4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076 + +Activate the device: + # veritysetup create vroot /dev/sda1 /dev/sda2 \ + 4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076 diff --git a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt b/trunk/Documentation/devicetree/bindings/arm/tegra/emc.txt similarity index 99% rename from trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt rename to trunk/Documentation/devicetree/bindings/arm/tegra/emc.txt index 4c33b29dc660..09335f8eee00 100644 --- a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt +++ b/trunk/Documentation/devicetree/bindings/arm/tegra/emc.txt @@ -15,7 +15,7 @@ Child device nodes describe the memory settings for different configurations and Example: - memory-controller@7000f400 { + emc@7000f400 { #address-cells = < 1 >; #size-cells = < 0 >; compatible = "nvidia,tegra20-emc"; diff --git a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt b/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt index 866d93421eba..c25a0a55151d 100644 --- a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt +++ b/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt @@ -8,7 +8,7 @@ Required properties: - interrupts : Should contain MC General interrupt. Example: - memory-controller@0x7000f000 { + mc { compatible = "nvidia,tegra20-mc"; reg = <0x7000f000 0x024 0x7000f03c 0x3c4>; diff --git a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt b/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt index bdf1a612422b..e47e73f612f4 100644 --- a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt +++ b/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt @@ -8,7 +8,7 @@ Required properties: - interrupts : Should contain MC General interrupt. Example: - memory-controller { + mc { compatible = "nvidia,tegra30-mc"; reg = <0x7000f000 0x010 0x7000f03c 0x1b4 diff --git a/trunk/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt b/trunk/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt rename to trunk/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt diff --git a/trunk/Documentation/devicetree/bindings/input/fsl-mma8450.txt b/trunk/Documentation/devicetree/bindings/input/fsl-mma8450.txt index a00c94ccbdee..0b96e5737d3a 100644 --- a/trunk/Documentation/devicetree/bindings/input/fsl-mma8450.txt +++ b/trunk/Documentation/devicetree/bindings/input/fsl-mma8450.txt @@ -2,6 +2,7 @@ Required properties: - compatible : "fsl,mma8450". +- reg: the I2C address of MMA8450 Example: diff --git a/trunk/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt b/trunk/Documentation/devicetree/bindings/input/tegra-kbc.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt rename to trunk/Documentation/devicetree/bindings/input/tegra-kbc.txt diff --git a/trunk/Documentation/devicetree/bindings/mfd/mc13xxx.txt b/trunk/Documentation/devicetree/bindings/mfd/mc13xxx.txt index 19f6af47a792..baf07987ae68 100644 --- a/trunk/Documentation/devicetree/bindings/mfd/mc13xxx.txt +++ b/trunk/Documentation/devicetree/bindings/mfd/mc13xxx.txt @@ -46,8 +46,8 @@ Examples: ecspi@70010000 { /* ECSPI1 */ fsl,spi-num-chipselects = <2>; - cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ - <&gpio3 25 0>; /* GPIO4_25 */ + cs-gpios = <&gpio4 24 0>, /* GPIO4_24 */ + <&gpio4 25 0>; /* GPIO4_25 */ status = "okay"; pmic: mc13892@0 { diff --git a/trunk/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/trunk/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt index c7e404b3ef05..fea541ee8b34 100644 --- a/trunk/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +++ b/trunk/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt @@ -29,6 +29,6 @@ esdhc@70008000 { compatible = "fsl,imx51-esdhc"; reg = <0x70008000 0x4000>; interrupts = <2>; - cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */ - wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */ + cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */ + wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */ }; diff --git a/trunk/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/trunk/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt rename to trunk/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt diff --git a/trunk/Documentation/devicetree/bindings/net/fsl-fec.txt b/trunk/Documentation/devicetree/bindings/net/fsl-fec.txt index 7ab9e1a2d8be..4616fc28ee86 100644 --- a/trunk/Documentation/devicetree/bindings/net/fsl-fec.txt +++ b/trunk/Documentation/devicetree/bindings/net/fsl-fec.txt @@ -19,6 +19,6 @@ ethernet@83fec000 { reg = <0x83fec000 0x4000>; interrupts = <87>; phy-mode = "mii"; - phy-reset-gpios = <&gpio1 14 0>; /* GPIO2_14 */ + phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */ local-mac-address = [00 04 9F 01 1B B9]; }; diff --git a/trunk/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt b/trunk/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt rename to trunk/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt b/trunk/Documentation/devicetree/bindings/sound/tegra-audio-alc5632.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra-audio-alc5632.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt b/trunk/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt b/trunk/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt b/trunk/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt b/trunk/Documentation/devicetree/bindings/sound/tegra20-das.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra20-das.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt b/trunk/Documentation/devicetree/bindings/sound/tegra20-i2s.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra20-i2s.txt diff --git a/trunk/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt b/trunk/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt index 9841057d112b..4256a6df9b79 100644 --- a/trunk/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt +++ b/trunk/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt @@ -17,6 +17,6 @@ ecspi@70010000 { reg = <0x70010000 0x4000>; interrupts = <36>; fsl,spi-num-chipselects = <2>; - cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ - <&gpio3 25 0>; /* GPIO4_25 */ + cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */ + <&gpio3 25 0>; /* GPIO3_25 */ }; diff --git a/trunk/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt b/trunk/Documentation/devicetree/bindings/spi/spi_nvidia.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt rename to trunk/Documentation/devicetree/bindings/spi/spi_nvidia.txt diff --git a/trunk/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/trunk/Documentation/devicetree/bindings/usb/tegra-usb.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt rename to trunk/Documentation/devicetree/bindings/usb/tegra-usb.txt diff --git a/trunk/Documentation/devicetree/bindings/vendor-prefixes.txt b/trunk/Documentation/devicetree/bindings/vendor-prefixes.txt index 6eab91747a86..db4d3af3643c 100644 --- a/trunk/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/trunk/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -3,6 +3,7 @@ Device tree binding vendor prefix registry. Keep list in alphabetical order. This isn't an exhaustive list, but you should add new prefixes to it before using them to avoid name-space collisions. +ad Avionic Design GmbH adi Analog Devices, Inc. amcc Applied Micro Circuits Corporation (APM, formally AMCC) apm Applied Micro Circuits Corporation (APM) diff --git a/trunk/Documentation/prctl/no_new_privs.txt b/trunk/Documentation/prctl/no_new_privs.txt new file mode 100644 index 000000000000..f7be84fba910 --- /dev/null +++ b/trunk/Documentation/prctl/no_new_privs.txt @@ -0,0 +1,57 @@ +The execve system call can grant a newly-started program privileges that +its parent did not have. The most obvious examples are setuid/setgid +programs and file capabilities. To prevent the parent program from +gaining these privileges as well, the kernel and user code must be +careful to prevent the parent from doing anything that could subvert the +child. For example: + + - The dynamic loader handles LD_* environment variables differently if + a program is setuid. + + - chroot is disallowed to unprivileged processes, since it would allow + /etc/passwd to be replaced from the point of view of a process that + inherited chroot. + + - The exec code has special handling for ptrace. + +These are all ad-hoc fixes. The no_new_privs bit (since Linux 3.5) is a +new, generic mechanism to make it safe for a process to modify its +execution environment in a manner that persists across execve. Any task +can set no_new_privs. Once the bit is set, it is inherited across fork, +clone, and execve and cannot be unset. With no_new_privs set, execve +promises not to grant the privilege to do anything that could not have +been done without the execve call. For example, the setuid and setgid +bits will no longer change the uid or gid; file capabilities will not +add to the permitted set, and LSMs will not relax constraints after +execve. + +To set no_new_privs, use prctl(PR_SET_NO_NEW_PRIVS, 1, 0, 0, 0). + +Be careful, though: LSMs might also not tighten constraints on exec +in no_new_privs mode. (This means that setting up a general-purpose +service launcher to set no_new_privs before execing daemons may +interfere with LSM-based sandboxing.) + +Note that no_new_privs does not prevent privilege changes that do not +involve execve. An appropriately privileged task can still call +setuid(2) and receive SCM_RIGHTS datagrams. + +There are two main use cases for no_new_privs so far: + + - Filters installed for the seccomp mode 2 sandbox persist across + execve and can change the behavior of newly-executed programs. + Unprivileged users are therefore only allowed to install such filters + if no_new_privs is set. + + - By itself, no_new_privs can be used to reduce the attack surface + available to an unprivileged user. If everything running with a + given uid has no_new_privs set, then that uid will be unable to + escalate its privileges by directly attacking setuid, setgid, and + fcap-using binaries; it will need to compromise something without the + no_new_privs bit set first. + +In the future, other potentially dangerous kernel features could become +available to unprivileged tasks if no_new_privs is set. In principle, +several options to unshare(2) and clone(2) would be safe when +no_new_privs is set, and no_new_privs + chroot is considerable less +dangerous than chroot by itself. diff --git a/trunk/Documentation/virtual/kvm/api.txt b/trunk/Documentation/virtual/kvm/api.txt index 930126698a0f..2c9948379469 100644 --- a/trunk/Documentation/virtual/kvm/api.txt +++ b/trunk/Documentation/virtual/kvm/api.txt @@ -1930,6 +1930,23 @@ The "pte_enc" field provides a value that can OR'ed into the hash PTE's RPN field (ie, it needs to be shifted left by 12 to OR it into the hash PTE second double word). +4.75 KVM_IRQFD + +Capability: KVM_CAP_IRQFD +Architectures: x86 +Type: vm ioctl +Parameters: struct kvm_irqfd (in) +Returns: 0 on success, -1 on error + +Allows setting an eventfd to directly trigger a guest interrupt. +kvm_irqfd.fd specifies the file descriptor to use as the eventfd and +kvm_irqfd.gsi specifies the irqchip pin toggled by this event. When +an event is tiggered on the eventfd, an interrupt is injected into +the guest using the specified gsi pin. The irqfd is removed using +the KVM_IRQFD_FLAG_DEASSIGN flag, specifying both kvm_irqfd.fd +and kvm_irqfd.gsi. + + 5. The kvm_run structure ------------------------ diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index eb22272b2116..03df1d15ebf3 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -4654,8 +4654,8 @@ L: netfilter@vger.kernel.org L: coreteam@netfilter.org W: http://www.netfilter.org/ W: http://www.iptables.org/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf-2.6.git -T: git git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf-next-2.6.git +T: git git://1984.lsi.us.es/nf +T: git git://1984.lsi.us.es/nf-next S: Supported F: include/linux/netfilter* F: include/linux/netfilter/ diff --git a/trunk/Makefile b/trunk/Makefile index 81ea15450049..bf02707a5e9b 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 5 SUBLEVEL = 0 -EXTRAVERSION = -rc5 +EXTRAVERSION = -rc6 NAME = Saber-toothed Squirrel # *DOCUMENTATION* diff --git a/trunk/arch/arm/boot/dts/tegra30-cardhu.dts b/trunk/arch/arm/boot/dts/tegra-cardhu.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra30-cardhu.dts rename to trunk/arch/arm/boot/dts/tegra-cardhu.dts index c169bced131e..36321bceec46 100644 --- a/trunk/arch/arm/boot/dts/tegra30-cardhu.dts +++ b/trunk/arch/arm/boot/dts/tegra-cardhu.dts @@ -144,6 +144,7 @@ sdhci@78000600 { status = "okay"; + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20-harmony.dts b/trunk/arch/arm/boot/dts/tegra-harmony.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra20-harmony.dts rename to trunk/arch/arm/boot/dts/tegra-harmony.dts index f146dbf6f7f8..7de701365fce 100644 --- a/trunk/arch/arm/boot/dts/tegra20-harmony.dts +++ b/trunk/arch/arm/boot/dts/tegra-harmony.dts @@ -307,6 +307,7 @@ cd-gpios = <&gpio 58 0>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20-paz00.dts b/trunk/arch/arm/boot/dts/tegra-paz00.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra20-paz00.dts rename to trunk/arch/arm/boot/dts/tegra-paz00.dts index 684a9e1ff7e9..bfeb117d5aea 100644 --- a/trunk/arch/arm/boot/dts/tegra20-paz00.dts +++ b/trunk/arch/arm/boot/dts/tegra-paz00.dts @@ -301,6 +301,7 @@ sdhci@c8000600 { status = "okay"; + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts b/trunk/arch/arm/boot/dts/tegra-seaboard.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra20-seaboard.dts rename to trunk/arch/arm/boot/dts/tegra-seaboard.dts index b797901d040d..89cb7f2acd92 100644 --- a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/trunk/arch/arm/boot/dts/tegra-seaboard.dts @@ -334,7 +334,7 @@ }; }; - memory-controller@0x7000f400 { + emc { emc-table@190000 { reg = <190000>; compatible = "nvidia,tegra20-emc-table"; @@ -397,6 +397,7 @@ sdhci@c8000600 { status = "okay"; + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts b/trunk/arch/arm/boot/dts/tegra-trimslice.dts similarity index 100% rename from trunk/arch/arm/boot/dts/tegra20-trimslice.dts rename to trunk/arch/arm/boot/dts/tegra-trimslice.dts diff --git a/trunk/arch/arm/boot/dts/tegra20-ventana.dts b/trunk/arch/arm/boot/dts/tegra-ventana.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra20-ventana.dts rename to trunk/arch/arm/boot/dts/tegra-ventana.dts index be90544e6b59..445343b0fbdd 100644 --- a/trunk/arch/arm/boot/dts/tegra20-ventana.dts +++ b/trunk/arch/arm/boot/dts/tegra-ventana.dts @@ -314,6 +314,7 @@ sdhci@c8000600 { status = "okay"; + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20.dtsi b/trunk/arch/arm/boot/dts/tegra20.dtsi index 59116b852434..c417d67e9027 100644 --- a/trunk/arch/arm/boot/dts/tegra20.dtsi +++ b/trunk/arch/arm/boot/dts/tegra20.dtsi @@ -164,7 +164,7 @@ reg = <0x7000e400 0x400>; }; - memory-controller@0x7000f000 { + mc { compatible = "nvidia,tegra20-mc"; reg = <0x7000f000 0x024 0x7000f03c 0x3c4>; @@ -177,7 +177,7 @@ 0x58000000 0x02000000>; /* GART aperture */ }; - memory-controller@0x7000f400 { + emc { compatible = "nvidia,tegra20-emc"; reg = <0x7000f400 0x200>; #address-cells = <1>; diff --git a/trunk/arch/arm/boot/dts/tegra30.dtsi b/trunk/arch/arm/boot/dts/tegra30.dtsi index 19479393842e..2dcc09e784b5 100644 --- a/trunk/arch/arm/boot/dts/tegra30.dtsi +++ b/trunk/arch/arm/boot/dts/tegra30.dtsi @@ -167,7 +167,7 @@ reg = <0x7000e400 0x400>; }; - memory-controller { + mc { compatible = "nvidia,tegra30-mc"; reg = <0x7000f000 0x010 0x7000f03c 0x1b4 diff --git a/trunk/arch/arm/include/asm/atomic.h b/trunk/arch/arm/include/asm/atomic.h index 68374ba6a943..c79f61faa3a5 100644 --- a/trunk/arch/arm/include/asm/atomic.h +++ b/trunk/arch/arm/include/asm/atomic.h @@ -243,7 +243,7 @@ typedef struct { #define ATOMIC64_INIT(i) { (i) } -static inline u64 atomic64_read(atomic64_t *v) +static inline u64 atomic64_read(const atomic64_t *v) { u64 result; diff --git a/trunk/arch/arm/include/asm/domain.h b/trunk/arch/arm/include/asm/domain.h index 3d2220498abc..6ddbe446425e 100644 --- a/trunk/arch/arm/include/asm/domain.h +++ b/trunk/arch/arm/include/asm/domain.h @@ -60,13 +60,13 @@ #ifndef __ASSEMBLY__ #ifdef CONFIG_CPU_USE_DOMAINS -#define set_domain(x) \ - do { \ - __asm__ __volatile__( \ - "mcr p15, 0, %0, c3, c0 @ set domain" \ - : : "r" (x)); \ - isb(); \ - } while (0) +static inline void set_domain(unsigned val) +{ + asm volatile( + "mcr p15, 0, %0, c3, c0 @ set domain" + : : "r" (val)); + isb(); +} #define modify_domain(dom,type) \ do { \ @@ -78,8 +78,8 @@ } while (0) #else -#define set_domain(x) do { } while (0) -#define modify_domain(dom,type) do { } while (0) +static inline void set_domain(unsigned val) { } +static inline void modify_domain(unsigned dom, unsigned type) { } #endif /* diff --git a/trunk/arch/arm/include/asm/thread_info.h b/trunk/arch/arm/include/asm/thread_info.h index b79f8e97f775..af7b0bda3355 100644 --- a/trunk/arch/arm/include/asm/thread_info.h +++ b/trunk/arch/arm/include/asm/thread_info.h @@ -148,7 +148,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *, #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ #define TIF_SYSCALL_TRACE 8 #define TIF_SYSCALL_AUDIT 9 -#define TIF_SYSCALL_RESTARTSYS 10 #define TIF_POLLING_NRFLAG 16 #define TIF_USING_IWMMXT 17 #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ @@ -164,11 +163,9 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *, #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) #define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) #define _TIF_SECCOMP (1 << TIF_SECCOMP) -#define _TIF_SYSCALL_RESTARTSYS (1 << TIF_SYSCALL_RESTARTSYS) /* Checks for any syscall work in entry-common.S */ -#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ - _TIF_SYSCALL_RESTARTSYS) +#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT) /* * Change these and you break ASM code in entry-common.S diff --git a/trunk/arch/arm/kernel/kprobes-test-arm.c b/trunk/arch/arm/kernel/kprobes-test-arm.c index ba32b393b3f0..38c1a3b103a0 100644 --- a/trunk/arch/arm/kernel/kprobes-test-arm.c +++ b/trunk/arch/arm/kernel/kprobes-test-arm.c @@ -187,8 +187,8 @@ void kprobe_arm_test_cases(void) TEST_BF_R ("mov pc, r",0,2f,"") TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"") TEST_BB( "sub pc, pc, #1b-2b+8") -#if __LINUX_ARM_ARCH__ >= 6 - TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before ARMv6 */ +#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7) + TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */ #endif TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"") TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc") diff --git a/trunk/arch/arm/kernel/perf_event.c b/trunk/arch/arm/kernel/perf_event.c index 186c8cb982c5..a02eada3aa5d 100644 --- a/trunk/arch/arm/kernel/perf_event.c +++ b/trunk/arch/arm/kernel/perf_event.c @@ -503,7 +503,7 @@ __hw_perf_event_init(struct perf_event *event) event_requires_mode_exclusion(&event->attr)) { pr_debug("ARM performance counters do not support " "mode exclusion\n"); - return -EPERM; + return -EOPNOTSUPP; } /* diff --git a/trunk/arch/arm/kernel/ptrace.c b/trunk/arch/arm/kernel/ptrace.c index 5700a7ae7f0b..14e38261cd31 100644 --- a/trunk/arch/arm/kernel/ptrace.c +++ b/trunk/arch/arm/kernel/ptrace.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include @@ -918,8 +917,6 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); - if (why == 0 && test_and_clear_thread_flag(TIF_SYSCALL_RESTARTSYS)) - scno = __NR_restart_syscall - __NR_SYSCALL_BASE; if (!test_thread_flag(TIF_SYSCALL_TRACE)) return scno; diff --git a/trunk/arch/arm/kernel/signal.c b/trunk/arch/arm/kernel/signal.c index fd2392a17ac1..536c5d6b340b 100644 --- a/trunk/arch/arm/kernel/signal.c +++ b/trunk/arch/arm/kernel/signal.c @@ -27,6 +27,7 @@ */ #define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) #define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) +#define SWI_SYS_RESTART (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE) /* * With EABI, the syscall number has to be loaded into r7. @@ -46,6 +47,18 @@ const unsigned long sigreturn_codes[7] = { MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN, }; +/* + * Either we support OABI only, or we have EABI with the OABI + * compat layer enabled. In the later case we don't know if + * user space is EABI or not, and if not we must not clobber r7. + * Always using the OABI syscall solves that issue and works for + * all those cases. + */ +const unsigned long syscall_restart_code[2] = { + SWI_SYS_RESTART, /* swi __NR_restart_syscall */ + 0xe49df004, /* ldr pc, [sp], #4 */ +}; + /* * atomically swap in the new signal mask, and wait for a signal. */ @@ -592,10 +605,12 @@ static void do_signal(struct pt_regs *regs, int syscall) case -ERESTARTNOHAND: case -ERESTARTSYS: case -ERESTARTNOINTR: - case -ERESTART_RESTARTBLOCK: regs->ARM_r0 = regs->ARM_ORIG_r0; regs->ARM_pc = restart_addr; break; + case -ERESTART_RESTARTBLOCK: + regs->ARM_r0 = -EINTR; + break; } } @@ -611,14 +626,12 @@ static void do_signal(struct pt_regs *regs, int syscall) * debugger has chosen to restart at a different PC. */ if (regs->ARM_pc == restart_addr) { - if (retval == -ERESTARTNOHAND || - retval == -ERESTART_RESTARTBLOCK + if (retval == -ERESTARTNOHAND || (retval == -ERESTARTSYS && !(ka.sa.sa_flags & SA_RESTART))) { regs->ARM_r0 = -EINTR; regs->ARM_pc = continue_addr; } - clear_thread_flag(TIF_SYSCALL_RESTARTSYS); } handle_signal(signr, &ka, &info, regs); @@ -632,8 +645,29 @@ static void do_signal(struct pt_regs *regs, int syscall) * ignore the restart. */ if (retval == -ERESTART_RESTARTBLOCK - && regs->ARM_pc == restart_addr) - set_thread_flag(TIF_SYSCALL_RESTARTSYS); + && regs->ARM_pc == continue_addr) { + if (thumb_mode(regs)) { + regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE; + regs->ARM_pc -= 2; + } else { +#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT) + regs->ARM_r7 = __NR_restart_syscall; + regs->ARM_pc -= 4; +#else + u32 __user *usp; + + regs->ARM_sp -= 4; + usp = (u32 __user *)regs->ARM_sp; + + if (put_user(regs->ARM_pc, usp) == 0) { + regs->ARM_pc = KERN_RESTART_CODE; + } else { + regs->ARM_sp += 4; + force_sigsegv(0, current); + } +#endif + } + } } restore_saved_sigmask(); diff --git a/trunk/arch/arm/kernel/signal.h b/trunk/arch/arm/kernel/signal.h index 5ff067b7c752..6fcfe8398aa4 100644 --- a/trunk/arch/arm/kernel/signal.h +++ b/trunk/arch/arm/kernel/signal.h @@ -8,5 +8,7 @@ * published by the Free Software Foundation. */ #define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) +#define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes)) extern const unsigned long sigreturn_codes[7]; +extern const unsigned long syscall_restart_code[2]; diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index 4928d89758f4..3647170e9a16 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -820,6 +820,8 @@ void __init early_trap_init(void *vectors_base) */ memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), sigreturn_codes, sizeof(sigreturn_codes)); + memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE), + syscall_restart_code, sizeof(syscall_restart_code)); flush_icache_range(vectors, vectors + PAGE_SIZE); modify_domain(DOMAIN_USER, DOMAIN_CLIENT); diff --git a/trunk/arch/arm/kernel/vmlinux.lds.S b/trunk/arch/arm/kernel/vmlinux.lds.S index 43a31fb06318..36ff15bbfdd4 100644 --- a/trunk/arch/arm/kernel/vmlinux.lds.S +++ b/trunk/arch/arm/kernel/vmlinux.lds.S @@ -183,7 +183,9 @@ SECTIONS } #endif +#ifdef CONFIG_SMP PERCPU_SECTION(L1_CACHE_BYTES) +#endif #ifdef CONFIG_XIP_KERNEL __data_loc = ALIGN(4); /* location in binary */ diff --git a/trunk/arch/arm/mach-dove/include/mach/bridge-regs.h b/trunk/arch/arm/mach-dove/include/mach/bridge-regs.h index 226949dc4ac0..f953bb54aa9d 100644 --- a/trunk/arch/arm/mach-dove/include/mach/bridge-regs.h +++ b/trunk/arch/arm/mach-dove/include/mach/bridge-regs.h @@ -50,5 +50,6 @@ #define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c) #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) +#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300) #endif diff --git a/trunk/arch/arm/mach-dove/include/mach/dove.h b/trunk/arch/arm/mach-dove/include/mach/dove.h index ad1165d488c1..d52b0ef313b7 100644 --- a/trunk/arch/arm/mach-dove/include/mach/dove.h +++ b/trunk/arch/arm/mach-dove/include/mach/dove.h @@ -78,6 +78,7 @@ /* North-South Bridge */ #define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000) +#define BRIDGE_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x20000) /* Cryptographic Engine */ #define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000) diff --git a/trunk/arch/arm/mach-imx/clk-imx27.c b/trunk/arch/arm/mach-imx/clk-imx27.c index 295cbd7c08dc..167a3f1c8e83 100644 --- a/trunk/arch/arm/mach-imx/clk-imx27.c +++ b/trunk/arch/arm/mach-imx/clk-imx27.c @@ -256,7 +256,7 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL); clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL); clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL); - clk_register_clkdev(clk[rtc_ipg_gate], "rtc", NULL); + clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc"); clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); clk_register_clkdev(clk[cpu_div], "cpu", NULL); clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); diff --git a/trunk/arch/arm/mach-imx/clk-imx31.c b/trunk/arch/arm/mach-imx/clk-imx31.c index c9a06d800f8e..8711090eeee4 100644 --- a/trunk/arch/arm/mach-imx/clk-imx31.c +++ b/trunk/arch/arm/mach-imx/clk-imx31.c @@ -123,7 +123,7 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); clk_register_clkdev(clk[pwm_gate], "pwm", NULL); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[rtc_gate], "rtc", NULL); + clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc"); clk_register_clkdev(clk[epit1_gate], "epit", NULL); clk_register_clkdev(clk[epit2_gate], "epit", NULL); clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0"); diff --git a/trunk/arch/arm/mach-imx/clk-imx35.c b/trunk/arch/arm/mach-imx/clk-imx35.c index 920a8cc42726..c6422fb10bae 100644 --- a/trunk/arch/arm/mach-imx/clk-imx35.c +++ b/trunk/arch/arm/mach-imx/clk-imx35.c @@ -201,7 +201,6 @@ int __init mx35_clocks_init() pr_err("i.MX35 clk %d: register failed with %ld\n", i, PTR_ERR(clk[i])); - clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1"); @@ -264,6 +263,14 @@ int __init mx35_clocks_init() clk_prepare_enable(clk[iim_gate]); clk_prepare_enable(clk[emi_gate]); + /* + * SCC is needed to boot via mmc after a watchdog reset. The clock code + * before conversion to common clk also enabled UART1 (which isn't + * handled here and not needed for mmc) and IIM (which is enabled + * unconditionally above). + */ + clk_prepare_enable(clk[scc_gate]); + imx_print_silicon_rev("i.MX35", mx35_revision()); #ifdef CONFIG_MXC_USE_EPIT diff --git a/trunk/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/trunk/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index f76edb96a48a..ba09552fe5fe 100644 --- a/trunk/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/trunk/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -38,7 +38,7 @@ #include #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/trunk/arch/arm/mach-mmp/include/mach/gpio-pxa.h deleted file mode 100644 index 0e135a599f3e..000000000000 --- a/trunk/arch/arm/mach-mmp/include/mach/gpio-pxa.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef __ASM_MACH_GPIO_PXA_H -#define __ASM_MACH_GPIO_PXA_H - -#include -#include -#include - -#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) - -#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) - -#define gpio_to_bank(gpio) ((gpio) >> 5) - -/* NOTE: these macros are defined here to make optimization of - * gpio_{get,set}_value() to work when 'gpio' is a constant. - * Usage of these macros otherwise is no longer recommended, - * use generic GPIO API whenever possible. - */ -#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f)) - -#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00) -#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c) -#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18) -#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24) - -#include - -#endif /* __ASM_MACH_GPIO_PXA_H */ diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/trunk/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h index c64dbb96dbad..eb187e0e059b 100644 --- a/trunk/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h @@ -31,5 +31,6 @@ #define IRQ_MASK_HIGH_OFF 0x0014 #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) +#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300) #endif diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/trunk/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h index 3674497162e3..e807c4c52a0b 100644 --- a/trunk/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h @@ -42,6 +42,7 @@ #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 #define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 +#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000 #define MV78XX0_CORE_REGS_SIZE SZ_16K #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) @@ -59,6 +60,7 @@ * Core-specific peripheral registers. */ #define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) +#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE) /* * Register Map diff --git a/trunk/arch/arm/mach-mxs/mach-apx4devkit.c b/trunk/arch/arm/mach-mxs/mach-apx4devkit.c index 5e90b9dcdef8..f5f061757deb 100644 --- a/trunk/arch/arm/mach-mxs/mach-apx4devkit.c +++ b/trunk/arch/arm/mach-mxs/mach-apx4devkit.c @@ -205,6 +205,16 @@ static int apx4devkit_phy_fixup(struct phy_device *phy) return 0; } +static void __init apx4devkit_fec_phy_clk_enable(void) +{ + struct clk *clk; + + /* Enable fec phy clock */ + clk = clk_get_sys("enet_out", NULL); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); +} + static void __init apx4devkit_init(void) { mx28_soc_init(); @@ -225,6 +235,7 @@ static void __init apx4devkit_init(void) phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK, apx4devkit_phy_fixup); + apx4devkit_fec_phy_clk_enable(); mx28_add_fec(0, &mx28_fec_pdata); mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata); diff --git a/trunk/arch/arm/mach-omap1/board-ams-delta.c b/trunk/arch/arm/mach-omap1/board-ams-delta.c index c53469802c03..f2f8a5847018 100644 --- a/trunk/arch/arm/mach-omap1/board-ams-delta.c +++ b/trunk/arch/arm/mach-omap1/board-ams-delta.c @@ -37,12 +37,12 @@ #include #include #include +#include #include #include #include #include -#include #include "iomap.h" #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-generic.c b/trunk/arch/arm/mach-omap1/board-generic.c index 6ec385e2b98e..e75e2d55a2d7 100644 --- a/trunk/arch/arm/mach-omap1/board-generic.c +++ b/trunk/arch/arm/mach-omap1/board-generic.c @@ -23,10 +23,8 @@ #include #include +#include #include - -#include - #include "common.h" /* assume no Mini-AB port */ diff --git a/trunk/arch/arm/mach-omap1/board-h2.c b/trunk/arch/arm/mach-omap1/board-h2.c index 44a4ab195fbc..a28e989a63f4 100644 --- a/trunk/arch/arm/mach-omap1/board-h2.c +++ b/trunk/arch/arm/mach-omap1/board-h2.c @@ -40,11 +40,11 @@ #include #include #include +#include #include #include #include -#include #include "common.h" #include "board-h2.h" diff --git a/trunk/arch/arm/mach-omap1/board-h3.c b/trunk/arch/arm/mach-omap1/board-h3.c index 86cb5a04a404..108a8640fc6f 100644 --- a/trunk/arch/arm/mach-omap1/board-h3.c +++ b/trunk/arch/arm/mach-omap1/board-h3.c @@ -40,13 +40,13 @@ #include #include +#include #include #include #include #include #include -#include #include "common.h" #include "board-h3.h" diff --git a/trunk/arch/arm/mach-omap1/board-htcherald.c b/trunk/arch/arm/mach-omap1/board-htcherald.c index b3f6e943e661..118a9d4a4c54 100644 --- a/trunk/arch/arm/mach-omap1/board-htcherald.c +++ b/trunk/arch/arm/mach-omap1/board-htcherald.c @@ -44,10 +44,10 @@ #include #include #include +#include #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-innovator.c b/trunk/arch/arm/mach-omap1/board-innovator.c index f21c2966daad..7970223a559d 100644 --- a/trunk/arch/arm/mach-omap1/board-innovator.c +++ b/trunk/arch/arm/mach-omap1/board-innovator.c @@ -35,11 +35,11 @@ #include #include #include +#include #include #include #include -#include #include "iomap.h" #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-nokia770.c b/trunk/arch/arm/mach-omap1/board-nokia770.c index 4007a372481b..7212ae97f44a 100644 --- a/trunk/arch/arm/mach-omap1/board-nokia770.c +++ b/trunk/arch/arm/mach-omap1/board-nokia770.c @@ -26,6 +26,7 @@ #include #include +#include #include #include #include @@ -33,7 +34,6 @@ #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-osk.c b/trunk/arch/arm/mach-omap1/board-osk.c index 8784705edb60..da8d872d3d1c 100644 --- a/trunk/arch/arm/mach-omap1/board-osk.c +++ b/trunk/arch/arm/mach-omap1/board-osk.c @@ -45,11 +45,11 @@ #include #include +#include #include #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-palmte.c b/trunk/arch/arm/mach-omap1/board-palmte.c index 26bcb9defcdc..949b62a73693 100644 --- a/trunk/arch/arm/mach-omap1/board-palmte.c +++ b/trunk/arch/arm/mach-omap1/board-palmte.c @@ -35,6 +35,7 @@ #include #include +#include #include #include #include @@ -42,7 +43,6 @@ #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-palmtt.c b/trunk/arch/arm/mach-omap1/board-palmtt.c index 4d099446dfa8..7f1e1cf2bf46 100644 --- a/trunk/arch/arm/mach-omap1/board-palmtt.c +++ b/trunk/arch/arm/mach-omap1/board-palmtt.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include #include @@ -42,7 +43,6 @@ #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-palmz71.c b/trunk/arch/arm/mach-omap1/board-palmz71.c index cc71a26723ef..3c71c6bace2c 100644 --- a/trunk/arch/arm/mach-omap1/board-palmz71.c +++ b/trunk/arch/arm/mach-omap1/board-palmz71.c @@ -37,6 +37,7 @@ #include #include +#include #include #include #include @@ -44,7 +45,6 @@ #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-sx1.c b/trunk/arch/arm/mach-omap1/board-sx1.c index 8c665bd16ac2..3b7b82b13684 100644 --- a/trunk/arch/arm/mach-omap1/board-sx1.c +++ b/trunk/arch/arm/mach-omap1/board-sx1.c @@ -37,13 +37,13 @@ #include #include #include +#include #include #include #include #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-voiceblue.c b/trunk/arch/arm/mach-omap1/board-voiceblue.c index 3497769eb353..afd67f0ec495 100644 --- a/trunk/arch/arm/mach-omap1/board-voiceblue.c +++ b/trunk/arch/arm/mach-omap1/board-voiceblue.c @@ -35,10 +35,9 @@ #include #include #include -#include +#include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/clock_data.c b/trunk/arch/arm/mach-omap1/clock_data.c index c007d80dfb62..c6ce93f71d08 100644 --- a/trunk/arch/arm/mach-omap1/clock_data.c +++ b/trunk/arch/arm/mach-omap1/clock_data.c @@ -25,11 +25,10 @@ #include #include #include -#include #include /* for omap_sram_reprogram_clock() */ +#include /* for OTG_BASE */ #include -#include /* for OTG_BASE */ #include "iomap.h" #include "clock.h" diff --git a/trunk/arch/arm/mach-omap1/include/mach/usb.h b/trunk/arch/arm/mach-omap1/include/mach/usb.h deleted file mode 100644 index 753cd5ce6949..000000000000 --- a/trunk/arch/arm/mach-omap1/include/mach/usb.h +++ /dev/null @@ -1,165 +0,0 @@ -/* - * FIXME correct answer depends on hmc_mode, - * as does (on omap1) any nonzero value for config->otg port number - */ -#ifdef CONFIG_USB_GADGET_OMAP -#define is_usb0_device(config) 1 -#else -#define is_usb0_device(config) 0 -#endif - -struct omap_usb_config { - /* Configure drivers according to the connectors on your board: - * - "A" connector (rectagular) - * ... for host/OHCI use, set "register_host". - * - "B" connector (squarish) or "Mini-B" - * ... for device/gadget use, set "register_dev". - * - "Mini-AB" connector (very similar to Mini-B) - * ... for OTG use as device OR host, initialize "otg" - */ - unsigned register_host:1; - unsigned register_dev:1; - u8 otg; /* port number, 1-based: usb1 == 2 */ - - u8 hmc_mode; - - /* implicitly true if otg: host supports remote wakeup? */ - u8 rwc; - - /* signaling pins used to talk to transceiver on usbN: - * 0 == usbN unused - * 2 == usb0-only, using internal transceiver - * 3 == 3 wire bidirectional - * 4 == 4 wire bidirectional - * 6 == 6 wire unidirectional (or TLL) - */ - u8 pins[3]; - - struct platform_device *udc_device; - struct platform_device *ohci_device; - struct platform_device *otg_device; - - u32 (*usb0_init)(unsigned nwires, unsigned is_device); - u32 (*usb1_init)(unsigned nwires); - u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); - - int (*ocpi_enable)(void); -}; - -void omap_otg_init(struct omap_usb_config *config); - -#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE) -void omap1_usb_init(struct omap_usb_config *pdata); -#else -static inline void omap1_usb_init(struct omap_usb_config *pdata) -{ -} -#endif - -#define OMAP1_OTG_BASE 0xfffb0400 -#define OMAP1_UDC_BASE 0xfffb4000 -#define OMAP1_OHCI_BASE 0xfffba000 - -#define OMAP2_OHCI_BASE 0x4805e000 -#define OMAP2_UDC_BASE 0x4805e200 -#define OMAP2_OTG_BASE 0x4805e300 -#define OTG_BASE OMAP1_OTG_BASE -#define UDC_BASE OMAP1_UDC_BASE -#define OMAP_OHCI_BASE OMAP1_OHCI_BASE - -/* - * OTG and transceiver registers, for OMAPs starting with ARM926 - */ -#define OTG_REV (OTG_BASE + 0x00) -#define OTG_SYSCON_1 (OTG_BASE + 0x04) -# define USB2_TRX_MODE(w) (((w)>>24)&0x07) -# define USB1_TRX_MODE(w) (((w)>>20)&0x07) -# define USB0_TRX_MODE(w) (((w)>>16)&0x07) -# define OTG_IDLE_EN (1 << 15) -# define HST_IDLE_EN (1 << 14) -# define DEV_IDLE_EN (1 << 13) -# define OTG_RESET_DONE (1 << 2) -# define OTG_SOFT_RESET (1 << 1) -#define OTG_SYSCON_2 (OTG_BASE + 0x08) -# define OTG_EN (1 << 31) -# define USBX_SYNCHRO (1 << 30) -# define OTG_MST16 (1 << 29) -# define SRP_GPDATA (1 << 28) -# define SRP_GPDVBUS (1 << 27) -# define SRP_GPUVBUS(w) (((w)>>24)&0x07) -# define A_WAIT_VRISE(w) (((w)>>20)&0x07) -# define B_ASE_BRST(w) (((w)>>16)&0x07) -# define SRP_DPW (1 << 14) -# define SRP_DATA (1 << 13) -# define SRP_VBUS (1 << 12) -# define OTG_PADEN (1 << 10) -# define HMC_PADEN (1 << 9) -# define UHOST_EN (1 << 8) -# define HMC_TLLSPEED (1 << 7) -# define HMC_TLLATTACH (1 << 6) -# define OTG_HMC(w) (((w)>>0)&0x3f) -#define OTG_CTRL (OTG_BASE + 0x0c) -# define OTG_USB2_EN (1 << 29) -# define OTG_USB2_DP (1 << 28) -# define OTG_USB2_DM (1 << 27) -# define OTG_USB1_EN (1 << 26) -# define OTG_USB1_DP (1 << 25) -# define OTG_USB1_DM (1 << 24) -# define OTG_USB0_EN (1 << 23) -# define OTG_USB0_DP (1 << 22) -# define OTG_USB0_DM (1 << 21) -# define OTG_ASESSVLD (1 << 20) -# define OTG_BSESSEND (1 << 19) -# define OTG_BSESSVLD (1 << 18) -# define OTG_VBUSVLD (1 << 17) -# define OTG_ID (1 << 16) -# define OTG_DRIVER_SEL (1 << 15) -# define OTG_A_SETB_HNPEN (1 << 12) -# define OTG_A_BUSREQ (1 << 11) -# define OTG_B_HNPEN (1 << 9) -# define OTG_B_BUSREQ (1 << 8) -# define OTG_BUSDROP (1 << 7) -# define OTG_PULLDOWN (1 << 5) -# define OTG_PULLUP (1 << 4) -# define OTG_DRV_VBUS (1 << 3) -# define OTG_PD_VBUS (1 << 2) -# define OTG_PU_VBUS (1 << 1) -# define OTG_PU_ID (1 << 0) -#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ -# define DRIVER_SWITCH (1 << 15) -# define A_VBUS_ERR (1 << 13) -# define A_REQ_TMROUT (1 << 12) -# define A_SRP_DETECT (1 << 11) -# define B_HNP_FAIL (1 << 10) -# define B_SRP_TMROUT (1 << 9) -# define B_SRP_DONE (1 << 8) -# define B_SRP_STARTED (1 << 7) -# define OPRT_CHG (1 << 0) -#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ - // same bits as in IRQ_EN -#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ -# define OTGVPD (1 << 14) -# define OTGVPU (1 << 13) -# define OTGPUID (1 << 12) -# define USB2VDR (1 << 10) -# define USB2PDEN (1 << 9) -# define USB2PUEN (1 << 8) -# define USB1VDR (1 << 6) -# define USB1PDEN (1 << 5) -# define USB1PUEN (1 << 4) -# define USB0VDR (1 << 2) -# define USB0PDEN (1 << 1) -# define USB0PUEN (1 << 0) -#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ -#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ - -/*-------------------------------------------------------------------------*/ - -/* OMAP1 */ -#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) -# define CONF_USB2_UNI_R (1 << 8) -# define CONF_USB1_UNI_R (1 << 7) -# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) -# define CONF_USB0_ISOLATE_R (1 << 3) -# define CONF_USB_PWRDN_DM_R (1 << 2) -# define CONF_USB_PWRDN_DP_R (1 << 1) diff --git a/trunk/arch/arm/mach-omap1/timer.c b/trunk/arch/arm/mach-omap1/timer.c index aa81593db1af..64c65bcb2d67 100644 --- a/trunk/arch/arm/mach-omap1/timer.c +++ b/trunk/arch/arm/mach-omap1/timer.c @@ -140,8 +140,7 @@ static int __init omap1_dm_timer_init(void) } pdata->set_timer_src = omap1_dm_timer_set_src; - pdata->timer_capability = OMAP_TIMER_ALWON | - OMAP_TIMER_NEEDS_RESET; + pdata->needs_manual_reset = 1; ret = platform_device_add_data(pdev, pdata, sizeof(*pdata)); if (ret) { diff --git a/trunk/arch/arm/mach-omap1/usb.c b/trunk/arch/arm/mach-omap1/usb.c index 65f88176fba8..e61afd922766 100644 --- a/trunk/arch/arm/mach-omap1/usb.c +++ b/trunk/arch/arm/mach-omap1/usb.c @@ -27,8 +27,7 @@ #include #include - -#include +#include #include "common.h" @@ -56,119 +55,6 @@ #define INT_USB_IRQ_HGEN INT_USB_HHC_1 #define INT_USB_IRQ_OTG IH2_BASE + 8 -#ifdef CONFIG_ARCH_OMAP_OTG - -void __init -omap_otg_init(struct omap_usb_config *config) -{ - u32 syscon; - int alt_pingroup = 0; - - /* NOTE: no bus or clock setup (yet?) */ - - syscon = omap_readl(OTG_SYSCON_1) & 0xffff; - if (!(syscon & OTG_RESET_DONE)) - pr_debug("USB resets not complete?\n"); - - //omap_writew(0, OTG_IRQ_EN); - - /* pin muxing and transceiver pinouts */ - if (config->pins[0] > 2) /* alt pingroup 2 */ - alt_pingroup = 1; - syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); - syscon |= config->usb1_init(config->pins[1]); - syscon |= config->usb2_init(config->pins[2], alt_pingroup); - pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); - omap_writel(syscon, OTG_SYSCON_1); - - syscon = config->hmc_mode; - syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; -#ifdef CONFIG_USB_OTG - if (config->otg) - syscon |= OTG_EN; -#endif - if (cpu_class_is_omap1()) - pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", - omap_readl(USB_TRANSCEIVER_CTRL)); - pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); - omap_writel(syscon, OTG_SYSCON_2); - - printk("USB: hmc %d", config->hmc_mode); - if (!alt_pingroup) - printk(", usb2 alt %d wires", config->pins[2]); - else if (config->pins[0]) - printk(", usb0 %d wires%s", config->pins[0], - is_usb0_device(config) ? " (dev)" : ""); - if (config->pins[1]) - printk(", usb1 %d wires", config->pins[1]); - if (!alt_pingroup && config->pins[2]) - printk(", usb2 %d wires", config->pins[2]); - if (config->otg) - printk(", Mini-AB on usb%d", config->otg - 1); - printk("\n"); - - if (cpu_class_is_omap1()) { - u16 w; - - /* leave USB clocks/controllers off until needed */ - w = omap_readw(ULPD_SOFT_REQ); - w &= ~SOFT_USB_CLK_REQ; - omap_writew(w, ULPD_SOFT_REQ); - - w = omap_readw(ULPD_CLOCK_CTRL); - w &= ~USB_MCLK_EN; - w |= DIS_USB_PVCI_CLK; - omap_writew(w, ULPD_CLOCK_CTRL); - } - syscon = omap_readl(OTG_SYSCON_1); - syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; - -#ifdef CONFIG_USB_GADGET_OMAP - if (config->otg || config->register_dev) { - struct platform_device *udc_device = config->udc_device; - int status; - - syscon &= ~DEV_IDLE_EN; - udc_device->dev.platform_data = config; - status = platform_device_register(udc_device); - if (status) - pr_debug("can't register UDC device, %d\n", status); - } -#endif - -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) - if (config->otg || config->register_host) { - struct platform_device *ohci_device = config->ohci_device; - int status; - - syscon &= ~HST_IDLE_EN; - ohci_device->dev.platform_data = config; - status = platform_device_register(ohci_device); - if (status) - pr_debug("can't register OHCI device, %d\n", status); - } -#endif - -#ifdef CONFIG_USB_OTG - if (config->otg) { - struct platform_device *otg_device = config->otg_device; - int status; - - syscon &= ~OTG_IDLE_EN; - otg_device->dev.platform_data = config; - status = platform_device_register(otg_device); - if (status) - pr_debug("can't register OTG device, %d\n", status); - } -#endif - pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); - omap_writel(syscon, OTG_SYSCON_1); -} - -#else -void omap_otg_init(struct omap_usb_config *config) {} -#endif - #ifdef CONFIG_USB_GADGET_OMAP static struct resource udc_resources[] = { diff --git a/trunk/arch/arm/mach-omap2/Kconfig b/trunk/arch/arm/mach-omap2/Kconfig index 6c934778357b..4cf5142f22cc 100644 --- a/trunk/arch/arm/mach-omap2/Kconfig +++ b/trunk/arch/arm/mach-omap2/Kconfig @@ -21,16 +21,12 @@ config ARCH_OMAP2PLUS_TYPICAL help Compile a kernel suitable for booting most boards -config SOC_HAS_OMAP2_SDRC - bool "OMAP2 SDRAM Controller support" - config ARCH_OMAP2 bool "TI OMAP2" depends on ARCH_OMAP2PLUS default y select CPU_V6 select MULTI_IRQ_HANDLER - select SOC_HAS_OMAP2_SDRC config ARCH_OMAP3 bool "TI OMAP3" @@ -42,7 +38,6 @@ config ARCH_OMAP3 select PM_OPP if PM select ARM_CPU_SUSPEND if PM select MULTI_IRQ_HANDLER - select SOC_HAS_OMAP2_SDRC config ARCH_OMAP4 bool "TI OMAP4" @@ -69,19 +64,19 @@ config SOC_OMAP2420 depends on ARCH_OMAP2 default y select OMAP_DM_TIMER - select SOC_HAS_OMAP2_SDRC + select ARCH_OMAP_OTG config SOC_OMAP2430 bool "OMAP2430 support" depends on ARCH_OMAP2 default y - select SOC_HAS_OMAP2_SDRC + select ARCH_OMAP_OTG config SOC_OMAP3430 bool "OMAP3430 support" depends on ARCH_OMAP3 default y - select SOC_HAS_OMAP2_SDRC + select ARCH_OMAP_OTG config SOC_TI81XX bool "TI81XX support" @@ -90,10 +85,8 @@ config SOC_TI81XX config SOC_AM33XX bool "AM33XX support" + depends on ARCH_OMAP3 default y - select CPU_V7 - select ARM_CPU_SUSPEND if PM - select MULTI_IRQ_HANDLER config OMAP_PACKAGE_ZAF bool diff --git a/trunk/arch/arm/mach-omap2/Makefile b/trunk/arch/arm/mach-omap2/Makefile index 3e7d54af4c91..fa742f3c2629 100644 --- a/trunk/arch/arm/mach-omap2/Makefile +++ b/trunk/arch/arm/mach-omap2/Makefile @@ -6,7 +6,7 @@ obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o -omap-2-3-common = irq.o +omap-2-3-common = irq.o sdrc.o hwmod-common = omap_hwmod.o \ omap_hwmod_common_data.o clock-common = clock.o clock_common_data.o \ @@ -16,14 +16,12 @@ secure-common = omap-smc.o omap-secure.o obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) -obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) obj-y += mcbsp.o endif obj-$(CONFIG_TWL4030_CORE) += omap_twl.o -obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o # SMP support ONLY available for OMAP4 @@ -92,7 +90,6 @@ obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += prcm.o cminst44xx.o cm44xx.o obj-$(CONFIG_ARCH_OMAP4) += prcm_mpu44xx.o prminst44xx.o obj-$(CONFIG_ARCH_OMAP4) += vc44xx_data.o vp44xx_data.o prm44xx.o -obj-$(CONFIG_SOC_AM33XX) += prcm.o prm33xx.o cm33xx.o # OMAP voltage domains voltagedomain-common := voltage.o vc.o vp.o @@ -102,8 +99,6 @@ obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP3) += voltagedomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += $(voltagedomain-common) -obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o # OMAP powerdomain framework powerdomain-common += powerdomain.o powerdomain-common.o @@ -118,12 +113,10 @@ obj-$(CONFIG_ARCH_OMAP3) += powerdomains2xxx_3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common) obj-$(CONFIG_ARCH_OMAP4) += powerdomain44xx.o obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += $(powerdomain-common) -obj-$(CONFIG_SOC_AM33XX) += powerdomain33xx.o -obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o # PRCM clockdomain control clockdomain-common += clockdomain.o +clockdomain-common += clockdomains_common_data.o obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o @@ -136,9 +129,6 @@ obj-$(CONFIG_ARCH_OMAP3) += clockdomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP4) += clockdomain44xx.o obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common) -obj-$(CONFIG_SOC_AM33XX) += clockdomain33xx.o -obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o # Clock framework obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o @@ -156,8 +146,6 @@ obj-$(CONFIG_ARCH_OMAP3) += dpll3xxx.o clock3xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o -obj-$(CONFIG_SOC_AM33XX) += $(clock-common) dpll3xxx.o -obj-$(CONFIG_SOC_AM33XX) += clock33xx_data.o # OMAP2 clock rate set data (old "OPP" data) obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o @@ -256,6 +244,9 @@ obj-y += $(omap-flash-y) $(omap-flash-m) omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y) + +usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o +obj-y += $(usbfs-m) $(usbfs-y) obj-y += usb-musb.o obj-y += omap_phy_internal.o diff --git a/trunk/arch/arm/mach-omap2/board-2430sdp.c b/trunk/arch/arm/mach-omap2/board-2430sdp.c index 6523aeabf9f2..99ca6bad5c30 100644 --- a/trunk/arch/arm/mach-omap2/board-2430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-2430sdp.c @@ -254,6 +254,16 @@ static struct omap2_hsmmc_info mmc[] __initdata = { {} /* Terminator */ }; +static struct omap_usb_config sdp2430_usb_config __initdata = { + .otg = 1, +#ifdef CONFIG_USB_GADGET_OMAP + .hmc_mode = 0x0, +#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + .hmc_mode = 0x1, +#endif + .pins[0] = 3, +}; + #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -270,6 +280,7 @@ static void __init omap_2430sdp_init(void) omap_serial_init(); omap_sdrc_init(NULL, NULL); omap_hsmmc_init(mmc); + omap2_usbfs_init(&sdp2430_usb_config); omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); usb_musb_init(NULL); diff --git a/trunk/arch/arm/mach-omap2/board-apollon.c b/trunk/arch/arm/mach-omap2/board-apollon.c index 519bcd3079e8..502c31e123be 100644 --- a/trunk/arch/arm/mach-omap2/board-apollon.c +++ b/trunk/arch/arm/mach-omap2/board-apollon.c @@ -35,6 +35,7 @@ #include #include +#include #include #include "common.h" #include @@ -252,6 +253,13 @@ static inline void __init apollon_init_smc91x(void) clk_put(gpmc_fck); } +static struct omap_usb_config apollon_usb_config __initdata = { + .register_dev = 1, + .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ + + .pins[0] = 6, +}; + static struct panel_generic_dpi_data apollon_panel_data = { .name = "apollon", }; @@ -289,6 +297,15 @@ static void __init apollon_led_init(void) gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds)); } +static void __init apollon_usb_init(void) +{ + /* USB device */ + /* DEVICE_SUSPEND */ + omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); + gpio_request_one(12, GPIOF_OUT_INIT_LOW, "USB suspend"); + omap2_usbfs_init(&apollon_usb_config); +} + #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -304,6 +321,7 @@ static void __init omap_apollon_init(void) apollon_init_smc91x(); apollon_led_init(); apollon_flash_init(); + apollon_usb_init(); /* REVISIT: where's the correct place */ omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP); diff --git a/trunk/arch/arm/mach-omap2/board-generic.c b/trunk/arch/arm/mach-omap2/board-generic.c index 2f2abfb82d84..202934657867 100644 --- a/trunk/arch/arm/mach-omap2/board-generic.c +++ b/trunk/arch/arm/mach-omap2/board-generic.c @@ -112,24 +112,6 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") MACHINE_END #endif -#ifdef CONFIG_SOC_AM33XX -static const char *am33xx_boards_compat[] __initdata = { - "ti,am33xx", - NULL, -}; - -DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") - .reserve = omap_reserve, - .map_io = am33xx_map_io, - .init_early = am33xx_init_early, - .init_irq = omap_init_irq, - .handle_irq = omap3_intc_handle_irq, - .init_machine = omap_generic_init, - .timer = &omap3_am33xx_timer, - .dt_compat = am33xx_boards_compat, -MACHINE_END -#endif - #ifdef CONFIG_ARCH_OMAP4 static const char *omap4_boards_compat[] __initdata = { "ti,omap4", diff --git a/trunk/arch/arm/mach-omap2/board-h4.c b/trunk/arch/arm/mach-omap2/board-h4.c index ace20482e3e1..876becf8205a 100644 --- a/trunk/arch/arm/mach-omap2/board-h4.c +++ b/trunk/arch/arm/mach-omap2/board-h4.c @@ -32,6 +32,7 @@ #include #include +#include #include #include "common.h" #include @@ -328,6 +329,17 @@ static void __init h4_init_flash(void) h4_flash_resource.end = base + SZ_64M - 1; } +static struct omap_usb_config h4_usb_config __initdata = { + /* S1.10 OFF -- usb "download port" + * usb0 switched to Mini-B port and isp1105 transceiver; + * S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging + */ + .register_dev = 1, + .pins[0] = 3, +/* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */ + .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */ +}; + static struct at24_platform_data m24c01 = { .byte_len = SZ_1K / 8, .page_size = 16, @@ -369,6 +381,7 @@ static void __init omap_h4_init(void) ARRAY_SIZE(h4_i2c_board_info)); platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); + omap2_usbfs_init(&h4_usb_config); omap_serial_init(); omap_sdrc_init(NULL, NULL); h4_init_flash(); diff --git a/trunk/arch/arm/mach-omap2/board-overo.c b/trunk/arch/arm/mach-omap2/board-overo.c index 8fa2fc3a4c3c..779734d8ba37 100644 --- a/trunk/arch/arm/mach-omap2/board-overo.c +++ b/trunk/arch/arm/mach-omap2/board-overo.c @@ -494,8 +494,8 @@ static void __init overo_init(void) regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap_hsmmc_init(mmc); overo_i2c_init(); + omap_hsmmc_init(mmc); omap_display_init(&overo_dss_data); omap_serial_init(); omap_sdrc_init(mt46h32m32lf6_sdrc_params, diff --git a/trunk/arch/arm/mach-omap2/clock.c b/trunk/arch/arm/mach-omap2/clock.c index ea3f565ba1a4..5c4e66542169 100644 --- a/trunk/arch/arm/mach-omap2/clock.c +++ b/trunk/arch/arm/mach-omap2/clock.c @@ -398,6 +398,24 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) return omap2_clksel_set_parent(clk, new_parent); } +/* OMAP3/4 non-CORE DPLL clkops */ + +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) + +const struct clkops clkops_omap3_noncore_dpll_ops = { + .enable = omap3_noncore_dpll_enable, + .disable = omap3_noncore_dpll_disable, + .allow_idle = omap3_dpll_allow_idle, + .deny_idle = omap3_dpll_deny_idle, +}; + +const struct clkops clkops_omap3_core_dpll_ops = { + .allow_idle = omap3_dpll_allow_idle, + .deny_idle = omap3_dpll_deny_idle, +}; + +#endif + /* * OMAP2+ clock reset and init functions */ diff --git a/trunk/arch/arm/mach-omap2/clock.h b/trunk/arch/arm/mach-omap2/clock.h index 35ec5f3d9a73..a1bb23a23351 100644 --- a/trunk/arch/arm/mach-omap2/clock.h +++ b/trunk/arch/arm/mach-omap2/clock.h @@ -155,18 +155,4 @@ extern const struct clkops clkops_omap3_noncore_dpll_ops; extern const struct clkops clkops_omap3_core_dpll_ops; extern const struct clkops clkops_omap4_dpllmx_ops; -/* clksel_rate blocks shared between OMAP44xx and AM33xx */ -extern const struct clksel_rate div_1_0_rates[]; -extern const struct clksel_rate div_1_1_rates[]; -extern const struct clksel_rate div_1_2_rates[]; -extern const struct clksel_rate div_1_3_rates[]; -extern const struct clksel_rate div_1_4_rates[]; -extern const struct clksel_rate div31_1to31_rates[]; - -/* clocks shared between various OMAP SoCs */ -extern struct clk virt_19200000_ck; -extern struct clk virt_26000000_ck; - -extern int am33xx_clk_init(void); - #endif diff --git a/trunk/arch/arm/mach-omap2/clock2420_data.c b/trunk/arch/arm/mach-omap2/clock2420_data.c index 002745181ad6..bace9308a4db 100644 --- a/trunk/arch/arm/mach-omap2/clock2420_data.c +++ b/trunk/arch/arm/mach-omap2/clock2420_data.c @@ -1774,6 +1774,8 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "osc_ck", &osc_ck, CK_242X), CLK(NULL, "sys_ck", &sys_ck, CK_242X), CLK(NULL, "alt_ck", &alt_ck, CK_242X), + CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_242X), + CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_242X), CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X), /* internal analog sources */ CLK(NULL, "dpll_ck", &dpll_ck, CK_242X), @@ -1782,6 +1784,8 @@ static struct omap_clk omap2420_clks[] = { /* internal prcm root sources */ CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X), CLK(NULL, "core_ck", &core_ck, CK_242X), + CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_242X), + CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_242X), CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X), CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X), CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X), @@ -1897,9 +1901,42 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "pka_ick", &pka_ick, CK_242X), CLK(NULL, "usb_fck", &usb_fck, CK_242X), CLK("musb-hdrc", "fck", &osc_ck, CK_242X), - CLK(NULL, "timer_32k_ck", &func_32k_ck, CK_243X), - CLK(NULL, "timer_sys_ck", &sys_ck, CK_243X), - CLK(NULL, "timer_ext_ck", &alt_ck, CK_243X), + CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X), }; /* diff --git a/trunk/arch/arm/mach-omap2/clock2430_data.c b/trunk/arch/arm/mach-omap2/clock2430_data.c index cacabb070e22..3b4d09a50399 100644 --- a/trunk/arch/arm/mach-omap2/clock2430_data.c +++ b/trunk/arch/arm/mach-omap2/clock2430_data.c @@ -1858,6 +1858,11 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "osc_ck", &osc_ck, CK_243X), CLK(NULL, "sys_ck", &sys_ck, CK_243X), CLK(NULL, "alt_ck", &alt_ck, CK_243X), + CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X), + CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X), + CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X), + CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X), + CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X), CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X), /* internal analog sources */ CLK(NULL, "dpll_ck", &dpll_ck, CK_243X), @@ -1866,6 +1871,11 @@ static struct omap_clk omap2430_clks[] = { /* internal prcm root sources */ CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X), CLK(NULL, "core_ck", &core_ck, CK_243X), + CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X), + CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X), + CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X), + CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X), + CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X), CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X), CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X), CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X), @@ -1990,9 +2000,42 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), - CLK(NULL, "timer_32k_ck", &func_32k_ck, CK_243X), - CLK(NULL, "timer_sys_ck", &sys_ck, CK_243X), - CLK(NULL, "timer_ext_ck", &alt_ck, CK_243X), + CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X), }; /* diff --git a/trunk/arch/arm/mach-omap2/clock33xx_data.c b/trunk/arch/arm/mach-omap2/clock33xx_data.c deleted file mode 100644 index 25bbcc7ca4dc..000000000000 --- a/trunk/arch/arm/mach-omap2/clock33xx_data.c +++ /dev/null @@ -1,1105 +0,0 @@ -/* - * AM33XX Clock data - * - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - * Vaibhav Hiremath - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -#include "iomap.h" -#include "control.h" -#include "clock.h" -#include "cm.h" -#include "cm33xx.h" -#include "cm-regbits-33xx.h" -#include "prm.h" - -/* Maximum DPLL multiplier, divider values for AM33XX */ -#define AM33XX_MAX_DPLL_MULT 2047 -#define AM33XX_MAX_DPLL_DIV 128 - -/* Modulemode control */ -#define AM33XX_MODULEMODE_HWCTRL 0 -#define AM33XX_MODULEMODE_SWCTRL 1 - -/* TRM ERRATA: Timer 3 & 6 default parent (TCLKIN) may not be always - * physically present, in such a case HWMOD enabling of - * clock would be failure with default parent. And timer - * probe thinks clock is already enabled, this leads to - * crash upon accessing timer 3 & 6 registers in probe. - * Fix by setting parent of both these timers to master - * oscillator clock. - */ -static inline void am33xx_init_timer_parent(struct clk *clk) -{ - omap2_clksel_set_parent(clk, clk->parent); -} - -/* Root clocks */ - -/* RTC 32k */ -static struct clk clk_32768_ck = { - .name = "clk_32768_ck", - .clkdm_name = "l4_rtc_clkdm", - .rate = 32768, - .ops = &clkops_null, -}; - -/* On-Chip 32KHz RC OSC */ -static struct clk clk_rc32k_ck = { - .name = "clk_rc32k_ck", - .rate = 32000, - .ops = &clkops_null, -}; - -/* Crystal input clks */ -static struct clk virt_24000000_ck = { - .name = "virt_24000000_ck", - .rate = 24000000, - .ops = &clkops_null, -}; - -static struct clk virt_25000000_ck = { - .name = "virt_25000000_ck", - .rate = 25000000, - .ops = &clkops_null, -}; - -/* Oscillator clock */ -/* 19.2, 24, 25 or 26 MHz */ -static const struct clksel sys_clkin_sel[] = { - { .parent = &virt_19200000_ck, .rates = div_1_0_rates }, - { .parent = &virt_24000000_ck, .rates = div_1_1_rates }, - { .parent = &virt_25000000_ck, .rates = div_1_2_rates }, - { .parent = &virt_26000000_ck, .rates = div_1_3_rates }, - { .parent = NULL }, -}; - -/* External clock - 12 MHz */ -static struct clk tclkin_ck = { - .name = "tclkin_ck", - .rate = 12000000, - .ops = &clkops_null, -}; - -/* - * sys_clk in: input to the dpll and also used as funtional clock for, - * adc_tsc, smartreflex0-1, timer1-7, mcasp0-1, dcan0-1, cefuse - * - */ -static struct clk sys_clkin_ck = { - .name = "sys_clkin_ck", - .parent = &virt_24000000_ck, - .init = &omap2_init_clksel_parent, - .clksel_reg = AM33XX_CTRL_REGADDR(AM33XX_CONTROL_STATUS), - .clksel_mask = AM33XX_CONTROL_STATUS_SYSBOOT1_MASK, - .clksel = sys_clkin_sel, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -/* DPLL_CORE */ -static struct dpll_data dpll_core_dd = { - .mult_div1_reg = AM33XX_CM_CLKSEL_DPLL_CORE, - .clk_bypass = &sys_clkin_ck, - .clk_ref = &sys_clkin_ck, - .control_reg = AM33XX_CM_CLKMODE_DPLL_CORE, - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), - .idlest_reg = AM33XX_CM_IDLEST_DPLL_CORE, - .mult_mask = AM33XX_DPLL_MULT_MASK, - .div1_mask = AM33XX_DPLL_DIV_MASK, - .enable_mask = AM33XX_DPLL_EN_MASK, - .idlest_mask = AM33XX_ST_DPLL_CLK_MASK, - .max_multiplier = AM33XX_MAX_DPLL_MULT, - .max_divider = AM33XX_MAX_DPLL_DIV, - .min_divider = 1, -}; - -/* CLKDCOLDO output */ -static struct clk dpll_core_ck = { - .name = "dpll_core_ck", - .parent = &sys_clkin_ck, - .dpll_data = &dpll_core_dd, - .init = &omap2_init_dpll_parent, - .ops = &clkops_omap3_core_dpll_ops, - .recalc = &omap3_dpll_recalc, -}; - -static struct clk dpll_core_x2_ck = { - .name = "dpll_core_x2_ck", - .parent = &dpll_core_ck, - .flags = CLOCK_CLKOUTX2, - .ops = &clkops_null, - .recalc = &omap3_clkoutx2_recalc, -}; - - -static const struct clksel dpll_core_m4_div[] = { - { .parent = &dpll_core_x2_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_core_m4_ck = { - .name = "dpll_core_m4_ck", - .parent = &dpll_core_x2_ck, - .init = &omap2_init_clksel_parent, - .clksel = dpll_core_m4_div, - .clksel_reg = AM33XX_CM_DIV_M4_DPLL_CORE, - .clksel_mask = AM33XX_HSDIVIDER_CLKOUT1_DIV_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - -static const struct clksel dpll_core_m5_div[] = { - { .parent = &dpll_core_x2_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_core_m5_ck = { - .name = "dpll_core_m5_ck", - .parent = &dpll_core_x2_ck, - .init = &omap2_init_clksel_parent, - .clksel = dpll_core_m5_div, - .clksel_reg = AM33XX_CM_DIV_M5_DPLL_CORE, - .clksel_mask = AM33XX_HSDIVIDER_CLKOUT2_DIV_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - -static const struct clksel dpll_core_m6_div[] = { - { .parent = &dpll_core_x2_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_core_m6_ck = { - .name = "dpll_core_m6_ck", - .parent = &dpll_core_x2_ck, - .init = &omap2_init_clksel_parent, - .clksel = dpll_core_m6_div, - .clksel_reg = AM33XX_CM_DIV_M6_DPLL_CORE, - .clksel_mask = AM33XX_HSDIVIDER_CLKOUT3_DIV_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - -/* DPLL_MPU */ -static struct dpll_data dpll_mpu_dd = { - .mult_div1_reg = AM33XX_CM_CLKSEL_DPLL_MPU, - .clk_bypass = &sys_clkin_ck, - .clk_ref = &sys_clkin_ck, - .control_reg = AM33XX_CM_CLKMODE_DPLL_MPU, - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), - .idlest_reg = AM33XX_CM_IDLEST_DPLL_MPU, - .mult_mask = AM33XX_DPLL_MULT_MASK, - .div1_mask = AM33XX_DPLL_DIV_MASK, - .enable_mask = AM33XX_DPLL_EN_MASK, - .idlest_mask = AM33XX_ST_DPLL_CLK_MASK, - .max_multiplier = AM33XX_MAX_DPLL_MULT, - .max_divider = AM33XX_MAX_DPLL_DIV, - .min_divider = 1, -}; - -/* CLKOUT: fdpll/M2 */ -static struct clk dpll_mpu_ck = { - .name = "dpll_mpu_ck", - .parent = &sys_clkin_ck, - .dpll_data = &dpll_mpu_dd, - .init = &omap2_init_dpll_parent, - .ops = &clkops_omap3_noncore_dpll_ops, - .recalc = &omap3_dpll_recalc, - .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_noncore_dpll_set_rate, -}; - -/* - * TODO: Add clksel here (sys_clkin, CORE_CLKOUTM6, PER_CLKOUTM2 - * and ALT_CLK1/2) - */ -static const struct clksel dpll_mpu_m2_div[] = { - { .parent = &dpll_mpu_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_mpu_m2_ck = { - .name = "dpll_mpu_m2_ck", - .clkdm_name = "mpu_clkdm", - .parent = &dpll_mpu_ck, - .clksel = dpll_mpu_m2_div, - .clksel_reg = AM33XX_CM_DIV_M2_DPLL_MPU, - .clksel_mask = AM33XX_DPLL_CLKOUT_DIV_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - -/* DPLL_DDR */ -static struct dpll_data dpll_ddr_dd = { - .mult_div1_reg = AM33XX_CM_CLKSEL_DPLL_DDR, - .clk_bypass = &sys_clkin_ck, - .clk_ref = &sys_clkin_ck, - .control_reg = AM33XX_CM_CLKMODE_DPLL_DDR, - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), - .idlest_reg = AM33XX_CM_IDLEST_DPLL_DDR, - .mult_mask = AM33XX_DPLL_MULT_MASK, - .div1_mask = AM33XX_DPLL_DIV_MASK, - .enable_mask = AM33XX_DPLL_EN_MASK, - .idlest_mask = AM33XX_ST_DPLL_CLK_MASK, - .max_multiplier = AM33XX_MAX_DPLL_MULT, - .max_divider = AM33XX_MAX_DPLL_DIV, - .min_divider = 1, -}; - -/* CLKOUT: fdpll/M2 */ -static struct clk dpll_ddr_ck = { - .name = "dpll_ddr_ck", - .parent = &sys_clkin_ck, - .dpll_data = &dpll_ddr_dd, - .init = &omap2_init_dpll_parent, - .ops = &clkops_null, - .recalc = &omap3_dpll_recalc, -}; - -/* - * TODO: Add clksel here (sys_clkin, CORE_CLKOUTM6, PER_CLKOUTM2 - * and ALT_CLK1/2) - */ -static const struct clksel dpll_ddr_m2_div[] = { - { .parent = &dpll_ddr_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_ddr_m2_ck = { - .name = "dpll_ddr_m2_ck", - .parent = &dpll_ddr_ck, - .clksel = dpll_ddr_m2_div, - .clksel_reg = AM33XX_CM_DIV_M2_DPLL_DDR, - .clksel_mask = AM33XX_DPLL_CLKOUT_DIV_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - -/* emif_fck functional clock */ -static struct clk dpll_ddr_m2_div2_ck = { - .name = "dpll_ddr_m2_div2_ck", - .clkdm_name = "l3_clkdm", - .parent = &dpll_ddr_m2_ck, - .ops = &clkops_null, - .fixed_div = 2, - .recalc = &omap_fixed_divisor_recalc, -}; - -/* DPLL_DISP */ -static struct dpll_data dpll_disp_dd = { - .mult_div1_reg = AM33XX_CM_CLKSEL_DPLL_DISP, - .clk_bypass = &sys_clkin_ck, - .clk_ref = &sys_clkin_ck, - .control_reg = AM33XX_CM_CLKMODE_DPLL_DISP, - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), - .idlest_reg = AM33XX_CM_IDLEST_DPLL_DISP, - .mult_mask = AM33XX_DPLL_MULT_MASK, - .div1_mask = AM33XX_DPLL_DIV_MASK, - .enable_mask = AM33XX_DPLL_EN_MASK, - .idlest_mask = AM33XX_ST_DPLL_CLK_MASK, - .max_multiplier = AM33XX_MAX_DPLL_MULT, - .max_divider = AM33XX_MAX_DPLL_DIV, - .min_divider = 1, -}; - -/* CLKOUT: fdpll/M2 */ -static struct clk dpll_disp_ck = { - .name = "dpll_disp_ck", - .parent = &sys_clkin_ck, - .dpll_data = &dpll_disp_dd, - .init = &omap2_init_dpll_parent, - .ops = &clkops_null, - .recalc = &omap3_dpll_recalc, - .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_noncore_dpll_set_rate, -}; - -/* - * TODO: Add clksel here (sys_clkin, CORE_CLKOUTM6, PER_CLKOUTM2 - * and ALT_CLK1/2) - */ -static const struct clksel dpll_disp_m2_div[] = { - { .parent = &dpll_disp_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_disp_m2_ck = { - .name = "dpll_disp_m2_ck", - .parent = &dpll_disp_ck, - .clksel = dpll_disp_m2_div, - .clksel_reg = AM33XX_CM_DIV_M2_DPLL_DISP, - .clksel_mask = AM33XX_DPLL_CLKOUT_DIV_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - -/* DPLL_PER */ -static struct dpll_data dpll_per_dd = { - .mult_div1_reg = AM33XX_CM_CLKSEL_DPLL_PERIPH, - .clk_bypass = &sys_clkin_ck, - .clk_ref = &sys_clkin_ck, - .control_reg = AM33XX_CM_CLKMODE_DPLL_PER, - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), - .idlest_reg = AM33XX_CM_IDLEST_DPLL_PER, - .mult_mask = AM33XX_DPLL_MULT_PERIPH_MASK, - .div1_mask = AM33XX_DPLL_PER_DIV_MASK, - .enable_mask = AM33XX_DPLL_EN_MASK, - .idlest_mask = AM33XX_ST_DPLL_CLK_MASK, - .max_multiplier = AM33XX_MAX_DPLL_MULT, - .max_divider = AM33XX_MAX_DPLL_DIV, - .min_divider = 1, - .flags = DPLL_J_TYPE, -}; - -/* CLKDCOLDO */ -static struct clk dpll_per_ck = { - .name = "dpll_per_ck", - .parent = &sys_clkin_ck, - .dpll_data = &dpll_per_dd, - .init = &omap2_init_dpll_parent, - .ops = &clkops_null, - .recalc = &omap3_dpll_recalc, - .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_noncore_dpll_set_rate, -}; - -/* CLKOUT: fdpll/M2 */ -static const struct clksel dpll_per_m2_div[] = { - { .parent = &dpll_per_ck, .rates = div31_1to31_rates }, - { .parent = NULL }, -}; - -static struct clk dpll_per_m2_ck = { - .name = "dpll_per_m2_ck", - .parent = &dpll_per_ck, - .clksel = dpll_per_m2_div, - .clksel_reg = AM33XX_CM_DIV_M2_DPLL_PER, - .clksel_mask = AM33XX_DPLL_CLKOUT_DIV_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - -static struct clk dpll_per_m2_div4_wkupdm_ck = { - .name = "dpll_per_m2_div4_wkupdm_ck", - .clkdm_name = "l4_wkup_clkdm", - .parent = &dpll_per_m2_ck, - .fixed_div = 4, - .ops = &clkops_null, - .recalc = &omap_fixed_divisor_recalc, -}; - -static struct clk dpll_per_m2_div4_ck = { - .name = "dpll_per_m2_div4_ck", - .clkdm_name = "l4ls_clkdm", - .parent = &dpll_per_m2_ck, - .fixed_div = 4, - .ops = &clkops_null, - .recalc = &omap_fixed_divisor_recalc, -}; - -static struct clk l3_gclk = { - .name = "l3_gclk", - .clkdm_name = "l3_clkdm", - .parent = &dpll_core_m4_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk dpll_core_m4_div2_ck = { - .name = "dpll_core_m4_div2_ck", - .clkdm_name = "l4_wkup_clkdm", - .parent = &dpll_core_m4_ck, - .ops = &clkops_null, - .fixed_div = 2, - .recalc = &omap_fixed_divisor_recalc, -}; - -static struct clk l4_rtc_gclk = { - .name = "l4_rtc_gclk", - .parent = &dpll_core_m4_ck, - .ops = &clkops_null, - .fixed_div = 2, - .recalc = &omap_fixed_divisor_recalc, -}; - -static struct clk clk_24mhz = { - .name = "clk_24mhz", - .parent = &dpll_per_m2_ck, - .fixed_div = 8, - .ops = &clkops_null, - .recalc = &omap_fixed_divisor_recalc, -}; - -/* - * Below clock nodes describes clockdomains derived out - * of core clock. - */ -static struct clk l4hs_gclk = { - .name = "l4hs_gclk", - .clkdm_name = "l4hs_clkdm", - .parent = &dpll_core_m4_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk l3s_gclk = { - .name = "l3s_gclk", - .clkdm_name = "l3s_clkdm", - .parent = &dpll_core_m4_div2_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk l4fw_gclk = { - .name = "l4fw_gclk", - .clkdm_name = "l4fw_clkdm", - .parent = &dpll_core_m4_div2_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk l4ls_gclk = { - .name = "l4ls_gclk", - .clkdm_name = "l4ls_clkdm", - .parent = &dpll_core_m4_div2_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk sysclk_div_ck = { - .name = "sysclk_div_ck", - .parent = &dpll_core_m4_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -/* - * In order to match the clock domain with hwmod clockdomain entry, - * separate clock nodes is required for the modules which are - * directly getting their funtioncal clock from sys_clkin. - */ -static struct clk adc_tsc_fck = { - .name = "adc_tsc_fck", - .clkdm_name = "l4_wkup_clkdm", - .parent = &sys_clkin_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk dcan0_fck = { - .name = "dcan0_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk dcan1_fck = { - .name = "dcan1_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk mcasp0_fck = { - .name = "mcasp0_fck", - .clkdm_name = "l3s_clkdm", - .parent = &sys_clkin_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk mcasp1_fck = { - .name = "mcasp1_fck", - .clkdm_name = "l3s_clkdm", - .parent = &sys_clkin_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk smartreflex0_fck = { - .name = "smartreflex0_fck", - .clkdm_name = "l4_wkup_clkdm", - .parent = &sys_clkin_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk smartreflex1_fck = { - .name = "smartreflex1_fck", - .clkdm_name = "l4_wkup_clkdm", - .parent = &sys_clkin_ck, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -/* - * Modules clock nodes - * - * The following clock leaf nodes are added for the moment because: - * - * - hwmod data is not present for these modules, either hwmod - * control is not required or its not populated. - * - Driver code is not yet migrated to use hwmod/runtime pm - * - Modules outside kernel access (to disable them by default) - * - * - debugss - * - mmu (gfx domain) - * - cefuse - * - usbotg_fck (its additional clock and not really a modulemode) - * - ieee5000 - */ -static struct clk debugss_ick = { - .name = "debugss_ick", - .clkdm_name = "l3_aon_clkdm", - .parent = &dpll_core_m4_ck, - .ops = &clkops_omap2_dflt, - .enable_reg = AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, - .enable_bit = AM33XX_MODULEMODE_SWCTRL, - .recalc = &followparent_recalc, -}; - -static struct clk mmu_fck = { - .name = "mmu_fck", - .clkdm_name = "gfx_l3_clkdm", - .parent = &dpll_core_m4_ck, - .ops = &clkops_omap2_dflt, - .enable_reg = AM33XX_CM_GFX_MMUDATA_CLKCTRL, - .enable_bit = AM33XX_MODULEMODE_SWCTRL, - .recalc = &followparent_recalc, -}; - -static struct clk cefuse_fck = { - .name = "cefuse_fck", - .clkdm_name = "l4_cefuse_clkdm", - .parent = &sys_clkin_ck, - .enable_reg = AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL, - .enable_bit = AM33XX_MODULEMODE_SWCTRL, - .ops = &clkops_omap2_dflt, - .recalc = &followparent_recalc, -}; - -/* - * clkdiv32 is generated from fixed division of 732.4219 - */ -static struct clk clkdiv32k_ick = { - .name = "clkdiv32k_ick", - .clkdm_name = "clk_24mhz_clkdm", - .rate = 32768, - .parent = &clk_24mhz, - .enable_reg = AM33XX_CM_PER_CLKDIV32K_CLKCTRL, - .enable_bit = AM33XX_MODULEMODE_SWCTRL, - .ops = &clkops_omap2_dflt, -}; - -static struct clk usbotg_fck = { - .name = "usbotg_fck", - .clkdm_name = "l3s_clkdm", - .parent = &dpll_per_ck, - .enable_reg = AM33XX_CM_CLKDCOLDO_DPLL_PER, - .enable_bit = AM33XX_ST_DPLL_CLKDCOLDO_SHIFT, - .ops = &clkops_omap2_dflt, - .recalc = &followparent_recalc, -}; - -static struct clk ieee5000_fck = { - .name = "ieee5000_fck", - .clkdm_name = "l3s_clkdm", - .parent = &dpll_core_m4_div2_ck, - .enable_reg = AM33XX_CM_PER_IEEE5000_CLKCTRL, - .enable_bit = AM33XX_MODULEMODE_SWCTRL, - .ops = &clkops_omap2_dflt, - .recalc = &followparent_recalc, -}; - -/* Timers */ -static const struct clksel timer1_clkmux_sel[] = { - { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, - { .parent = &clkdiv32k_ick, .rates = div_1_1_rates }, - { .parent = &tclkin_ck, .rates = div_1_2_rates }, - { .parent = &clk_rc32k_ck, .rates = div_1_3_rates }, - { .parent = &clk_32768_ck, .rates = div_1_4_rates }, - { .parent = NULL }, -}; - -static struct clk timer1_fck = { - .name = "timer1_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .clksel = timer1_clkmux_sel, - .clksel_reg = AM33XX_CLKSEL_TIMER1MS_CLK, - .clksel_mask = AM33XX_CLKSEL_0_2_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -static const struct clksel timer2_to_7_clk_sel[] = { - { .parent = &tclkin_ck, .rates = div_1_0_rates }, - { .parent = &sys_clkin_ck, .rates = div_1_1_rates }, - { .parent = &clkdiv32k_ick, .rates = div_1_2_rates }, - { .parent = NULL }, -}; - -static struct clk timer2_fck = { - .name = "timer2_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .clksel = timer2_to_7_clk_sel, - .clksel_reg = AM33XX_CLKSEL_TIMER2_CLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -static struct clk timer3_fck = { - .name = "timer3_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .init = &am33xx_init_timer_parent, - .clksel = timer2_to_7_clk_sel, - .clksel_reg = AM33XX_CLKSEL_TIMER3_CLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -static struct clk timer4_fck = { - .name = "timer4_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .clksel = timer2_to_7_clk_sel, - .clksel_reg = AM33XX_CLKSEL_TIMER4_CLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -static struct clk timer5_fck = { - .name = "timer5_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .clksel = timer2_to_7_clk_sel, - .clksel_reg = AM33XX_CLKSEL_TIMER5_CLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -static struct clk timer6_fck = { - .name = "timer6_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .init = &am33xx_init_timer_parent, - .clksel = timer2_to_7_clk_sel, - .clksel_reg = AM33XX_CLKSEL_TIMER6_CLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -static struct clk timer7_fck = { - .name = "timer7_fck", - .clkdm_name = "l4ls_clkdm", - .parent = &sys_clkin_ck, - .init = &omap2_init_clksel_parent, - .clksel = timer2_to_7_clk_sel, - .clksel_reg = AM33XX_CLKSEL_TIMER7_CLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -static struct clk cpsw_125mhz_gclk = { - .name = "cpsw_125mhz_gclk", - .clkdm_name = "cpsw_125mhz_clkdm", - .parent = &dpll_core_m5_ck, - .ops = &clkops_null, - .fixed_div = 2, - .recalc = &omap_fixed_divisor_recalc, -}; - -static const struct clksel cpsw_cpts_rft_clkmux_sel[] = { - { .parent = &dpll_core_m5_ck, .rates = div_1_0_rates }, - { .parent = &dpll_core_m4_ck, .rates = div_1_1_rates }, - { .parent = NULL }, -}; - -static struct clk cpsw_cpts_rft_clk = { - .name = "cpsw_cpts_rft_clk", - .clkdm_name = "cpsw_125mhz_clkdm", - .parent = &dpll_core_m5_ck, - .clksel = cpsw_cpts_rft_clkmux_sel, - .clksel_reg = AM33XX_CM_CPTS_RFT_CLKSEL, - .clksel_mask = AM33XX_CLKSEL_0_0_MASK, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -/* gpio */ -static const struct clksel gpio0_dbclk_mux_sel[] = { - { .parent = &clk_rc32k_ck, .rates = div_1_0_rates }, - { .parent = &clk_32768_ck, .rates = div_1_1_rates }, - { .parent = &clkdiv32k_ick, .rates = div_1_2_rates }, - { .parent = NULL }, -}; - -static struct clk gpio0_dbclk_mux_ck = { - .name = "gpio0_dbclk_mux_ck", - .clkdm_name = "l4_wkup_clkdm", - .parent = &clk_rc32k_ck, - .init = &omap2_init_clksel_parent, - .clksel = gpio0_dbclk_mux_sel, - .clksel_reg = AM33XX_CLKSEL_GPIO0_DBCLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -static struct clk gpio0_dbclk = { - .name = "gpio0_dbclk", - .clkdm_name = "l4_wkup_clkdm", - .parent = &gpio0_dbclk_mux_ck, - .enable_reg = AM33XX_CM_WKUP_GPIO0_CLKCTRL, - .enable_bit = AM33XX_OPTFCLKEN_GPIO0_GDBCLK_SHIFT, - .ops = &clkops_omap2_dflt, - .recalc = &followparent_recalc, -}; - -static struct clk gpio1_dbclk = { - .name = "gpio1_dbclk", - .clkdm_name = "l4ls_clkdm", - .parent = &clkdiv32k_ick, - .enable_reg = AM33XX_CM_PER_GPIO1_CLKCTRL, - .enable_bit = AM33XX_OPTFCLKEN_GPIO_1_GDBCLK_SHIFT, - .ops = &clkops_omap2_dflt, - .recalc = &followparent_recalc, -}; - -static struct clk gpio2_dbclk = { - .name = "gpio2_dbclk", - .clkdm_name = "l4ls_clkdm", - .parent = &clkdiv32k_ick, - .enable_reg = AM33XX_CM_PER_GPIO2_CLKCTRL, - .enable_bit = AM33XX_OPTFCLKEN_GPIO_2_GDBCLK_SHIFT, - .ops = &clkops_omap2_dflt, - .recalc = &followparent_recalc, -}; - -static struct clk gpio3_dbclk = { - .name = "gpio3_dbclk", - .clkdm_name = "l4ls_clkdm", - .parent = &clkdiv32k_ick, - .enable_reg = AM33XX_CM_PER_GPIO3_CLKCTRL, - .enable_bit = AM33XX_OPTFCLKEN_GPIO_3_GDBCLK_SHIFT, - .ops = &clkops_omap2_dflt, - .recalc = &followparent_recalc, -}; - -static const struct clksel pruss_ocp_clk_mux_sel[] = { - { .parent = &l3_gclk, .rates = div_1_0_rates }, - { .parent = &dpll_disp_m2_ck, .rates = div_1_1_rates }, - { .parent = NULL }, -}; - -static struct clk pruss_ocp_gclk = { - .name = "pruss_ocp_gclk", - .clkdm_name = "pruss_ocp_clkdm", - .parent = &l3_gclk, - .init = &omap2_init_clksel_parent, - .clksel = pruss_ocp_clk_mux_sel, - .clksel_reg = AM33XX_CLKSEL_PRUSS_OCP_CLK, - .clksel_mask = AM33XX_CLKSEL_0_0_MASK, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static const struct clksel lcd_clk_mux_sel[] = { - { .parent = &dpll_disp_m2_ck, .rates = div_1_0_rates }, - { .parent = &dpll_core_m5_ck, .rates = div_1_1_rates }, - { .parent = &dpll_per_m2_ck, .rates = div_1_2_rates }, - { .parent = NULL }, -}; - -static struct clk lcd_gclk = { - .name = "lcd_gclk", - .clkdm_name = "lcdc_clkdm", - .parent = &dpll_disp_m2_ck, - .init = &omap2_init_clksel_parent, - .clksel = lcd_clk_mux_sel, - .clksel_reg = AM33XX_CLKSEL_LCDC_PIXEL_CLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static struct clk mmc_clk = { - .name = "mmc_clk", - .clkdm_name = "l4ls_clkdm", - .parent = &dpll_per_m2_ck, - .ops = &clkops_null, - .fixed_div = 2, - .recalc = &omap_fixed_divisor_recalc, -}; - -static struct clk mmc2_fck = { - .name = "mmc2_fck", - .clkdm_name = "l3s_clkdm", - .parent = &mmc_clk, - .ops = &clkops_null, - .recalc = &followparent_recalc, -}; - -static const struct clksel gfx_clksel_sel[] = { - { .parent = &dpll_core_m4_ck, .rates = div_1_0_rates }, - { .parent = &dpll_per_m2_ck, .rates = div_1_1_rates }, - { .parent = NULL }, -}; - -static struct clk gfx_fclk_clksel_ck = { - .name = "gfx_fclk_clksel_ck", - .parent = &dpll_core_m4_ck, - .clksel = gfx_clksel_sel, - .ops = &clkops_null, - .clksel_reg = AM33XX_CLKSEL_GFX_FCLK, - .clksel_mask = AM33XX_CLKSEL_GFX_FCLK_MASK, - .recalc = &omap2_clksel_recalc, -}; - -static const struct clksel_rate div_1_0_2_1_rates[] = { - { .div = 1, .val = 0, .flags = RATE_IN_AM33XX }, - { .div = 2, .val = 1, .flags = RATE_IN_AM33XX }, - { .div = 0 }, -}; - -static const struct clksel gfx_div_sel[] = { - { .parent = &gfx_fclk_clksel_ck, .rates = div_1_0_2_1_rates }, - { .parent = NULL }, -}; - -static struct clk gfx_fck_div_ck = { - .name = "gfx_fck_div_ck", - .clkdm_name = "gfx_l3_clkdm", - .parent = &gfx_fclk_clksel_ck, - .init = &omap2_init_clksel_parent, - .clksel = gfx_div_sel, - .clksel_reg = AM33XX_CLKSEL_GFX_FCLK, - .clksel_mask = AM33XX_CLKSEL_0_0_MASK, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, - .ops = &clkops_null, -}; - -static const struct clksel sysclkout_pre_sel[] = { - { .parent = &clk_32768_ck, .rates = div_1_0_rates }, - { .parent = &l3_gclk, .rates = div_1_1_rates }, - { .parent = &dpll_ddr_m2_ck, .rates = div_1_2_rates }, - { .parent = &dpll_per_m2_ck, .rates = div_1_3_rates }, - { .parent = &lcd_gclk, .rates = div_1_4_rates }, - { .parent = NULL }, -}; - -static struct clk sysclkout_pre_ck = { - .name = "sysclkout_pre_ck", - .parent = &clk_32768_ck, - .init = &omap2_init_clksel_parent, - .clksel = sysclkout_pre_sel, - .clksel_reg = AM33XX_CM_CLKOUT_CTRL, - .clksel_mask = AM33XX_CLKOUT2SOURCE_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -/* Divide by 8 clock rates with default clock is 1/1*/ -static const struct clksel_rate div8_rates[] = { - { .div = 1, .val = 0, .flags = RATE_IN_AM33XX }, - { .div = 2, .val = 1, .flags = RATE_IN_AM33XX }, - { .div = 3, .val = 2, .flags = RATE_IN_AM33XX }, - { .div = 4, .val = 3, .flags = RATE_IN_AM33XX }, - { .div = 5, .val = 4, .flags = RATE_IN_AM33XX }, - { .div = 6, .val = 5, .flags = RATE_IN_AM33XX }, - { .div = 7, .val = 6, .flags = RATE_IN_AM33XX }, - { .div = 8, .val = 7, .flags = RATE_IN_AM33XX }, - { .div = 0 }, -}; - -static const struct clksel clkout2_div[] = { - { .parent = &sysclkout_pre_ck, .rates = div8_rates }, - { .parent = NULL }, -}; - -static struct clk clkout2_ck = { - .name = "clkout2_ck", - .parent = &sysclkout_pre_ck, - .ops = &clkops_omap2_dflt, - .clksel = clkout2_div, - .clksel_reg = AM33XX_CM_CLKOUT_CTRL, - .clksel_mask = AM33XX_CLKOUT2DIV_MASK, - .enable_reg = AM33XX_CM_CLKOUT_CTRL, - .enable_bit = AM33XX_CLKOUT2EN_SHIFT, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate, -}; - -static const struct clksel wdt_clkmux_sel[] = { - { .parent = &clk_rc32k_ck, .rates = div_1_0_rates }, - { .parent = &clkdiv32k_ick, .rates = div_1_1_rates }, - { .parent = NULL }, -}; - -static struct clk wdt1_fck = { - .name = "wdt1_fck", - .clkdm_name = "l4_wkup_clkdm", - .parent = &clk_rc32k_ck, - .init = &omap2_init_clksel_parent, - .clksel = wdt_clkmux_sel, - .clksel_reg = AM33XX_CLKSEL_WDT1_CLK, - .clksel_mask = AM33XX_CLKSEL_0_1_MASK, - .ops = &clkops_null, - .recalc = &omap2_clksel_recalc, -}; - -/* - * clkdev - */ -static struct omap_clk am33xx_clks[] = { - CLK(NULL, "clk_32768_ck", &clk_32768_ck, CK_AM33XX), - CLK(NULL, "clk_rc32k_ck", &clk_rc32k_ck, CK_AM33XX), - CLK(NULL, "virt_19200000_ck", &virt_19200000_ck, CK_AM33XX), - CLK(NULL, "virt_24000000_ck", &virt_24000000_ck, CK_AM33XX), - CLK(NULL, "virt_25000000_ck", &virt_25000000_ck, CK_AM33XX), - CLK(NULL, "virt_26000000_ck", &virt_26000000_ck, CK_AM33XX), - CLK(NULL, "sys_clkin_ck", &sys_clkin_ck, CK_AM33XX), - CLK(NULL, "tclkin_ck", &tclkin_ck, CK_AM33XX), - CLK(NULL, "dpll_core_ck", &dpll_core_ck, CK_AM33XX), - CLK(NULL, "dpll_core_x2_ck", &dpll_core_x2_ck, CK_AM33XX), - CLK(NULL, "dpll_core_m4_ck", &dpll_core_m4_ck, CK_AM33XX), - CLK(NULL, "dpll_core_m5_ck", &dpll_core_m5_ck, CK_AM33XX), - CLK(NULL, "dpll_core_m6_ck", &dpll_core_m6_ck, CK_AM33XX), - CLK(NULL, "dpll_mpu_ck", &dpll_mpu_ck, CK_AM33XX), - CLK(NULL, "dpll_mpu_m2_ck", &dpll_mpu_m2_ck, CK_AM33XX), - CLK(NULL, "dpll_ddr_ck", &dpll_ddr_ck, CK_AM33XX), - CLK(NULL, "dpll_ddr_m2_ck", &dpll_ddr_m2_ck, CK_AM33XX), - CLK(NULL, "dpll_ddr_m2_div2_ck", &dpll_ddr_m2_div2_ck, CK_AM33XX), - CLK(NULL, "dpll_disp_ck", &dpll_disp_ck, CK_AM33XX), - CLK(NULL, "dpll_disp_m2_ck", &dpll_disp_m2_ck, CK_AM33XX), - CLK(NULL, "dpll_per_ck", &dpll_per_ck, CK_AM33XX), - CLK(NULL, "dpll_per_m2_ck", &dpll_per_m2_ck, CK_AM33XX), - CLK(NULL, "dpll_per_m2_div4_wkupdm_ck", &dpll_per_m2_div4_wkupdm_ck, CK_AM33XX), - CLK(NULL, "dpll_per_m2_div4_ck", &dpll_per_m2_div4_ck, CK_AM33XX), - CLK(NULL, "adc_tsc_fck", &adc_tsc_fck, CK_AM33XX), - CLK(NULL, "cefuse_fck", &cefuse_fck, CK_AM33XX), - CLK(NULL, "clkdiv32k_ick", &clkdiv32k_ick, CK_AM33XX), - CLK(NULL, "dcan0_fck", &dcan0_fck, CK_AM33XX), - CLK(NULL, "dcan1_fck", &dcan1_fck, CK_AM33XX), - CLK(NULL, "debugss_ick", &debugss_ick, CK_AM33XX), - CLK(NULL, "pruss_ocp_gclk", &pruss_ocp_gclk, CK_AM33XX), - CLK("davinci-mcasp.0", NULL, &mcasp0_fck, CK_AM33XX), - CLK("davinci-mcasp.1", NULL, &mcasp1_fck, CK_AM33XX), - CLK("NULL", "mmc2_fck", &mmc2_fck, CK_AM33XX), - CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), - CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX), - CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX), - CLK(NULL, "gpt1_fck", &timer1_fck, CK_AM33XX), - CLK(NULL, "gpt2_fck", &timer2_fck, CK_AM33XX), - CLK(NULL, "gpt3_fck", &timer3_fck, CK_AM33XX), - CLK(NULL, "gpt4_fck", &timer4_fck, CK_AM33XX), - CLK(NULL, "gpt5_fck", &timer5_fck, CK_AM33XX), - CLK(NULL, "gpt6_fck", &timer6_fck, CK_AM33XX), - CLK(NULL, "gpt7_fck", &timer7_fck, CK_AM33XX), - CLK(NULL, "usbotg_fck", &usbotg_fck, CK_AM33XX), - CLK(NULL, "ieee5000_fck", &ieee5000_fck, CK_AM33XX), - CLK(NULL, "wdt1_fck", &wdt1_fck, CK_AM33XX), - CLK(NULL, "l4_rtc_gclk", &l4_rtc_gclk, CK_AM33XX), - CLK(NULL, "l3_gclk", &l3_gclk, CK_AM33XX), - CLK(NULL, "dpll_core_m4_div2_ck", &dpll_core_m4_div2_ck, CK_AM33XX), - CLK(NULL, "l4hs_gclk", &l4hs_gclk, CK_AM33XX), - CLK(NULL, "l3s_gclk", &l3s_gclk, CK_AM33XX), - CLK(NULL, "l4fw_gclk", &l4fw_gclk, CK_AM33XX), - CLK(NULL, "l4ls_gclk", &l4ls_gclk, CK_AM33XX), - CLK(NULL, "clk_24mhz", &clk_24mhz, CK_AM33XX), - CLK(NULL, "sysclk_div_ck", &sysclk_div_ck, CK_AM33XX), - CLK(NULL, "cpsw_125mhz_gclk", &cpsw_125mhz_gclk, CK_AM33XX), - CLK(NULL, "cpsw_cpts_rft_clk", &cpsw_cpts_rft_clk, CK_AM33XX), - CLK(NULL, "gpio0_dbclk_mux_ck", &gpio0_dbclk_mux_ck, CK_AM33XX), - CLK(NULL, "gpio0_dbclk", &gpio0_dbclk, CK_AM33XX), - CLK(NULL, "gpio1_dbclk", &gpio1_dbclk, CK_AM33XX), - CLK(NULL, "gpio2_dbclk", &gpio2_dbclk, CK_AM33XX), - CLK(NULL, "gpio3_dbclk", &gpio3_dbclk, CK_AM33XX), - CLK(NULL, "lcd_gclk", &lcd_gclk, CK_AM33XX), - CLK(NULL, "mmc_clk", &mmc_clk, CK_AM33XX), - CLK(NULL, "gfx_fclk_clksel_ck", &gfx_fclk_clksel_ck, CK_AM33XX), - CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX), - CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX), - CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX), -}; - -int __init am33xx_clk_init(void) -{ - struct omap_clk *c; - u32 cpu_clkflg; - - if (soc_is_am33xx()) { - cpu_mask = RATE_IN_AM33XX; - cpu_clkflg = CK_AM33XX; - } - - clk_init(&omap2_clk_functions); - - for (c = am33xx_clks; c < am33xx_clks + ARRAY_SIZE(am33xx_clks); c++) - clk_preinit(c->lk.clk); - - for (c = am33xx_clks; c < am33xx_clks + ARRAY_SIZE(am33xx_clks); c++) { - if (c->cpu & cpu_clkflg) { - clkdev_add(&c->lk); - clk_register(c->lk.clk); - omap2_init_clk_clkdm(c->lk.clk); - } - } - - recalculate_root_clocks(); - - /* - * Only enable those clocks we will need, let the drivers - * enable other clocks as necessary - */ - clk_enable_init_clocks(); - - return 0; -} diff --git a/trunk/arch/arm/mach-omap2/clock3xxx_data.c b/trunk/arch/arm/mach-omap2/clock3xxx_data.c index 095a133128eb..1efdec236ae8 100644 --- a/trunk/arch/arm/mach-omap2/clock3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/clock3xxx_data.c @@ -93,6 +93,18 @@ static struct clk virt_16_8m_ck = { .rate = 16800000, }; +static struct clk virt_19_2m_ck = { + .name = "virt_19_2m_ck", + .ops = &clkops_null, + .rate = 19200000, +}; + +static struct clk virt_26m_ck = { + .name = "virt_26m_ck", + .ops = &clkops_null, + .rate = 26000000, +}; + static struct clk virt_38_4m_ck = { .name = "virt_38_4m_ck", .ops = &clkops_null, @@ -133,8 +145,8 @@ static const struct clksel osc_sys_clksel[] = { { .parent = &virt_12m_ck, .rates = osc_sys_12m_rates }, { .parent = &virt_13m_ck, .rates = osc_sys_13m_rates }, { .parent = &virt_16_8m_ck, .rates = osc_sys_16_8m_rates }, - { .parent = &virt_19200000_ck, .rates = osc_sys_19_2m_rates }, - { .parent = &virt_26000000_ck, .rates = osc_sys_26m_rates }, + { .parent = &virt_19_2m_ck, .rates = osc_sys_19_2m_rates }, + { .parent = &virt_26m_ck, .rates = osc_sys_26m_rates }, { .parent = &virt_38_4m_ck, .rates = osc_sys_38_4m_rates }, { .parent = NULL }, }; @@ -3218,12 +3230,17 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_3XXX), CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_3XXX), CLK(NULL, "virt_16_8m_ck", &virt_16_8m_ck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK(NULL, "virt_19200000_ck", &virt_19200000_ck, CK_3XXX), - CLK(NULL, "virt_26000000_ck", &virt_26000000_ck, CK_3XXX), + CLK(NULL, "virt_19_2m_ck", &virt_19_2m_ck, CK_3XXX), + CLK(NULL, "virt_26m_ck", &virt_26m_ck, CK_3XXX), CLK(NULL, "virt_38_4m_ck", &virt_38_4m_ck, CK_3XXX), CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX), + CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX), CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX), CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX), CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX), @@ -3290,6 +3307,8 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), + CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), + CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), @@ -3394,6 +3413,9 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX), CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX), CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX), + CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX), + CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX), + CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX), CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX), CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), @@ -3460,8 +3482,30 @@ static struct omap_clk omap3xxx_clks[] = { CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX), CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX), CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX), - CLK(NULL, "timer_32k_ck", &omap_32k_fck, CK_3XXX), - CLK(NULL, "timer_sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.4", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.5", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.6", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.7", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.8", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.9", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.10", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.11", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.12", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_3XXX), }; @@ -3479,7 +3523,7 @@ int __init omap3xxx_clk_init(void) } else if (cpu_is_ti816x()) { cpu_mask = RATE_IN_TI816X; cpu_clkflg = CK_TI816X; - } else if (soc_is_am33xx()) { + } else if (cpu_is_am33xx()) { cpu_mask = RATE_IN_AM33XX; } else if (cpu_is_ti814x()) { cpu_mask = RATE_IN_TI814X; diff --git a/trunk/arch/arm/mach-omap2/clock44xx_data.c b/trunk/arch/arm/mach-omap2/clock44xx_data.c index d7f55e43b761..ba6f9a0a43e9 100644 --- a/trunk/arch/arm/mach-omap2/clock44xx_data.c +++ b/trunk/arch/arm/mach-omap2/clock44xx_data.c @@ -107,6 +107,18 @@ static struct clk virt_16800000_ck = { .rate = 16800000, }; +static struct clk virt_19200000_ck = { + .name = "virt_19200000_ck", + .ops = &clkops_null, + .rate = 19200000, +}; + +static struct clk virt_26000000_ck = { + .name = "virt_26000000_ck", + .ops = &clkops_null, + .rate = 26000000, +}; + static struct clk virt_27000000_ck = { .name = "virt_27000000_ck", .ops = &clkops_null, @@ -119,6 +131,31 @@ static struct clk virt_38400000_ck = { .rate = 38400000, }; +static const struct clksel_rate div_1_0_rates[] = { + { .div = 1, .val = 0, .flags = RATE_IN_4430 }, + { .div = 0 }, +}; + +static const struct clksel_rate div_1_1_rates[] = { + { .div = 1, .val = 1, .flags = RATE_IN_4430 }, + { .div = 0 }, +}; + +static const struct clksel_rate div_1_2_rates[] = { + { .div = 1, .val = 2, .flags = RATE_IN_4430 }, + { .div = 0 }, +}; + +static const struct clksel_rate div_1_3_rates[] = { + { .div = 1, .val = 3, .flags = RATE_IN_4430 }, + { .div = 0 }, +}; + +static const struct clksel_rate div_1_4_rates[] = { + { .div = 1, .val = 4, .flags = RATE_IN_4430 }, + { .div = 0 }, +}; + static const struct clksel_rate div_1_5_rates[] = { { .div = 1, .val = 5, .flags = RATE_IN_4430 }, { .div = 0 }, @@ -252,6 +289,41 @@ static struct clk dpll_abe_x2_ck = { .recalc = &omap3_clkoutx2_recalc, }; +static const struct clksel_rate div31_1to31_rates[] = { + { .div = 1, .val = 1, .flags = RATE_IN_4430 }, + { .div = 2, .val = 2, .flags = RATE_IN_4430 }, + { .div = 3, .val = 3, .flags = RATE_IN_4430 }, + { .div = 4, .val = 4, .flags = RATE_IN_4430 }, + { .div = 5, .val = 5, .flags = RATE_IN_4430 }, + { .div = 6, .val = 6, .flags = RATE_IN_4430 }, + { .div = 7, .val = 7, .flags = RATE_IN_4430 }, + { .div = 8, .val = 8, .flags = RATE_IN_4430 }, + { .div = 9, .val = 9, .flags = RATE_IN_4430 }, + { .div = 10, .val = 10, .flags = RATE_IN_4430 }, + { .div = 11, .val = 11, .flags = RATE_IN_4430 }, + { .div = 12, .val = 12, .flags = RATE_IN_4430 }, + { .div = 13, .val = 13, .flags = RATE_IN_4430 }, + { .div = 14, .val = 14, .flags = RATE_IN_4430 }, + { .div = 15, .val = 15, .flags = RATE_IN_4430 }, + { .div = 16, .val = 16, .flags = RATE_IN_4430 }, + { .div = 17, .val = 17, .flags = RATE_IN_4430 }, + { .div = 18, .val = 18, .flags = RATE_IN_4430 }, + { .div = 19, .val = 19, .flags = RATE_IN_4430 }, + { .div = 20, .val = 20, .flags = RATE_IN_4430 }, + { .div = 21, .val = 21, .flags = RATE_IN_4430 }, + { .div = 22, .val = 22, .flags = RATE_IN_4430 }, + { .div = 23, .val = 23, .flags = RATE_IN_4430 }, + { .div = 24, .val = 24, .flags = RATE_IN_4430 }, + { .div = 25, .val = 25, .flags = RATE_IN_4430 }, + { .div = 26, .val = 26, .flags = RATE_IN_4430 }, + { .div = 27, .val = 27, .flags = RATE_IN_4430 }, + { .div = 28, .val = 28, .flags = RATE_IN_4430 }, + { .div = 29, .val = 29, .flags = RATE_IN_4430 }, + { .div = 30, .val = 30, .flags = RATE_IN_4430 }, + { .div = 31, .val = 31, .flags = RATE_IN_4430 }, + { .div = 0 }, +}; + static const struct clksel dpll_abe_m2x2_div[] = { { .parent = &dpll_abe_x2_ck, .rates = div31_1to31_rates }, { .parent = NULL }, @@ -3227,17 +3299,17 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_443X), CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_443X), CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_443X), - CLK(NULL, "timer1_fck", &timer1_fck, CK_443X), - CLK(NULL, "timer10_fck", &timer10_fck, CK_443X), - CLK(NULL, "timer11_fck", &timer11_fck, CK_443X), - CLK(NULL, "timer2_fck", &timer2_fck, CK_443X), - CLK(NULL, "timer3_fck", &timer3_fck, CK_443X), - CLK(NULL, "timer4_fck", &timer4_fck, CK_443X), - CLK(NULL, "timer5_fck", &timer5_fck, CK_443X), - CLK(NULL, "timer6_fck", &timer6_fck, CK_443X), - CLK(NULL, "timer7_fck", &timer7_fck, CK_443X), - CLK(NULL, "timer8_fck", &timer8_fck, CK_443X), - CLK(NULL, "timer9_fck", &timer9_fck, CK_443X), + CLK(NULL, "gpt1_fck", &timer1_fck, CK_443X), + CLK(NULL, "gpt10_fck", &timer10_fck, CK_443X), + CLK(NULL, "gpt11_fck", &timer11_fck, CK_443X), + CLK(NULL, "gpt2_fck", &timer2_fck, CK_443X), + CLK(NULL, "gpt3_fck", &timer3_fck, CK_443X), + CLK(NULL, "gpt4_fck", &timer4_fck, CK_443X), + CLK(NULL, "gpt5_fck", &timer5_fck, CK_443X), + CLK(NULL, "gpt6_fck", &timer6_fck, CK_443X), + CLK(NULL, "gpt7_fck", &timer7_fck, CK_443X), + CLK(NULL, "gpt8_fck", &timer8_fck, CK_443X), + CLK(NULL, "gpt9_fck", &timer9_fck, CK_443X), CLK(NULL, "uart1_fck", &uart1_fck, CK_443X), CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), @@ -3313,18 +3385,28 @@ static struct omap_clk omap44xx_clks[] = { CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X), CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X), CLK("omap_wdt", "ick", &dummy_ck, CK_443X), - CLK(NULL, "timer_32k_ck", &sys_32k_ck, CK_443X), - CLK("omap_timer.1", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("omap_timer.2", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("omap_timer.3", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("omap_timer.4", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("omap_timer.9", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("omap_timer.10", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("omap_timer.11", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("omap_timer.5", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("omap_timer.6", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("omap_timer.7", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("omap_timer.8", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.4", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.5", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.6", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.7", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.8", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.9", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.10", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.11", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.1", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.2", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.3", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.4", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.9", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.10", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.11", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.5", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.6", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.7", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.8", "sys_ck", &syc_clk_div_ck, CK_443X), }; int __init omap4xxx_clk_init(void) diff --git a/trunk/arch/arm/mach-omap2/clock_common_data.c b/trunk/arch/arm/mach-omap2/clock_common_data.c index b9f3ba68148c..6424d46be14a 100644 --- a/trunk/arch/arm/mach-omap2/clock_common_data.c +++ b/trunk/arch/arm/mach-omap2/clock_common_data.c @@ -43,80 +43,3 @@ const struct clksel_rate dsp_ick_rates[] = { { .div = 3, .val = 3, .flags = RATE_IN_243X }, { .div = 0 }, }; - - -/* clksel_rate blocks shared between OMAP44xx and AM33xx */ - -const struct clksel_rate div_1_0_rates[] = { - { .div = 1, .val = 0, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 0 }, -}; - -const struct clksel_rate div_1_1_rates[] = { - { .div = 1, .val = 1, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 0 }, -}; - -const struct clksel_rate div_1_2_rates[] = { - { .div = 1, .val = 2, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 0 }, -}; - -const struct clksel_rate div_1_3_rates[] = { - { .div = 1, .val = 3, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 0 }, -}; - -const struct clksel_rate div_1_4_rates[] = { - { .div = 1, .val = 4, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 0 }, -}; - -const struct clksel_rate div31_1to31_rates[] = { - { .div = 1, .val = 1, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 2, .val = 2, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 3, .val = 3, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 4, .val = 4, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 5, .val = 5, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 6, .val = 6, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 7, .val = 7, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 8, .val = 8, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 9, .val = 9, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 10, .val = 10, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 11, .val = 11, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 12, .val = 12, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 13, .val = 13, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 14, .val = 14, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 15, .val = 15, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 16, .val = 16, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 17, .val = 17, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 18, .val = 18, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 19, .val = 19, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 20, .val = 20, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 21, .val = 21, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 22, .val = 22, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 23, .val = 23, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 24, .val = 24, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 25, .val = 25, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 26, .val = 26, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 27, .val = 27, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 28, .val = 28, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 29, .val = 29, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 30, .val = 30, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 31, .val = 31, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, - { .div = 0 }, -}; - -/* Clocks shared between various OMAP SoCs */ - -struct clk virt_19200000_ck = { - .name = "virt_19200000_ck", - .ops = &clkops_null, - .rate = 19200000, -}; - -struct clk virt_26000000_ck = { - .name = "virt_26000000_ck", - .ops = &clkops_null, - .rate = 26000000, -}; diff --git a/trunk/arch/arm/mach-omap2/clockdomain.h b/trunk/arch/arm/mach-omap2/clockdomain.h index 0a8c7b67858c..f7b58609bad8 100644 --- a/trunk/arch/arm/mach-omap2/clockdomain.h +++ b/trunk/arch/arm/mach-omap2/clockdomain.h @@ -195,7 +195,6 @@ int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh); extern void __init omap242x_clockdomains_init(void); extern void __init omap243x_clockdomains_init(void); extern void __init omap3xxx_clockdomains_init(void); -extern void __init am33xx_clockdomains_init(void); extern void __init omap44xx_clockdomains_init(void); extern void _clkdm_add_autodeps(struct clockdomain *clkdm); extern void _clkdm_del_autodeps(struct clockdomain *clkdm); @@ -203,10 +202,11 @@ extern void _clkdm_del_autodeps(struct clockdomain *clkdm); extern struct clkdm_ops omap2_clkdm_operations; extern struct clkdm_ops omap3_clkdm_operations; extern struct clkdm_ops omap4_clkdm_operations; -extern struct clkdm_ops am33xx_clkdm_operations; extern struct clkdm_dep gfx_24xx_wkdeps[]; extern struct clkdm_dep dsp_24xx_wkdeps[]; extern struct clockdomain wkup_common_clkdm; +extern struct clockdomain prm_common_clkdm; +extern struct clockdomain cm_common_clkdm; #endif diff --git a/trunk/arch/arm/mach-omap2/clockdomain33xx.c b/trunk/arch/arm/mach-omap2/clockdomain33xx.c deleted file mode 100644 index aca6388fad76..000000000000 --- a/trunk/arch/arm/mach-omap2/clockdomain33xx.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * AM33XX clockdomain control - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * Vaibhav Hiremath - * - * Derived from mach-omap2/clockdomain44xx.c written by Rajendra Nayak - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -#include "clockdomain.h" -#include "cm33xx.h" - - -static int am33xx_clkdm_sleep(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static int am33xx_clkdm_wakeup(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); -} - -static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); -} - -static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - return am33xx_clkdm_wakeup(clkdm); - - return 0; -} - -static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); - - if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) - am33xx_clkdm_sleep(clkdm); - - return 0; -} - -struct clkdm_ops am33xx_clkdm_operations = { - .clkdm_sleep = am33xx_clkdm_sleep, - .clkdm_wakeup = am33xx_clkdm_wakeup, - .clkdm_allow_idle = am33xx_clkdm_allow_idle, - .clkdm_deny_idle = am33xx_clkdm_deny_idle, - .clkdm_clk_enable = am33xx_clkdm_clk_enable, - .clkdm_clk_disable = am33xx_clkdm_clk_disable, -}; diff --git a/trunk/arch/arm/mach-omap2/clockdomain44xx.c b/trunk/arch/arm/mach-omap2/clockdomain44xx.c index 762f2cc542ce..4f04dd11d655 100644 --- a/trunk/arch/arm/mach-omap2/clockdomain44xx.c +++ b/trunk/arch/arm/mach-omap2/clockdomain44xx.c @@ -70,7 +70,7 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) static int omap4_clkdm_sleep(struct clockdomain *clkdm) { - omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, + omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition, clkdm->cm_inst, clkdm->clkdm_offs); return 0; } @@ -90,12 +90,8 @@ static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap4_clkdm_wakeup(clkdm); - else - omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, - clkdm->clkdm_offs); + omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); } static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) diff --git a/trunk/arch/arm/mach-omap2/clockdomains2420_data.c b/trunk/arch/arm/mach-omap2/clockdomains2420_data.c index 5c741852fac0..0ab8e46d5b2b 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains2420_data.c +++ b/trunk/arch/arm/mach-omap2/clockdomains2420_data.c @@ -131,6 +131,8 @@ static struct clockdomain dss_2420_clkdm = { static struct clockdomain *clockdomains_omap242x[] __initdata = { &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, &mpu_2420_clkdm, &iva1_2420_clkdm, &dsp_2420_clkdm, diff --git a/trunk/arch/arm/mach-omap2/clockdomains2430_data.c b/trunk/arch/arm/mach-omap2/clockdomains2430_data.c index f09617555e15..3645ed044890 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains2430_data.c +++ b/trunk/arch/arm/mach-omap2/clockdomains2430_data.c @@ -157,6 +157,8 @@ static struct clockdomain dss_2430_clkdm = { static struct clockdomain *clockdomains_omap243x[] __initdata = { &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, &mpu_2430_clkdm, &mdm_clkdm, &dsp_2430_clkdm, diff --git a/trunk/arch/arm/mach-omap2/clockdomains33xx_data.c b/trunk/arch/arm/mach-omap2/clockdomains33xx_data.c deleted file mode 100644 index 32c90fd9eba2..000000000000 --- a/trunk/arch/arm/mach-omap2/clockdomains33xx_data.c +++ /dev/null @@ -1,196 +0,0 @@ -/* - * AM33XX Clock Domain data. - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * Vaibhav Hiremath - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include - -#include "clockdomain.h" -#include "cm.h" -#include "cm33xx.h" -#include "cm-regbits-33xx.h" - -static struct clockdomain l4ls_am33xx_clkdm = { - .name = "l4ls_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l3s_am33xx_clkdm = { - .name = "l3s_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_L3S_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l4fw_am33xx_clkdm = { - .name = "l4fw_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_L4FW_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l3_am33xx_clkdm = { - .name = "l3_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_L3_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l4hs_am33xx_clkdm = { - .name = "l4hs_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_L4HS_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain ocpwp_l3_am33xx_clkdm = { - .name = "ocpwp_l3_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain pruss_ocp_am33xx_clkdm = { - .name = "pruss_ocp_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_PRUSS_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain cpsw_125mhz_am33xx_clkdm = { - .name = "cpsw_125mhz_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_CPSW_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain lcdc_am33xx_clkdm = { - .name = "lcdc_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_LCDC_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain clk_24mhz_am33xx_clkdm = { - .name = "clk_24mhz_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .cm_inst = AM33XX_CM_PER_MOD, - .clkdm_offs = AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l4_wkup_am33xx_clkdm = { - .name = "l4_wkup_clkdm", - .pwrdm = { .name = "wkup_pwrdm" }, - .cm_inst = AM33XX_CM_WKUP_MOD, - .clkdm_offs = AM33XX_CM_WKUP_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l3_aon_am33xx_clkdm = { - .name = "l3_aon_clkdm", - .pwrdm = { .name = "wkup_pwrdm" }, - .cm_inst = AM33XX_CM_WKUP_MOD, - .clkdm_offs = AM33XX_CM_L3_AON_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l4_wkup_aon_am33xx_clkdm = { - .name = "l4_wkup_aon_clkdm", - .pwrdm = { .name = "wkup_pwrdm" }, - .cm_inst = AM33XX_CM_WKUP_MOD, - .clkdm_offs = AM33XX_CM_L4_WKUP_AON_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain mpu_am33xx_clkdm = { - .name = "mpu_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, - .cm_inst = AM33XX_CM_MPU_MOD, - .clkdm_offs = AM33XX_CM_MPU_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l4_rtc_am33xx_clkdm = { - .name = "l4_rtc_clkdm", - .pwrdm = { .name = "rtc_pwrdm" }, - .cm_inst = AM33XX_CM_RTC_MOD, - .clkdm_offs = AM33XX_CM_RTC_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain gfx_l3_am33xx_clkdm = { - .name = "gfx_l3_clkdm", - .pwrdm = { .name = "gfx_pwrdm" }, - .cm_inst = AM33XX_CM_GFX_MOD, - .clkdm_offs = AM33XX_CM_GFX_L3_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain gfx_l4ls_gfx_am33xx_clkdm = { - .name = "gfx_l4ls_gfx_clkdm", - .pwrdm = { .name = "gfx_pwrdm" }, - .cm_inst = AM33XX_CM_GFX_MOD, - .clkdm_offs = AM33XX_CM_GFX_L4LS_GFX_CLKSTCTRL__1_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain l4_cefuse_am33xx_clkdm = { - .name = "l4_cefuse_clkdm", - .pwrdm = { .name = "cefuse_pwrdm" }, - .cm_inst = AM33XX_CM_CEFUSE_MOD, - .clkdm_offs = AM33XX_CM_CEFUSE_CLKSTCTRL_OFFSET, - .flags = CLKDM_CAN_SWSUP, -}; - -static struct clockdomain *clockdomains_am33xx[] __initdata = { - &l4ls_am33xx_clkdm, - &l3s_am33xx_clkdm, - &l4fw_am33xx_clkdm, - &l3_am33xx_clkdm, - &l4hs_am33xx_clkdm, - &ocpwp_l3_am33xx_clkdm, - &pruss_ocp_am33xx_clkdm, - &cpsw_125mhz_am33xx_clkdm, - &lcdc_am33xx_clkdm, - &clk_24mhz_am33xx_clkdm, - &l4_wkup_am33xx_clkdm, - &l3_aon_am33xx_clkdm, - &l4_wkup_aon_am33xx_clkdm, - &mpu_am33xx_clkdm, - &l4_rtc_am33xx_clkdm, - &gfx_l3_am33xx_clkdm, - &gfx_l4ls_gfx_am33xx_clkdm, - &l4_cefuse_am33xx_clkdm, - NULL, -}; - -void __init am33xx_clockdomains_init(void) -{ - clkdm_register_platform_funcs(&am33xx_clkdm_operations); - clkdm_register_clkdms(clockdomains_am33xx); - clkdm_complete_init(); -} diff --git a/trunk/arch/arm/mach-omap2/clockdomains3xxx_data.c b/trunk/arch/arm/mach-omap2/clockdomains3xxx_data.c index 2cdc17c9d2fa..6038adb97710 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/clockdomains3xxx_data.c @@ -347,6 +347,8 @@ static struct clkdm_autodep clkdm_autodeps[] = { static struct clockdomain *clockdomains_omap3430_common[] __initdata = { &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, &mpu_3xxx_clkdm, &neon_clkdm, &iva2_clkdm, diff --git a/trunk/arch/arm/mach-omap2/clockdomains44xx_data.c b/trunk/arch/arm/mach-omap2/clockdomains44xx_data.c index bd7ed13515cc..c53425847493 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/trunk/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -430,6 +430,8 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { &l4_wkup_44xx_clkdm, &emu_sys_44xx_clkdm, &l3_dma_44xx_clkdm, + &prm_common_clkdm, + &cm_common_clkdm, NULL }; diff --git a/trunk/arch/arm/mach-omap2/clockdomains_common_data.c b/trunk/arch/arm/mach-omap2/clockdomains_common_data.c new file mode 100644 index 000000000000..615b1f04967d --- /dev/null +++ b/trunk/arch/arm/mach-omap2/clockdomains_common_data.c @@ -0,0 +1,24 @@ +/* + * OMAP2+-common clockdomain data + * + * Copyright (C) 2008-2012 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * + * Paul Walmsley, Jouni Högander + */ + +#include +#include + +#include "clockdomain.h" + +/* These are implicit clockdomains - they are never defined as such in TRM */ +struct clockdomain prm_common_clkdm = { + .name = "prm_clkdm", + .pwrdm = { .name = "wkup_pwrdm" }, +}; + +struct clockdomain cm_common_clkdm = { + .name = "cm_clkdm", + .pwrdm = { .name = "core_pwrdm" }, +}; diff --git a/trunk/arch/arm/mach-omap2/cm-regbits-33xx.h b/trunk/arch/arm/mach-omap2/cm-regbits-33xx.h deleted file mode 100644 index 532027ee3d8d..000000000000 --- a/trunk/arch/arm/mach-omap2/cm-regbits-33xx.h +++ /dev/null @@ -1,687 +0,0 @@ -/* - * AM33XX Power Management register bits - * - * This file is automatically generated from the AM33XX hardware databases. - * Vaibhav Hiremath - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - - -#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_33XX_H -#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_33XX_H - -/* - * Used by CM_AUTOIDLE_DPLL_CORE, CM_AUTOIDLE_DPLL_DDR, CM_AUTOIDLE_DPLL_DISP, - * CM_AUTOIDLE_DPLL_MPU, CM_AUTOIDLE_DPLL_PER - */ -#define AM33XX_AUTO_DPLL_MODE_SHIFT 0 -#define AM33XX_AUTO_DPLL_MODE_MASK (0x7 << 0) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_ADC_FCLK_SHIFT 14 -#define AM33XX_CLKACTIVITY_ADC_FCLK_MASK (1 << 16) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_CAN_CLK_SHIFT 11 -#define AM33XX_CLKACTIVITY_CAN_CLK_MASK (1 << 11) - -/* Used by CM_PER_CLK_24MHZ_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_CLK_24MHZ_GCLK_SHIFT 4 -#define AM33XX_CLKACTIVITY_CLK_24MHZ_GCLK_MASK (1 << 4) - -/* Used by CM_PER_CPSW_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_CPSW_125MHZ_GCLK_SHIFT 4 -#define AM33XX_CLKACTIVITY_CPSW_125MHZ_GCLK_MASK (1 << 4) - -/* Used by CM_PER_L4HS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_CPSW_250MHZ_GCLK_SHIFT 4 -#define AM33XX_CLKACTIVITY_CPSW_250MHZ_GCLK_MASK (1 << 4) - -/* Used by CM_PER_L4HS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_CPSW_50MHZ_GCLK_SHIFT 5 -#define AM33XX_CLKACTIVITY_CPSW_50MHZ_GCLK_MASK (1 << 5) - -/* Used by CM_PER_L4HS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_CPSW_5MHZ_GCLK_SHIFT 6 -#define AM33XX_CLKACTIVITY_CPSW_5MHZ_GCLK_MASK (1 << 6) - -/* Used by CM_PER_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_CPTS_RFT_GCLK_SHIFT 6 -#define AM33XX_CLKACTIVITY_CPTS_RFT_GCLK_MASK (1 << 6) - -/* Used by CM_CEFUSE_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT 9 -#define AM33XX_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK (1 << 9) - -/* Used by CM_L3_AON_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_DBGSYSCLK_SHIFT 2 -#define AM33XX_CLKACTIVITY_DBGSYSCLK_MASK (1 << 2) - -/* Used by CM_L3_AON_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_DEBUG_CLKA_SHIFT 4 -#define AM33XX_CLKACTIVITY_DEBUG_CLKA_MASK (1 << 4) - -/* Used by CM_PER_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_EMIF_GCLK_SHIFT 2 -#define AM33XX_CLKACTIVITY_EMIF_GCLK_MASK (1 << 2) - -/* Used by CM_GFX_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GFX_FCLK_SHIFT 9 -#define AM33XX_CLKACTIVITY_GFX_FCLK_MASK (1 << 9) - -/* Used by CM_GFX_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GFX_L3_GCLK_SHIFT 8 -#define AM33XX_CLKACTIVITY_GFX_L3_GCLK_MASK (1 << 8) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GPIO0_GDBCLK_SHIFT 8 -#define AM33XX_CLKACTIVITY_GPIO0_GDBCLK_MASK (1 << 8) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GPIO_1_GDBCLK_SHIFT 19 -#define AM33XX_CLKACTIVITY_GPIO_1_GDBCLK_MASK (1 << 19) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GPIO_2_GDBCLK_SHIFT 20 -#define AM33XX_CLKACTIVITY_GPIO_2_GDBCLK_MASK (1 << 20) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GPIO_3_GDBCLK_SHIFT 21 -#define AM33XX_CLKACTIVITY_GPIO_3_GDBCLK_MASK (1 << 21) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GPIO_4_GDBCLK_SHIFT 22 -#define AM33XX_CLKACTIVITY_GPIO_4_GDBCLK_MASK (1 << 22) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GPIO_5_GDBCLK_SHIFT 26 -#define AM33XX_CLKACTIVITY_GPIO_5_GDBCLK_MASK (1 << 26) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_GPIO_6_GDBCLK_SHIFT 18 -#define AM33XX_CLKACTIVITY_GPIO_6_GDBCLK_MASK (1 << 18) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_I2C0_GFCLK_SHIFT 11 -#define AM33XX_CLKACTIVITY_I2C0_GFCLK_MASK (1 << 11) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_I2C_FCLK_SHIFT 24 -#define AM33XX_CLKACTIVITY_I2C_FCLK_MASK (1 << 24) - -/* Used by CM_PER_PRUSS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_PRUSS_IEP_GCLK_SHIFT 5 -#define AM33XX_CLKACTIVITY_PRUSS_IEP_GCLK_MASK (1 << 5) - -/* Used by CM_PER_PRUSS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_PRUSS_OCP_GCLK_SHIFT 4 -#define AM33XX_CLKACTIVITY_PRUSS_OCP_GCLK_MASK (1 << 4) - -/* Used by CM_PER_PRUSS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_PRUSS_UART_GCLK_SHIFT 6 -#define AM33XX_CLKACTIVITY_PRUSS_UART_GCLK_MASK (1 << 6) - -/* Used by CM_PER_L3S_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L3S_GCLK_SHIFT 3 -#define AM33XX_CLKACTIVITY_L3S_GCLK_MASK (1 << 3) - -/* Used by CM_L3_AON_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L3_AON_GCLK_SHIFT 3 -#define AM33XX_CLKACTIVITY_L3_AON_GCLK_MASK (1 << 3) - -/* Used by CM_PER_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L3_GCLK_SHIFT 4 -#define AM33XX_CLKACTIVITY_L3_GCLK_MASK (1 << 4) - -/* Used by CM_PER_L4FW_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L4FW_GCLK_SHIFT 8 -#define AM33XX_CLKACTIVITY_L4FW_GCLK_MASK (1 << 8) - -/* Used by CM_PER_L4HS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L4HS_GCLK_SHIFT 3 -#define AM33XX_CLKACTIVITY_L4HS_GCLK_MASK (1 << 3) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L4LS_GCLK_SHIFT 8 -#define AM33XX_CLKACTIVITY_L4LS_GCLK_MASK (1 << 8) - -/* Used by CM_GFX_L4LS_GFX_CLKSTCTRL__1 */ -#define AM33XX_CLKACTIVITY_L4LS_GFX_GCLK_SHIFT 8 -#define AM33XX_CLKACTIVITY_L4LS_GFX_GCLK_MASK (1 << 8) - -/* Used by CM_CEFUSE_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L4_CEFUSE_GICLK_SHIFT 8 -#define AM33XX_CLKACTIVITY_L4_CEFUSE_GICLK_MASK (1 << 8) - -/* Used by CM_RTC_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L4_RTC_GCLK_SHIFT 8 -#define AM33XX_CLKACTIVITY_L4_RTC_GCLK_MASK (1 << 8) - -/* Used by CM_L4_WKUP_AON_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L4_WKUP_AON_GCLK_SHIFT 2 -#define AM33XX_CLKACTIVITY_L4_WKUP_AON_GCLK_MASK (1 << 2) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_L4_WKUP_GCLK_SHIFT 2 -#define AM33XX_CLKACTIVITY_L4_WKUP_GCLK_MASK (1 << 2) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_LCDC_GCLK_SHIFT 17 -#define AM33XX_CLKACTIVITY_LCDC_GCLK_MASK (1 << 17) - -/* Used by CM_PER_LCDC_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_LCDC_L3_OCP_GCLK_SHIFT 4 -#define AM33XX_CLKACTIVITY_LCDC_L3_OCP_GCLK_MASK (1 << 4) - -/* Used by CM_PER_LCDC_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_LCDC_L4_OCP_GCLK_SHIFT 5 -#define AM33XX_CLKACTIVITY_LCDC_L4_OCP_GCLK_MASK (1 << 5) - -/* Used by CM_PER_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_MCASP_GCLK_SHIFT 7 -#define AM33XX_CLKACTIVITY_MCASP_GCLK_MASK (1 << 7) - -/* Used by CM_PER_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_MMC_FCLK_SHIFT 3 -#define AM33XX_CLKACTIVITY_MMC_FCLK_MASK (1 << 3) - -/* Used by CM_MPU_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_MPU_CLK_SHIFT 2 -#define AM33XX_CLKACTIVITY_MPU_CLK_MASK (1 << 2) - -/* Used by CM_PER_OCPWP_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_OCPWP_L3_GCLK_SHIFT 4 -#define AM33XX_CLKACTIVITY_OCPWP_L3_GCLK_MASK (1 << 4) - -/* Used by CM_PER_OCPWP_L3_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_OCPWP_L4_GCLK_SHIFT 5 -#define AM33XX_CLKACTIVITY_OCPWP_L4_GCLK_MASK (1 << 5) - -/* Used by CM_RTC_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_RTC_32KCLK_SHIFT 9 -#define AM33XX_CLKACTIVITY_RTC_32KCLK_MASK (1 << 9) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_SPI_GCLK_SHIFT 25 -#define AM33XX_CLKACTIVITY_SPI_GCLK_MASK (1 << 25) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_SR_SYSCLK_SHIFT 3 -#define AM33XX_CLKACTIVITY_SR_SYSCLK_MASK (1 << 3) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_TIMER0_GCLK_SHIFT 10 -#define AM33XX_CLKACTIVITY_TIMER0_GCLK_MASK (1 << 10) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_TIMER1_GCLK_SHIFT 13 -#define AM33XX_CLKACTIVITY_TIMER1_GCLK_MASK (1 << 13) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_TIMER2_GCLK_SHIFT 14 -#define AM33XX_CLKACTIVITY_TIMER2_GCLK_MASK (1 << 14) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_TIMER3_GCLK_SHIFT 15 -#define AM33XX_CLKACTIVITY_TIMER3_GCLK_MASK (1 << 15) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_TIMER4_GCLK_SHIFT 16 -#define AM33XX_CLKACTIVITY_TIMER4_GCLK_MASK (1 << 16) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_TIMER5_GCLK_SHIFT 27 -#define AM33XX_CLKACTIVITY_TIMER5_GCLK_MASK (1 << 27) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_TIMER6_GCLK_SHIFT 28 -#define AM33XX_CLKACTIVITY_TIMER6_GCLK_MASK (1 << 28) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_TIMER7_GCLK_SHIFT 13 -#define AM33XX_CLKACTIVITY_TIMER7_GCLK_MASK (1 << 13) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_UART0_GFCLK_SHIFT 12 -#define AM33XX_CLKACTIVITY_UART0_GFCLK_MASK (1 << 12) - -/* Used by CM_PER_L4LS_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_UART_GFCLK_SHIFT 10 -#define AM33XX_CLKACTIVITY_UART_GFCLK_MASK (1 << 10) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_WDT0_GCLK_SHIFT 9 -#define AM33XX_CLKACTIVITY_WDT0_GCLK_MASK (1 << 9) - -/* Used by CM_WKUP_CLKSTCTRL */ -#define AM33XX_CLKACTIVITY_WDT1_GCLK_SHIFT 4 -#define AM33XX_CLKACTIVITY_WDT1_GCLK_MASK (1 << 4) - -/* Used by CLKSEL_GFX_FCLK */ -#define AM33XX_CLKDIV_SEL_GFX_FCLK_SHIFT 0 -#define AM33XX_CLKDIV_SEL_GFX_FCLK_MASK (1 << 0) - -/* Used by CM_CLKOUT_CTRL */ -#define AM33XX_CLKOUT2DIV_SHIFT 3 -#define AM33XX_CLKOUT2DIV_MASK (0x05 << 3) - -/* Used by CM_CLKOUT_CTRL */ -#define AM33XX_CLKOUT2EN_SHIFT 7 -#define AM33XX_CLKOUT2EN_MASK (1 << 7) - -/* Used by CM_CLKOUT_CTRL */ -#define AM33XX_CLKOUT2SOURCE_SHIFT 0 -#define AM33XX_CLKOUT2SOURCE_MASK (0x02 << 0) - -/* - * Used by CLKSEL_GPIO0_DBCLK, CLKSEL_LCDC_PIXEL_CLK, CLKSEL_TIMER2_CLK, - * CLKSEL_TIMER3_CLK, CLKSEL_TIMER4_CLK, CLKSEL_TIMER5_CLK, CLKSEL_TIMER6_CLK, - * CLKSEL_TIMER7_CLK - */ -#define AM33XX_CLKSEL_SHIFT 0 -#define AM33XX_CLKSEL_MASK (0x01 << 0) - -/* - * Renamed from CLKSEL Used by CLKSEL_PRUSS_OCP_CLK, CLKSEL_WDT1_CLK, - * CM_CPTS_RFT_CLKSEL - */ -#define AM33XX_CLKSEL_0_0_SHIFT 0 -#define AM33XX_CLKSEL_0_0_MASK (1 << 0) - -#define AM33XX_CLKSEL_0_1_SHIFT 0 -#define AM33XX_CLKSEL_0_1_MASK (3 << 0) - -/* Renamed from CLKSEL Used by CLKSEL_TIMER1MS_CLK */ -#define AM33XX_CLKSEL_0_2_SHIFT 0 -#define AM33XX_CLKSEL_0_2_MASK (7 << 0) - -/* Used by CLKSEL_GFX_FCLK */ -#define AM33XX_CLKSEL_GFX_FCLK_SHIFT 1 -#define AM33XX_CLKSEL_GFX_FCLK_MASK (1 << 1) - -/* - * Used by CM_MPU_CLKSTCTRL, CM_RTC_CLKSTCTRL, CM_PER_CLK_24MHZ_CLKSTCTRL, - * CM_PER_CPSW_CLKSTCTRL, CM_PER_PRUSS_CLKSTCTRL, CM_PER_L3S_CLKSTCTRL, - * CM_PER_L3_CLKSTCTRL, CM_PER_L4FW_CLKSTCTRL, CM_PER_L4HS_CLKSTCTRL, - * CM_PER_L4LS_CLKSTCTRL, CM_PER_LCDC_CLKSTCTRL, CM_PER_OCPWP_L3_CLKSTCTRL, - * CM_L3_AON_CLKSTCTRL, CM_L4_WKUP_AON_CLKSTCTRL, CM_WKUP_CLKSTCTRL, - * CM_GFX_L3_CLKSTCTRL, CM_GFX_L4LS_GFX_CLKSTCTRL__1, CM_CEFUSE_CLKSTCTRL - */ -#define AM33XX_CLKTRCTRL_SHIFT 0 -#define AM33XX_CLKTRCTRL_MASK (0x3 << 0) - -/* - * Used by CM_SSC_DELTAMSTEP_DPLL_CORE, CM_SSC_DELTAMSTEP_DPLL_DDR, - * CM_SSC_DELTAMSTEP_DPLL_DISP, CM_SSC_DELTAMSTEP_DPLL_MPU, - * CM_SSC_DELTAMSTEP_DPLL_PER - */ -#define AM33XX_DELTAMSTEP_SHIFT 0 -#define AM33XX_DELTAMSTEP_MASK (0x19 << 0) - -/* Used by CM_CLKSEL_DPLL_DDR, CM_CLKSEL_DPLL_DISP, CM_CLKSEL_DPLL_MPU */ -#define AM33XX_DPLL_BYP_CLKSEL_SHIFT 23 -#define AM33XX_DPLL_BYP_CLKSEL_MASK (1 << 23) - -/* Used by CM_CLKDCOLDO_DPLL_PER */ -#define AM33XX_DPLL_CLKDCOLDO_GATE_CTRL_SHIFT 8 -#define AM33XX_DPLL_CLKDCOLDO_GATE_CTRL_MASK (1 << 8) - -/* Used by CM_CLKDCOLDO_DPLL_PER */ -#define AM33XX_DPLL_CLKDCOLDO_PWDN_SHIFT 12 -#define AM33XX_DPLL_CLKDCOLDO_PWDN_MASK (1 << 12) - -/* Used by CM_DIV_M2_DPLL_DDR, CM_DIV_M2_DPLL_DISP, CM_DIV_M2_DPLL_MPU */ -#define AM33XX_DPLL_CLKOUT_DIV_SHIFT 0 -#define AM33XX_DPLL_CLKOUT_DIV_MASK (0x1f << 0) - -/* Renamed from DPLL_CLKOUT_DIV Used by CM_DIV_M2_DPLL_PER */ -#define AM33XX_DPLL_CLKOUT_DIV_0_6_SHIFT 0 -#define AM33XX_DPLL_CLKOUT_DIV_0_6_MASK (0x06 << 0) - -/* Used by CM_DIV_M2_DPLL_DDR, CM_DIV_M2_DPLL_DISP, CM_DIV_M2_DPLL_MPU */ -#define AM33XX_DPLL_CLKOUT_DIVCHACK_SHIFT 5 -#define AM33XX_DPLL_CLKOUT_DIVCHACK_MASK (1 << 5) - -/* Renamed from DPLL_CLKOUT_DIVCHACK Used by CM_DIV_M2_DPLL_PER */ -#define AM33XX_DPLL_CLKOUT_DIVCHACK_M2_PER_SHIFT 7 -#define AM33XX_DPLL_CLKOUT_DIVCHACK_M2_PER_MASK (1 << 7) - -/* - * Used by CM_DIV_M2_DPLL_DDR, CM_DIV_M2_DPLL_DISP, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER - */ -#define AM33XX_DPLL_CLKOUT_GATE_CTRL_SHIFT 8 -#define AM33XX_DPLL_CLKOUT_GATE_CTRL_MASK (1 << 8) - -/* - * Used by CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDR, CM_CLKSEL_DPLL_DISP, - * CM_CLKSEL_DPLL_MPU - */ -#define AM33XX_DPLL_DIV_SHIFT 0 -#define AM33XX_DPLL_DIV_MASK (0x7f << 0) - -#define AM33XX_DPLL_PER_DIV_MASK (0xff << 0) - -/* Renamed from DPLL_DIV Used by CM_CLKSEL_DPLL_PERIPH */ -#define AM33XX_DPLL_DIV_0_7_SHIFT 0 -#define AM33XX_DPLL_DIV_0_7_MASK (0x07 << 0) - -/* - * Used by CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDR, CM_CLKMODE_DPLL_DISP, - * CM_CLKMODE_DPLL_MPU - */ -#define AM33XX_DPLL_DRIFTGUARD_EN_SHIFT 8 -#define AM33XX_DPLL_DRIFTGUARD_EN_MASK (1 << 8) - -/* - * Used by CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDR, CM_CLKMODE_DPLL_DISP, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER - */ -#define AM33XX_DPLL_EN_SHIFT 0 -#define AM33XX_DPLL_EN_MASK (0x7 << 0) - -/* - * Used by CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDR, CM_CLKMODE_DPLL_DISP, - * CM_CLKMODE_DPLL_MPU - */ -#define AM33XX_DPLL_LPMODE_EN_SHIFT 10 -#define AM33XX_DPLL_LPMODE_EN_MASK (1 << 10) - -/* - * Used by CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDR, CM_CLKSEL_DPLL_DISP, - * CM_CLKSEL_DPLL_MPU - */ -#define AM33XX_DPLL_MULT_SHIFT 8 -#define AM33XX_DPLL_MULT_MASK (0x7ff << 8) - -/* Renamed from DPLL_MULT Used by CM_CLKSEL_DPLL_PERIPH */ -#define AM33XX_DPLL_MULT_PERIPH_SHIFT 8 -#define AM33XX_DPLL_MULT_PERIPH_MASK (0xfff << 8) - -/* - * Used by CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDR, CM_CLKMODE_DPLL_DISP, - * CM_CLKMODE_DPLL_MPU - */ -#define AM33XX_DPLL_REGM4XEN_SHIFT 11 -#define AM33XX_DPLL_REGM4XEN_MASK (1 << 11) - -/* Used by CM_CLKSEL_DPLL_PERIPH */ -#define AM33XX_DPLL_SD_DIV_SHIFT 24 -#define AM33XX_DPLL_SD_DIV_MASK (24, 31) - -/* - * Used by CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDR, CM_CLKMODE_DPLL_DISP, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER - */ -#define AM33XX_DPLL_SSC_ACK_SHIFT 13 -#define AM33XX_DPLL_SSC_ACK_MASK (1 << 13) - -/* - * Used by CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDR, CM_CLKMODE_DPLL_DISP, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER - */ -#define AM33XX_DPLL_SSC_DOWNSPREAD_SHIFT 14 -#define AM33XX_DPLL_SSC_DOWNSPREAD_MASK (1 << 14) - -/* - * Used by CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDR, CM_CLKMODE_DPLL_DISP, - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER - */ -#define AM33XX_DPLL_SSC_EN_SHIFT 12 -#define AM33XX_DPLL_SSC_EN_MASK (1 << 12) - -/* Used by CM_DIV_M4_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT1_DIV_SHIFT 0 -#define AM33XX_HSDIVIDER_CLKOUT1_DIV_MASK (0x1f << 0) - -/* Used by CM_DIV_M4_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT1_DIVCHACK_SHIFT 5 -#define AM33XX_HSDIVIDER_CLKOUT1_DIVCHACK_MASK (1 << 5) - -/* Used by CM_DIV_M4_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT1_GATE_CTRL_SHIFT 8 -#define AM33XX_HSDIVIDER_CLKOUT1_GATE_CTRL_MASK (1 << 8) - -/* Used by CM_DIV_M4_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT1_PWDN_SHIFT 12 -#define AM33XX_HSDIVIDER_CLKOUT1_PWDN_MASK (1 << 12) - -/* Used by CM_DIV_M5_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT2_DIV_SHIFT 0 -#define AM33XX_HSDIVIDER_CLKOUT2_DIV_MASK (0x1f << 0) - -/* Used by CM_DIV_M5_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT2_DIVCHACK_SHIFT 5 -#define AM33XX_HSDIVIDER_CLKOUT2_DIVCHACK_MASK (1 << 5) - -/* Used by CM_DIV_M5_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT2_GATE_CTRL_SHIFT 8 -#define AM33XX_HSDIVIDER_CLKOUT2_GATE_CTRL_MASK (1 << 8) - -/* Used by CM_DIV_M5_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT2_PWDN_SHIFT 12 -#define AM33XX_HSDIVIDER_CLKOUT2_PWDN_MASK (1 << 12) - -/* Used by CM_DIV_M6_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT3_DIV_SHIFT 0 -#define AM33XX_HSDIVIDER_CLKOUT3_DIV_MASK (0x04 << 0) - -/* Used by CM_DIV_M6_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT3_DIVCHACK_SHIFT 5 -#define AM33XX_HSDIVIDER_CLKOUT3_DIVCHACK_MASK (1 << 5) - -/* Used by CM_DIV_M6_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT3_GATE_CTRL_SHIFT 8 -#define AM33XX_HSDIVIDER_CLKOUT3_GATE_CTRL_MASK (1 << 8) - -/* Used by CM_DIV_M6_DPLL_CORE */ -#define AM33XX_HSDIVIDER_CLKOUT3_PWDN_SHIFT 12 -#define AM33XX_HSDIVIDER_CLKOUT3_PWDN_MASK (1 << 12) - -/* - * Used by CM_MPU_MPU_CLKCTRL, CM_RTC_RTC_CLKCTRL, CM_PER_AES0_CLKCTRL, - * CM_PER_AES1_CLKCTRL, CM_PER_CLKDIV32K_CLKCTRL, CM_PER_CPGMAC0_CLKCTRL, - * CM_PER_DCAN0_CLKCTRL, CM_PER_DCAN1_CLKCTRL, CM_PER_DES_CLKCTRL, - * CM_PER_ELM_CLKCTRL, CM_PER_EMIF_CLKCTRL, CM_PER_EMIF_FW_CLKCTRL, - * CM_PER_EPWMSS0_CLKCTRL, CM_PER_EPWMSS1_CLKCTRL, CM_PER_EPWMSS2_CLKCTRL, - * CM_PER_GPIO1_CLKCTRL, CM_PER_GPIO2_CLKCTRL, CM_PER_GPIO3_CLKCTRL, - * CM_PER_GPIO4_CLKCTRL, CM_PER_GPIO5_CLKCTRL, CM_PER_GPIO6_CLKCTRL, - * CM_PER_GPMC_CLKCTRL, CM_PER_I2C1_CLKCTRL, CM_PER_I2C2_CLKCTRL, - * CM_PER_PRUSS_CLKCTRL, CM_PER_IEEE5000_CLKCTRL, CM_PER_L3_CLKCTRL, - * CM_PER_L3_INSTR_CLKCTRL, CM_PER_L4FW_CLKCTRL, CM_PER_L4HS_CLKCTRL, - * CM_PER_L4LS_CLKCTRL, CM_PER_LCDC_CLKCTRL, CM_PER_MAILBOX0_CLKCTRL, - * CM_PER_MAILBOX1_CLKCTRL, CM_PER_MCASP0_CLKCTRL, CM_PER_MCASP1_CLKCTRL, - * CM_PER_MCASP2_CLKCTRL, CM_PER_MLB_CLKCTRL, CM_PER_MMC0_CLKCTRL, - * CM_PER_MMC1_CLKCTRL, CM_PER_MMC2_CLKCTRL, CM_PER_MSTR_EXPS_CLKCTRL, - * CM_PER_OCMCRAM_CLKCTRL, CM_PER_OCPWP_CLKCTRL, CM_PER_PCIE_CLKCTRL, - * CM_PER_PKA_CLKCTRL, CM_PER_RNG_CLKCTRL, CM_PER_SHA0_CLKCTRL, - * CM_PER_SLV_EXPS_CLKCTRL, CM_PER_SPARE0_CLKCTRL, CM_PER_SPARE1_CLKCTRL, - * CM_PER_SPARE_CLKCTRL, CM_PER_SPI0_CLKCTRL, CM_PER_SPI1_CLKCTRL, - * CM_PER_SPI2_CLKCTRL, CM_PER_SPI3_CLKCTRL, CM_PER_SPINLOCK_CLKCTRL, - * CM_PER_TIMER2_CLKCTRL, CM_PER_TIMER3_CLKCTRL, CM_PER_TIMER4_CLKCTRL, - * CM_PER_TIMER5_CLKCTRL, CM_PER_TIMER6_CLKCTRL, CM_PER_TIMER7_CLKCTRL, - * CM_PER_TPCC_CLKCTRL, CM_PER_TPTC0_CLKCTRL, CM_PER_TPTC1_CLKCTRL, - * CM_PER_TPTC2_CLKCTRL, CM_PER_UART1_CLKCTRL, CM_PER_UART2_CLKCTRL, - * CM_PER_UART3_CLKCTRL, CM_PER_UART4_CLKCTRL, CM_PER_UART5_CLKCTRL, - * CM_PER_USB0_CLKCTRL, CM_WKUP_ADC_TSC_CLKCTRL, CM_WKUP_CONTROL_CLKCTRL, - * CM_WKUP_DEBUGSS_CLKCTRL, CM_WKUP_GPIO0_CLKCTRL, CM_WKUP_I2C0_CLKCTRL, - * CM_WKUP_L4WKUP_CLKCTRL, CM_WKUP_SMARTREFLEX0_CLKCTRL, - * CM_WKUP_SMARTREFLEX1_CLKCTRL, CM_WKUP_TIMER0_CLKCTRL, - * CM_WKUP_TIMER1_CLKCTRL, CM_WKUP_UART0_CLKCTRL, CM_WKUP_WDT0_CLKCTRL, - * CM_WKUP_WDT1_CLKCTRL, CM_GFX_BITBLT_CLKCTRL, CM_GFX_GFX_CLKCTRL, - * CM_GFX_MMUCFG_CLKCTRL, CM_GFX_MMUDATA_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL - */ -#define AM33XX_IDLEST_SHIFT 16 -#define AM33XX_IDLEST_MASK (0x3 << 16) -#define AM33XX_IDLEST_VAL 0x3 - -/* Used by CM_MAC_CLKSEL */ -#define AM33XX_MII_CLK_SEL_SHIFT 2 -#define AM33XX_MII_CLK_SEL_MASK (1 << 2) - -/* - * Used by CM_SSC_MODFREQDIV_DPLL_CORE, CM_SSC_MODFREQDIV_DPLL_DDR, - * CM_SSC_MODFREQDIV_DPLL_DISP, CM_SSC_MODFREQDIV_DPLL_MPU, - * CM_SSC_MODFREQDIV_DPLL_PER - */ -#define AM33XX_MODFREQDIV_EXPONENT_SHIFT 8 -#define AM33XX_MODFREQDIV_EXPONENT_MASK (0x10 << 8) - -/* - * Used by CM_SSC_MODFREQDIV_DPLL_CORE, CM_SSC_MODFREQDIV_DPLL_DDR, - * CM_SSC_MODFREQDIV_DPLL_DISP, CM_SSC_MODFREQDIV_DPLL_MPU, - * CM_SSC_MODFREQDIV_DPLL_PER - */ -#define AM33XX_MODFREQDIV_MANTISSA_SHIFT 0 -#define AM33XX_MODFREQDIV_MANTISSA_MASK (0x06 << 0) - -/* - * Used by CM_MPU_MPU_CLKCTRL, CM_RTC_RTC_CLKCTRL, CM_PER_AES0_CLKCTRL, - * CM_PER_AES1_CLKCTRL, CM_PER_CLKDIV32K_CLKCTRL, CM_PER_CPGMAC0_CLKCTRL, - * CM_PER_DCAN0_CLKCTRL, CM_PER_DCAN1_CLKCTRL, CM_PER_DES_CLKCTRL, - * CM_PER_ELM_CLKCTRL, CM_PER_EMIF_CLKCTRL, CM_PER_EMIF_FW_CLKCTRL, - * CM_PER_EPWMSS0_CLKCTRL, CM_PER_EPWMSS1_CLKCTRL, CM_PER_EPWMSS2_CLKCTRL, - * CM_PER_GPIO1_CLKCTRL, CM_PER_GPIO2_CLKCTRL, CM_PER_GPIO3_CLKCTRL, - * CM_PER_GPIO4_CLKCTRL, CM_PER_GPIO5_CLKCTRL, CM_PER_GPIO6_CLKCTRL, - * CM_PER_GPMC_CLKCTRL, CM_PER_I2C1_CLKCTRL, CM_PER_I2C2_CLKCTRL, - * CM_PER_PRUSS_CLKCTRL, CM_PER_IEEE5000_CLKCTRL, CM_PER_L3_CLKCTRL, - * CM_PER_L3_INSTR_CLKCTRL, CM_PER_L4FW_CLKCTRL, CM_PER_L4HS_CLKCTRL, - * CM_PER_L4LS_CLKCTRL, CM_PER_LCDC_CLKCTRL, CM_PER_MAILBOX0_CLKCTRL, - * CM_PER_MAILBOX1_CLKCTRL, CM_PER_MCASP0_CLKCTRL, CM_PER_MCASP1_CLKCTRL, - * CM_PER_MCASP2_CLKCTRL, CM_PER_MLB_CLKCTRL, CM_PER_MMC0_CLKCTRL, - * CM_PER_MMC1_CLKCTRL, CM_PER_MMC2_CLKCTRL, CM_PER_MSTR_EXPS_CLKCTRL, - * CM_PER_OCMCRAM_CLKCTRL, CM_PER_OCPWP_CLKCTRL, CM_PER_PCIE_CLKCTRL, - * CM_PER_PKA_CLKCTRL, CM_PER_RNG_CLKCTRL, CM_PER_SHA0_CLKCTRL, - * CM_PER_SLV_EXPS_CLKCTRL, CM_PER_SPARE0_CLKCTRL, CM_PER_SPARE1_CLKCTRL, - * CM_PER_SPARE_CLKCTRL, CM_PER_SPI0_CLKCTRL, CM_PER_SPI1_CLKCTRL, - * CM_PER_SPI2_CLKCTRL, CM_PER_SPI3_CLKCTRL, CM_PER_SPINLOCK_CLKCTRL, - * CM_PER_TIMER2_CLKCTRL, CM_PER_TIMER3_CLKCTRL, CM_PER_TIMER4_CLKCTRL, - * CM_PER_TIMER5_CLKCTRL, CM_PER_TIMER6_CLKCTRL, CM_PER_TIMER7_CLKCTRL, - * CM_PER_TPCC_CLKCTRL, CM_PER_TPTC0_CLKCTRL, CM_PER_TPTC1_CLKCTRL, - * CM_PER_TPTC2_CLKCTRL, CM_PER_UART1_CLKCTRL, CM_PER_UART2_CLKCTRL, - * CM_PER_UART3_CLKCTRL, CM_PER_UART4_CLKCTRL, CM_PER_UART5_CLKCTRL, - * CM_PER_USB0_CLKCTRL, CM_WKUP_ADC_TSC_CLKCTRL, CM_WKUP_CONTROL_CLKCTRL, - * CM_WKUP_DEBUGSS_CLKCTRL, CM_WKUP_GPIO0_CLKCTRL, CM_WKUP_I2C0_CLKCTRL, - * CM_WKUP_L4WKUP_CLKCTRL, CM_WKUP_SMARTREFLEX0_CLKCTRL, - * CM_WKUP_SMARTREFLEX1_CLKCTRL, CM_WKUP_TIMER0_CLKCTRL, - * CM_WKUP_TIMER1_CLKCTRL, CM_WKUP_UART0_CLKCTRL, CM_WKUP_WDT0_CLKCTRL, - * CM_WKUP_WDT1_CLKCTRL, CM_WKUP_WKUP_M3_CLKCTRL, CM_GFX_BITBLT_CLKCTRL, - * CM_GFX_GFX_CLKCTRL, CM_GFX_MMUCFG_CLKCTRL, CM_GFX_MMUDATA_CLKCTRL, - * CM_CEFUSE_CEFUSE_CLKCTRL - */ -#define AM33XX_MODULEMODE_SHIFT 0 -#define AM33XX_MODULEMODE_MASK (0x3 << 0) - -/* Used by CM_WKUP_DEBUGSS_CLKCTRL */ -#define AM33XX_OPTCLK_DEBUG_CLKA_SHIFT 30 -#define AM33XX_OPTCLK_DEBUG_CLKA_MASK (1 << 30) - -/* Used by CM_WKUP_DEBUGSS_CLKCTRL */ -#define AM33XX_OPTFCLKEN_DBGSYSCLK_SHIFT 19 -#define AM33XX_OPTFCLKEN_DBGSYSCLK_MASK (1 << 19) - -/* Used by CM_WKUP_GPIO0_CLKCTRL */ -#define AM33XX_OPTFCLKEN_GPIO0_GDBCLK_SHIFT 18 -#define AM33XX_OPTFCLKEN_GPIO0_GDBCLK_MASK (1 << 18) - -/* Used by CM_PER_GPIO1_CLKCTRL */ -#define AM33XX_OPTFCLKEN_GPIO_1_GDBCLK_SHIFT 18 -#define AM33XX_OPTFCLKEN_GPIO_1_GDBCLK_MASK (1 << 18) - -/* Used by CM_PER_GPIO2_CLKCTRL */ -#define AM33XX_OPTFCLKEN_GPIO_2_GDBCLK_SHIFT 18 -#define AM33XX_OPTFCLKEN_GPIO_2_GDBCLK_MASK (1 << 18) - -/* Used by CM_PER_GPIO3_CLKCTRL */ -#define AM33XX_OPTFCLKEN_GPIO_3_GDBCLK_SHIFT 18 -#define AM33XX_OPTFCLKEN_GPIO_3_GDBCLK_MASK (1 << 18) - -/* Used by CM_PER_GPIO4_CLKCTRL */ -#define AM33XX_OPTFCLKEN_GPIO_4_GDBCLK_SHIFT 18 -#define AM33XX_OPTFCLKEN_GPIO_4_GDBCLK_MASK (1 << 18) - -/* Used by CM_PER_GPIO5_CLKCTRL */ -#define AM33XX_OPTFCLKEN_GPIO_5_GDBCLK_SHIFT 18 -#define AM33XX_OPTFCLKEN_GPIO_5_GDBCLK_MASK (1 << 18) - -/* Used by CM_PER_GPIO6_CLKCTRL */ -#define AM33XX_OPTFCLKEN_GPIO_6_GDBCLK_SHIFT 18 -#define AM33XX_OPTFCLKEN_GPIO_6_GDBCLK_MASK (1 << 18) - -/* - * Used by CM_MPU_MPU_CLKCTRL, CM_PER_CPGMAC0_CLKCTRL, CM_PER_PRUSS_CLKCTRL, - * CM_PER_IEEE5000_CLKCTRL, CM_PER_LCDC_CLKCTRL, CM_PER_MLB_CLKCTRL, - * CM_PER_MSTR_EXPS_CLKCTRL, CM_PER_OCPWP_CLKCTRL, CM_PER_PCIE_CLKCTRL, - * CM_PER_SPARE_CLKCTRL, CM_PER_TPTC0_CLKCTRL, CM_PER_TPTC1_CLKCTRL, - * CM_PER_TPTC2_CLKCTRL, CM_PER_USB0_CLKCTRL, CM_WKUP_DEBUGSS_CLKCTRL, - * CM_WKUP_WKUP_M3_CLKCTRL, CM_GFX_BITBLT_CLKCTRL, CM_GFX_GFX_CLKCTRL - */ -#define AM33XX_STBYST_SHIFT 18 -#define AM33XX_STBYST_MASK (1 << 18) - -/* Used by CM_WKUP_DEBUGSS_CLKCTRL */ -#define AM33XX_STM_PMD_CLKDIVSEL_SHIFT 27 -#define AM33XX_STM_PMD_CLKDIVSEL_MASK (0x29 << 27) - -/* Used by CM_WKUP_DEBUGSS_CLKCTRL */ -#define AM33XX_STM_PMD_CLKSEL_SHIFT 22 -#define AM33XX_STM_PMD_CLKSEL_MASK (0x23 << 22) - -/* - * Used by CM_IDLEST_DPLL_CORE, CM_IDLEST_DPLL_DDR, CM_IDLEST_DPLL_DISP, - * CM_IDLEST_DPLL_MPU, CM_IDLEST_DPLL_PER - */ -#define AM33XX_ST_DPLL_CLK_SHIFT 0 -#define AM33XX_ST_DPLL_CLK_MASK (1 << 0) - -/* Used by CM_CLKDCOLDO_DPLL_PER */ -#define AM33XX_ST_DPLL_CLKDCOLDO_SHIFT 8 -#define AM33XX_ST_DPLL_CLKDCOLDO_MASK (1 << 8) - -/* - * Used by CM_DIV_M2_DPLL_DDR, CM_DIV_M2_DPLL_DISP, CM_DIV_M2_DPLL_MPU, - * CM_DIV_M2_DPLL_PER - */ -#define AM33XX_ST_DPLL_CLKOUT_SHIFT 9 -#define AM33XX_ST_DPLL_CLKOUT_MASK (1 << 9) - -/* Used by CM_DIV_M4_DPLL_CORE */ -#define AM33XX_ST_HSDIVIDER_CLKOUT1_SHIFT 9 -#define AM33XX_ST_HSDIVIDER_CLKOUT1_MASK (1 << 9) - -/* Used by CM_DIV_M5_DPLL_CORE */ -#define AM33XX_ST_HSDIVIDER_CLKOUT2_SHIFT 9 -#define AM33XX_ST_HSDIVIDER_CLKOUT2_MASK (1 << 9) - -/* Used by CM_DIV_M6_DPLL_CORE */ -#define AM33XX_ST_HSDIVIDER_CLKOUT3_SHIFT 9 -#define AM33XX_ST_HSDIVIDER_CLKOUT3_MASK (1 << 9) - -/* - * Used by CM_IDLEST_DPLL_CORE, CM_IDLEST_DPLL_DDR, CM_IDLEST_DPLL_DISP, - * CM_IDLEST_DPLL_MPU, CM_IDLEST_DPLL_PER - */ -#define AM33XX_ST_MN_BYPASS_SHIFT 8 -#define AM33XX_ST_MN_BYPASS_MASK (1 << 8) - -/* Used by CM_WKUP_DEBUGSS_CLKCTRL */ -#define AM33XX_TRC_PMD_CLKDIVSEL_SHIFT 24 -#define AM33XX_TRC_PMD_CLKDIVSEL_MASK (0x26 << 24) - -/* Used by CM_WKUP_DEBUGSS_CLKCTRL */ -#define AM33XX_TRC_PMD_CLKSEL_SHIFT 20 -#define AM33XX_TRC_PMD_CLKSEL_MASK (0x21 << 20) - -/* Used by CONTROL_SEC_CLK_CTRL */ -#define AM33XX_TIMER0_CLKSEL_MASK (0x3 << 4) -#endif diff --git a/trunk/arch/arm/mach-omap2/cm33xx.c b/trunk/arch/arm/mach-omap2/cm33xx.c deleted file mode 100644 index 13f56eafef03..000000000000 --- a/trunk/arch/arm/mach-omap2/cm33xx.c +++ /dev/null @@ -1,313 +0,0 @@ -/* - * AM33XX CM functions - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * Vaibhav Hiremath - * - * Reference taken from from OMAP4 cminst44xx.c - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -#include - -#include "cm.h" -#include "cm33xx.h" -#include "cm-regbits-34xx.h" -#include "cm-regbits-33xx.h" -#include "prm33xx.h" - -/* - * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: - * - * 0x0 func: Module is fully functional, including OCP - * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep - * abortion - * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if - * using separate functional clock - * 0x3 disabled: Module is disabled and cannot be accessed - * - */ -#define CLKCTRL_IDLEST_FUNCTIONAL 0x0 -#define CLKCTRL_IDLEST_INTRANSITION 0x1 -#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 -#define CLKCTRL_IDLEST_DISABLED 0x3 - -/* Private functions */ - -/* Read a register in a CM instance */ -static inline u32 am33xx_cm_read_reg(s16 inst, u16 idx) -{ - return __raw_readl(cm_base + inst + idx); -} - -/* Write into a register in a CM */ -static inline void am33xx_cm_write_reg(u32 val, s16 inst, u16 idx) -{ - __raw_writel(val, cm_base + inst + idx); -} - -/* Read-modify-write a register in CM */ -static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx) -{ - u32 v; - - v = am33xx_cm_read_reg(inst, idx); - v &= ~mask; - v |= bits; - am33xx_cm_write_reg(v, inst, idx); - - return v; -} - -static inline u32 am33xx_cm_set_reg_bits(u32 bits, s16 inst, s16 idx) -{ - return am33xx_cm_rmw_reg_bits(bits, bits, inst, idx); -} - -static inline u32 am33xx_cm_clear_reg_bits(u32 bits, s16 inst, s16 idx) -{ - return am33xx_cm_rmw_reg_bits(bits, 0x0, inst, idx); -} - -static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask) -{ - u32 v; - - v = am33xx_cm_read_reg(inst, idx); - v &= mask; - v >>= __ffs(mask); - - return v; -} - -/** - * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) - * - * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to - * bit 0. - */ -static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs) -{ - u32 v = am33xx_cm_read_reg(inst, clkctrl_offs); - v &= AM33XX_IDLEST_MASK; - v >>= AM33XX_IDLEST_SHIFT; - return v; -} - -/** - * _is_module_ready - can module registers be accessed without causing an abort? - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) - * - * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either - * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise. - */ -static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs) -{ - u32 v; - - v = _clkctrl_idlest(inst, cdoffs, clkctrl_offs); - - return (v == CLKCTRL_IDLEST_FUNCTIONAL || - v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; -} - -/** - * _clktrctrl_write - write @c to a CM_CLKSTCTRL.CLKTRCTRL register bitfield - * @c: CLKTRCTRL register bitfield (LSB = bit 0, i.e., unshifted) - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * - * @c must be the unshifted value for CLKTRCTRL - i.e., this function - * will handle the shift itself. - */ -static void _clktrctrl_write(u8 c, s16 inst, u16 cdoffs) -{ - u32 v; - - v = am33xx_cm_read_reg(inst, cdoffs); - v &= ~AM33XX_CLKTRCTRL_MASK; - v |= c << AM33XX_CLKTRCTRL_SHIFT; - am33xx_cm_write_reg(v, inst, cdoffs); -} - -/* Public functions */ - -/** - * am33xx_cm_is_clkdm_in_hwsup - is a clockdomain in hwsup idle mode? - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * - * Returns true if the clockdomain referred to by (@inst, @cdoffs) - * is in hardware-supervised idle mode, or 0 otherwise. - */ -bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs) -{ - u32 v; - - v = am33xx_cm_read_reg(inst, cdoffs); - v &= AM33XX_CLKTRCTRL_MASK; - v >>= AM33XX_CLKTRCTRL_SHIFT; - - return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? true : false; -} - -/** - * am33xx_cm_clkdm_enable_hwsup - put a clockdomain in hwsup-idle mode - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * - * Put a clockdomain referred to by (@inst, @cdoffs) into - * hardware-supervised idle mode. No return value. - */ -void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs) -{ - _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs); -} - -/** - * am33xx_cm_clkdm_disable_hwsup - put a clockdomain in swsup-idle mode - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * - * Put a clockdomain referred to by (@inst, @cdoffs) into - * software-supervised idle mode, i.e., controlled manually by the - * Linux OMAP clockdomain code. No return value. - */ -void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs) -{ - _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs); -} - -/** - * am33xx_cm_clkdm_force_sleep - try to put a clockdomain into idle - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * - * Put a clockdomain referred to by (@inst, @cdoffs) into idle - * No return value. - */ -void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs) -{ - _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs); -} - -/** - * am33xx_cm_clkdm_force_wakeup - try to take a clockdomain out of idle - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * - * Take a clockdomain referred to by (@inst, @cdoffs) out of idle, - * waking it up. No return value. - */ -void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs) -{ - _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs); -} - -/* - * - */ - -/** - * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) - * - * Wait for the module IDLEST to be functional. If the idle state is in any - * the non functional state (trans, idle or disabled), module and thus the - * sysconfig cannot be accessed and will probably lead to an "imprecise - * external abort" - */ -int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs) -{ - int i = 0; - - if (!clkctrl_offs) - return 0; - - omap_test_timeout(_is_module_ready(inst, cdoffs, clkctrl_offs), - MAX_MODULE_READY_TIME, i); - - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; -} - -/** - * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled' - * state - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) - * - * Wait for the module IDLEST to be disabled. Some PRCM transition, - * like reset assertion or parent clock de-activation must wait the - * module to be fully disabled. - */ -int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, u16 clkctrl_offs) -{ - int i = 0; - - if (!clkctrl_offs) - return 0; - - omap_test_timeout((_clkctrl_idlest(inst, cdoffs, clkctrl_offs) == - CLKCTRL_IDLEST_DISABLED), - MAX_MODULE_READY_TIME, i); - - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; -} - -/** - * am33xx_cm_module_enable - Enable the modulemode inside CLKCTRL - * @mode: Module mode (SW or HW) - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) - * - * No return value. - */ -void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, u16 clkctrl_offs) -{ - u32 v; - - v = am33xx_cm_read_reg(inst, clkctrl_offs); - v &= ~AM33XX_MODULEMODE_MASK; - v |= mode << AM33XX_MODULEMODE_SHIFT; - am33xx_cm_write_reg(v, inst, clkctrl_offs); -} - -/** - * am33xx_cm_module_disable - Disable the module inside CLKCTRL - * @inst: CM instance register offset (*_INST macro) - * @cdoffs: Clockdomain register offset (*_CDOFFS macro) - * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) - * - * No return value. - */ -void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs) -{ - u32 v; - - v = am33xx_cm_read_reg(inst, clkctrl_offs); - v &= ~AM33XX_MODULEMODE_MASK; - am33xx_cm_write_reg(v, inst, clkctrl_offs); -} diff --git a/trunk/arch/arm/mach-omap2/cm33xx.h b/trunk/arch/arm/mach-omap2/cm33xx.h deleted file mode 100644 index 5fa0b62e1a79..000000000000 --- a/trunk/arch/arm/mach-omap2/cm33xx.h +++ /dev/null @@ -1,420 +0,0 @@ -/* - * AM33XX CM offset macros - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * Vaibhav Hiremath - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H -#define __ARCH_ARM_MACH_OMAP2_CM_33XX_H - -#include -#include -#include -#include - -#include "common.h" - -#include "cm.h" -#include "cm-regbits-33xx.h" -#include "cm33xx.h" - -/* CM base address */ -#define AM33XX_CM_BASE 0x44e00000 - -#define AM33XX_CM_REGADDR(inst, reg) \ - AM33XX_L4_WK_IO_ADDRESS(AM33XX_CM_BASE + (inst) + (reg)) - -/* CM instances */ -#define AM33XX_CM_PER_MOD 0x0000 -#define AM33XX_CM_WKUP_MOD 0x0400 -#define AM33XX_CM_DPLL_MOD 0x0500 -#define AM33XX_CM_MPU_MOD 0x0600 -#define AM33XX_CM_DEVICE_MOD 0x0700 -#define AM33XX_CM_RTC_MOD 0x0800 -#define AM33XX_CM_GFX_MOD 0x0900 -#define AM33XX_CM_CEFUSE_MOD 0x0A00 - -/* CM */ - -/* CM.PER_CM register offsets */ -#define AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET 0x0000 -#define AM33XX_CM_PER_L4LS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0000) -#define AM33XX_CM_PER_L3S_CLKSTCTRL_OFFSET 0x0004 -#define AM33XX_CM_PER_L3S_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0004) -#define AM33XX_CM_PER_L4FW_CLKSTCTRL_OFFSET 0x0008 -#define AM33XX_CM_PER_L4FW_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0008) -#define AM33XX_CM_PER_L3_CLKSTCTRL_OFFSET 0x000c -#define AM33XX_CM_PER_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x000c) -#define AM33XX_CM_PER_CPGMAC0_CLKCTRL_OFFSET 0x0014 -#define AM33XX_CM_PER_CPGMAC0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0014) -#define AM33XX_CM_PER_LCDC_CLKCTRL_OFFSET 0x0018 -#define AM33XX_CM_PER_LCDC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0018) -#define AM33XX_CM_PER_USB0_CLKCTRL_OFFSET 0x001c -#define AM33XX_CM_PER_USB0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x001c) -#define AM33XX_CM_PER_MLB_CLKCTRL_OFFSET 0x0020 -#define AM33XX_CM_PER_MLB_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0020) -#define AM33XX_CM_PER_TPTC0_CLKCTRL_OFFSET 0x0024 -#define AM33XX_CM_PER_TPTC0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0024) -#define AM33XX_CM_PER_EMIF_CLKCTRL_OFFSET 0x0028 -#define AM33XX_CM_PER_EMIF_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0028) -#define AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET 0x002c -#define AM33XX_CM_PER_OCMCRAM_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x002c) -#define AM33XX_CM_PER_GPMC_CLKCTRL_OFFSET 0x0030 -#define AM33XX_CM_PER_GPMC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0030) -#define AM33XX_CM_PER_MCASP0_CLKCTRL_OFFSET 0x0034 -#define AM33XX_CM_PER_MCASP0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0034) -#define AM33XX_CM_PER_UART5_CLKCTRL_OFFSET 0x0038 -#define AM33XX_CM_PER_UART5_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0038) -#define AM33XX_CM_PER_MMC0_CLKCTRL_OFFSET 0x003c -#define AM33XX_CM_PER_MMC0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x003c) -#define AM33XX_CM_PER_ELM_CLKCTRL_OFFSET 0x0040 -#define AM33XX_CM_PER_ELM_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0040) -#define AM33XX_CM_PER_I2C2_CLKCTRL_OFFSET 0x0044 -#define AM33XX_CM_PER_I2C2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0044) -#define AM33XX_CM_PER_I2C1_CLKCTRL_OFFSET 0x0048 -#define AM33XX_CM_PER_I2C1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0048) -#define AM33XX_CM_PER_SPI0_CLKCTRL_OFFSET 0x004c -#define AM33XX_CM_PER_SPI0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x004c) -#define AM33XX_CM_PER_SPI1_CLKCTRL_OFFSET 0x0050 -#define AM33XX_CM_PER_SPI1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0050) -#define AM33XX_CM_PER_SPI2_CLKCTRL_OFFSET 0x0054 -#define AM33XX_CM_PER_SPI2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0054) -#define AM33XX_CM_PER_SPI3_CLKCTRL_OFFSET 0x0058 -#define AM33XX_CM_PER_SPI3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0058) -#define AM33XX_CM_PER_L4LS_CLKCTRL_OFFSET 0x0060 -#define AM33XX_CM_PER_L4LS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0060) -#define AM33XX_CM_PER_L4FW_CLKCTRL_OFFSET 0x0064 -#define AM33XX_CM_PER_L4FW_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0064) -#define AM33XX_CM_PER_MCASP1_CLKCTRL_OFFSET 0x0068 -#define AM33XX_CM_PER_MCASP1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0068) -#define AM33XX_CM_PER_UART1_CLKCTRL_OFFSET 0x006c -#define AM33XX_CM_PER_UART1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x006c) -#define AM33XX_CM_PER_UART2_CLKCTRL_OFFSET 0x0070 -#define AM33XX_CM_PER_UART2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0070) -#define AM33XX_CM_PER_UART3_CLKCTRL_OFFSET 0x0074 -#define AM33XX_CM_PER_UART3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0074) -#define AM33XX_CM_PER_UART4_CLKCTRL_OFFSET 0x0078 -#define AM33XX_CM_PER_UART4_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0078) -#define AM33XX_CM_PER_TIMER7_CLKCTRL_OFFSET 0x007c -#define AM33XX_CM_PER_TIMER7_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x007c) -#define AM33XX_CM_PER_TIMER2_CLKCTRL_OFFSET 0x0080 -#define AM33XX_CM_PER_TIMER2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0080) -#define AM33XX_CM_PER_TIMER3_CLKCTRL_OFFSET 0x0084 -#define AM33XX_CM_PER_TIMER3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0084) -#define AM33XX_CM_PER_TIMER4_CLKCTRL_OFFSET 0x0088 -#define AM33XX_CM_PER_TIMER4_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0088) -#define AM33XX_CM_PER_MCASP2_CLKCTRL_OFFSET 0x008c -#define AM33XX_CM_PER_MCASP2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x008c) -#define AM33XX_CM_PER_RNG_CLKCTRL_OFFSET 0x0090 -#define AM33XX_CM_PER_RNG_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0090) -#define AM33XX_CM_PER_AES0_CLKCTRL_OFFSET 0x0094 -#define AM33XX_CM_PER_AES0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0094) -#define AM33XX_CM_PER_AES1_CLKCTRL_OFFSET 0x0098 -#define AM33XX_CM_PER_AES1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0098) -#define AM33XX_CM_PER_DES_CLKCTRL_OFFSET 0x009c -#define AM33XX_CM_PER_DES_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x009c) -#define AM33XX_CM_PER_SHA0_CLKCTRL_OFFSET 0x00a0 -#define AM33XX_CM_PER_SHA0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00a0) -#define AM33XX_CM_PER_PKA_CLKCTRL_OFFSET 0x00a4 -#define AM33XX_CM_PER_PKA_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00a4) -#define AM33XX_CM_PER_GPIO6_CLKCTRL_OFFSET 0x00a8 -#define AM33XX_CM_PER_GPIO6_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00a8) -#define AM33XX_CM_PER_GPIO1_CLKCTRL_OFFSET 0x00ac -#define AM33XX_CM_PER_GPIO1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00ac) -#define AM33XX_CM_PER_GPIO2_CLKCTRL_OFFSET 0x00b0 -#define AM33XX_CM_PER_GPIO2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00b0) -#define AM33XX_CM_PER_GPIO3_CLKCTRL_OFFSET 0x00b4 -#define AM33XX_CM_PER_GPIO3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00b4) -#define AM33XX_CM_PER_GPIO4_CLKCTRL_OFFSET 0x00b8 -#define AM33XX_CM_PER_GPIO4_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00b8) -#define AM33XX_CM_PER_TPCC_CLKCTRL_OFFSET 0x00bc -#define AM33XX_CM_PER_TPCC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00bc) -#define AM33XX_CM_PER_DCAN0_CLKCTRL_OFFSET 0x00c0 -#define AM33XX_CM_PER_DCAN0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00c0) -#define AM33XX_CM_PER_DCAN1_CLKCTRL_OFFSET 0x00c4 -#define AM33XX_CM_PER_DCAN1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00c4) -#define AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET 0x00cc -#define AM33XX_CM_PER_EPWMSS1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00cc) -#define AM33XX_CM_PER_EMIF_FW_CLKCTRL_OFFSET 0x00d0 -#define AM33XX_CM_PER_EMIF_FW_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00d0) -#define AM33XX_CM_PER_EPWMSS0_CLKCTRL_OFFSET 0x00d4 -#define AM33XX_CM_PER_EPWMSS0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00d4) -#define AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET 0x00d8 -#define AM33XX_CM_PER_EPWMSS2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00d8) -#define AM33XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET 0x00dc -#define AM33XX_CM_PER_L3_INSTR_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00dc) -#define AM33XX_CM_PER_L3_CLKCTRL_OFFSET 0x00e0 -#define AM33XX_CM_PER_L3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00e0) -#define AM33XX_CM_PER_IEEE5000_CLKCTRL_OFFSET 0x00e4 -#define AM33XX_CM_PER_IEEE5000_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00e4) -#define AM33XX_CM_PER_PRUSS_CLKCTRL_OFFSET 0x00e8 -#define AM33XX_CM_PER_PRUSS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00e8) -#define AM33XX_CM_PER_TIMER5_CLKCTRL_OFFSET 0x00ec -#define AM33XX_CM_PER_TIMER5_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00ec) -#define AM33XX_CM_PER_TIMER6_CLKCTRL_OFFSET 0x00f0 -#define AM33XX_CM_PER_TIMER6_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00f0) -#define AM33XX_CM_PER_MMC1_CLKCTRL_OFFSET 0x00f4 -#define AM33XX_CM_PER_MMC1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00f4) -#define AM33XX_CM_PER_MMC2_CLKCTRL_OFFSET 0x00f8 -#define AM33XX_CM_PER_MMC2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00f8) -#define AM33XX_CM_PER_TPTC1_CLKCTRL_OFFSET 0x00fc -#define AM33XX_CM_PER_TPTC1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00fc) -#define AM33XX_CM_PER_TPTC2_CLKCTRL_OFFSET 0x0100 -#define AM33XX_CM_PER_TPTC2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0100) -#define AM33XX_CM_PER_GPIO5_CLKCTRL_OFFSET 0x0104 -#define AM33XX_CM_PER_GPIO5_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0104) -#define AM33XX_CM_PER_SPINLOCK_CLKCTRL_OFFSET 0x010c -#define AM33XX_CM_PER_SPINLOCK_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x010c) -#define AM33XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET 0x0110 -#define AM33XX_CM_PER_MAILBOX0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0110) -#define AM33XX_CM_PER_L4HS_CLKSTCTRL_OFFSET 0x011c -#define AM33XX_CM_PER_L4HS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x011c) -#define AM33XX_CM_PER_L4HS_CLKCTRL_OFFSET 0x0120 -#define AM33XX_CM_PER_L4HS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0120) -#define AM33XX_CM_PER_MSTR_EXPS_CLKCTRL_OFFSET 0x0124 -#define AM33XX_CM_PER_MSTR_EXPS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0124) -#define AM33XX_CM_PER_SLV_EXPS_CLKCTRL_OFFSET 0x0128 -#define AM33XX_CM_PER_SLV_EXPS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0128) -#define AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL_OFFSET 0x012c -#define AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x012c) -#define AM33XX_CM_PER_OCPWP_CLKCTRL_OFFSET 0x0130 -#define AM33XX_CM_PER_OCPWP_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0130) -#define AM33XX_CM_PER_MAILBOX1_CLKCTRL_OFFSET 0x0134 -#define AM33XX_CM_PER_MAILBOX1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0134) -#define AM33XX_CM_PER_PRUSS_CLKSTCTRL_OFFSET 0x0140 -#define AM33XX_CM_PER_PRUSS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0140) -#define AM33XX_CM_PER_CPSW_CLKSTCTRL_OFFSET 0x0144 -#define AM33XX_CM_PER_CPSW_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0144) -#define AM33XX_CM_PER_LCDC_CLKSTCTRL_OFFSET 0x0148 -#define AM33XX_CM_PER_LCDC_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0148) -#define AM33XX_CM_PER_CLKDIV32K_CLKCTRL_OFFSET 0x014c -#define AM33XX_CM_PER_CLKDIV32K_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x014c) -#define AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL_OFFSET 0x0150 -#define AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0150) - -/* CM.WKUP_CM register offsets */ -#define AM33XX_CM_WKUP_CLKSTCTRL_OFFSET 0x0000 -#define AM33XX_CM_WKUP_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0000) -#define AM33XX_CM_WKUP_CONTROL_CLKCTRL_OFFSET 0x0004 -#define AM33XX_CM_WKUP_CONTROL_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0004) -#define AM33XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET 0x0008 -#define AM33XX_CM_WKUP_GPIO0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0008) -#define AM33XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x000c -#define AM33XX_CM_WKUP_L4WKUP_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x000c) -#define AM33XX_CM_WKUP_TIMER0_CLKCTRL_OFFSET 0x0010 -#define AM33XX_CM_WKUP_TIMER0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0010) -#define AM33XX_CM_WKUP_DEBUGSS_CLKCTRL_OFFSET 0x0014 -#define AM33XX_CM_WKUP_DEBUGSS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0014) -#define AM33XX_CM_L3_AON_CLKSTCTRL_OFFSET 0x0018 -#define AM33XX_CM_L3_AON_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0018) -#define AM33XX_CM_AUTOIDLE_DPLL_MPU_OFFSET 0x001c -#define AM33XX_CM_AUTOIDLE_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x001c) -#define AM33XX_CM_IDLEST_DPLL_MPU_OFFSET 0x0020 -#define AM33XX_CM_IDLEST_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0020) -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0024 -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0024) -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET 0x0028 -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0028) -#define AM33XX_CM_CLKSEL_DPLL_MPU_OFFSET 0x002c -#define AM33XX_CM_CLKSEL_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x002c) -#define AM33XX_CM_AUTOIDLE_DPLL_DDR_OFFSET 0x0030 -#define AM33XX_CM_AUTOIDLE_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0030) -#define AM33XX_CM_IDLEST_DPLL_DDR_OFFSET 0x0034 -#define AM33XX_CM_IDLEST_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0034) -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_DDR_OFFSET 0x0038 -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0038) -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_DDR_OFFSET 0x003c -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x003c) -#define AM33XX_CM_CLKSEL_DPLL_DDR_OFFSET 0x0040 -#define AM33XX_CM_CLKSEL_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0040) -#define AM33XX_CM_AUTOIDLE_DPLL_DISP_OFFSET 0x0044 -#define AM33XX_CM_AUTOIDLE_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0044) -#define AM33XX_CM_IDLEST_DPLL_DISP_OFFSET 0x0048 -#define AM33XX_CM_IDLEST_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0048) -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_DISP_OFFSET 0x004c -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x004c) -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_DISP_OFFSET 0x0050 -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0050) -#define AM33XX_CM_CLKSEL_DPLL_DISP_OFFSET 0x0054 -#define AM33XX_CM_CLKSEL_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0054) -#define AM33XX_CM_AUTOIDLE_DPLL_CORE_OFFSET 0x0058 -#define AM33XX_CM_AUTOIDLE_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0058) -#define AM33XX_CM_IDLEST_DPLL_CORE_OFFSET 0x005c -#define AM33XX_CM_IDLEST_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x005c) -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0060 -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0060) -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x0064 -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0064) -#define AM33XX_CM_CLKSEL_DPLL_CORE_OFFSET 0x0068 -#define AM33XX_CM_CLKSEL_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0068) -#define AM33XX_CM_AUTOIDLE_DPLL_PER_OFFSET 0x006c -#define AM33XX_CM_AUTOIDLE_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x006c) -#define AM33XX_CM_IDLEST_DPLL_PER_OFFSET 0x0070 -#define AM33XX_CM_IDLEST_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0070) -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0074 -#define AM33XX_CM_SSC_DELTAMSTEP_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0074) -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x0078 -#define AM33XX_CM_SSC_MODFREQDIV_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0078) -#define AM33XX_CM_CLKDCOLDO_DPLL_PER_OFFSET 0x007c -#define AM33XX_CM_CLKDCOLDO_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x007c) -#define AM33XX_CM_DIV_M4_DPLL_CORE_OFFSET 0x0080 -#define AM33XX_CM_DIV_M4_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0080) -#define AM33XX_CM_DIV_M5_DPLL_CORE_OFFSET 0x0084 -#define AM33XX_CM_DIV_M5_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0084) -#define AM33XX_CM_CLKMODE_DPLL_MPU_OFFSET 0x0088 -#define AM33XX_CM_CLKMODE_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0088) -#define AM33XX_CM_CLKMODE_DPLL_PER_OFFSET 0x008c -#define AM33XX_CM_CLKMODE_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x008c) -#define AM33XX_CM_CLKMODE_DPLL_CORE_OFFSET 0x0090 -#define AM33XX_CM_CLKMODE_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0090) -#define AM33XX_CM_CLKMODE_DPLL_DDR_OFFSET 0x0094 -#define AM33XX_CM_CLKMODE_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0094) -#define AM33XX_CM_CLKMODE_DPLL_DISP_OFFSET 0x0098 -#define AM33XX_CM_CLKMODE_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0098) -#define AM33XX_CM_CLKSEL_DPLL_PERIPH_OFFSET 0x009c -#define AM33XX_CM_CLKSEL_DPLL_PERIPH AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x009c) -#define AM33XX_CM_DIV_M2_DPLL_DDR_OFFSET 0x00a0 -#define AM33XX_CM_DIV_M2_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00a0) -#define AM33XX_CM_DIV_M2_DPLL_DISP_OFFSET 0x00a4 -#define AM33XX_CM_DIV_M2_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00a4) -#define AM33XX_CM_DIV_M2_DPLL_MPU_OFFSET 0x00a8 -#define AM33XX_CM_DIV_M2_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00a8) -#define AM33XX_CM_DIV_M2_DPLL_PER_OFFSET 0x00ac -#define AM33XX_CM_DIV_M2_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00ac) -#define AM33XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET 0x00b0 -#define AM33XX_CM_WKUP_WKUP_M3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00b0) -#define AM33XX_CM_WKUP_UART0_CLKCTRL_OFFSET 0x00b4 -#define AM33XX_CM_WKUP_UART0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00b4) -#define AM33XX_CM_WKUP_I2C0_CLKCTRL_OFFSET 0x00b8 -#define AM33XX_CM_WKUP_I2C0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00b8) -#define AM33XX_CM_WKUP_ADC_TSC_CLKCTRL_OFFSET 0x00bc -#define AM33XX_CM_WKUP_ADC_TSC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00bc) -#define AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET 0x00c0 -#define AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00c0) -#define AM33XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x00c4 -#define AM33XX_CM_WKUP_TIMER1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00c4) -#define AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET 0x00c8 -#define AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00c8) -#define AM33XX_CM_L4_WKUP_AON_CLKSTCTRL_OFFSET 0x00cc -#define AM33XX_CM_L4_WKUP_AON_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00cc) -#define AM33XX_CM_WKUP_WDT0_CLKCTRL_OFFSET 0x00d0 -#define AM33XX_CM_WKUP_WDT0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00d0) -#define AM33XX_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x00d4 -#define AM33XX_CM_WKUP_WDT1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00d4) -#define AM33XX_CM_DIV_M6_DPLL_CORE_OFFSET 0x00d8 -#define AM33XX_CM_DIV_M6_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00d8) - -/* CM.DPLL_CM register offsets */ -#define AM33XX_CLKSEL_TIMER7_CLK_OFFSET 0x0004 -#define AM33XX_CLKSEL_TIMER7_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0004) -#define AM33XX_CLKSEL_TIMER2_CLK_OFFSET 0x0008 -#define AM33XX_CLKSEL_TIMER2_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0008) -#define AM33XX_CLKSEL_TIMER3_CLK_OFFSET 0x000c -#define AM33XX_CLKSEL_TIMER3_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x000c) -#define AM33XX_CLKSEL_TIMER4_CLK_OFFSET 0x0010 -#define AM33XX_CLKSEL_TIMER4_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0010) -#define AM33XX_CM_MAC_CLKSEL_OFFSET 0x0014 -#define AM33XX_CM_MAC_CLKSEL AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0014) -#define AM33XX_CLKSEL_TIMER5_CLK_OFFSET 0x0018 -#define AM33XX_CLKSEL_TIMER5_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0018) -#define AM33XX_CLKSEL_TIMER6_CLK_OFFSET 0x001c -#define AM33XX_CLKSEL_TIMER6_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x001c) -#define AM33XX_CM_CPTS_RFT_CLKSEL_OFFSET 0x0020 -#define AM33XX_CM_CPTS_RFT_CLKSEL AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0020) -#define AM33XX_CLKSEL_TIMER1MS_CLK_OFFSET 0x0028 -#define AM33XX_CLKSEL_TIMER1MS_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0028) -#define AM33XX_CLKSEL_GFX_FCLK_OFFSET 0x002c -#define AM33XX_CLKSEL_GFX_FCLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x002c) -#define AM33XX_CLKSEL_PRUSS_OCP_CLK_OFFSET 0x0030 -#define AM33XX_CLKSEL_PRUSS_OCP_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0030) -#define AM33XX_CLKSEL_LCDC_PIXEL_CLK_OFFSET 0x0034 -#define AM33XX_CLKSEL_LCDC_PIXEL_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0034) -#define AM33XX_CLKSEL_WDT1_CLK_OFFSET 0x0038 -#define AM33XX_CLKSEL_WDT1_CLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x0038) -#define AM33XX_CLKSEL_GPIO0_DBCLK_OFFSET 0x003c -#define AM33XX_CLKSEL_GPIO0_DBCLK AM33XX_CM_REGADDR(AM33XX_CM_DPLL_MOD, 0x003c) - -/* CM.MPU_CM register offsets */ -#define AM33XX_CM_MPU_CLKSTCTRL_OFFSET 0x0000 -#define AM33XX_CM_MPU_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_MPU_MOD, 0x0000) -#define AM33XX_CM_MPU_MPU_CLKCTRL_OFFSET 0x0004 -#define AM33XX_CM_MPU_MPU_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_MPU_MOD, 0x0004) - -/* CM.DEVICE_CM register offsets */ -#define AM33XX_CM_CLKOUT_CTRL_OFFSET 0x0000 -#define AM33XX_CM_CLKOUT_CTRL AM33XX_CM_REGADDR(AM33XX_CM_DEVICE_MOD, 0x0000) - -/* CM.RTC_CM register offsets */ -#define AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET 0x0000 -#define AM33XX_CM_RTC_RTC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_RTC_MOD, 0x0000) -#define AM33XX_CM_RTC_CLKSTCTRL_OFFSET 0x0004 -#define AM33XX_CM_RTC_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_RTC_MOD, 0x0004) - -/* CM.GFX_CM register offsets */ -#define AM33XX_CM_GFX_L3_CLKSTCTRL_OFFSET 0x0000 -#define AM33XX_CM_GFX_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x0000) -#define AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET 0x0004 -#define AM33XX_CM_GFX_GFX_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x0004) -#define AM33XX_CM_GFX_BITBLT_CLKCTRL_OFFSET 0x0008 -#define AM33XX_CM_GFX_BITBLT_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x0008) -#define AM33XX_CM_GFX_L4LS_GFX_CLKSTCTRL__1_OFFSET 0x000c -#define AM33XX_CM_GFX_L4LS_GFX_CLKSTCTRL__1 AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x000c) -#define AM33XX_CM_GFX_MMUCFG_CLKCTRL_OFFSET 0x0010 -#define AM33XX_CM_GFX_MMUCFG_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x0010) -#define AM33XX_CM_GFX_MMUDATA_CLKCTRL_OFFSET 0x0014 -#define AM33XX_CM_GFX_MMUDATA_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x0014) - -/* CM.CEFUSE_CM register offsets */ -#define AM33XX_CM_CEFUSE_CLKSTCTRL_OFFSET 0x0000 -#define AM33XX_CM_CEFUSE_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_CEFUSE_MOD, 0x0000) -#define AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020 -#define AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_CEFUSE_MOD, 0x0020) - - -extern bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs); -extern void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs); -extern void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs); -extern void am33xx_cm_clkdm_force_sleep(s16 inst, u16 cdoffs); -extern void am33xx_cm_clkdm_force_wakeup(s16 inst, u16 cdoffs); - -#ifdef CONFIG_SOC_AM33XX -extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, - u16 clkctrl_offs); -extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, - u16 clkctrl_offs); -extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs, - u16 clkctrl_offs); -extern int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, - u16 clkctrl_offs); -#else -static inline int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ - return 0; -} -static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ -} -static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ -} -static inline int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ - return 0; -} -#endif - -#endif diff --git a/trunk/arch/arm/mach-omap2/cminst44xx.c b/trunk/arch/arm/mach-omap2/cminst44xx.c index 1894015ff04b..1a39945d9ff8 100644 --- a/trunk/arch/arm/mach-omap2/cminst44xx.c +++ b/trunk/arch/arm/mach-omap2/cminst44xx.c @@ -234,6 +234,20 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs) _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs); } +/** + * omap4_cminst_clkdm_force_sleep - try to put a clockdomain into idle + * @part: PRCM partition ID that the clockdomain registers exist in + * @inst: CM instance register offset (*_INST macro) + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) + * + * Put a clockdomain referred to by (@part, @inst, @cdoffs) into idle + * No return value. + */ +void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs) +{ + _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs); +} + /** * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle * @part: PRCM partition ID that the clockdomain registers exist in diff --git a/trunk/arch/arm/mach-omap2/cminst44xx.h b/trunk/arch/arm/mach-omap2/cminst44xx.h index d69fdefef985..a018a7327879 100644 --- a/trunk/arch/arm/mach-omap2/cminst44xx.h +++ b/trunk/arch/arm/mach-omap2/cminst44xx.h @@ -16,13 +16,38 @@ extern void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); + extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); + +# ifdef CONFIG_ARCH_OMAP4 extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); + extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); + +# else + +static inline int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, + u16 clkctrl_offs) +{ + return 0; +} + +static inline void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, + s16 cdoffs, u16 clkctrl_offs) +{ +} + +static inline void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, + u16 clkctrl_offs) +{ +} + +# endif + /* * In an ideal world, we would not export these low-level functions, * but this will probably take some time to fix properly diff --git a/trunk/arch/arm/mach-omap2/common.c b/trunk/arch/arm/mach-omap2/common.c index 73d2a0b9ca04..8a6953a34fe2 100644 --- a/trunk/arch/arm/mach-omap2/common.c +++ b/trunk/arch/arm/mach-omap2/common.c @@ -29,6 +29,8 @@ /* Global address base setup code */ +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) + static void __init __omap2_set_globals(struct omap_globals *omap2_globals) { omap2_set_globals_tap(omap2_globals); @@ -37,6 +39,8 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals) omap2_set_globals_prcm(omap2_globals); } +#endif + #if defined(CONFIG_SOC_OMAP2420) static struct omap_globals omap242x_globals = { @@ -130,9 +134,7 @@ void __init ti81xx_map_io(void) { omapti81xx_map_common_io(); } -#endif -#if defined(CONFIG_SOC_AM33XX) #define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \ TI81XX_CONTROL_DEVICE_ID - 0x204) @@ -169,7 +171,9 @@ static struct omap_globals omap4_globals = { void __init omap2_set_globals_443x(void) { - __omap2_set_globals(&omap4_globals); + omap2_set_globals_tap(&omap4_globals); + omap2_set_globals_control(&omap4_globals); + omap2_set_globals_prcm(&omap4_globals); } void __init omap4_map_io(void) diff --git a/trunk/arch/arm/mach-omap2/common.h b/trunk/arch/arm/mach-omap2/common.h index 404f172d95a8..be9dfd1abe60 100644 --- a/trunk/arch/arm/mach-omap2/common.h +++ b/trunk/arch/arm/mach-omap2/common.h @@ -120,7 +120,6 @@ extern void omap2_init_common_infrastructure(void); extern struct sys_timer omap2_timer; extern struct sys_timer omap3_timer; extern struct sys_timer omap3_secure_timer; -extern struct sys_timer omap3_am33xx_timer; extern struct sys_timer omap4_timer; void omap2420_init_early(void); @@ -129,10 +128,8 @@ void omap3430_init_early(void); void omap35xx_init_early(void); void omap3630_init_early(void); void omap3_init_early(void); /* Do not use this one */ -void am33xx_init_early(void); void am35xx_init_early(void); void ti81xx_init_early(void); -void am33xx_init_early(void); void omap4430_init_early(void); void omap3_init_late(void); /* Do not use this one */ void omap4430_init_late(void); @@ -174,12 +171,7 @@ void omap2_set_globals_am33xx(void); /* These get called from omap2_set_globals_xxxx(), do not call these */ void omap2_set_globals_tap(struct omap_globals *); -#if defined(CONFIG_SOC_HAS_OMAP2_SDRC) void omap2_set_globals_sdrc(struct omap_globals *); -#else -static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals) -{ } -#endif void omap2_set_globals_control(struct omap_globals *); void omap2_set_globals_prcm(struct omap_globals *); diff --git a/trunk/arch/arm/mach-omap2/control.c b/trunk/arch/arm/mach-omap2/control.c index 3223b81e7532..08e674bb0417 100644 --- a/trunk/arch/arm/mach-omap2/control.c +++ b/trunk/arch/arm/mach-omap2/control.c @@ -241,49 +241,6 @@ void omap3_ctrl_write_boot_mode(u8 bootmode) #endif -/** - * omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor - * @bootaddr: physical address of the boot loader - * - * Set boot address for the boot loader of a supported processor - * when a power ON sequence occurs. - */ -void omap_ctrl_write_dsp_boot_addr(u32 bootaddr) -{ - u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR : - cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR : - cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR : - 0; - - if (!offset) { - pr_err("%s: unsupported omap type\n", __func__); - return; - } - - omap_ctrl_writel(bootaddr, offset); -} - -/** - * omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor - * @bootmode: 8-bit value to pass to some boot code - * - * Sets boot mode for the boot loader of a supported processor - * when a power ON sequence occurs. - */ -void omap_ctrl_write_dsp_boot_mode(u8 bootmode) -{ - u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD : - cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD : - 0; - - if (!offset) { - pr_err("%s: unsupported omap type\n", __func__); - return; - } - - omap_ctrl_writel(bootmode, offset); -} - #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) /* * Clears the scratchpad contents in case of cold boot- diff --git a/trunk/arch/arm/mach-omap2/control.h b/trunk/arch/arm/mach-omap2/control.h index 295b39047a71..a406fd045ce1 100644 --- a/trunk/arch/arm/mach-omap2/control.h +++ b/trunk/arch/arm/mach-omap2/control.h @@ -21,8 +21,6 @@ #include #include -#include - #ifndef __ASSEMBLY__ #define OMAP242X_CTRL_REGADDR(reg) \ OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) @@ -30,8 +28,6 @@ OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) #define OMAP343X_CTRL_REGADDR(reg) \ OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) -#define AM33XX_CTRL_REGADDR(reg) \ - AM33XX_L4_WK_IO_ADDRESS(AM33XX_SCM_BASE + (reg)) #else #define OMAP242X_CTRL_REGADDR(reg) \ OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) @@ -39,8 +35,6 @@ OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) #define OMAP343X_CTRL_REGADDR(reg) \ OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) -#define AM33XX_CTRL_REGADDR(reg) \ - AM33XX_L4_WK_IO_ADDRESS(AM33XX_SCM_BASE + (reg)) #endif /* __ASSEMBLY__ */ /* @@ -188,7 +182,6 @@ #define OMAP3630_CONTROL_FUSE_OPP120_VDD1 (OMAP2_CONTROL_GENERAL + 0x0120) #define OMAP3630_CONTROL_FUSE_OPP50_VDD2 (OMAP2_CONTROL_GENERAL + 0x0128) #define OMAP3630_CONTROL_FUSE_OPP100_VDD2 (OMAP2_CONTROL_GENERAL + 0x012C) -#define OMAP3630_CONTROL_CAMERA_PHY_CTRL (OMAP2_CONTROL_GENERAL + 0x02f0) /* OMAP44xx control efuse offsets */ #define OMAP44XX_CONTROL_FUSE_IVA_OPP50 0x22C @@ -319,15 +312,15 @@ OMAP343X_SCRATCHPAD + reg) /* AM35XX_CONTROL_IPSS_CLK_CTRL bits */ -#define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0 -#define AM35XX_CPGMAC_VBUSP_CLK_SHIFT 1 -#define AM35XX_VPFE_VBUSP_CLK_SHIFT 2 -#define AM35XX_HECC_VBUSP_CLK_SHIFT 3 -#define AM35XX_USBOTG_FCLK_SHIFT 8 -#define AM35XX_CPGMAC_FCLK_SHIFT 9 -#define AM35XX_VPFE_FCLK_SHIFT 10 - -/* AM35XX CONTROL_LVL_INTR_CLEAR bits */ +#define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0 +#define AM35XX_CPGMAC_VBUSP_CLK_SHIFT 1 +#define AM35XX_VPFE_VBUSP_CLK_SHIFT 2 +#define AM35XX_HECC_VBUSP_CLK_SHIFT 3 +#define AM35XX_USBOTG_FCLK_SHIFT 8 +#define AM35XX_CPGMAC_FCLK_SHIFT 9 +#define AM35XX_VPFE_FCLK_SHIFT 10 + +/*AM35XX CONTROL_LVL_INTR_CLEAR bits*/ #define AM35XX_CPGMAC_C0_MISC_PULSE_CLR BIT(0) #define AM35XX_CPGMAC_C0_RX_PULSE_CLR BIT(1) #define AM35XX_CPGMAC_C0_RX_THRESH_CLR BIT(2) @@ -337,22 +330,21 @@ #define AM35XX_VPFE_CCDC_VD1_INT_CLR BIT(6) #define AM35XX_VPFE_CCDC_VD2_INT_CLR BIT(7) -/* AM35XX CONTROL_IP_SW_RESET bits */ +/*AM35XX CONTROL_IP_SW_RESET bits*/ #define AM35XX_USBOTGSS_SW_RST BIT(0) #define AM35XX_CPGMACSS_SW_RST BIT(1) #define AM35XX_VPFE_VBUSP_SW_RST BIT(2) #define AM35XX_HECC_SW_RST BIT(3) #define AM35XX_VPFE_PCLK_SW_RST BIT(4) -/* AM33XX CONTROL_STATUS register */ +/* + * CONTROL AM33XX STATUS register + */ #define AM33XX_CONTROL_STATUS 0x040 -#define AM33XX_CONTROL_SEC_CLK_CTRL 0x1bc -/* AM33XX CONTROL_STATUS bitfields (partial) */ -#define AM33XX_CONTROL_STATUS_SYSBOOT1_SHIFT 22 -#define AM33XX_CONTROL_STATUS_SYSBOOT1_MASK (0x3 << 22) - -/* CONTROL OMAP STATUS register to identify OMAP3 features */ +/* + * CONTROL OMAP STATUS register to identify OMAP3 features + */ #define OMAP3_CONTROL_OMAP_STATUS 0x044c #define OMAP3_SGX_SHIFT 13 @@ -405,8 +397,6 @@ extern u32 omap3_arm_context[128]; extern void omap3_control_save_context(void); extern void omap3_control_restore_context(void); extern void omap3_ctrl_write_boot_mode(u8 bootmode); -extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr); -extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); extern void omap3630_ctrl_disable_rta(void); extern int omap3_ctrl_save_padconf(void); #else diff --git a/trunk/arch/arm/mach-omap2/dpll3xxx.c b/trunk/arch/arm/mach-omap2/dpll3xxx.c index b9c8d2f6a81f..f0f10beeffe8 100644 --- a/trunk/arch/arm/mach-omap2/dpll3xxx.c +++ b/trunk/arch/arm/mach-omap2/dpll3xxx.c @@ -135,20 +135,11 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n) */ static int _omap3_noncore_dpll_lock(struct clk *clk) { - const struct dpll_data *dd; u8 ai; - u8 state = 1; - int r = 0; + int r; pr_debug("clock: locking DPLL %s\n", clk->name); - dd = clk->dpll_data; - state <<= __ffs(dd->idlest_mask); - - /* Check if already locked */ - if ((__raw_readl(dd->idlest_reg) & dd->idlest_mask) == state) - goto done; - ai = omap3_dpll_autoidle_read(clk); if (ai) @@ -161,7 +152,6 @@ static int _omap3_noncore_dpll_lock(struct clk *clk) if (ai) omap3_dpll_allow_idle(clk); -done: return r; } @@ -638,17 +628,3 @@ unsigned long omap3_clkoutx2_recalc(struct clk *clk) rate = clk->parent->rate * 2; return rate; } - -/* OMAP3/4 non-CORE DPLL clkops */ - -const struct clkops clkops_omap3_noncore_dpll_ops = { - .enable = omap3_noncore_dpll_enable, - .disable = omap3_noncore_dpll_disable, - .allow_idle = omap3_dpll_allow_idle, - .deny_idle = omap3_dpll_deny_idle, -}; - -const struct clkops clkops_omap3_core_dpll_ops = { - .allow_idle = omap3_dpll_allow_idle, - .deny_idle = omap3_dpll_deny_idle, -}; diff --git a/trunk/arch/arm/mach-omap2/dsp.c b/trunk/arch/arm/mach-omap2/dsp.c index a636ebc16b39..88ffa1e645cd 100644 --- a/trunk/arch/arm/mach-omap2/dsp.c +++ b/trunk/arch/arm/mach-omap2/dsp.c @@ -23,7 +23,6 @@ #include -#include "control.h" #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" #ifdef CONFIG_BRIDGE_DVFS @@ -47,9 +46,6 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = { .dsp_cm_read = omap2_cm_read_mod_reg, .dsp_cm_write = omap2_cm_write_mod_reg, .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits, - - .set_bootaddr = omap_ctrl_write_dsp_boot_addr, - .set_bootmode = omap_ctrl_write_dsp_boot_mode, }; static phys_addr_t omap_dsp_phys_mempool_base; diff --git a/trunk/arch/arm/mach-omap2/id.c b/trunk/arch/arm/mach-omap2/id.c index 37eb95aaf2f6..00486a8564fd 100644 --- a/trunk/arch/arm/mach-omap2/id.c +++ b/trunk/arch/arm/mach-omap2/id.c @@ -44,7 +44,7 @@ int omap_type(void) if (cpu_is_omap24xx()) { val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); - } else if (soc_is_am33xx()) { + } else if (cpu_is_am33xx()) { val = omap_ctrl_readl(AM33XX_CONTROL_STATUS); } else if (cpu_is_omap34xx()) { val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); @@ -189,7 +189,7 @@ static void __init omap3_cpuinfo(void) cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; } else if (cpu_is_ti816x()) { cpu_name = "TI816X"; - } else if (soc_is_am335x()) { + } else if (cpu_is_am335x()) { cpu_name = "AM335X"; } else if (cpu_is_ti814x()) { cpu_name = "TI814X"; diff --git a/trunk/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/trunk/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h index 01970824e0e5..2f7ac70a20d8 100644 --- a/trunk/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h +++ b/trunk/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h @@ -42,7 +42,6 @@ #define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268 #define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4 #define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300 -#define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304 #define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314 #define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318 #define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320 diff --git a/trunk/arch/arm/mach-omap2/include/mach/debug-macro.S b/trunk/arch/arm/mach-omap2/include/mach/debug-macro.S index d7f844a99a7b..cdfc2a1f0e75 100644 --- a/trunk/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/trunk/arch/arm/mach-omap2/include/mach/debug-macro.S @@ -72,8 +72,6 @@ omap_uart_lsr: .word 0 beq 82f @ configure UART2 cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different beq 83f @ configure UART3 - cmp \rp, #AM33XXUART1 @ AM33XX UART offsets different - beq 84f @ configure UART1 cmp \rp, #ZOOM_UART @ only on zoom2/3 beq 95f @ configure ZOOM_UART @@ -102,9 +100,7 @@ omap_uart_lsr: .word 0 b 98f 83: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE) b 98f -84: ldr \rp, =AM33XX_UART1_BASE - and \rp, \rp, #0x00ffffff - b 97f + 95: ldr \rp, =ZOOM_UART_BASE str \rp, [\tmp, #0] @ omap_uart_phys ldr \rp, =ZOOM_UART_VIRT @@ -113,17 +109,6 @@ omap_uart_lsr: .word 0 str \rp, [\tmp, #8] @ omap_uart_lsr b 10b - /* AM33XX: Store both phys and virt address for the uart */ -97: add \rp, \rp, #0x44000000 @ phys base - str \rp, [\tmp, #0] @ omap_uart_phys - sub \rp, \rp, #0x44000000 @ phys base - add \rp, \rp, #0xf9000000 @ virt base - str \rp, [\tmp, #4] @ omap_uart_virt - mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) - str \rp, [\tmp, #8] @ omap_uart_lsr - - b 10b - /* Store both phys and virt address for the uart */ 98: add \rp, \rp, #0x48000000 @ phys base str \rp, [\tmp, #0] @ omap_uart_phys diff --git a/trunk/arch/arm/mach-omap2/io.c b/trunk/arch/arm/mach-omap2/io.c index eb007d03ec98..8d014ba04abc 100644 --- a/trunk/arch/arm/mach-omap2/io.c +++ b/trunk/arch/arm/mach-omap2/io.c @@ -38,7 +38,6 @@ #include "powerdomain.h" #include "clockdomain.h" #include "common.h" -#include "clock.h" #include "clock2xxx.h" #include "clock3xxx.h" #include "clock44xx.h" @@ -478,20 +477,6 @@ void __init ti81xx_init_late(void) } #endif -#ifdef CONFIG_SOC_AM33XX -void __init am33xx_init_early(void) -{ - omap2_set_globals_am33xx(); - omap3xxx_check_revision(); - ti81xx_check_features(); - omap_common_init_early(); - am33xx_voltagedomains_init(); - am33xx_powerdomains_init(); - am33xx_clockdomains_init(); - am33xx_clk_init(); -} -#endif - #ifdef CONFIG_ARCH_OMAP4 void __init omap4430_init_early(void) { diff --git a/trunk/arch/arm/mach-omap2/irq.c b/trunk/arch/arm/mach-omap2/irq.c index d5b34febd82d..6038a8c84b74 100644 --- a/trunk/arch/arm/mach-omap2/irq.c +++ b/trunk/arch/arm/mach-omap2/irq.c @@ -280,7 +280,7 @@ int __init omap_intc_of_init(struct device_node *node, return 0; } -#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) +#ifdef CONFIG_ARCH_OMAP3 static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; void omap_intc_save_context(void) diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod.c b/trunk/arch/arm/mach-omap2/omap_hwmod.c index ff76ef1d7232..773193670ea2 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod.c @@ -166,31 +166,6 @@ */ #define LINKS_PER_OCP_IF 2 -/** - * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations - * @enable_module: function to enable a module (via MODULEMODE) - * @disable_module: function to disable a module (via MODULEMODE) - * - * XXX Eventually this functionality will be hidden inside the PRM/CM - * device drivers. Until then, this should avoid huge blocks of cpu_is_*() - * conditionals in this code. - */ -struct omap_hwmod_soc_ops { - void (*enable_module)(struct omap_hwmod *oh); - int (*disable_module)(struct omap_hwmod *oh); - int (*wait_target_ready)(struct omap_hwmod *oh); - int (*assert_hardreset)(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri); - int (*deassert_hardreset)(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri); - int (*is_hardreset_asserted)(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri); - int (*init_clkdm)(struct omap_hwmod *oh); -}; - -/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ -static struct omap_hwmod_soc_ops soc_ops; - /* omap_hwmod_list contains all registered struct omap_hwmods */ static LIST_HEAD(omap_hwmod_list); @@ -211,9 +186,6 @@ static struct omap_hwmod_link *linkspace; */ static unsigned short free_ls, max_ls, ls_supp; -/* inited: set to true once the hwmod code is initialized */ -static bool inited; - /* Private functions */ /** @@ -415,49 +387,6 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v) return 0; } -/** - * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v - * @oh: struct omap_hwmod * - * - * The DMADISABLE bit is a semi-automatic bit present in sysconfig register - * of some modules. When the DMA must perform read/write accesses, the - * DMADISABLE bit is cleared by the hardware. But when the DMA must stop - * for power management, software must set the DMADISABLE bit back to 1. - * - * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon - * error or 0 upon success. - */ -static int _set_dmadisable(struct omap_hwmod *oh) -{ - u32 v; - u32 dmadisable_mask; - - if (!oh->class->sysc || - !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE)) - return -EINVAL; - - if (!oh->class->sysc->sysc_fields) { - WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); - return -EINVAL; - } - - /* clocks must be on for this operation */ - if (oh->_state != _HWMOD_STATE_ENABLED) { - pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name); - return -EINVAL; - } - - pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name); - - v = oh->_sysc_cache; - dmadisable_mask = - (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift); - v |= dmadisable_mask; - _write_sysconfig(v, oh); - - return 0; -} - /** * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v * @oh: struct omap_hwmod * @@ -842,19 +771,23 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } /** - * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 + * _enable_module - enable CLKCTRL modulemode on OMAP4 * @oh: struct omap_hwmod * * * Enables the PRCM module mode related to the hwmod @oh. * No return value. */ -static void _omap4_enable_module(struct omap_hwmod *oh) +static void _enable_module(struct omap_hwmod *oh) { + /* The module mode does not exist prior OMAP4 */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return; + if (!oh->clkdm || !oh->prcm.omap4.modulemode) return; - pr_debug("omap_hwmod: %s: %s: %d\n", - oh->name, __func__, oh->prcm.omap4.modulemode); + pr_debug("omap_hwmod: %s: _enable_module: %d\n", + oh->name, oh->prcm.omap4.modulemode); omap4_cminst_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->prcm_partition, @@ -874,7 +807,10 @@ static void _omap4_enable_module(struct omap_hwmod *oh) */ static int _omap4_wait_target_disable(struct omap_hwmod *oh) { - if (!oh || !oh->clkdm) + if (!cpu_is_omap44xx()) + return 0; + + if (!oh) return -EINVAL; if (oh->_int_flags & _HWMOD_NO_MPU_PORT) @@ -1349,20 +1285,24 @@ static struct omap_hwmod *_lookup(const char *name) return oh; } - /** * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod * @oh: struct omap_hwmod * * * Convert a clockdomain name stored in a struct omap_hwmod into a * clockdomain pointer, and save it into the struct omap_hwmod. - * Return -EINVAL if the clkdm_name lookup failed. + * return -EINVAL if clkdm_name does not exist or if the lookup failed. */ static int _init_clkdm(struct omap_hwmod *oh) { - if (!oh->clkdm_name) + if (cpu_is_omap24xx() || cpu_is_omap34xx()) return 0; + if (!oh->clkdm_name) { + pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name); + return -EINVAL; + } + oh->clkdm = clkdm_lookup(oh->clkdm_name); if (!oh->clkdm) { pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", @@ -1398,8 +1338,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) ret |= _init_main_clk(oh); ret |= _init_interface_clks(oh); ret |= _init_opt_clks(oh); - if (soc_ops.init_clkdm) - ret |= soc_ops.init_clkdm(oh); + ret |= _init_clkdm(oh); if (!ret) oh->_state = _HWMOD_STATE_CLKS_INITED; @@ -1409,6 +1348,53 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) return ret; } +/** + * _wait_target_ready - wait for a module to leave slave idle + * @oh: struct omap_hwmod * + * + * Wait for a module @oh to leave slave idle. Returns 0 if the module + * does not have an IDLEST bit or if the module successfully leaves + * slave idle; otherwise, pass along the return value of the + * appropriate *_cm*_wait_module_ready() function. + */ +static int _wait_target_ready(struct omap_hwmod *oh) +{ + struct omap_hwmod_ocp_if *os; + int ret; + + if (!oh) + return -EINVAL; + + if (oh->flags & HWMOD_NO_IDLEST) + return 0; + + os = _find_mpu_rt_port(oh); + if (!os) + return 0; + + /* XXX check module SIDLEMODE */ + + /* XXX check clock enable states */ + + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { + ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, + oh->prcm.omap2.idlest_reg_id, + oh->prcm.omap2.idlest_idle_bit); + } else if (cpu_is_omap44xx()) { + if (!oh->clkdm) + return -EINVAL; + + ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); + } else { + BUG(); + }; + + return ret; +} + /** * _lookup_hardreset - fill register bit info for this hwmod/reset line * @oh: struct omap_hwmod * @@ -1445,31 +1431,32 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name, * @oh: struct omap_hwmod * * @name: name of the reset line to lookup and assert * - * Some IP like dsp, ipu or iva contain processor that require an HW - * reset line to be assert / deassert in order to enable fully the IP. - * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of - * asserting the hardreset line on the currently-booted SoC, or passes - * along the return value from _lookup_hardreset() or the SoC's - * assert_hardreset code. + * Some IP like dsp, ipu or iva contain processor that require + * an HW reset line to be assert / deassert in order to enable fully + * the IP. */ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; - u8 ret = -EINVAL; + u8 ret; if (!oh) return -EINVAL; - if (!soc_ops.assert_hardreset) - return -ENOSYS; - ret = _lookup_hardreset(oh, name, &ohri); if (IS_ERR_VALUE(ret)) return ret; - ret = soc_ops.assert_hardreset(oh, &ohri); - - return ret; + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, + ohri.rst_shift); + else if (cpu_is_omap44xx()) + return omap4_prminst_assert_hardreset(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); + else + return -EINVAL; } /** @@ -1478,29 +1465,38 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) * @oh: struct omap_hwmod * * @name: name of the reset line to look up and deassert * - * Some IP like dsp, ipu or iva contain processor that require an HW - * reset line to be assert / deassert in order to enable fully the IP. - * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of - * deasserting the hardreset line on the currently-booted SoC, or passes - * along the return value from _lookup_hardreset() or the SoC's - * deassert_hardreset code. + * Some IP like dsp, ipu or iva contain processor that require + * an HW reset line to be assert / deassert in order to enable fully + * the IP. */ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; - int ret = -EINVAL; + int ret; if (!oh) return -EINVAL; - if (!soc_ops.deassert_hardreset) - return -ENOSYS; - ret = _lookup_hardreset(oh, name, &ohri); if (IS_ERR_VALUE(ret)) return ret; - ret = soc_ops.deassert_hardreset(oh, &ohri); + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { + ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, + ohri.rst_shift, + ohri.st_shift); + } else if (cpu_is_omap44xx()) { + if (ohri.st_shift) + pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", + oh->name, name); + ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); + } else { + return -EINVAL; + } + if (ret == -EBUSY) pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); @@ -1513,28 +1509,31 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) * @oh: struct omap_hwmod * * @name: name of the reset line to look up and read * - * Return the state of the reset line. Returns -EINVAL if @oh is - * null, -ENOSYS if we have no way of reading the hardreset line - * status on the currently-booted SoC, or passes along the return - * value from _lookup_hardreset() or the SoC's is_hardreset_asserted - * code. + * Return the state of the reset line. */ static int _read_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; - u8 ret = -EINVAL; + u8 ret; if (!oh) return -EINVAL; - if (!soc_ops.is_hardreset_asserted) - return -ENOSYS; - ret = _lookup_hardreset(oh, name, &ohri); if (IS_ERR_VALUE(ret)) return ret; - return soc_ops.is_hardreset_asserted(oh, &ohri); + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { + return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, + ohri.st_shift); + } else if (cpu_is_omap44xx()) { + return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); + } else { + return -EINVAL; + } } /** @@ -1572,6 +1571,10 @@ static int _omap4_disable_module(struct omap_hwmod *oh) { int v; + /* The module mode does not exist prior OMAP4 */ + if (!cpu_is_omap44xx()) + return -EINVAL; + if (!oh->clkdm || !oh->prcm.omap4.modulemode) return -EINVAL; @@ -1695,17 +1698,11 @@ static int _ocp_softreset(struct omap_hwmod *oh) * therefore have no OCP header registers to access. Others (like the * IVA) have idiosyncratic reset sequences. So for these relatively * rare cases, custom reset code can be supplied in the struct - * omap_hwmod_class .reset function pointer. - * - * _set_dmadisable() is called to set the DMADISABLE bit so that it - * does not prevent idling of the system. This is necessary for cases - * where ROMCODE/BOOTLOADER uses dma and transfers control to the - * kernel without disabling dma. - * - * Passes along the return value from either _ocp_softreset() or the - * custom reset function - these must return -EINVAL if the hwmod - * cannot be reset this way or if the hwmod is in the wrong state, - * -ETIMEDOUT if the module did not reset in time, or 0 upon success. + * omap_hwmod_class .reset function pointer. Passes along the return + * value from either _ocp_softreset() or the custom reset function - + * these must return -EINVAL if the hwmod cannot be reset this way or + * if the hwmod is in the wrong state, -ETIMEDOUT if the module did + * not reset in time, or 0 upon success. */ static int _reset(struct omap_hwmod *oh) { @@ -1727,8 +1724,6 @@ static int _reset(struct omap_hwmod *oh) } } - _set_dmadisable(oh); - /* * OCP_SYSCONFIG bits need to be reprogrammed after a * softreset. The _enable() function should be split to avoid @@ -1819,11 +1814,9 @@ static int _enable(struct omap_hwmod *oh) } _enable_clocks(oh); - if (soc_ops.enable_module) - soc_ops.enable_module(oh); + _enable_module(oh); - r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : - -EINVAL; + r = _wait_target_ready(oh); if (!r) { /* * Set the clockdomain to HW_AUTO only if the target is ready, @@ -1877,8 +1870,7 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); - if (soc_ops.disable_module) - soc_ops.disable_module(oh); + _omap4_disable_module(oh); /* * The module must be in idle mode before disabling any parents @@ -1983,8 +1975,7 @@ static int _shutdown(struct omap_hwmod *oh) if (oh->_state == _HWMOD_STATE_ENABLED) { _del_initiator_dep(oh, mpu_oh); /* XXX what about the other system initiators here? dma, dsp */ - if (soc_ops.disable_module) - soc_ops.disable_module(oh); + _omap4_disable_module(oh); _disable_clocks(oh); if (oh->clkdm) clkdm_hwmod_disable(oh->clkdm, oh); @@ -2440,194 +2431,6 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) return 0; } -/* Static functions intended only for use in soc_ops field function pointers */ - -/** - * _omap2_wait_target_ready - wait for a module to leave slave idle - * @oh: struct omap_hwmod * - * - * Wait for a module @oh to leave slave idle. Returns 0 if the module - * does not have an IDLEST bit or if the module successfully leaves - * slave idle; otherwise, pass along the return value of the - * appropriate *_cm*_wait_module_ready() function. - */ -static int _omap2_wait_target_ready(struct omap_hwmod *oh) -{ - if (!oh) - return -EINVAL; - - if (oh->flags & HWMOD_NO_IDLEST) - return 0; - - if (!_find_mpu_rt_port(oh)) - return 0; - - /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ - - return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, - oh->prcm.omap2.idlest_reg_id, - oh->prcm.omap2.idlest_idle_bit); -} - -/** - * _omap4_wait_target_ready - wait for a module to leave slave idle - * @oh: struct omap_hwmod * - * - * Wait for a module @oh to leave slave idle. Returns 0 if the module - * does not have an IDLEST bit or if the module successfully leaves - * slave idle; otherwise, pass along the return value of the - * appropriate *_cm*_wait_module_ready() function. - */ -static int _omap4_wait_target_ready(struct omap_hwmod *oh) -{ - if (!oh || !oh->clkdm) - return -EINVAL; - - if (oh->flags & HWMOD_NO_IDLEST) - return 0; - - if (!_find_mpu_rt_port(oh)) - return 0; - - /* XXX check module SIDLEMODE, hardreset status */ - - return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, - oh->clkdm->cm_inst, - oh->clkdm->clkdm_offs, - oh->prcm.omap4.clkctrl_offs); -} - -/** - * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to assert hardreset - * @ohri: hardreset line data - * - * Call omap2_prm_assert_hardreset() with parameters extracted from - * the hwmod @oh and the hardreset line data @ohri. Only intended for - * use as an soc_ops function pointer. Passes along the return value - * from omap2_prm_assert_hardreset(). XXX This function is scheduled - * for removal when the PRM code is moved into drivers/. - */ -static int _omap2_assert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, - ohri->rst_shift); -} - -/** - * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to deassert hardreset - * @ohri: hardreset line data - * - * Call omap2_prm_deassert_hardreset() with parameters extracted from - * the hwmod @oh and the hardreset line data @ohri. Only intended for - * use as an soc_ops function pointer. Passes along the return value - * from omap2_prm_deassert_hardreset(). XXX This function is - * scheduled for removal when the PRM code is moved into drivers/. - */ -static int _omap2_deassert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, - ohri->rst_shift, - ohri->st_shift); -} - -/** - * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to test hardreset - * @ohri: hardreset line data - * - * Call omap2_prm_is_hardreset_asserted() with parameters extracted - * from the hwmod @oh and the hardreset line data @ohri. Only - * intended for use as an soc_ops function pointer. Passes along the - * return value from omap2_prm_is_hardreset_asserted(). XXX This - * function is scheduled for removal when the PRM code is moved into - * drivers/. - */ -static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, - ohri->st_shift); -} - -/** - * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to assert hardreset - * @ohri: hardreset line data - * - * Call omap4_prminst_assert_hardreset() with parameters extracted - * from the hwmod @oh and the hardreset line data @ohri. Only - * intended for use as an soc_ops function pointer. Passes along the - * return value from omap4_prminst_assert_hardreset(). XXX This - * function is scheduled for removal when the PRM code is moved into - * drivers/. - */ -static int _omap4_assert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - if (!oh->clkdm) - return -EINVAL; - - return omap4_prminst_assert_hardreset(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_partition, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs); -} - -/** - * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to deassert hardreset - * @ohri: hardreset line data - * - * Call omap4_prminst_deassert_hardreset() with parameters extracted - * from the hwmod @oh and the hardreset line data @ohri. Only - * intended for use as an soc_ops function pointer. Passes along the - * return value from omap4_prminst_deassert_hardreset(). XXX This - * function is scheduled for removal when the PRM code is moved into - * drivers/. - */ -static int _omap4_deassert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - if (!oh->clkdm) - return -EINVAL; - - if (ohri->st_shift) - pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", - oh->name, ohri->name); - return omap4_prminst_deassert_hardreset(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_partition, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs); -} - -/** - * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to test hardreset - * @ohri: hardreset line data - * - * Call omap4_prminst_is_hardreset_asserted() with parameters - * extracted from the hwmod @oh and the hardreset line data @ohri. - * Only intended for use as an soc_ops function pointer. Passes along - * the return value from omap4_prminst_is_hardreset_asserted(). XXX - * This function is scheduled for removal when the PRM code is moved - * into drivers/. - */ -static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - if (!oh->clkdm) - return -EINVAL; - - return omap4_prminst_is_hardreset_asserted(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_partition, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs); -} - /* Public functions */ u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) @@ -2760,18 +2563,12 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), * * Intended to be called early in boot before the clock framework is * initialized. If @ois is not null, will register all omap_hwmods - * listed in @ois that are valid for this chip. Returns -EINVAL if - * omap_hwmod_init() hasn't been called before calling this function, - * -ENOMEM if the link memory area can't be allocated, or 0 upon - * success. + * listed in @ois that are valid for this chip. Returns 0. */ int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) { int r, i; - if (!inited) - return -EINVAL; - if (!ois) return 0; @@ -3604,47 +3401,3 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx) return 0; } - -/** - * omap_hwmod_init - initialize the hwmod code - * - * Sets up some function pointers needed by the hwmod code to operate on the - * currently-booted SoC. Intended to be called once during kernel init - * before any hwmods are registered. No return value. - */ -void __init omap_hwmod_init(void) -{ - if (cpu_is_omap24xx() || cpu_is_omap34xx()) { - soc_ops.wait_target_ready = _omap2_wait_target_ready; - soc_ops.assert_hardreset = _omap2_assert_hardreset; - soc_ops.deassert_hardreset = _omap2_deassert_hardreset; - soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; - } else if (cpu_is_omap44xx()) { - soc_ops.enable_module = _omap4_enable_module; - soc_ops.disable_module = _omap4_disable_module; - soc_ops.wait_target_ready = _omap4_wait_target_ready; - soc_ops.assert_hardreset = _omap4_assert_hardreset; - soc_ops.deassert_hardreset = _omap4_deassert_hardreset; - soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; - soc_ops.init_clkdm = _init_clkdm; - } else { - WARN(1, "omap_hwmod: unknown SoC type\n"); - } - - inited = true; -} - -/** - * omap_hwmod_get_main_clk - get pointer to main clock name - * @oh: struct omap_hwmod * - * - * Returns the main clock name assocated with @oh upon success, - * or NULL if @oh is NULL. - */ -const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh) -{ - if (!oh) - return NULL; - - return oh->main_clk; -} diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 50cfab61b0e2..a7640d1b215e 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -192,11 +192,6 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { .name = "mcbsp", }; -static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { - { .role = "pad_fck", .clk = "mcbsp_clks" }, - { .role = "prcm_fck", .clk = "func_96m_ck" }, -}; - /* mcbsp1 */ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { { .name = "tx", .irq = 59 }, @@ -219,8 +214,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp2 */ @@ -245,8 +238,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = { @@ -594,6 +585,5 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { int __init omap2420_hwmod_init(void) { - omap_hwmod_init(); return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); } diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 58b5bc196d32..4d7264981230 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -296,11 +296,6 @@ static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { .rev = MCBSP_CONFIG_TYPE2, }; -static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { - { .role = "pad_fck", .clk = "mcbsp_clks" }, - { .role = "prcm_fck", .clk = "func_96m_ck" }, -}; - /* mcbsp1 */ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { { .name = "tx", .irq = 59 }, @@ -325,8 +320,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp2 */ @@ -352,8 +345,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp3 */ @@ -379,8 +370,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp4 */ @@ -412,8 +401,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp5 */ @@ -445,8 +432,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* MMC/SD/SDIO common */ @@ -953,6 +938,5 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { int __init omap2430_hwmod_init(void) { - omap_hwmod_init(); return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); } diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index afad69c6ba6e..83eafd96ecaa 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -68,6 +68,7 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { struct omap_hwmod_class omap2xxx_timer_hwmod_class = { .name = "timer", .sysc = &omap2xxx_timer_sysc, + .rev = OMAP_TIMER_IP_VERSION_1, }; /* @@ -256,6 +257,7 @@ struct omap_hwmod omap2xxx_timer2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap2xxx_timer_hwmod_class, }; @@ -274,6 +276,7 @@ struct omap_hwmod omap2xxx_timer3_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap2xxx_timer_hwmod_class, }; @@ -292,6 +295,7 @@ struct omap_hwmod omap2xxx_timer4_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap2xxx_timer_hwmod_class, }; @@ -310,6 +314,7 @@ struct omap_hwmod omap2xxx_timer5_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap2xxx_timer_hwmod_class, }; @@ -328,6 +333,7 @@ struct omap_hwmod omap2xxx_timer6_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap2xxx_timer_hwmod_class, }; @@ -346,6 +352,7 @@ struct omap_hwmod omap2xxx_timer7_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap2xxx_timer_hwmod_class, }; @@ -364,6 +371,7 @@ struct omap_hwmod omap2xxx_timer8_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap2xxx_timer_hwmod_class, }; diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 6491e057d9ce..b26d3c9bca16 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -129,6 +129,7 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = { static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = { .name = "timer", .sysc = &omap3xxx_timer_1ms_sysc, + .rev = OMAP_TIMER_IP_VERSION_1, }; static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = { @@ -144,11 +145,12 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = { static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { .name = "timer", .sysc = &omap3xxx_timer_sysc, + .rev = OMAP_TIMER_IP_VERSION_1, }; /* secure timers dev attribute */ static struct omap_timer_capability_dev_attr capability_secure_dev_attr = { - .timer_capability = OMAP_TIMER_ALWON | OMAP_TIMER_SECURE, + .timer_capability = OMAP_TIMER_SECURE, }; /* always-on timers dev attribute */ @@ -193,6 +195,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap3xxx_timer_1ms_hwmod_class, }; @@ -210,6 +213,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap3xxx_timer_hwmod_class, }; @@ -227,6 +231,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap3xxx_timer_hwmod_class, }; @@ -244,6 +249,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap3xxx_timer_hwmod_class, }; @@ -261,6 +267,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap3xxx_timer_hwmod_class, }; @@ -278,6 +285,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .class = &omap3xxx_timer_hwmod_class, }; @@ -1066,17 +1074,6 @@ static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = { .rev = MCBSP_CONFIG_TYPE3, }; -/* McBSP functional clock mapping */ -static struct omap_hwmod_opt_clk mcbsp15_opt_clks[] = { - { .role = "pad_fck", .clk = "mcbsp_clks" }, - { .role = "prcm_fck", .clk = "core_96m_fck" }, -}; - -static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = { - { .role = "pad_fck", .clk = "mcbsp_clks" }, - { .role = "prcm_fck", .clk = "per_96m_fck" }, -}; - /* mcbsp1 */ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { { .name = "common", .irq = 16 }, @@ -1100,8 +1097,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT, }, }, - .opt_clks = mcbsp15_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks), }; /* mcbsp2 */ @@ -1131,8 +1126,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, }, }, - .opt_clks = mcbsp234_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), .dev_attr = &omap34xx_mcbsp2_dev_attr, }; @@ -1163,8 +1156,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, }, }, - .opt_clks = mcbsp234_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), .dev_attr = &omap34xx_mcbsp3_dev_attr, }; @@ -1197,8 +1188,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT, }, }, - .opt_clks = mcbsp234_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), }; /* mcbsp5 */ @@ -1230,8 +1219,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT, }, }, - .opt_clks = mcbsp15_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks), }; /* 'mcbsp sidetone' class */ @@ -3296,8 +3283,6 @@ int __init omap3xxx_hwmod_init(void) struct omap_hwmod_ocp_if **h = NULL; unsigned int rev; - omap_hwmod_init(); - /* Register hwmod links common to all OMAP3 */ r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs); if (r < 0) diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 1b1d04141c3d..b7bcba5221ba 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1928,7 +1928,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = { { .role = "pad_fck", .clk = "pad_clks_ck" }, - { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" }, + { .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" }, }; static struct omap_hwmod omap44xx_mcbsp1_hwmod = { @@ -1963,7 +1963,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = { { .role = "pad_fck", .clk = "pad_clks_ck" }, - { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" }, + { .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" }, }; static struct omap_hwmod omap44xx_mcbsp2_hwmod = { @@ -1998,7 +1998,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = { { .role = "pad_fck", .clk = "pad_clks_ck" }, - { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" }, + { .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" }, }; static struct omap_hwmod omap44xx_mcbsp3_hwmod = { @@ -2033,7 +2033,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = { { .role = "pad_fck", .clk = "pad_clks_ck" }, - { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" }, + { .role = "prcm_fck", .clk = "mcbsp4_sync_mux_ck" }, }; static struct omap_hwmod omap44xx_mcbsp4_hwmod = { @@ -2544,12 +2544,14 @@ static struct omap_hwmod omap44xx_prcm_mpu_hwmod = { static struct omap_hwmod omap44xx_cm_core_aon_hwmod = { .name = "cm_core_aon", .class = &omap44xx_prcm_hwmod_class, + .clkdm_name = "cm_clkdm", }; /* cm_core */ static struct omap_hwmod omap44xx_cm_core_hwmod = { .name = "cm_core", .class = &omap44xx_prcm_hwmod_class, + .clkdm_name = "cm_clkdm", }; /* prm */ @@ -2566,6 +2568,7 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = { static struct omap_hwmod omap44xx_prm_hwmod = { .name = "prm", .class = &omap44xx_prcm_hwmod_class, + .clkdm_name = "prm_clkdm", .mpu_irqs = omap44xx_prm_irqs, .rst_lines = omap44xx_prm_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets), @@ -2944,6 +2947,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, }; /* timer3 */ @@ -2965,6 +2969,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, }; /* timer4 */ @@ -2986,6 +2991,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, }; /* timer5 */ @@ -3007,6 +3013,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, }; /* timer6 */ @@ -3029,6 +3036,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, }; /* timer7 */ @@ -3050,6 +3058,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, }; /* timer8 */ @@ -3855,7 +3864,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = { }; /* usb_host_fs -> l3_main_2 */ -static struct omap_hwmod_ocp_if omap44xx_usb_host_fs__l3_main_2 = { +static struct omap_hwmod_ocp_if __maybe_unused omap44xx_usb_host_fs__l3_main_2 = { .master = &omap44xx_usb_host_fs_hwmod, .slave = &omap44xx_l3_main_2_hwmod, .clk = "l3_div_ck", @@ -3913,7 +3922,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = { }; /* aess -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { +static struct omap_hwmod_ocp_if __maybe_unused omap44xx_aess__l4_abe = { .master = &omap44xx_aess_hwmod, .slave = &omap44xx_l4_abe_hwmod, .clk = "ocp_abe_iclk", @@ -4004,7 +4013,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { }; /* l4_abe -> aess */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { +static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", @@ -4022,7 +4031,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = { }; /* l4_abe -> aess (dma) */ -static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { +static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess_dma = { .master = &omap44xx_l4_abe_hwmod, .slave = &omap44xx_aess_hwmod, .clk = "ocp_abe_iclk", @@ -5848,7 +5857,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_host_fs_addrs[] = { }; /* l4_cfg -> usb_host_fs */ -static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_fs = { +static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = { .master = &omap44xx_l4_cfg_hwmod, .slave = &omap44xx_usb_host_fs_hwmod, .clk = "l4_div_ck", @@ -6005,13 +6014,13 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_iva__l3_main_2, &omap44xx_l3_main_1__l3_main_2, &omap44xx_l4_cfg__l3_main_2, - &omap44xx_usb_host_fs__l3_main_2, + /* &omap44xx_usb_host_fs__l3_main_2, */ &omap44xx_usb_host_hs__l3_main_2, &omap44xx_usb_otg_hs__l3_main_2, &omap44xx_l3_main_1__l3_main_3, &omap44xx_l3_main_2__l3_main_3, &omap44xx_l4_cfg__l3_main_3, - &omap44xx_aess__l4_abe, + /* &omap44xx_aess__l4_abe, */ &omap44xx_dsp__l4_abe, &omap44xx_l3_main_1__l4_abe, &omap44xx_mpu__l4_abe, @@ -6020,8 +6029,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_cfg__l4_wkup, &omap44xx_mpu__mpu_private, &omap44xx_l4_cfg__ocp_wp_noc, - &omap44xx_l4_abe__aess, - &omap44xx_l4_abe__aess_dma, + /* &omap44xx_l4_abe__aess, */ + /* &omap44xx_l4_abe__aess_dma, */ &omap44xx_l3_main_2__c2c, &omap44xx_l4_wkup__counter_32k, &omap44xx_l4_cfg__ctrl_module_core, @@ -6127,7 +6136,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_per__uart2, &omap44xx_l4_per__uart3, &omap44xx_l4_per__uart4, - &omap44xx_l4_cfg__usb_host_fs, + /* &omap44xx_l4_cfg__usb_host_fs, */ &omap44xx_l4_cfg__usb_host_hs, &omap44xx_l4_cfg__usb_otg_hs, &omap44xx_l4_cfg__usb_tll_hs, @@ -6139,7 +6148,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { int __init omap44xx_hwmod_init(void) { - omap_hwmod_init(); return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs); } diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_common_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_common_data.c index 9f1ccdc8cc8c..51e5418899fb 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_common_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_common_data.c @@ -47,16 +47,6 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = { .midle_shift = SYSC_TYPE2_MIDLEMODE_SHIFT, .sidle_shift = SYSC_TYPE2_SIDLEMODE_SHIFT, .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, - .dmadisable_shift = SYSC_TYPE2_DMADISABLE_SHIFT, -}; - -/** - * struct omap_hwmod_sysc_type3 - TYPE3 sysconfig scheme. - * Used by some IPs on AM33xx - */ -struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3 = { - .midle_shift = SYSC_TYPE3_MIDLEMODE_SHIFT, - .sidle_shift = SYSC_TYPE3_SIDLEMODE_SHIFT, }; struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = { diff --git a/trunk/arch/arm/mach-omap2/powerdomain.c b/trunk/arch/arm/mach-omap2/powerdomain.c index 2f963f702a05..96114901b932 100644 --- a/trunk/arch/arm/mach-omap2/powerdomain.c +++ b/trunk/arch/arm/mach-omap2/powerdomain.c @@ -526,8 +526,7 @@ int pwrdm_read_next_pwrst(struct powerdomain *pwrdm) * * Return the powerdomain @pwrdm's current power state. Returns -EINVAL * if the powerdomain pointer is null or returns the current power state - * upon success. Note that if the power domain only supports the ON state - * then just return ON as the current state. + * upon success. */ int pwrdm_read_pwrst(struct powerdomain *pwrdm) { @@ -536,9 +535,6 @@ int pwrdm_read_pwrst(struct powerdomain *pwrdm) if (!pwrdm) return -EINVAL; - if (pwrdm->pwrsts == PWRSTS_ON) - return PWRDM_POWER_ON; - if (arch_pwrdm && arch_pwrdm->pwrdm_read_pwrst) ret = arch_pwrdm->pwrdm_read_pwrst(pwrdm); diff --git a/trunk/arch/arm/mach-omap2/powerdomain.h b/trunk/arch/arm/mach-omap2/powerdomain.h index a8a95184243d..8f88d65c46ea 100644 --- a/trunk/arch/arm/mach-omap2/powerdomain.h +++ b/trunk/arch/arm/mach-omap2/powerdomain.h @@ -67,9 +67,9 @@ /* * Maximum number of clockdomains that can be associated with a powerdomain. - * PER powerdomain on AM33XX is the worst case + * CORE powerdomain on OMAP4 is the worst case */ -#define PWRDM_MAX_CLKDMS 11 +#define PWRDM_MAX_CLKDMS 9 /* XXX A completely arbitrary number. What is reasonable here? */ #define PWRDM_TRANSITION_BAILOUT 100000 @@ -92,15 +92,6 @@ struct powerdomain; * @pwrdm_clkdms: Clockdomains in this powerdomain * @node: list_head linking all powerdomains * @voltdm_node: list_head linking all powerdomains in a voltagedomain - * @pwrstctrl_offs: (AM33XX only) XXX_PWRSTCTRL reg offset from prcm_offs - * @pwrstst_offs: (AM33XX only) XXX_PWRSTST reg offset from prcm_offs - * @logicretstate_mask: (AM33XX only) mask for logic retention bitfield - * in @pwrstctrl_offs - * @mem_on_mask: (AM33XX only) mask for mem on bitfield in @pwrstctrl_offs - * @mem_ret_mask: (AM33XX only) mask for mem ret bitfield in @pwrstctrl_offs - * @mem_pwrst_mask: (AM33XX only) mask for mem state bitfield in @pwrstst_offs - * @mem_retst_mask: (AM33XX only) mask for mem retention state bitfield - * in @pwrstctrl_offs * @state: * @state_counter: * @timer: @@ -130,14 +121,6 @@ struct powerdomain { unsigned ret_logic_off_counter; unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS]; - const u8 pwrstctrl_offs; - const u8 pwrstst_offs; - const u32 logicretstate_mask; - const u32 mem_on_mask[PWRDM_MAX_MEM_BANKS]; - const u32 mem_ret_mask[PWRDM_MAX_MEM_BANKS]; - const u32 mem_pwrst_mask[PWRDM_MAX_MEM_BANKS]; - const u32 mem_retst_mask[PWRDM_MAX_MEM_BANKS]; - #ifdef CONFIG_PM_DEBUG s64 timer; s64 state_timer[PWRDM_MAX_PWRSTS]; @@ -239,12 +222,10 @@ bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm); extern void omap242x_powerdomains_init(void); extern void omap243x_powerdomains_init(void); extern void omap3xxx_powerdomains_init(void); -extern void am33xx_powerdomains_init(void); extern void omap44xx_powerdomains_init(void); extern struct pwrdm_ops omap2_pwrdm_operations; extern struct pwrdm_ops omap3_pwrdm_operations; -extern struct pwrdm_ops am33xx_pwrdm_operations; extern struct pwrdm_ops omap4_pwrdm_operations; /* Common Internal functions used across OMAP rev's */ diff --git a/trunk/arch/arm/mach-omap2/powerdomain33xx.c b/trunk/arch/arm/mach-omap2/powerdomain33xx.c deleted file mode 100644 index 67c5663899b6..000000000000 --- a/trunk/arch/arm/mach-omap2/powerdomain33xx.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * AM33XX Powerdomain control - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * Derived from mach-omap2/powerdomain44xx.c written by Rajendra Nayak - * - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include - -#include - -#include "powerdomain.h" -#include "prm33xx.h" -#include "prm-regbits-33xx.h" - - -static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - return 0; -} - -static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= OMAP_POWERSTATE_MASK; - v >>= OMAP_POWERSTATE_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= OMAP_POWERSTATEST_MASK; - v >>= OMAP_POWERSTATEST_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= AM33XX_LASTPOWERSTATEENTERED_MASK; - v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT; - - return v; -} - -static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) -{ - am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK, - (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - return 0; -} - -static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK, - AM33XX_LASTPOWERSTATEENTERED_MASK, - pwrdm->prcm_offs, pwrdm->pwrstst_offs); - return 0; -} - -static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 m; - - m = pwrdm->logicretstate_mask; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= AM33XX_LOGICSTATEST_MASK; - v >>= AM33XX_LOGICSTATEST_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - u32 v, m; - - m = pwrdm->logicretstate_mask; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = pwrdm->mem_on_mask[bank]; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = pwrdm->mem_ret_mask[bank]; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = pwrdm->mem_pwrst_mask[bank]; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = pwrdm->mem_retst_mask[bank]; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs) - & OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -struct pwrdm_ops am33xx_pwrdm_operations = { - .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst, - .pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst, - .pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst, - .pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst, - .pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange, - .pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst, - .pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst, - .pwrdm_wait_transition = am33xx_pwrdm_wait_transition, -}; diff --git a/trunk/arch/arm/mach-omap2/powerdomains33xx_data.c b/trunk/arch/arm/mach-omap2/powerdomains33xx_data.c deleted file mode 100644 index 869adb82569e..000000000000 --- a/trunk/arch/arm/mach-omap2/powerdomains33xx_data.c +++ /dev/null @@ -1,185 +0,0 @@ -/* - * AM33XX Power domain data - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include - -#include "powerdomain.h" -#include "prcm-common.h" -#include "prm-regbits-33xx.h" -#include "prm33xx.h" - -static struct powerdomain gfx_33xx_pwrdm = { - .name = "gfx_pwrdm", - .voltdm = { .name = "core" }, - .prcm_offs = AM33XX_PRM_GFX_MOD, - .pwrstctrl_offs = AM33XX_PM_GFX_PWRSTCTRL_OFFSET, - .pwrstst_offs = AM33XX_PM_GFX_PWRSTST_OFFSET, - .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - .banks = 1, - .logicretstate_mask = AM33XX_LOGICRETSTATE_MASK, - .mem_on_mask = { - [0] = AM33XX_GFX_MEM_ONSTATE_MASK, /* gfx_mem */ - }, - .mem_ret_mask = { - [0] = AM33XX_GFX_MEM_RETSTATE_MASK, /* gfx_mem */ - }, - .mem_pwrst_mask = { - [0] = AM33XX_GFX_MEM_STATEST_MASK, /* gfx_mem */ - }, - .mem_retst_mask = { - [0] = AM33XX_GFX_MEM_RETSTATE_MASK, /* gfx_mem */ - }, - .pwrsts_mem_ret = { - [0] = PWRSTS_OFF_RET, /* gfx_mem */ - }, - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* gfx_mem */ - }, -}; - -static struct powerdomain rtc_33xx_pwrdm = { - .name = "rtc_pwrdm", - .voltdm = { .name = "rtc" }, - .prcm_offs = AM33XX_PRM_RTC_MOD, - .pwrstctrl_offs = AM33XX_PM_RTC_PWRSTCTRL_OFFSET, - .pwrstst_offs = AM33XX_PM_RTC_PWRSTST_OFFSET, - .pwrsts = PWRSTS_ON, - .logicretstate_mask = AM33XX_LOGICRETSTATE_MASK, -}; - -static struct powerdomain wkup_33xx_pwrdm = { - .name = "wkup_pwrdm", - .voltdm = { .name = "core" }, - .prcm_offs = AM33XX_PRM_WKUP_MOD, - .pwrstctrl_offs = AM33XX_PM_WKUP_PWRSTCTRL_OFFSET, - .pwrstst_offs = AM33XX_PM_WKUP_PWRSTST_OFFSET, - .pwrsts = PWRSTS_ON, - .logicretstate_mask = AM33XX_LOGICRETSTATE_3_3_MASK, -}; - -static struct powerdomain per_33xx_pwrdm = { - .name = "per_pwrdm", - .voltdm = { .name = "core" }, - .prcm_offs = AM33XX_PRM_PER_MOD, - .pwrstctrl_offs = AM33XX_PM_PER_PWRSTCTRL_OFFSET, - .pwrstst_offs = AM33XX_PM_PER_PWRSTST_OFFSET, - .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - .banks = 3, - .logicretstate_mask = AM33XX_LOGICRETSTATE_3_3_MASK, - .mem_on_mask = { - [0] = AM33XX_PRUSS_MEM_ONSTATE_MASK, /* pruss_mem */ - [1] = AM33XX_PER_MEM_ONSTATE_MASK, /* per_mem */ - [2] = AM33XX_RAM_MEM_ONSTATE_MASK, /* ram_mem */ - }, - .mem_ret_mask = { - [0] = AM33XX_PRUSS_MEM_RETSTATE_MASK, /* pruss_mem */ - [1] = AM33XX_PER_MEM_RETSTATE_MASK, /* per_mem */ - [2] = AM33XX_RAM_MEM_RETSTATE_MASK, /* ram_mem */ - }, - .mem_pwrst_mask = { - [0] = AM33XX_PRUSS_MEM_STATEST_MASK, /* pruss_mem */ - [1] = AM33XX_PER_MEM_STATEST_MASK, /* per_mem */ - [2] = AM33XX_RAM_MEM_STATEST_MASK, /* ram_mem */ - }, - .mem_retst_mask = { - [0] = AM33XX_PRUSS_MEM_RETSTATE_MASK, /* pruss_mem */ - [1] = AM33XX_PER_MEM_RETSTATE_MASK, /* per_mem */ - [2] = AM33XX_RAM_MEM_RETSTATE_MASK, /* ram_mem */ - }, - .pwrsts_mem_ret = { - [0] = PWRSTS_OFF_RET, /* pruss_mem */ - [1] = PWRSTS_OFF_RET, /* per_mem */ - [2] = PWRSTS_OFF_RET, /* ram_mem */ - }, - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* pruss_mem */ - [1] = PWRSTS_ON, /* per_mem */ - [2] = PWRSTS_ON, /* ram_mem */ - }, -}; - -static struct powerdomain mpu_33xx_pwrdm = { - .name = "mpu_pwrdm", - .voltdm = { .name = "mpu" }, - .prcm_offs = AM33XX_PRM_MPU_MOD, - .pwrstctrl_offs = AM33XX_PM_MPU_PWRSTCTRL_OFFSET, - .pwrstst_offs = AM33XX_PM_MPU_PWRSTST_OFFSET, - .pwrsts = PWRSTS_OFF_RET_ON, - .pwrsts_logic_ret = PWRSTS_OFF_RET, - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, - .banks = 3, - .logicretstate_mask = AM33XX_LOGICRETSTATE_MASK, - .mem_on_mask = { - [0] = AM33XX_MPU_L1_ONSTATE_MASK, /* mpu_l1 */ - [1] = AM33XX_MPU_L2_ONSTATE_MASK, /* mpu_l2 */ - [2] = AM33XX_MPU_RAM_ONSTATE_MASK, /* mpu_ram */ - }, - .mem_ret_mask = { - [0] = AM33XX_MPU_L1_RETSTATE_MASK, /* mpu_l1 */ - [1] = AM33XX_MPU_L2_RETSTATE_MASK, /* mpu_l2 */ - [2] = AM33XX_MPU_RAM_RETSTATE_MASK, /* mpu_ram */ - }, - .mem_pwrst_mask = { - [0] = AM33XX_MPU_L1_STATEST_MASK, /* mpu_l1 */ - [1] = AM33XX_MPU_L2_STATEST_MASK, /* mpu_l2 */ - [2] = AM33XX_MPU_RAM_STATEST_MASK, /* mpu_ram */ - }, - .mem_retst_mask = { - [0] = AM33XX_MPU_L1_RETSTATE_MASK, /* mpu_l1 */ - [1] = AM33XX_MPU_L2_RETSTATE_MASK, /* mpu_l2 */ - [2] = AM33XX_MPU_RAM_RETSTATE_MASK, /* mpu_ram */ - }, - .pwrsts_mem_ret = { - [0] = PWRSTS_OFF_RET, /* mpu_l1 */ - [1] = PWRSTS_OFF_RET, /* mpu_l2 */ - [2] = PWRSTS_OFF_RET, /* mpu_ram */ - }, - .pwrsts_mem_on = { - [0] = PWRSTS_ON, /* mpu_l1 */ - [1] = PWRSTS_ON, /* mpu_l2 */ - [2] = PWRSTS_ON, /* mpu_ram */ - }, -}; - -static struct powerdomain cefuse_33xx_pwrdm = { - .name = "cefuse_pwrdm", - .voltdm = { .name = "core" }, - .prcm_offs = AM33XX_PRM_CEFUSE_MOD, - .pwrstctrl_offs = AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET, - .pwrstst_offs = AM33XX_PM_CEFUSE_PWRSTST_OFFSET, - .pwrsts = PWRSTS_OFF_ON, -}; - -static struct powerdomain *powerdomains_am33xx[] __initdata = { - &gfx_33xx_pwrdm, - &rtc_33xx_pwrdm, - &wkup_33xx_pwrdm, - &per_33xx_pwrdm, - &mpu_33xx_pwrdm, - &cefuse_33xx_pwrdm, - NULL, -}; - -void __init am33xx_powerdomains_init(void) -{ - pwrdm_register_platform_funcs(&am33xx_pwrdm_operations); - pwrdm_register_pwrdms(powerdomains_am33xx); - pwrdm_complete_init(); -} diff --git a/trunk/arch/arm/mach-omap2/prcm.c b/trunk/arch/arm/mach-omap2/prcm.c index 28cbfb2b5733..480f40a5ee42 100644 --- a/trunk/arch/arm/mach-omap2/prcm.c +++ b/trunk/arch/arm/mach-omap2/prcm.c @@ -35,7 +35,6 @@ #include "prm2xxx_3xxx.h" #include "prm44xx.h" #include "prminst44xx.h" -#include "cminst44xx.h" #include "prm-regbits-24xx.h" #include "prm-regbits-44xx.h" #include "control.h" @@ -165,25 +164,3 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) omap_cm_base_init(); } } - -/* - * Stubbed functions so that common files continue to build when - * custom builds are used - * XXX These are temporary and should be removed at the earliest possible - * opportunity - */ -int __weak omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ - return 0; -} - -void __weak omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, - s16 cdoffs, u16 clkctrl_offs) -{ -} - -void __weak omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ -} diff --git a/trunk/arch/arm/mach-omap2/prm-regbits-33xx.h b/trunk/arch/arm/mach-omap2/prm-regbits-33xx.h deleted file mode 100644 index 0221b5c20e87..000000000000 --- a/trunk/arch/arm/mach-omap2/prm-regbits-33xx.h +++ /dev/null @@ -1,357 +0,0 @@ -/* - * AM33XX PRM_XXX register bits - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H -#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H - -#include "prm.h" - -/* Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_MPU_SETUP */ -#define AM33XX_ABBOFF_ACT_EXPORT_SHIFT 1 -#define AM33XX_ABBOFF_ACT_EXPORT_MASK (1 << 1) - -/* Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_MPU_SETUP */ -#define AM33XX_ABBOFF_SLEEP_EXPORT_SHIFT 2 -#define AM33XX_ABBOFF_SLEEP_EXPORT_MASK (1 << 2) - -/* Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_MPU_SETUP */ -#define AM33XX_AIPOFF_SHIFT 8 -#define AM33XX_AIPOFF_MASK (1 << 8) - -/* Used by PM_WKUP_PWRSTST */ -#define AM33XX_DEBUGSS_MEM_STATEST_SHIFT 17 -#define AM33XX_DEBUGSS_MEM_STATEST_MASK (0x3 << 17) - -/* Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_MPU_SETUP */ -#define AM33XX_DISABLE_RTA_EXPORT_SHIFT 0 -#define AM33XX_DISABLE_RTA_EXPORT_MASK (1 << 0) - -/* Used by PRM_IRQENABLE_M3, PRM_IRQENABLE_MPU */ -#define AM33XX_DPLL_CORE_RECAL_EN_SHIFT 12 -#define AM33XX_DPLL_CORE_RECAL_EN_MASK (1 << 12) - -/* Used by PRM_IRQSTATUS_M3, PRM_IRQSTATUS_MPU */ -#define AM33XX_DPLL_CORE_RECAL_ST_SHIFT 12 -#define AM33XX_DPLL_CORE_RECAL_ST_MASK (1 << 12) - -/* Used by PRM_IRQENABLE_M3, PRM_IRQENABLE_MPU */ -#define AM33XX_DPLL_DDR_RECAL_EN_SHIFT 14 -#define AM33XX_DPLL_DDR_RECAL_EN_MASK (1 << 14) - -/* Used by PRM_IRQSTATUS_M3, PRM_IRQSTATUS_MPU */ -#define AM33XX_DPLL_DDR_RECAL_ST_SHIFT 14 -#define AM33XX_DPLL_DDR_RECAL_ST_MASK (1 << 14) - -/* Used by PRM_IRQENABLE_M3, PRM_IRQENABLE_MPU */ -#define AM33XX_DPLL_DISP_RECAL_EN_SHIFT 15 -#define AM33XX_DPLL_DISP_RECAL_EN_MASK (1 << 15) - -/* Used by PRM_IRQSTATUS_M3, PRM_IRQSTATUS_MPU */ -#define AM33XX_DPLL_DISP_RECAL_ST_SHIFT 13 -#define AM33XX_DPLL_DISP_RECAL_ST_MASK (1 << 13) - -/* Used by PRM_IRQENABLE_M3, PRM_IRQENABLE_MPU */ -#define AM33XX_DPLL_MPU_RECAL_EN_SHIFT 11 -#define AM33XX_DPLL_MPU_RECAL_EN_MASK (1 << 11) - -/* Used by PRM_IRQSTATUS_M3, PRM_IRQSTATUS_MPU */ -#define AM33XX_DPLL_MPU_RECAL_ST_SHIFT 11 -#define AM33XX_DPLL_MPU_RECAL_ST_MASK (1 << 11) - -/* Used by PRM_IRQENABLE_M3, PRM_IRQENABLE_MPU */ -#define AM33XX_DPLL_PER_RECAL_EN_SHIFT 13 -#define AM33XX_DPLL_PER_RECAL_EN_MASK (1 << 13) - -/* Used by PRM_IRQSTATUS_M3, PRM_IRQSTATUS_MPU */ -#define AM33XX_DPLL_PER_RECAL_ST_SHIFT 15 -#define AM33XX_DPLL_PER_RECAL_ST_MASK (1 << 15) - -/* Used by RM_WKUP_RSTST */ -#define AM33XX_EMULATION_M3_RST_SHIFT 6 -#define AM33XX_EMULATION_M3_RST_MASK (1 << 6) - -/* Used by RM_MPU_RSTST */ -#define AM33XX_EMULATION_MPU_RST_SHIFT 5 -#define AM33XX_EMULATION_MPU_RST_MASK (1 << 5) - -/* Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_MPU_SETUP */ -#define AM33XX_ENFUNC1_EXPORT_SHIFT 3 -#define AM33XX_ENFUNC1_EXPORT_MASK (1 << 3) - -/* Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_MPU_SETUP */ -#define AM33XX_ENFUNC3_EXPORT_SHIFT 5 -#define AM33XX_ENFUNC3_EXPORT_MASK (1 << 5) - -/* Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_MPU_SETUP */ -#define AM33XX_ENFUNC4_SHIFT 6 -#define AM33XX_ENFUNC4_MASK (1 << 6) - -/* Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_MPU_SETUP */ -#define AM33XX_ENFUNC5_SHIFT 7 -#define AM33XX_ENFUNC5_MASK (1 << 7) - -/* Used by PRM_RSTST */ -#define AM33XX_EXTERNAL_WARM_RST_SHIFT 5 -#define AM33XX_EXTERNAL_WARM_RST_MASK (1 << 5) - -/* Used by PRM_IRQENABLE_M3, PRM_IRQENABLE_MPU */ -#define AM33XX_FORCEWKUP_EN_SHIFT 10 -#define AM33XX_FORCEWKUP_EN_MASK (1 << 10) - -/* Used by PRM_IRQSTATUS_M3, PRM_IRQSTATUS_MPU */ -#define AM33XX_FORCEWKUP_ST_SHIFT 10 -#define AM33XX_FORCEWKUP_ST_MASK (1 << 10) - -/* Used by PM_GFX_PWRSTCTRL */ -#define AM33XX_GFX_MEM_ONSTATE_SHIFT 17 -#define AM33XX_GFX_MEM_ONSTATE_MASK (0x3 << 17) - -/* Used by PM_GFX_PWRSTCTRL */ -#define AM33XX_GFX_MEM_RETSTATE_SHIFT 6 -#define AM33XX_GFX_MEM_RETSTATE_MASK (1 << 6) - -/* Used by PM_GFX_PWRSTST */ -#define AM33XX_GFX_MEM_STATEST_SHIFT 4 -#define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4) - -/* Used by RM_GFX_RSTCTRL, RM_GFX_RSTST */ -#define AM33XX_GFX_RST_SHIFT 0 -#define AM33XX_GFX_RST_MASK (1 << 0) - -/* Used by PRM_RSTST */ -#define AM33XX_GLOBAL_COLD_RST_SHIFT 0 -#define AM33XX_GLOBAL_COLD_RST_MASK (1 << 0) - -/* Used by PRM_RSTST */ -#define AM33XX_GLOBAL_WARM_SW_RST_SHIFT 1 -#define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1) - -/* Used by RM_WKUP_RSTST */ -#define AM33XX_ICECRUSHER_M3_RST_SHIFT 7 -#define AM33XX_ICECRUSHER_M3_RST_MASK (1 << 7) - -/* Used by RM_MPU_RSTST */ -#define AM33XX_ICECRUSHER_MPU_RST_SHIFT 6 -#define AM33XX_ICECRUSHER_MPU_RST_MASK (1 << 6) - -/* Used by PRM_RSTST */ -#define AM33XX_ICEPICK_RST_SHIFT 9 -#define AM33XX_ICEPICK_RST_MASK (1 << 9) - -/* Used by RM_PER_RSTCTRL */ -#define AM33XX_PRUSS_LRST_SHIFT 1 -#define AM33XX_PRUSS_LRST_MASK (1 << 1) - -/* Used by PM_PER_PWRSTCTRL */ -#define AM33XX_PRUSS_MEM_ONSTATE_SHIFT 5 -#define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5) - -/* Used by PM_PER_PWRSTCTRL */ -#define AM33XX_PRUSS_MEM_RETSTATE_SHIFT 7 -#define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7) - -/* Used by PM_PER_PWRSTST */ -#define AM33XX_PRUSS_MEM_STATEST_SHIFT 23 -#define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23) - -/* - * Used by PM_GFX_PWRSTST, PM_CEFUSE_PWRSTST, PM_PER_PWRSTST, PM_MPU_PWRSTST, - * PM_WKUP_PWRSTST, PM_RTC_PWRSTST - */ -#define AM33XX_INTRANSITION_SHIFT 20 -#define AM33XX_INTRANSITION_MASK (1 << 20) - -/* Used by PM_CEFUSE_PWRSTST */ -#define AM33XX_LASTPOWERSTATEENTERED_SHIFT 24 -#define AM33XX_LASTPOWERSTATEENTERED_MASK (0x3 << 24) - -/* Used by PM_GFX_PWRSTCTRL, PM_MPU_PWRSTCTRL, PM_RTC_PWRSTCTRL */ -#define AM33XX_LOGICRETSTATE_SHIFT 2 -#define AM33XX_LOGICRETSTATE_MASK (1 << 2) - -/* Renamed from LOGICRETSTATE Used by PM_PER_PWRSTCTRL, PM_WKUP_PWRSTCTRL */ -#define AM33XX_LOGICRETSTATE_3_3_SHIFT 3 -#define AM33XX_LOGICRETSTATE_3_3_MASK (1 << 3) - -/* - * Used by PM_GFX_PWRSTST, PM_CEFUSE_PWRSTST, PM_PER_PWRSTST, PM_MPU_PWRSTST, - * PM_WKUP_PWRSTST, PM_RTC_PWRSTST - */ -#define AM33XX_LOGICSTATEST_SHIFT 2 -#define AM33XX_LOGICSTATEST_MASK (1 << 2) - -/* - * Used by PM_GFX_PWRSTCTRL, PM_CEFUSE_PWRSTCTRL, PM_PER_PWRSTCTRL, - * PM_MPU_PWRSTCTRL, PM_WKUP_PWRSTCTRL, PM_RTC_PWRSTCTRL - */ -#define AM33XX_LOWPOWERSTATECHANGE_SHIFT 4 -#define AM33XX_LOWPOWERSTATECHANGE_MASK (1 << 4) - -/* Used by PM_MPU_PWRSTCTRL */ -#define AM33XX_MPU_L1_ONSTATE_SHIFT 18 -#define AM33XX_MPU_L1_ONSTATE_MASK (0x3 << 18) - -/* Used by PM_MPU_PWRSTCTRL */ -#define AM33XX_MPU_L1_RETSTATE_SHIFT 22 -#define AM33XX_MPU_L1_RETSTATE_MASK (1 << 22) - -/* Used by PM_MPU_PWRSTST */ -#define AM33XX_MPU_L1_STATEST_SHIFT 6 -#define AM33XX_MPU_L1_STATEST_MASK (0x3 << 6) - -/* Used by PM_MPU_PWRSTCTRL */ -#define AM33XX_MPU_L2_ONSTATE_SHIFT 20 -#define AM33XX_MPU_L2_ONSTATE_MASK (0x3 << 20) - -/* Used by PM_MPU_PWRSTCTRL */ -#define AM33XX_MPU_L2_RETSTATE_SHIFT 23 -#define AM33XX_MPU_L2_RETSTATE_MASK (1 << 23) - -/* Used by PM_MPU_PWRSTST */ -#define AM33XX_MPU_L2_STATEST_SHIFT 8 -#define AM33XX_MPU_L2_STATEST_MASK (0x3 << 8) - -/* Used by PM_MPU_PWRSTCTRL */ -#define AM33XX_MPU_RAM_ONSTATE_SHIFT 16 -#define AM33XX_MPU_RAM_ONSTATE_MASK (0x3 << 16) - -/* Used by PM_MPU_PWRSTCTRL */ -#define AM33XX_MPU_RAM_RETSTATE_SHIFT 24 -#define AM33XX_MPU_RAM_RETSTATE_MASK (1 << 24) - -/* Used by PM_MPU_PWRSTST */ -#define AM33XX_MPU_RAM_STATEST_SHIFT 4 -#define AM33XX_MPU_RAM_STATEST_MASK (0x3 << 4) - -/* Used by PRM_RSTST */ -#define AM33XX_MPU_SECURITY_VIOL_RST_SHIFT 2 -#define AM33XX_MPU_SECURITY_VIOL_RST_MASK (1 << 2) - -/* Used by PRM_SRAM_COUNT */ -#define AM33XX_PCHARGECNT_VALUE_SHIFT 0 -#define AM33XX_PCHARGECNT_VALUE_MASK (0x3f << 0) - -/* Used by RM_PER_RSTCTRL */ -#define AM33XX_PCI_LRST_SHIFT 0 -#define AM33XX_PCI_LRST_MASK (1 << 0) - -/* Renamed from PCI_LRST Used by RM_PER_RSTST */ -#define AM33XX_PCI_LRST_5_5_SHIFT 5 -#define AM33XX_PCI_LRST_5_5_MASK (1 << 5) - -/* Used by PM_PER_PWRSTCTRL */ -#define AM33XX_PER_MEM_ONSTATE_SHIFT 25 -#define AM33XX_PER_MEM_ONSTATE_MASK (0x3 << 25) - -/* Used by PM_PER_PWRSTCTRL */ -#define AM33XX_PER_MEM_RETSTATE_SHIFT 29 -#define AM33XX_PER_MEM_RETSTATE_MASK (1 << 29) - -/* Used by PM_PER_PWRSTST */ -#define AM33XX_PER_MEM_STATEST_SHIFT 17 -#define AM33XX_PER_MEM_STATEST_MASK (0x3 << 17) - -/* - * Used by PM_GFX_PWRSTCTRL, PM_CEFUSE_PWRSTCTRL, PM_PER_PWRSTCTRL, - * PM_MPU_PWRSTCTRL - */ -#define AM33XX_POWERSTATE_SHIFT 0 -#define AM33XX_POWERSTATE_MASK (0x3 << 0) - -/* Used by PM_GFX_PWRSTST, PM_CEFUSE_PWRSTST, PM_PER_PWRSTST, PM_MPU_PWRSTST */ -#define AM33XX_POWERSTATEST_SHIFT 0 -#define AM33XX_POWERSTATEST_MASK (0x3 << 0) - -/* Used by PM_PER_PWRSTCTRL */ -#define AM33XX_RAM_MEM_ONSTATE_SHIFT 30 -#define AM33XX_RAM_MEM_ONSTATE_MASK (0x3 << 30) - -/* Used by PM_PER_PWRSTCTRL */ -#define AM33XX_RAM_MEM_RETSTATE_SHIFT 27 -#define AM33XX_RAM_MEM_RETSTATE_MASK (1 << 27) - -/* Used by PM_PER_PWRSTST */ -#define AM33XX_RAM_MEM_STATEST_SHIFT 21 -#define AM33XX_RAM_MEM_STATEST_MASK (0x3 << 21) - -/* Used by PRM_LDO_SRAM_CORE_CTRL, PRM_LDO_SRAM_MPU_CTRL */ -#define AM33XX_RETMODE_ENABLE_SHIFT 0 -#define AM33XX_RETMODE_ENABLE_MASK (1 << 0) - -/* Used by REVISION_PRM */ -#define AM33XX_REV_SHIFT 0 -#define AM33XX_REV_MASK (0xff << 0) - -/* Used by PRM_RSTTIME */ -#define AM33XX_RSTTIME1_SHIFT 0 -#define AM33XX_RSTTIME1_MASK (0xff << 0) - -/* Used by PRM_RSTTIME */ -#define AM33XX_RSTTIME2_SHIFT 8 -#define AM33XX_RSTTIME2_MASK (0x1f << 8) - -/* Used by PRM_RSTCTRL */ -#define AM33XX_RST_GLOBAL_COLD_SW_SHIFT 1 -#define AM33XX_RST_GLOBAL_COLD_SW_MASK (1 << 1) - -/* Used by PRM_RSTCTRL */ -#define AM33XX_RST_GLOBAL_WARM_SW_SHIFT 0 -#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0) - -/* Used by PRM_SRAM_COUNT */ -#define AM33XX_SLPCNT_VALUE_SHIFT 16 -#define AM33XX_SLPCNT_VALUE_MASK (0xff << 16) - -/* Used by PRM_LDO_SRAM_CORE_CTRL, PRM_LDO_SRAM_MPU_CTRL */ -#define AM33XX_SRAMLDO_STATUS_SHIFT 8 -#define AM33XX_SRAMLDO_STATUS_MASK (1 << 8) - -/* Used by PRM_LDO_SRAM_CORE_CTRL, PRM_LDO_SRAM_MPU_CTRL */ -#define AM33XX_SRAM_IN_TRANSITION_SHIFT 9 -#define AM33XX_SRAM_IN_TRANSITION_MASK (1 << 9) - -/* Used by PRM_SRAM_COUNT */ -#define AM33XX_STARTUP_COUNT_SHIFT 24 -#define AM33XX_STARTUP_COUNT_MASK (0xff << 24) - -/* Used by PRM_IRQENABLE_M3, PRM_IRQENABLE_MPU */ -#define AM33XX_TRANSITION_EN_SHIFT 8 -#define AM33XX_TRANSITION_EN_MASK (1 << 8) - -/* Used by PRM_IRQSTATUS_M3, PRM_IRQSTATUS_MPU */ -#define AM33XX_TRANSITION_ST_SHIFT 8 -#define AM33XX_TRANSITION_ST_MASK (1 << 8) - -/* Used by PRM_SRAM_COUNT */ -#define AM33XX_VSETUPCNT_VALUE_SHIFT 8 -#define AM33XX_VSETUPCNT_VALUE_MASK (0xff << 8) - -/* Used by PRM_RSTST */ -#define AM33XX_WDT0_RST_SHIFT 3 -#define AM33XX_WDT0_RST_MASK (1 << 3) - -/* Used by PRM_RSTST */ -#define AM33XX_WDT1_RST_SHIFT 4 -#define AM33XX_WDT1_RST_MASK (1 << 4) - -/* Used by RM_WKUP_RSTCTRL */ -#define AM33XX_WKUP_M3_LRST_SHIFT 3 -#define AM33XX_WKUP_M3_LRST_MASK (1 << 3) - -/* Renamed from WKUP_M3_LRST Used by RM_WKUP_RSTST */ -#define AM33XX_WKUP_M3_LRST_5_5_SHIFT 5 -#define AM33XX_WKUP_M3_LRST_5_5_MASK (1 << 5) - -#endif diff --git a/trunk/arch/arm/mach-omap2/prm2xxx_3xxx.h b/trunk/arch/arm/mach-omap2/prm2xxx_3xxx.h index f7bb57fff416..70ac2a19dc5f 100644 --- a/trunk/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/trunk/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -228,6 +228,68 @@ #ifndef __ASSEMBLER__ +/* + * Stub omap2xxx/omap3xxx functions so that common files + * continue to build when custom builds are used + */ +#if defined(CONFIG_ARCH_OMAP4) && !(defined(CONFIG_ARCH_OMAP2) || \ + defined(CONFIG_ARCH_OMAP3)) +static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); + return 0; +} +static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); +} +static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, + s16 module, s16 idx) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); + return 0; +} +static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); + return 0; +} +static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); + return 0; +} +static inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); + return 0; +} +static inline int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); + return 0; +} +static inline int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); + return 0; +} +static inline int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, + u8 st_shift) +{ + WARN(1, "prm: omap2xxx/omap3xxx specific function and " + "not suppose to be used on omap4\n"); + return 0; +} +#else /* Power/reset management domain register get/set */ extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx); extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx); @@ -258,6 +320,9 @@ extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); extern void omap3xxx_prm_ocp_barrier(void); extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); + +#endif /* CONFIG_ARCH_OMAP4 */ + #endif /* diff --git a/trunk/arch/arm/mach-omap2/prm33xx.c b/trunk/arch/arm/mach-omap2/prm33xx.c deleted file mode 100644 index e7dbb6cf1255..000000000000 --- a/trunk/arch/arm/mach-omap2/prm33xx.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * AM33XX PRM functions - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -#include - -#include "common.h" -#include "prm33xx.h" -#include "prm-regbits-33xx.h" - -/* Read a register in a PRM instance */ -u32 am33xx_prm_read_reg(s16 inst, u16 idx) -{ - return __raw_readl(prm_base + inst + idx); -} - -/* Write into a register in a PRM instance */ -void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx) -{ - __raw_writel(val, prm_base + inst + idx); -} - -/* Read-modify-write a register in PRM. Caller must lock */ -u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx) -{ - u32 v; - - v = am33xx_prm_read_reg(inst, idx); - v &= ~mask; - v |= bits; - am33xx_prm_write_reg(v, inst, idx); - - return v; -} - -/** - * am33xx_prm_is_hardreset_asserted - read the HW reset line state of - * submodules contained in the hwmod module - * @shift: register bit shift corresponding to the reset line to check - * @inst: CM instance register offset (*_INST macro) - * @rstctrl_offs: RM_RSTCTRL register address offset for this module - * - * Returns 1 if the (sub)module hardreset line is currently asserted, - * 0 if the (sub)module hardreset line is not currently asserted, or - * -EINVAL upon parameter error. - */ -int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs) -{ - u32 v; - - v = am33xx_prm_read_reg(inst, rstctrl_offs); - v &= 1 << shift; - v >>= shift; - - return v; -} - -/** - * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule - * @shift: register bit shift corresponding to the reset line to assert - * @inst: CM instance register offset (*_INST macro) - * @rstctrl_reg: RM_RSTCTRL register address for this module - * - * Some IPs like dsp, ipu or iva contain processors that require an HW - * reset line to be asserted / deasserted in order to fully enable the - * IP. These modules may have multiple hard-reset lines that reset - * different 'submodules' inside the IP block. This function will - * place the submodule into reset. Returns 0 upon success or -EINVAL - * upon an argument error. - */ -int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs) -{ - u32 mask = 1 << shift; - - am33xx_prm_rmw_reg_bits(mask, mask, inst, rstctrl_offs); - - return 0; -} - -/** - * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and - * wait - * @shift: register bit shift corresponding to the reset line to deassert - * @inst: CM instance register offset (*_INST macro) - * @rstctrl_reg: RM_RSTCTRL register address for this module - * @rstst_reg: RM_RSTST register address for this module - * - * Some IPs like dsp, ipu or iva contain processors that require an HW - * reset line to be asserted / deasserted in order to fully enable the - * IP. These modules may have multiple hard-reset lines that reset - * different 'submodules' inside the IP block. This function will - * take the submodule out of reset and wait until the PRCM indicates - * that the reset has completed before returning. Returns 0 upon success or - * -EINVAL upon an argument error, -EEXIST if the submodule was already out - * of reset, or -EBUSY if the submodule did not exit reset promptly. - */ -int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, - u16 rstctrl_offs, u16 rstst_offs) -{ - int c; - u32 mask = 1 << shift; - - /* Check the current status to avoid de-asserting the line twice */ - if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0) - return -EEXIST; - - /* Clear the reset status by writing 1 to the status bit */ - am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs); - /* de-assert the reset control line */ - am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs); - /* wait the status to be set */ - - omap_test_timeout(am33xx_prm_is_hardreset_asserted(shift, inst, - rstst_offs), - MAX_MODULE_HARDRESET_WAIT, c); - - return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; -} diff --git a/trunk/arch/arm/mach-omap2/prm33xx.h b/trunk/arch/arm/mach-omap2/prm33xx.h deleted file mode 100644 index 3f25c563a821..000000000000 --- a/trunk/arch/arm/mach-omap2/prm33xx.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * AM33XX PRM instance offset macros - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ARCH_ARM_MACH_OMAP2_PRM33XX_H -#define __ARCH_ARM_MACH_OMAP2_PRM33XX_H - -#include "prcm-common.h" -#include "prm.h" - -#define AM33XX_PRM_BASE 0x44E00000 - -#define AM33XX_PRM_REGADDR(inst, reg) \ - AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRM_BASE + (inst) + (reg)) - - -/* PRM instances */ -#define AM33XX_PRM_OCP_SOCKET_MOD 0x0B00 -#define AM33XX_PRM_PER_MOD 0x0C00 -#define AM33XX_PRM_WKUP_MOD 0x0D00 -#define AM33XX_PRM_MPU_MOD 0x0E00 -#define AM33XX_PRM_DEVICE_MOD 0x0F00 -#define AM33XX_PRM_RTC_MOD 0x1000 -#define AM33XX_PRM_GFX_MOD 0x1100 -#define AM33XX_PRM_CEFUSE_MOD 0x1200 - -/* PRM */ - -/* PRM.OCP_SOCKET_PRM register offsets */ -#define AM33XX_REVISION_PRM_OFFSET 0x0000 -#define AM33XX_REVISION_PRM AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x0000) -#define AM33XX_PRM_IRQSTATUS_MPU_OFFSET 0x0004 -#define AM33XX_PRM_IRQSTATUS_MPU AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x0004) -#define AM33XX_PRM_IRQENABLE_MPU_OFFSET 0x0008 -#define AM33XX_PRM_IRQENABLE_MPU AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x0008) -#define AM33XX_PRM_IRQSTATUS_M3_OFFSET 0x000c -#define AM33XX_PRM_IRQSTATUS_M3 AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x000c) -#define AM33XX_PRM_IRQENABLE_M3_OFFSET 0x0010 -#define AM33XX_PRM_IRQENABLE_M3 AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x0010) - -/* PRM.PER_PRM register offsets */ -#define AM33XX_RM_PER_RSTCTRL_OFFSET 0x0000 -#define AM33XX_RM_PER_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0000) -#define AM33XX_RM_PER_RSTST_OFFSET 0x0004 -#define AM33XX_RM_PER_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0004) -#define AM33XX_PM_PER_PWRSTST_OFFSET 0x0008 -#define AM33XX_PM_PER_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008) -#define AM33XX_PM_PER_PWRSTCTRL_OFFSET 0x000c -#define AM33XX_PM_PER_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x000c) - -/* PRM.WKUP_PRM register offsets */ -#define AM33XX_RM_WKUP_RSTCTRL_OFFSET 0x0000 -#define AM33XX_RM_WKUP_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0000) -#define AM33XX_PM_WKUP_PWRSTCTRL_OFFSET 0x0004 -#define AM33XX_PM_WKUP_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0004) -#define AM33XX_PM_WKUP_PWRSTST_OFFSET 0x0008 -#define AM33XX_PM_WKUP_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0008) -#define AM33XX_RM_WKUP_RSTST_OFFSET 0x000c -#define AM33XX_RM_WKUP_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x000c) - -/* PRM.MPU_PRM register offsets */ -#define AM33XX_PM_MPU_PWRSTCTRL_OFFSET 0x0000 -#define AM33XX_PM_MPU_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0000) -#define AM33XX_PM_MPU_PWRSTST_OFFSET 0x0004 -#define AM33XX_PM_MPU_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0004) -#define AM33XX_RM_MPU_RSTST_OFFSET 0x0008 -#define AM33XX_RM_MPU_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0008) - -/* PRM.DEVICE_PRM register offsets */ -#define AM33XX_PRM_RSTCTRL_OFFSET 0x0000 -#define AM33XX_PRM_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0000) -#define AM33XX_PRM_RSTTIME_OFFSET 0x0004 -#define AM33XX_PRM_RSTTIME AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0004) -#define AM33XX_PRM_RSTST_OFFSET 0x0008 -#define AM33XX_PRM_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0008) -#define AM33XX_PRM_SRAM_COUNT_OFFSET 0x000c -#define AM33XX_PRM_SRAM_COUNT AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x000c) -#define AM33XX_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x0010 -#define AM33XX_PRM_LDO_SRAM_CORE_SETUP AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0010) -#define AM33XX_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x0014 -#define AM33XX_PRM_LDO_SRAM_CORE_CTRL AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0014) -#define AM33XX_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x0018 -#define AM33XX_PRM_LDO_SRAM_MPU_SETUP AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0018) -#define AM33XX_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x001c -#define AM33XX_PRM_LDO_SRAM_MPU_CTRL AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x001c) - -/* PRM.RTC_PRM register offsets */ -#define AM33XX_PM_RTC_PWRSTCTRL_OFFSET 0x0000 -#define AM33XX_PM_RTC_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0000) -#define AM33XX_PM_RTC_PWRSTST_OFFSET 0x0004 -#define AM33XX_PM_RTC_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0004) - -/* PRM.GFX_PRM register offsets */ -#define AM33XX_PM_GFX_PWRSTCTRL_OFFSET 0x0000 -#define AM33XX_PM_GFX_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0000) -#define AM33XX_RM_GFX_RSTCTRL_OFFSET 0x0004 -#define AM33XX_RM_GFX_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0004) -#define AM33XX_PM_GFX_PWRSTST_OFFSET 0x0010 -#define AM33XX_PM_GFX_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0010) -#define AM33XX_RM_GFX_RSTST_OFFSET 0x0014 -#define AM33XX_RM_GFX_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0014) - -/* PRM.CEFUSE_PRM register offsets */ -#define AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000 -#define AM33XX_PM_CEFUSE_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0000) -#define AM33XX_PM_CEFUSE_PWRSTST_OFFSET 0x0004 -#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004) - -extern u32 am33xx_prm_read_reg(s16 inst, u16 idx); -extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx); -extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); -extern void am33xx_prm_global_warm_sw_reset(void); -extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, - u16 rstctrl_offs); -extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs); -extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, - u16 rstctrl_offs, u16 rstst_offs); -#endif diff --git a/trunk/arch/arm/mach-omap2/prm_common.c b/trunk/arch/arm/mach-omap2/prm_common.c index 663ade3b2f45..dfe00ddb5c60 100644 --- a/trunk/arch/arm/mach-omap2/prm_common.c +++ b/trunk/arch/arm/mach-omap2/prm_common.c @@ -319,65 +319,3 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) omap_prcm_irq_cleanup(); return -ENOMEM; } - -/* - * Stubbed functions so that common files continue to build when - * custom builds are used - * XXX These are temporary and should be removed at the earliest possible - * opportunity - */ -u32 __weak omap2_prm_read_mod_reg(s16 module, u16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} - -void __weak omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); -} - -u32 __weak omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, - s16 module, s16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} - -u32 __weak omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} - -u32 __weak omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} - -u32 __weak omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} - -int __weak omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} - -int __weak omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} - -int __weak omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, - u8 st_shift) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} - diff --git a/trunk/arch/arm/mach-omap2/timer.c b/trunk/arch/arm/mach-omap2/timer.c index 2b318ec92d39..840929bd9dae 100644 --- a/trunk/arch/arm/mach-omap2/timer.c +++ b/trunk/arch/arm/mach-omap2/timer.c @@ -69,6 +69,11 @@ #define OMAP3_SECURE_TIMER 1 #endif +/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ +#define MAX_GPTIMER_ID 12 + +static u32 sys_timer_reserved; + /* Clockevent code */ static struct omap_dm_timer clkev; @@ -168,14 +173,14 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, return -ENXIO; /* After the dmtimer is using hwmod these clocks won't be needed */ - timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh)); + sprintf(name, "gpt%d_fck", gptimer_id); + timer->fclk = clk_get(NULL, name); if (IS_ERR(timer->fclk)) return -ENODEV; omap_hwmod_enable(oh); - if (omap_dm_timer_reserve_systimer(gptimer_id)) - return -ENODEV; + sys_timer_reserved |= (1 << (gptimer_id - 1)); if (gptimer_id != 12) { struct clk *src; @@ -363,11 +368,6 @@ OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, OMAP_SYS_TIMER(3_secure) #endif -#ifdef CONFIG_SOC_AM33XX -OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE) -OMAP_SYS_TIMER(3_am33xx) -#endif - #ifdef CONFIG_ARCH_OMAP4 #ifdef CONFIG_LOCAL_TIMERS static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, @@ -393,6 +393,66 @@ static void __init omap4_timer_init(void) OMAP_SYS_TIMER(4) #endif +/** + * omap2_dm_timer_set_src - change the timer input clock source + * @pdev: timer platform device pointer + * @source: array index of parent clock source + */ +static int omap2_dm_timer_set_src(struct platform_device *pdev, int source) +{ + int ret; + struct dmtimer_platform_data *pdata = pdev->dev.platform_data; + struct clk *fclk, *parent; + char *parent_name = NULL; + + fclk = clk_get(&pdev->dev, "fck"); + if (IS_ERR_OR_NULL(fclk)) { + dev_err(&pdev->dev, "%s: %d: clk_get() FAILED\n", + __func__, __LINE__); + return -EINVAL; + } + + switch (source) { + case OMAP_TIMER_SRC_SYS_CLK: + parent_name = "sys_ck"; + break; + + case OMAP_TIMER_SRC_32_KHZ: + parent_name = "32k_ck"; + break; + + case OMAP_TIMER_SRC_EXT_CLK: + if (pdata->timer_ip_version == OMAP_TIMER_IP_VERSION_1) { + parent_name = "alt_ck"; + break; + } + dev_err(&pdev->dev, "%s: %d: invalid clk src.\n", + __func__, __LINE__); + clk_put(fclk); + return -EINVAL; + } + + parent = clk_get(&pdev->dev, parent_name); + if (IS_ERR_OR_NULL(parent)) { + dev_err(&pdev->dev, "%s: %d: clk_get() %s FAILED\n", + __func__, __LINE__, parent_name); + clk_put(fclk); + return -EINVAL; + } + + ret = clk_set_parent(fclk, parent); + if (IS_ERR_VALUE(ret)) { + dev_err(&pdev->dev, "%s: clk_set_parent() to %s FAILED\n", + __func__, parent_name); + ret = -EINVAL; + } + + clk_put(parent); + clk_put(fclk); + + return ret; +} + /** * omap_timer_init - build and register timer device with an * associated timer hwmod @@ -413,6 +473,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) struct dmtimer_platform_data *pdata; struct platform_device *pdev; struct omap_timer_capability_dev_attr *timer_dev_attr; + struct powerdomain *pwrdm; pr_debug("%s: %s\n", __func__, oh->name); @@ -440,9 +501,18 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) */ sscanf(oh->name, "timer%2d", &id); - if (timer_dev_attr) - pdata->timer_capability = timer_dev_attr->timer_capability; + pdata->set_timer_src = omap2_dm_timer_set_src; + pdata->timer_ip_version = oh->class->rev; + /* Mark clocksource and clockevent timers as reserved */ + if ((sys_timer_reserved >> (id - 1)) & 0x1) + pdata->reserved = 1; + + pwrdm = omap_hwmod_get_pwrdm(oh); + pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm); +#ifdef CONFIG_PM + pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; +#endif pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), NULL, 0, 0); diff --git a/trunk/arch/arm/mach-omap2/twl-common.c b/trunk/arch/arm/mach-omap2/twl-common.c index 119d5a910f3a..43a979075338 100644 --- a/trunk/arch/arm/mach-omap2/twl-common.c +++ b/trunk/arch/arm/mach-omap2/twl-common.c @@ -32,6 +32,7 @@ #include "twl-common.h" #include "pm.h" #include "voltage.h" +#include "mux.h" static struct i2c_board_info __initdata pmic_i2c_board_info = { .addr = 0x48, @@ -77,6 +78,7 @@ void __init omap4_pmic_init(const char *pmic_type, struct twl6040_platform_data *twl6040_data, int twl6040_irq) { /* PMIC part*/ + omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); strncpy(omap4_i2c1_board_info[0].type, pmic_type, sizeof(omap4_i2c1_board_info[0].type)); omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N; diff --git a/trunk/arch/arm/mach-omap2/usb-fs.c b/trunk/arch/arm/mach-omap2/usb-fs.c new file mode 100644 index 000000000000..1481078763b8 --- /dev/null +++ b/trunk/arch/arm/mach-omap2/usb-fs.c @@ -0,0 +1,359 @@ +/* + * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx + * + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include "control.h" +#include "mux.h" + +#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN +#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO +#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO +#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN +#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG + +#if defined(CONFIG_ARCH_OMAP2) + +#ifdef CONFIG_USB_GADGET_OMAP + +static struct resource udc_resources[] = { + /* order is significant! */ + { /* registers */ + .start = UDC_BASE, + .end = UDC_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { /* general IRQ */ + .start = INT_USB_IRQ_GEN, + .flags = IORESOURCE_IRQ, + }, { /* PIO IRQ */ + .start = INT_USB_IRQ_NISO, + .flags = IORESOURCE_IRQ, + }, { /* SOF IRQ */ + .start = INT_USB_IRQ_ISO, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 udc_dmamask = ~(u32)0; + +static struct platform_device udc_device = { + .name = "omap_udc", + .id = -1, + .dev = { + .dma_mask = &udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(udc_resources), + .resource = udc_resources, +}; + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ + pdata->udc_device = &udc_device; +} + +#else + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + +/* The dmamask must be set for OHCI to work */ +static u64 ohci_dmamask = ~(u32)0; + +static struct resource ohci_resources[] = { + { + .start = OMAP_OHCI_BASE, + .end = OMAP_OHCI_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_USB_IRQ_HGEN, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ohci_device = { + .name = "ohci", + .id = -1, + .dev = { + .dma_mask = &ohci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(ohci_resources), + .resource = ohci_resources, +}; + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ + pdata->ohci_device = &ohci_device; +} + +#else + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) + +static struct resource otg_resources[] = { + /* order is significant! */ + { + .start = OTG_BASE, + .end = OTG_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { + .start = INT_USB_IRQ_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device otg_device = { + .name = "omap_otg", + .id = -1, + .num_resources = ARRAY_SIZE(otg_resources), + .resource = otg_resources, +}; + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ + pdata->otg_device = &otg_device; +} + +#else + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +static void omap2_usb_devconf_clear(u8 port, u32 mask) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r &= ~USBTXWRMODEI(port, mask); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb_devconf_set(u8 port, u32 mask) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r |= USBTXWRMODEI(port, mask); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb2_disable_5pinbitll(void) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb2_enable_5pinunitll(void) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI; + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device) +{ + u32 syscon1 = 0; + + omap2_usb_devconf_clear(0, USB_BIDIR_TLL); + + if (nwires == 0) + return 0; + + if (is_device) + omap_mux_init_signal("usb0_puen", 0); + + omap_mux_init_signal("usb0_dat", 0); + omap_mux_init_signal("usb0_txen", 0); + omap_mux_init_signal("usb0_se0", 0); + if (nwires != 3) + omap_mux_init_signal("usb0_rcv", 0); + + switch (nwires) { + case 3: + syscon1 = 2; + omap2_usb_devconf_set(0, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(0, USB_BIDIR); + break; + case 6: + syscon1 = 3; + omap_mux_init_signal("usb0_vp", 0); + omap_mux_init_signal("usb0_vm", 0); + omap2_usb_devconf_set(0, USB_UNIDIR); + break; + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 0, nwires); + } + + return syscon1 << 16; +} + +static u32 __init omap2_usb1_init(unsigned nwires) +{ + u32 syscon1 = 0; + + omap2_usb_devconf_clear(1, USB_BIDIR_TLL); + + if (nwires == 0) + return 0; + + /* NOTE: board-specific code must set up pin muxing for usb1, + * since each signal could come out on either of two balls. + */ + + switch (nwires) { + case 2: + /* NOTE: board-specific code must override this setting if + * this TLL link is not using DP/DM + */ + syscon1 = 1; + omap2_usb_devconf_set(1, USB_BIDIR_TLL); + break; + case 3: + syscon1 = 2; + omap2_usb_devconf_set(1, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(1, USB_BIDIR); + break; + case 6: + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 1, nwires); + } + + return syscon1 << 20; +} + +static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup) +{ + u32 syscon1 = 0; + + omap2_usb2_disable_5pinbitll(); + alt_pingroup = 0; + + /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ + if (alt_pingroup || nwires == 0) + return 0; + + omap_mux_init_signal("usb2_dat", 0); + omap_mux_init_signal("usb2_se0", 0); + if (nwires > 2) + omap_mux_init_signal("usb2_txen", 0); + if (nwires > 3) + omap_mux_init_signal("usb2_rcv", 0); + + switch (nwires) { + case 2: + /* NOTE: board-specific code must override this setting if + * this TLL link is not using DP/DM + */ + syscon1 = 1; + omap2_usb_devconf_set(2, USB_BIDIR_TLL); + break; + case 3: + syscon1 = 2; + omap2_usb_devconf_set(2, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(2, USB_BIDIR); + break; + case 5: + /* NOTE: board-specific code must mux this setting depending + * on TLL link using DP/DM. Something must also + * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} + * 2420: hdq_sio.usb2_tllse0 or vlynq_rx0.usb2_tllse0 + * 2430: hdq_sio.usb2_tllse0 or sdmmc2_dat0.usb2_tllse0 + */ + + syscon1 = 3; + omap2_usb2_enable_5pinunitll(); + break; + case 6: + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 2, nwires); + } + + return syscon1 << 24; +} + +void __init omap2_usbfs_init(struct omap_usb_config *pdata) +{ + struct clk *ick; + + if (!cpu_is_omap24xx()) + return; + + ick = clk_get(NULL, "usb_l4_ick"); + if (IS_ERR(ick)) + return; + + clk_enable(ick); + pdata->usb0_init = omap2_usb0_init; + pdata->usb1_init = omap2_usb1_init; + pdata->usb2_init = omap2_usb2_init; + udc_device_init(pdata); + ohci_device_init(pdata); + otg_device_init(pdata); + omap_otg_init(pdata); + clk_disable(ick); + clk_put(ick); +} + +#endif diff --git a/trunk/arch/arm/mach-omap2/voltage.h b/trunk/arch/arm/mach-omap2/voltage.h index a7c43c1042be..16a1b092cf36 100644 --- a/trunk/arch/arm/mach-omap2/voltage.h +++ b/trunk/arch/arm/mach-omap2/voltage.h @@ -156,7 +156,6 @@ int omap_voltage_late_init(void); extern void omap2xxx_voltagedomains_init(void); extern void omap3xxx_voltagedomains_init(void); -extern void am33xx_voltagedomains_init(void); extern void omap44xx_voltagedomains_init(void); struct voltagedomain *voltdm_lookup(const char *name); diff --git a/trunk/arch/arm/mach-omap2/voltagedomains33xx_data.c b/trunk/arch/arm/mach-omap2/voltagedomains33xx_data.c deleted file mode 100644 index 965458dc0cb9..000000000000 --- a/trunk/arch/arm/mach-omap2/voltagedomains33xx_data.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * AM33XX voltage domain data - * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include - -#include "voltage.h" - -static struct voltagedomain am33xx_voltdm_mpu = { - .name = "mpu", -}; - -static struct voltagedomain am33xx_voltdm_core = { - .name = "core", -}; - -static struct voltagedomain am33xx_voltdm_rtc = { - .name = "rtc", -}; - -static struct voltagedomain *voltagedomains_am33xx[] __initdata = { - &am33xx_voltdm_mpu, - &am33xx_voltdm_core, - &am33xx_voltdm_rtc, - NULL, -}; - -void __init am33xx_voltagedomains_init(void) -{ - voltdm_init(voltagedomains_am33xx); -} diff --git a/trunk/arch/arm/mach-pxa/hx4700.c b/trunk/arch/arm/mach-pxa/hx4700.c index d09da6a746b8..d3de84b0dcbe 100644 --- a/trunk/arch/arm/mach-pxa/hx4700.c +++ b/trunk/arch/arm/mach-pxa/hx4700.c @@ -127,7 +127,11 @@ static unsigned long hx4700_pin_config[] __initdata = { GPIO19_SSP2_SCLK, GPIO86_SSP2_RXD, GPIO87_SSP2_TXD, - GPIO88_GPIO, + GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */ + + /* BQ24022 Regulator */ + GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */ + GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */ /* HX4700 specific input GPIOs */ GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */ @@ -135,6 +139,10 @@ static unsigned long hx4700_pin_config[] __initdata = { GPIO14_GPIO, /* nWLAN_IRQ */ /* HX4700 specific output GPIOs */ + GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */ + GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */ + GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */ + GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */ GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */ GPIO10_GPIO, /* GSM_IRQ */ @@ -872,14 +880,19 @@ static struct gpio global_gpios[] = { { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" }, { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" }, { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" }, + { GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" }, { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" }, + { GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" }, { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" }, + { GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" }, }; static void __init hx4700_init(void) { int ret; + PCFR = PCFR_GPR_EN | PCFR_OPDE; + pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config)); gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1); ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios)); diff --git a/trunk/arch/arm/mach-tegra/Kconfig b/trunk/arch/arm/mach-tegra/Kconfig index 7c407393cd07..6a113a9bb87a 100644 --- a/trunk/arch/arm/mach-tegra/Kconfig +++ b/trunk/arch/arm/mach-tegra/Kconfig @@ -63,6 +63,7 @@ comment "Tegra board type" config MACH_HARMONY bool "Harmony board" depends on ARCH_TEGRA_2x_SOC + select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for nVidia Harmony development platform @@ -70,6 +71,7 @@ config MACH_KAEN bool "Kaen board" depends on ARCH_TEGRA_2x_SOC select MACH_SEABOARD + select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for the Kaen version of Seaboard @@ -82,6 +84,7 @@ config MACH_PAZ00 config MACH_SEABOARD bool "Seaboard board" depends on ARCH_TEGRA_2x_SOC + select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for nVidia Seaboard development platform. It will also be included for some of the derivative boards that diff --git a/trunk/arch/arm/mach-tegra/Makefile.boot b/trunk/arch/arm/mach-tegra/Makefile.boot index 8040345bd971..9a82094092d7 100644 --- a/trunk/arch/arm/mach-tegra/Makefile.boot +++ b/trunk/arch/arm/mach-tegra/Makefile.boot @@ -2,9 +2,9 @@ zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 -dtb-$(CONFIG_MACH_HARMONY) += tegra20-harmony.dtb -dtb-$(CONFIG_MACH_PAZ00) += tegra20-paz00.dtb -dtb-$(CONFIG_MACH_SEABOARD) += tegra20-seaboard.dtb -dtb-$(CONFIG_MACH_TRIMSLICE) += tegra20-trimslice.dtb -dtb-$(CONFIG_MACH_VENTANA) += tegra20-ventana.dtb -dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb +dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb +dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb +dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb +dtb-$(CONFIG_MACH_TRIMSLICE) += tegra-trimslice.dtb +dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb +dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra-cardhu.dtb diff --git a/trunk/arch/arm/mach-tegra/cpu-tegra.c b/trunk/arch/arm/mach-tegra/cpu-tegra.c index ceb52db1e2f1..7a065f0cf633 100644 --- a/trunk/arch/arm/mach-tegra/cpu-tegra.c +++ b/trunk/arch/arm/mach-tegra/cpu-tegra.c @@ -189,8 +189,8 @@ static int tegra_cpu_init(struct cpufreq_policy *policy) return PTR_ERR(emc_clk); } - clk_prepare_enable(emc_clk); - clk_prepare_enable(cpu_clk); + clk_enable(emc_clk); + clk_enable(cpu_clk); cpufreq_frequency_table_cpuinfo(policy, freq_table); cpufreq_frequency_table_get_attr(freq_table, policy->cpu); @@ -212,7 +212,7 @@ static int tegra_cpu_init(struct cpufreq_policy *policy) static int tegra_cpu_exit(struct cpufreq_policy *policy) { cpufreq_frequency_table_cpuinfo(policy, freq_table); - clk_disable_unprepare(emc_clk); + clk_disable(emc_clk); clk_put(emc_clk); clk_put(cpu_clk); return 0; diff --git a/trunk/arch/arm/mach-tegra/cpuidle.c b/trunk/arch/arm/mach-tegra/cpuidle.c index 566e2f88899b..d83a8c0296f5 100644 --- a/trunk/arch/arm/mach-tegra/cpuidle.c +++ b/trunk/arch/arm/mach-tegra/cpuidle.c @@ -27,10 +27,10 @@ #include #include -#include - #include +extern void tegra_cpu_wfi(void); + static int tegra_idle_enter_lp3(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index); @@ -64,7 +64,7 @@ static int tegra_idle_enter_lp3(struct cpuidle_device *dev, enter = ktime_get(); - cpu_do_idle(); + tegra_cpu_wfi(); exit = ktime_sub(ktime_get(), enter); us = ktime_to_us(exit); diff --git a/trunk/arch/arm/mach-tegra/dma.c b/trunk/arch/arm/mach-tegra/dma.c index 29c5114d607c..abea4f6e2dd5 100644 --- a/trunk/arch/arm/mach-tegra/dma.c +++ b/trunk/arch/arm/mach-tegra/dma.c @@ -714,13 +714,13 @@ int __init tegra_dma_init(void) bitmap_fill(channel_usage, NV_DMA_MAX_CHANNELS); - c = clk_get_sys("tegra-apbdma", NULL); + c = clk_get_sys("tegra-dma", NULL); if (IS_ERR(c)) { pr_err("Unable to get clock for APB DMA\n"); ret = PTR_ERR(c); goto fail; } - ret = clk_prepare_enable(c); + ret = clk_enable(c); if (ret != 0) { pr_err("Unable to enable clock for APB DMA\n"); goto fail; diff --git a/trunk/arch/arm/mach-tegra/pcie.c b/trunk/arch/arm/mach-tegra/pcie.c index d3ad5150d660..0e09137506ec 100644 --- a/trunk/arch/arm/mach-tegra/pcie.c +++ b/trunk/arch/arm/mach-tegra/pcie.c @@ -723,9 +723,9 @@ static int tegra_pcie_power_regate(void) tegra_pcie_xclk_clamp(false); - clk_prepare_enable(tegra_pcie.afi_clk); - clk_prepare_enable(tegra_pcie.pex_clk); - return clk_prepare_enable(tegra_pcie.pll_e); + clk_enable(tegra_pcie.afi_clk); + clk_enable(tegra_pcie.pex_clk); + return clk_enable(tegra_pcie.pll_e); } static int tegra_pcie_clocks_get(void) diff --git a/trunk/arch/arm/mach-tegra/powergate.c b/trunk/arch/arm/mach-tegra/powergate.c index 15d506501ccc..f5b12fb4ff12 100644 --- a/trunk/arch/arm/mach-tegra/powergate.c +++ b/trunk/arch/arm/mach-tegra/powergate.c @@ -146,7 +146,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk) if (ret) goto err_power; - ret = clk_prepare_enable(clk); + ret = clk_enable(clk); if (ret) goto err_clk; @@ -162,7 +162,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk) return 0; err_clamp: - clk_disable_unprepare(clk); + clk_disable(clk); err_clk: tegra_powergate_power_off(id); err_power: diff --git a/trunk/arch/arm/mach-tegra/sleep.S b/trunk/arch/arm/mach-tegra/sleep.S index d29b156a8011..5b20197bae7f 100644 --- a/trunk/arch/arm/mach-tegra/sleep.S +++ b/trunk/arch/arm/mach-tegra/sleep.S @@ -62,3 +62,32 @@ movw \reg, #:lower16:\val movt \reg, #:upper16:\val .endm + +/* + * tegra_cpu_wfi + * + * puts current CPU in clock-gated wfi using the flow controller + * + * corrupts r0-r3 + * must be called with MMU on + */ + +ENTRY(tegra_cpu_wfi) + cpu_id r0 + cpu_to_halt_reg r1, r0 + cpu_to_csr_reg r2, r0 + mov32 r0, TEGRA_FLOW_CTRL_VIRT + mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG + str r3, [r0, r2] @ clear event & interrupt status + mov r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME + str r3, [r0, r1] @ put flow controller in wait irq mode + dsb + wfi + mov r3, #0 + str r3, [r0, r1] @ clear flow controller halt status + mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG + str r3, [r0, r2] @ clear event & interrupt status + dsb + mov pc, lr +ENDPROC(tegra_cpu_wfi) + diff --git a/trunk/arch/arm/mach-tegra/tegra2_clocks.c b/trunk/arch/arm/mach-tegra/tegra2_clocks.c index a703844b2061..b59315ce3691 100644 --- a/trunk/arch/arm/mach-tegra/tegra2_clocks.c +++ b/trunk/arch/arm/mach-tegra/tegra2_clocks.c @@ -69,8 +69,6 @@ #define PERIPH_CLK_SOURCE_MASK (3<<30) #define PERIPH_CLK_SOURCE_SHIFT 30 -#define PERIPH_CLK_SOURCE_PWM_MASK (7<<28) -#define PERIPH_CLK_SOURCE_PWM_SHIFT 28 #define PERIPH_CLK_SOURCE_ENABLE (1<<28) #define PERIPH_CLK_SOURCE_DIVU71_MASK 0xFF #define PERIPH_CLK_SOURCE_DIVU16_MASK 0xFFFF @@ -910,20 +908,9 @@ static void tegra2_periph_clk_init(struct clk *c) u32 val = clk_readl(c->reg); const struct clk_mux_sel *mux = NULL; const struct clk_mux_sel *sel; - u32 shift; - u32 mask; - - if (c->flags & MUX_PWM) { - shift = PERIPH_CLK_SOURCE_PWM_SHIFT; - mask = PERIPH_CLK_SOURCE_PWM_MASK; - } else { - shift = PERIPH_CLK_SOURCE_SHIFT; - mask = PERIPH_CLK_SOURCE_MASK; - } - if (c->flags & MUX) { for (sel = c->inputs; sel->input != NULL; sel++) { - if ((val & mask) >> shift == sel->value) + if (val >> PERIPH_CLK_SOURCE_SHIFT == sel->value) mux = sel; } BUG_ON(!mux); @@ -1036,23 +1023,12 @@ static int tegra2_periph_clk_set_parent(struct clk *c, struct clk *p) { u32 val; const struct clk_mux_sel *sel; - u32 mask, shift; - pr_debug("%s: %s %s\n", __func__, c->name, p->name); - - if (c->flags & MUX_PWM) { - shift = PERIPH_CLK_SOURCE_PWM_SHIFT; - mask = PERIPH_CLK_SOURCE_PWM_MASK; - } else { - shift = PERIPH_CLK_SOURCE_SHIFT; - mask = PERIPH_CLK_SOURCE_MASK; - } - for (sel = c->inputs; sel->input != NULL; sel++) { if (sel->input == p) { val = clk_readl(c->reg); - val &= ~mask; - val |= (sel->value) << shift; + val &= ~PERIPH_CLK_SOURCE_MASK; + val |= (sel->value) << PERIPH_CLK_SOURCE_SHIFT; if (c->refcnt) clk_enable(p); @@ -2173,14 +2149,14 @@ static struct clk tegra_clk_emc = { } static struct clk tegra_list_clks[] = { - PERIPH_CLK("apbdma", "tegra-apbdma", NULL, 34, 0, 108000000, mux_pclk, 0), + PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0), PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("i2s1", "tegra20-i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("i2s2", "tegra20-i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, 100000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71), - PERIPH_CLK("pwm", "tegra-pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71 | MUX_PWM), + PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71), PERIPH_CLK("spi", "spi", NULL, 43, 0x114, 40000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), PERIPH_CLK("xio", "xio", NULL, 45, 0x120, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), PERIPH_CLK("twc", "twc", NULL, 16, 0x12c, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), @@ -2213,11 +2189,11 @@ static struct clk tegra_list_clks[] = { PERIPH_CLK("i2c2_i2c", "tegra-i2c.1", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), PERIPH_CLK("i2c3_i2c", "tegra-i2c.2", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), PERIPH_CLK("dvc_i2c", "tegra-i2c.3", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), - PERIPH_CLK("uarta", "tegra-uart.0", NULL, 6, 0x178, 600000000, mux_pllp_pllc_pllm_clkm, MUX), - PERIPH_CLK("uartb", "tegra-uart.1", NULL, 7, 0x17c, 600000000, mux_pllp_pllc_pllm_clkm, MUX), - PERIPH_CLK("uartc", "tegra-uart.2", NULL, 55, 0x1a0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), - PERIPH_CLK("uartd", "tegra-uart.3", NULL, 65, 0x1c0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), - PERIPH_CLK("uarte", "tegra-uart.4", NULL, 66, 0x1c4, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uarta", "uart.0", NULL, 6, 0x178, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartb", "uart.1", NULL, 7, 0x17c, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartc", "uart.2", NULL, 55, 0x1a0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartd", "uart.3", NULL, 65, 0x1c0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uarte", "uart.4", NULL, 66, 0x1c4, 600000000, mux_pllp_pllc_pllm_clkm, MUX), PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_MANUAL_RESET), /* scales with voltage and process_id */ PERIPH_CLK("2d", "2d", NULL, 21, 0x15c, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ PERIPH_CLK("vi", "tegra_camera", "vi", 20, 0x148, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ @@ -2269,16 +2245,20 @@ static struct clk tegra_list_clks[] = { * table under two names. */ static struct clk_duplicate tegra_clk_duplicates[] = { - CLK_DUPLICATE("uarta", "serial8250.0", NULL), - CLK_DUPLICATE("uartb", "serial8250.1", NULL), - CLK_DUPLICATE("uartc", "serial8250.2", NULL), - CLK_DUPLICATE("uartd", "serial8250.3", NULL), - CLK_DUPLICATE("uarte", "serial8250.4", NULL), + CLK_DUPLICATE("uarta", "tegra_uart.0", NULL), + CLK_DUPLICATE("uartb", "tegra_uart.1", NULL), + CLK_DUPLICATE("uartc", "tegra_uart.2", NULL), + CLK_DUPLICATE("uartd", "tegra_uart.3", NULL), + CLK_DUPLICATE("uarte", "tegra_uart.4", NULL), CLK_DUPLICATE("usbd", "utmip-pad", NULL), CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), CLK_DUPLICATE("usbd", "tegra-otg", NULL), CLK_DUPLICATE("hdmi", "tegradc.0", "hdmi"), CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), + CLK_DUPLICATE("pwm", "tegra_pwm.0", NULL), + CLK_DUPLICATE("pwm", "tegra_pwm.1", NULL), + CLK_DUPLICATE("pwm", "tegra_pwm.2", NULL), + CLK_DUPLICATE("pwm", "tegra_pwm.3", NULL), CLK_DUPLICATE("host1x", "tegra_grhost", "host1x"), CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"), CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"), diff --git a/trunk/arch/arm/mach-tegra/tegra30_clocks.c b/trunk/arch/arm/mach-tegra/tegra30_clocks.c index 6674f100e16f..e33fe4b14a2a 100644 --- a/trunk/arch/arm/mach-tegra/tegra30_clocks.c +++ b/trunk/arch/arm/mach-tegra/tegra30_clocks.c @@ -2871,7 +2871,7 @@ static struct clk tegra30_clk_twd = { }, \ } struct clk tegra_list_clks[] = { - PERIPH_CLK("apbdma", "tegra-apbdma", NULL, 34, 0, 26000000, mux_clk_m, 0), + PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("kbc", "tegra-kbc", NULL, 36, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), @@ -2886,7 +2886,7 @@ struct clk tegra_list_clks[] = { PERIPH_CLK("i2s4", "tegra30-i2s.4", NULL, 102, 0x3c0, 26000000, mux_pllaout0_audio4_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("spdif_out", "tegra30-spdif", "spdif_out", 10, 0x108, 100000000, mux_pllaout0_audio_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("spdif_in", "tegra30-spdif", "spdif_in", 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71 | PERIPH_ON_APB), - PERIPH_CLK("pwm", "tegra-pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_clk32_clkm, MUX | MUX_PWM | DIV_U71 | PERIPH_ON_APB), + PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_clk32_clkm, MUX | MUX_PWM | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("d_audio", "tegra30-ahub", "d_audio", 106, 0x3d0, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("dam0", "tegra30-dam.0", NULL, 108, 0x3d8, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("dam1", "tegra30-dam.1", NULL, 109, 0x3dc, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), @@ -2924,11 +2924,16 @@ struct clk tegra_list_clks[] = { PERIPH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), PERIPH_CLK("i2c4", "tegra-i2c.3", NULL, 103, 0x3c4, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), PERIPH_CLK("i2c5", "tegra-i2c.4", NULL, 47, 0x128, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), - PERIPH_CLK("uarta", "tegra-uart.0", NULL, 6, 0x178, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartb", "tegra-uart.1", NULL, 7, 0x17c, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartc", "tegra-uart.2", NULL, 55, 0x1a0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartd", "tegra-uart.3", NULL, 65, 0x1c0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uarte", "tegra-uart.4", NULL, 66, 0x1c4, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uarta", "tegra_uart.0", NULL, 6, 0x178, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartb", "tegra_uart.1", NULL, 7, 0x17c, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartc", "tegra_uart.2", NULL, 55, 0x1a0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartd", "tegra_uart.3", NULL, 65, 0x1c0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uarte", "tegra_uart.4", NULL, 66, 0x1c4, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uarta_dbg", "serial8250.0", "uarta", 6, 0x178, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartb_dbg", "serial8250.0", "uartb", 7, 0x17c, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartc_dbg", "serial8250.0", "uartc", 55, 0x1a0, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartd_dbg", "serial8250.0", "uartd", 65, 0x1c0, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uarte_dbg", "serial8250.0", "uarte", 66, 0x1c4, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), PERIPH_CLK_EX("vi", "tegra_camera", "vi", 20, 0x148, 425000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT, &tegra_vi_clk_ops), PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET), PERIPH_CLK("3d2", "3d2", NULL, 98, 0x3b0, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET), @@ -2978,11 +2983,6 @@ struct clk tegra_list_clks[] = { * table under two names. */ struct clk_duplicate tegra_clk_duplicates[] = { - CLK_DUPLICATE("uarta", "serial8250.0", NULL), - CLK_DUPLICATE("uartb", "serial8250.1", NULL), - CLK_DUPLICATE("uartc", "serial8250.2", NULL), - CLK_DUPLICATE("uartd", "serial8250.3", NULL), - CLK_DUPLICATE("uarte", "serial8250.4", NULL), CLK_DUPLICATE("usbd", "utmip-pad", NULL), CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), CLK_DUPLICATE("usbd", "tegra-otg", NULL), @@ -2990,6 +2990,10 @@ struct clk_duplicate tegra_clk_duplicates[] = { CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), CLK_DUPLICATE("dsib", "tegradc.0", "dsib"), CLK_DUPLICATE("dsia", "tegradc.1", "dsia"), + CLK_DUPLICATE("pwm", "tegra_pwm.0", NULL), + CLK_DUPLICATE("pwm", "tegra_pwm.1", NULL), + CLK_DUPLICATE("pwm", "tegra_pwm.2", NULL), + CLK_DUPLICATE("pwm", "tegra_pwm.3", NULL), CLK_DUPLICATE("bsev", "tegra-avp", "bsev"), CLK_DUPLICATE("bsev", "nvavp", "bsev"), CLK_DUPLICATE("vde", "tegra-aes", "vde"), diff --git a/trunk/arch/arm/mach-tegra/timer.c b/trunk/arch/arm/mach-tegra/timer.c index 57b5bdc13b9b..315672c7bd48 100644 --- a/trunk/arch/arm/mach-tegra/timer.c +++ b/trunk/arch/arm/mach-tegra/timer.c @@ -189,7 +189,7 @@ static void __init tegra_init_timer(void) " Assuming 12Mhz input clock.\n"); rate = 12000000; } else { - clk_prepare_enable(clk); + clk_enable(clk); rate = clk_get_rate(clk); } @@ -201,7 +201,7 @@ static void __init tegra_init_timer(void) if (IS_ERR(clk)) pr_warn("Unable to get rtc-tegra clock\n"); else - clk_prepare_enable(clk); + clk_enable(clk); switch (rate) { case 12000000: diff --git a/trunk/arch/arm/mach-tegra/usb_phy.c b/trunk/arch/arm/mach-tegra/usb_phy.c index 022b33a05c3a..54e353c8e304 100644 --- a/trunk/arch/arm/mach-tegra/usb_phy.c +++ b/trunk/arch/arm/mach-tegra/usb_phy.c @@ -247,7 +247,7 @@ static void utmip_pad_power_on(struct tegra_usb_phy *phy) unsigned long val, flags; void __iomem *base = phy->pad_regs; - clk_prepare_enable(phy->pad_clk); + clk_enable(phy->pad_clk); spin_lock_irqsave(&utmip_pad_lock, flags); @@ -259,7 +259,7 @@ static void utmip_pad_power_on(struct tegra_usb_phy *phy) spin_unlock_irqrestore(&utmip_pad_lock, flags); - clk_disable_unprepare(phy->pad_clk); + clk_disable(phy->pad_clk); } static int utmip_pad_power_off(struct tegra_usb_phy *phy) @@ -272,7 +272,7 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy) return -EINVAL; } - clk_prepare_enable(phy->pad_clk); + clk_enable(phy->pad_clk); spin_lock_irqsave(&utmip_pad_lock, flags); @@ -284,7 +284,7 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy) spin_unlock_irqrestore(&utmip_pad_lock, flags); - clk_disable_unprepare(phy->pad_clk); + clk_disable(phy->pad_clk); return 0; } @@ -580,7 +580,7 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy) msleep(5); gpio_direction_output(config->reset_gpio, 1); - clk_prepare_enable(phy->clk); + clk_enable(phy->clk); msleep(1); val = readl(base + USB_SUSP_CTRL); @@ -689,7 +689,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance, err = PTR_ERR(phy->pll_u); goto err0; } - clk_prepare_enable(phy->pll_u); + clk_enable(phy->pll_u); parent_rate = clk_get_rate(clk_get_parent(phy->pll_u)); for (i = 0; i < ARRAY_SIZE(tegra_freq_table); i++) { @@ -735,7 +735,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance, return phy; err1: - clk_disable_unprepare(phy->pll_u); + clk_disable(phy->pll_u); clk_put(phy->pll_u); err0: kfree(phy); @@ -810,7 +810,7 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy) clk_put(phy->clk); else utmip_pad_close(phy); - clk_disable_unprepare(phy->pll_u); + clk_disable(phy->pll_u); clk_put(phy->pll_u); kfree(phy); } diff --git a/trunk/arch/arm/mach-versatile/pci.c b/trunk/arch/arm/mach-versatile/pci.c index bec933b04ef0..e95bf84cc837 100644 --- a/trunk/arch/arm/mach-versatile/pci.c +++ b/trunk/arch/arm/mach-versatile/pci.c @@ -339,7 +339,6 @@ void __init pci_versatile_preinit(void) static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; - int devslot = PCI_SLOT(dev->devfn); /* slot, pin, irq * 24 1 27 diff --git a/trunk/arch/arm/mm/mm.h b/trunk/arch/arm/mm/mm.h index c471436c7952..2e8a1efdf7b8 100644 --- a/trunk/arch/arm/mm/mm.h +++ b/trunk/arch/arm/mm/mm.h @@ -64,7 +64,7 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page #ifdef CONFIG_ZONE_DMA extern phys_addr_t arm_dma_limit; #else -#define arm_dma_limit ((u32)~0) +#define arm_dma_limit ((phys_addr_t)~0) #endif extern phys_addr_t arm_lowmem_limit; diff --git a/trunk/arch/arm/mm/mmu.c b/trunk/arch/arm/mm/mmu.c index e5dad60b558b..cf4528d51774 100644 --- a/trunk/arch/arm/mm/mmu.c +++ b/trunk/arch/arm/mm/mmu.c @@ -791,6 +791,79 @@ void __init iotable_init(struct map_desc *io_desc, int nr) } } +#ifndef CONFIG_ARM_LPAE + +/* + * The Linux PMD is made of two consecutive section entries covering 2MB + * (see definition in include/asm/pgtable-2level.h). However a call to + * create_mapping() may optimize static mappings by using individual + * 1MB section mappings. This leaves the actual PMD potentially half + * initialized if the top or bottom section entry isn't used, leaving it + * open to problems if a subsequent ioremap() or vmalloc() tries to use + * the virtual space left free by that unused section entry. + * + * Let's avoid the issue by inserting dummy vm entries covering the unused + * PMD halves once the static mappings are in place. + */ + +static void __init pmd_empty_section_gap(unsigned long addr) +{ + struct vm_struct *vm; + + vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm)); + vm->addr = (void *)addr; + vm->size = SECTION_SIZE; + vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; + vm->caller = pmd_empty_section_gap; + vm_area_add_early(vm); +} + +static void __init fill_pmd_gaps(void) +{ + struct vm_struct *vm; + unsigned long addr, next = 0; + pmd_t *pmd; + + /* we're still single threaded hence no lock needed here */ + for (vm = vmlist; vm; vm = vm->next) { + if (!(vm->flags & VM_ARM_STATIC_MAPPING)) + continue; + addr = (unsigned long)vm->addr; + if (addr < next) + continue; + + /* + * Check if this vm starts on an odd section boundary. + * If so and the first section entry for this PMD is free + * then we block the corresponding virtual address. + */ + if ((addr & ~PMD_MASK) == SECTION_SIZE) { + pmd = pmd_off_k(addr); + if (pmd_none(*pmd)) + pmd_empty_section_gap(addr & PMD_MASK); + } + + /* + * Then check if this vm ends on an odd section boundary. + * If so and the second section entry for this PMD is empty + * then we block the corresponding virtual address. + */ + addr += vm->size; + if ((addr & ~PMD_MASK) == SECTION_SIZE) { + pmd = pmd_off_k(addr) + 1; + if (pmd_none(*pmd)) + pmd_empty_section_gap(addr); + } + + /* no need to look at any vm entry until we hit the next PMD */ + next = (addr + PMD_SIZE - 1) & PMD_MASK; + } +} + +#else +#define fill_pmd_gaps() do { } while (0) +#endif + static void * __initdata vmalloc_min = (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET); @@ -1072,6 +1145,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc) */ if (mdesc->map_io) mdesc->map_io(); + fill_pmd_gaps(); /* * Finally flush the caches and tlb to ensure that we're in a diff --git a/trunk/arch/arm/plat-omap/Makefile b/trunk/arch/arm/plat-omap/Makefile index 961bf859bc0c..ed8605f01155 100644 --- a/trunk/arch/arm/plat-omap/Makefile +++ b/trunk/arch/arm/plat-omap/Makefile @@ -4,13 +4,15 @@ # Common support obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ - fb.o counter_32k.o + usb.o fb.o counter_32k.o obj-m := obj-n := obj- := # omap_device support (OMAP2+ only at the moment) -obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_device.o +obj-$(CONFIG_ARCH_OMAP2) += omap_device.o +obj-$(CONFIG_ARCH_OMAP3) += omap_device.o +obj-$(CONFIG_ARCH_OMAP4) += omap_device.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o diff --git a/trunk/arch/arm/plat-omap/dma.c b/trunk/arch/arm/plat-omap/dma.c index 7fe626761e53..cb16ade437cb 100644 --- a/trunk/arch/arm/plat-omap/dma.c +++ b/trunk/arch/arm/plat-omap/dma.c @@ -573,25 +573,22 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode); static inline void omap_enable_channel_irq(int lch) { + u32 status; + /* Clear CSR */ if (cpu_class_is_omap1()) - p->dma_read(CSR, lch); - else + status = p->dma_read(CSR, lch); + else if (cpu_class_is_omap2()) p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); /* Enable some nice interrupts. */ p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch); } -static inline void omap_disable_channel_irq(int lch) +static void omap_disable_channel_irq(int lch) { - /* disable channel interrupts */ - p->dma_write(0, CICR, lch); - /* Clear CSR */ - if (cpu_class_is_omap1()) - p->dma_read(CSR, lch); - else - p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); + if (cpu_class_is_omap2()) + p->dma_write(0, CICR, lch); } void omap_enable_dma_irq(int lch, u16 bits) @@ -635,14 +632,14 @@ static inline void disable_lnk(int lch) l = p->dma_read(CLNK_CTRL, lch); /* Disable interrupts */ - omap_disable_channel_irq(lch); - if (cpu_class_is_omap1()) { + p->dma_write(0, CICR, lch); /* Set the STOP_LNK bit */ l |= 1 << 14; } if (cpu_class_is_omap2()) { + omap_disable_channel_irq(lch); /* Clear the ENABLE_LNK bit */ l &= ~(1 << 15); } @@ -660,9 +657,6 @@ static inline void omap2_enable_irq_lch(int lch) return; spin_lock_irqsave(&dma_chan_lock, flags); - /* clear IRQ STATUS */ - p->dma_write(1 << lch, IRQSTATUS_L0, lch); - /* Enable interrupt */ val = p->dma_read(IRQENABLE_L0, lch); val |= 1 << lch; p->dma_write(val, IRQENABLE_L0, lch); @@ -678,12 +672,9 @@ static inline void omap2_disable_irq_lch(int lch) return; spin_lock_irqsave(&dma_chan_lock, flags); - /* Disable interrupt */ val = p->dma_read(IRQENABLE_L0, lch); val &= ~(1 << lch); p->dma_write(val, IRQENABLE_L0, lch); - /* clear IRQ STATUS */ - p->dma_write(1 << lch, IRQSTATUS_L0, lch); spin_unlock_irqrestore(&dma_chan_lock, flags); } @@ -754,8 +745,11 @@ int omap_request_dma(int dev_id, const char *dev_name, } if (cpu_class_is_omap2()) { - omap_enable_channel_irq(free_ch); omap2_enable_irq_lch(free_ch); + omap_enable_channel_irq(free_ch); + /* Clear the CSR register and IRQ status register */ + p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, free_ch); + p->dma_write(1 << free_ch, IRQSTATUS_L0, 0); } *dma_ch_out = free_ch; @@ -774,19 +768,27 @@ void omap_free_dma(int lch) return; } - /* Disable interrupt for logical channel */ - if (cpu_class_is_omap2()) + if (cpu_class_is_omap1()) { + /* Disable all DMA interrupts for the channel. */ + p->dma_write(0, CICR, lch); + /* Make sure the DMA transfer is stopped. */ + p->dma_write(0, CCR, lch); + } + + if (cpu_class_is_omap2()) { omap2_disable_irq_lch(lch); - /* Disable all DMA interrupts for the channel. */ - omap_disable_channel_irq(lch); + /* Clear the CSR register and IRQ status register */ + p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); + p->dma_write(1 << lch, IRQSTATUS_L0, lch); - /* Make sure the DMA transfer is stopped. */ - p->dma_write(0, CCR, lch); + /* Disable all DMA interrupts for the channel. */ + p->dma_write(0, CICR, lch); - /* Clear registers */ - if (cpu_class_is_omap2()) + /* Make sure the DMA transfer is stopped. */ + p->dma_write(0, CCR, lch); omap_clear_dma(lch); + } spin_lock_irqsave(&dma_chan_lock, flags); dma_chan[lch].dev_id = -1; @@ -941,7 +943,8 @@ void omap_stop_dma(int lch) u32 l; /* Disable all interrupts on the channel */ - omap_disable_channel_irq(lch); + if (cpu_class_is_omap1()) + p->dma_write(0, CICR, lch); l = p->dma_read(CCR, lch); if (IS_DMA_ERRATA(DMA_ERRATA_i541) && diff --git a/trunk/arch/arm/plat-omap/dmtimer.c b/trunk/arch/arm/plat-omap/dmtimer.c index 626ad8cad7a9..3b0cfeb33d05 100644 --- a/trunk/arch/arm/plat-omap/dmtimer.c +++ b/trunk/arch/arm/plat-omap/dmtimer.c @@ -37,16 +37,14 @@ #include #include -#include +#include #include #include #include -#include #include -static u32 omap_reserved_systimers; static LIST_HEAD(omap_timer_list); static DEFINE_SPINLOCK(dm_timer_lock); @@ -135,22 +133,17 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer) int omap_dm_timer_prepare(struct omap_dm_timer *timer) { + struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; int ret; - /* - * FIXME: OMAP1 devices do not use the clock framework for dmtimers so - * do not call clk_get() for these devices. - */ - if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { - timer->fclk = clk_get(&timer->pdev->dev, "fck"); - if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) { - timer->fclk = NULL; - dev_err(&timer->pdev->dev, ": No fclk handle.\n"); - return -EINVAL; - } + timer->fclk = clk_get(&timer->pdev->dev, "fck"); + if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) { + timer->fclk = NULL; + dev_err(&timer->pdev->dev, ": No fclk handle.\n"); + return -EINVAL; } - if (timer->capability & OMAP_TIMER_NEEDS_RESET) + if (pdata->needs_manual_reset) omap_dm_timer_reset(timer); ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); @@ -159,21 +152,6 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer) return ret; } -static inline u32 omap_dm_timer_reserved_systimer(int id) -{ - return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0; -} - -int omap_dm_timer_reserve_systimer(int id) -{ - if (omap_dm_timer_reserved_systimer(id)) - return -ENODEV; - - omap_reserved_systimers |= (1 << (id - 1)); - - return 0; -} - struct omap_dm_timer *omap_dm_timer_request(void) { struct omap_dm_timer *timer = NULL, *t; @@ -347,9 +325,10 @@ int omap_dm_timer_start(struct omap_dm_timer *timer) omap_dm_timer_enable(timer); - if (!(timer->capability & OMAP_TIMER_ALWON)) { - if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != - timer->ctx_loss_count) + if (timer->loses_context) { + u32 ctx_loss_cnt_after = + timer->get_context_loss_count(&timer->pdev->dev); + if (ctx_loss_cnt_after != timer->ctx_loss_count) omap_timer_restore_context(timer); } @@ -368,18 +347,20 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start); int omap_dm_timer_stop(struct omap_dm_timer *timer) { unsigned long rate = 0; + struct dmtimer_platform_data *pdata; if (unlikely(!timer)) return -EINVAL; - if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) + pdata = timer->pdev->dev.platform_data; + if (!pdata->needs_manual_reset) rate = clk_get_rate(timer->fclk); __omap_dm_timer_stop(timer, timer->posted, rate); - if (!(timer->capability & OMAP_TIMER_ALWON)) + if (timer->loses_context && timer->get_context_loss_count) timer->ctx_loss_count = - omap_pm_get_dev_context_loss_count(&timer->pdev->dev); + timer->get_context_loss_count(&timer->pdev->dev); /* * Since the register values are computed and written within @@ -397,8 +378,6 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_stop); int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) { int ret; - char *parent_name = NULL; - struct clk *fclk, *parent; struct dmtimer_platform_data *pdata; if (unlikely(!timer)) @@ -409,49 +388,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) if (source < 0 || source >= 3) return -EINVAL; - /* - * FIXME: Used for OMAP1 devices only because they do not currently - * use the clock framework to set the parent clock. To be removed - * once OMAP1 migrated to using clock framework for dmtimers - */ - if (pdata->set_timer_src) - return pdata->set_timer_src(timer->pdev, source); - - fclk = clk_get(&timer->pdev->dev, "fck"); - if (IS_ERR_OR_NULL(fclk)) { - pr_err("%s: fck not found\n", __func__); - return -EINVAL; - } - - switch (source) { - case OMAP_TIMER_SRC_SYS_CLK: - parent_name = "timer_sys_ck"; - break; - - case OMAP_TIMER_SRC_32_KHZ: - parent_name = "timer_32k_ck"; - break; - - case OMAP_TIMER_SRC_EXT_CLK: - parent_name = "timer_ext_ck"; - break; - } - - parent = clk_get(&timer->pdev->dev, parent_name); - if (IS_ERR_OR_NULL(parent)) { - pr_err("%s: %s not found\n", __func__, parent_name); - ret = -EINVAL; - goto out; - } - - ret = clk_set_parent(fclk, parent); - if (IS_ERR_VALUE(ret)) - pr_err("%s: failed to set %s as parent\n", __func__, - parent_name); - - clk_put(parent); -out: - clk_put(fclk); + ret = pdata->set_timer_src(timer->pdev, source); return ret; } @@ -494,9 +431,10 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_enable(timer); - if (!(timer->capability & OMAP_TIMER_ALWON)) { - if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != - timer->ctx_loss_count) + if (timer->loses_context) { + u32 ctx_loss_cnt_after = + timer->get_context_loss_count(&timer->pdev->dev); + if (ctx_loss_cnt_after != timer->ctx_loss_count) omap_timer_restore_context(timer); } @@ -689,57 +627,68 @@ EXPORT_SYMBOL_GPL(omap_dm_timers_active); */ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) { + int ret; unsigned long flags; struct omap_dm_timer *timer; - struct resource *mem, *irq; - struct device *dev = &pdev->dev; + struct resource *mem, *irq, *ioarea; struct dmtimer_platform_data *pdata = pdev->dev.platform_data; if (!pdata) { - dev_err(dev, "%s: no platform data.\n", __func__); + dev_err(&pdev->dev, "%s: no platform data.\n", __func__); return -ENODEV; } irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (unlikely(!irq)) { - dev_err(dev, "%s: no IRQ resource.\n", __func__); + dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__); return -ENODEV; } mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (unlikely(!mem)) { - dev_err(dev, "%s: no memory resource.\n", __func__); + dev_err(&pdev->dev, "%s: no memory resource.\n", __func__); return -ENODEV; } - timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL); + ioarea = request_mem_region(mem->start, resource_size(mem), + pdev->name); + if (!ioarea) { + dev_err(&pdev->dev, "%s: region already claimed.\n", __func__); + return -EBUSY; + } + + timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL); if (!timer) { - dev_err(dev, "%s: memory alloc failed!\n", __func__); - return -ENOMEM; + dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n", + __func__); + ret = -ENOMEM; + goto err_free_ioregion; } - timer->io_base = devm_request_and_ioremap(dev, mem); + timer->io_base = ioremap(mem->start, resource_size(mem)); if (!timer->io_base) { - dev_err(dev, "%s: region already claimed.\n", __func__); - return -ENOMEM; + dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__); + ret = -ENOMEM; + goto err_free_mem; } timer->id = pdev->id; timer->irq = irq->start; - timer->reserved = omap_dm_timer_reserved_systimer(timer->id); + timer->reserved = pdata->reserved; timer->pdev = pdev; - timer->capability = pdata->timer_capability; + timer->loses_context = pdata->loses_context; + timer->get_context_loss_count = pdata->get_context_loss_count; /* Skip pm_runtime_enable for OMAP1 */ - if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { - pm_runtime_enable(dev); - pm_runtime_irq_safe(dev); + if (!pdata->needs_manual_reset) { + pm_runtime_enable(&pdev->dev); + pm_runtime_irq_safe(&pdev->dev); } if (!timer->reserved) { - pm_runtime_get_sync(dev); + pm_runtime_get_sync(&pdev->dev); __omap_dm_timer_init_regs(timer); - pm_runtime_put(dev); + pm_runtime_put(&pdev->dev); } /* add the timer element to the list */ @@ -747,9 +696,17 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) list_add_tail(&timer->node, &omap_timer_list); spin_unlock_irqrestore(&dm_timer_lock, flags); - dev_dbg(dev, "Device Probed.\n"); + dev_dbg(&pdev->dev, "Device Probed.\n"); return 0; + +err_free_mem: + kfree(timer); + +err_free_ioregion: + release_mem_region(mem->start, resource_size(mem)); + + return ret; } /** @@ -770,6 +727,7 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev) list_for_each_entry(timer, &omap_timer_list, node) if (timer->pdev->id == pdev->id) { list_del(&timer->node); + kfree(timer); ret = 0; break; } diff --git a/trunk/arch/arm/plat-omap/include/plat/board.h b/trunk/arch/arm/plat-omap/include/plat/board.h index e62f20a5c0af..4814c5b65306 100644 --- a/trunk/arch/arm/plat-omap/include/plat/board.h +++ b/trunk/arch/arm/plat-omap/include/plat/board.h @@ -57,6 +57,44 @@ struct omap_camera_sensor_config { int (*power_off)(void * data); }; +struct omap_usb_config { + /* Configure drivers according to the connectors on your board: + * - "A" connector (rectagular) + * ... for host/OHCI use, set "register_host". + * - "B" connector (squarish) or "Mini-B" + * ... for device/gadget use, set "register_dev". + * - "Mini-AB" connector (very similar to Mini-B) + * ... for OTG use as device OR host, initialize "otg" + */ + unsigned register_host:1; + unsigned register_dev:1; + u8 otg; /* port number, 1-based: usb1 == 2 */ + + u8 hmc_mode; + + /* implicitly true if otg: host supports remote wakeup? */ + u8 rwc; + + /* signaling pins used to talk to transceiver on usbN: + * 0 == usbN unused + * 2 == usb0-only, using internal transceiver + * 3 == 3 wire bidirectional + * 4 == 4 wire bidirectional + * 6 == 6 wire unidirectional (or TLL) + */ + u8 pins[3]; + + struct platform_device *udc_device; + struct platform_device *ohci_device; + struct platform_device *otg_device; + + u32 (*usb0_init)(unsigned nwires, unsigned is_device); + u32 (*usb1_init)(unsigned nwires); + u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); + + int (*ocpi_enable)(void); +}; + struct omap_lcd_config { char panel_name[16]; char ctrl_name[16]; diff --git a/trunk/arch/arm/plat-omap/include/plat/clkdev_omap.h b/trunk/arch/arm/plat-omap/include/plat/clkdev_omap.h index 025d85a3ee86..d0ed8c443a63 100644 --- a/trunk/arch/arm/plat-omap/include/plat/clkdev_omap.h +++ b/trunk/arch/arm/plat-omap/include/plat/clkdev_omap.h @@ -39,7 +39,6 @@ struct omap_clk { #define CK_443X (1 << 11) #define CK_TI816X (1 << 12) #define CK_446X (1 << 13) -#define CK_AM33XX (1 << 14) /* AM33xx specific clocks */ #define CK_1710 (1 << 15) /* 1710 extra for rate selection */ diff --git a/trunk/arch/arm/plat-omap/include/plat/clock.h b/trunk/arch/arm/plat-omap/include/plat/clock.h index 656b9862279e..d0ef57c1d71b 100644 --- a/trunk/arch/arm/plat-omap/include/plat/clock.h +++ b/trunk/arch/arm/plat-omap/include/plat/clock.h @@ -156,6 +156,7 @@ struct dpll_data { u8 min_divider; u16 max_divider; u8 modes; +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) void __iomem *autoidle_reg; void __iomem *idlest_reg; u32 autoidle_mask; @@ -166,6 +167,7 @@ struct dpll_data { u8 auto_recal_bit; u8 recal_en_bit; u8 recal_st_bit; +# endif u8 flags; }; diff --git a/trunk/arch/arm/plat-omap/include/plat/cpu.h b/trunk/arch/arm/plat-omap/include/plat/cpu.h index 14f050f7a897..de6c0a08f461 100644 --- a/trunk/arch/arm/plat-omap/include/plat/cpu.h +++ b/trunk/arch/arm/plat-omap/include/plat/cpu.h @@ -150,8 +150,8 @@ IS_AM_SUBCLASS(335x, 0x335) #define cpu_is_ti816x() 0 #define cpu_is_ti814x() 0 #define soc_is_am35xx() 0 -#define soc_is_am33xx() 0 -#define soc_is_am335x() 0 +#define cpu_is_am33xx() 0 +#define cpu_is_am335x() 0 #define cpu_is_omap44xx() 0 #define cpu_is_omap443x() 0 #define cpu_is_omap446x() 0 @@ -344,6 +344,8 @@ IS_OMAP_TYPE(3430, 0x3430) # undef cpu_is_ti816x # undef cpu_is_ti814x # undef soc_is_am35xx +# undef cpu_is_am33xx +# undef cpu_is_am335x # define cpu_is_omap3430() is_omap3430() # undef cpu_is_omap3630 # define cpu_is_omap3630() is_omap363x() @@ -351,13 +353,8 @@ IS_OMAP_TYPE(3430, 0x3430) # define cpu_is_ti816x() is_ti816x() # define cpu_is_ti814x() is_ti814x() # define soc_is_am35xx() is_am35xx() -#endif - -# if defined(CONFIG_SOC_AM33XX) -# undef soc_is_am33xx -# undef soc_is_am335x -# define soc_is_am33xx() is_am33xx() -# define soc_is_am335x() is_am335x() +# define cpu_is_am33xx() is_am33xx() +# define cpu_is_am335x() is_am335x() #endif # if defined(CONFIG_ARCH_OMAP4) @@ -411,7 +408,7 @@ IS_OMAP_TYPE(3430, 0x3430) #define AM35XX_REV_ES1_0 AM35XX_CLASS #define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8)) -#define AM335X_CLASS 0x33500033 +#define AM335X_CLASS 0x33500034 #define AM335X_REV_ES1_0 AM335X_CLASS #define OMAP443X_CLASS 0x44300044 diff --git a/trunk/arch/arm/plat-omap/include/plat/dmtimer.h b/trunk/arch/arm/plat-omap/include/plat/dmtimer.h index 19e7fa577bd0..5da73562e486 100644 --- a/trunk/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/trunk/arch/arm/plat-omap/include/plat/dmtimer.h @@ -55,17 +55,23 @@ #define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 +/* + * IP revision identifier so that Highlander IP + * in OMAP4 can be distinguished. + */ +#define OMAP_TIMER_IP_VERSION_1 0x1 + /* timer capabilities used in hwmod database */ #define OMAP_TIMER_SECURE 0x80000000 #define OMAP_TIMER_ALWON 0x40000000 #define OMAP_TIMER_HAS_PWM 0x20000000 -#define OMAP_TIMER_NEEDS_RESET 0x10000000 struct omap_timer_capability_dev_attr { u32 timer_capability; }; struct omap_dm_timer; +struct clk; struct timer_regs { u32 tidr; @@ -90,12 +96,16 @@ struct timer_regs { }; struct dmtimer_platform_data { - /* set_timer_src - Only used for OMAP1 devices */ int (*set_timer_src)(struct platform_device *pdev, int source); - u32 timer_capability; + int timer_ip_version; + u32 needs_manual_reset:1; + bool reserved; + + bool loses_context; + + int (*get_context_loss_count)(struct device *dev); }; -int omap_dm_timer_reserve_systimer(int id); struct omap_dm_timer *omap_dm_timer_request(void); struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); int omap_dm_timer_free(struct omap_dm_timer *timer); @@ -262,11 +272,13 @@ struct omap_dm_timer { unsigned reserved:1; unsigned posted:1; struct timer_regs context; + bool loses_context; int ctx_loss_count; int revision; - u32 capability; struct platform_device *pdev; struct list_head node; + + int (*get_context_loss_count)(struct device *dev); }; int omap_dm_timer_prepare(struct omap_dm_timer *timer); diff --git a/trunk/arch/arm/plat-omap/include/plat/dsp.h b/trunk/arch/arm/plat-omap/include/plat/dsp.h index 5927709b1908..9c604b390f9f 100644 --- a/trunk/arch/arm/plat-omap/include/plat/dsp.h +++ b/trunk/arch/arm/plat-omap/include/plat/dsp.h @@ -18,9 +18,6 @@ struct omap_dsp_platform_data { u32 (*dsp_cm_read)(s16 , u16); u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16); - void (*set_bootaddr)(u32); - void (*set_bootmode)(u8); - phys_addr_t phys_mempool_base; phys_addr_t phys_mempool_size; }; diff --git a/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h b/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h index 6132972aff37..c835b7194ff5 100644 --- a/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -41,7 +41,6 @@ struct omap_device; extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1; extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; -extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3; /* * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant @@ -70,17 +69,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3; #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT) #define SYSC_TYPE2_MIDLEMODE_SHIFT 4 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT) -#define SYSC_TYPE2_DMADISABLE_SHIFT 16 -#define SYSC_TYPE2_DMADISABLE_MASK (0x1 << SYSC_TYPE2_DMADISABLE_SHIFT) - -/* - * OCP SYSCONFIG bit shifts/masks TYPE3. - * This is applicable for some IPs present in AM33XX - */ -#define SYSC_TYPE3_SIDLEMODE_SHIFT 0 -#define SYSC_TYPE3_SIDLEMODE_MASK (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT) -#define SYSC_TYPE3_MIDLEMODE_SHIFT 2 -#define SYSC_TYPE3_MIDLEMODE_MASK (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT) /* OCP SYSSTATUS bit shifts/masks */ #define SYSS_RESETDONE_SHIFT 0 @@ -295,7 +283,6 @@ struct omap_hwmod_ocp_if { #define SYSS_HAS_RESET_STATUS (1 << 7) #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ #define SYSC_HAS_RESET_STATUS (1 << 9) -#define SYSC_HAS_DMADISABLE (1 << 10) /* omap_hwmod_sysconfig.clockact flags */ #define CLOCKACT_TEST_BOTH 0x0 @@ -311,7 +298,6 @@ struct omap_hwmod_ocp_if { * @enwkup_shift: Offset of the enawakeup bit * @srst_shift: Offset of the softreset bit * @autoidle_shift: Offset of the autoidle bit - * @dmadisable_shift: Offset of the dmadisable bit */ struct omap_hwmod_sysc_fields { u8 midle_shift; @@ -320,7 +306,6 @@ struct omap_hwmod_sysc_fields { u8 enwkup_shift; u8 srst_shift; u8 autoidle_shift; - u8 dmadisable_shift; }; /** @@ -389,13 +374,11 @@ struct omap_hwmod_omap2_prcm { * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data * @clkctrl_reg: PRCM address of the clock control register * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM - * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM * @submodule_wkdep_bit: bit shift of the WKDEP range */ struct omap_hwmod_omap4_prcm { u16 clkctrl_offs; u16 rstctrl_offs; - u16 rstst_offs; u16 context_offs; u8 submodule_wkdep_bit; u8 modulemode; @@ -646,10 +629,6 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); -extern void __init omap_hwmod_init(void); - -const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh); - /* * Chip variant-specific hwmod init routines - XXX should be converted * to use initcalls once the initial boot ordering is straightened out diff --git a/trunk/arch/arm/plat-omap/include/plat/sdrc.h b/trunk/arch/arm/plat-omap/include/plat/sdrc.h index 36d6a7666216..9bb978ecd884 100644 --- a/trunk/arch/arm/plat-omap/include/plat/sdrc.h +++ b/trunk/arch/arm/plat-omap/include/plat/sdrc.h @@ -123,7 +123,7 @@ struct omap_sdrc_params { u32 mr; }; -#ifdef CONFIG_SOC_HAS_OMAP2_SDRC +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1); #else diff --git a/trunk/arch/arm/plat-omap/include/plat/serial.h b/trunk/arch/arm/plat-omap/include/plat/serial.h index 28e2d250c2fd..b073e5f2b190 100644 --- a/trunk/arch/arm/plat-omap/include/plat/serial.h +++ b/trunk/arch/arm/plat-omap/include/plat/serial.h @@ -60,9 +60,6 @@ /* AM3505/3517 UART4 */ #define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ -/* AM33XX serial port */ -#define AM33XX_UART1_BASE 0x44E09000 - /* External port on Zoom2/3 */ #define ZOOM_UART_BASE 0x10000000 #define ZOOM_UART_VIRT 0xfa400000 @@ -96,7 +93,6 @@ #define TI81XXUART1 81 #define TI81XXUART2 82 #define TI81XXUART3 83 -#define AM33XXUART1 84 #define ZOOM_UART 95 /* Only on zoom2/3 */ /* This is only used by 8250.c for omap1510 */ diff --git a/trunk/arch/arm/plat-omap/include/plat/uncompress.h b/trunk/arch/arm/plat-omap/include/plat/uncompress.h index ac4323390213..cc3f11ba7a99 100644 --- a/trunk/arch/arm/plat-omap/include/plat/uncompress.h +++ b/trunk/arch/arm/plat-omap/include/plat/uncompress.h @@ -103,10 +103,6 @@ static inline void flush(void) _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ TI81XXUART##p) -#define DEBUG_LL_AM33XX(p, mach) \ - _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ - AM33XXUART##p) - static inline void __arch_decomp_setup(unsigned long arch_id) { int port = 0; @@ -187,8 +183,6 @@ static inline void __arch_decomp_setup(unsigned long arch_id) /* TI8148 base boards using UART1 */ DEBUG_LL_TI81XX(1, ti8148evm); - /* AM33XX base boards using UART1 */ - DEBUG_LL_AM33XX(1, am335xevm); } while (0); } diff --git a/trunk/arch/arm/plat-omap/include/plat/usb.h b/trunk/arch/arm/plat-omap/include/plat/usb.h index 548a4c8d63df..762eeb0626c1 100644 --- a/trunk/arch/arm/plat-omap/include/plat/usb.h +++ b/trunk/arch/arm/plat-omap/include/plat/usb.h @@ -44,8 +44,6 @@ struct usbhs_omap_board_data { struct regulator *regulator[OMAP3_HS_USB_PORTS]; }; -#ifdef CONFIG_ARCH_OMAP2PLUS - struct ehci_hcd_omap_platform_data { enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; int reset_gpio_port[OMAP3_HS_USB_PORTS]; @@ -66,6 +64,26 @@ struct usbhs_omap_platform_data { }; /*-------------------------------------------------------------------------*/ +#define OMAP1_OTG_BASE 0xfffb0400 +#define OMAP1_UDC_BASE 0xfffb4000 +#define OMAP1_OHCI_BASE 0xfffba000 + +#define OMAP2_OHCI_BASE 0x4805e000 +#define OMAP2_UDC_BASE 0x4805e200 +#define OMAP2_OTG_BASE 0x4805e300 + +#ifdef CONFIG_ARCH_OMAP1 + +#define OTG_BASE OMAP1_OTG_BASE +#define UDC_BASE OMAP1_UDC_BASE +#define OMAP_OHCI_BASE OMAP1_OHCI_BASE + +#else + +#define OTG_BASE OMAP2_OTG_BASE +#define UDC_BASE OMAP2_UDC_BASE +#define OMAP_OHCI_BASE OMAP2_OHCI_BASE + struct omap_musb_board_data { u8 interface_type; u8 mode; @@ -89,6 +107,44 @@ extern int omap4430_phy_init(struct device *dev); extern int omap4430_phy_exit(struct device *dev); extern int omap4430_phy_suspend(struct device *dev, int suspend); +/* + * NOTE: Please update omap USB drivers to use ioremap + read/write + */ + +#define OMAP2_L4_IO_OFFSET 0xb2000000 +#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) + +static inline u8 omap_readb(u32 pa) +{ + return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline u16 omap_readw(u32 pa) +{ + return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline u32 omap_readl(u32 pa) +{ + return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline void omap_writeb(u8 v, u32 pa) +{ + __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); +} + + +static inline void omap_writew(u16 v, u32 pa) +{ + __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline void omap_writel(u32 v, u32 pa) +{ + __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); +} + #endif extern void am35x_musb_reset(void); @@ -97,6 +153,142 @@ extern void am35x_musb_clear_irq(void); extern void am35x_set_mode(u8 musb_mode); extern void ti81xx_musb_phy_power(u8 on); +/* + * FIXME correct answer depends on hmc_mode, + * as does (on omap1) any nonzero value for config->otg port number + */ +#ifdef CONFIG_USB_GADGET_OMAP +#define is_usb0_device(config) 1 +#else +#define is_usb0_device(config) 0 +#endif + +void omap_otg_init(struct omap_usb_config *config); + +#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE) +void omap1_usb_init(struct omap_usb_config *pdata); +#else +static inline void omap1_usb_init(struct omap_usb_config *pdata) +{ +} +#endif + +#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE) +void omap2_usbfs_init(struct omap_usb_config *pdata); +#else +static inline void omap2_usbfs_init(struct omap_usb_config *pdata) +{ +} +#endif + +/*-------------------------------------------------------------------------*/ + +/* + * OTG and transceiver registers, for OMAPs starting with ARM926 + */ +#define OTG_REV (OTG_BASE + 0x00) +#define OTG_SYSCON_1 (OTG_BASE + 0x04) +# define USB2_TRX_MODE(w) (((w)>>24)&0x07) +# define USB1_TRX_MODE(w) (((w)>>20)&0x07) +# define USB0_TRX_MODE(w) (((w)>>16)&0x07) +# define OTG_IDLE_EN (1 << 15) +# define HST_IDLE_EN (1 << 14) +# define DEV_IDLE_EN (1 << 13) +# define OTG_RESET_DONE (1 << 2) +# define OTG_SOFT_RESET (1 << 1) +#define OTG_SYSCON_2 (OTG_BASE + 0x08) +# define OTG_EN (1 << 31) +# define USBX_SYNCHRO (1 << 30) +# define OTG_MST16 (1 << 29) +# define SRP_GPDATA (1 << 28) +# define SRP_GPDVBUS (1 << 27) +# define SRP_GPUVBUS(w) (((w)>>24)&0x07) +# define A_WAIT_VRISE(w) (((w)>>20)&0x07) +# define B_ASE_BRST(w) (((w)>>16)&0x07) +# define SRP_DPW (1 << 14) +# define SRP_DATA (1 << 13) +# define SRP_VBUS (1 << 12) +# define OTG_PADEN (1 << 10) +# define HMC_PADEN (1 << 9) +# define UHOST_EN (1 << 8) +# define HMC_TLLSPEED (1 << 7) +# define HMC_TLLATTACH (1 << 6) +# define OTG_HMC(w) (((w)>>0)&0x3f) +#define OTG_CTRL (OTG_BASE + 0x0c) +# define OTG_USB2_EN (1 << 29) +# define OTG_USB2_DP (1 << 28) +# define OTG_USB2_DM (1 << 27) +# define OTG_USB1_EN (1 << 26) +# define OTG_USB1_DP (1 << 25) +# define OTG_USB1_DM (1 << 24) +# define OTG_USB0_EN (1 << 23) +# define OTG_USB0_DP (1 << 22) +# define OTG_USB0_DM (1 << 21) +# define OTG_ASESSVLD (1 << 20) +# define OTG_BSESSEND (1 << 19) +# define OTG_BSESSVLD (1 << 18) +# define OTG_VBUSVLD (1 << 17) +# define OTG_ID (1 << 16) +# define OTG_DRIVER_SEL (1 << 15) +# define OTG_A_SETB_HNPEN (1 << 12) +# define OTG_A_BUSREQ (1 << 11) +# define OTG_B_HNPEN (1 << 9) +# define OTG_B_BUSREQ (1 << 8) +# define OTG_BUSDROP (1 << 7) +# define OTG_PULLDOWN (1 << 5) +# define OTG_PULLUP (1 << 4) +# define OTG_DRV_VBUS (1 << 3) +# define OTG_PD_VBUS (1 << 2) +# define OTG_PU_VBUS (1 << 1) +# define OTG_PU_ID (1 << 0) +#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ +# define DRIVER_SWITCH (1 << 15) +# define A_VBUS_ERR (1 << 13) +# define A_REQ_TMROUT (1 << 12) +# define A_SRP_DETECT (1 << 11) +# define B_HNP_FAIL (1 << 10) +# define B_SRP_TMROUT (1 << 9) +# define B_SRP_DONE (1 << 8) +# define B_SRP_STARTED (1 << 7) +# define OPRT_CHG (1 << 0) +#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ + // same bits as in IRQ_EN +#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ +# define OTGVPD (1 << 14) +# define OTGVPU (1 << 13) +# define OTGPUID (1 << 12) +# define USB2VDR (1 << 10) +# define USB2PDEN (1 << 9) +# define USB2PUEN (1 << 8) +# define USB1VDR (1 << 6) +# define USB1PDEN (1 << 5) +# define USB1PUEN (1 << 4) +# define USB0VDR (1 << 2) +# define USB0PDEN (1 << 1) +# define USB0PUEN (1 << 0) +#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ +#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ + +/*-------------------------------------------------------------------------*/ + +/* OMAP1 */ +#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) +# define CONF_USB2_UNI_R (1 << 8) +# define CONF_USB1_UNI_R (1 << 7) +# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) +# define CONF_USB0_ISOLATE_R (1 << 3) +# define CONF_USB_PWRDN_DM_R (1 << 2) +# define CONF_USB_PWRDN_DP_R (1 << 1) + +/* OMAP2 */ +# define USB_UNIDIR 0x0 +# define USB_UNIDIR_TLL 0x1 +# define USB_BIDIR 0x2 +# define USB_BIDIR_TLL 0x3 +# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2))) +# define USBT2TLL5PI (1 << 17) +# define USB0PUENACTLOI (1 << 16) +# define USBSTANDBYCTRL (1 << 15) /* AM35x */ /* USB 2.0 PHY Control */ #define CONF2_PHY_GPIOMODE (1 << 23) diff --git a/trunk/arch/arm/plat-omap/sram.c b/trunk/arch/arm/plat-omap/sram.c index 70cf825bdd87..477363c163ec 100644 --- a/trunk/arch/arm/plat-omap/sram.c +++ b/trunk/arch/arm/plat-omap/sram.c @@ -85,7 +85,7 @@ static int is_sram_locked(void) __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ } - if (cpu_is_omap34xx()) { + if (cpu_is_omap34xx() && !cpu_is_am33xx()) { __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */ __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */ __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */ @@ -123,7 +123,7 @@ static void __init omap_detect_sram(void) omap_sram_size = 0x800; /* 2K */ } } else { - if (soc_is_am33xx()) { + if (cpu_is_am33xx()) { omap_sram_start = AM33XX_SRAM_PA; omap_sram_size = 0x10000; /* 64K */ } else if (cpu_is_omap34xx()) { @@ -386,7 +386,7 @@ int __init omap_sram_init(void) omap242x_sram_init(); else if (cpu_is_omap2430()) omap243x_sram_init(); - else if (soc_is_am33xx()) + else if (cpu_is_am33xx()) am33xx_sram_init(); else if (cpu_is_omap34xx()) omap34xx_sram_init(); diff --git a/trunk/arch/arm/plat-omap/usb.c b/trunk/arch/arm/plat-omap/usb.c new file mode 100644 index 000000000000..daa0327381b5 --- /dev/null +++ b/trunk/arch/arm/plat-omap/usb.c @@ -0,0 +1,145 @@ + /* + * arch/arm/plat-omap/usb.c -- platform level USB initialization + * + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#undef DEBUG + +#include +#include +#include +#include +#include + +#include +#include + +#include + +#ifdef CONFIG_ARCH_OMAP_OTG + +void __init +omap_otg_init(struct omap_usb_config *config) +{ + u32 syscon; + int alt_pingroup = 0; + + /* NOTE: no bus or clock setup (yet?) */ + + syscon = omap_readl(OTG_SYSCON_1) & 0xffff; + if (!(syscon & OTG_RESET_DONE)) + pr_debug("USB resets not complete?\n"); + + //omap_writew(0, OTG_IRQ_EN); + + /* pin muxing and transceiver pinouts */ + if (config->pins[0] > 2) /* alt pingroup 2 */ + alt_pingroup = 1; + syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); + syscon |= config->usb1_init(config->pins[1]); + syscon |= config->usb2_init(config->pins[2], alt_pingroup); + pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); + omap_writel(syscon, OTG_SYSCON_1); + + syscon = config->hmc_mode; + syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; +#ifdef CONFIG_USB_OTG + if (config->otg) + syscon |= OTG_EN; +#endif + if (cpu_class_is_omap1()) + pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", + omap_readl(USB_TRANSCEIVER_CTRL)); + pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); + omap_writel(syscon, OTG_SYSCON_2); + + printk("USB: hmc %d", config->hmc_mode); + if (!alt_pingroup) + printk(", usb2 alt %d wires", config->pins[2]); + else if (config->pins[0]) + printk(", usb0 %d wires%s", config->pins[0], + is_usb0_device(config) ? " (dev)" : ""); + if (config->pins[1]) + printk(", usb1 %d wires", config->pins[1]); + if (!alt_pingroup && config->pins[2]) + printk(", usb2 %d wires", config->pins[2]); + if (config->otg) + printk(", Mini-AB on usb%d", config->otg - 1); + printk("\n"); + + if (cpu_class_is_omap1()) { + u16 w; + + /* leave USB clocks/controllers off until needed */ + w = omap_readw(ULPD_SOFT_REQ); + w &= ~SOFT_USB_CLK_REQ; + omap_writew(w, ULPD_SOFT_REQ); + + w = omap_readw(ULPD_CLOCK_CTRL); + w &= ~USB_MCLK_EN; + w |= DIS_USB_PVCI_CLK; + omap_writew(w, ULPD_CLOCK_CTRL); + } + syscon = omap_readl(OTG_SYSCON_1); + syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; + +#ifdef CONFIG_USB_GADGET_OMAP + if (config->otg || config->register_dev) { + struct platform_device *udc_device = config->udc_device; + int status; + + syscon &= ~DEV_IDLE_EN; + udc_device->dev.platform_data = config; + status = platform_device_register(udc_device); + if (status) + pr_debug("can't register UDC device, %d\n", status); + } +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + if (config->otg || config->register_host) { + struct platform_device *ohci_device = config->ohci_device; + int status; + + syscon &= ~HST_IDLE_EN; + ohci_device->dev.platform_data = config; + status = platform_device_register(ohci_device); + if (status) + pr_debug("can't register OHCI device, %d\n", status); + } +#endif + +#ifdef CONFIG_USB_OTG + if (config->otg) { + struct platform_device *otg_device = config->otg_device; + int status; + + syscon &= ~OTG_IDLE_EN; + otg_device->dev.platform_data = config; + status = platform_device_register(otg_device); + if (status) + pr_debug("can't register OTG device, %d\n", status); + } +#endif + pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); + omap_writel(syscon, OTG_SYSCON_1); +} + +#else +void omap_otg_init(struct omap_usb_config *config) {} +#endif diff --git a/trunk/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/trunk/arch/powerpc/kvm/book3s_hv_rmhandlers.S index a84aafce2a12..a1044f43becd 100644 --- a/trunk/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/trunk/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -810,7 +810,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) lwz r3,VCORE_NAPPING_THREADS(r5) lwz r4,VCPU_PTID(r9) li r0,1 - sldi r0,r0,r4 + sld r0,r0,r4 andc. r3,r3,r0 /* no sense IPI'ing ourselves */ beq 43f mulli r4,r4,PACA_SIZE /* get paca for thread 0 */ diff --git a/trunk/arch/powerpc/xmon/xmon.c b/trunk/arch/powerpc/xmon/xmon.c index 0f3ab06d2222..eab3492a45c5 100644 --- a/trunk/arch/powerpc/xmon/xmon.c +++ b/trunk/arch/powerpc/xmon/xmon.c @@ -971,7 +971,7 @@ static int cpu_cmd(void) /* print cpus waiting or in xmon */ printf("cpus stopped:"); count = 0; - for (cpu = 0; cpu < NR_CPUS; ++cpu) { + for_each_possible_cpu(cpu) { if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { if (count == 0) printf(" %x", cpu); diff --git a/trunk/arch/x86/kvm/mmu.c b/trunk/arch/x86/kvm/mmu.c index be3cea4407ff..57e168e27b5b 100644 --- a/trunk/arch/x86/kvm/mmu.c +++ b/trunk/arch/x86/kvm/mmu.c @@ -3934,6 +3934,9 @@ static void kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm, { struct kvm_mmu_page *page; + if (list_empty(&kvm->arch.active_mmu_pages)) + return; + page = container_of(kvm->arch.active_mmu_pages.prev, struct kvm_mmu_page, link); kvm_mmu_prepare_zap_page(kvm, page, invalid_list); diff --git a/trunk/block/blk-cgroup.c b/trunk/block/blk-cgroup.c index 02cf6335e9bd..e7dee617358e 100644 --- a/trunk/block/blk-cgroup.c +++ b/trunk/block/blk-cgroup.c @@ -125,12 +125,8 @@ static struct blkcg_gq *blkg_alloc(struct blkcg *blkcg, struct request_queue *q) blkg->pd[i] = pd; pd->blkg = blkg; - } - - /* invoke per-policy init */ - for (i = 0; i < BLKCG_MAX_POLS; i++) { - struct blkcg_policy *pol = blkcg_policy[i]; + /* invoke per-policy init */ if (blkcg_policy_enabled(blkg->q, pol)) pol->pd_init_fn(blkg); } @@ -245,10 +241,9 @@ EXPORT_SYMBOL_GPL(blkg_lookup_create); static void blkg_destroy(struct blkcg_gq *blkg) { - struct request_queue *q = blkg->q; struct blkcg *blkcg = blkg->blkcg; - lockdep_assert_held(q->queue_lock); + lockdep_assert_held(blkg->q->queue_lock); lockdep_assert_held(&blkcg->lock); /* Something wrong if we are trying to remove same group twice */ diff --git a/trunk/block/blk-core.c b/trunk/block/blk-core.c index 3c923a7aeb56..93eb3e4f88ce 100644 --- a/trunk/block/blk-core.c +++ b/trunk/block/blk-core.c @@ -361,9 +361,10 @@ EXPORT_SYMBOL(blk_put_queue); */ void blk_drain_queue(struct request_queue *q, bool drain_all) { + int i; + while (true) { bool drain = false; - int i; spin_lock_irq(q->queue_lock); @@ -408,6 +409,18 @@ void blk_drain_queue(struct request_queue *q, bool drain_all) break; msleep(10); } + + /* + * With queue marked dead, any woken up waiter will fail the + * allocation path, so the wakeup chaining is lost and we're + * left with hung waiters. We need to wake up those waiters. + */ + if (q->request_fn) { + spin_lock_irq(q->queue_lock); + for (i = 0; i < ARRAY_SIZE(q->rq.wait); i++) + wake_up_all(&q->rq.wait[i]); + spin_unlock_irq(q->queue_lock); + } } /** @@ -467,7 +480,6 @@ void blk_cleanup_queue(struct request_queue *q) /* mark @q DEAD, no new request or merges will be allowed afterwards */ mutex_lock(&q->sysfs_lock); queue_flag_set_unlocked(QUEUE_FLAG_DEAD, q); - spin_lock_irq(lock); /* @@ -485,10 +497,6 @@ void blk_cleanup_queue(struct request_queue *q) queue_flag_set(QUEUE_FLAG_NOMERGES, q); queue_flag_set(QUEUE_FLAG_NOXMERGES, q); queue_flag_set(QUEUE_FLAG_DEAD, q); - - if (q->queue_lock != &q->__queue_lock) - q->queue_lock = &q->__queue_lock; - spin_unlock_irq(lock); mutex_unlock(&q->sysfs_lock); @@ -499,6 +507,11 @@ void blk_cleanup_queue(struct request_queue *q) del_timer_sync(&q->backing_dev_info.laptop_mode_wb_timer); blk_sync_queue(q); + spin_lock_irq(lock); + if (q->queue_lock != &q->__queue_lock) + q->queue_lock = &q->__queue_lock; + spin_unlock_irq(lock); + /* @q is and will stay empty, shutdown and put */ blk_put_queue(q); } diff --git a/trunk/block/blk-timeout.c b/trunk/block/blk-timeout.c index 780354888958..6e4744cbfb56 100644 --- a/trunk/block/blk-timeout.c +++ b/trunk/block/blk-timeout.c @@ -197,44 +197,3 @@ void blk_add_timer(struct request *req) mod_timer(&q->timeout, expiry); } -/** - * blk_abort_queue -- Abort all request on given queue - * @queue: pointer to queue - * - */ -void blk_abort_queue(struct request_queue *q) -{ - unsigned long flags; - struct request *rq, *tmp; - LIST_HEAD(list); - - /* - * Not a request based block device, nothing to abort - */ - if (!q->request_fn) - return; - - spin_lock_irqsave(q->queue_lock, flags); - - elv_abort_queue(q); - - /* - * Splice entries to local list, to avoid deadlocking if entries - * get readded to the timeout list by error handling - */ - list_splice_init(&q->timeout_list, &list); - - list_for_each_entry_safe(rq, tmp, &list, timeout_list) - blk_abort_request(rq); - - /* - * Occasionally, blk_abort_request() will return without - * deleting the element from the list. Make sure we add those back - * instead of leaving them on the local stack list. - */ - list_splice(&list, &q->timeout_list); - - spin_unlock_irqrestore(q->queue_lock, flags); - -} -EXPORT_SYMBOL_GPL(blk_abort_queue); diff --git a/trunk/block/cfq-iosched.c b/trunk/block/cfq-iosched.c index 673c977cc2bf..fb52df9744f5 100644 --- a/trunk/block/cfq-iosched.c +++ b/trunk/block/cfq-iosched.c @@ -17,8 +17,6 @@ #include "blk.h" #include "blk-cgroup.h" -static struct blkcg_policy blkcg_policy_cfq __maybe_unused; - /* * tunables */ @@ -418,11 +416,6 @@ static inline struct cfq_group *pd_to_cfqg(struct blkg_policy_data *pd) return pd ? container_of(pd, struct cfq_group, pd) : NULL; } -static inline struct cfq_group *blkg_to_cfqg(struct blkcg_gq *blkg) -{ - return pd_to_cfqg(blkg_to_pd(blkg, &blkcg_policy_cfq)); -} - static inline struct blkcg_gq *cfqg_to_blkg(struct cfq_group *cfqg) { return pd_to_blkg(&cfqg->pd); @@ -572,6 +565,13 @@ static inline void cfqg_stats_update_avg_queue_size(struct cfq_group *cfqg) { } #ifdef CONFIG_CFQ_GROUP_IOSCHED +static struct blkcg_policy blkcg_policy_cfq; + +static inline struct cfq_group *blkg_to_cfqg(struct blkcg_gq *blkg) +{ + return pd_to_cfqg(blkg_to_pd(blkg, &blkcg_policy_cfq)); +} + static inline void cfqg_get(struct cfq_group *cfqg) { return blkg_get(cfqg_to_blkg(cfqg)); @@ -3951,10 +3951,11 @@ static void cfq_exit_queue(struct elevator_queue *e) cfq_shutdown_timer_wq(cfqd); -#ifndef CONFIG_CFQ_GROUP_IOSCHED +#ifdef CONFIG_CFQ_GROUP_IOSCHED + blkcg_deactivate_policy(q, &blkcg_policy_cfq); +#else kfree(cfqd->root_group); #endif - blkcg_deactivate_policy(q, &blkcg_policy_cfq); kfree(cfqd); } @@ -4194,14 +4195,15 @@ static int __init cfq_init(void) #ifdef CONFIG_CFQ_GROUP_IOSCHED if (!cfq_group_idle) cfq_group_idle = 1; -#else - cfq_group_idle = 0; -#endif ret = blkcg_policy_register(&blkcg_policy_cfq); if (ret) return ret; +#else + cfq_group_idle = 0; +#endif + ret = -ENOMEM; cfq_pool = KMEM_CACHE(cfq_queue, 0); if (!cfq_pool) goto err_pol_unreg; @@ -4215,13 +4217,17 @@ static int __init cfq_init(void) err_free_pool: kmem_cache_destroy(cfq_pool); err_pol_unreg: +#ifdef CONFIG_CFQ_GROUP_IOSCHED blkcg_policy_unregister(&blkcg_policy_cfq); +#endif return ret; } static void __exit cfq_exit(void) { +#ifdef CONFIG_CFQ_GROUP_IOSCHED blkcg_policy_unregister(&blkcg_policy_cfq); +#endif elv_unregister(&iosched_cfq); kmem_cache_destroy(cfq_pool); } diff --git a/trunk/block/scsi_ioctl.c b/trunk/block/scsi_ioctl.c index 260fa80ef575..9a87daa6f4fb 100644 --- a/trunk/block/scsi_ioctl.c +++ b/trunk/block/scsi_ioctl.c @@ -721,11 +721,14 @@ int scsi_verify_blk_ioctl(struct block_device *bd, unsigned int cmd) break; } + if (capable(CAP_SYS_RAWIO)) + return 0; + /* In particular, rule out all resets and host-specific ioctls. */ printk_ratelimited(KERN_WARNING "%s: sending ioctl %x to a partition!\n", current->comm, cmd); - return capable(CAP_SYS_RAWIO) ? 0 : -ENOIOCTLCMD; + return -ENOIOCTLCMD; } EXPORT_SYMBOL(scsi_verify_blk_ioctl); diff --git a/trunk/drivers/amba/tegra-ahb.c b/trunk/drivers/amba/tegra-ahb.c index 0b6f0b28a487..aa0b1f160528 100644 --- a/trunk/drivers/amba/tegra-ahb.c +++ b/trunk/drivers/amba/tegra-ahb.c @@ -264,6 +264,11 @@ static int __devinit tegra_ahb_probe(struct platform_device *pdev) return 0; } +static int __devexit tegra_ahb_remove(struct platform_device *pdev) +{ + return 0; +} + static const struct of_device_id tegra_ahb_of_match[] __devinitconst = { { .compatible = "nvidia,tegra30-ahb", }, { .compatible = "nvidia,tegra20-ahb", }, @@ -272,6 +277,7 @@ static const struct of_device_id tegra_ahb_of_match[] __devinitconst = { static struct platform_driver tegra_ahb_driver = { .probe = tegra_ahb_probe, + .remove = __devexit_p(tegra_ahb_remove), .driver = { .name = DRV_NAME, .owner = THIS_MODULE, diff --git a/trunk/drivers/block/drbd/drbd_bitmap.c b/trunk/drivers/block/drbd/drbd_bitmap.c index b5c5ff53cb57..fcb956bb4b4c 100644 --- a/trunk/drivers/block/drbd/drbd_bitmap.c +++ b/trunk/drivers/block/drbd/drbd_bitmap.c @@ -1475,10 +1475,17 @@ void _drbd_bm_set_bits(struct drbd_conf *mdev, const unsigned long s, const unsi first_word = 0; spin_lock_irq(&b->bm_lock); } - /* last page (respectively only page, for first page == last page) */ last_word = MLPP(el >> LN2_BPL); - bm_set_full_words_within_one_page(mdev->bitmap, last_page, first_word, last_word); + + /* consider bitmap->bm_bits = 32768, bitmap->bm_number_of_pages = 1. (or multiples). + * ==> e = 32767, el = 32768, last_page = 2, + * and now last_word = 0. + * We do not want to touch last_page in this case, + * as we did not allocate it, it is not present in bitmap->bm_pages. + */ + if (last_word) + bm_set_full_words_within_one_page(mdev->bitmap, last_page, first_word, last_word); /* possibly trailing bits. * example: (e & 63) == 63, el will be e+1. diff --git a/trunk/drivers/block/drbd/drbd_req.c b/trunk/drivers/block/drbd/drbd_req.c index 9c5c84946b05..8e93a6ac9bb6 100644 --- a/trunk/drivers/block/drbd/drbd_req.c +++ b/trunk/drivers/block/drbd/drbd_req.c @@ -472,12 +472,17 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what, req->rq_state |= RQ_LOCAL_COMPLETED; req->rq_state &= ~RQ_LOCAL_PENDING; - D_ASSERT(!(req->rq_state & RQ_NET_MASK)); + if (req->rq_state & RQ_LOCAL_ABORTED) { + _req_may_be_done(req, m); + break; + } __drbd_chk_io_error(mdev, false); goto_queue_for_net_read: + D_ASSERT(!(req->rq_state & RQ_NET_MASK)); + /* no point in retrying if there is no good remote data, * or we have no connection. */ if (mdev->state.pdsk != D_UP_TO_DATE) { @@ -765,6 +770,40 @@ static int drbd_may_do_local_read(struct drbd_conf *mdev, sector_t sector, int s return 0 == drbd_bm_count_bits(mdev, sbnr, ebnr); } +static void maybe_pull_ahead(struct drbd_conf *mdev) +{ + int congested = 0; + + /* If I don't even have good local storage, we can not reasonably try + * to pull ahead of the peer. We also need the local reference to make + * sure mdev->act_log is there. + * Note: caller has to make sure that net_conf is there. + */ + if (!get_ldev_if_state(mdev, D_UP_TO_DATE)) + return; + + if (mdev->net_conf->cong_fill && + atomic_read(&mdev->ap_in_flight) >= mdev->net_conf->cong_fill) { + dev_info(DEV, "Congestion-fill threshold reached\n"); + congested = 1; + } + + if (mdev->act_log->used >= mdev->net_conf->cong_extents) { + dev_info(DEV, "Congestion-extents threshold reached\n"); + congested = 1; + } + + if (congested) { + queue_barrier(mdev); /* last barrier, after mirrored writes */ + + if (mdev->net_conf->on_congestion == OC_PULL_AHEAD) + _drbd_set_state(_NS(mdev, conn, C_AHEAD), 0, NULL); + else /*mdev->net_conf->on_congestion == OC_DISCONNECT */ + _drbd_set_state(_NS(mdev, conn, C_DISCONNECTING), 0, NULL); + } + put_ldev(mdev); +} + static int drbd_make_request_common(struct drbd_conf *mdev, struct bio *bio, unsigned long start_time) { const int rw = bio_rw(bio); @@ -972,29 +1011,8 @@ static int drbd_make_request_common(struct drbd_conf *mdev, struct bio *bio, uns _req_mod(req, queue_for_send_oos); if (remote && - mdev->net_conf->on_congestion != OC_BLOCK && mdev->agreed_pro_version >= 96) { - int congested = 0; - - if (mdev->net_conf->cong_fill && - atomic_read(&mdev->ap_in_flight) >= mdev->net_conf->cong_fill) { - dev_info(DEV, "Congestion-fill threshold reached\n"); - congested = 1; - } - - if (mdev->act_log->used >= mdev->net_conf->cong_extents) { - dev_info(DEV, "Congestion-extents threshold reached\n"); - congested = 1; - } - - if (congested) { - queue_barrier(mdev); /* last barrier, after mirrored writes */ - - if (mdev->net_conf->on_congestion == OC_PULL_AHEAD) - _drbd_set_state(_NS(mdev, conn, C_AHEAD), 0, NULL); - else /*mdev->net_conf->on_congestion == OC_DISCONNECT */ - _drbd_set_state(_NS(mdev, conn, C_DISCONNECTING), 0, NULL); - } - } + mdev->net_conf->on_congestion != OC_BLOCK && mdev->agreed_pro_version >= 96) + maybe_pull_ahead(mdev); spin_unlock_irq(&mdev->req_lock); kfree(b); /* if someone else has beaten us to it... */ diff --git a/trunk/drivers/block/floppy.c b/trunk/drivers/block/floppy.c index cce7df367b79..553f43a90953 100644 --- a/trunk/drivers/block/floppy.c +++ b/trunk/drivers/block/floppy.c @@ -671,6 +671,7 @@ static void __reschedule_timeout(int drive, const char *message) if (drive == current_reqD) drive = current_drive; + __cancel_delayed_work(&fd_timeout); if (drive < 0 || drive >= N_DRIVE) { delay = 20UL * HZ; diff --git a/trunk/drivers/block/mtip32xx/mtip32xx.c b/trunk/drivers/block/mtip32xx/mtip32xx.c index 264bc77dcb91..a8fddeb3d638 100644 --- a/trunk/drivers/block/mtip32xx/mtip32xx.c +++ b/trunk/drivers/block/mtip32xx/mtip32xx.c @@ -37,6 +37,7 @@ #include #include <../drivers/ata/ahci.h> #include +#include #include "mtip32xx.h" #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) @@ -85,6 +86,7 @@ static int instance; * allocated in mtip_init(). */ static int mtip_major; +static struct dentry *dfs_parent; static DEFINE_SPINLOCK(rssd_index_lock); static DEFINE_IDA(rssd_index_ida); @@ -2546,7 +2548,7 @@ static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd, } /* - * Sysfs register/status dump. + * Sysfs status dump. * * @dev Pointer to the device structure, passed by the kernrel. * @attr Pointer to the device_attribute structure passed by the kernel. @@ -2555,45 +2557,68 @@ static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd, * return value * The size, in bytes, of the data copied into buf. */ -static ssize_t mtip_hw_show_registers(struct device *dev, +static ssize_t mtip_hw_show_status(struct device *dev, struct device_attribute *attr, char *buf) { - u32 group_allocated; struct driver_data *dd = dev_to_disk(dev)->private_data; int size = 0; + + if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) + size += sprintf(buf, "%s", "thermal_shutdown\n"); + else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) + size += sprintf(buf, "%s", "write_protect\n"); + else + size += sprintf(buf, "%s", "online\n"); + + return size; +} + +static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL); + +static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf, + size_t len, loff_t *offset) +{ + struct driver_data *dd = (struct driver_data *)f->private_data; + char buf[MTIP_DFS_MAX_BUF_SIZE]; + u32 group_allocated; + int size = *offset; int n; - size += sprintf(&buf[size], "Hardware\n--------\n"); - size += sprintf(&buf[size], "S ACTive : [ 0x"); + if (!len || size) + return 0; + + if (size < 0) + return -EINVAL; + + size += sprintf(&buf[size], "H/ S ACTive : [ 0x"); for (n = dd->slot_groups-1; n >= 0; n--) size += sprintf(&buf[size], "%08X ", readl(dd->port->s_active[n])); size += sprintf(&buf[size], "]\n"); - size += sprintf(&buf[size], "Command Issue : [ 0x"); + size += sprintf(&buf[size], "H/ Command Issue : [ 0x"); for (n = dd->slot_groups-1; n >= 0; n--) size += sprintf(&buf[size], "%08X ", readl(dd->port->cmd_issue[n])); size += sprintf(&buf[size], "]\n"); - size += sprintf(&buf[size], "Completed : [ 0x"); + size += sprintf(&buf[size], "H/ Completed : [ 0x"); for (n = dd->slot_groups-1; n >= 0; n--) size += sprintf(&buf[size], "%08X ", readl(dd->port->completed[n])); size += sprintf(&buf[size], "]\n"); - size += sprintf(&buf[size], "PORT IRQ STAT : [ 0x%08X ]\n", + size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n", readl(dd->port->mmio + PORT_IRQ_STAT)); - size += sprintf(&buf[size], "HOST IRQ STAT : [ 0x%08X ]\n", + size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n", readl(dd->mmio + HOST_IRQ_STAT)); size += sprintf(&buf[size], "\n"); - size += sprintf(&buf[size], "Local\n-----\n"); - size += sprintf(&buf[size], "Allocated : [ 0x"); + size += sprintf(&buf[size], "L/ Allocated : [ 0x"); for (n = dd->slot_groups-1; n >= 0; n--) { if (sizeof(long) > sizeof(u32)) @@ -2605,7 +2630,7 @@ static ssize_t mtip_hw_show_registers(struct device *dev, } size += sprintf(&buf[size], "]\n"); - size += sprintf(&buf[size], "Commands in Q: [ 0x"); + size += sprintf(&buf[size], "L/ Commands in Q : [ 0x"); for (n = dd->slot_groups-1; n >= 0; n--) { if (sizeof(long) > sizeof(u32)) @@ -2617,44 +2642,53 @@ static ssize_t mtip_hw_show_registers(struct device *dev, } size += sprintf(&buf[size], "]\n"); - return size; + *offset = size <= len ? size : len; + size = copy_to_user(ubuf, buf, *offset); + if (size) + return -EFAULT; + + return *offset; } -static ssize_t mtip_hw_show_status(struct device *dev, - struct device_attribute *attr, - char *buf) +static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf, + size_t len, loff_t *offset) { - struct driver_data *dd = dev_to_disk(dev)->private_data; - int size = 0; + struct driver_data *dd = (struct driver_data *)f->private_data; + char buf[MTIP_DFS_MAX_BUF_SIZE]; + int size = *offset; - if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) - size += sprintf(buf, "%s", "thermal_shutdown\n"); - else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) - size += sprintf(buf, "%s", "write_protect\n"); - else - size += sprintf(buf, "%s", "online\n"); - - return size; -} + if (!len || size) + return 0; -static ssize_t mtip_hw_show_flags(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct driver_data *dd = dev_to_disk(dev)->private_data; - int size = 0; + if (size < 0) + return -EINVAL; - size += sprintf(&buf[size], "Flag in port struct : [ %08lX ]\n", + size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n", dd->port->flags); - size += sprintf(&buf[size], "Flag in dd struct : [ %08lX ]\n", + size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n", dd->dd_flag); - return size; + *offset = size <= len ? size : len; + size = copy_to_user(ubuf, buf, *offset); + if (size) + return -EFAULT; + + return *offset; } -static DEVICE_ATTR(registers, S_IRUGO, mtip_hw_show_registers, NULL); -static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL); -static DEVICE_ATTR(flags, S_IRUGO, mtip_hw_show_flags, NULL); +static const struct file_operations mtip_regs_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = mtip_hw_read_registers, + .llseek = no_llseek, +}; + +static const struct file_operations mtip_flags_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = mtip_hw_read_flags, + .llseek = no_llseek, +}; /* * Create the sysfs related attributes. @@ -2671,15 +2705,9 @@ static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) if (!kobj || !dd) return -EINVAL; - if (sysfs_create_file(kobj, &dev_attr_registers.attr)) - dev_warn(&dd->pdev->dev, - "Error creating 'registers' sysfs entry\n"); if (sysfs_create_file(kobj, &dev_attr_status.attr)) dev_warn(&dd->pdev->dev, "Error creating 'status' sysfs entry\n"); - if (sysfs_create_file(kobj, &dev_attr_flags.attr)) - dev_warn(&dd->pdev->dev, - "Error creating 'flags' sysfs entry\n"); return 0; } @@ -2698,13 +2726,39 @@ static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) if (!kobj || !dd) return -EINVAL; - sysfs_remove_file(kobj, &dev_attr_registers.attr); sysfs_remove_file(kobj, &dev_attr_status.attr); - sysfs_remove_file(kobj, &dev_attr_flags.attr); return 0; } +static int mtip_hw_debugfs_init(struct driver_data *dd) +{ + if (!dfs_parent) + return -1; + + dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent); + if (IS_ERR_OR_NULL(dd->dfs_node)) { + dev_warn(&dd->pdev->dev, + "Error creating node %s under debugfs\n", + dd->disk->disk_name); + dd->dfs_node = NULL; + return -1; + } + + debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd, + &mtip_flags_fops); + debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd, + &mtip_regs_fops); + + return 0; +} + +static void mtip_hw_debugfs_exit(struct driver_data *dd) +{ + debugfs_remove_recursive(dd->dfs_node); +} + + /* * Perform any init/resume time hardware setup * @@ -3730,6 +3784,7 @@ static int mtip_block_initialize(struct driver_data *dd) mtip_hw_sysfs_init(dd, kobj); kobject_put(kobj); } + mtip_hw_debugfs_init(dd); if (dd->mtip_svc_handler) { set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); @@ -3755,6 +3810,8 @@ static int mtip_block_initialize(struct driver_data *dd) return rv; kthread_run_error: + mtip_hw_debugfs_exit(dd); + /* Delete our gendisk. This also removes the device from /dev */ del_gendisk(dd->disk); @@ -3805,6 +3862,7 @@ static int mtip_block_remove(struct driver_data *dd) kobject_put(kobj); } } + mtip_hw_debugfs_exit(dd); /* * Delete our gendisk structure. This also removes the device @@ -4152,10 +4210,20 @@ static int __init mtip_init(void) } mtip_major = error; + if (!dfs_parent) { + dfs_parent = debugfs_create_dir("rssd", NULL); + if (IS_ERR_OR_NULL(dfs_parent)) { + printk(KERN_WARNING "Error creating debugfs parent\n"); + dfs_parent = NULL; + } + } + /* Register our PCI operations. */ error = pci_register_driver(&mtip_pci_driver); - if (error) + if (error) { + debugfs_remove(dfs_parent); unregister_blkdev(mtip_major, MTIP_DRV_NAME); + } return error; } @@ -4172,6 +4240,8 @@ static int __init mtip_init(void) */ static void __exit mtip_exit(void) { + debugfs_remove_recursive(dfs_parent); + /* Release the allocated major block device number. */ unregister_blkdev(mtip_major, MTIP_DRV_NAME); diff --git a/trunk/drivers/block/mtip32xx/mtip32xx.h b/trunk/drivers/block/mtip32xx/mtip32xx.h index b2c88da26b2a..f51fc23d17bb 100644 --- a/trunk/drivers/block/mtip32xx/mtip32xx.h +++ b/trunk/drivers/block/mtip32xx/mtip32xx.h @@ -26,7 +26,6 @@ #include #include #include -#include /* Offset of Subsystem Device ID in pci confoguration space */ #define PCI_SUBSYSTEM_DEVICEID 0x2E @@ -111,6 +110,8 @@ #define dbg_printk(format, arg...) #endif +#define MTIP_DFS_MAX_BUF_SIZE 1024 + #define __force_bit2int (unsigned int __force) enum { @@ -447,6 +448,8 @@ struct driver_data { unsigned long dd_flag; /* NOTE: use atomic bit operations on this */ struct task_struct *mtip_svc_handler; /* task_struct of svc thd */ + + struct dentry *dfs_node; }; #endif diff --git a/trunk/drivers/block/umem.c b/trunk/drivers/block/umem.c index aa2712060bfb..9a72277a31df 100644 --- a/trunk/drivers/block/umem.c +++ b/trunk/drivers/block/umem.c @@ -513,6 +513,44 @@ static void process_page(unsigned long data) } } +struct mm_plug_cb { + struct blk_plug_cb cb; + struct cardinfo *card; +}; + +static void mm_unplug(struct blk_plug_cb *cb) +{ + struct mm_plug_cb *mmcb = container_of(cb, struct mm_plug_cb, cb); + + spin_lock_irq(&mmcb->card->lock); + activate(mmcb->card); + spin_unlock_irq(&mmcb->card->lock); + kfree(mmcb); +} + +static int mm_check_plugged(struct cardinfo *card) +{ + struct blk_plug *plug = current->plug; + struct mm_plug_cb *mmcb; + + if (!plug) + return 0; + + list_for_each_entry(mmcb, &plug->cb_list, cb.list) { + if (mmcb->cb.callback == mm_unplug && mmcb->card == card) + return 1; + } + /* Not currently on the callback list */ + mmcb = kmalloc(sizeof(*mmcb), GFP_ATOMIC); + if (!mmcb) + return 0; + + mmcb->card = card; + mmcb->cb.callback = mm_unplug; + list_add(&mmcb->cb.list, &plug->cb_list); + return 1; +} + static void mm_make_request(struct request_queue *q, struct bio *bio) { struct cardinfo *card = q->queuedata; @@ -523,6 +561,8 @@ static void mm_make_request(struct request_queue *q, struct bio *bio) *card->biotail = bio; bio->bi_next = NULL; card->biotail = &bio->bi_next; + if (bio->bi_rw & REQ_SYNC || !mm_check_plugged(card)) + activate(card); spin_unlock_irq(&card->lock); return; diff --git a/trunk/drivers/block/xen-blkback/common.h b/trunk/drivers/block/xen-blkback/common.h index 773cf27dc23f..9ad3b5ec1dc1 100644 --- a/trunk/drivers/block/xen-blkback/common.h +++ b/trunk/drivers/block/xen-blkback/common.h @@ -257,6 +257,7 @@ static inline void blkif_get_x86_32_req(struct blkif_request *dst, break; case BLKIF_OP_DISCARD: dst->u.discard.flag = src->u.discard.flag; + dst->u.discard.id = src->u.discard.id; dst->u.discard.sector_number = src->u.discard.sector_number; dst->u.discard.nr_sectors = src->u.discard.nr_sectors; break; @@ -287,6 +288,7 @@ static inline void blkif_get_x86_64_req(struct blkif_request *dst, break; case BLKIF_OP_DISCARD: dst->u.discard.flag = src->u.discard.flag; + dst->u.discard.id = src->u.discard.id; dst->u.discard.sector_number = src->u.discard.sector_number; dst->u.discard.nr_sectors = src->u.discard.nr_sectors; break; diff --git a/trunk/drivers/block/xen-blkfront.c b/trunk/drivers/block/xen-blkfront.c index 60eed4bdd2e4..e4fb3374dcd2 100644 --- a/trunk/drivers/block/xen-blkfront.c +++ b/trunk/drivers/block/xen-blkfront.c @@ -141,14 +141,36 @@ static int get_id_from_freelist(struct blkfront_info *info) return free; } -static void add_id_to_freelist(struct blkfront_info *info, +static int add_id_to_freelist(struct blkfront_info *info, unsigned long id) { + if (info->shadow[id].req.u.rw.id != id) + return -EINVAL; + if (info->shadow[id].request == NULL) + return -EINVAL; info->shadow[id].req.u.rw.id = info->shadow_free; info->shadow[id].request = NULL; info->shadow_free = id; + return 0; } +static const char *op_name(int op) +{ + static const char *const names[] = { + [BLKIF_OP_READ] = "read", + [BLKIF_OP_WRITE] = "write", + [BLKIF_OP_WRITE_BARRIER] = "barrier", + [BLKIF_OP_FLUSH_DISKCACHE] = "flush", + [BLKIF_OP_DISCARD] = "discard" }; + + if (op < 0 || op >= ARRAY_SIZE(names)) + return "unknown"; + + if (!names[op]) + return "reserved"; + + return names[op]; +} static int xlbd_reserve_minors(unsigned int minor, unsigned int nr) { unsigned int end = minor + nr; @@ -746,20 +768,36 @@ static irqreturn_t blkif_interrupt(int irq, void *dev_id) bret = RING_GET_RESPONSE(&info->ring, i); id = bret->id; + /* + * The backend has messed up and given us an id that we would + * never have given to it (we stamp it up to BLK_RING_SIZE - + * look in get_id_from_freelist. + */ + if (id >= BLK_RING_SIZE) { + WARN(1, "%s: response to %s has incorrect id (%ld)\n", + info->gd->disk_name, op_name(bret->operation), id); + /* We can't safely get the 'struct request' as + * the id is busted. */ + continue; + } req = info->shadow[id].request; if (bret->operation != BLKIF_OP_DISCARD) blkif_completion(&info->shadow[id]); - add_id_to_freelist(info, id); + if (add_id_to_freelist(info, id)) { + WARN(1, "%s: response to %s (id %ld) couldn't be recycled!\n", + info->gd->disk_name, op_name(bret->operation), id); + continue; + } error = (bret->status == BLKIF_RSP_OKAY) ? 0 : -EIO; switch (bret->operation) { case BLKIF_OP_DISCARD: if (unlikely(bret->status == BLKIF_RSP_EOPNOTSUPP)) { struct request_queue *rq = info->rq; - printk(KERN_WARNING "blkfront: %s: discard op failed\n", - info->gd->disk_name); + printk(KERN_WARNING "blkfront: %s: %s op failed\n", + info->gd->disk_name, op_name(bret->operation)); error = -EOPNOTSUPP; info->feature_discard = 0; info->feature_secdiscard = 0; @@ -771,18 +809,14 @@ static irqreturn_t blkif_interrupt(int irq, void *dev_id) case BLKIF_OP_FLUSH_DISKCACHE: case BLKIF_OP_WRITE_BARRIER: if (unlikely(bret->status == BLKIF_RSP_EOPNOTSUPP)) { - printk(KERN_WARNING "blkfront: %s: write %s op failed\n", - info->flush_op == BLKIF_OP_WRITE_BARRIER ? - "barrier" : "flush disk cache", - info->gd->disk_name); + printk(KERN_WARNING "blkfront: %s: %s op failed\n", + info->gd->disk_name, op_name(bret->operation)); error = -EOPNOTSUPP; } if (unlikely(bret->status == BLKIF_RSP_ERROR && info->shadow[id].req.u.rw.nr_segments == 0)) { - printk(KERN_WARNING "blkfront: %s: empty write %s op failed\n", - info->flush_op == BLKIF_OP_WRITE_BARRIER ? - "barrier" : "flush disk cache", - info->gd->disk_name); + printk(KERN_WARNING "blkfront: %s: empty %s op failed\n", + info->gd->disk_name, op_name(bret->operation)); error = -EOPNOTSUPP; } if (unlikely(error)) { diff --git a/trunk/drivers/clk/clk.c b/trunk/drivers/clk/clk.c index dcbe05616090..9a1eb0cfa95f 100644 --- a/trunk/drivers/clk/clk.c +++ b/trunk/drivers/clk/clk.c @@ -1067,26 +1067,24 @@ static int __clk_set_parent(struct clk *clk, struct clk *parent) old_parent = clk->parent; - /* find index of new parent clock using cached parent ptrs */ - if (clk->parents) - for (i = 0; i < clk->num_parents; i++) - if (clk->parents[i] == parent) - break; - else + if (!clk->parents) clk->parents = kzalloc((sizeof(struct clk*) * clk->num_parents), GFP_KERNEL); /* - * find index of new parent clock using string name comparison - * also try to cache the parent to avoid future calls to __clk_lookup + * find index of new parent clock using cached parent ptrs, + * or if not yet cached, use string name comparison and cache + * them now to avoid future calls to __clk_lookup. */ - if (i == clk->num_parents) - for (i = 0; i < clk->num_parents; i++) - if (!strcmp(clk->parent_names[i], parent->name)) { - if (clk->parents) - clk->parents[i] = __clk_lookup(parent->name); - break; - } + for (i = 0; i < clk->num_parents; i++) { + if (clk->parents && clk->parents[i] == parent) + break; + else if (!strcmp(clk->parent_names[i], parent->name)) { + if (clk->parents) + clk->parents[i] = __clk_lookup(parent->name); + break; + } + } if (i == clk->num_parents) { pr_debug("%s: clock %s is not a possible parent of clock %s\n", diff --git a/trunk/drivers/crypto/tegra-aes.c b/trunk/drivers/crypto/tegra-aes.c index ac236f6724f4..422a9766c7c9 100644 --- a/trunk/drivers/crypto/tegra-aes.c +++ b/trunk/drivers/crypto/tegra-aes.c @@ -572,7 +572,7 @@ static void aes_workqueue_handler(struct work_struct *work) struct tegra_aes_dev *dd = aes_dev; int ret; - ret = clk_prepare_enable(dd->aes_clk); + ret = clk_enable(dd->aes_clk); if (ret) BUG_ON("clock enable failed"); @@ -581,7 +581,7 @@ static void aes_workqueue_handler(struct work_struct *work) ret = tegra_aes_handle_req(dd); } while (!ret); - clk_disable_unprepare(dd->aes_clk); + clk_disable(dd->aes_clk); } static irqreturn_t aes_irq(int irq, void *dev_id) @@ -673,7 +673,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata, /* take mutex to access the aes hw */ mutex_lock(&aes_lock); - ret = clk_prepare_enable(dd->aes_clk); + ret = clk_enable(dd->aes_clk); if (ret) return ret; @@ -700,7 +700,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata, } out: - clk_disable_unprepare(dd->aes_clk); + clk_disable(dd->aes_clk); mutex_unlock(&aes_lock); dev_dbg(dd->dev, "%s: done\n", __func__); @@ -758,7 +758,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed, dd->flags = FLAGS_ENCRYPT | FLAGS_RNG; - ret = clk_prepare_enable(dd->aes_clk); + ret = clk_enable(dd->aes_clk); if (ret) return ret; @@ -788,7 +788,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed, memcpy(dd->dt, dt, DEFAULT_RNG_BLK_SZ); out: - clk_disable_unprepare(dd->aes_clk); + clk_disable(dd->aes_clk); mutex_unlock(&aes_lock); dev_dbg(dd->dev, "%s: done\n", __func__); diff --git a/trunk/drivers/gpu/drm/drm_edid.c b/trunk/drivers/gpu/drm/drm_edid.c index 5873e481e5d2..a8743c399e83 100644 --- a/trunk/drivers/gpu/drm/drm_edid.c +++ b/trunk/drivers/gpu/drm/drm_edid.c @@ -1039,6 +1039,24 @@ mode_in_range(const struct drm_display_mode *mode, struct edid *edid, return true; } +static bool valid_inferred_mode(const struct drm_connector *connector, + const struct drm_display_mode *mode) +{ + struct drm_display_mode *m; + bool ok = false; + + list_for_each_entry(m, &connector->probed_modes, head) { + if (mode->hdisplay == m->hdisplay && + mode->vdisplay == m->vdisplay && + drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) + return false; /* duplicated */ + if (mode->hdisplay <= m->hdisplay && + mode->vdisplay <= m->vdisplay) + ok = true; + } + return ok; +} + static int drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, struct detailed_timing *timing) @@ -1048,7 +1066,8 @@ drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, struct drm_device *dev = connector->dev; for (i = 0; i < drm_num_dmt_modes; i++) { - if (mode_in_range(drm_dmt_modes + i, edid, timing)) { + if (mode_in_range(drm_dmt_modes + i, edid, timing) && + valid_inferred_mode(connector, drm_dmt_modes + i)) { newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); if (newmode) { drm_mode_probed_add(connector, newmode); @@ -1088,7 +1107,8 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, return modes; fixup_mode_1366x768(newmode); - if (!mode_in_range(newmode, edid, timing)) { + if (!mode_in_range(newmode, edid, timing) || + !valid_inferred_mode(connector, newmode)) { drm_mode_destroy(dev, newmode); continue; } @@ -1116,7 +1136,8 @@ drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, return modes; fixup_mode_1366x768(newmode); - if (!mode_in_range(newmode, edid, timing)) { + if (!mode_in_range(newmode, edid, timing) || + !valid_inferred_mode(connector, newmode)) { drm_mode_destroy(dev, newmode); continue; } diff --git a/trunk/drivers/gpu/drm/i915/i915_dma.c b/trunk/drivers/gpu/drm/i915/i915_dma.c index f94792626b94..36822b924eb1 100644 --- a/trunk/drivers/gpu/drm/i915/i915_dma.c +++ b/trunk/drivers/gpu/drm/i915/i915_dma.c @@ -1401,6 +1401,27 @@ i915_mtrr_setup(struct drm_i915_private *dev_priv, unsigned long base, } } +static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) +{ + struct apertures_struct *ap; + struct pci_dev *pdev = dev_priv->dev->pdev; + bool primary; + + ap = alloc_apertures(1); + if (!ap) + return; + + ap->ranges[0].base = dev_priv->dev->agp->base; + ap->ranges[0].size = + dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; + primary = + pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; + + remove_conflicting_framebuffers(ap, "inteldrmfb", primary); + + kfree(ap); +} + /** * i915_driver_load - setup chip and create an initial config * @dev: DRM device @@ -1446,6 +1467,15 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) goto free_priv; } + dev_priv->mm.gtt = intel_gtt_get(); + if (!dev_priv->mm.gtt) { + DRM_ERROR("Failed to initialize GTT\n"); + ret = -ENODEV; + goto put_bridge; + } + + i915_kick_out_firmware_fb(dev_priv); + pci_set_master(dev->pdev); /* overlay on gen2 is broken and can't address above 1G */ @@ -1471,13 +1501,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) goto put_bridge; } - dev_priv->mm.gtt = intel_gtt_get(); - if (!dev_priv->mm.gtt) { - DRM_ERROR("Failed to initialize GTT\n"); - ret = -ENODEV; - goto out_rmmap; - } - aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; dev_priv->mm.gtt_mapping = diff --git a/trunk/drivers/gpu/drm/radeon/radeon_gart.c b/trunk/drivers/gpu/drm/radeon/radeon_gart.c index 59d44937dd9f..84b648a7ddd8 100644 --- a/trunk/drivers/gpu/drm/radeon/radeon_gart.c +++ b/trunk/drivers/gpu/drm/radeon/radeon_gart.c @@ -289,8 +289,9 @@ int radeon_vm_manager_init(struct radeon_device *rdev) rdev->vm_manager.enabled = false; /* mark first vm as always in use, it's the system one */ + /* allocate enough for 2 full VM pts */ r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager, - rdev->vm_manager.max_pfn * 8, + rdev->vm_manager.max_pfn * 8 * 2, RADEON_GEM_DOMAIN_VRAM); if (r) { dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n", @@ -633,7 +634,15 @@ int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm) mutex_init(&vm->mutex); INIT_LIST_HEAD(&vm->list); INIT_LIST_HEAD(&vm->va); - vm->last_pfn = 0; + /* SI requires equal sized PTs for all VMs, so always set + * last_pfn to max_pfn. cayman allows variable sized + * pts so we can grow then as needed. Once we switch + * to two level pts we can unify this again. + */ + if (rdev->family >= CHIP_TAHITI) + vm->last_pfn = rdev->vm_manager.max_pfn; + else + vm->last_pfn = 0; /* map the ib pool buffer at 0 in virtual address space, set * read only */ diff --git a/trunk/drivers/gpu/drm/radeon/radeon_gem.c b/trunk/drivers/gpu/drm/radeon/radeon_gem.c index f28bd4b7ef98..21ec9f5653ce 100644 --- a/trunk/drivers/gpu/drm/radeon/radeon_gem.c +++ b/trunk/drivers/gpu/drm/radeon/radeon_gem.c @@ -292,6 +292,7 @@ int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data, int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) { + struct radeon_device *rdev = dev->dev_private; struct drm_radeon_gem_busy *args = data; struct drm_gem_object *gobj; struct radeon_bo *robj; @@ -317,13 +318,14 @@ int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, break; } drm_gem_object_unreference_unlocked(gobj); - r = radeon_gem_handle_lockup(robj->rdev, r); + r = radeon_gem_handle_lockup(rdev, r); return r; } int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) { + struct radeon_device *rdev = dev->dev_private; struct drm_radeon_gem_wait_idle *args = data; struct drm_gem_object *gobj; struct radeon_bo *robj; @@ -336,10 +338,10 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, robj = gem_to_radeon_bo(gobj); r = radeon_bo_wait(robj, NULL, false); /* callback hw specific functions if any */ - if (robj->rdev->asic->ioctl_wait_idle) - robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj); + if (rdev->asic->ioctl_wait_idle) + robj->rdev->asic->ioctl_wait_idle(rdev, robj); drm_gem_object_unreference_unlocked(gobj); - r = radeon_gem_handle_lockup(robj->rdev, r); + r = radeon_gem_handle_lockup(rdev, r); return r; } diff --git a/trunk/drivers/gpu/drm/radeon/si.c b/trunk/drivers/gpu/drm/radeon/si.c index c7b61f16ecfd..0b0279291a73 100644 --- a/trunk/drivers/gpu/drm/radeon/si.c +++ b/trunk/drivers/gpu/drm/radeon/si.c @@ -2365,12 +2365,12 @@ int si_pcie_gart_enable(struct radeon_device *rdev) WREG32(0x15DC, 0); /* empty context1-15 */ - /* FIXME start with 1G, once using 2 level pt switch to full + /* FIXME start with 4G, once using 2 level pt switch to full * vm size space */ /* set vm size, must be a multiple of 4 */ WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0); - WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, (1 << 30) / RADEON_GPU_PAGE_SIZE); + WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn); for (i = 1; i < 16; i++) { if (i < 8) WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2), diff --git a/trunk/drivers/i2c/busses/i2c-tegra.c b/trunk/drivers/i2c/busses/i2c-tegra.c index 3da7ee3eb505..8b2e555a9563 100644 --- a/trunk/drivers/i2c/busses/i2c-tegra.c +++ b/trunk/drivers/i2c/busses/i2c-tegra.c @@ -341,7 +341,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) u32 val; int err = 0; - clk_prepare_enable(i2c_dev->clk); + clk_enable(i2c_dev->clk); tegra_periph_reset_assert(i2c_dev->clk); udelay(2); @@ -372,7 +372,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) if (tegra_i2c_flush_fifos(i2c_dev)) err = -ETIMEDOUT; - clk_disable_unprepare(i2c_dev->clk); + clk_disable(i2c_dev->clk); if (i2c_dev->irq_disabled) { i2c_dev->irq_disabled = 0; @@ -546,14 +546,14 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], if (i2c_dev->is_suspended) return -EBUSY; - clk_prepare_enable(i2c_dev->clk); + clk_enable(i2c_dev->clk); for (i = 0; i < num; i++) { int stop = (i == (num - 1)) ? 1 : 0; ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], stop); if (ret) break; } - clk_disable_unprepare(i2c_dev->clk); + clk_disable(i2c_dev->clk); return ret ?: i; } @@ -666,7 +666,7 @@ static int __devinit tegra_i2c_probe(struct platform_device *pdev) goto err_free; } - clk_prepare_enable(i2c_dev->i2c_clk); + clk_enable(i2c_dev->i2c_clk); i2c_set_adapdata(&i2c_dev->adapter, i2c_dev); i2c_dev->adapter.owner = THIS_MODULE; diff --git a/trunk/drivers/input/joystick/as5011.c b/trunk/drivers/input/joystick/as5011.c index 57d19d4e0a2d..c96653b58867 100644 --- a/trunk/drivers/input/joystick/as5011.c +++ b/trunk/drivers/input/joystick/as5011.c @@ -282,7 +282,8 @@ static int __devinit as5011_probe(struct i2c_client *client, error = request_threaded_irq(as5011->button_irq, NULL, as5011_button_interrupt, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, + IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, "as5011_button", as5011); if (error < 0) { dev_err(&client->dev, @@ -296,7 +297,7 @@ static int __devinit as5011_probe(struct i2c_client *client, error = request_threaded_irq(as5011->axis_irq, NULL, as5011_axis_interrupt, - plat_data->axis_irqflags, + plat_data->axis_irqflags | IRQF_ONESHOT, "as5011_joystick", as5011); if (error) { dev_err(&client->dev, diff --git a/trunk/drivers/input/keyboard/mcs_touchkey.c b/trunk/drivers/input/keyboard/mcs_touchkey.c index 64a0ca4c92f3..0d77f6c84950 100644 --- a/trunk/drivers/input/keyboard/mcs_touchkey.c +++ b/trunk/drivers/input/keyboard/mcs_touchkey.c @@ -178,7 +178,8 @@ static int __devinit mcs_touchkey_probe(struct i2c_client *client, } error = request_threaded_irq(client->irq, NULL, mcs_touchkey_interrupt, - IRQF_TRIGGER_FALLING, client->dev.driver->name, data); + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, + client->dev.driver->name, data); if (error) { dev_err(&client->dev, "Failed to register interrupt\n"); goto err_free_mem; diff --git a/trunk/drivers/input/keyboard/mpr121_touchkey.c b/trunk/drivers/input/keyboard/mpr121_touchkey.c index caa218a51b5a..7613f1cac951 100644 --- a/trunk/drivers/input/keyboard/mpr121_touchkey.c +++ b/trunk/drivers/input/keyboard/mpr121_touchkey.c @@ -248,7 +248,7 @@ static int __devinit mpr_touchkey_probe(struct i2c_client *client, error = request_threaded_irq(client->irq, NULL, mpr_touchkey_interrupt, - IRQF_TRIGGER_FALLING, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, client->dev.driver->name, mpr121); if (error) { dev_err(&client->dev, "Failed to register interrupt\n"); diff --git a/trunk/drivers/input/keyboard/qt1070.c b/trunk/drivers/input/keyboard/qt1070.c index 0b7b2f891752..ca68f2992d72 100644 --- a/trunk/drivers/input/keyboard/qt1070.c +++ b/trunk/drivers/input/keyboard/qt1070.c @@ -201,7 +201,8 @@ static int __devinit qt1070_probe(struct i2c_client *client, msleep(QT1070_RESET_TIME); err = request_threaded_irq(client->irq, NULL, qt1070_interrupt, - IRQF_TRIGGER_NONE, client->dev.driver->name, data); + IRQF_TRIGGER_NONE | IRQF_ONESHOT, + client->dev.driver->name, data); if (err) { dev_err(&client->dev, "fail to request irq\n"); goto err_free_mem; diff --git a/trunk/drivers/input/keyboard/tca6416-keypad.c b/trunk/drivers/input/keyboard/tca6416-keypad.c index 3afea3f89718..c355cdde8d22 100644 --- a/trunk/drivers/input/keyboard/tca6416-keypad.c +++ b/trunk/drivers/input/keyboard/tca6416-keypad.c @@ -278,7 +278,8 @@ static int __devinit tca6416_keypad_probe(struct i2c_client *client, error = request_threaded_irq(chip->irqnum, NULL, tca6416_keys_isr, - IRQF_TRIGGER_FALLING, + IRQF_TRIGGER_FALLING | + IRQF_ONESHOT, "tca6416-keypad", chip); if (error) { dev_dbg(&client->dev, diff --git a/trunk/drivers/input/keyboard/tca8418_keypad.c b/trunk/drivers/input/keyboard/tca8418_keypad.c index 5f87b28b3192..893869b29ed9 100644 --- a/trunk/drivers/input/keyboard/tca8418_keypad.c +++ b/trunk/drivers/input/keyboard/tca8418_keypad.c @@ -360,7 +360,7 @@ static int __devinit tca8418_keypad_probe(struct i2c_client *client, client->irq = gpio_to_irq(client->irq); error = request_threaded_irq(client->irq, NULL, tca8418_irq_handler, - IRQF_TRIGGER_FALLING, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, client->name, keypad_data); if (error) { dev_dbg(&client->dev, diff --git a/trunk/drivers/input/keyboard/tegra-kbc.c b/trunk/drivers/input/keyboard/tegra-kbc.c index 2c1c9ed1bd9f..4ffe64d53107 100644 --- a/trunk/drivers/input/keyboard/tegra-kbc.c +++ b/trunk/drivers/input/keyboard/tegra-kbc.c @@ -492,7 +492,7 @@ static int tegra_kbc_start(struct tegra_kbc *kbc) unsigned int debounce_cnt; u32 val = 0; - clk_prepare_enable(kbc->clk); + clk_enable(kbc->clk); /* Reset the KBC controller to clear all previous status.*/ tegra_periph_reset_assert(kbc->clk); @@ -556,7 +556,7 @@ static void tegra_kbc_stop(struct tegra_kbc *kbc) disable_irq(kbc->irq); del_timer_sync(&kbc->timer); - clk_disable_unprepare(kbc->clk); + clk_disable(kbc->clk); } static int tegra_kbc_open(struct input_dev *dev) diff --git a/trunk/drivers/input/keyboard/tnetv107x-keypad.c b/trunk/drivers/input/keyboard/tnetv107x-keypad.c index a4a445fb7020..4c34f21fbe2d 100644 --- a/trunk/drivers/input/keyboard/tnetv107x-keypad.c +++ b/trunk/drivers/input/keyboard/tnetv107x-keypad.c @@ -227,15 +227,15 @@ static int __devinit keypad_probe(struct platform_device *pdev) goto error_clk; } - error = request_threaded_irq(kp->irq_press, NULL, keypad_irq, 0, - dev_name(dev), kp); + error = request_threaded_irq(kp->irq_press, NULL, keypad_irq, + IRQF_ONESHOT, dev_name(dev), kp); if (error < 0) { dev_err(kp->dev, "Could not allocate keypad press key irq\n"); goto error_irq_press; } - error = request_threaded_irq(kp->irq_release, NULL, keypad_irq, 0, - dev_name(dev), kp); + error = request_threaded_irq(kp->irq_release, NULL, keypad_irq, + IRQF_ONESHOT, dev_name(dev), kp); if (error < 0) { dev_err(kp->dev, "Could not allocate keypad release key irq\n"); goto error_irq_release; diff --git a/trunk/drivers/input/misc/ad714x.c b/trunk/drivers/input/misc/ad714x.c index 0ac75bbad4d6..2e5d5e1de647 100644 --- a/trunk/drivers/input/misc/ad714x.c +++ b/trunk/drivers/input/misc/ad714x.c @@ -972,6 +972,7 @@ struct ad714x_chip *ad714x_probe(struct device *dev, u16 bus_type, int irq, struct ad714x_platform_data *plat_data = dev->platform_data; struct ad714x_chip *ad714x; void *drv_mem; + unsigned long irqflags; struct ad714x_button_drv *bt_drv; struct ad714x_slider_drv *sd_drv; @@ -1162,10 +1163,11 @@ struct ad714x_chip *ad714x_probe(struct device *dev, u16 bus_type, int irq, alloc_idx++; } + irqflags = plat_data->irqflags ?: IRQF_TRIGGER_FALLING; + irqflags |= IRQF_ONESHOT; + error = request_threaded_irq(ad714x->irq, NULL, ad714x_interrupt_thread, - plat_data->irqflags ? - plat_data->irqflags : IRQF_TRIGGER_FALLING, - "ad714x_captouch", ad714x); + irqflags, "ad714x_captouch", ad714x); if (error) { dev_err(dev, "can't allocate irq %d\n", ad714x->irq); goto err_unreg_dev; diff --git a/trunk/drivers/input/misc/dm355evm_keys.c b/trunk/drivers/input/misc/dm355evm_keys.c index 35083c6836c3..c1313d8535c3 100644 --- a/trunk/drivers/input/misc/dm355evm_keys.c +++ b/trunk/drivers/input/misc/dm355evm_keys.c @@ -213,7 +213,8 @@ static int __devinit dm355evm_keys_probe(struct platform_device *pdev) /* REVISIT: flush the event queue? */ status = request_threaded_irq(keys->irq, NULL, dm355evm_keys_irq, - IRQF_TRIGGER_FALLING, dev_name(&pdev->dev), keys); + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, + dev_name(&pdev->dev), keys); if (status < 0) goto fail2; diff --git a/trunk/drivers/input/tablet/wacom_sys.c b/trunk/drivers/input/tablet/wacom_sys.c index cad5602d3ce4..8b31473a81fe 100644 --- a/trunk/drivers/input/tablet/wacom_sys.c +++ b/trunk/drivers/input/tablet/wacom_sys.c @@ -216,7 +216,7 @@ static void wacom_retrieve_report_data(struct usb_interface *intf, rep_data[0] = 12; result = wacom_get_report(intf, WAC_HID_FEATURE_REPORT, - rep_data[0], &rep_data, 2, + rep_data[0], rep_data, 2, WAC_MSG_RETRIES); if (result >= 0 && rep_data[1] > 2) @@ -401,7 +401,9 @@ static int wacom_parse_hid(struct usb_interface *intf, break; case HID_USAGE_CONTACTMAX: - wacom_retrieve_report_data(intf, features); + /* leave touch_max as is if predefined */ + if (!features->touch_max) + wacom_retrieve_report_data(intf, features); i++; break; } diff --git a/trunk/drivers/input/touchscreen/ad7879.c b/trunk/drivers/input/touchscreen/ad7879.c index e2482b40da51..bd4eb4277697 100644 --- a/trunk/drivers/input/touchscreen/ad7879.c +++ b/trunk/drivers/input/touchscreen/ad7879.c @@ -597,7 +597,7 @@ struct ad7879 *ad7879_probe(struct device *dev, u8 devid, unsigned int irq, AD7879_TMR(ts->pen_down_acc_interval); err = request_threaded_irq(ts->irq, NULL, ad7879_irq, - IRQF_TRIGGER_FALLING, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, dev_name(dev), ts); if (err) { dev_err(dev, "irq %d busy?\n", ts->irq); diff --git a/trunk/drivers/input/touchscreen/atmel_mxt_ts.c b/trunk/drivers/input/touchscreen/atmel_mxt_ts.c index 42e645062c20..25fd0561a17d 100644 --- a/trunk/drivers/input/touchscreen/atmel_mxt_ts.c +++ b/trunk/drivers/input/touchscreen/atmel_mxt_ts.c @@ -1149,7 +1149,8 @@ static int __devinit mxt_probe(struct i2c_client *client, goto err_free_object; error = request_threaded_irq(client->irq, NULL, mxt_interrupt, - pdata->irqflags, client->dev.driver->name, data); + pdata->irqflags | IRQF_ONESHOT, + client->dev.driver->name, data); if (error) { dev_err(&client->dev, "Failed to register interrupt\n"); goto err_free_object; diff --git a/trunk/drivers/input/touchscreen/bu21013_ts.c b/trunk/drivers/input/touchscreen/bu21013_ts.c index f2d03c06c2da..5c487d23f11c 100644 --- a/trunk/drivers/input/touchscreen/bu21013_ts.c +++ b/trunk/drivers/input/touchscreen/bu21013_ts.c @@ -509,7 +509,8 @@ static int __devinit bu21013_probe(struct i2c_client *client, input_set_drvdata(in_dev, bu21013_data); error = request_threaded_irq(pdata->irq, NULL, bu21013_gpio_irq, - IRQF_TRIGGER_FALLING | IRQF_SHARED, + IRQF_TRIGGER_FALLING | IRQF_SHARED | + IRQF_ONESHOT, DRIVER_TP, bu21013_data); if (error) { dev_err(&client->dev, "request irq %d failed\n", pdata->irq); diff --git a/trunk/drivers/input/touchscreen/cy8ctmg110_ts.c b/trunk/drivers/input/touchscreen/cy8ctmg110_ts.c index 237753ad1031..464f1bf4b61d 100644 --- a/trunk/drivers/input/touchscreen/cy8ctmg110_ts.c +++ b/trunk/drivers/input/touchscreen/cy8ctmg110_ts.c @@ -251,7 +251,8 @@ static int __devinit cy8ctmg110_probe(struct i2c_client *client, } err = request_threaded_irq(client->irq, NULL, cy8ctmg110_irq_thread, - IRQF_TRIGGER_RISING, "touch_reset_key", ts); + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + "touch_reset_key", ts); if (err < 0) { dev_err(&client->dev, "irq %d busy? error %d\n", client->irq, err); diff --git a/trunk/drivers/input/touchscreen/intel-mid-touch.c b/trunk/drivers/input/touchscreen/intel-mid-touch.c index 3cd7a837f82b..cf299377fc49 100644 --- a/trunk/drivers/input/touchscreen/intel-mid-touch.c +++ b/trunk/drivers/input/touchscreen/intel-mid-touch.c @@ -620,7 +620,7 @@ static int __devinit mrstouch_probe(struct platform_device *pdev) MRST_PRESSURE_MIN, MRST_PRESSURE_MAX, 0, 0); err = request_threaded_irq(tsdev->irq, NULL, mrstouch_pendet_irq, - 0, "mrstouch", tsdev); + IRQF_ONESHOT, "mrstouch", tsdev); if (err) { dev_err(tsdev->dev, "unable to allocate irq\n"); goto err_free_mem; diff --git a/trunk/drivers/input/touchscreen/pixcir_i2c_ts.c b/trunk/drivers/input/touchscreen/pixcir_i2c_ts.c index 72f6ba3a4709..953b4c105cad 100644 --- a/trunk/drivers/input/touchscreen/pixcir_i2c_ts.c +++ b/trunk/drivers/input/touchscreen/pixcir_i2c_ts.c @@ -165,7 +165,7 @@ static int __devinit pixcir_i2c_ts_probe(struct i2c_client *client, input_set_drvdata(input, tsdata); error = request_threaded_irq(client->irq, NULL, pixcir_ts_isr, - IRQF_TRIGGER_FALLING, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, client->name, tsdata); if (error) { dev_err(&client->dev, "Unable to request touchscreen IRQ.\n"); diff --git a/trunk/drivers/input/touchscreen/tnetv107x-ts.c b/trunk/drivers/input/touchscreen/tnetv107x-ts.c index 7e7488097359..368d2c6cf780 100644 --- a/trunk/drivers/input/touchscreen/tnetv107x-ts.c +++ b/trunk/drivers/input/touchscreen/tnetv107x-ts.c @@ -297,7 +297,7 @@ static int __devinit tsc_probe(struct platform_device *pdev) goto error_clk; } - error = request_threaded_irq(ts->tsc_irq, NULL, tsc_irq, 0, + error = request_threaded_irq(ts->tsc_irq, NULL, tsc_irq, IRQF_ONESHOT, dev_name(dev), ts); if (error < 0) { dev_err(ts->dev, "Could not allocate ts irq\n"); diff --git a/trunk/drivers/input/touchscreen/tsc2005.c b/trunk/drivers/input/touchscreen/tsc2005.c index b6adeaee9cc5..5ce3fa8ce646 100644 --- a/trunk/drivers/input/touchscreen/tsc2005.c +++ b/trunk/drivers/input/touchscreen/tsc2005.c @@ -650,7 +650,8 @@ static int __devinit tsc2005_probe(struct spi_device *spi) tsc2005_stop_scan(ts); error = request_threaded_irq(spi->irq, NULL, tsc2005_irq_thread, - IRQF_TRIGGER_RISING, "tsc2005", ts); + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + "tsc2005", ts); if (error) { dev_err(&spi->dev, "Failed to request irq, err: %d\n", error); goto err_free_mem; diff --git a/trunk/drivers/leds/ledtrig-heartbeat.c b/trunk/drivers/leds/ledtrig-heartbeat.c index 41dc76db4311..a019fbb70880 100644 --- a/trunk/drivers/leds/ledtrig-heartbeat.c +++ b/trunk/drivers/leds/ledtrig-heartbeat.c @@ -21,6 +21,8 @@ #include #include "leds.h" +static int panic_heartbeats; + struct heartbeat_trig_data { unsigned int phase; unsigned int period; @@ -34,6 +36,11 @@ static void led_heartbeat_function(unsigned long data) unsigned long brightness = LED_OFF; unsigned long delay = 0; + if (unlikely(panic_heartbeats)) { + led_set_brightness(led_cdev, LED_OFF); + return; + } + /* acts like an actual heart beat -- ie thump-thump-pause... */ switch (heartbeat_data->phase) { case 0: @@ -111,12 +118,19 @@ static int heartbeat_reboot_notifier(struct notifier_block *nb, return NOTIFY_DONE; } +static int heartbeat_panic_notifier(struct notifier_block *nb, + unsigned long code, void *unused) +{ + panic_heartbeats = 1; + return NOTIFY_DONE; +} + static struct notifier_block heartbeat_reboot_nb = { .notifier_call = heartbeat_reboot_notifier, }; static struct notifier_block heartbeat_panic_nb = { - .notifier_call = heartbeat_reboot_notifier, + .notifier_call = heartbeat_panic_notifier, }; static int __init heartbeat_trig_init(void) diff --git a/trunk/drivers/md/dm-thin.c b/trunk/drivers/md/dm-thin.c index 37fdaf81bd1f..ce59824fb414 100644 --- a/trunk/drivers/md/dm-thin.c +++ b/trunk/drivers/md/dm-thin.c @@ -2292,6 +2292,13 @@ static int process_reserve_metadata_snap_mesg(unsigned argc, char **argv, struct if (r) return r; + r = dm_pool_commit_metadata(pool->pmd); + if (r) { + DMERR("%s: dm_pool_commit_metadata() failed, error = %d", + __func__, r); + return r; + } + r = dm_pool_reserve_metadata_snap(pool->pmd); if (r) DMWARN("reserve_metadata_snap message failed."); diff --git a/trunk/drivers/md/md.c b/trunk/drivers/md/md.c index 1c2f9048e1ae..a4c219e3c859 100644 --- a/trunk/drivers/md/md.c +++ b/trunk/drivers/md/md.c @@ -5784,8 +5784,7 @@ static int add_new_disk(struct mddev * mddev, mdu_disk_info_t *info) super_types[mddev->major_version]. validate_super(mddev, rdev); if ((info->state & (1<flags) || - rdev->raid_disk != info->raid_disk)) { + rdev->raid_disk != info->raid_disk) { /* This was a hot-add request, but events doesn't * match, so reject it. */ @@ -6751,7 +6750,7 @@ struct md_thread *md_register_thread(void (*run) (struct mddev *), struct mddev thread->tsk = kthread_run(md_thread, thread, "%s_%s", mdname(thread->mddev), - name ?: mddev->pers->name); + name); if (IS_ERR(thread->tsk)) { kfree(thread); return NULL; @@ -7298,6 +7297,7 @@ void md_do_sync(struct mddev *mddev) int skipped = 0; struct md_rdev *rdev; char *desc; + struct blk_plug plug; /* just incase thread restarts... */ if (test_bit(MD_RECOVERY_DONE, &mddev->recovery)) @@ -7447,6 +7447,7 @@ void md_do_sync(struct mddev *mddev) } mddev->curr_resync_completed = j; + blk_start_plug(&plug); while (j < max_sectors) { sector_t sectors; @@ -7552,6 +7553,7 @@ void md_do_sync(struct mddev *mddev) * this also signals 'finished resyncing' to md_stop */ out: + blk_finish_plug(&plug); wait_event(mddev->recovery_wait, !atomic_read(&mddev->recovery_active)); /* tell personality that we are finished */ diff --git a/trunk/drivers/md/multipath.c b/trunk/drivers/md/multipath.c index 9339e67fcc79..61a1833ebaf3 100644 --- a/trunk/drivers/md/multipath.c +++ b/trunk/drivers/md/multipath.c @@ -474,7 +474,8 @@ static int multipath_run (struct mddev *mddev) } { - mddev->thread = md_register_thread(multipathd, mddev, NULL); + mddev->thread = md_register_thread(multipathd, mddev, + "multipath"); if (!mddev->thread) { printk(KERN_ERR "multipath: couldn't allocate thread" " for %s\n", mdname(mddev)); diff --git a/trunk/drivers/md/persistent-data/dm-space-map-checker.c b/trunk/drivers/md/persistent-data/dm-space-map-checker.c index 50ed53bf4aa2..fc90c11620ad 100644 --- a/trunk/drivers/md/persistent-data/dm-space-map-checker.c +++ b/trunk/drivers/md/persistent-data/dm-space-map-checker.c @@ -8,6 +8,7 @@ #include #include +#include #ifdef CONFIG_DM_DEBUG_SPACE_MAPS @@ -89,13 +90,23 @@ static int ca_create(struct count_array *ca, struct dm_space_map *sm) ca->nr = nr_blocks; ca->nr_free = nr_blocks; - ca->counts = kzalloc(sizeof(*ca->counts) * nr_blocks, GFP_KERNEL); - if (!ca->counts) - return -ENOMEM; + + if (!nr_blocks) + ca->counts = NULL; + else { + ca->counts = vzalloc(sizeof(*ca->counts) * nr_blocks); + if (!ca->counts) + return -ENOMEM; + } return 0; } +static void ca_destroy(struct count_array *ca) +{ + vfree(ca->counts); +} + static int ca_load(struct count_array *ca, struct dm_space_map *sm) { int r; @@ -126,12 +137,14 @@ static int ca_load(struct count_array *ca, struct dm_space_map *sm) static int ca_extend(struct count_array *ca, dm_block_t extra_blocks) { dm_block_t nr_blocks = ca->nr + extra_blocks; - uint32_t *counts = kzalloc(sizeof(*counts) * nr_blocks, GFP_KERNEL); + uint32_t *counts = vzalloc(sizeof(*counts) * nr_blocks); if (!counts) return -ENOMEM; - memcpy(counts, ca->counts, sizeof(*counts) * ca->nr); - kfree(ca->counts); + if (ca->counts) { + memcpy(counts, ca->counts, sizeof(*counts) * ca->nr); + ca_destroy(ca); + } ca->nr = nr_blocks; ca->nr_free += extra_blocks; ca->counts = counts; @@ -151,11 +164,6 @@ static int ca_commit(struct count_array *old, struct count_array *new) return 0; } -static void ca_destroy(struct count_array *ca) -{ - kfree(ca->counts); -} - /*----------------------------------------------------------------*/ struct sm_checker { @@ -343,25 +351,25 @@ struct dm_space_map *dm_sm_checker_create(struct dm_space_map *sm) int r; struct sm_checker *smc; - if (!sm) - return NULL; + if (IS_ERR_OR_NULL(sm)) + return ERR_PTR(-EINVAL); smc = kmalloc(sizeof(*smc), GFP_KERNEL); if (!smc) - return NULL; + return ERR_PTR(-ENOMEM); memcpy(&smc->sm, &ops_, sizeof(smc->sm)); r = ca_create(&smc->old_counts, sm); if (r) { kfree(smc); - return NULL; + return ERR_PTR(r); } r = ca_create(&smc->counts, sm); if (r) { ca_destroy(&smc->old_counts); kfree(smc); - return NULL; + return ERR_PTR(r); } smc->real_sm = sm; @@ -371,7 +379,7 @@ struct dm_space_map *dm_sm_checker_create(struct dm_space_map *sm) ca_destroy(&smc->counts); ca_destroy(&smc->old_counts); kfree(smc); - return NULL; + return ERR_PTR(r); } r = ca_commit(&smc->old_counts, &smc->counts); @@ -379,7 +387,7 @@ struct dm_space_map *dm_sm_checker_create(struct dm_space_map *sm) ca_destroy(&smc->counts); ca_destroy(&smc->old_counts); kfree(smc); - return NULL; + return ERR_PTR(r); } return &smc->sm; @@ -391,25 +399,25 @@ struct dm_space_map *dm_sm_checker_create_fresh(struct dm_space_map *sm) int r; struct sm_checker *smc; - if (!sm) - return NULL; + if (IS_ERR_OR_NULL(sm)) + return ERR_PTR(-EINVAL); smc = kmalloc(sizeof(*smc), GFP_KERNEL); if (!smc) - return NULL; + return ERR_PTR(-ENOMEM); memcpy(&smc->sm, &ops_, sizeof(smc->sm)); r = ca_create(&smc->old_counts, sm); if (r) { kfree(smc); - return NULL; + return ERR_PTR(r); } r = ca_create(&smc->counts, sm); if (r) { ca_destroy(&smc->old_counts); kfree(smc); - return NULL; + return ERR_PTR(r); } smc->real_sm = sm; diff --git a/trunk/drivers/md/persistent-data/dm-space-map-disk.c b/trunk/drivers/md/persistent-data/dm-space-map-disk.c index fc469ba9f627..3d0ed5332883 100644 --- a/trunk/drivers/md/persistent-data/dm-space-map-disk.c +++ b/trunk/drivers/md/persistent-data/dm-space-map-disk.c @@ -290,7 +290,16 @@ struct dm_space_map *dm_sm_disk_create(struct dm_transaction_manager *tm, dm_block_t nr_blocks) { struct dm_space_map *sm = dm_sm_disk_create_real(tm, nr_blocks); - return dm_sm_checker_create_fresh(sm); + struct dm_space_map *smc; + + if (IS_ERR_OR_NULL(sm)) + return sm; + + smc = dm_sm_checker_create_fresh(sm); + if (IS_ERR(smc)) + dm_sm_destroy(sm); + + return smc; } EXPORT_SYMBOL_GPL(dm_sm_disk_create); diff --git a/trunk/drivers/md/persistent-data/dm-transaction-manager.c b/trunk/drivers/md/persistent-data/dm-transaction-manager.c index 400fe144c0cd..e5604b32d91f 100644 --- a/trunk/drivers/md/persistent-data/dm-transaction-manager.c +++ b/trunk/drivers/md/persistent-data/dm-transaction-manager.c @@ -138,6 +138,9 @@ EXPORT_SYMBOL_GPL(dm_tm_create_non_blocking_clone); void dm_tm_destroy(struct dm_transaction_manager *tm) { + if (!tm->is_clone) + wipe_shadow_table(tm); + kfree(tm); } EXPORT_SYMBOL_GPL(dm_tm_destroy); @@ -344,8 +347,10 @@ static int dm_tm_create_internal(struct dm_block_manager *bm, } *sm = dm_sm_checker_create(inner); - if (!*sm) + if (IS_ERR(*sm)) { + r = PTR_ERR(*sm); goto bad2; + } } else { r = dm_bm_write_lock(dm_tm_get_bm(*tm), sb_location, @@ -364,8 +369,10 @@ static int dm_tm_create_internal(struct dm_block_manager *bm, } *sm = dm_sm_checker_create(inner); - if (!*sm) + if (IS_ERR(*sm)) { + r = PTR_ERR(*sm); goto bad2; + } } return 0; diff --git a/trunk/drivers/md/raid1.c b/trunk/drivers/md/raid1.c index a9c7981ddd24..8c2754f835ef 100644 --- a/trunk/drivers/md/raid1.c +++ b/trunk/drivers/md/raid1.c @@ -517,8 +517,8 @@ static int read_balance(struct r1conf *conf, struct r1bio *r1_bio, int *max_sect int bad_sectors; int disk = start_disk + i; - if (disk >= conf->raid_disks) - disk -= conf->raid_disks; + if (disk >= conf->raid_disks * 2) + disk -= conf->raid_disks * 2; rdev = rcu_dereference(conf->mirrors[disk].rdev); if (r1_bio->bios[disk] == IO_BLOCKED @@ -883,7 +883,6 @@ static void make_request(struct mddev *mddev, struct bio * bio) const unsigned long do_sync = (bio->bi_rw & REQ_SYNC); const unsigned long do_flush_fua = (bio->bi_rw & (REQ_FLUSH | REQ_FUA)); struct md_rdev *blocked_rdev; - int plugged; int first_clone; int sectors_handled; int max_sectors; @@ -1034,7 +1033,6 @@ static void make_request(struct mddev *mddev, struct bio * bio) * the bad blocks. Each set of writes gets it's own r1bio * with a set of bios attached. */ - plugged = mddev_check_plugged(mddev); disks = conf->raid_disks * 2; retry_write: @@ -1191,6 +1189,8 @@ static void make_request(struct mddev *mddev, struct bio * bio) bio_list_add(&conf->pending_bio_list, mbio); conf->pending_count++; spin_unlock_irqrestore(&conf->device_lock, flags); + if (!mddev_check_plugged(mddev)) + md_wakeup_thread(mddev->thread); } /* Mustn't call r1_bio_write_done before this next test, * as it could result in the bio being freed. @@ -1213,9 +1213,6 @@ static void make_request(struct mddev *mddev, struct bio * bio) /* In case raid1d snuck in to freeze_array */ wake_up(&conf->wait_barrier); - - if (do_sync || !bitmap || !plugged) - md_wakeup_thread(mddev->thread); } static void status(struct seq_file *seq, struct mddev *mddev) @@ -2621,7 +2618,7 @@ static struct r1conf *setup_conf(struct mddev *mddev) goto abort; } err = -ENOMEM; - conf->thread = md_register_thread(raid1d, mddev, NULL); + conf->thread = md_register_thread(raid1d, mddev, "raid1"); if (!conf->thread) { printk(KERN_ERR "md/raid1:%s: couldn't allocate thread\n", diff --git a/trunk/drivers/md/raid10.c b/trunk/drivers/md/raid10.c index 99ae6068e456..8da6282254c3 100644 --- a/trunk/drivers/md/raid10.c +++ b/trunk/drivers/md/raid10.c @@ -1039,7 +1039,6 @@ static void make_request(struct mddev *mddev, struct bio * bio) const unsigned long do_fua = (bio->bi_rw & REQ_FUA); unsigned long flags; struct md_rdev *blocked_rdev; - int plugged; int sectors_handled; int max_sectors; int sectors; @@ -1239,7 +1238,6 @@ static void make_request(struct mddev *mddev, struct bio * bio) * of r10_bios is recored in bio->bi_phys_segments just as with * the read case. */ - plugged = mddev_check_plugged(mddev); r10_bio->read_slot = -1; /* make sure repl_bio gets freed */ raid10_find_phys(conf, r10_bio); @@ -1396,6 +1394,8 @@ static void make_request(struct mddev *mddev, struct bio * bio) bio_list_add(&conf->pending_bio_list, mbio); conf->pending_count++; spin_unlock_irqrestore(&conf->device_lock, flags); + if (!mddev_check_plugged(mddev)) + md_wakeup_thread(mddev->thread); if (!r10_bio->devs[i].repl_bio) continue; @@ -1423,6 +1423,8 @@ static void make_request(struct mddev *mddev, struct bio * bio) bio_list_add(&conf->pending_bio_list, mbio); conf->pending_count++; spin_unlock_irqrestore(&conf->device_lock, flags); + if (!mddev_check_plugged(mddev)) + md_wakeup_thread(mddev->thread); } /* Don't remove the bias on 'remaining' (one_write_done) until @@ -1448,9 +1450,6 @@ static void make_request(struct mddev *mddev, struct bio * bio) /* In case raid10d snuck in to freeze_array */ wake_up(&conf->wait_barrier); - - if (do_sync || !mddev->bitmap || !plugged) - md_wakeup_thread(mddev->thread); } static void status(struct seq_file *seq, struct mddev *mddev) @@ -2310,7 +2309,7 @@ static void fix_read_error(struct r10conf *conf, struct mddev *mddev, struct r10 if (r10_sync_page_io(rdev, r10_bio->devs[sl].addr + sect, - s<<9, conf->tmppage, WRITE) + s, conf->tmppage, WRITE) == 0) { /* Well, this device is dead */ printk(KERN_NOTICE @@ -2349,7 +2348,7 @@ static void fix_read_error(struct r10conf *conf, struct mddev *mddev, struct r10 switch (r10_sync_page_io(rdev, r10_bio->devs[sl].addr + sect, - s<<9, conf->tmppage, + s, conf->tmppage, READ)) { case 0: /* Well, this device is dead */ @@ -2512,7 +2511,7 @@ static void handle_read_error(struct mddev *mddev, struct r10bio *r10_bio) slot = r10_bio->read_slot; printk_ratelimited( KERN_ERR - "md/raid10:%s: %s: redirecting" + "md/raid10:%s: %s: redirecting " "sector %llu to another mirror\n", mdname(mddev), bdevname(rdev->bdev, b), @@ -2661,7 +2660,8 @@ static void raid10d(struct mddev *mddev) blk_start_plug(&plug); for (;;) { - flush_pending_writes(conf); + if (atomic_read(&mddev->plug_cnt) == 0) + flush_pending_writes(conf); spin_lock_irqsave(&conf->device_lock, flags); if (list_empty(head)) { @@ -2890,6 +2890,12 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr, /* want to reconstruct this device */ rb2 = r10_bio; sect = raid10_find_virt(conf, sector_nr, i); + if (sect >= mddev->resync_max_sectors) { + /* last stripe is not complete - don't + * try to recover this sector. + */ + continue; + } /* Unless we are doing a full sync, or a replacement * we only need to recover the block if it is set in * the bitmap @@ -3421,7 +3427,7 @@ static struct r10conf *setup_conf(struct mddev *mddev) spin_lock_init(&conf->resync_lock); init_waitqueue_head(&conf->wait_barrier); - conf->thread = md_register_thread(raid10d, mddev, NULL); + conf->thread = md_register_thread(raid10d, mddev, "raid10"); if (!conf->thread) goto out; diff --git a/trunk/drivers/md/raid5.c b/trunk/drivers/md/raid5.c index d26767246d26..04348d76bb30 100644 --- a/trunk/drivers/md/raid5.c +++ b/trunk/drivers/md/raid5.c @@ -196,12 +196,14 @@ static void __release_stripe(struct r5conf *conf, struct stripe_head *sh) BUG_ON(!list_empty(&sh->lru)); BUG_ON(atomic_read(&conf->active_stripes)==0); if (test_bit(STRIPE_HANDLE, &sh->state)) { - if (test_bit(STRIPE_DELAYED, &sh->state)) + if (test_bit(STRIPE_DELAYED, &sh->state) && + !test_bit(STRIPE_PREREAD_ACTIVE, &sh->state)) list_add_tail(&sh->lru, &conf->delayed_list); else if (test_bit(STRIPE_BIT_DELAY, &sh->state) && sh->bm_seq - conf->seq_write > 0) list_add_tail(&sh->lru, &conf->bitmap_list); else { + clear_bit(STRIPE_DELAYED, &sh->state); clear_bit(STRIPE_BIT_DELAY, &sh->state); list_add_tail(&sh->lru, &conf->handle_list); } @@ -606,6 +608,12 @@ static void ops_run_io(struct stripe_head *sh, struct stripe_head_state *s) * a chance*/ md_check_recovery(conf->mddev); } + /* + * Because md_wait_for_blocked_rdev + * will dec nr_pending, we must + * increment it first. + */ + atomic_inc(&rdev->nr_pending); md_wait_for_blocked_rdev(rdev, conf->mddev); } else { /* Acknowledged bad block - skip the write */ @@ -1737,6 +1745,7 @@ static void raid5_end_read_request(struct bio * bi, int error) } else { const char *bdn = bdevname(rdev->bdev, b); int retry = 0; + int set_bad = 0; clear_bit(R5_UPTODATE, &sh->dev[i].flags); atomic_inc(&rdev->read_errors); @@ -1748,7 +1757,8 @@ static void raid5_end_read_request(struct bio * bi, int error) mdname(conf->mddev), (unsigned long long)s, bdn); - else if (conf->mddev->degraded >= conf->max_degraded) + else if (conf->mddev->degraded >= conf->max_degraded) { + set_bad = 1; printk_ratelimited( KERN_WARNING "md/raid:%s: read error not correctable " @@ -1756,8 +1766,9 @@ static void raid5_end_read_request(struct bio * bi, int error) mdname(conf->mddev), (unsigned long long)s, bdn); - else if (test_bit(R5_ReWrite, &sh->dev[i].flags)) + } else if (test_bit(R5_ReWrite, &sh->dev[i].flags)) { /* Oh, no!!! */ + set_bad = 1; printk_ratelimited( KERN_WARNING "md/raid:%s: read error NOT corrected!! " @@ -1765,7 +1776,7 @@ static void raid5_end_read_request(struct bio * bi, int error) mdname(conf->mddev), (unsigned long long)s, bdn); - else if (atomic_read(&rdev->read_errors) + } else if (atomic_read(&rdev->read_errors) > conf->max_nr_stripes) printk(KERN_WARNING "md/raid:%s: Too many read errors, failing device %s.\n", @@ -1777,7 +1788,11 @@ static void raid5_end_read_request(struct bio * bi, int error) else { clear_bit(R5_ReadError, &sh->dev[i].flags); clear_bit(R5_ReWrite, &sh->dev[i].flags); - md_error(conf->mddev, rdev); + if (!(set_bad + && test_bit(In_sync, &rdev->flags) + && rdev_set_badblocks( + rdev, sh->sector, STRIPE_SECTORS, 0))) + md_error(conf->mddev, rdev); } } rdev_dec_pending(rdev, conf->mddev); @@ -3582,8 +3597,18 @@ static void handle_stripe(struct stripe_head *sh) finish: /* wait for this device to become unblocked */ - if (conf->mddev->external && unlikely(s.blocked_rdev)) - md_wait_for_blocked_rdev(s.blocked_rdev, conf->mddev); + if (unlikely(s.blocked_rdev)) { + if (conf->mddev->external) + md_wait_for_blocked_rdev(s.blocked_rdev, + conf->mddev); + else + /* Internal metadata will immediately + * be written by raid5d, so we don't + * need to wait here. + */ + rdev_dec_pending(s.blocked_rdev, + conf->mddev); + } if (s.handle_bad_blocks) for (i = disks; i--; ) { @@ -3881,8 +3906,6 @@ static int chunk_aligned_read(struct mddev *mddev, struct bio * raid_bio) raid_bio->bi_next = (void*)rdev; align_bi->bi_bdev = rdev->bdev; align_bi->bi_flags &= ~(1 << BIO_SEG_VALID); - /* No reshape active, so we can trust rdev->data_offset */ - align_bi->bi_sector += rdev->data_offset; if (!bio_fits_rdev(align_bi) || is_badblock(rdev, align_bi->bi_sector, align_bi->bi_size>>9, @@ -3893,6 +3916,9 @@ static int chunk_aligned_read(struct mddev *mddev, struct bio * raid_bio) return 0; } + /* No reshape active, so we can trust rdev->data_offset */ + align_bi->bi_sector += rdev->data_offset; + spin_lock_irq(&conf->device_lock); wait_event_lock_irq(conf->wait_for_stripe, conf->quiesce == 0, @@ -3971,7 +3997,6 @@ static void make_request(struct mddev *mddev, struct bio * bi) struct stripe_head *sh; const int rw = bio_data_dir(bi); int remaining; - int plugged; if (unlikely(bi->bi_rw & REQ_FLUSH)) { md_flush_request(mddev, bi); @@ -3990,7 +4015,6 @@ static void make_request(struct mddev *mddev, struct bio * bi) bi->bi_next = NULL; bi->bi_phys_segments = 1; /* over-loaded to count active stripes */ - plugged = mddev_check_plugged(mddev); for (;logical_sector < last_sector; logical_sector += STRIPE_SECTORS) { DEFINE_WAIT(w); int previous; @@ -4092,6 +4116,7 @@ static void make_request(struct mddev *mddev, struct bio * bi) if ((bi->bi_rw & REQ_SYNC) && !test_and_set_bit(STRIPE_PREREAD_ACTIVE, &sh->state)) atomic_inc(&conf->preread_active_stripes); + mddev_check_plugged(mddev); release_stripe(sh); } else { /* cannot get stripe for read-ahead, just give-up */ @@ -4099,10 +4124,7 @@ static void make_request(struct mddev *mddev, struct bio * bi) finish_wait(&conf->wait_for_overlap, &w); break; } - } - if (!plugged) - md_wakeup_thread(mddev->thread); spin_lock_irq(&conf->device_lock); remaining = raid5_dec_bi_phys_segments(bi); @@ -4823,6 +4845,7 @@ static struct r5conf *setup_conf(struct mddev *mddev) int raid_disk, memory, max_disks; struct md_rdev *rdev; struct disk_info *disk; + char pers_name[6]; if (mddev->new_level != 5 && mddev->new_level != 4 @@ -4946,7 +4969,8 @@ static struct r5conf *setup_conf(struct mddev *mddev) printk(KERN_INFO "md/raid:%s: allocated %dkB\n", mdname(mddev), memory); - conf->thread = md_register_thread(raid5d, mddev, NULL); + sprintf(pers_name, "raid%d", mddev->new_level); + conf->thread = md_register_thread(raid5d, mddev, pers_name); if (!conf->thread) { printk(KERN_ERR "md/raid:%s: couldn't allocate thread.\n", @@ -5465,10 +5489,9 @@ static int raid5_add_disk(struct mddev *mddev, struct md_rdev *rdev) if (rdev->saved_raid_disk >= 0 && rdev->saved_raid_disk >= first && conf->disks[rdev->saved_raid_disk].rdev == NULL) - disk = rdev->saved_raid_disk; - else - disk = first; - for ( ; disk <= last ; disk++) { + first = rdev->saved_raid_disk; + + for (disk = first; disk <= last; disk++) { p = conf->disks + disk; if (p->rdev == NULL) { clear_bit(In_sync, &rdev->flags); @@ -5477,8 +5500,11 @@ static int raid5_add_disk(struct mddev *mddev, struct md_rdev *rdev) if (rdev->saved_raid_disk != disk) conf->fullsync = 1; rcu_assign_pointer(p->rdev, rdev); - break; + goto out; } + } + for (disk = first; disk <= last; disk++) { + p = conf->disks + disk; if (test_bit(WantReplacement, &p->rdev->flags) && p->replacement == NULL) { clear_bit(In_sync, &rdev->flags); @@ -5490,6 +5516,7 @@ static int raid5_add_disk(struct mddev *mddev, struct md_rdev *rdev) break; } } +out: print_raid5_conf(conf); return err; } diff --git a/trunk/drivers/mmc/host/sdhci-tegra.c b/trunk/drivers/mmc/host/sdhci-tegra.c index 0810ccc23d7e..b38d8a78f6a0 100644 --- a/trunk/drivers/mmc/host/sdhci-tegra.c +++ b/trunk/drivers/mmc/host/sdhci-tegra.c @@ -223,7 +223,6 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata( { struct tegra_sdhci_platform_data *plat; struct device_node *np = pdev->dev.of_node; - u32 bus_width; if (!np) return NULL; @@ -237,9 +236,7 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata( plat->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0); plat->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0); plat->power_gpio = of_get_named_gpio(np, "power-gpios", 0); - - if (of_property_read_u32(np, "bus-width", &bus_width) == 0 && - bus_width == 8) + if (of_find_property(np, "support-8bit", NULL)) plat->is_8bit = 1; return plat; @@ -337,7 +334,7 @@ static int __devinit sdhci_tegra_probe(struct platform_device *pdev) rc = PTR_ERR(clk); goto err_clk_get; } - clk_prepare_enable(clk); + clk_enable(clk); pltfm_host->clk = clk; host->mmc->pm_caps = plat->pm_flags; @@ -352,7 +349,7 @@ static int __devinit sdhci_tegra_probe(struct platform_device *pdev) return 0; err_add_host: - clk_disable_unprepare(pltfm_host->clk); + clk_disable(pltfm_host->clk); clk_put(pltfm_host->clk); err_clk_get: if (gpio_is_valid(plat->wp_gpio)) @@ -393,7 +390,7 @@ static int __devexit sdhci_tegra_remove(struct platform_device *pdev) if (gpio_is_valid(plat->power_gpio)) gpio_free(plat->power_gpio); - clk_disable_unprepare(pltfm_host->clk); + clk_disable(pltfm_host->clk); clk_put(pltfm_host->clk); sdhci_pltfm_free(pdev); diff --git a/trunk/drivers/mtd/nand/cafe_nand.c b/trunk/drivers/mtd/nand/cafe_nand.c index 41371ba1a811..f3f6cfedd69e 100644 --- a/trunk/drivers/mtd/nand/cafe_nand.c +++ b/trunk/drivers/mtd/nand/cafe_nand.c @@ -102,7 +102,7 @@ static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL }; static int cafe_device_ready(struct mtd_info *mtd) { struct cafe_priv *cafe = mtd->priv; - int result = !!(cafe_readl(cafe, NAND_STATUS) | 0x40000000); + int result = !!(cafe_readl(cafe, NAND_STATUS) & 0x40000000); uint32_t irqs = cafe_readl(cafe, NAND_IRQ); cafe_writel(cafe, irqs, NAND_IRQ); diff --git a/trunk/drivers/mtd/nand/nand_base.c b/trunk/drivers/mtd/nand/nand_base.c index d47586cf64ce..a11253a0fcab 100644 --- a/trunk/drivers/mtd/nand/nand_base.c +++ b/trunk/drivers/mtd/nand/nand_base.c @@ -3501,6 +3501,13 @@ int nand_scan_tail(struct mtd_info *mtd) /* propagate ecc info to mtd_info */ mtd->ecclayout = chip->ecc.layout; mtd->ecc_strength = chip->ecc.strength; + /* + * Initialize bitflip_threshold to its default prior scan_bbt() call. + * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be + * properly set. + */ + if (!mtd->bitflip_threshold) + mtd->bitflip_threshold = mtd->ecc_strength; /* Check, if we should skip the bad block table scan */ if (chip->options & NAND_SKIP_BBTSCAN) diff --git a/trunk/drivers/net/ethernet/freescale/gianfar.c b/trunk/drivers/net/ethernet/freescale/gianfar.c index 0741aded9eb0..f2db8fca46a1 100644 --- a/trunk/drivers/net/ethernet/freescale/gianfar.c +++ b/trunk/drivers/net/ethernet/freescale/gianfar.c @@ -1804,18 +1804,16 @@ void gfar_configure_coalescing(struct gfar_private *priv, if (priv->mode == MQ_MG_MODE) { baddr = ®s->txic0; for_each_set_bit(i, &tx_mask, priv->num_tx_queues) { - if (likely(priv->tx_queue[i]->txcoalescing)) { - gfar_write(baddr + i, 0); + gfar_write(baddr + i, 0); + if (likely(priv->tx_queue[i]->txcoalescing)) gfar_write(baddr + i, priv->tx_queue[i]->txic); - } } baddr = ®s->rxic0; for_each_set_bit(i, &rx_mask, priv->num_rx_queues) { - if (likely(priv->rx_queue[i]->rxcoalescing)) { - gfar_write(baddr + i, 0); + gfar_write(baddr + i, 0); + if (likely(priv->rx_queue[i]->rxcoalescing)) gfar_write(baddr + i, priv->rx_queue[i]->rxic); - } } } } diff --git a/trunk/drivers/net/ethernet/intel/e1000e/defines.h b/trunk/drivers/net/ethernet/intel/e1000e/defines.h index 351a4097b2ba..76edbc1be33b 100644 --- a/trunk/drivers/net/ethernet/intel/e1000e/defines.h +++ b/trunk/drivers/net/ethernet/intel/e1000e/defines.h @@ -103,6 +103,7 @@ #define E1000_RXD_ERR_SEQ 0x04 /* Sequence Error */ #define E1000_RXD_ERR_CXE 0x10 /* Carrier Extension Error */ #define E1000_RXD_ERR_TCPE 0x20 /* TCP/UDP Checksum Error */ +#define E1000_RXD_ERR_IPE 0x40 /* IP Checksum Error */ #define E1000_RXD_ERR_RXE 0x80 /* Rx Data Error */ #define E1000_RXD_SPC_VLAN_MASK 0x0FFF /* VLAN ID is in lower 12 bits */ diff --git a/trunk/drivers/net/ethernet/intel/e1000e/netdev.c b/trunk/drivers/net/ethernet/intel/e1000e/netdev.c index 31d37a2b5ba8..623e30b9964d 100644 --- a/trunk/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/trunk/drivers/net/ethernet/intel/e1000e/netdev.c @@ -496,7 +496,7 @@ static void e1000_receive_skb(struct e1000_adapter *adapter, * @sk_buff: socket buffer with received data **/ static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, - __le16 csum, struct sk_buff *skb) + struct sk_buff *skb) { u16 status = (u16)status_err; u8 errors = (u8)(status_err >> 24); @@ -511,8 +511,8 @@ static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, if (status & E1000_RXD_STAT_IXSM) return; - /* TCP/UDP checksum error bit is set */ - if (errors & E1000_RXD_ERR_TCPE) { + /* TCP/UDP checksum error bit or IP checksum error bit is set */ + if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) { /* let the stack verify checksum errors */ adapter->hw_csum_err++; return; @@ -523,19 +523,7 @@ static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, return; /* It must be a TCP or UDP packet with a valid checksum */ - if (status & E1000_RXD_STAT_TCPCS) { - /* TCP checksum is good */ - skb->ip_summed = CHECKSUM_UNNECESSARY; - } else { - /* - * IP fragment with UDP payload - * Hardware complements the payload checksum, so we undo it - * and then put the value in host order for further stack use. - */ - __sum16 sum = (__force __sum16)swab16((__force u16)csum); - skb->csum = csum_unfold(~sum); - skb->ip_summed = CHECKSUM_COMPLETE; - } + skb->ip_summed = CHECKSUM_UNNECESSARY; adapter->hw_csum_good++; } @@ -954,8 +942,7 @@ static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done, skb_put(skb, length); /* Receive Checksum Offload */ - e1000_rx_checksum(adapter, staterr, - rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); + e1000_rx_checksum(adapter, staterr, skb); e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); @@ -1341,8 +1328,7 @@ static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done, total_rx_bytes += skb->len; total_rx_packets++; - e1000_rx_checksum(adapter, staterr, - rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); + e1000_rx_checksum(adapter, staterr, skb); e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); @@ -1512,9 +1498,8 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done, } } - /* Receive Checksum Offload XXX recompute due to CRC strip? */ - e1000_rx_checksum(adapter, staterr, - rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); + /* Receive Checksum Offload */ + e1000_rx_checksum(adapter, staterr, skb); e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); @@ -3098,19 +3083,10 @@ static void e1000_configure_rx(struct e1000_adapter *adapter) /* Enable Receive Checksum Offload for TCP and UDP */ rxcsum = er32(RXCSUM); - if (adapter->netdev->features & NETIF_F_RXCSUM) { + if (adapter->netdev->features & NETIF_F_RXCSUM) rxcsum |= E1000_RXCSUM_TUOFL; - - /* - * IPv4 payload checksum for UDP fragments must be - * used in conjunction with packet-split. - */ - if (adapter->rx_ps_pages) - rxcsum |= E1000_RXCSUM_IPPCSE; - } else { + else rxcsum &= ~E1000_RXCSUM_TUOFL; - /* no need to clear IPPCSE as it defaults to 0 */ - } ew32(RXCSUM, rxcsum); if (adapter->hw.mac.type == e1000_pch2lan) { @@ -5241,22 +5217,10 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu) int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; /* Jumbo frame support */ - if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) { - if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { - e_err("Jumbo Frames not supported.\n"); - return -EINVAL; - } - - /* - * IP payload checksum (enabled with jumbos/packet-split when - * Rx checksum is enabled) and generation of RSS hash is - * mutually exclusive in the hardware. - */ - if ((netdev->features & NETIF_F_RXCSUM) && - (netdev->features & NETIF_F_RXHASH)) { - e_err("Jumbo frames cannot be enabled when both receive checksum offload and receive hashing are enabled. Disable one of the receive offload features before enabling jumbos.\n"); - return -EINVAL; - } + if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && + !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { + e_err("Jumbo Frames not supported.\n"); + return -EINVAL; } /* Supported frame sizes */ @@ -6030,17 +5994,6 @@ static int e1000_set_features(struct net_device *netdev, NETIF_F_RXALL))) return 0; - /* - * IP payload checksum (enabled with jumbos/packet-split when Rx - * checksum is enabled) and generation of RSS hash is mutually - * exclusive in the hardware. - */ - if (adapter->rx_ps_pages && - (features & NETIF_F_RXCSUM) && (features & NETIF_F_RXHASH)) { - e_err("Enabling both receive checksum offload and receive hashing is not possible with jumbo frames. Disable jumbos or enable only one of the receive offload features.\n"); - return -EINVAL; - } - if (changed & NETIF_F_RXFCS) { if (features & NETIF_F_RXFCS) { adapter->flags2 &= ~FLAG2_CRC_STRIPPING; diff --git a/trunk/drivers/net/ethernet/intel/igbvf/ethtool.c b/trunk/drivers/net/ethernet/intel/igbvf/ethtool.c index 8ce67064b9c5..90eef07943f4 100644 --- a/trunk/drivers/net/ethernet/intel/igbvf/ethtool.c +++ b/trunk/drivers/net/ethernet/intel/igbvf/ethtool.c @@ -357,21 +357,28 @@ static int igbvf_set_coalesce(struct net_device *netdev, struct igbvf_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; - if ((ec->rx_coalesce_usecs > IGBVF_MAX_ITR_USECS) || - ((ec->rx_coalesce_usecs > 3) && - (ec->rx_coalesce_usecs < IGBVF_MIN_ITR_USECS)) || - (ec->rx_coalesce_usecs == 2)) - return -EINVAL; - - /* convert to rate of irq's per second */ - if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3) { + if ((ec->rx_coalesce_usecs >= IGBVF_MIN_ITR_USECS) && + (ec->rx_coalesce_usecs <= IGBVF_MAX_ITR_USECS)) { + adapter->current_itr = ec->rx_coalesce_usecs << 2; + adapter->requested_itr = 1000000000 / + (adapter->current_itr * 256); + } else if ((ec->rx_coalesce_usecs == 3) || + (ec->rx_coalesce_usecs == 2)) { adapter->current_itr = IGBVF_START_ITR; adapter->requested_itr = ec->rx_coalesce_usecs; - } else { - adapter->current_itr = ec->rx_coalesce_usecs << 2; + } else if (ec->rx_coalesce_usecs == 0) { + /* + * The user's desire is to turn off interrupt throttling + * altogether, but due to HW limitations, we can't do that. + * Instead we set a very small value in EITR, which would + * allow ~967k interrupts per second, but allow the adapter's + * internal clocking to still function properly. + */ + adapter->current_itr = 4; adapter->requested_itr = 1000000000 / (adapter->current_itr * 256); - } + } else + return -EINVAL; writel(adapter->current_itr, hw->hw_addr + adapter->rx_ring->itr_register); diff --git a/trunk/drivers/net/ethernet/ti/davinci_cpdma.c b/trunk/drivers/net/ethernet/ti/davinci_cpdma.c index d614c374ed9d..3b5c4571b55e 100644 --- a/trunk/drivers/net/ethernet/ti/davinci_cpdma.c +++ b/trunk/drivers/net/ethernet/ti/davinci_cpdma.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/trunk/drivers/net/usb/qmi_wwan.c b/trunk/drivers/net/usb/qmi_wwan.c index 3767a1225860..b01960fcfbc9 100644 --- a/trunk/drivers/net/usb/qmi_wwan.c +++ b/trunk/drivers/net/usb/qmi_wwan.c @@ -197,6 +197,10 @@ static int qmi_wwan_manage_power(struct usbnet *dev, int on) static int qmi_wwan_cdc_wdm_manage_power(struct usb_interface *intf, int on) { struct usbnet *dev = usb_get_intfdata(intf); + + /* can be called while disconnecting */ + if (!dev) + return 0; return qmi_wwan_manage_power(dev, on); } diff --git a/trunk/drivers/net/wireless/ath/ath.h b/trunk/drivers/net/wireless/ath/ath.h index c54b7d37bff1..420d69b2674c 100644 --- a/trunk/drivers/net/wireless/ath/ath.h +++ b/trunk/drivers/net/wireless/ath/ath.h @@ -143,6 +143,7 @@ struct ath_common { u32 keymax; DECLARE_BITMAP(keymap, ATH_KEYMAX); DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX); + DECLARE_BITMAP(ccmp_keymap, ATH_KEYMAX); enum ath_crypt_caps crypt_caps; unsigned int clockrate; diff --git a/trunk/drivers/net/wireless/ath/ath9k/hw.c b/trunk/drivers/net/wireless/ath/ath9k/hw.c index 1c68e564f503..995ca8e1302e 100644 --- a/trunk/drivers/net/wireless/ath/ath9k/hw.c +++ b/trunk/drivers/net/wireless/ath/ath9k/hw.c @@ -622,7 +622,7 @@ static int __ath9k_hw_init(struct ath_hw *ah) if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_AUTO) { if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI || - ((AR_SREV_9160(ah) || AR_SREV_9280(ah)) && + ((AR_SREV_9160(ah) || AR_SREV_9280(ah) || AR_SREV_9287(ah)) && !ah->is_pciexpress)) { ah->config.serialize_regmode = SER_REG_MODE_ON; diff --git a/trunk/drivers/net/wireless/ath/ath9k/recv.c b/trunk/drivers/net/wireless/ath/ath9k/recv.c index e1fcc68124dc..0735aeb3b26c 100644 --- a/trunk/drivers/net/wireless/ath/ath9k/recv.c +++ b/trunk/drivers/net/wireless/ath/ath9k/recv.c @@ -695,9 +695,9 @@ static bool ath_edma_get_buffers(struct ath_softc *sc, __skb_unlink(skb, &rx_edma->rx_fifo); list_add_tail(&bf->list, &sc->rx.rxbuf); ath_rx_edma_buf_link(sc, qtype); - } else { - bf = NULL; } + + bf = NULL; } *dest = bf; @@ -822,7 +822,8 @@ static bool ath9k_rx_accept(struct ath_common *common, * descriptor does contain a valid key index. This has been observed * mostly with CCMP encryption. */ - if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID) + if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID || + !test_bit(rx_stats->rs_keyix, common->ccmp_keymap)) rx_stats->rs_status &= ~ATH9K_RXERR_KEYMISS; if (!rx_stats->rs_datalen) { diff --git a/trunk/drivers/net/wireless/ath/key.c b/trunk/drivers/net/wireless/ath/key.c index 0e81904956cf..5c54aa43ca2d 100644 --- a/trunk/drivers/net/wireless/ath/key.c +++ b/trunk/drivers/net/wireless/ath/key.c @@ -556,6 +556,9 @@ int ath_key_config(struct ath_common *common, return -EIO; set_bit(idx, common->keymap); + if (key->cipher == WLAN_CIPHER_SUITE_CCMP) + set_bit(idx, common->ccmp_keymap); + if (key->cipher == WLAN_CIPHER_SUITE_TKIP) { set_bit(idx + 64, common->keymap); set_bit(idx, common->tkip_keymap); @@ -582,6 +585,7 @@ void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key) return; clear_bit(key->hw_key_idx, common->keymap); + clear_bit(key->hw_key_idx, common->ccmp_keymap); if (key->cipher != WLAN_CIPHER_SUITE_TKIP) return; diff --git a/trunk/drivers/net/wireless/iwlwifi/iwl-mac80211.c b/trunk/drivers/net/wireless/iwlwifi/iwl-mac80211.c index 3ee23134c02b..013680332f07 100644 --- a/trunk/drivers/net/wireless/iwlwifi/iwl-mac80211.c +++ b/trunk/drivers/net/wireless/iwlwifi/iwl-mac80211.c @@ -796,6 +796,18 @@ int iwlagn_mac_sta_state(struct ieee80211_hw *hw, switch (op) { case ADD: ret = iwlagn_mac_sta_add(hw, vif, sta); + if (ret) + break; + /* + * Clear the in-progress flag, the AP station entry was added + * but we'll initialize LQ only when we've associated (which + * would also clear the in-progress flag). This is necessary + * in case we never initialize LQ because association fails. + */ + spin_lock_bh(&priv->sta_lock); + priv->stations[iwl_sta_id(sta)].used &= + ~IWL_STA_UCODE_INPROGRESS; + spin_unlock_bh(&priv->sta_lock); break; case REMOVE: ret = iwlagn_mac_sta_remove(hw, vif, sta); diff --git a/trunk/drivers/net/wireless/mwifiex/11n_rxreorder.c b/trunk/drivers/net/wireless/mwifiex/11n_rxreorder.c index 9c44088054dd..900ee129e825 100644 --- a/trunk/drivers/net/wireless/mwifiex/11n_rxreorder.c +++ b/trunk/drivers/net/wireless/mwifiex/11n_rxreorder.c @@ -256,7 +256,8 @@ mwifiex_11n_create_rx_reorder_tbl(struct mwifiex_private *priv, u8 *ta, else last_seq = priv->rx_seq[tid]; - if (last_seq >= new_node->start_win) + if (last_seq != MWIFIEX_DEF_11N_RX_SEQ_NUM && + last_seq >= new_node->start_win) new_node->start_win = last_seq + 1; new_node->win_size = win_size; @@ -596,5 +597,5 @@ void mwifiex_11n_cleanup_reorder_tbl(struct mwifiex_private *priv) spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags); INIT_LIST_HEAD(&priv->rx_reorder_tbl_ptr); - memset(priv->rx_seq, 0, sizeof(priv->rx_seq)); + mwifiex_reset_11n_rx_seq_num(priv); } diff --git a/trunk/drivers/net/wireless/mwifiex/11n_rxreorder.h b/trunk/drivers/net/wireless/mwifiex/11n_rxreorder.h index f1bffebabc60..6c9815a0f5d8 100644 --- a/trunk/drivers/net/wireless/mwifiex/11n_rxreorder.h +++ b/trunk/drivers/net/wireless/mwifiex/11n_rxreorder.h @@ -37,6 +37,13 @@ #define ADDBA_RSP_STATUS_ACCEPT 0 +#define MWIFIEX_DEF_11N_RX_SEQ_NUM 0xffff + +static inline void mwifiex_reset_11n_rx_seq_num(struct mwifiex_private *priv) +{ + memset(priv->rx_seq, 0xff, sizeof(priv->rx_seq)); +} + int mwifiex_11n_rx_reorder_pkt(struct mwifiex_private *, u16 seqNum, u16 tid, u8 *ta, diff --git a/trunk/drivers/net/wireless/mwifiex/ie.c b/trunk/drivers/net/wireless/mwifiex/ie.c index ceb82cd749cc..383820a52beb 100644 --- a/trunk/drivers/net/wireless/mwifiex/ie.c +++ b/trunk/drivers/net/wireless/mwifiex/ie.c @@ -213,6 +213,7 @@ mwifiex_update_uap_custom_ie(struct mwifiex_private *priv, /* save assoc resp ie index after auto-indexing */ *assoc_idx = *((u16 *)pos); + kfree(ap_custom_ie); return ret; } diff --git a/trunk/drivers/net/wireless/mwifiex/sdio.c b/trunk/drivers/net/wireless/mwifiex/sdio.c index e0377473282f..fc8a9bfa1248 100644 --- a/trunk/drivers/net/wireless/mwifiex/sdio.c +++ b/trunk/drivers/net/wireless/mwifiex/sdio.c @@ -978,10 +978,10 @@ static int mwifiex_decode_rx_packet(struct mwifiex_adapter *adapter, dev_dbg(adapter->dev, "info: --- Rx: Event ---\n"); adapter->event_cause = *(u32 *) skb->data; - skb_pull(skb, MWIFIEX_EVENT_HEADER_LEN); - if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE)) - memcpy(adapter->event_body, skb->data, skb->len); + memcpy(adapter->event_body, + skb->data + MWIFIEX_EVENT_HEADER_LEN, + skb->len); /* event cause has been saved to adapter->event_cause */ adapter->event_received = true; diff --git a/trunk/drivers/net/wireless/mwifiex/sta_event.c b/trunk/drivers/net/wireless/mwifiex/sta_event.c index 4ace5a3dcd23..11e731f3581c 100644 --- a/trunk/drivers/net/wireless/mwifiex/sta_event.c +++ b/trunk/drivers/net/wireless/mwifiex/sta_event.c @@ -406,9 +406,9 @@ int mwifiex_process_sta_event(struct mwifiex_private *priv) break; case EVENT_UAP_STA_ASSOC: - skb_pull(adapter->event_skb, MWIFIEX_UAP_EVENT_EXTRA_HEADER); memset(&sinfo, 0, sizeof(sinfo)); - event = (struct mwifiex_assoc_event *)adapter->event_skb->data; + event = (struct mwifiex_assoc_event *) + (adapter->event_body + MWIFIEX_UAP_EVENT_EXTRA_HEADER); if (le16_to_cpu(event->type) == TLV_TYPE_UAP_MGMT_FRAME) { len = -1; @@ -433,9 +433,8 @@ int mwifiex_process_sta_event(struct mwifiex_private *priv) GFP_KERNEL); break; case EVENT_UAP_STA_DEAUTH: - skb_pull(adapter->event_skb, MWIFIEX_UAP_EVENT_EXTRA_HEADER); - cfg80211_del_sta(priv->netdev, adapter->event_skb->data, - GFP_KERNEL); + cfg80211_del_sta(priv->netdev, adapter->event_body + + MWIFIEX_UAP_EVENT_EXTRA_HEADER, GFP_KERNEL); break; case EVENT_UAP_BSS_IDLE: priv->media_connected = false; diff --git a/trunk/drivers/net/wireless/mwifiex/usb.c b/trunk/drivers/net/wireless/mwifiex/usb.c index 49ebf20c56eb..22a5916564b8 100644 --- a/trunk/drivers/net/wireless/mwifiex/usb.c +++ b/trunk/drivers/net/wireless/mwifiex/usb.c @@ -49,6 +49,7 @@ static int mwifiex_usb_recv(struct mwifiex_adapter *adapter, struct device *dev = adapter->dev; u32 recv_type; __le32 tmp; + int ret; if (adapter->hs_activated) mwifiex_process_hs_config(adapter); @@ -69,16 +70,19 @@ static int mwifiex_usb_recv(struct mwifiex_adapter *adapter, case MWIFIEX_USB_TYPE_CMD: if (skb->len > MWIFIEX_SIZE_OF_CMD_BUFFER) { dev_err(dev, "CMD: skb->len too large\n"); - return -1; + ret = -1; + goto exit_restore_skb; } else if (!adapter->curr_cmd) { dev_dbg(dev, "CMD: no curr_cmd\n"); if (adapter->ps_state == PS_STATE_SLEEP_CFM) { mwifiex_process_sleep_confirm_resp( adapter, skb->data, skb->len); - return 0; + ret = 0; + goto exit_restore_skb; } - return -1; + ret = -1; + goto exit_restore_skb; } adapter->curr_cmd->resp_skb = skb; @@ -87,20 +91,22 @@ static int mwifiex_usb_recv(struct mwifiex_adapter *adapter, case MWIFIEX_USB_TYPE_EVENT: if (skb->len < sizeof(u32)) { dev_err(dev, "EVENT: skb->len too small\n"); - return -1; + ret = -1; + goto exit_restore_skb; } skb_copy_from_linear_data(skb, &tmp, sizeof(u32)); adapter->event_cause = le32_to_cpu(tmp); - skb_pull(skb, sizeof(u32)); dev_dbg(dev, "event_cause %#x\n", adapter->event_cause); if (skb->len > MAX_EVENT_SIZE) { dev_err(dev, "EVENT: event body too large\n"); - return -1; + ret = -1; + goto exit_restore_skb; } - skb_copy_from_linear_data(skb, adapter->event_body, - skb->len); + memcpy(adapter->event_body, skb->data + + MWIFIEX_EVENT_HEADER_LEN, skb->len); + adapter->event_received = true; adapter->event_skb = skb; break; @@ -124,6 +130,12 @@ static int mwifiex_usb_recv(struct mwifiex_adapter *adapter, } return -EINPROGRESS; + +exit_restore_skb: + /* The buffer will be reused for further cmds/events */ + skb_push(skb, INTF_HEADER_LEN); + + return ret; } static void mwifiex_usb_rx_complete(struct urb *urb) diff --git a/trunk/drivers/net/wireless/mwifiex/wmm.c b/trunk/drivers/net/wireless/mwifiex/wmm.c index f3fc65515857..3fa4d4176993 100644 --- a/trunk/drivers/net/wireless/mwifiex/wmm.c +++ b/trunk/drivers/net/wireless/mwifiex/wmm.c @@ -404,6 +404,8 @@ mwifiex_wmm_init(struct mwifiex_adapter *adapter) priv->add_ba_param.tx_win_size = MWIFIEX_AMPDU_DEF_TXWINSIZE; priv->add_ba_param.rx_win_size = MWIFIEX_AMPDU_DEF_RXWINSIZE; + mwifiex_reset_11n_rx_seq_num(priv); + atomic_set(&priv->wmm.tx_pkts_queued, 0); atomic_set(&priv->wmm.highest_queued_prio, HIGH_PRIO_TID); } @@ -1221,6 +1223,7 @@ mwifiex_dequeue_tx_packet(struct mwifiex_adapter *adapter) if (!ptr->is_11n_enabled || mwifiex_is_ba_stream_setup(priv, ptr, tid) || + priv->wps.session_enable || ((priv->sec_info.wpa_enabled || priv->sec_info.wpa2_enabled) && !priv->wpa_is_gtk_set)) { diff --git a/trunk/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c b/trunk/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c index d228358e6a40..9970c2b1b199 100644 --- a/trunk/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c +++ b/trunk/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c @@ -301,9 +301,11 @@ static struct usb_device_id rtl8192c_usb_ids[] = { {RTL_USB_DEVICE(0x07b8, 0x8188, rtl92cu_hal_cfg)}, /*Abocom - Abocom*/ {RTL_USB_DEVICE(0x07b8, 0x8189, rtl92cu_hal_cfg)}, /*Funai - Abocom*/ {RTL_USB_DEVICE(0x0846, 0x9041, rtl92cu_hal_cfg)}, /*NetGear WNA1000M*/ + {RTL_USB_DEVICE(0x0bda, 0x5088, rtl92cu_hal_cfg)}, /*Thinkware-CC&C*/ {RTL_USB_DEVICE(0x0df6, 0x0052, rtl92cu_hal_cfg)}, /*Sitecom - Edimax*/ {RTL_USB_DEVICE(0x0df6, 0x005c, rtl92cu_hal_cfg)}, /*Sitecom - Edimax*/ {RTL_USB_DEVICE(0x0eb0, 0x9071, rtl92cu_hal_cfg)}, /*NO Brand - Etop*/ + {RTL_USB_DEVICE(0x4856, 0x0091, rtl92cu_hal_cfg)}, /*NetweeN - Feixun*/ /* HP - Lite-On ,8188CUS Slim Combo */ {RTL_USB_DEVICE(0x103c, 0x1629, rtl92cu_hal_cfg)}, {RTL_USB_DEVICE(0x13d3, 0x3357, rtl92cu_hal_cfg)}, /* AzureWave */ @@ -346,6 +348,7 @@ static struct usb_device_id rtl8192c_usb_ids[] = { {RTL_USB_DEVICE(0x07b8, 0x8178, rtl92cu_hal_cfg)}, /*Funai -Abocom*/ {RTL_USB_DEVICE(0x0846, 0x9021, rtl92cu_hal_cfg)}, /*Netgear-Sercomm*/ {RTL_USB_DEVICE(0x0b05, 0x17ab, rtl92cu_hal_cfg)}, /*ASUS-Edimax*/ + {RTL_USB_DEVICE(0x0bda, 0x8186, rtl92cu_hal_cfg)}, /*Realtek 92CE-VAU*/ {RTL_USB_DEVICE(0x0df6, 0x0061, rtl92cu_hal_cfg)}, /*Sitecom-Edimax*/ {RTL_USB_DEVICE(0x0e66, 0x0019, rtl92cu_hal_cfg)}, /*Hawking-Edimax*/ {RTL_USB_DEVICE(0x2001, 0x3307, rtl92cu_hal_cfg)}, /*D-Link-Cameo*/ diff --git a/trunk/drivers/net/wireless/ti/wlcore/Kconfig b/trunk/drivers/net/wireless/ti/wlcore/Kconfig index 54156b0b5c2d..d7b907e67170 100644 --- a/trunk/drivers/net/wireless/ti/wlcore/Kconfig +++ b/trunk/drivers/net/wireless/ti/wlcore/Kconfig @@ -1,7 +1,6 @@ config WLCORE tristate "TI wlcore support" depends on WL_TI && GENERIC_HARDIRQS && MAC80211 - depends on INET select FW_LOADER ---help--- This module contains the main code for TI WLAN chips. It abstracts diff --git a/trunk/drivers/of/base.c b/trunk/drivers/of/base.c index d9bfd49b1935..eada3f4ef801 100644 --- a/trunk/drivers/of/base.c +++ b/trunk/drivers/of/base.c @@ -511,6 +511,22 @@ struct device_node *of_find_node_with_property(struct device_node *from, } EXPORT_SYMBOL(of_find_node_with_property); +static const struct of_device_id *of_match_compat(const struct of_device_id *matches, + const char *compat) +{ + while (matches->name[0] || matches->type[0] || matches->compatible[0]) { + const char *cp = matches->compatible; + int len = strlen(cp); + + if (len > 0 && of_compat_cmp(compat, cp, len) == 0) + return matches; + + matches++; + } + + return NULL; +} + /** * of_match_node - Tell if an device_node has a matching of_match structure * @matches: array of of device match structures to search in @@ -521,9 +537,18 @@ EXPORT_SYMBOL(of_find_node_with_property); const struct of_device_id *of_match_node(const struct of_device_id *matches, const struct device_node *node) { + struct property *prop; + const char *cp; + if (!matches) return NULL; + of_property_for_each_string(node, "compatible", prop, cp) { + const struct of_device_id *match = of_match_compat(matches, cp); + if (match) + return match; + } + while (matches->name[0] || matches->type[0] || matches->compatible[0]) { int match = 1; if (matches->name[0]) @@ -532,10 +557,7 @@ const struct of_device_id *of_match_node(const struct of_device_id *matches, if (matches->type[0]) match &= node->type && !strcmp(matches->type, node->type); - if (matches->compatible[0]) - match &= of_device_is_compatible(node, - matches->compatible); - if (match) + if (match && !matches->compatible[0]) return matches; matches++; } diff --git a/trunk/drivers/of/platform.c b/trunk/drivers/of/platform.c index 343ad29e211c..3132ea068d95 100644 --- a/trunk/drivers/of/platform.c +++ b/trunk/drivers/of/platform.c @@ -462,4 +462,5 @@ int of_platform_populate(struct device_node *root, of_node_put(root); return rc; } +EXPORT_SYMBOL_GPL(of_platform_populate); #endif /* CONFIG_OF_ADDRESS */ diff --git a/trunk/drivers/scsi/qla2xxx/qla_target.c b/trunk/drivers/scsi/qla2xxx/qla_target.c index 6986552b47e6..77759c78cc21 100644 --- a/trunk/drivers/scsi/qla2xxx/qla_target.c +++ b/trunk/drivers/scsi/qla2xxx/qla_target.c @@ -3960,7 +3960,7 @@ void qlt_async_event(uint16_t code, struct scsi_qla_host *vha, { struct qla_hw_data *ha = vha->hw; struct qla_tgt *tgt = ha->tgt.qla_tgt; - int reason_code; + int login_code; ql_dbg(ql_dbg_tgt, vha, 0xe039, "scsi(%ld): ha state %d init_done %d oper_mode %d topo %d\n", @@ -4003,9 +4003,9 @@ void qlt_async_event(uint16_t code, struct scsi_qla_host *vha, { ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03b, "qla_target(%d): Async LOOP_UP occured " - "(m[1]=%x, m[2]=%x, m[3]=%x, m[4]=%x)", vha->vp_idx, - le16_to_cpu(mailbox[1]), le16_to_cpu(mailbox[2]), - le16_to_cpu(mailbox[3]), le16_to_cpu(mailbox[4])); + "(m[0]=%x, m[1]=%x, m[2]=%x, m[3]=%x)", vha->vp_idx, + le16_to_cpu(mailbox[0]), le16_to_cpu(mailbox[1]), + le16_to_cpu(mailbox[2]), le16_to_cpu(mailbox[3])); if (tgt->link_reinit_iocb_pending) { qlt_send_notify_ack(vha, (void *)&tgt->link_reinit_iocb, 0, 0, 0, 0, 0, 0); @@ -4020,23 +4020,24 @@ void qlt_async_event(uint16_t code, struct scsi_qla_host *vha, case MBA_RSCN_UPDATE: ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03c, "qla_target(%d): Async event %#x occured " - "(m[1]=%x, m[2]=%x, m[3]=%x, m[4]=%x)", vha->vp_idx, code, - le16_to_cpu(mailbox[1]), le16_to_cpu(mailbox[2]), - le16_to_cpu(mailbox[3]), le16_to_cpu(mailbox[4])); + "(m[0]=%x, m[1]=%x, m[2]=%x, m[3]=%x)", vha->vp_idx, code, + le16_to_cpu(mailbox[0]), le16_to_cpu(mailbox[1]), + le16_to_cpu(mailbox[2]), le16_to_cpu(mailbox[3])); break; case MBA_PORT_UPDATE: ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03d, "qla_target(%d): Port update async event %#x " - "occured: updating the ports database (m[1]=%x, m[2]=%x, " - "m[3]=%x, m[4]=%x)", vha->vp_idx, code, - le16_to_cpu(mailbox[1]), le16_to_cpu(mailbox[2]), - le16_to_cpu(mailbox[3]), le16_to_cpu(mailbox[4])); - reason_code = le16_to_cpu(mailbox[2]); - if (reason_code == 0x4) + "occured: updating the ports database (m[0]=%x, m[1]=%x, " + "m[2]=%x, m[3]=%x)", vha->vp_idx, code, + le16_to_cpu(mailbox[0]), le16_to_cpu(mailbox[1]), + le16_to_cpu(mailbox[2]), le16_to_cpu(mailbox[3])); + + login_code = le16_to_cpu(mailbox[2]); + if (login_code == 0x4) ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03e, "Async MB 2: Got PLOGI Complete\n"); - else if (reason_code == 0x7) + else if (login_code == 0x7) ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03f, "Async MB 2: Port Logged Out\n"); break; @@ -4044,9 +4045,9 @@ void qlt_async_event(uint16_t code, struct scsi_qla_host *vha, default: ql_dbg(ql_dbg_tgt_mgt, vha, 0xf040, "qla_target(%d): Async event %#x occured: " - "ignore (m[1]=%x, m[2]=%x, m[3]=%x, m[4]=%x)", vha->vp_idx, - code, le16_to_cpu(mailbox[1]), le16_to_cpu(mailbox[2]), - le16_to_cpu(mailbox[3]), le16_to_cpu(mailbox[4])); + "ignore (m[0]=%x, m[1]=%x, m[2]=%x, m[3]=%x)", vha->vp_idx, + code, le16_to_cpu(mailbox[0]), le16_to_cpu(mailbox[1]), + le16_to_cpu(mailbox[2]), le16_to_cpu(mailbox[3])); break; } diff --git a/trunk/drivers/spi/spi-tegra.c b/trunk/drivers/spi/spi-tegra.c index 7f99ff3553a6..ae6d78a3e912 100644 --- a/trunk/drivers/spi/spi-tegra.c +++ b/trunk/drivers/spi/spi-tegra.c @@ -261,7 +261,7 @@ static void spi_tegra_start_transfer(struct spi_device *spi, clk_set_rate(tspi->clk, speed); if (tspi->cur_speed == 0) - clk_prepare_enable(tspi->clk); + clk_enable(tspi->clk); tspi->cur_speed = speed; @@ -373,7 +373,7 @@ static void tegra_spi_rx_dma_complete(struct tegra_dma_req *req) spi = m->state; spi_tegra_start_message(spi, m); } else { - clk_disable_unprepare(tspi->clk); + clk_disable(tspi->clk); tspi->cur_speed = 0; } } diff --git a/trunk/drivers/staging/nvec/nvec.c b/trunk/drivers/staging/nvec/nvec.c index 9356886f489b..3c60088871e0 100644 --- a/trunk/drivers/staging/nvec/nvec.c +++ b/trunk/drivers/staging/nvec/nvec.c @@ -675,7 +675,7 @@ static void tegra_init_i2c_slave(struct nvec_chip *nvec) { u32 val; - clk_prepare_enable(nvec->i2c_clk); + clk_enable(nvec->i2c_clk); tegra_periph_reset_assert(nvec->i2c_clk); udelay(2); @@ -695,14 +695,14 @@ static void tegra_init_i2c_slave(struct nvec_chip *nvec) enable_irq(nvec->irq); - clk_disable_unprepare(nvec->i2c_clk); + clk_disable(nvec->i2c_clk); } static void nvec_disable_i2c_slave(struct nvec_chip *nvec) { disable_irq(nvec->irq); writel(I2C_SL_NEWSL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG); - clk_disable_unprepare(nvec->i2c_clk); + clk_disable(nvec->i2c_clk); } static void nvec_power_off(void) @@ -812,7 +812,7 @@ static int __devinit tegra_nvec_probe(struct platform_device *pdev) tegra_init_i2c_slave(nvec); - clk_prepare_enable(i2c_clk); + clk_enable(i2c_clk); /* enable event reporting */ diff --git a/trunk/drivers/target/tcm_fc/tfc_sess.c b/trunk/drivers/target/tcm_fc/tfc_sess.c index cb99da920068..87901fa74dd7 100644 --- a/trunk/drivers/target/tcm_fc/tfc_sess.c +++ b/trunk/drivers/target/tcm_fc/tfc_sess.c @@ -58,7 +58,8 @@ static struct ft_tport *ft_tport_create(struct fc_lport *lport) struct ft_tport *tport; int i; - tport = rcu_dereference(lport->prov[FC_TYPE_FCP]); + tport = rcu_dereference_protected(lport->prov[FC_TYPE_FCP], + lockdep_is_held(&ft_lport_lock)); if (tport && tport->tpg) return tport; diff --git a/trunk/drivers/usb/gadget/Kconfig b/trunk/drivers/usb/gadget/Kconfig index 271ca161d7ef..bddc8fd9a7be 100644 --- a/trunk/drivers/usb/gadget/Kconfig +++ b/trunk/drivers/usb/gadget/Kconfig @@ -185,7 +185,7 @@ config USB_FUSB300 config USB_OMAP tristate "OMAP USB Device Controller" - depends on ARCH_OMAP1 + depends on ARCH_OMAP select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_H4_OTG select USB_OTG_UTILS if ARCH_OMAP help diff --git a/trunk/drivers/usb/gadget/omap_udc.c b/trunk/drivers/usb/gadget/omap_udc.c index 89cbd2b22ab0..a460e8c204f4 100644 --- a/trunk/drivers/usb/gadget/omap_udc.c +++ b/trunk/drivers/usb/gadget/omap_udc.c @@ -44,8 +44,7 @@ #include #include - -#include +#include #include "omap_udc.h" diff --git a/trunk/drivers/usb/host/Kconfig b/trunk/drivers/usb/host/Kconfig index dcfaaa91a3fb..83e58df29fe3 100644 --- a/trunk/drivers/usb/host/Kconfig +++ b/trunk/drivers/usb/host/Kconfig @@ -308,7 +308,7 @@ config USB_OHCI_HCD config USB_OHCI_HCD_OMAP1 bool "OHCI support for OMAP1/2 chips" - depends on USB_OHCI_HCD && ARCH_OMAP1 + depends on USB_OHCI_HCD && (ARCH_OMAP1 || ARCH_OMAP2) default y ---help--- Enables support for the OHCI controller on OMAP1/2 chips. diff --git a/trunk/drivers/usb/host/ehci-tegra.c b/trunk/drivers/usb/host/ehci-tegra.c index ab8a3bf628e3..68548236ec42 100644 --- a/trunk/drivers/usb/host/ehci-tegra.c +++ b/trunk/drivers/usb/host/ehci-tegra.c @@ -46,8 +46,8 @@ static void tegra_ehci_power_up(struct usb_hcd *hcd) { struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); - clk_prepare_enable(tegra->emc_clk); - clk_prepare_enable(tegra->clk); + clk_enable(tegra->emc_clk); + clk_enable(tegra->clk); tegra_usb_phy_power_on(tegra->phy); tegra->host_resumed = 1; } @@ -58,8 +58,8 @@ static void tegra_ehci_power_down(struct usb_hcd *hcd) tegra->host_resumed = 0; tegra_usb_phy_power_off(tegra->phy); - clk_disable_unprepare(tegra->clk); - clk_disable_unprepare(tegra->emc_clk); + clk_disable(tegra->clk); + clk_disable(tegra->emc_clk); } static int tegra_ehci_internal_port_reset( @@ -671,7 +671,7 @@ static int tegra_ehci_probe(struct platform_device *pdev) goto fail_clk; } - err = clk_prepare_enable(tegra->clk); + err = clk_enable(tegra->clk); if (err) goto fail_clken; @@ -682,7 +682,7 @@ static int tegra_ehci_probe(struct platform_device *pdev) goto fail_emc_clk; } - clk_prepare_enable(tegra->emc_clk); + clk_enable(tegra->emc_clk); clk_set_rate(tegra->emc_clk, 400000000); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -782,10 +782,10 @@ static int tegra_ehci_probe(struct platform_device *pdev) fail_phy: iounmap(hcd->regs); fail_io: - clk_disable_unprepare(tegra->emc_clk); + clk_disable(tegra->emc_clk); clk_put(tegra->emc_clk); fail_emc_clk: - clk_disable_unprepare(tegra->clk); + clk_disable(tegra->clk); fail_clken: clk_put(tegra->clk); fail_clk: @@ -820,10 +820,10 @@ static int tegra_ehci_remove(struct platform_device *pdev) tegra_usb_phy_close(tegra->phy); iounmap(hcd->regs); - clk_disable_unprepare(tegra->clk); + clk_disable(tegra->clk); clk_put(tegra->clk); - clk_disable_unprepare(tegra->emc_clk); + clk_disable(tegra->emc_clk); clk_put(tegra->emc_clk); kfree(tegra); diff --git a/trunk/drivers/usb/host/ohci-omap.c b/trunk/drivers/usb/host/ohci-omap.c index b02c344e2cc9..9ce35d0d9d5d 100644 --- a/trunk/drivers/usb/host/ohci-omap.c +++ b/trunk/drivers/usb/host/ohci-omap.c @@ -20,15 +20,14 @@ #include #include +#include #include #include #include -#include - -#include #include -#include +#include +#include /* OMAP-1510 OHCI has its own MMU for DMA */ diff --git a/trunk/drivers/usb/otg/isp1301_omap.c b/trunk/drivers/usb/otg/isp1301_omap.c index e0558dfcfafc..70cf5d7bca48 100644 --- a/trunk/drivers/usb/otg/isp1301_omap.c +++ b/trunk/drivers/usb/otg/isp1301_omap.c @@ -36,9 +36,9 @@ #include #include +#include #include -#include #ifndef DEBUG #undef VERBOSE diff --git a/trunk/fs/btrfs/backref.c b/trunk/fs/btrfs/backref.c index 7301cdb4b2cb..a383c18e74e8 100644 --- a/trunk/fs/btrfs/backref.c +++ b/trunk/fs/btrfs/backref.c @@ -301,10 +301,14 @@ static int __resolve_indirect_ref(struct btrfs_fs_info *fs_info, goto out; eb = path->nodes[level]; - if (!eb) { - WARN_ON(1); - ret = 1; - goto out; + while (!eb) { + if (!level) { + WARN_ON(1); + ret = 1; + goto out; + } + level--; + eb = path->nodes[level]; } ret = add_all_parents(root, path, parents, level, &ref->key_for_search, @@ -835,6 +839,7 @@ static int find_parent_nodes(struct btrfs_trans_handle *trans, } ret = __add_delayed_refs(head, delayed_ref_seq, &prefs_delayed); + mutex_unlock(&head->mutex); if (ret) { spin_unlock(&delayed_refs->lock); goto out; @@ -928,8 +933,6 @@ static int find_parent_nodes(struct btrfs_trans_handle *trans, } out: - if (head) - mutex_unlock(&head->mutex); btrfs_free_path(path); while (!list_empty(&prefs)) { ref = list_first_entry(&prefs, struct __prelim_ref, list); diff --git a/trunk/fs/btrfs/ctree.c b/trunk/fs/btrfs/ctree.c index 15cbc2bf4ff0..8206b3900587 100644 --- a/trunk/fs/btrfs/ctree.c +++ b/trunk/fs/btrfs/ctree.c @@ -1024,11 +1024,18 @@ __tree_mod_log_oldest_root(struct btrfs_fs_info *fs_info, if (!looped && !tm) return 0; /* - * we must have key remove operations in the log before the - * replace operation. + * if there are no tree operation for the oldest root, we simply + * return it. this should only happen if that (old) root is at + * level 0. */ - BUG_ON(!tm); + if (!tm) + break; + /* + * if there's an operation that's not a root replacement, we + * found the oldest version of our root. normally, we'll find a + * MOD_LOG_KEY_REMOVE_WHILE_FREEING operation here. + */ if (tm->op != MOD_LOG_ROOT_REPLACE) break; @@ -1087,11 +1094,7 @@ __tree_mod_log_rewind(struct extent_buffer *eb, u64 time_seq, tm->generation); break; case MOD_LOG_KEY_ADD: - if (tm->slot != n - 1) { - o_dst = btrfs_node_key_ptr_offset(tm->slot); - o_src = btrfs_node_key_ptr_offset(tm->slot + 1); - memmove_extent_buffer(eb, o_dst, o_src, p_size); - } + /* if a move operation is needed it's in the log */ n--; break; case MOD_LOG_MOVE_KEYS: @@ -1192,16 +1195,8 @@ get_old_root(struct btrfs_root *root, u64 time_seq) } tm = tree_mod_log_search(root->fs_info, logical, time_seq); - /* - * there was an item in the log when __tree_mod_log_oldest_root - * returned. this one must not go away, because the time_seq passed to - * us must be blocking its removal. - */ - BUG_ON(!tm); - if (old_root) - eb = alloc_dummy_extent_buffer(tm->index << PAGE_CACHE_SHIFT, - root->nodesize); + eb = alloc_dummy_extent_buffer(logical, root->nodesize); else eb = btrfs_clone_extent_buffer(root->node); btrfs_tree_read_unlock(root->node); @@ -1216,7 +1211,10 @@ get_old_root(struct btrfs_root *root, u64 time_seq) btrfs_set_header_level(eb, old_root->level); btrfs_set_header_generation(eb, old_generation); } - __tree_mod_log_rewind(eb, time_seq, tm); + if (tm) + __tree_mod_log_rewind(eb, time_seq, tm); + else + WARN_ON(btrfs_header_level(eb) != 0); extent_buffer_get(eb); return eb; @@ -2995,7 +2993,7 @@ static noinline int insert_new_root(struct btrfs_trans_handle *trans, static void insert_ptr(struct btrfs_trans_handle *trans, struct btrfs_root *root, struct btrfs_path *path, struct btrfs_disk_key *key, u64 bytenr, - int slot, int level, int tree_mod_log) + int slot, int level) { struct extent_buffer *lower; int nritems; @@ -3008,7 +3006,7 @@ static void insert_ptr(struct btrfs_trans_handle *trans, BUG_ON(slot > nritems); BUG_ON(nritems == BTRFS_NODEPTRS_PER_BLOCK(root)); if (slot != nritems) { - if (tree_mod_log && level) + if (level) tree_mod_log_eb_move(root->fs_info, lower, slot + 1, slot, nritems - slot); memmove_extent_buffer(lower, @@ -3016,7 +3014,7 @@ static void insert_ptr(struct btrfs_trans_handle *trans, btrfs_node_key_ptr_offset(slot), (nritems - slot) * sizeof(struct btrfs_key_ptr)); } - if (tree_mod_log && level) { + if (level) { ret = tree_mod_log_insert_key(root->fs_info, lower, slot, MOD_LOG_KEY_ADD); BUG_ON(ret < 0); @@ -3104,7 +3102,7 @@ static noinline int split_node(struct btrfs_trans_handle *trans, btrfs_mark_buffer_dirty(split); insert_ptr(trans, root, path, &disk_key, split->start, - path->slots[level + 1] + 1, level + 1, 1); + path->slots[level + 1] + 1, level + 1); if (path->slots[level] >= mid) { path->slots[level] -= mid; @@ -3641,7 +3639,7 @@ static noinline void copy_for_split(struct btrfs_trans_handle *trans, btrfs_set_header_nritems(l, mid); btrfs_item_key(right, &disk_key, 0); insert_ptr(trans, root, path, &disk_key, right->start, - path->slots[1] + 1, 1, 0); + path->slots[1] + 1, 1); btrfs_mark_buffer_dirty(right); btrfs_mark_buffer_dirty(l); @@ -3848,7 +3846,7 @@ static noinline int split_leaf(struct btrfs_trans_handle *trans, if (mid <= slot) { btrfs_set_header_nritems(right, 0); insert_ptr(trans, root, path, &disk_key, right->start, - path->slots[1] + 1, 1, 0); + path->slots[1] + 1, 1); btrfs_tree_unlock(path->nodes[0]); free_extent_buffer(path->nodes[0]); path->nodes[0] = right; @@ -3857,7 +3855,7 @@ static noinline int split_leaf(struct btrfs_trans_handle *trans, } else { btrfs_set_header_nritems(right, 0); insert_ptr(trans, root, path, &disk_key, right->start, - path->slots[1], 1, 0); + path->slots[1], 1); btrfs_tree_unlock(path->nodes[0]); free_extent_buffer(path->nodes[0]); path->nodes[0] = right; @@ -5121,6 +5119,18 @@ int btrfs_next_old_leaf(struct btrfs_root *root, struct btrfs_path *path, if (!path->skip_locking) { ret = btrfs_try_tree_read_lock(next); + if (!ret && time_seq) { + /* + * If we don't get the lock, we may be racing + * with push_leaf_left, holding that lock while + * itself waiting for the leaf we've currently + * locked. To solve this situation, we give up + * on our lock and cycle. + */ + btrfs_release_path(path); + cond_resched(); + goto again; + } if (!ret) { btrfs_set_path_blocking(path); btrfs_tree_read_lock(next); diff --git a/trunk/fs/btrfs/disk-io.c b/trunk/fs/btrfs/disk-io.c index 7b845ff4af99..2936ca49b3b4 100644 --- a/trunk/fs/btrfs/disk-io.c +++ b/trunk/fs/btrfs/disk-io.c @@ -2354,12 +2354,17 @@ int open_ctree(struct super_block *sb, BTRFS_CSUM_TREE_OBJECTID, csum_root); if (ret) goto recovery_tree_root; - csum_root->track_dirty = 1; fs_info->generation = generation; fs_info->last_trans_committed = generation; + ret = btrfs_recover_balance(fs_info); + if (ret) { + printk(KERN_WARNING "btrfs: failed to recover balance\n"); + goto fail_block_groups; + } + ret = btrfs_init_dev_stats(fs_info); if (ret) { printk(KERN_ERR "btrfs: failed to init dev_stats: %d\n", @@ -2485,20 +2490,23 @@ int open_ctree(struct super_block *sb, goto fail_trans_kthread; } - if (!(sb->s_flags & MS_RDONLY)) { - down_read(&fs_info->cleanup_work_sem); - err = btrfs_orphan_cleanup(fs_info->fs_root); - if (!err) - err = btrfs_orphan_cleanup(fs_info->tree_root); - up_read(&fs_info->cleanup_work_sem); + if (sb->s_flags & MS_RDONLY) + return 0; - if (!err) - err = btrfs_recover_balance(fs_info->tree_root); + down_read(&fs_info->cleanup_work_sem); + if ((ret = btrfs_orphan_cleanup(fs_info->fs_root)) || + (ret = btrfs_orphan_cleanup(fs_info->tree_root))) { + up_read(&fs_info->cleanup_work_sem); + close_ctree(tree_root); + return ret; + } + up_read(&fs_info->cleanup_work_sem); - if (err) { - close_ctree(tree_root); - return err; - } + ret = btrfs_resume_balance_async(fs_info); + if (ret) { + printk(KERN_WARNING "btrfs: failed to resume balance\n"); + close_ctree(tree_root); + return ret; } return 0; diff --git a/trunk/fs/btrfs/extent-tree.c b/trunk/fs/btrfs/extent-tree.c index 4b5a1e1bdefb..6e1d36702ff7 100644 --- a/trunk/fs/btrfs/extent-tree.c +++ b/trunk/fs/btrfs/extent-tree.c @@ -2347,12 +2347,10 @@ static noinline int run_clustered_refs(struct btrfs_trans_handle *trans, return count; } - static void wait_for_more_refs(struct btrfs_delayed_ref_root *delayed_refs, - unsigned long num_refs) + unsigned long num_refs, + struct list_head *first_seq) { - struct list_head *first_seq = delayed_refs->seq_head.next; - spin_unlock(&delayed_refs->lock); pr_debug("waiting for more refs (num %ld, first %p)\n", num_refs, first_seq); @@ -2381,6 +2379,7 @@ int btrfs_run_delayed_refs(struct btrfs_trans_handle *trans, struct btrfs_delayed_ref_root *delayed_refs; struct btrfs_delayed_ref_node *ref; struct list_head cluster; + struct list_head *first_seq = NULL; int ret; u64 delayed_start; int run_all = count == (unsigned long)-1; @@ -2436,8 +2435,10 @@ int btrfs_run_delayed_refs(struct btrfs_trans_handle *trans, */ consider_waiting = 1; num_refs = delayed_refs->num_entries; + first_seq = root->fs_info->tree_mod_seq_list.next; } else { - wait_for_more_refs(delayed_refs, num_refs); + wait_for_more_refs(delayed_refs, + num_refs, first_seq); /* * after waiting, things have changed. we * dropped the lock and someone else might have diff --git a/trunk/fs/btrfs/extent_io.c b/trunk/fs/btrfs/extent_io.c index aaa12c1eb348..01c21b6c6d43 100644 --- a/trunk/fs/btrfs/extent_io.c +++ b/trunk/fs/btrfs/extent_io.c @@ -3324,6 +3324,7 @@ static int extent_write_cache_pages(struct extent_io_tree *tree, writepage_t writepage, void *data, void (*flush_fn)(void *)) { + struct inode *inode = mapping->host; int ret = 0; int done = 0; int nr_to_write_done = 0; @@ -3334,6 +3335,18 @@ static int extent_write_cache_pages(struct extent_io_tree *tree, int scanned = 0; int tag; + /* + * We have to hold onto the inode so that ordered extents can do their + * work when the IO finishes. The alternative to this is failing to add + * an ordered extent if the igrab() fails there and that is a huge pain + * to deal with, so instead just hold onto the inode throughout the + * writepages operation. If it fails here we are freeing up the inode + * anyway and we'd rather not waste our time writing out stuff that is + * going to be truncated anyway. + */ + if (!igrab(inode)) + return 0; + pagevec_init(&pvec, 0); if (wbc->range_cyclic) { index = mapping->writeback_index; /* Start from prev offset */ @@ -3428,6 +3441,7 @@ static int extent_write_cache_pages(struct extent_io_tree *tree, index = 0; goto retry; } + btrfs_add_delayed_iput(inode); return ret; } diff --git a/trunk/fs/btrfs/file.c b/trunk/fs/btrfs/file.c index 70dc8ca73e25..9aa01ec2138d 100644 --- a/trunk/fs/btrfs/file.c +++ b/trunk/fs/btrfs/file.c @@ -1334,7 +1334,6 @@ static ssize_t __btrfs_direct_write(struct kiocb *iocb, loff_t *ppos, size_t count, size_t ocount) { struct file *file = iocb->ki_filp; - struct inode *inode = fdentry(file)->d_inode; struct iov_iter i; ssize_t written; ssize_t written_buffered; @@ -1344,18 +1343,6 @@ static ssize_t __btrfs_direct_write(struct kiocb *iocb, written = generic_file_direct_write(iocb, iov, &nr_segs, pos, ppos, count, ocount); - /* - * the generic O_DIRECT will update in-memory i_size after the - * DIOs are done. But our endio handlers that update the on - * disk i_size never update past the in memory i_size. So we - * need one more update here to catch any additions to the - * file - */ - if (inode->i_size != BTRFS_I(inode)->disk_i_size) { - btrfs_ordered_update_i_size(inode, inode->i_size, NULL); - mark_inode_dirty(inode); - } - if (written < 0 || written == count) return written; diff --git a/trunk/fs/btrfs/free-space-cache.c b/trunk/fs/btrfs/free-space-cache.c index 81296c57405a..6c4e2baa9290 100644 --- a/trunk/fs/btrfs/free-space-cache.c +++ b/trunk/fs/btrfs/free-space-cache.c @@ -1543,29 +1543,26 @@ static noinline int remove_from_bitmap(struct btrfs_free_space_ctl *ctl, end = bitmap_info->offset + (u64)(BITS_PER_BITMAP * ctl->unit) - 1; /* - * XXX - this can go away after a few releases. - * - * since the only user of btrfs_remove_free_space is the tree logging - * stuff, and the only way to test that is under crash conditions, we - * want to have this debug stuff here just in case somethings not - * working. Search the bitmap for the space we are trying to use to - * make sure its actually there. If its not there then we need to stop - * because something has gone wrong. + * We need to search for bits in this bitmap. We could only cover some + * of the extent in this bitmap thanks to how we add space, so we need + * to search for as much as it as we can and clear that amount, and then + * go searching for the next bit. */ search_start = *offset; - search_bytes = *bytes; + search_bytes = ctl->unit; search_bytes = min(search_bytes, end - search_start + 1); ret = search_bitmap(ctl, bitmap_info, &search_start, &search_bytes); BUG_ON(ret < 0 || search_start != *offset); - if (*offset > bitmap_info->offset && *offset + *bytes > end) { - bitmap_clear_bits(ctl, bitmap_info, *offset, end - *offset + 1); - *bytes -= end - *offset + 1; - *offset = end + 1; - } else if (*offset >= bitmap_info->offset && *offset + *bytes <= end) { - bitmap_clear_bits(ctl, bitmap_info, *offset, *bytes); - *bytes = 0; - } + /* We may have found more bits than what we need */ + search_bytes = min(search_bytes, *bytes); + + /* Cannot clear past the end of the bitmap */ + search_bytes = min(search_bytes, end - search_start + 1); + + bitmap_clear_bits(ctl, bitmap_info, search_start, search_bytes); + *offset += search_bytes; + *bytes -= search_bytes; if (*bytes) { struct rb_node *next = rb_next(&bitmap_info->offset_index); @@ -1596,7 +1593,7 @@ static noinline int remove_from_bitmap(struct btrfs_free_space_ctl *ctl, * everything over again. */ search_start = *offset; - search_bytes = *bytes; + search_bytes = ctl->unit; ret = search_bitmap(ctl, bitmap_info, &search_start, &search_bytes); if (ret < 0 || search_start != *offset) @@ -1879,12 +1876,14 @@ int btrfs_remove_free_space(struct btrfs_block_group_cache *block_group, { struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; struct btrfs_free_space *info; - struct btrfs_free_space *next_info = NULL; int ret = 0; spin_lock(&ctl->tree_lock); again: + if (!bytes) + goto out_lock; + info = tree_search_offset(ctl, offset, 0, 0); if (!info) { /* @@ -1905,88 +1904,48 @@ int btrfs_remove_free_space(struct btrfs_block_group_cache *block_group, } } - if (info->bytes < bytes && rb_next(&info->offset_index)) { - u64 end; - next_info = rb_entry(rb_next(&info->offset_index), - struct btrfs_free_space, - offset_index); - - if (next_info->bitmap) - end = next_info->offset + - BITS_PER_BITMAP * ctl->unit - 1; - else - end = next_info->offset + next_info->bytes; - - if (next_info->bytes < bytes || - next_info->offset > offset || offset > end) { - printk(KERN_CRIT "Found free space at %llu, size %llu," - " trying to use %llu\n", - (unsigned long long)info->offset, - (unsigned long long)info->bytes, - (unsigned long long)bytes); - WARN_ON(1); - ret = -EINVAL; - goto out_lock; - } - - info = next_info; - } - - if (info->bytes == bytes) { + if (!info->bitmap) { unlink_free_space(ctl, info); - if (info->bitmap) { - kfree(info->bitmap); - ctl->total_bitmaps--; - } - kmem_cache_free(btrfs_free_space_cachep, info); - ret = 0; - goto out_lock; - } - - if (!info->bitmap && info->offset == offset) { - unlink_free_space(ctl, info); - info->offset += bytes; - info->bytes -= bytes; - ret = link_free_space(ctl, info); - WARN_ON(ret); - goto out_lock; - } + if (offset == info->offset) { + u64 to_free = min(bytes, info->bytes); + + info->bytes -= to_free; + info->offset += to_free; + if (info->bytes) { + ret = link_free_space(ctl, info); + WARN_ON(ret); + } else { + kmem_cache_free(btrfs_free_space_cachep, info); + } - if (!info->bitmap && info->offset <= offset && - info->offset + info->bytes >= offset + bytes) { - u64 old_start = info->offset; - /* - * we're freeing space in the middle of the info, - * this can happen during tree log replay - * - * first unlink the old info and then - * insert it again after the hole we're creating - */ - unlink_free_space(ctl, info); - if (offset + bytes < info->offset + info->bytes) { - u64 old_end = info->offset + info->bytes; + offset += to_free; + bytes -= to_free; + goto again; + } else { + u64 old_end = info->bytes + info->offset; - info->offset = offset + bytes; - info->bytes = old_end - info->offset; + info->bytes = offset - info->offset; ret = link_free_space(ctl, info); WARN_ON(ret); if (ret) goto out_lock; - } else { - /* the hole we're creating ends at the end - * of the info struct, just free the info - */ - kmem_cache_free(btrfs_free_space_cachep, info); - } - spin_unlock(&ctl->tree_lock); - /* step two, insert a new info struct to cover - * anything before the hole - */ - ret = btrfs_add_free_space(block_group, old_start, - offset - old_start); - WARN_ON(ret); /* -ENOMEM */ - goto out; + /* Not enough bytes in this entry to satisfy us */ + if (old_end < offset + bytes) { + bytes -= old_end - offset; + offset = old_end; + goto again; + } else if (old_end == offset + bytes) { + /* all done */ + goto out_lock; + } + spin_unlock(&ctl->tree_lock); + + ret = btrfs_add_free_space(block_group, offset + bytes, + old_end - (offset + bytes)); + WARN_ON(ret); + goto out; + } } ret = remove_from_bitmap(ctl, info, &offset, &bytes); diff --git a/trunk/fs/btrfs/inode.c b/trunk/fs/btrfs/inode.c index d8bb0dbc4941..a7d1921ac76b 100644 --- a/trunk/fs/btrfs/inode.c +++ b/trunk/fs/btrfs/inode.c @@ -3754,7 +3754,7 @@ void btrfs_evict_inode(struct inode *inode) btrfs_wait_ordered_range(inode, 0, (u64)-1); if (root->fs_info->log_root_recovering) { - BUG_ON(!test_bit(BTRFS_INODE_HAS_ORPHAN_ITEM, + BUG_ON(test_bit(BTRFS_INODE_HAS_ORPHAN_ITEM, &BTRFS_I(inode)->runtime_flags)); goto no_delete; } @@ -5876,8 +5876,17 @@ static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock, bh_result->b_size = len; bh_result->b_bdev = em->bdev; set_buffer_mapped(bh_result); - if (create && !test_bit(EXTENT_FLAG_PREALLOC, &em->flags)) - set_buffer_new(bh_result); + if (create) { + if (!test_bit(EXTENT_FLAG_PREALLOC, &em->flags)) + set_buffer_new(bh_result); + + /* + * Need to update the i_size under the extent lock so buffered + * readers will get the updated i_size when we unlock. + */ + if (start + len > i_size_read(inode)) + i_size_write(inode, start + len); + } free_extent_map(em); @@ -6360,12 +6369,48 @@ static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb, */ ordered = btrfs_lookup_ordered_range(inode, lockstart, lockend - lockstart + 1); - if (!ordered) + + /* + * We need to make sure there are no buffered pages in this + * range either, we could have raced between the invalidate in + * generic_file_direct_write and locking the extent. The + * invalidate needs to happen so that reads after a write do not + * get stale data. + */ + if (!ordered && (!writing || + !test_range_bit(&BTRFS_I(inode)->io_tree, + lockstart, lockend, EXTENT_UPTODATE, 0, + cached_state))) break; + unlock_extent_cached(&BTRFS_I(inode)->io_tree, lockstart, lockend, &cached_state, GFP_NOFS); - btrfs_start_ordered_extent(inode, ordered, 1); - btrfs_put_ordered_extent(ordered); + + if (ordered) { + btrfs_start_ordered_extent(inode, ordered, 1); + btrfs_put_ordered_extent(ordered); + } else { + /* Screw you mmap */ + ret = filemap_write_and_wait_range(file->f_mapping, + lockstart, + lockend); + if (ret) + goto out; + + /* + * If we found a page that couldn't be invalidated just + * fall back to buffered. + */ + ret = invalidate_inode_pages2_range(file->f_mapping, + lockstart >> PAGE_CACHE_SHIFT, + lockend >> PAGE_CACHE_SHIFT); + if (ret) { + if (ret == -EBUSY) + ret = 0; + goto out; + } + } + cond_resched(); } diff --git a/trunk/fs/btrfs/ioctl.h b/trunk/fs/btrfs/ioctl.h index 497c530724cf..e440aa653c30 100644 --- a/trunk/fs/btrfs/ioctl.h +++ b/trunk/fs/btrfs/ioctl.h @@ -339,7 +339,7 @@ struct btrfs_ioctl_get_dev_stats { #define BTRFS_IOC_WAIT_SYNC _IOW(BTRFS_IOCTL_MAGIC, 22, __u64) #define BTRFS_IOC_SNAP_CREATE_V2 _IOW(BTRFS_IOCTL_MAGIC, 23, \ struct btrfs_ioctl_vol_args_v2) -#define BTRFS_IOC_SUBVOL_GETFLAGS _IOW(BTRFS_IOCTL_MAGIC, 25, __u64) +#define BTRFS_IOC_SUBVOL_GETFLAGS _IOR(BTRFS_IOCTL_MAGIC, 25, __u64) #define BTRFS_IOC_SUBVOL_SETFLAGS _IOW(BTRFS_IOCTL_MAGIC, 26, __u64) #define BTRFS_IOC_SCRUB _IOWR(BTRFS_IOCTL_MAGIC, 27, \ struct btrfs_ioctl_scrub_args) diff --git a/trunk/fs/btrfs/super.c b/trunk/fs/btrfs/super.c index 0eb9a4da069e..e23991574fdf 100644 --- a/trunk/fs/btrfs/super.c +++ b/trunk/fs/btrfs/super.c @@ -1187,6 +1187,10 @@ static int btrfs_remount(struct super_block *sb, int *flags, char *data) if (ret) goto restore; + ret = btrfs_resume_balance_async(fs_info); + if (ret) + goto restore; + sb->s_flags &= ~MS_RDONLY; } diff --git a/trunk/fs/btrfs/tree-log.c b/trunk/fs/btrfs/tree-log.c index 2017d0ff511c..8abeae4224f9 100644 --- a/trunk/fs/btrfs/tree-log.c +++ b/trunk/fs/btrfs/tree-log.c @@ -690,6 +690,8 @@ static noinline int drop_one_dir_item(struct btrfs_trans_handle *trans, kfree(name); iput(inode); + + btrfs_run_delayed_items(trans, root); return ret; } @@ -895,6 +897,7 @@ static noinline int add_inode_ref(struct btrfs_trans_handle *trans, ret = btrfs_unlink_inode(trans, root, dir, inode, victim_name, victim_name_len); + btrfs_run_delayed_items(trans, root); } kfree(victim_name); ptr = (unsigned long)(victim_ref + 1) + victim_name_len; @@ -1475,6 +1478,9 @@ static noinline int check_item_in_log(struct btrfs_trans_handle *trans, ret = btrfs_unlink_inode(trans, root, dir, inode, name, name_len); BUG_ON(ret); + + btrfs_run_delayed_items(trans, root); + kfree(name); iput(inode); diff --git a/trunk/fs/btrfs/volumes.c b/trunk/fs/btrfs/volumes.c index 8a3d2594b807..ecaad40e7ef4 100644 --- a/trunk/fs/btrfs/volumes.c +++ b/trunk/fs/btrfs/volumes.c @@ -2845,31 +2845,48 @@ int btrfs_balance(struct btrfs_balance_control *bctl, static int balance_kthread(void *data) { - struct btrfs_balance_control *bctl = - (struct btrfs_balance_control *)data; - struct btrfs_fs_info *fs_info = bctl->fs_info; + struct btrfs_fs_info *fs_info = data; int ret = 0; mutex_lock(&fs_info->volume_mutex); mutex_lock(&fs_info->balance_mutex); - set_balance_control(bctl); - - if (btrfs_test_opt(fs_info->tree_root, SKIP_BALANCE)) { - printk(KERN_INFO "btrfs: force skipping balance\n"); - } else { + if (fs_info->balance_ctl) { printk(KERN_INFO "btrfs: continuing balance\n"); - ret = btrfs_balance(bctl, NULL); + ret = btrfs_balance(fs_info->balance_ctl, NULL); } mutex_unlock(&fs_info->balance_mutex); mutex_unlock(&fs_info->volume_mutex); + return ret; } -int btrfs_recover_balance(struct btrfs_root *tree_root) +int btrfs_resume_balance_async(struct btrfs_fs_info *fs_info) { struct task_struct *tsk; + + spin_lock(&fs_info->balance_lock); + if (!fs_info->balance_ctl) { + spin_unlock(&fs_info->balance_lock); + return 0; + } + spin_unlock(&fs_info->balance_lock); + + if (btrfs_test_opt(fs_info->tree_root, SKIP_BALANCE)) { + printk(KERN_INFO "btrfs: force skipping balance\n"); + return 0; + } + + tsk = kthread_run(balance_kthread, fs_info, "btrfs-balance"); + if (IS_ERR(tsk)) + return PTR_ERR(tsk); + + return 0; +} + +int btrfs_recover_balance(struct btrfs_fs_info *fs_info) +{ struct btrfs_balance_control *bctl; struct btrfs_balance_item *item; struct btrfs_disk_balance_args disk_bargs; @@ -2882,29 +2899,30 @@ int btrfs_recover_balance(struct btrfs_root *tree_root) if (!path) return -ENOMEM; - bctl = kzalloc(sizeof(*bctl), GFP_NOFS); - if (!bctl) { - ret = -ENOMEM; - goto out; - } - key.objectid = BTRFS_BALANCE_OBJECTID; key.type = BTRFS_BALANCE_ITEM_KEY; key.offset = 0; - ret = btrfs_search_slot(NULL, tree_root, &key, path, 0, 0); + ret = btrfs_search_slot(NULL, fs_info->tree_root, &key, path, 0, 0); if (ret < 0) - goto out_bctl; + goto out; if (ret > 0) { /* ret = -ENOENT; */ ret = 0; - goto out_bctl; + goto out; + } + + bctl = kzalloc(sizeof(*bctl), GFP_NOFS); + if (!bctl) { + ret = -ENOMEM; + goto out; } leaf = path->nodes[0]; item = btrfs_item_ptr(leaf, path->slots[0], struct btrfs_balance_item); - bctl->fs_info = tree_root->fs_info; - bctl->flags = btrfs_balance_flags(leaf, item) | BTRFS_BALANCE_RESUME; + bctl->fs_info = fs_info; + bctl->flags = btrfs_balance_flags(leaf, item); + bctl->flags |= BTRFS_BALANCE_RESUME; btrfs_balance_data(leaf, item, &disk_bargs); btrfs_disk_balance_args_to_cpu(&bctl->data, &disk_bargs); @@ -2913,14 +2931,13 @@ int btrfs_recover_balance(struct btrfs_root *tree_root) btrfs_balance_sys(leaf, item, &disk_bargs); btrfs_disk_balance_args_to_cpu(&bctl->sys, &disk_bargs); - tsk = kthread_run(balance_kthread, bctl, "btrfs-balance"); - if (IS_ERR(tsk)) - ret = PTR_ERR(tsk); - else - goto out; + mutex_lock(&fs_info->volume_mutex); + mutex_lock(&fs_info->balance_mutex); -out_bctl: - kfree(bctl); + set_balance_control(bctl); + + mutex_unlock(&fs_info->balance_mutex); + mutex_unlock(&fs_info->volume_mutex); out: btrfs_free_path(path); return ret; @@ -4061,16 +4078,18 @@ static void btrfs_end_bio(struct bio *bio, int err) BUG_ON(stripe_index >= bbio->num_stripes); dev = bbio->stripes[stripe_index].dev; - if (bio->bi_rw & WRITE) - btrfs_dev_stat_inc(dev, - BTRFS_DEV_STAT_WRITE_ERRS); - else - btrfs_dev_stat_inc(dev, - BTRFS_DEV_STAT_READ_ERRS); - if ((bio->bi_rw & WRITE_FLUSH) == WRITE_FLUSH) - btrfs_dev_stat_inc(dev, - BTRFS_DEV_STAT_FLUSH_ERRS); - btrfs_dev_stat_print_on_error(dev); + if (dev->bdev) { + if (bio->bi_rw & WRITE) + btrfs_dev_stat_inc(dev, + BTRFS_DEV_STAT_WRITE_ERRS); + else + btrfs_dev_stat_inc(dev, + BTRFS_DEV_STAT_READ_ERRS); + if ((bio->bi_rw & WRITE_FLUSH) == WRITE_FLUSH) + btrfs_dev_stat_inc(dev, + BTRFS_DEV_STAT_FLUSH_ERRS); + btrfs_dev_stat_print_on_error(dev); + } } } diff --git a/trunk/fs/btrfs/volumes.h b/trunk/fs/btrfs/volumes.h index 74366f27a76b..95f6637614db 100644 --- a/trunk/fs/btrfs/volumes.h +++ b/trunk/fs/btrfs/volumes.h @@ -281,7 +281,8 @@ int btrfs_shrink_device(struct btrfs_device *device, u64 new_size); int btrfs_init_new_device(struct btrfs_root *root, char *path); int btrfs_balance(struct btrfs_balance_control *bctl, struct btrfs_ioctl_balance_args *bargs); -int btrfs_recover_balance(struct btrfs_root *tree_root); +int btrfs_resume_balance_async(struct btrfs_fs_info *fs_info); +int btrfs_recover_balance(struct btrfs_fs_info *fs_info); int btrfs_pause_balance(struct btrfs_fs_info *fs_info); int btrfs_cancel_balance(struct btrfs_fs_info *fs_info); int btrfs_chunk_readonly(struct btrfs_root *root, u64 chunk_offset); diff --git a/trunk/fs/cifs/connect.c b/trunk/fs/cifs/connect.c index 78db68a5cf44..0ae86ddf2213 100644 --- a/trunk/fs/cifs/connect.c +++ b/trunk/fs/cifs/connect.c @@ -1653,24 +1653,26 @@ cifs_parse_mount_options(const char *mountdata, const char *devname, * If yes, we have encountered a double deliminator * reset the NULL character to the deliminator */ - if (tmp_end < end && tmp_end[1] == delim) + if (tmp_end < end && tmp_end[1] == delim) { tmp_end[0] = delim; - /* Keep iterating until we get to a single deliminator - * OR the end - */ - while ((tmp_end = strchr(tmp_end, delim)) != NULL && - (tmp_end[1] == delim)) { - tmp_end = (char *) &tmp_end[2]; - } + /* Keep iterating until we get to a single + * deliminator OR the end + */ + while ((tmp_end = strchr(tmp_end, delim)) + != NULL && (tmp_end[1] == delim)) { + tmp_end = (char *) &tmp_end[2]; + } - /* Reset var options to point to next element */ - if (tmp_end) { - tmp_end[0] = '\0'; - options = (char *) &tmp_end[1]; - } else - /* Reached the end of the mount option string */ - options = end; + /* Reset var options to point to next element */ + if (tmp_end) { + tmp_end[0] = '\0'; + options = (char *) &tmp_end[1]; + } else + /* Reached the end of the mount option + * string */ + options = end; + } /* Now build new password string */ temp_len = strlen(value); @@ -3493,18 +3495,15 @@ cifs_negotiate_rsize(struct cifs_tcon *tcon, struct smb_vol *pvolume_info) * MS-CIFS indicates that servers are only limited by the client's * bufsize for reads, testing against win98se shows that it throws * INVALID_PARAMETER errors if you try to request too large a read. + * OS/2 just sends back short reads. * - * If the server advertises a MaxBufferSize of less than one page, - * assume that it also can't satisfy reads larger than that either. - * - * FIXME: Is there a better heuristic for this? + * If the server doesn't advertise CAP_LARGE_READ_X, then assume that + * it can't handle a read request larger than its MaxBufferSize either. */ if (tcon->unix_ext && (unix_cap & CIFS_UNIX_LARGE_READ_CAP)) defsize = CIFS_DEFAULT_IOSIZE; else if (server->capabilities & CAP_LARGE_READ_X) defsize = CIFS_DEFAULT_NON_POSIX_RSIZE; - else if (server->maxBuf >= PAGE_CACHE_SIZE) - defsize = CIFSMaxBufSize; else defsize = server->maxBuf - sizeof(READ_RSP); diff --git a/trunk/fs/ecryptfs/kthread.c b/trunk/fs/ecryptfs/kthread.c index 69f994a7d524..0dbe58a8b172 100644 --- a/trunk/fs/ecryptfs/kthread.c +++ b/trunk/fs/ecryptfs/kthread.c @@ -149,7 +149,7 @@ int ecryptfs_privileged_open(struct file **lower_file, (*lower_file) = dentry_open(lower_dentry, lower_mnt, flags, cred); if (!IS_ERR(*lower_file)) goto out; - if (flags & O_RDONLY) { + if ((flags & O_ACCMODE) == O_RDONLY) { rc = PTR_ERR((*lower_file)); goto out; } diff --git a/trunk/fs/ecryptfs/miscdev.c b/trunk/fs/ecryptfs/miscdev.c index 3a06f4043df4..c0038f6566d4 100644 --- a/trunk/fs/ecryptfs/miscdev.c +++ b/trunk/fs/ecryptfs/miscdev.c @@ -49,7 +49,10 @@ ecryptfs_miscdev_poll(struct file *file, poll_table *pt) mutex_lock(&ecryptfs_daemon_hash_mux); /* TODO: Just use file->private_data? */ rc = ecryptfs_find_daemon_by_euid(&daemon, euid, current_user_ns()); - BUG_ON(rc || !daemon); + if (rc || !daemon) { + mutex_unlock(&ecryptfs_daemon_hash_mux); + return -EINVAL; + } mutex_lock(&daemon->mux); mutex_unlock(&ecryptfs_daemon_hash_mux); if (daemon->flags & ECRYPTFS_DAEMON_ZOMBIE) { @@ -122,6 +125,7 @@ ecryptfs_miscdev_open(struct inode *inode, struct file *file) goto out_unlock_daemon; } daemon->flags |= ECRYPTFS_DAEMON_MISCDEV_OPEN; + file->private_data = daemon; atomic_inc(&ecryptfs_num_miscdev_opens); out_unlock_daemon: mutex_unlock(&daemon->mux); @@ -152,9 +156,9 @@ ecryptfs_miscdev_release(struct inode *inode, struct file *file) mutex_lock(&ecryptfs_daemon_hash_mux); rc = ecryptfs_find_daemon_by_euid(&daemon, euid, current_user_ns()); - BUG_ON(rc || !daemon); + if (rc || !daemon) + daemon = file->private_data; mutex_lock(&daemon->mux); - BUG_ON(daemon->pid != task_pid(current)); BUG_ON(!(daemon->flags & ECRYPTFS_DAEMON_MISCDEV_OPEN)); daemon->flags &= ~ECRYPTFS_DAEMON_MISCDEV_OPEN; atomic_dec(&ecryptfs_num_miscdev_opens); @@ -191,31 +195,32 @@ int ecryptfs_send_miscdev(char *data, size_t data_size, struct ecryptfs_msg_ctx *msg_ctx, u8 msg_type, u16 msg_flags, struct ecryptfs_daemon *daemon) { - int rc = 0; + struct ecryptfs_message *msg; - mutex_lock(&msg_ctx->mux); - msg_ctx->msg = kmalloc((sizeof(*msg_ctx->msg) + data_size), - GFP_KERNEL); - if (!msg_ctx->msg) { - rc = -ENOMEM; + msg = kmalloc((sizeof(*msg) + data_size), GFP_KERNEL); + if (!msg) { printk(KERN_ERR "%s: Out of memory whilst attempting " "to kmalloc(%zd, GFP_KERNEL)\n", __func__, - (sizeof(*msg_ctx->msg) + data_size)); - goto out_unlock; + (sizeof(*msg) + data_size)); + return -ENOMEM; } + + mutex_lock(&msg_ctx->mux); + msg_ctx->msg = msg; msg_ctx->msg->index = msg_ctx->index; msg_ctx->msg->data_len = data_size; msg_ctx->type = msg_type; memcpy(msg_ctx->msg->data, data, data_size); msg_ctx->msg_size = (sizeof(*msg_ctx->msg) + data_size); - mutex_lock(&daemon->mux); list_add_tail(&msg_ctx->daemon_out_list, &daemon->msg_ctx_out_queue); + mutex_unlock(&msg_ctx->mux); + + mutex_lock(&daemon->mux); daemon->num_queued_msg_ctx++; wake_up_interruptible(&daemon->wait); mutex_unlock(&daemon->mux); -out_unlock: - mutex_unlock(&msg_ctx->mux); - return rc; + + return 0; } /* @@ -269,8 +274,16 @@ ecryptfs_miscdev_read(struct file *file, char __user *buf, size_t count, mutex_lock(&ecryptfs_daemon_hash_mux); /* TODO: Just use file->private_data? */ rc = ecryptfs_find_daemon_by_euid(&daemon, euid, current_user_ns()); - BUG_ON(rc || !daemon); + if (rc || !daemon) { + mutex_unlock(&ecryptfs_daemon_hash_mux); + return -EINVAL; + } mutex_lock(&daemon->mux); + if (task_pid(current) != daemon->pid) { + mutex_unlock(&daemon->mux); + mutex_unlock(&ecryptfs_daemon_hash_mux); + return -EPERM; + } if (daemon->flags & ECRYPTFS_DAEMON_ZOMBIE) { rc = 0; mutex_unlock(&ecryptfs_daemon_hash_mux); @@ -307,9 +320,6 @@ ecryptfs_miscdev_read(struct file *file, char __user *buf, size_t count, * message from the queue; try again */ goto check_list; } - BUG_ON(euid != daemon->euid); - BUG_ON(current_user_ns() != daemon->user_ns); - BUG_ON(task_pid(current) != daemon->pid); msg_ctx = list_first_entry(&daemon->msg_ctx_out_queue, struct ecryptfs_msg_ctx, daemon_out_list); BUG_ON(!msg_ctx); diff --git a/trunk/fs/ocfs2/dlmglue.c b/trunk/fs/ocfs2/dlmglue.c index 81a4cd22f80b..4f7795fb5fc0 100644 --- a/trunk/fs/ocfs2/dlmglue.c +++ b/trunk/fs/ocfs2/dlmglue.c @@ -456,7 +456,7 @@ static void ocfs2_update_lock_stats(struct ocfs2_lock_res *res, int level, stats->ls_gets++; stats->ls_total += ktime_to_ns(kt); /* overflow */ - if (unlikely(stats->ls_gets) == 0) { + if (unlikely(stats->ls_gets == 0)) { stats->ls_gets++; stats->ls_total = ktime_to_ns(kt); } @@ -3932,6 +3932,8 @@ static void ocfs2_process_blocked_lock(struct ocfs2_super *osb, static void ocfs2_schedule_blocked_lock(struct ocfs2_super *osb, struct ocfs2_lock_res *lockres) { + unsigned long flags; + assert_spin_locked(&lockres->l_lock); if (lockres->l_flags & OCFS2_LOCK_FREEING) { @@ -3945,21 +3947,22 @@ static void ocfs2_schedule_blocked_lock(struct ocfs2_super *osb, lockres_or_flags(lockres, OCFS2_LOCK_QUEUED); - spin_lock(&osb->dc_task_lock); + spin_lock_irqsave(&osb->dc_task_lock, flags); if (list_empty(&lockres->l_blocked_list)) { list_add_tail(&lockres->l_blocked_list, &osb->blocked_lock_list); osb->blocked_lock_count++; } - spin_unlock(&osb->dc_task_lock); + spin_unlock_irqrestore(&osb->dc_task_lock, flags); } static void ocfs2_downconvert_thread_do_work(struct ocfs2_super *osb) { unsigned long processed; + unsigned long flags; struct ocfs2_lock_res *lockres; - spin_lock(&osb->dc_task_lock); + spin_lock_irqsave(&osb->dc_task_lock, flags); /* grab this early so we know to try again if a state change and * wake happens part-way through our work */ osb->dc_work_sequence = osb->dc_wake_sequence; @@ -3972,38 +3975,40 @@ static void ocfs2_downconvert_thread_do_work(struct ocfs2_super *osb) struct ocfs2_lock_res, l_blocked_list); list_del_init(&lockres->l_blocked_list); osb->blocked_lock_count--; - spin_unlock(&osb->dc_task_lock); + spin_unlock_irqrestore(&osb->dc_task_lock, flags); BUG_ON(!processed); processed--; ocfs2_process_blocked_lock(osb, lockres); - spin_lock(&osb->dc_task_lock); + spin_lock_irqsave(&osb->dc_task_lock, flags); } - spin_unlock(&osb->dc_task_lock); + spin_unlock_irqrestore(&osb->dc_task_lock, flags); } static int ocfs2_downconvert_thread_lists_empty(struct ocfs2_super *osb) { int empty = 0; + unsigned long flags; - spin_lock(&osb->dc_task_lock); + spin_lock_irqsave(&osb->dc_task_lock, flags); if (list_empty(&osb->blocked_lock_list)) empty = 1; - spin_unlock(&osb->dc_task_lock); + spin_unlock_irqrestore(&osb->dc_task_lock, flags); return empty; } static int ocfs2_downconvert_thread_should_wake(struct ocfs2_super *osb) { int should_wake = 0; + unsigned long flags; - spin_lock(&osb->dc_task_lock); + spin_lock_irqsave(&osb->dc_task_lock, flags); if (osb->dc_work_sequence != osb->dc_wake_sequence) should_wake = 1; - spin_unlock(&osb->dc_task_lock); + spin_unlock_irqrestore(&osb->dc_task_lock, flags); return should_wake; } @@ -4033,10 +4038,12 @@ static int ocfs2_downconvert_thread(void *arg) void ocfs2_wake_downconvert_thread(struct ocfs2_super *osb) { - spin_lock(&osb->dc_task_lock); + unsigned long flags; + + spin_lock_irqsave(&osb->dc_task_lock, flags); /* make sure the voting thread gets a swipe at whatever changes * the caller may have made to the voting state */ osb->dc_wake_sequence++; - spin_unlock(&osb->dc_task_lock); + spin_unlock_irqrestore(&osb->dc_task_lock, flags); wake_up(&osb->dc_event); } diff --git a/trunk/fs/ocfs2/extent_map.c b/trunk/fs/ocfs2/extent_map.c index 2f5b92ef0e53..70b5863a2d64 100644 --- a/trunk/fs/ocfs2/extent_map.c +++ b/trunk/fs/ocfs2/extent_map.c @@ -923,8 +923,6 @@ int ocfs2_seek_data_hole_offset(struct file *file, loff_t *offset, int origin) ocfs2_inode_unlock(inode, 0); out: - if (ret && ret != -ENXIO) - ret = -ENXIO; return ret; } diff --git a/trunk/fs/ocfs2/file.c b/trunk/fs/ocfs2/file.c index 061591a3ab08..98513c8ed589 100644 --- a/trunk/fs/ocfs2/file.c +++ b/trunk/fs/ocfs2/file.c @@ -2422,8 +2422,10 @@ static ssize_t ocfs2_file_aio_write(struct kiocb *iocb, unaligned_dio = 0; } - if (unaligned_dio) + if (unaligned_dio) { + ocfs2_iocb_clear_unaligned_aio(iocb); atomic_dec(&OCFS2_I(inode)->ip_unaligned_aio); + } out: if (rw_level != -1) diff --git a/trunk/fs/ocfs2/quota_global.c b/trunk/fs/ocfs2/quota_global.c index 92fcd575775a..0a86e302655f 100644 --- a/trunk/fs/ocfs2/quota_global.c +++ b/trunk/fs/ocfs2/quota_global.c @@ -399,8 +399,6 @@ int ocfs2_global_read_info(struct super_block *sb, int type) msecs_to_jiffies(oinfo->dqi_syncms)); out_err: - if (status) - mlog_errno(status); return status; out_unlock: ocfs2_unlock_global_qf(oinfo, 0); diff --git a/trunk/fs/open.c b/trunk/fs/open.c index d6c79a0dffc7..1540632d8387 100644 --- a/trunk/fs/open.c +++ b/trunk/fs/open.c @@ -397,10 +397,10 @@ SYSCALL_DEFINE1(fchdir, unsigned int, fd) { struct file *file; struct inode *inode; - int error; + int error, fput_needed; error = -EBADF; - file = fget(fd); + file = fget_raw_light(fd, &fput_needed); if (!file) goto out; @@ -414,7 +414,7 @@ SYSCALL_DEFINE1(fchdir, unsigned int, fd) if (!error) set_fs_pwd(current->fs, &file->f_path); out_putf: - fput(file); + fput_light(file, fput_needed); out: return error; } diff --git a/trunk/fs/splice.c b/trunk/fs/splice.c index c9f1318a3b82..7bf08fa22ec9 100644 --- a/trunk/fs/splice.c +++ b/trunk/fs/splice.c @@ -273,13 +273,16 @@ void spd_release_page(struct splice_pipe_desc *spd, unsigned int i) * Check if we need to grow the arrays holding pages and partial page * descriptions. */ -int splice_grow_spd(struct pipe_inode_info *pipe, struct splice_pipe_desc *spd) +int splice_grow_spd(const struct pipe_inode_info *pipe, struct splice_pipe_desc *spd) { - if (pipe->buffers <= PIPE_DEF_BUFFERS) + unsigned int buffers = ACCESS_ONCE(pipe->buffers); + + spd->nr_pages_max = buffers; + if (buffers <= PIPE_DEF_BUFFERS) return 0; - spd->pages = kmalloc(pipe->buffers * sizeof(struct page *), GFP_KERNEL); - spd->partial = kmalloc(pipe->buffers * sizeof(struct partial_page), GFP_KERNEL); + spd->pages = kmalloc(buffers * sizeof(struct page *), GFP_KERNEL); + spd->partial = kmalloc(buffers * sizeof(struct partial_page), GFP_KERNEL); if (spd->pages && spd->partial) return 0; @@ -289,10 +292,9 @@ int splice_grow_spd(struct pipe_inode_info *pipe, struct splice_pipe_desc *spd) return -ENOMEM; } -void splice_shrink_spd(struct pipe_inode_info *pipe, - struct splice_pipe_desc *spd) +void splice_shrink_spd(struct splice_pipe_desc *spd) { - if (pipe->buffers <= PIPE_DEF_BUFFERS) + if (spd->nr_pages_max <= PIPE_DEF_BUFFERS) return; kfree(spd->pages); @@ -315,6 +317,7 @@ __generic_file_splice_read(struct file *in, loff_t *ppos, struct splice_pipe_desc spd = { .pages = pages, .partial = partial, + .nr_pages_max = PIPE_DEF_BUFFERS, .flags = flags, .ops = &page_cache_pipe_buf_ops, .spd_release = spd_release_page, @@ -326,7 +329,7 @@ __generic_file_splice_read(struct file *in, loff_t *ppos, index = *ppos >> PAGE_CACHE_SHIFT; loff = *ppos & ~PAGE_CACHE_MASK; req_pages = (len + loff + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT; - nr_pages = min(req_pages, pipe->buffers); + nr_pages = min(req_pages, spd.nr_pages_max); /* * Lookup the (hopefully) full range of pages we need. @@ -497,7 +500,7 @@ __generic_file_splice_read(struct file *in, loff_t *ppos, if (spd.nr_pages) error = splice_to_pipe(pipe, &spd); - splice_shrink_spd(pipe, &spd); + splice_shrink_spd(&spd); return error; } @@ -598,6 +601,7 @@ ssize_t default_file_splice_read(struct file *in, loff_t *ppos, struct splice_pipe_desc spd = { .pages = pages, .partial = partial, + .nr_pages_max = PIPE_DEF_BUFFERS, .flags = flags, .ops = &default_pipe_buf_ops, .spd_release = spd_release_page, @@ -608,8 +612,8 @@ ssize_t default_file_splice_read(struct file *in, loff_t *ppos, res = -ENOMEM; vec = __vec; - if (pipe->buffers > PIPE_DEF_BUFFERS) { - vec = kmalloc(pipe->buffers * sizeof(struct iovec), GFP_KERNEL); + if (spd.nr_pages_max > PIPE_DEF_BUFFERS) { + vec = kmalloc(spd.nr_pages_max * sizeof(struct iovec), GFP_KERNEL); if (!vec) goto shrink_ret; } @@ -617,7 +621,7 @@ ssize_t default_file_splice_read(struct file *in, loff_t *ppos, offset = *ppos & ~PAGE_CACHE_MASK; nr_pages = (len + offset + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT; - for (i = 0; i < nr_pages && i < pipe->buffers && len; i++) { + for (i = 0; i < nr_pages && i < spd.nr_pages_max && len; i++) { struct page *page; page = alloc_page(GFP_USER); @@ -665,7 +669,7 @@ ssize_t default_file_splice_read(struct file *in, loff_t *ppos, shrink_ret: if (vec != __vec) kfree(vec); - splice_shrink_spd(pipe, &spd); + splice_shrink_spd(&spd); return res; err: @@ -1614,6 +1618,7 @@ static long vmsplice_to_pipe(struct file *file, const struct iovec __user *iov, struct splice_pipe_desc spd = { .pages = pages, .partial = partial, + .nr_pages_max = PIPE_DEF_BUFFERS, .flags = flags, .ops = &user_page_pipe_buf_ops, .spd_release = spd_release_page, @@ -1629,13 +1634,13 @@ static long vmsplice_to_pipe(struct file *file, const struct iovec __user *iov, spd.nr_pages = get_iovec_page_array(iov, nr_segs, spd.pages, spd.partial, false, - pipe->buffers); + spd.nr_pages_max); if (spd.nr_pages <= 0) ret = spd.nr_pages; else ret = splice_to_pipe(pipe, &spd); - splice_shrink_spd(pipe, &spd); + splice_shrink_spd(&spd); return ret; } diff --git a/trunk/include/linux/aio.h b/trunk/include/linux/aio.h index 2314ad8b3c9c..b1a520ec8b59 100644 --- a/trunk/include/linux/aio.h +++ b/trunk/include/linux/aio.h @@ -140,6 +140,7 @@ struct kiocb { (x)->ki_dtor = NULL; \ (x)->ki_obj.tsk = tsk; \ (x)->ki_user_data = 0; \ + (x)->private = NULL; \ } while (0) #define AIO_RING_MAGIC 0xa10a10a1 diff --git a/trunk/include/linux/blkdev.h b/trunk/include/linux/blkdev.h index ba43f408baa3..07954b05b86c 100644 --- a/trunk/include/linux/blkdev.h +++ b/trunk/include/linux/blkdev.h @@ -827,7 +827,6 @@ extern bool __blk_end_request_err(struct request *rq, int error); extern void blk_complete_request(struct request *); extern void __blk_complete_request(struct request *); extern void blk_abort_request(struct request *); -extern void blk_abort_queue(struct request_queue *); extern void blk_unprep_request(struct request *); /* diff --git a/trunk/include/linux/input.h b/trunk/include/linux/input.h index a81671453575..2740d080ec6b 100644 --- a/trunk/include/linux/input.h +++ b/trunk/include/linux/input.h @@ -116,6 +116,7 @@ struct input_keymap_entry { /** * EVIOCGMTSLOTS(len) - get MT slot values + * @len: size of the data buffer in bytes * * The ioctl buffer argument should be binary equivalent to * diff --git a/trunk/include/linux/kvm_host.h b/trunk/include/linux/kvm_host.h index c4464356b35b..96c158a37d3e 100644 --- a/trunk/include/linux/kvm_host.h +++ b/trunk/include/linux/kvm_host.h @@ -815,7 +815,7 @@ static inline void kvm_free_irq_routing(struct kvm *kvm) {} #ifdef CONFIG_HAVE_KVM_EVENTFD void kvm_eventfd_init(struct kvm *kvm); -int kvm_irqfd(struct kvm *kvm, int fd, int gsi, int flags); +int kvm_irqfd(struct kvm *kvm, struct kvm_irqfd *args); void kvm_irqfd_release(struct kvm *kvm); void kvm_irq_routing_update(struct kvm *, struct kvm_irq_routing_table *); int kvm_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args); @@ -824,7 +824,7 @@ int kvm_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args); static inline void kvm_eventfd_init(struct kvm *kvm) {} -static inline int kvm_irqfd(struct kvm *kvm, int fd, int gsi, int flags) +static inline int kvm_irqfd(struct kvm *kvm, struct kvm_irqfd *args) { return -EINVAL; } diff --git a/trunk/include/linux/prctl.h b/trunk/include/linux/prctl.h index 3988012255dc..289760f424aa 100644 --- a/trunk/include/linux/prctl.h +++ b/trunk/include/linux/prctl.h @@ -141,6 +141,8 @@ * Changing LSM security domain is considered a new privilege. So, for example, * asking selinux for a specific new context (e.g. with runcon) will result * in execve returning -EPERM. + * + * See Documentation/prctl/no_new_privs.txt for more details. */ #define PR_SET_NO_NEW_PRIVS 38 #define PR_GET_NO_NEW_PRIVS 39 diff --git a/trunk/include/linux/splice.h b/trunk/include/linux/splice.h index 26e5b613deda..09a545a7dfa3 100644 --- a/trunk/include/linux/splice.h +++ b/trunk/include/linux/splice.h @@ -51,7 +51,8 @@ struct partial_page { struct splice_pipe_desc { struct page **pages; /* page map */ struct partial_page *partial; /* pages[] may not be contig */ - int nr_pages; /* number of pages in map */ + int nr_pages; /* number of populated pages in map */ + unsigned int nr_pages_max; /* pages[] & partial[] arrays size */ unsigned int flags; /* splice flags */ const struct pipe_buf_operations *ops;/* ops associated with output pipe */ void (*spd_release)(struct splice_pipe_desc *, unsigned int); @@ -85,9 +86,8 @@ extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *, /* * for dynamic pipe sizing */ -extern int splice_grow_spd(struct pipe_inode_info *, struct splice_pipe_desc *); -extern void splice_shrink_spd(struct pipe_inode_info *, - struct splice_pipe_desc *); +extern int splice_grow_spd(const struct pipe_inode_info *, struct splice_pipe_desc *); +extern void splice_shrink_spd(struct splice_pipe_desc *); extern void spd_release_page(struct splice_pipe_desc *, unsigned int); extern const struct pipe_buf_operations page_cache_pipe_buf_ops; diff --git a/trunk/include/net/sctp/structs.h b/trunk/include/net/sctp/structs.h index e4652fe58958..fecdf31816f2 100644 --- a/trunk/include/net/sctp/structs.h +++ b/trunk/include/net/sctp/structs.h @@ -912,6 +912,9 @@ struct sctp_transport { /* Is this structure kfree()able? */ malloced:1; + /* Has this transport moved the ctsn since we last sacked */ + __u32 sack_generation; + struct flowi fl; /* This is the peer's IP address and port. */ @@ -1584,6 +1587,7 @@ struct sctp_association { */ __u8 sack_needed; /* Do we need to sack the peer? */ __u32 sack_cnt; + __u32 sack_generation; /* These are capabilities which our peer advertised. */ __u8 ecn_capable:1, /* Can peer do ECN? */ diff --git a/trunk/include/net/sctp/tsnmap.h b/trunk/include/net/sctp/tsnmap.h index e7728bc14ccf..2c5d2b4d5d1e 100644 --- a/trunk/include/net/sctp/tsnmap.h +++ b/trunk/include/net/sctp/tsnmap.h @@ -117,7 +117,8 @@ void sctp_tsnmap_free(struct sctp_tsnmap *map); int sctp_tsnmap_check(const struct sctp_tsnmap *, __u32 tsn); /* Mark this TSN as seen. */ -int sctp_tsnmap_mark(struct sctp_tsnmap *, __u32 tsn); +int sctp_tsnmap_mark(struct sctp_tsnmap *, __u32 tsn, + struct sctp_transport *trans); /* Mark this TSN and all lower as seen. */ void sctp_tsnmap_skip(struct sctp_tsnmap *map, __u32 tsn); diff --git a/trunk/kernel/relay.c b/trunk/kernel/relay.c index ab56a1764d4d..e8cd2027abbd 100644 --- a/trunk/kernel/relay.c +++ b/trunk/kernel/relay.c @@ -1235,6 +1235,7 @@ static ssize_t subbuf_splice_actor(struct file *in, struct splice_pipe_desc spd = { .pages = pages, .nr_pages = 0, + .nr_pages_max = PIPE_DEF_BUFFERS, .partial = partial, .flags = flags, .ops = &relay_pipe_buf_ops, @@ -1302,8 +1303,8 @@ static ssize_t subbuf_splice_actor(struct file *in, ret += padding; out: - splice_shrink_spd(pipe, &spd); - return ret; + splice_shrink_spd(&spd); + return ret; } static ssize_t relay_file_splice_read(struct file *in, diff --git a/trunk/kernel/trace/trace.c b/trunk/kernel/trace/trace.c index 49249c28690d..a7fa0702be1c 100644 --- a/trunk/kernel/trace/trace.c +++ b/trunk/kernel/trace/trace.c @@ -3609,6 +3609,7 @@ static ssize_t tracing_splice_read_pipe(struct file *filp, .pages = pages_def, .partial = partial_def, .nr_pages = 0, /* This gets updated below. */ + .nr_pages_max = PIPE_DEF_BUFFERS, .flags = flags, .ops = &tracing_pipe_buf_ops, .spd_release = tracing_spd_release_pipe, @@ -3680,7 +3681,7 @@ static ssize_t tracing_splice_read_pipe(struct file *filp, ret = splice_to_pipe(pipe, &spd); out: - splice_shrink_spd(pipe, &spd); + splice_shrink_spd(&spd); return ret; out_err: @@ -4231,6 +4232,7 @@ tracing_buffers_splice_read(struct file *file, loff_t *ppos, struct splice_pipe_desc spd = { .pages = pages_def, .partial = partial_def, + .nr_pages_max = PIPE_DEF_BUFFERS, .flags = flags, .ops = &buffer_pipe_buf_ops, .spd_release = buffer_spd_release, @@ -4318,7 +4320,7 @@ tracing_buffers_splice_read(struct file *file, loff_t *ppos, } ret = splice_to_pipe(pipe, &spd); - splice_shrink_spd(pipe, &spd); + splice_shrink_spd(&spd); out: return ret; } diff --git a/trunk/mm/madvise.c b/trunk/mm/madvise.c index deff1b64a08c..14d260fa0d17 100644 --- a/trunk/mm/madvise.c +++ b/trunk/mm/madvise.c @@ -15,6 +15,7 @@ #include #include #include +#include /* * Any behaviour which results in changes to the vma->vm_flags needs to @@ -204,14 +205,16 @@ static long madvise_remove(struct vm_area_struct *vma, { loff_t offset; int error; + struct file *f; *prev = NULL; /* tell sys_madvise we drop mmap_sem */ if (vma->vm_flags & (VM_LOCKED|VM_NONLINEAR|VM_HUGETLB)) return -EINVAL; - if (!vma->vm_file || !vma->vm_file->f_mapping - || !vma->vm_file->f_mapping->host) { + f = vma->vm_file; + + if (!f || !f->f_mapping || !f->f_mapping->host) { return -EINVAL; } @@ -221,11 +224,18 @@ static long madvise_remove(struct vm_area_struct *vma, offset = (loff_t)(start - vma->vm_start) + ((loff_t)vma->vm_pgoff << PAGE_SHIFT); - /* filesystem's fallocate may need to take i_mutex */ + /* + * Filesystem's fallocate may need to take i_mutex. We need to + * explicitly grab a reference because the vma (and hence the + * vma's reference to the file) can go away as soon as we drop + * mmap_sem. + */ + get_file(f); up_read(¤t->mm->mmap_sem); - error = do_fallocate(vma->vm_file, + error = do_fallocate(f, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, offset, end - start); + fput(f); down_read(¤t->mm->mmap_sem); return error; } diff --git a/trunk/mm/shmem.c b/trunk/mm/shmem.c index a15a466d0d1d..4ce02e0673db 100644 --- a/trunk/mm/shmem.c +++ b/trunk/mm/shmem.c @@ -1594,6 +1594,7 @@ static ssize_t shmem_file_splice_read(struct file *in, loff_t *ppos, struct splice_pipe_desc spd = { .pages = pages, .partial = partial, + .nr_pages_max = PIPE_DEF_BUFFERS, .flags = flags, .ops = &page_cache_pipe_buf_ops, .spd_release = spd_release_page, @@ -1682,7 +1683,7 @@ static ssize_t shmem_file_splice_read(struct file *in, loff_t *ppos, if (spd.nr_pages) error = splice_to_pipe(pipe, &spd); - splice_shrink_spd(pipe, &spd); + splice_shrink_spd(&spd); if (error > 0) { *ppos += error; diff --git a/trunk/net/core/dev.c b/trunk/net/core/dev.c index 6df214041a5e..84f01ba81a34 100644 --- a/trunk/net/core/dev.c +++ b/trunk/net/core/dev.c @@ -1136,8 +1136,8 @@ void dev_load(struct net *net, const char *name) no_module = request_module("netdev-%s", name); if (no_module && capable(CAP_SYS_MODULE)) { if (!request_module("%s", name)) - pr_err("Loading kernel module for a network device with CAP_SYS_MODULE (deprecated). Use CAP_NET_ADMIN and alias netdev-%s instead.\n", - name); + pr_warn("Loading kernel module for a network device with CAP_SYS_MODULE (deprecated). Use CAP_NET_ADMIN and alias netdev-%s instead.\n", + name); } } EXPORT_SYMBOL(dev_load); diff --git a/trunk/net/core/skbuff.c b/trunk/net/core/skbuff.c index d78671e9d545..46a3d23d259e 100644 --- a/trunk/net/core/skbuff.c +++ b/trunk/net/core/skbuff.c @@ -1755,6 +1755,7 @@ int skb_splice_bits(struct sk_buff *skb, unsigned int offset, struct splice_pipe_desc spd = { .pages = pages, .partial = partial, + .nr_pages_max = MAX_SKB_FRAGS, .flags = flags, .ops = &sock_pipe_buf_ops, .spd_release = sock_spd_release, diff --git a/trunk/net/mac80211/mlme.c b/trunk/net/mac80211/mlme.c index 66e4fcdd1c6b..a4bb856de08f 100644 --- a/trunk/net/mac80211/mlme.c +++ b/trunk/net/mac80211/mlme.c @@ -1342,7 +1342,6 @@ static void ieee80211_set_disassoc(struct ieee80211_sub_if_data *sdata, struct ieee80211_local *local = sdata->local; struct sta_info *sta; u32 changed = 0; - u8 bssid[ETH_ALEN]; ASSERT_MGD_MTX(ifmgd); @@ -1354,10 +1353,7 @@ static void ieee80211_set_disassoc(struct ieee80211_sub_if_data *sdata, ieee80211_stop_poll(sdata); - memcpy(bssid, ifmgd->associated->bssid, ETH_ALEN); - ifmgd->associated = NULL; - memset(ifmgd->bssid, 0, ETH_ALEN); /* * we need to commit the associated = NULL change because the @@ -1377,7 +1373,7 @@ static void ieee80211_set_disassoc(struct ieee80211_sub_if_data *sdata, netif_carrier_off(sdata->dev); mutex_lock(&local->sta_mtx); - sta = sta_info_get(sdata, bssid); + sta = sta_info_get(sdata, ifmgd->bssid); if (sta) { set_sta_flag(sta, WLAN_STA_BLOCK_BA); ieee80211_sta_tear_down_BA_sessions(sta, tx); @@ -1386,13 +1382,16 @@ static void ieee80211_set_disassoc(struct ieee80211_sub_if_data *sdata, /* deauthenticate/disassociate now */ if (tx || frame_buf) - ieee80211_send_deauth_disassoc(sdata, bssid, stype, reason, - tx, frame_buf); + ieee80211_send_deauth_disassoc(sdata, ifmgd->bssid, stype, + reason, tx, frame_buf); /* flush out frame */ if (tx) drv_flush(local, false); + /* clear bssid only after building the needed mgmt frames */ + memset(ifmgd->bssid, 0, ETH_ALEN); + /* remove AP and TDLS peers */ sta_info_flush(local, sdata); diff --git a/trunk/net/mac80211/rx.c b/trunk/net/mac80211/rx.c index 7bcecf73aafb..965e6ec0adb6 100644 --- a/trunk/net/mac80211/rx.c +++ b/trunk/net/mac80211/rx.c @@ -2455,7 +2455,7 @@ ieee80211_rx_h_action_return(struct ieee80211_rx_data *rx) * frames that we didn't handle, including returning unknown * ones. For all other modes we will return them to the sender, * setting the 0x80 bit in the action category, as required by - * 802.11-2007 7.3.1.11. + * 802.11-2012 9.24.4. * Newer versions of hostapd shall also use the management frame * registration mechanisms, but older ones still use cooked * monitor interfaces so push all frames there. @@ -2465,6 +2465,9 @@ ieee80211_rx_h_action_return(struct ieee80211_rx_data *rx) sdata->vif.type == NL80211_IFTYPE_AP_VLAN)) return RX_DROP_MONITOR; + if (is_multicast_ether_addr(mgmt->da)) + return RX_DROP_MONITOR; + /* do not return rejected action frames */ if (mgmt->u.action.category & 0x80) return RX_DROP_UNUSABLE; diff --git a/trunk/net/netfilter/ipset/ip_set_core.c b/trunk/net/netfilter/ipset/ip_set_core.c index 819c342f5b30..9730882697aa 100644 --- a/trunk/net/netfilter/ipset/ip_set_core.c +++ b/trunk/net/netfilter/ipset/ip_set_core.c @@ -639,6 +639,14 @@ find_free_id(const char *name, ip_set_id_t *index, struct ip_set **set) return 0; } +static int +ip_set_none(struct sock *ctnl, struct sk_buff *skb, + const struct nlmsghdr *nlh, + const struct nlattr * const attr[]) +{ + return -EOPNOTSUPP; +} + static int ip_set_create(struct sock *ctnl, struct sk_buff *skb, const struct nlmsghdr *nlh, @@ -1539,6 +1547,10 @@ ip_set_protocol(struct sock *ctnl, struct sk_buff *skb, } static const struct nfnl_callback ip_set_netlink_subsys_cb[IPSET_MSG_MAX] = { + [IPSET_CMD_NONE] = { + .call = ip_set_none, + .attr_count = IPSET_ATTR_CMD_MAX, + }, [IPSET_CMD_CREATE] = { .call = ip_set_create, .attr_count = IPSET_ATTR_CMD_MAX, diff --git a/trunk/net/netfilter/ipset/ip_set_hash_netiface.c b/trunk/net/netfilter/ipset/ip_set_hash_netiface.c index ee863943c826..d5d3607ae7bc 100644 --- a/trunk/net/netfilter/ipset/ip_set_hash_netiface.c +++ b/trunk/net/netfilter/ipset/ip_set_hash_netiface.c @@ -38,30 +38,6 @@ struct iface_node { #define iface_data(n) (rb_entry(n, struct iface_node, node)->iface) -static inline long -ifname_compare(const char *_a, const char *_b) -{ - const long *a = (const long *)_a; - const long *b = (const long *)_b; - - BUILD_BUG_ON(IFNAMSIZ > 4 * sizeof(unsigned long)); - if (a[0] != b[0]) - return a[0] - b[0]; - if (IFNAMSIZ > sizeof(long)) { - if (a[1] != b[1]) - return a[1] - b[1]; - } - if (IFNAMSIZ > 2 * sizeof(long)) { - if (a[2] != b[2]) - return a[2] - b[2]; - } - if (IFNAMSIZ > 3 * sizeof(long)) { - if (a[3] != b[3]) - return a[3] - b[3]; - } - return 0; -} - static void rbtree_destroy(struct rb_root *root) { @@ -99,7 +75,7 @@ iface_test(struct rb_root *root, const char **iface) while (n) { const char *d = iface_data(n); - long res = ifname_compare(*iface, d); + int res = strcmp(*iface, d); if (res < 0) n = n->rb_left; @@ -121,7 +97,7 @@ iface_add(struct rb_root *root, const char **iface) while (*n) { char *ifname = iface_data(*n); - long res = ifname_compare(*iface, ifname); + int res = strcmp(*iface, ifname); p = *n; if (res < 0) @@ -366,7 +342,7 @@ hash_netiface4_uadt(struct ip_set *set, struct nlattr *tb[], struct hash_netiface4_elem data = { .cidr = HOST_MASK }; u32 ip = 0, ip_to, last; u32 timeout = h->timeout; - char iface[IFNAMSIZ] = {}; + char iface[IFNAMSIZ]; int ret; if (unlikely(!tb[IPSET_ATTR_IP] || @@ -663,7 +639,7 @@ hash_netiface6_uadt(struct ip_set *set, struct nlattr *tb[], ipset_adtfn adtfn = set->variant->adt[adt]; struct hash_netiface6_elem data = { .cidr = HOST_MASK }; u32 timeout = h->timeout; - char iface[IFNAMSIZ] = {}; + char iface[IFNAMSIZ]; int ret; if (unlikely(!tb[IPSET_ATTR_IP] || diff --git a/trunk/net/netfilter/ipvs/ip_vs_ctl.c b/trunk/net/netfilter/ipvs/ip_vs_ctl.c index dd811b8dd97c..d43e3c122f7b 100644 --- a/trunk/net/netfilter/ipvs/ip_vs_ctl.c +++ b/trunk/net/netfilter/ipvs/ip_vs_ctl.c @@ -76,19 +76,19 @@ static void __ip_vs_del_service(struct ip_vs_service *svc); #ifdef CONFIG_IP_VS_IPV6 /* Taken from rt6_fill_node() in net/ipv6/route.c, is there a better way? */ -static int __ip_vs_addr_is_local_v6(struct net *net, - const struct in6_addr *addr) +static bool __ip_vs_addr_is_local_v6(struct net *net, + const struct in6_addr *addr) { - struct rt6_info *rt; struct flowi6 fl6 = { .daddr = *addr, }; + struct dst_entry *dst = ip6_route_output(net, NULL, &fl6); + bool is_local; - rt = (struct rt6_info *)ip6_route_output(net, NULL, &fl6); - if (rt && rt->dst.dev && (rt->dst.dev->flags & IFF_LOOPBACK)) - return 1; + is_local = !dst->error && dst->dev && (dst->dev->flags & IFF_LOOPBACK); - return 0; + dst_release(dst); + return is_local; } #endif diff --git a/trunk/net/netfilter/nfnetlink.c b/trunk/net/netfilter/nfnetlink.c index 3e797d1fcb94..791d56bbd74a 100644 --- a/trunk/net/netfilter/nfnetlink.c +++ b/trunk/net/netfilter/nfnetlink.c @@ -169,8 +169,10 @@ static int nfnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh) err = nla_parse(cda, ss->cb[cb_id].attr_count, attr, attrlen, ss->cb[cb_id].policy); - if (err < 0) + if (err < 0) { + rcu_read_unlock(); return err; + } if (nc->call_rcu) { err = nc->call_rcu(net->nfnl, skb, nlh, diff --git a/trunk/net/nfc/nci/ntf.c b/trunk/net/nfc/nci/ntf.c index cb2646179e5f..2ab196a9f228 100644 --- a/trunk/net/nfc/nci/ntf.c +++ b/trunk/net/nfc/nci/ntf.c @@ -106,7 +106,7 @@ static __u8 *nci_extract_rf_params_nfca_passive_poll(struct nci_dev *ndev, nfca_poll->sens_res = __le16_to_cpu(*((__u16 *)data)); data += 2; - nfca_poll->nfcid1_len = *data++; + nfca_poll->nfcid1_len = min_t(__u8, *data++, NFC_NFCID1_MAXSIZE); pr_debug("sens_res 0x%x, nfcid1_len %d\n", nfca_poll->sens_res, nfca_poll->nfcid1_len); @@ -130,7 +130,7 @@ static __u8 *nci_extract_rf_params_nfcb_passive_poll(struct nci_dev *ndev, struct rf_tech_specific_params_nfcb_poll *nfcb_poll, __u8 *data) { - nfcb_poll->sensb_res_len = *data++; + nfcb_poll->sensb_res_len = min_t(__u8, *data++, NFC_SENSB_RES_MAXSIZE); pr_debug("sensb_res_len %d\n", nfcb_poll->sensb_res_len); @@ -145,7 +145,7 @@ static __u8 *nci_extract_rf_params_nfcf_passive_poll(struct nci_dev *ndev, __u8 *data) { nfcf_poll->bit_rate = *data++; - nfcf_poll->sensf_res_len = *data++; + nfcf_poll->sensf_res_len = min_t(__u8, *data++, NFC_SENSF_RES_MAXSIZE); pr_debug("bit_rate %d, sensf_res_len %d\n", nfcf_poll->bit_rate, nfcf_poll->sensf_res_len); @@ -331,7 +331,7 @@ static int nci_extract_activation_params_iso_dep(struct nci_dev *ndev, switch (ntf->activation_rf_tech_and_mode) { case NCI_NFC_A_PASSIVE_POLL_MODE: nfca_poll = &ntf->activation_params.nfca_poll_iso_dep; - nfca_poll->rats_res_len = *data++; + nfca_poll->rats_res_len = min_t(__u8, *data++, 20); pr_debug("rats_res_len %d\n", nfca_poll->rats_res_len); if (nfca_poll->rats_res_len > 0) { memcpy(nfca_poll->rats_res, @@ -341,7 +341,7 @@ static int nci_extract_activation_params_iso_dep(struct nci_dev *ndev, case NCI_NFC_B_PASSIVE_POLL_MODE: nfcb_poll = &ntf->activation_params.nfcb_poll_iso_dep; - nfcb_poll->attrib_res_len = *data++; + nfcb_poll->attrib_res_len = min_t(__u8, *data++, 50); pr_debug("attrib_res_len %d\n", nfcb_poll->attrib_res_len); if (nfcb_poll->attrib_res_len > 0) { memcpy(nfcb_poll->attrib_res, diff --git a/trunk/net/nfc/rawsock.c b/trunk/net/nfc/rawsock.c index ec1134c9e07f..8b8a6a2b2bad 100644 --- a/trunk/net/nfc/rawsock.c +++ b/trunk/net/nfc/rawsock.c @@ -54,7 +54,10 @@ static int rawsock_release(struct socket *sock) { struct sock *sk = sock->sk; - pr_debug("sock=%p\n", sock); + pr_debug("sock=%p sk=%p\n", sock, sk); + + if (!sk) + return 0; sock_orphan(sk); sock_put(sk); diff --git a/trunk/net/sctp/associola.c b/trunk/net/sctp/associola.c index 5bc9ab161b37..b16517ee1aaf 100644 --- a/trunk/net/sctp/associola.c +++ b/trunk/net/sctp/associola.c @@ -271,6 +271,7 @@ static struct sctp_association *sctp_association_init(struct sctp_association *a */ asoc->peer.sack_needed = 1; asoc->peer.sack_cnt = 0; + asoc->peer.sack_generation = 1; /* Assume that the peer will tell us if he recognizes ASCONF * as part of INIT exchange. diff --git a/trunk/net/sctp/output.c b/trunk/net/sctp/output.c index f1b7d4bb591e..6ae47acaaec6 100644 --- a/trunk/net/sctp/output.c +++ b/trunk/net/sctp/output.c @@ -248,6 +248,11 @@ static sctp_xmit_t sctp_packet_bundle_sack(struct sctp_packet *pkt, /* If the SACK timer is running, we have a pending SACK */ if (timer_pending(timer)) { struct sctp_chunk *sack; + + if (pkt->transport->sack_generation != + pkt->transport->asoc->peer.sack_generation) + return retval; + asoc->a_rwnd = asoc->rwnd; sack = sctp_make_sack(asoc); if (sack) { diff --git a/trunk/net/sctp/sm_make_chunk.c b/trunk/net/sctp/sm_make_chunk.c index a85eeeb55dd0..b6de71efb140 100644 --- a/trunk/net/sctp/sm_make_chunk.c +++ b/trunk/net/sctp/sm_make_chunk.c @@ -734,8 +734,10 @@ struct sctp_chunk *sctp_make_sack(const struct sctp_association *asoc) int len; __u32 ctsn; __u16 num_gabs, num_dup_tsns; + struct sctp_association *aptr = (struct sctp_association *)asoc; struct sctp_tsnmap *map = (struct sctp_tsnmap *)&asoc->peer.tsn_map; struct sctp_gap_ack_block gabs[SCTP_MAX_GABS]; + struct sctp_transport *trans; memset(gabs, 0, sizeof(gabs)); ctsn = sctp_tsnmap_get_ctsn(map); @@ -805,6 +807,20 @@ struct sctp_chunk *sctp_make_sack(const struct sctp_association *asoc) sctp_addto_chunk(retval, sizeof(__u32) * num_dup_tsns, sctp_tsnmap_get_dups(map)); + /* Once we have a sack generated, check to see what our sack + * generation is, if its 0, reset the transports to 0, and reset + * the association generation to 1 + * + * The idea is that zero is never used as a valid generation for the + * association so no transport will match after a wrap event like this, + * Until the next sack + */ + if (++aptr->peer.sack_generation == 0) { + list_for_each_entry(trans, &asoc->peer.transport_addr_list, + transports) + trans->sack_generation = 0; + aptr->peer.sack_generation = 1; + } nodata: return retval; } diff --git a/trunk/net/sctp/sm_sideeffect.c b/trunk/net/sctp/sm_sideeffect.c index c96d1a81cf42..8716da1a8592 100644 --- a/trunk/net/sctp/sm_sideeffect.c +++ b/trunk/net/sctp/sm_sideeffect.c @@ -1268,7 +1268,7 @@ static int sctp_cmd_interpreter(sctp_event_t event_type, case SCTP_CMD_REPORT_TSN: /* Record the arrival of a TSN. */ error = sctp_tsnmap_mark(&asoc->peer.tsn_map, - cmd->obj.u32); + cmd->obj.u32, NULL); break; case SCTP_CMD_REPORT_FWDTSN: diff --git a/trunk/net/sctp/transport.c b/trunk/net/sctp/transport.c index b026ba0c6992..1dcceb6e0ce6 100644 --- a/trunk/net/sctp/transport.c +++ b/trunk/net/sctp/transport.c @@ -68,6 +68,8 @@ static struct sctp_transport *sctp_transport_init(struct sctp_transport *peer, peer->af_specific = sctp_get_af_specific(addr->sa.sa_family); memset(&peer->saddr, 0, sizeof(union sctp_addr)); + peer->sack_generation = 0; + /* From 6.3.1 RTO Calculation: * * C1) Until an RTT measurement has been made for a packet sent to the diff --git a/trunk/net/sctp/tsnmap.c b/trunk/net/sctp/tsnmap.c index f1e40cebc981..b5fb7c409023 100644 --- a/trunk/net/sctp/tsnmap.c +++ b/trunk/net/sctp/tsnmap.c @@ -114,7 +114,8 @@ int sctp_tsnmap_check(const struct sctp_tsnmap *map, __u32 tsn) /* Mark this TSN as seen. */ -int sctp_tsnmap_mark(struct sctp_tsnmap *map, __u32 tsn) +int sctp_tsnmap_mark(struct sctp_tsnmap *map, __u32 tsn, + struct sctp_transport *trans) { u16 gap; @@ -133,6 +134,9 @@ int sctp_tsnmap_mark(struct sctp_tsnmap *map, __u32 tsn) */ map->max_tsn_seen++; map->cumulative_tsn_ack_point++; + if (trans) + trans->sack_generation = + trans->asoc->peer.sack_generation; map->base_tsn++; } else { /* Either we already have a gap, or about to record a gap, so diff --git a/trunk/net/sctp/ulpevent.c b/trunk/net/sctp/ulpevent.c index 8a84017834c2..33d894776192 100644 --- a/trunk/net/sctp/ulpevent.c +++ b/trunk/net/sctp/ulpevent.c @@ -715,7 +715,8 @@ struct sctp_ulpevent *sctp_ulpevent_make_rcvmsg(struct sctp_association *asoc, * can mark it as received so the tsn_map is updated correctly. */ if (sctp_tsnmap_mark(&asoc->peer.tsn_map, - ntohl(chunk->subh.data_hdr->tsn))) + ntohl(chunk->subh.data_hdr->tsn), + chunk->transport)) goto fail_mark; /* First calculate the padding, so we don't inadvertently diff --git a/trunk/net/sctp/ulpqueue.c b/trunk/net/sctp/ulpqueue.c index f2d1de7f2ffb..f5a6a4f4faf7 100644 --- a/trunk/net/sctp/ulpqueue.c +++ b/trunk/net/sctp/ulpqueue.c @@ -1051,7 +1051,7 @@ void sctp_ulpq_renege(struct sctp_ulpq *ulpq, struct sctp_chunk *chunk, if (chunk && (freed >= needed)) { __u32 tsn; tsn = ntohl(chunk->subh.data_hdr->tsn); - sctp_tsnmap_mark(&asoc->peer.tsn_map, tsn); + sctp_tsnmap_mark(&asoc->peer.tsn_map, tsn, chunk->transport); sctp_ulpq_tail_data(ulpq, chunk, gfp); sctp_ulpq_partial_delivery(ulpq, chunk, gfp); diff --git a/trunk/security/security.c b/trunk/security/security.c index 3efc9b12aef4..860aeb349cb3 100644 --- a/trunk/security/security.c +++ b/trunk/security/security.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #define MAX_LSM_EVM_XATTR 2 diff --git a/trunk/sound/pci/hda/patch_realtek.c b/trunk/sound/pci/hda/patch_realtek.c index 5ccf10a4d593..aa4c25e0f327 100644 --- a/trunk/sound/pci/hda/patch_realtek.c +++ b/trunk/sound/pci/hda/patch_realtek.c @@ -6688,6 +6688,31 @@ static const struct alc_model_fixup alc662_fixup_models[] = { {} }; +static void alc662_fill_coef(struct hda_codec *codec) +{ + int val, coef; + + coef = alc_get_coef0(codec); + + switch (codec->vendor_id) { + case 0x10ec0662: + if ((coef & 0x00f0) == 0x0030) { + val = alc_read_coef_idx(codec, 0x4); /* EAPD Ctrl */ + alc_write_coef_idx(codec, 0x4, val & ~(1<<10)); + } + break; + case 0x10ec0272: + case 0x10ec0273: + case 0x10ec0663: + case 0x10ec0665: + case 0x10ec0670: + case 0x10ec0671: + case 0x10ec0672: + val = alc_read_coef_idx(codec, 0xd); /* EAPD Ctrl */ + alc_write_coef_idx(codec, 0xd, val | (1<<14)); + break; + } +} /* */ @@ -6707,6 +6732,9 @@ static int patch_alc662(struct hda_codec *codec) alc_fix_pll_init(codec, 0x20, 0x04, 15); + spec->init_hook = alc662_fill_coef; + alc662_fill_coef(codec); + alc_pick_fixup(codec, alc662_fixup_models, alc662_fixup_tbl, alc662_fixups); alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); diff --git a/trunk/sound/soc/codecs/tlv320aic3x.c b/trunk/sound/soc/codecs/tlv320aic3x.c index 64d2a4fa34b2..e9b62b5ea637 100644 --- a/trunk/sound/soc/codecs/tlv320aic3x.c +++ b/trunk/sound/soc/codecs/tlv320aic3x.c @@ -935,9 +935,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, } found: - data = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); - snd_soc_write(codec, AIC3X_PLL_PROGA_REG, - data | (pll_p << PLLP_SHIFT)); + snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, PLLP_MASK, pll_p); snd_soc_write(codec, AIC3X_OVRF_STATUS_AND_PLLR_REG, pll_r << PLLR_SHIFT); snd_soc_write(codec, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT); diff --git a/trunk/sound/soc/codecs/tlv320aic3x.h b/trunk/sound/soc/codecs/tlv320aic3x.h index 6f097fb60683..08c7f6685ff0 100644 --- a/trunk/sound/soc/codecs/tlv320aic3x.h +++ b/trunk/sound/soc/codecs/tlv320aic3x.h @@ -166,6 +166,7 @@ /* PLL registers bitfields */ #define PLLP_SHIFT 0 +#define PLLP_MASK 7 #define PLLQ_SHIFT 3 #define PLLR_SHIFT 0 #define PLLJ_SHIFT 2 diff --git a/trunk/sound/soc/codecs/wm2200.c b/trunk/sound/soc/codecs/wm2200.c index acbdc5fde923..32682c1b7cde 100644 --- a/trunk/sound/soc/codecs/wm2200.c +++ b/trunk/sound/soc/codecs/wm2200.c @@ -1491,6 +1491,7 @@ static int wm2200_bclk_rates_dat[WM2200_NUM_BCLK_RATES] = { static int wm2200_bclk_rates_cd[WM2200_NUM_BCLK_RATES] = { 5644800, + 3763200, 2882400, 1881600, 1411200, diff --git a/trunk/sound/soc/tegra/Kconfig b/trunk/sound/soc/tegra/Kconfig index 76dc230f2bb0..c1c8e955f4d3 100644 --- a/trunk/sound/soc/tegra/Kconfig +++ b/trunk/sound/soc/tegra/Kconfig @@ -58,9 +58,17 @@ config SND_SOC_TEGRA_WM8753 Say Y or M here if you want to add support for SoC audio on Tegra boards using the WM8753 codec, such as Whistler. +config MACH_HAS_SND_SOC_TEGRA_WM8903 + bool + help + Machines that use the SND_SOC_TEGRA_WM8903 driver should select + this config option, in order to allow the user to enable + SND_SOC_TEGRA_WM8903. + config SND_SOC_TEGRA_WM8903 tristate "SoC Audio support for Tegra boards using a WM8903 codec" depends on SND_SOC_TEGRA && I2C + depends on MACH_HAS_SND_SOC_TEGRA_WM8903 select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC select SND_SOC_WM8903 @@ -71,7 +79,7 @@ config SND_SOC_TEGRA_WM8903 config SND_SOC_TEGRA_TRIMSLICE tristate "SoC Audio support for TrimSlice board" - depends on SND_SOC_TEGRA && I2C + depends on SND_SOC_TEGRA && MACH_TRIMSLICE && I2C select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC select SND_SOC_TLV320AIC23 help diff --git a/trunk/sound/soc/tegra/tegra20_i2s.c b/trunk/sound/soc/tegra/tegra20_i2s.c index 1647dbfe74b5..0c7af63d444b 100644 --- a/trunk/sound/soc/tegra/tegra20_i2s.c +++ b/trunk/sound/soc/tegra/tegra20_i2s.c @@ -62,7 +62,7 @@ static int tegra20_i2s_runtime_suspend(struct device *dev) { struct tegra20_i2s *i2s = dev_get_drvdata(dev); - clk_disable_unprepare(i2s->clk_i2s); + clk_disable(i2s->clk_i2s); return 0; } @@ -72,7 +72,7 @@ static int tegra20_i2s_runtime_resume(struct device *dev) struct tegra20_i2s *i2s = dev_get_drvdata(dev); int ret; - ret = clk_prepare_enable(i2s->clk_i2s); + ret = clk_enable(i2s->clk_i2s); if (ret) { dev_err(dev, "clk_enable failed: %d\n", ret); return ret; diff --git a/trunk/sound/soc/tegra/tegra20_spdif.c b/trunk/sound/soc/tegra/tegra20_spdif.c index 2262e4fdec2a..f9b57418bd08 100644 --- a/trunk/sound/soc/tegra/tegra20_spdif.c +++ b/trunk/sound/soc/tegra/tegra20_spdif.c @@ -54,7 +54,7 @@ static int tegra20_spdif_runtime_suspend(struct device *dev) { struct tegra20_spdif *spdif = dev_get_drvdata(dev); - clk_disable_unprepare(spdif->clk_spdif_out); + clk_disable(spdif->clk_spdif_out); return 0; } @@ -64,7 +64,7 @@ static int tegra20_spdif_runtime_resume(struct device *dev) struct tegra20_spdif *spdif = dev_get_drvdata(dev); int ret; - ret = clk_prepare_enable(spdif->clk_spdif_out); + ret = clk_enable(spdif->clk_spdif_out); if (ret) { dev_err(dev, "clk_enable failed: %d\n", ret); return ret; diff --git a/trunk/sound/soc/tegra/tegra30_ahub.c b/trunk/sound/soc/tegra/tegra30_ahub.c index bf5610122c76..f43edb364a18 100644 --- a/trunk/sound/soc/tegra/tegra30_ahub.c +++ b/trunk/sound/soc/tegra/tegra30_ahub.c @@ -56,8 +56,8 @@ static int tegra30_ahub_runtime_suspend(struct device *dev) regcache_cache_only(ahub->regmap_apbif, true); regcache_cache_only(ahub->regmap_ahub, true); - clk_disable_unprepare(ahub->clk_apbif); - clk_disable_unprepare(ahub->clk_d_audio); + clk_disable(ahub->clk_apbif); + clk_disable(ahub->clk_d_audio); return 0; } @@ -77,12 +77,12 @@ static int tegra30_ahub_runtime_resume(struct device *dev) { int ret; - ret = clk_prepare_enable(ahub->clk_d_audio); + ret = clk_enable(ahub->clk_d_audio); if (ret) { dev_err(dev, "clk_enable d_audio failed: %d\n", ret); return ret; } - ret = clk_prepare_enable(ahub->clk_apbif); + ret = clk_enable(ahub->clk_apbif); if (ret) { dev_err(dev, "clk_enable apbif failed: %d\n", ret); clk_disable(ahub->clk_d_audio); diff --git a/trunk/sound/soc/tegra/tegra30_i2s.c b/trunk/sound/soc/tegra/tegra30_i2s.c index d308faaae148..8596032985dc 100644 --- a/trunk/sound/soc/tegra/tegra30_i2s.c +++ b/trunk/sound/soc/tegra/tegra30_i2s.c @@ -62,7 +62,7 @@ static int tegra30_i2s_runtime_suspend(struct device *dev) regcache_cache_only(i2s->regmap, true); - clk_disable_unprepare(i2s->clk_i2s); + clk_disable(i2s->clk_i2s); return 0; } @@ -72,7 +72,7 @@ static int tegra30_i2s_runtime_resume(struct device *dev) struct tegra30_i2s *i2s = dev_get_drvdata(dev); int ret; - ret = clk_prepare_enable(i2s->clk_i2s); + ret = clk_enable(i2s->clk_i2s); if (ret) { dev_err(dev, "clk_enable failed: %d\n", ret); return ret; diff --git a/trunk/sound/soc/tegra/tegra_asoc_utils.c b/trunk/sound/soc/tegra/tegra_asoc_utils.c index 6872c77a1196..9515ce58ea02 100644 --- a/trunk/sound/soc/tegra/tegra_asoc_utils.c +++ b/trunk/sound/soc/tegra/tegra_asoc_utils.c @@ -69,9 +69,9 @@ int tegra_asoc_utils_set_rate(struct tegra_asoc_utils_data *data, int srate, data->set_baseclock = 0; data->set_mclk = 0; - clk_disable_unprepare(data->clk_cdev1); - clk_disable_unprepare(data->clk_pll_a_out0); - clk_disable_unprepare(data->clk_pll_a); + clk_disable(data->clk_cdev1); + clk_disable(data->clk_pll_a_out0); + clk_disable(data->clk_pll_a); err = clk_set_rate(data->clk_pll_a, new_baseclock); if (err) { @@ -87,19 +87,19 @@ int tegra_asoc_utils_set_rate(struct tegra_asoc_utils_data *data, int srate, /* Don't set cdev1/extern1 rate; it's locked to pll_a_out0 */ - err = clk_prepare_enable(data->clk_pll_a); + err = clk_enable(data->clk_pll_a); if (err) { dev_err(data->dev, "Can't enable pll_a: %d\n", err); return err; } - err = clk_prepare_enable(data->clk_pll_a_out0); + err = clk_enable(data->clk_pll_a_out0); if (err) { dev_err(data->dev, "Can't enable pll_a_out0: %d\n", err); return err; } - err = clk_prepare_enable(data->clk_cdev1); + err = clk_enable(data->clk_cdev1); if (err) { dev_err(data->dev, "Can't enable cdev1: %d\n", err); return err; diff --git a/trunk/virt/kvm/eventfd.c b/trunk/virt/kvm/eventfd.c index f59c1e8de7a2..7d7e2aaffece 100644 --- a/trunk/virt/kvm/eventfd.c +++ b/trunk/virt/kvm/eventfd.c @@ -198,7 +198,7 @@ static void irqfd_update(struct kvm *kvm, struct _irqfd *irqfd, } static int -kvm_irqfd_assign(struct kvm *kvm, int fd, int gsi) +kvm_irqfd_assign(struct kvm *kvm, struct kvm_irqfd *args) { struct kvm_irq_routing_table *irq_rt; struct _irqfd *irqfd, *tmp; @@ -212,12 +212,12 @@ kvm_irqfd_assign(struct kvm *kvm, int fd, int gsi) return -ENOMEM; irqfd->kvm = kvm; - irqfd->gsi = gsi; + irqfd->gsi = args->gsi; INIT_LIST_HEAD(&irqfd->list); INIT_WORK(&irqfd->inject, irqfd_inject); INIT_WORK(&irqfd->shutdown, irqfd_shutdown); - file = eventfd_fget(fd); + file = eventfd_fget(args->fd); if (IS_ERR(file)) { ret = PTR_ERR(file); goto fail; @@ -298,19 +298,19 @@ kvm_eventfd_init(struct kvm *kvm) * shutdown any irqfd's that match fd+gsi */ static int -kvm_irqfd_deassign(struct kvm *kvm, int fd, int gsi) +kvm_irqfd_deassign(struct kvm *kvm, struct kvm_irqfd *args) { struct _irqfd *irqfd, *tmp; struct eventfd_ctx *eventfd; - eventfd = eventfd_ctx_fdget(fd); + eventfd = eventfd_ctx_fdget(args->fd); if (IS_ERR(eventfd)) return PTR_ERR(eventfd); spin_lock_irq(&kvm->irqfds.lock); list_for_each_entry_safe(irqfd, tmp, &kvm->irqfds.items, list) { - if (irqfd->eventfd == eventfd && irqfd->gsi == gsi) { + if (irqfd->eventfd == eventfd && irqfd->gsi == args->gsi) { /* * This rcu_assign_pointer is needed for when * another thread calls kvm_irq_routing_update before @@ -338,12 +338,15 @@ kvm_irqfd_deassign(struct kvm *kvm, int fd, int gsi) } int -kvm_irqfd(struct kvm *kvm, int fd, int gsi, int flags) +kvm_irqfd(struct kvm *kvm, struct kvm_irqfd *args) { - if (flags & KVM_IRQFD_FLAG_DEASSIGN) - return kvm_irqfd_deassign(kvm, fd, gsi); + if (args->flags & ~KVM_IRQFD_FLAG_DEASSIGN) + return -EINVAL; + + if (args->flags & KVM_IRQFD_FLAG_DEASSIGN) + return kvm_irqfd_deassign(kvm, args); - return kvm_irqfd_assign(kvm, fd, gsi); + return kvm_irqfd_assign(kvm, args); } /* diff --git a/trunk/virt/kvm/kvm_main.c b/trunk/virt/kvm/kvm_main.c index 7e140683ff14..44ee7124b16d 100644 --- a/trunk/virt/kvm/kvm_main.c +++ b/trunk/virt/kvm/kvm_main.c @@ -2047,7 +2047,7 @@ static long kvm_vm_ioctl(struct file *filp, r = -EFAULT; if (copy_from_user(&data, argp, sizeof data)) goto out; - r = kvm_irqfd(kvm, data.fd, data.gsi, data.flags); + r = kvm_irqfd(kvm, &data); break; } case KVM_IOEVENTFD: { @@ -2845,6 +2845,7 @@ void kvm_exit(void) kvm_arch_hardware_unsetup(); kvm_arch_exit(); free_cpumask_var(cpus_hardware_enabled); + __free_page(fault_page); __free_page(hwpoison_page); __free_page(bad_page); }