From d2017b9646acbd6ea8c11809e58ddaf6b6e5c394 Mon Sep 17 00:00:00 2001 From: Alexander Duyck Date: Mon, 5 Oct 2009 06:36:01 +0000 Subject: [PATCH] --- yaml --- r: 170442 b: refs/heads/master c: 6deac6f2b46f84b8822683cce92eab4edf2ade5e h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/igb/e1000_mac.c | 7 +++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index eee9175e8193..9b44ad59b634 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 2553bb2681645bf932db2845121b8f33954f6f39 +refs/heads/master: 6deac6f2b46f84b8822683cce92eab4edf2ade5e diff --git a/trunk/drivers/net/igb/e1000_mac.c b/trunk/drivers/net/igb/e1000_mac.c index 4969a5b1cf3c..2ad358a240bf 100644 --- a/trunk/drivers/net/igb/e1000_mac.c +++ b/trunk/drivers/net/igb/e1000_mac.c @@ -247,8 +247,15 @@ void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index) if (rar_low || rar_high) rar_high |= E1000_RAH_AV; + /* + * Some bridges will combine consecutive 32-bit writes into + * a single burst write, which will malfunction on some parts. + * The flushes avoid this. + */ wr32(E1000_RAL(index), rar_low); + wrfl(); wr32(E1000_RAH(index), rar_high); + wrfl(); } /**