From d22c9c418af8f5f68a0403a63f1cf7ab2752d943 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Thu, 6 Sep 2012 22:15:43 +0200 Subject: [PATCH] --- yaml --- r: 329481 b: refs/heads/master c: 0c33d8d7cc825afbaf1d2c546fbb238fc45c607d h: refs/heads/master i: 329479: f3a7d5a40003ea331b267378a17fb3ab2ea4b9bf v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_dp.c | 16 ++++++++-------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/[refs] b/[refs] index a5b287f3cb3f..7961b97ee3e0 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0767935e8682157dc98bee03f821faa08b944fe8 +refs/heads/master: 0c33d8d7cc825afbaf1d2c546fbb238fc45c607d diff --git a/trunk/drivers/gpu/drm/i915/intel_dp.c b/trunk/drivers/gpu/drm/i915/intel_dp.c index 0f8480037cf0..8a70df0c32bb 100644 --- a/trunk/drivers/gpu/drm/i915/intel_dp.c +++ b/trunk/drivers/gpu/drm/i915/intel_dp.c @@ -1333,15 +1333,15 @@ static void intel_enable_dp(struct intel_encoder *encoder) struct drm_i915_private *dev_priv = dev->dev_private; uint32_t dp_reg = I915_READ(intel_dp->output_reg); + if (WARN_ON(dp_reg & DP_PORT_EN)) + return; + ironlake_edp_panel_vdd_on(intel_dp); intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); - if (!(dp_reg & DP_PORT_EN)) { - intel_dp_start_link_train(intel_dp); - ironlake_edp_panel_on(intel_dp); - ironlake_edp_panel_vdd_off(intel_dp, true); - intel_dp_complete_link_train(intel_dp); - } else - ironlake_edp_panel_vdd_off(intel_dp, false); + intel_dp_start_link_train(intel_dp); + ironlake_edp_panel_on(intel_dp); + ironlake_edp_panel_vdd_off(intel_dp, true); + intel_dp_complete_link_train(intel_dp); ironlake_edp_backlight_on(intel_dp); } @@ -1900,7 +1900,7 @@ intel_dp_link_down(struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = dev->dev_private; uint32_t DP = intel_dp->DP; - if ((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0) + if (WARN_ON((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0)) return; DRM_DEBUG_KMS("\n");