From d24b68f53532d359c1ff870eb705d91beb56bbbf Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Mon, 13 Sep 2010 09:57:44 +1000 Subject: [PATCH] --- yaml --- r: 218196 b: refs/heads/master c: 17b20348ea94a92a54898c518b514c564d12e4c3 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/nouveau/nouveau_sgdma.c | 7 +++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index 94811d08d7f3..6718e49633f7 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 24b102d3488c9d201915d070a519e07098e0cd30 +refs/heads/master: 17b20348ea94a92a54898c518b514c564d12e4c3 diff --git a/trunk/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/trunk/drivers/gpu/drm/nouveau/nouveau_sgdma.c index 5a66a7ae6e29..c0b79659419b 100644 --- a/trunk/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/trunk/drivers/gpu/drm/nouveau/nouveau_sgdma.c @@ -151,7 +151,7 @@ nouveau_sgdma_unbind(struct ttm_backend *be) nv_wo32(gpuobj, (pte * 4) + 0, dma_offset | 3); pte += 1; } else { - nv_wo32(gpuobj, (pte * 4), dma_offset | 0x21); + nv_wo32(gpuobj, (pte * 4) + 0, 0x00000000); nv_wo32(gpuobj, (pte * 4) + 4, 0x00000000); pte += 2; } @@ -279,9 +279,8 @@ nouveau_sgdma_init(struct drm_device *dev) } } else { for (i = 0; i < obj_size; i += 8) { - nv_wo32(gpuobj, i + 0, - dev_priv->gart_info.sg_dummy_bus | 0x21); - nv_wo32(gpuobj, i + 4, 0); + nv_wo32(gpuobj, i + 0, 0x00000000); + nv_wo32(gpuobj, i + 4, 0x00000000); } } dev_priv->engine.instmem.flush(dev);