From d4c207a30231909a489ab85fb98a3cf387edea68 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 18 May 2012 12:29:22 +0900 Subject: [PATCH] --- yaml --- r: 305258 b: refs/heads/master c: e55387e9bfd24b6e415f27ab90ca1702f47304aa h: refs/heads/master v: v3 --- [refs] | 2 +- .../feature-removal-schedule.txt | 10 + trunk/MAINTAINERS | 5 +- trunk/Makefile | 2 +- trunk/arch/arm/mach-exynos/Kconfig | 3 + trunk/arch/arm/mach-exynos/clock-exynos5.c | 2 +- .../arm/mach-exynos/mach-universal_c210.c | 4 +- trunk/arch/arm/mach-prima2/irq.c | 6 +- trunk/arch/arm/mach-shmobile/board-ag5evm.c | 22 +- trunk/arch/arm/mach-shmobile/board-mackerel.c | 22 +- trunk/arch/arm/mach-shmobile/headsmp.S | 56 +- .../arm/mach-shmobile/include/mach/common.h | 2 +- trunk/arch/arm/mach-shmobile/setup-r8a7779.c | 4 + trunk/arch/arm/mach-shmobile/setup-sh73a0.c | 4 + trunk/arch/arm/mach-shmobile/smp-r8a7779.c | 8 +- trunk/arch/arm/mach-shmobile/smp-sh73a0.c | 7 +- trunk/arch/arm/mach-shmobile/timer.c | 9 - trunk/arch/arm/mach-tegra/flowctrl.c | 4 +- trunk/arch/arm/mm/fault.c | 4 +- trunk/arch/arm/mm/mmu.c | 3 +- trunk/arch/arm/vfp/vfpmodule.c | 24 +- trunk/arch/m68k/platform/520x/config.c | 6 +- trunk/arch/m68k/platform/523x/config.c | 6 +- trunk/arch/m68k/platform/5249/config.c | 6 +- trunk/arch/m68k/platform/527x/config.c | 6 +- trunk/arch/m68k/platform/528x/config.c | 6 +- trunk/arch/m68k/platform/532x/config.c | 6 +- trunk/arch/m68k/platform/coldfire/device.c | 6 +- trunk/arch/mn10300/kernel/smp.c | 9 +- trunk/arch/parisc/include/asm/hardware.h | 3 +- trunk/arch/parisc/include/asm/page.h | 6 + trunk/arch/parisc/include/asm/pdc.h | 7 - trunk/arch/parisc/include/asm/pgtable.h | 2 + trunk/arch/parisc/include/asm/spinlock.h | 2 + trunk/arch/parisc/kernel/pdc_cons.c | 1 + trunk/arch/parisc/kernel/smp.c | 8 +- trunk/arch/parisc/kernel/time.c | 1 + trunk/arch/powerpc/include/asm/kvm_book3s.h | 7 +- trunk/arch/powerpc/kernel/entry_64.S | 44 +- trunk/arch/powerpc/kernel/irq.c | 13 + trunk/arch/powerpc/kvm/book3s_64_mmu_host.c | 13 +- trunk/arch/powerpc/kvm/book3s_hv_rm_mmu.c | 1 + trunk/arch/powerpc/kvm/book3s_segment.S | 42 +- trunk/arch/sh/Kconfig | 42 +- trunk/arch/sh/Makefile | 4 - trunk/arch/sh/boards/Kconfig | 7 +- trunk/arch/sh/boards/mach-rsk/Kconfig | 10 - trunk/arch/sh/boards/mach-rsk/Makefile | 2 - .../arch/sh/boards/mach-rsk/devices-rsk7264.c | 58 - .../arch/sh/boards/mach-rsk/devices-rsk7269.c | 60 - trunk/arch/sh/configs/rsk7264_defconfig | 80 - trunk/arch/sh/configs/rsk7269_defconfig | 65 - trunk/arch/sh/include/asm/fixmap.h | 4 +- trunk/arch/sh/include/asm/io.h | 5 - trunk/arch/sh/include/asm/io_noioport.h | 41 - trunk/arch/sh/include/asm/kdebug.h | 2 - trunk/arch/sh/include/asm/kgdb.h | 30 +- trunk/arch/sh/include/asm/pgtable_64.h | 3 + trunk/arch/sh/include/asm/processor.h | 5 +- trunk/arch/sh/include/asm/processor_64.h | 3 + trunk/arch/sh/include/asm/stackprotector.h | 27 - trunk/arch/sh/include/asm/thread_info.h | 46 +- trunk/arch/sh/include/asm/traps_64.h | 14 - trunk/arch/sh/include/cpu-sh2a/cpu/sh7264.h | 176 -- trunk/arch/sh/include/cpu-sh2a/cpu/sh7269.h | 201 -- trunk/arch/sh/include/cpu-sh4/cpu/freq.h | 5 - trunk/arch/sh/include/cpu-sh4/cpu/sh7734.h | 306 -- trunk/arch/sh/kernel/cpu/proc.c | 4 +- trunk/arch/sh/kernel/cpu/sh2/setup-sh7619.c | 6 +- trunk/arch/sh/kernel/cpu/sh2a/Makefile | 4 - trunk/arch/sh/kernel/cpu/sh2a/clock-sh7264.c | 153 - trunk/arch/sh/kernel/cpu/sh2a/clock-sh7269.c | 184 -- trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c | 2136 ------------- trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c | 2800 ----------------- trunk/arch/sh/kernel/cpu/sh2a/probe.c | 6 - trunk/arch/sh/kernel/cpu/sh2a/setup-mxg.c | 2 +- trunk/arch/sh/kernel/cpu/sh2a/setup-sh7201.c | 16 +- trunk/arch/sh/kernel/cpu/sh2a/setup-sh7203.c | 8 +- trunk/arch/sh/kernel/cpu/sh2a/setup-sh7206.c | 8 +- trunk/arch/sh/kernel/cpu/sh2a/setup-sh7264.c | 606 ---- trunk/arch/sh/kernel/cpu/sh2a/setup-sh7269.c | 615 ---- trunk/arch/sh/kernel/cpu/sh3/entry.S | 11 +- trunk/arch/sh/kernel/cpu/sh3/setup-sh7705.c | 4 +- trunk/arch/sh/kernel/cpu/sh3/setup-sh770x.c | 6 +- trunk/arch/sh/kernel/cpu/sh3/setup-sh7710.c | 4 +- trunk/arch/sh/kernel/cpu/sh3/setup-sh7720.c | 4 +- trunk/arch/sh/kernel/cpu/sh4/probe.c | 3 - trunk/arch/sh/kernel/cpu/sh4/setup-sh7750.c | 4 +- trunk/arch/sh/kernel/cpu/sh4a/Makefile | 3 - trunk/arch/sh/kernel/cpu/sh4a/clock-sh7734.c | 266 -- trunk/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c | 2497 --------------- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 8 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 2 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 6 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 6 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 12 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7734.c | 800 ----- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 6 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7763.c | 6 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7770.c | 20 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 12 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 39 +- trunk/arch/sh/kernel/cpu/sh5/entry.S | 22 +- trunk/arch/sh/kernel/cpu/sh5/fpu.c | 3 + trunk/arch/sh/kernel/kgdb.c | 105 +- trunk/arch/sh/kernel/process.c | 7 - trunk/arch/sh/kernel/process_32.c | 5 - trunk/arch/sh/kernel/traps_64.c | 2 + trunk/arch/sh/mm/Makefile | 8 +- trunk/arch/sh/mm/fault.c | 508 --- trunk/arch/sh/mm/fault_32.c | 374 +++ trunk/arch/sh/mm/fault_64.c | 265 ++ trunk/arch/sh/mm/tlb-sh5.c | 40 - trunk/arch/sh/mm/tlbex_32.c | 78 - trunk/arch/sh/mm/tlbex_64.c | 166 - trunk/arch/sh/mm/tlbflush_64.c | 294 +- trunk/arch/sh/tools/mach-types | 2 - trunk/arch/sparc/kernel/central.c | 2 +- trunk/arch/sparc/mm/ultra.S | 6 +- trunk/arch/tile/include/asm/thread_info.h | 9 +- trunk/arch/tile/kernel/compat_signal.c | 12 +- trunk/arch/tile/kernel/intvec_32.S | 41 +- trunk/arch/tile/kernel/intvec_64.S | 38 +- trunk/arch/tile/kernel/process.c | 7 +- trunk/arch/x86/include/asm/kvm_para.h | 3 + trunk/arch/x86/kernel/acpi/boot.c | 2 +- trunk/arch/x86/kernel/microcode_intel.c | 14 +- trunk/drivers/acpi/bus.c | 4 + trunk/drivers/acpi/power.c | 9 +- trunk/drivers/acpi/scan.c | 4 + trunk/drivers/block/drbd/drbd_nl.c | 2 +- trunk/drivers/char/virtio_console.c | 7 + trunk/drivers/crypto/Kconfig | 1 + trunk/drivers/dma/at_hdmac.c | 4 +- trunk/drivers/dma/ep93xx_dma.c | 4 +- trunk/drivers/dma/pl330.c | 3 +- trunk/drivers/gpio/gpio-omap.c | 9 +- trunk/drivers/gpio/gpio-pch.c | 57 +- trunk/drivers/gpio/gpio-samsung.c | 18 +- trunk/drivers/leds/leds-netxbig.c | 4 +- trunk/drivers/leds/leds-ns2.c | 2 +- trunk/drivers/md/dm-log-userspace-transfer.c | 2 +- trunk/drivers/md/dm-mpath.c | 4 +- trunk/drivers/md/dm-thin.c | 16 +- trunk/drivers/md/md.c | 2 + trunk/drivers/md/raid10.c | 56 +- .../drivers/media/dvb/dvb-core/dvb_frontend.c | 4 + trunk/drivers/media/rc/ene_ir.c | 32 +- trunk/drivers/media/rc/fintek-cir.c | 22 +- trunk/drivers/media/rc/ite-cir.c | 20 +- trunk/drivers/media/rc/nuvoton-cir.c | 36 +- trunk/drivers/media/rc/winbond-cir.c | 78 +- trunk/drivers/media/video/gspca/sonixj.c | 8 +- .../media/video/marvell-ccic/mmp-driver.c | 1 - .../media/video/s5p-fimc/fimc-capture.c | 33 +- .../drivers/media/video/s5p-fimc/fimc-core.c | 4 +- .../drivers/media/video/s5p-fimc/fimc-core.h | 2 +- trunk/drivers/media/video/soc_camera.c | 8 +- .../media/video/videobuf2-dma-contig.c | 3 +- trunk/drivers/media/video/videobuf2-memops.c | 1 + trunk/drivers/mtd/mtdchar.c | 2 +- trunk/drivers/mtd/nand/ams-delta.c | 17 +- trunk/drivers/net/bonding/bond_3ad.c | 18 +- trunk/drivers/net/bonding/bond_3ad.h | 2 +- trunk/drivers/net/bonding/bond_alb.c | 12 +- trunk/drivers/net/bonding/bond_main.c | 16 +- trunk/drivers/net/bonding/bonding.h | 2 +- .../net/ethernet/broadcom/bnx2x/bnx2x_main.c | 23 +- .../drivers/net/ethernet/ibm/ehea/ehea_main.c | 2 + .../net/ethernet/intel/e1000/e1000_main.c | 10 +- .../drivers/net/ethernet/intel/igb/igb_main.c | 24 +- .../drivers/net/ethernet/intel/ixgbe/ixgbe.h | 3 - .../net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c | 43 +- .../net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 2 + .../net/ethernet/intel/ixgbe/ixgbe_main.c | 10 +- trunk/drivers/net/ethernet/micrel/ks8851.c | 7 +- .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 2 - .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 25 +- trunk/drivers/net/ethernet/realtek/r8169.c | 16 +- trunk/drivers/net/ethernet/sfc/efx.c | 2 +- trunk/drivers/net/macvlan.c | 2 +- trunk/drivers/net/macvtap.c | 43 +- trunk/drivers/net/usb/cdc_ether.c | 30 +- trunk/drivers/net/usb/usbnet.c | 54 +- trunk/drivers/net/virtio_net.c | 2 + .../net/wireless/ath/ath9k/ar9003_phy.c | 4 +- .../wireless/brcm80211/brcmfmac/dhd_sdio.c | 1 + .../drivers/net/wireless/iwlwifi/iwl-agn-rx.c | 21 +- .../net/wireless/iwlwifi/iwl-trans-pcie-rx.c | 3 +- .../drivers/net/wireless/iwlwifi/iwl-trans.h | 1 + trunk/drivers/net/wireless/rtlwifi/pci.c | 16 +- trunk/drivers/net/wireless/rtlwifi/usb.c | 10 +- trunk/drivers/parisc/sba_iommu.c | 1 + trunk/drivers/pci/pci-acpi.c | 2 +- trunk/drivers/ptp/ptp_pch.c | 1 + trunk/drivers/remoteproc/remoteproc_core.c | 2 +- trunk/drivers/scsi/hosts.c | 3 + trunk/drivers/scsi/qla2xxx/qla_bsg.c | 3 + trunk/drivers/scsi/qla2xxx/qla_dbg.c | 2 +- trunk/drivers/scsi/qla2xxx/qla_isr.c | 15 +- trunk/drivers/scsi/qla2xxx/qla_nx.c | 1 + trunk/drivers/scsi/qla2xxx/qla_os.c | 18 +- trunk/drivers/scsi/qla2xxx/qla_sup.c | 3 + trunk/drivers/scsi/qla2xxx/qla_version.h | 6 +- trunk/drivers/scsi/virtio_scsi.c | 24 +- trunk/drivers/sh/clk/cpg.c | 77 +- trunk/drivers/target/target_core_file.c | 22 +- trunk/drivers/target/target_core_pr.c | 3 + trunk/drivers/target/target_core_tpg.c | 22 - trunk/drivers/tty/serial/sh-sci.c | 30 +- trunk/drivers/tty/vt/keyboard.c | 2 +- trunk/drivers/vhost/net.c | 7 +- trunk/drivers/video/console/sticore.c | 2 + trunk/drivers/video/uvesafb.c | 2 +- trunk/drivers/virtio/virtio_balloon.c | 1 + trunk/drivers/watchdog/Kconfig | 1 - trunk/drivers/watchdog/shwdt.c | 306 +- trunk/fs/cifs/cifsfs.c | 2 +- trunk/fs/cifs/connect.c | 3 +- trunk/fs/jffs2/gc.c | 2 +- trunk/fs/proc/task_mmu.c | 12 +- trunk/include/linux/etherdevice.h | 11 +- trunk/include/linux/ftrace_event.h | 2 + trunk/include/linux/netdevice.h | 9 - .../linux/netfilter/ipset/ip_set_ahash.h | 16 + trunk/include/linux/serial_sci.h | 2 - trunk/include/linux/sh_clk.h | 34 +- trunk/include/linux/usb/usbnet.h | 3 +- trunk/include/media/soc_camera.h | 3 +- trunk/include/net/bluetooth/bluetooth.h | 1 + trunk/include/net/sctp/sctp.h | 13 + trunk/kernel/compat.c | 63 +- trunk/kernel/fork.c | 3 + trunk/kernel/irq/chip.c | 1 + trunk/kernel/irq/irqdesc.c | 1 + trunk/kernel/sched/core.c | 2 + trunk/kernel/trace/trace_events.c | 5 +- trunk/kernel/trace/trace_export.c | 1 + trunk/mm/hugetlb.c | 1 - trunk/mm/memcontrol.c | 6 + trunk/mm/nobootmem.c | 3 +- trunk/mm/page_alloc.c | 2 +- trunk/mm/percpu.c | 12 + trunk/net/8021q/vlan_dev.c | 2 +- trunk/net/bluetooth/af_bluetooth.c | 2 +- trunk/net/bluetooth/hci_core.c | 8 + trunk/net/bluetooth/hci_event.c | 11 +- trunk/net/bluetooth/l2cap_core.c | 5 + trunk/net/bluetooth/l2cap_sock.c | 12 +- trunk/net/core/dev.c | 36 +- trunk/net/core/pktgen.c | 10 +- trunk/net/ipv4/fib_trie.c | 2 + trunk/net/ipv4/tcp.c | 3 +- trunk/net/netfilter/ipset/ip_set_hash_ip.c | 10 +- .../net/netfilter/ipset/ip_set_hash_ipport.c | 10 +- .../netfilter/ipset/ip_set_hash_ipportip.c | 10 +- .../netfilter/ipset/ip_set_hash_ipportnet.c | 10 +- trunk/net/netfilter/ipset/ip_set_hash_net.c | 10 +- .../netfilter/ipset/ip_set_hash_netiface.c | 10 +- .../net/netfilter/ipset/ip_set_hash_netport.c | 10 +- trunk/net/openvswitch/datapath.c | 29 +- trunk/net/openvswitch/flow.c | 3 +- trunk/net/sctp/output.c | 4 +- trunk/net/sctp/transport.c | 17 - trunk/net/sunrpc/auth_gss/gss_mech_switch.c | 7 +- trunk/sound/pci/echoaudio/echoaudio_dsp.c | 2 +- trunk/sound/pci/hda/hda_codec.c | 4 - trunk/sound/pci/hda/hda_intel.c | 20 +- trunk/sound/pci/hda/patch_realtek.c | 16 +- trunk/sound/pci/hda/patch_sigmatel.c | 6 +- trunk/sound/pci/rme9652/hdsp.c | 1 + trunk/sound/soc/codecs/cs42l73.c | 16 +- trunk/sound/soc/codecs/wm8994.c | 2 +- trunk/sound/soc/sh/migor.c | 2 +- trunk/tools/perf/Makefile | 4 +- trunk/tools/perf/builtin-stat.c | 40 +- trunk/tools/perf/util/header.c | 2 +- 277 files changed, 2666 insertions(+), 13204 deletions(-) delete mode 100644 trunk/arch/sh/boards/mach-rsk/devices-rsk7264.c delete mode 100644 trunk/arch/sh/boards/mach-rsk/devices-rsk7269.c delete mode 100644 trunk/arch/sh/configs/rsk7264_defconfig delete mode 100644 trunk/arch/sh/configs/rsk7269_defconfig delete mode 100644 trunk/arch/sh/include/asm/io_noioport.h delete mode 100644 trunk/arch/sh/include/asm/stackprotector.h delete mode 100644 trunk/arch/sh/include/cpu-sh2a/cpu/sh7264.h delete mode 100644 trunk/arch/sh/include/cpu-sh2a/cpu/sh7269.h delete mode 100644 trunk/arch/sh/include/cpu-sh4/cpu/sh7734.h delete mode 100644 trunk/arch/sh/kernel/cpu/sh2a/clock-sh7264.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh2a/clock-sh7269.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh2a/setup-sh7264.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh2a/setup-sh7269.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh4a/clock-sh7734.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh4a/setup-sh7734.c delete mode 100644 trunk/arch/sh/mm/fault.c create mode 100644 trunk/arch/sh/mm/fault_32.c create mode 100644 trunk/arch/sh/mm/fault_64.c delete mode 100644 trunk/arch/sh/mm/tlbex_32.c delete mode 100644 trunk/arch/sh/mm/tlbex_64.c diff --git a/[refs] b/[refs] index 14dba455a082..32662f9c36cc 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 00d6025e58c6e3b229e28cab721c568af5b1ae05 +refs/heads/master: e55387e9bfd24b6e415f27ab90ca1702f47304aa diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt index 03ca210406ed..e4b57756b9f5 100644 --- a/trunk/Documentation/feature-removal-schedule.txt +++ b/trunk/Documentation/feature-removal-schedule.txt @@ -539,3 +539,13 @@ When: 3.6 Why: setitimer is not returning -EFAULT if user pointer is NULL. This violates the spec. Who: Sasikantha Babu + +---------------------------- + +What: V4L2_CID_HCENTER, V4L2_CID_VCENTER V4L2 controls +When: 3.7 +Why: The V4L2_CID_VCENTER, V4L2_CID_HCENTER controls have been deprecated + for about 4 years and they are not used by any mainline driver. + There are newer controls (V4L2_CID_PAN*, V4L2_CID_TILT*) that provide + similar functionality. +Who: Sylwester Nawrocki diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index c369da4543aa..b36270986501 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -1968,7 +1968,9 @@ S: Maintained F: drivers/net/ethernet/ti/cpmac.c CPU FREQUENCY DRIVERS +M: Rafael J. Wysocki L: cpufreq@vger.kernel.org +L: linux-pm@vger.kernel.org S: Maintained F: drivers/cpufreq/ F: include/linux/cpufreq.h @@ -4034,6 +4036,7 @@ F: Documentation/scsi/53c700.txt F: drivers/scsi/53c700* LED SUBSYSTEM +M: Bryan Wu M: Richard Purdie S: Maintained F: drivers/leds/ @@ -6549,7 +6552,7 @@ M: Paul Mundt L: linux-sh@vger.kernel.org W: http://www.linux-sh.org Q: http://patchwork.kernel.org/project/linux-sh/list/ -T: git git://github.com/pmundt/linux-sh.git sh-latest +T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6.git sh-latest S: Supported F: Documentation/sh/ F: arch/sh/ diff --git a/trunk/Makefile b/trunk/Makefile index 9e384ae6c403..48bd1f50dcc3 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 4 SUBLEVEL = 0 -EXTRAVERSION = -rc6 +EXTRAVERSION = -rc7 NAME = Saber-toothed Squirrel # *DOCUMENTATION* diff --git a/trunk/arch/arm/mach-exynos/Kconfig b/trunk/arch/arm/mach-exynos/Kconfig index e81c35f936b5..b8df521fb68e 100644 --- a/trunk/arch/arm/mach-exynos/Kconfig +++ b/trunk/arch/arm/mach-exynos/Kconfig @@ -232,6 +232,9 @@ config MACH_ARMLEX4210 config MACH_UNIVERSAL_C210 bool "Mobile UNIVERSAL_C210 Board" select CPU_EXYNOS4210 + select S5P_HRT + select CLKSRC_MMIO + select HAVE_SCHED_CLOCK select S5P_GPIO_INT select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 diff --git a/trunk/arch/arm/mach-exynos/clock-exynos5.c b/trunk/arch/arm/mach-exynos/clock-exynos5.c index 5cd7a8b8868c..7ac6ff4c46bd 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos5.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos5.c @@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = { .name = "dma", .devname = "dma-pl330.1", .enable = exynos5_clk_ip_fsys_ctrl, - .ctrlbit = (1 << 1), + .ctrlbit = (1 << 2), }; static struct clk exynos5_clk_mdma1 = { diff --git a/trunk/arch/arm/mach-exynos/mach-universal_c210.c b/trunk/arch/arm/mach-exynos/mach-universal_c210.c index cb2b027f09a6..a34036eb8ba2 100644 --- a/trunk/arch/arm/mach-exynos/mach-universal_c210.c +++ b/trunk/arch/arm/mach-exynos/mach-universal_c210.c @@ -40,6 +40,7 @@ #include #include #include +#include #include #include @@ -1063,6 +1064,7 @@ static void __init universal_map_io(void) exynos_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); + s5p_set_timer_source(S5P_PWM2, S5P_PWM4); } static void s5p_tv_setup(void) @@ -1113,7 +1115,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") .map_io = universal_map_io, .handle_irq = gic_handle_irq, .init_machine = universal_machine_init, - .timer = &exynos4_timer, + .timer = &s5p_timer, .reserve = &universal_reserve, .restart = exynos4_restart, MACHINE_END diff --git a/trunk/arch/arm/mach-prima2/irq.c b/trunk/arch/arm/mach-prima2/irq.c index 37c2de9b6f26..a7b9415d30f8 100644 --- a/trunk/arch/arm/mach-prima2/irq.c +++ b/trunk/arch/arm/mach-prima2/irq.c @@ -42,7 +42,8 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) static __init void sirfsoc_irq_init(void) { sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32); - sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, SIRFSOC_INTENAL_IRQ_END - 32); + sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, + SIRFSOC_INTENAL_IRQ_END + 1 - 32); writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0); writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1); @@ -68,7 +69,8 @@ void __init sirfsoc_of_irq_init(void) if (!sirfsoc_intc_base) panic("unable to map intc cpu registers\n"); - irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL); + irq_domain_add_legacy(np, SIRFSOC_INTENAL_IRQ_END + 1, 0, 0, + &irq_domain_simple_ops, NULL); of_node_put(np); diff --git a/trunk/arch/arm/mach-shmobile/board-ag5evm.c b/trunk/arch/arm/mach-shmobile/board-ag5evm.c index cb224a344af0..0891ec6e27f5 100644 --- a/trunk/arch/arm/mach-shmobile/board-ag5evm.c +++ b/trunk/arch/arm/mach-shmobile/board-ag5evm.c @@ -365,23 +365,13 @@ static struct platform_device mipidsi0_device = { }; /* SDHI0 */ -static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg) -{ - struct device *dev = arg; - struct sh_mobile_sdhi_info *info = dev->platform_data; - struct tmio_mmc_data *pdata = info->pdata; - - tmio_mmc_cd_wakeup(pdata); - - return IRQ_HANDLED; -} - static struct sh_mobile_sdhi_info sdhi0_info = { .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, - .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, + .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD, .tmio_caps = MMC_CAP_SD_HIGHSPEED, .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, + .cd_gpio = GPIO_PORT251, }; static struct resource sdhi0_resources[] = { @@ -557,7 +547,6 @@ static void __init ag5evm_init(void) lcd_backlight_reset(); /* enable SDHI0 on CN15 [SD I/F] */ - gpio_request(GPIO_FN_SDHICD0, NULL); gpio_request(GPIO_FN_SDHIWP0, NULL); gpio_request(GPIO_FN_SDHICMD0, NULL); gpio_request(GPIO_FN_SDHICLK0, NULL); @@ -566,13 +555,6 @@ static void __init ag5evm_init(void) gpio_request(GPIO_FN_SDHID0_1, NULL); gpio_request(GPIO_FN_SDHID0_0, NULL); - if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd, - IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, - "sdhi0 cd", &sdhi0_device.dev)) - sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD; - else - pr_warn("Unable to setup SDHI0 GPIO IRQ\n"); - /* enable SDHI1 on CN4 [WLAN I/F] */ gpio_request(GPIO_FN_SDHICLK1, NULL); gpio_request(GPIO_FN_SDHICMD1_PU, NULL); diff --git a/trunk/arch/arm/mach-shmobile/board-mackerel.c b/trunk/arch/arm/mach-shmobile/board-mackerel.c index f49e28abe0ab..8c6202bb6aeb 100644 --- a/trunk/arch/arm/mach-shmobile/board-mackerel.c +++ b/trunk/arch/arm/mach-shmobile/board-mackerel.c @@ -1011,21 +1011,12 @@ static int slot_cn7_get_cd(struct platform_device *pdev) } /* SDHI0 */ -static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg) -{ - struct device *dev = arg; - struct sh_mobile_sdhi_info *info = dev->platform_data; - struct tmio_mmc_data *pdata = info->pdata; - - tmio_mmc_cd_wakeup(pdata); - - return IRQ_HANDLED; -} - static struct sh_mobile_sdhi_info sdhi0_info = { .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, + .tmio_flags = TMIO_MMC_USE_GPIO_CD, .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, + .cd_gpio = GPIO_PORT172, }; static struct resource sdhi0_resources[] = { @@ -1384,7 +1375,6 @@ static void __init mackerel_init(void) { u32 srcr4; struct clk *clk; - int ret; /* External clock source */ clk_set_rate(&sh7372_dv_clki_clk, 27000000); @@ -1481,7 +1471,6 @@ static void __init mackerel_init(void) irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); /* enable SDHI0 */ - gpio_request(GPIO_FN_SDHICD0, NULL); gpio_request(GPIO_FN_SDHIWP0, NULL); gpio_request(GPIO_FN_SDHICMD0, NULL); gpio_request(GPIO_FN_SDHICLK0, NULL); @@ -1490,13 +1479,6 @@ static void __init mackerel_init(void) gpio_request(GPIO_FN_SDHID0_1, NULL); gpio_request(GPIO_FN_SDHID0_0, NULL); - ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd, - IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev); - if (!ret) - sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD; - else - pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret); - #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) /* enable SDHI1 */ gpio_request(GPIO_FN_SDHICMD1, NULL); diff --git a/trunk/arch/arm/mach-shmobile/headsmp.S b/trunk/arch/arm/mach-shmobile/headsmp.S index 6ac015c89206..b202c1272526 100644 --- a/trunk/arch/arm/mach-shmobile/headsmp.S +++ b/trunk/arch/arm/mach-shmobile/headsmp.S @@ -16,6 +16,59 @@ __CPUINIT +/* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks! + * + * The secondary kernel init calls v7_flush_dcache_all before it enables + * the L1; however, the L1 comes out of reset in an undefined state, so + * the clean + invalidate performed by v7_flush_dcache_all causes a bunch + * of cache lines with uninitialized data and uninitialized tags to get + * written out to memory, which does really unpleasant things to the main + * processor. We fix this by performing an invalidate, rather than a + * clean + invalidate, before jumping into the kernel. + * + * This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs + * to be called for both secondary cores startup and primary core resume + * procedures. Ideally, it should be moved into arch/arm/mm/cache-v7.S. + */ +ENTRY(v7_invalidate_l1) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mcr p15, 2, r0, c0, c0, 0 + mrc p15, 1, r0, c0, c0, 0 + + ldr r1, =0x7fff + and r2, r1, r0, lsr #13 + + ldr r1, =0x3ff + + and r3, r1, r0, lsr #3 @ NumWays - 1 + add r2, r2, #1 @ NumSets + + and r0, r0, #0x7 + add r0, r0, #4 @ SetShift + + clz r1, r3 @ WayShift + add r4, r3, #1 @ NumWays +1: sub r2, r2, #1 @ NumSets-- + mov r3, r4 @ Temp = NumWays +2: subs r3, r3, #1 @ Temp-- + mov r5, r3, lsl r1 + mov r6, r2, lsl r0 + orr r5, r5, r6 @ Reg = (Temp<vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) + /* Don't allow expansion below FIRST_USER_ADDRESS */ + if (vma->vm_flags & VM_GROWSDOWN && + addr >= FIRST_USER_ADDRESS && !expand_stack(vma, addr)) goto good_area; out: return fault; diff --git a/trunk/arch/arm/mm/mmu.c b/trunk/arch/arm/mm/mmu.c index 2c7cf2f9c837..aa78de8bfdd3 100644 --- a/trunk/arch/arm/mm/mmu.c +++ b/trunk/arch/arm/mm/mmu.c @@ -489,7 +489,8 @@ static void __init build_mem_type_table(void) */ for (i = 0; i < ARRAY_SIZE(mem_types); i++) { mem_types[i].prot_pte |= PTE_EXT_AF; - mem_types[i].prot_sect |= PMD_SECT_AF; + if (mem_types[i].prot_sect) + mem_types[i].prot_sect |= PMD_SECT_AF; } kern_pgprot |= PTE_EXT_AF; vecs_pgprot |= PTE_EXT_AF; diff --git a/trunk/arch/arm/vfp/vfpmodule.c b/trunk/arch/arm/vfp/vfpmodule.c index bc683b8219b5..b0197b2c857d 100644 --- a/trunk/arch/arm/vfp/vfpmodule.c +++ b/trunk/arch/arm/vfp/vfpmodule.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -432,7 +433,10 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) static void vfp_enable(void *unused) { - u32 access = get_copro_access(); + u32 access; + + BUG_ON(preemptible()); + access = get_copro_access(); /* * Enable full access to VFP (cp10 and cp11) @@ -573,12 +577,6 @@ int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp, * entry. */ hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK); - - /* - * Disable VFP in the hwstate so that we can detect if it gets - * used. - */ - hwstate->fpexc &= ~FPEXC_EN; return 0; } @@ -591,12 +589,8 @@ int vfp_restore_user_hwstate(struct user_vfp __user *ufp, unsigned long fpexc; int err = 0; - /* - * If VFP has been used, then disable it to avoid corrupting - * the new thread state. - */ - if (hwstate->fpexc & FPEXC_EN) - vfp_flush_hwstate(thread); + /* Disable VFP to avoid corrupting the new thread state. */ + vfp_flush_hwstate(thread); /* * Copy the floating point registers. There can be unused @@ -657,7 +651,7 @@ static int __init vfp_init(void) unsigned int cpu_arch = cpu_architecture(); if (cpu_arch >= CPU_ARCH_ARMv6) - vfp_enable(NULL); + on_each_cpu(vfp_enable, NULL, 1); /* * First check that there is a VFP that we can use. @@ -678,8 +672,6 @@ static int __init vfp_init(void) } else { hotcpu_notifier(vfp_hotplug, 0); - smp_call_function(vfp_enable, NULL, 1); - VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */ printk("implementor %02x architecture %d part %02x variant %x rev %x\n", (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, diff --git a/trunk/arch/m68k/platform/520x/config.c b/trunk/arch/m68k/platform/520x/config.c index 235947844f27..09df4b89e8be 100644 --- a/trunk/arch/m68k/platform/520x/config.c +++ b/trunk/arch/m68k/platform/520x/config.c @@ -22,7 +22,7 @@ /***************************************************************************/ -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) static void __init m520x_qspi_init(void) { @@ -35,7 +35,7 @@ static void __init m520x_qspi_init(void) writew(par, MCF_GPIO_PAR_UART); } -#endif /* CONFIG_SPI_COLDFIRE_QSPI */ +#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ /***************************************************************************/ @@ -79,7 +79,7 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m520x_uarts_init(); m520x_fec_init(); -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m520x_qspi_init(); #endif } diff --git a/trunk/arch/m68k/platform/523x/config.c b/trunk/arch/m68k/platform/523x/config.c index c8b405d5a961..d47dfd8f50a2 100644 --- a/trunk/arch/m68k/platform/523x/config.c +++ b/trunk/arch/m68k/platform/523x/config.c @@ -22,7 +22,7 @@ /***************************************************************************/ -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) static void __init m523x_qspi_init(void) { @@ -36,7 +36,7 @@ static void __init m523x_qspi_init(void) writew(par, MCFGPIO_PAR_TIMER); } -#endif /* CONFIG_SPI_COLDFIRE_QSPI */ +#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ /***************************************************************************/ @@ -58,7 +58,7 @@ void __init config_BSP(char *commandp, int size) { mach_sched_init = hw_timer_init; m523x_fec_init(); -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m523x_qspi_init(); #endif } diff --git a/trunk/arch/m68k/platform/5249/config.c b/trunk/arch/m68k/platform/5249/config.c index bbf05135bb98..300e729a58d0 100644 --- a/trunk/arch/m68k/platform/5249/config.c +++ b/trunk/arch/m68k/platform/5249/config.c @@ -51,7 +51,7 @@ static struct platform_device *m5249_devices[] __initdata = { /***************************************************************************/ -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) static void __init m5249_qspi_init(void) { @@ -61,7 +61,7 @@ static void __init m5249_qspi_init(void) mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); } -#endif /* CONFIG_SPI_COLDFIRE_QSPI */ +#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ /***************************************************************************/ @@ -90,7 +90,7 @@ void __init config_BSP(char *commandp, int size) #ifdef CONFIG_M5249C3 m5249_smc91x_init(); #endif -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m5249_qspi_init(); #endif } diff --git a/trunk/arch/m68k/platform/527x/config.c b/trunk/arch/m68k/platform/527x/config.c index f91a53294c35..b3cb378c5e94 100644 --- a/trunk/arch/m68k/platform/527x/config.c +++ b/trunk/arch/m68k/platform/527x/config.c @@ -23,7 +23,7 @@ /***************************************************************************/ -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) static void __init m527x_qspi_init(void) { @@ -42,7 +42,7 @@ static void __init m527x_qspi_init(void) #endif } -#endif /* CONFIG_SPI_COLDFIRE_QSPI */ +#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ /***************************************************************************/ @@ -90,7 +90,7 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m527x_uarts_init(); m527x_fec_init(); -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m527x_qspi_init(); #endif } diff --git a/trunk/arch/m68k/platform/528x/config.c b/trunk/arch/m68k/platform/528x/config.c index d4492926614c..c5f11ba49be5 100644 --- a/trunk/arch/m68k/platform/528x/config.c +++ b/trunk/arch/m68k/platform/528x/config.c @@ -24,7 +24,7 @@ /***************************************************************************/ -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) static void __init m528x_qspi_init(void) { @@ -32,7 +32,7 @@ static void __init m528x_qspi_init(void) __raw_writeb(0x07, MCFGPIO_PQSPAR); } -#endif /* CONFIG_SPI_COLDFIRE_QSPI */ +#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ /***************************************************************************/ @@ -98,7 +98,7 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m528x_uarts_init(); m528x_fec_init(); -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m528x_qspi_init(); #endif } diff --git a/trunk/arch/m68k/platform/532x/config.c b/trunk/arch/m68k/platform/532x/config.c index 2bec3477b739..37082d02f2bd 100644 --- a/trunk/arch/m68k/platform/532x/config.c +++ b/trunk/arch/m68k/platform/532x/config.c @@ -30,7 +30,7 @@ /***************************************************************************/ -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) static void __init m532x_qspi_init(void) { @@ -38,7 +38,7 @@ static void __init m532x_qspi_init(void) writew(0x01f0, MCF_GPIO_PAR_QSPI); } -#endif /* CONFIG_SPI_COLDFIRE_QSPI */ +#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ /***************************************************************************/ @@ -77,7 +77,7 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m532x_uarts_init(); m532x_fec_init(); -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m532x_qspi_init(); #endif diff --git a/trunk/arch/m68k/platform/coldfire/device.c b/trunk/arch/m68k/platform/coldfire/device.c index 7af97362b95c..3aa77ddea89d 100644 --- a/trunk/arch/m68k/platform/coldfire/device.c +++ b/trunk/arch/m68k/platform/coldfire/device.c @@ -121,7 +121,7 @@ static struct platform_device mcf_fec1 = { #endif /* MCFFEC_BASE1 */ #endif /* CONFIG_FEC */ -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) /* * The ColdFire QSPI module is an SPI protocol hardware block used * on a number of different ColdFire CPUs. @@ -274,7 +274,7 @@ static struct platform_device mcf_qspi = { .resource = mcf_qspi_resources, .dev.platform_data = &mcf_qspi_data, }; -#endif /* CONFIG_SPI_COLDFIRE_QSPI */ +#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ static struct platform_device *mcf_devices[] __initdata = { &mcf_uart, @@ -284,7 +284,7 @@ static struct platform_device *mcf_devices[] __initdata = { &mcf_fec1, #endif #endif -#ifdef CONFIG_SPI_COLDFIRE_QSPI +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) &mcf_qspi, #endif }; diff --git a/trunk/arch/mn10300/kernel/smp.c b/trunk/arch/mn10300/kernel/smp.c index 910dddf65e44..9cd69ad6aa02 100644 --- a/trunk/arch/mn10300/kernel/smp.c +++ b/trunk/arch/mn10300/kernel/smp.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -38,7 +39,6 @@ #include "internal.h" #ifdef CONFIG_HOTPLUG_CPU -#include #include static unsigned long sleep_mode[NR_CPUS]; @@ -874,10 +874,13 @@ static void __init smp_online(void) cpu = smp_processor_id(); - local_irq_enable(); + notify_cpu_starting(cpu); + ipi_call_lock(); set_cpu_online(cpu, true); - smp_wmb(); + ipi_call_unlock(); + + local_irq_enable(); } /** diff --git a/trunk/arch/parisc/include/asm/hardware.h b/trunk/arch/parisc/include/asm/hardware.h index 4e9626836bab..d1d864b81bae 100644 --- a/trunk/arch/parisc/include/asm/hardware.h +++ b/trunk/arch/parisc/include/asm/hardware.h @@ -2,7 +2,6 @@ #define _PARISC_HARDWARE_H #include -#include #define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID #define HVERSION_ANY_ID PA_HVERSION_ANY_ID @@ -95,12 +94,14 @@ struct bc_module { #define HPHW_MC 15 #define HPHW_FAULTY 31 +struct parisc_device_id; /* hardware.c: */ extern const char *parisc_hardware_description(struct parisc_device_id *id); extern enum cpu_type parisc_get_cpu_type(unsigned long hversion); struct pci_dev; +struct hardware_path; /* drivers.c: */ extern struct parisc_device *alloc_pa_dev(unsigned long hpa, diff --git a/trunk/arch/parisc/include/asm/page.h b/trunk/arch/parisc/include/asm/page.h index a84cc1f925f6..4e0e7dbf0f3f 100644 --- a/trunk/arch/parisc/include/asm/page.h +++ b/trunk/arch/parisc/include/asm/page.h @@ -160,5 +160,11 @@ extern int npmem_ranges; #include #include +#include + +#define PAGE0 ((struct zeropage *)__PAGE_OFFSET) + +/* DEFINITION OF THE ZERO-PAGE (PAG0) */ +/* based on work by Jason Eckhardt (jason@equator.com) */ #endif /* _PARISC_PAGE_H */ diff --git a/trunk/arch/parisc/include/asm/pdc.h b/trunk/arch/parisc/include/asm/pdc.h index 4ca510b3c6f8..7f0f2d23059d 100644 --- a/trunk/arch/parisc/include/asm/pdc.h +++ b/trunk/arch/parisc/include/asm/pdc.h @@ -343,8 +343,6 @@ #ifdef __KERNEL__ -#include /* for __PAGE_OFFSET */ - extern int pdc_type; /* Values for pdc_type */ @@ -677,11 +675,6 @@ static inline char * os_id_to_string(u16 os_id) { #endif /* __KERNEL__ */ -#define PAGE0 ((struct zeropage *)__PAGE_OFFSET) - -/* DEFINITION OF THE ZERO-PAGE (PAG0) */ -/* based on work by Jason Eckhardt (jason@equator.com) */ - /* flags of the device_path */ #define PF_AUTOBOOT 0x80 #define PF_AUTOSEARCH 0x40 diff --git a/trunk/arch/parisc/include/asm/pgtable.h b/trunk/arch/parisc/include/asm/pgtable.h index 22dadeb58695..ee99f2339356 100644 --- a/trunk/arch/parisc/include/asm/pgtable.h +++ b/trunk/arch/parisc/include/asm/pgtable.h @@ -44,6 +44,8 @@ struct vm_area_struct; #endif /* !__ASSEMBLY__ */ +#include + #define pte_ERROR(e) \ printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) #define pmd_ERROR(e) \ diff --git a/trunk/arch/parisc/include/asm/spinlock.h b/trunk/arch/parisc/include/asm/spinlock.h index 804aa28ab1d6..3516e0b27044 100644 --- a/trunk/arch/parisc/include/asm/spinlock.h +++ b/trunk/arch/parisc/include/asm/spinlock.h @@ -1,6 +1,8 @@ #ifndef __ASM_SPINLOCK_H #define __ASM_SPINLOCK_H +#include +#include #include #include diff --git a/trunk/arch/parisc/kernel/pdc_cons.c b/trunk/arch/parisc/kernel/pdc_cons.c index 0b3393381a81..47341aa208f2 100644 --- a/trunk/arch/parisc/kernel/pdc_cons.c +++ b/trunk/arch/parisc/kernel/pdc_cons.c @@ -50,6 +50,7 @@ #include #include #include +#include /* for PAGE0 */ #include /* for iodc_call() proto and friends */ static DEFINE_SPINLOCK(pdc_console_lock); diff --git a/trunk/arch/parisc/kernel/smp.c b/trunk/arch/parisc/kernel/smp.c index 0bb1d63907f8..4dc7b7942b4c 100644 --- a/trunk/arch/parisc/kernel/smp.c +++ b/trunk/arch/parisc/kernel/smp.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -295,8 +296,13 @@ smp_cpu_init(int cpunum) printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum); machine_halt(); - } + } + + notify_cpu_starting(cpunum); + + ipi_call_lock(); set_cpu_online(cpunum, true); + ipi_call_unlock(); /* Initialise the idle task for this CPU */ atomic_inc(&init_mm.mm_count); diff --git a/trunk/arch/parisc/kernel/time.c b/trunk/arch/parisc/kernel/time.c index 7c0774397b89..70e105d62423 100644 --- a/trunk/arch/parisc/kernel/time.c +++ b/trunk/arch/parisc/kernel/time.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include diff --git a/trunk/arch/powerpc/include/asm/kvm_book3s.h b/trunk/arch/powerpc/include/asm/kvm_book3s.h index aa795ccef294..fd07f43d6622 100644 --- a/trunk/arch/powerpc/include/asm/kvm_book3s.h +++ b/trunk/arch/powerpc/include/asm/kvm_book3s.h @@ -81,12 +81,13 @@ struct kvmppc_vcpu_book3s { u64 sdr1; u64 hior; u64 msr_mask; - u64 vsid_next; #ifdef CONFIG_PPC_BOOK3S_32 u32 vsid_pool[VSID_POOL_SIZE]; + u32 vsid_next; #else - u64 vsid_first; - u64 vsid_max; + u64 proto_vsid_first; + u64 proto_vsid_max; + u64 proto_vsid_next; #endif int context_id[SID_CONTEXTS]; diff --git a/trunk/arch/powerpc/kernel/entry_64.S b/trunk/arch/powerpc/kernel/entry_64.S index fc6015027a86..ef2074c3e906 100644 --- a/trunk/arch/powerpc/kernel/entry_64.S +++ b/trunk/arch/powerpc/kernel/entry_64.S @@ -588,23 +588,19 @@ _GLOBAL(ret_from_except_lite) fast_exc_return_irq: restore: /* - * This is the main kernel exit path, we first check if we - * have to change our interrupt state. + * This is the main kernel exit path. First we check if we + * are about to re-enable interrupts */ ld r5,SOFTE(r1) lbz r6,PACASOFTIRQEN(r13) - cmpwi cr1,r5,0 - cmpw cr0,r5,r6 - beq cr0,4f + cmpwi cr0,r5,0 + beq restore_irq_off - /* We do, handle disable first, which is easy */ - bne cr1,3f; - li r0,0 - stb r0,PACASOFTIRQEN(r13); - TRACE_DISABLE_INTS - b 4f + /* We are enabling, were we already enabled ? Yes, just return */ + cmpwi cr0,r6,1 + beq cr0,do_restore -3: /* + /* * We are about to soft-enable interrupts (we are hard disabled * at this point). We check if there's anything that needs to * be replayed first. @@ -626,7 +622,7 @@ restore_no_replay: /* * Final return path. BookE is handled in a different file */ -4: +do_restore: #ifdef CONFIG_PPC_BOOK3E b .exception_return_book3e #else @@ -699,6 +695,25 @@ fast_exception_return: #endif /* CONFIG_PPC_BOOK3E */ + /* + * We are returning to a context with interrupts soft disabled. + * + * However, we may also about to hard enable, so we need to + * make sure that in this case, we also clear PACA_IRQ_HARD_DIS + * or that bit can get out of sync and bad things will happen + */ +restore_irq_off: + ld r3,_MSR(r1) + lbz r7,PACAIRQHAPPENED(r13) + andi. r0,r3,MSR_EE + beq 1f + rlwinm r7,r7,0,~PACA_IRQ_HARD_DIS + stb r7,PACAIRQHAPPENED(r13) +1: li r0,0 + stb r0,PACASOFTIRQEN(r13); + TRACE_DISABLE_INTS + b do_restore + /* * Something did happen, check if a re-emit is needed * (this also clears paca->irq_happened) @@ -748,6 +763,9 @@ restore_check_irq_replay: #endif /* CONFIG_PPC_BOOK3E */ 1: b .ret_from_except /* What else to do here ? */ + + +3: do_work: #ifdef CONFIG_PREEMPT andi. r0,r3,MSR_PR /* Returning to user mode? */ diff --git a/trunk/arch/powerpc/kernel/irq.c b/trunk/arch/powerpc/kernel/irq.c index c6c6f3b7f8cd..641da9e868ce 100644 --- a/trunk/arch/powerpc/kernel/irq.c +++ b/trunk/arch/powerpc/kernel/irq.c @@ -229,6 +229,19 @@ notrace void arch_local_irq_restore(unsigned long en) */ if (unlikely(irq_happened != PACA_IRQ_HARD_DIS)) __hard_irq_disable(); +#ifdef CONFIG_TRACE_IRQFLAG + else { + /* + * We should already be hard disabled here. We had bugs + * where that wasn't the case so let's dbl check it and + * warn if we are wrong. Only do that when IRQ tracing + * is enabled as mfmsr() can be costly. + */ + if (WARN_ON(mfmsr() & MSR_EE)) + __hard_irq_disable(); + } +#endif /* CONFIG_TRACE_IRQFLAG */ + set_soft_enabled(0); /* diff --git a/trunk/arch/powerpc/kvm/book3s_64_mmu_host.c b/trunk/arch/powerpc/kvm/book3s_64_mmu_host.c index 6f87f39a1ac2..10fc8ec9d2a8 100644 --- a/trunk/arch/powerpc/kvm/book3s_64_mmu_host.c +++ b/trunk/arch/powerpc/kvm/book3s_64_mmu_host.c @@ -194,14 +194,14 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid) backwards_map = !backwards_map; /* Uh-oh ... out of mappings. Let's flush! */ - if (vcpu_book3s->vsid_next == vcpu_book3s->vsid_max) { - vcpu_book3s->vsid_next = vcpu_book3s->vsid_first; + if (vcpu_book3s->proto_vsid_next == vcpu_book3s->proto_vsid_max) { + vcpu_book3s->proto_vsid_next = vcpu_book3s->proto_vsid_first; memset(vcpu_book3s->sid_map, 0, sizeof(struct kvmppc_sid_map) * SID_MAP_NUM); kvmppc_mmu_pte_flush(vcpu, 0, 0); kvmppc_mmu_flush_segments(vcpu); } - map->host_vsid = vcpu_book3s->vsid_next++; + map->host_vsid = vsid_scramble(vcpu_book3s->proto_vsid_next++, 256M); map->guest_vsid = gvsid; map->valid = true; @@ -319,9 +319,10 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu) return -1; vcpu3s->context_id[0] = err; - vcpu3s->vsid_max = ((vcpu3s->context_id[0] + 1) << USER_ESID_BITS) - 1; - vcpu3s->vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS; - vcpu3s->vsid_next = vcpu3s->vsid_first; + vcpu3s->proto_vsid_max = ((vcpu3s->context_id[0] + 1) + << USER_ESID_BITS) - 1; + vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS; + vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first; kvmppc_mmu_hpte_init(vcpu); diff --git a/trunk/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/trunk/arch/powerpc/kvm/book3s_hv_rm_mmu.c index def880aea63a..cec4daddbf31 100644 --- a/trunk/arch/powerpc/kvm/book3s_hv_rm_mmu.c +++ b/trunk/arch/powerpc/kvm/book3s_hv_rm_mmu.c @@ -463,6 +463,7 @@ long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu) /* insert R and C bits from PTE */ rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); args[j] |= rcbits << (56 - 5); + hp[0] = 0; continue; } diff --git a/trunk/arch/powerpc/kvm/book3s_segment.S b/trunk/arch/powerpc/kvm/book3s_segment.S index 0676ae249b9f..6e6e9cef34a8 100644 --- a/trunk/arch/powerpc/kvm/book3s_segment.S +++ b/trunk/arch/powerpc/kvm/book3s_segment.S @@ -197,7 +197,8 @@ kvmppc_interrupt: /* Save guest PC and MSR */ #ifdef CONFIG_PPC64 BEGIN_FTR_SECTION - andi. r0,r12,0x2 + andi. r0, r12, 0x2 + cmpwi cr1, r0, 0 beq 1f mfspr r3,SPRN_HSRR0 mfspr r4,SPRN_HSRR1 @@ -250,6 +251,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) beq ld_last_prev_inst cmpwi r12, BOOK3S_INTERRUPT_ALIGNMENT beq- ld_last_inst +#ifdef CONFIG_PPC64 +BEGIN_FTR_SECTION + cmpwi r12, BOOK3S_INTERRUPT_H_EMUL_ASSIST + beq- ld_last_inst +END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) +#endif b no_ld_last_inst @@ -316,23 +323,17 @@ no_dcbz32_off: * Having set up SRR0/1 with the address where we want * to continue with relocation on (potentially in module * space), we either just go straight there with rfi[d], - * or we jump to an interrupt handler with bctr if there - * is an interrupt to be handled first. In the latter - * case, the rfi[d] at the end of the interrupt handler - * will get us back to where we want to continue. + * or we jump to an interrupt handler if there is an + * interrupt to be handled first. In the latter case, + * the rfi[d] at the end of the interrupt handler will + * get us back to where we want to continue. */ - cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL - beq 1f - cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER - beq 1f - cmpwi r12, BOOK3S_INTERRUPT_PERFMON -1: mtctr r12 - /* Register usage at this point: * * R1 = host R1 * R2 = host R2 + * R10 = raw exit handler id * R12 = exit handler id * R13 = shadow vcpu (32-bit) or PACA (64-bit) * SVCPU.* = guest * @@ -342,12 +343,25 @@ no_dcbz32_off: PPC_LL r6, HSTATE_HOST_MSR(r13) PPC_LL r8, HSTATE_VMHANDLER(r13) - /* Restore host msr -> SRR1 */ +#ifdef CONFIG_PPC64 +BEGIN_FTR_SECTION + beq cr1, 1f + mtspr SPRN_HSRR1, r6 + mtspr SPRN_HSRR0, r8 +END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) +#endif +1: /* Restore host msr -> SRR1 */ mtsrr1 r6 /* Load highmem handler address */ mtsrr0 r8 /* RFI into the highmem handler, or jump to interrupt handler */ - beqctr + cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL + beqa BOOK3S_INTERRUPT_EXTERNAL + cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER + beqa BOOK3S_INTERRUPT_DECREMENTER + cmpwi r12, BOOK3S_INTERRUPT_PERFMON + beqa BOOK3S_INTERRUPT_PERFMON + RFI kvmppc_handler_trampoline_exit_end: diff --git a/trunk/arch/sh/Kconfig b/trunk/arch/sh/Kconfig index 182384d5d1e0..ff9e033ce626 100644 --- a/trunk/arch/sh/Kconfig +++ b/trunk/arch/sh/Kconfig @@ -288,20 +288,6 @@ config CPU_SUBTYPE_SH7263 select SYS_SUPPORTS_CMT select SYS_SUPPORTS_MTU2 -config CPU_SUBTYPE_SH7264 - bool "Support SH7264 processor" - select CPU_SH2A - select CPU_HAS_FPU - select SYS_SUPPORTS_CMT - select SYS_SUPPORTS_MTU2 - -config CPU_SUBTYPE_SH7269 - bool "Support SH7269 processor" - select CPU_SH2A - select CPU_HAS_FPU - select SYS_SUPPORTS_CMT - select SYS_SUPPORTS_MTU2 - config CPU_SUBTYPE_MXG bool "Support MX-G processor" select CPU_SH2A @@ -441,16 +427,6 @@ config CPU_SUBTYPE_SH7724 help Select SH7724 if you have an SH-MobileR2R CPU. -config CPU_SUBTYPE_SH7734 - bool "Support SH7734 processor" - select CPU_SH4A - select CPU_SHX2 - select ARCH_WANT_OPTIONAL_GPIOLIB - select USB_ARCH_HAS_OHCI - select USB_ARCH_HAS_EHCI - help - Select SH7734 if you have a SH4A SH7734 CPU. - config CPU_SUBTYPE_SH7757 bool "Support SH7757 processor" select CPU_SH4A @@ -608,9 +584,7 @@ config SH_CLK_CPG config SH_CLK_CPG_LEGACY depends on SH_CLK_CPG def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ - !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ - !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ - !CPU_SUBTYPE_SH7269 + !CPU_SHX3 && !CPU_SUBTYPE_SH7757 source "kernel/time/Kconfig" @@ -711,20 +685,6 @@ config SECCOMP If unsure, say N. -config CC_STACKPROTECTOR - bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" - depends on SUPERH32 && EXPERIMENTAL - help - This option turns on the -fstack-protector GCC feature. This - feature puts, at the beginning of functions, a canary value on - the stack just before the return address, and validates - the value just before actually returning. Stack based buffer - overflows (that need to overwrite this return address) now also - overwrite the canary, which gets detected and the attack is then - neutralized via a kernel panic. - - This feature requires gcc version 4.2 or above. - config SMP bool "Symmetric multi-processing support" depends on SYS_SUPPORTS_SMP diff --git a/trunk/arch/sh/Makefile b/trunk/arch/sh/Makefile index 24875c8c1514..3fc0f413777c 100644 --- a/trunk/arch/sh/Makefile +++ b/trunk/arch/sh/Makefile @@ -199,10 +199,6 @@ ifeq ($(CONFIG_DWARF_UNWINDER),y) KBUILD_CFLAGS += -fasynchronous-unwind-tables endif -ifeq ($(CONFIG_CC_STACKPROTECTOR),y) - KBUILD_CFLAGS += -fstack-protector -endif - libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) diff --git a/trunk/arch/sh/boards/Kconfig b/trunk/arch/sh/boards/Kconfig index 3a74b10922e6..d893411022d5 100644 --- a/trunk/arch/sh/boards/Kconfig +++ b/trunk/arch/sh/boards/Kconfig @@ -133,8 +133,7 @@ config SH_RTS7751R2D config SH_RSK bool "Renesas Starter Kit" - depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203 || \ - CPU_SUBTYPE_SH7264 || CPU_SUBTYPE_SH7269 + depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203 help Select this option if configuring for any of the RSK+ MCU evaluation platforms. @@ -339,6 +338,8 @@ config SH_APSH4AD0A help Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A. +endmenu + source "arch/sh/boards/mach-r2d/Kconfig" source "arch/sh/boards/mach-highlander/Kconfig" source "arch/sh/boards/mach-sdk7780/Kconfig" @@ -358,5 +359,3 @@ config SH_MAGIC_PANEL_R2_VERSION endmenu endif - -endmenu diff --git a/trunk/arch/sh/boards/mach-rsk/Kconfig b/trunk/arch/sh/boards/mach-rsk/Kconfig index 458a11ffd022..aeff3b042205 100644 --- a/trunk/arch/sh/boards/mach-rsk/Kconfig +++ b/trunk/arch/sh/boards/mach-rsk/Kconfig @@ -13,16 +13,6 @@ config SH_RSK7203 select ARCH_REQUIRE_GPIOLIB depends on CPU_SUBTYPE_SH7203 -config SH_RSK7264 - bool "RSK2+SH7264" - select ARCH_REQUIRE_GPIOLIB - depends on CPU_SUBTYPE_SH7264 - -config SH_RSK7269 - bool "RSK2+SH7269" - select ARCH_REQUIRE_GPIOLIB - depends on CPU_SUBTYPE_SH7269 - endchoice endif diff --git a/trunk/arch/sh/boards/mach-rsk/Makefile b/trunk/arch/sh/boards/mach-rsk/Makefile index 6a4e1b538a62..498da75ce38b 100644 --- a/trunk/arch/sh/boards/mach-rsk/Makefile +++ b/trunk/arch/sh/boards/mach-rsk/Makefile @@ -1,4 +1,2 @@ obj-y := setup.o obj-$(CONFIG_SH_RSK7203) += devices-rsk7203.o -obj-$(CONFIG_SH_RSK7264) += devices-rsk7264.o -obj-$(CONFIG_SH_RSK7269) += devices-rsk7269.o diff --git a/trunk/arch/sh/boards/mach-rsk/devices-rsk7264.c b/trunk/arch/sh/boards/mach-rsk/devices-rsk7264.c deleted file mode 100644 index 7251e37a842f..000000000000 --- a/trunk/arch/sh/boards/mach-rsk/devices-rsk7264.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * RSK+SH7264 Support. - * - * Copyright (C) 2012 Renesas Electronics Europe - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -static struct smsc911x_platform_config smsc911x_config = { - .phy_interface = PHY_INTERFACE_MODE_MII, - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, - .flags = SMSC911X_USE_16BIT | SMSC911X_SWAP_FIFO, -}; - -static struct resource smsc911x_resources[] = { - [0] = { - .start = 0x28000000, - .end = 0x280000ff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 65, - .end = 65, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device smsc911x_device = { - .name = "smsc911x", - .id = -1, - .num_resources = ARRAY_SIZE(smsc911x_resources), - .resource = smsc911x_resources, - .dev = { - .platform_data = &smsc911x_config, - }, -}; - -static struct platform_device *rsk7264_devices[] __initdata = { - &smsc911x_device, -}; - -static int __init rsk7264_devices_setup(void) -{ - return platform_add_devices(rsk7264_devices, - ARRAY_SIZE(rsk7264_devices)); -} -device_initcall(rsk7264_devices_setup); diff --git a/trunk/arch/sh/boards/mach-rsk/devices-rsk7269.c b/trunk/arch/sh/boards/mach-rsk/devices-rsk7269.c deleted file mode 100644 index 4a544591d6f0..000000000000 --- a/trunk/arch/sh/boards/mach-rsk/devices-rsk7269.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * RSK+SH7269 Support - * - * Copyright (C) 2012 Renesas Electronics Europe Ltd - * Copyright (C) 2012 Phil Edworthy - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static struct smsc911x_platform_config smsc911x_config = { - .phy_interface = PHY_INTERFACE_MODE_MII, - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, - .flags = SMSC911X_USE_16BIT | SMSC911X_SWAP_FIFO, -}; - -static struct resource smsc911x_resources[] = { - [0] = { - .start = 0x24000000, - .end = 0x240000ff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 85, - .end = 85, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device smsc911x_device = { - .name = "smsc911x", - .id = -1, - .num_resources = ARRAY_SIZE(smsc911x_resources), - .resource = smsc911x_resources, - .dev = { - .platform_data = &smsc911x_config, - }, -}; - -static struct platform_device *rsk7269_devices[] __initdata = { - &smsc911x_device, -}; - -static int __init rsk7269_devices_setup(void) -{ - return platform_add_devices(rsk7269_devices, - ARRAY_SIZE(rsk7269_devices)); -} -device_initcall(rsk7269_devices_setup); diff --git a/trunk/arch/sh/configs/rsk7264_defconfig b/trunk/arch/sh/configs/rsk7264_defconfig deleted file mode 100644 index 1600426224c2..000000000000 --- a/trunk/arch/sh/configs/rsk7264_defconfig +++ /dev/null @@ -1,80 +0,0 @@ -CONFIG_LOCALVERSION="uClinux RSK2+SH7264" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_NAMESPACES=y -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -CONFIG_PERF_COUNTERS=y -# CONFIG_VM_EVENT_COUNTERS is not set -CONFIG_SLAB=y -CONFIG_MMAP_ALLOW_UNINITIALIZED=y -CONFIG_PROFILING=y -# CONFIG_LBDAF is not set -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_CPU_SUBTYPE_SH7264=y -CONFIG_MEMORY_START=0x0c000000 -CONFIG_FLATMEM_MANUAL=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_SH_RSK=y -# CONFIG_SH_TIMER_MTU2 is not set -CONFIG_BINFMT_FLAT=y -CONFIG_NET=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_FW_LOADER is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=4 -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_SMSC911X=y -CONFIG_SMSC_PHY=y -CONFIG_INPUT_FF_MEMLESS=y -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=8 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -# CONFIG_HWMON is not set -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_R8A66597_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_STORAGE_DEBUG=y -CONFIG_USB_LIBUSUAL=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_VFAT_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -# CONFIG_ENABLE_MUST_CHECK is not set -# CONFIG_FTRACE is not set diff --git a/trunk/arch/sh/configs/rsk7269_defconfig b/trunk/arch/sh/configs/rsk7269_defconfig deleted file mode 100644 index 9f062b5837d7..000000000000 --- a/trunk/arch/sh/configs/rsk7269_defconfig +++ /dev/null @@ -1,65 +0,0 @@ -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_EMBEDDED=y -# CONFIG_VM_EVENT_COUNTERS is not set -CONFIG_SLAB=y -# CONFIG_LBDAF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_SWAP_IO_SPACE=y -CONFIG_CPU_SUBTYPE_SH7269=y -CONFIG_MEMORY_START=0x0c000000 -CONFIG_MEMORY_SIZE=0x02000000 -CONFIG_FLATMEM_MANUAL=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_SH_RSK=y -# CONFIG_SH_TIMER_MTU2 is not set -CONFIG_SH_PCLK_FREQ=66700000 -CONFIG_BINFMT_FLAT=y -CONFIG_NET=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_NETDEVICES=y -CONFIG_SMSC911X=y -CONFIG_SMSC_PHY=y -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=8 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -# CONFIG_HWMON is not set -CONFIG_USB=y -CONFIG_USB_DEBUG=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_R8A66597_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_STORAGE_DEBUG=y -CONFIG_USB_LIBUSUAL=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_VFAT_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y -# CONFIG_FTRACE is not set diff --git a/trunk/arch/sh/include/asm/fixmap.h b/trunk/arch/sh/include/asm/fixmap.h index 41cda1264bb0..bd7e79a12653 100644 --- a/trunk/arch/sh/include/asm/fixmap.h +++ b/trunk/arch/sh/include/asm/fixmap.h @@ -94,9 +94,9 @@ extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags); * at the top of mem.. */ #ifdef CONFIG_SUPERH32 -#define FIXADDR_TOP (P3_ADDR_MAX - PAGE_SIZE) +#define FIXADDR_TOP (P4SEG - PAGE_SIZE) #else -#define FIXADDR_TOP ((unsigned long)(-PAGE_SIZE)) +#define FIXADDR_TOP (0xff000000 - PAGE_SIZE) #endif #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) diff --git a/trunk/arch/sh/include/asm/io.h b/trunk/arch/sh/include/asm/io.h index 0cf60a628814..ec464a6b95fe 100644 --- a/trunk/arch/sh/include/asm/io.h +++ b/trunk/arch/sh/include/asm/io.h @@ -218,13 +218,8 @@ __BUILD_IOPORT_STRING(w, u16) __BUILD_IOPORT_STRING(l, u32) __BUILD_IOPORT_STRING(q, u64) -#else /* !CONFIG_HAS_IOPORT */ - -#include - #endif - #define IO_SPACE_LIMIT 0xffffffff /* synco on SH-4A, otherwise a nop */ diff --git a/trunk/arch/sh/include/asm/io_noioport.h b/trunk/arch/sh/include/asm/io_noioport.h deleted file mode 100644 index e136d28d1d2e..000000000000 --- a/trunk/arch/sh/include/asm/io_noioport.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef __ASM_SH_IO_NOIOPORT_H -#define __ASM_SH_IO_NOIOPORT_H - -static inline u8 inb(unsigned long addr) -{ - BUG(); - return -1; -} - -static inline u16 inw(unsigned long addr) -{ - BUG(); - return -1; -} - -static inline u32 inl(unsigned long addr) -{ - BUG(); - return -1; -} - -#define outb(x, y) BUG() -#define outw(x, y) BUG() -#define outl(x, y) BUG() - -#define inb_p(addr) inb(addr) -#define inw_p(addr) inw(addr) -#define inl_p(addr) inl(addr) -#define outb_p(x, addr) outb((x), (addr)) -#define outw_p(x, addr) outw((x), (addr)) -#define outl_p(x, addr) outl((x), (addr)) - -#define insb(a, b, c) BUG() -#define insw(a, b, c) BUG() -#define insl(a, b, c) BUG() - -#define outsb(a, b, c) BUG() -#define outsw(a, b, c) BUG() -#define outsl(a, b, c) BUG() - -#endif /* __ASM_SH_IO_NOIOPORT_H */ diff --git a/trunk/arch/sh/include/asm/kdebug.h b/trunk/arch/sh/include/asm/kdebug.h index a6201f10c273..5f6d2e9ccb7c 100644 --- a/trunk/arch/sh/include/asm/kdebug.h +++ b/trunk/arch/sh/include/asm/kdebug.h @@ -10,6 +10,4 @@ enum die_val { DIE_SSTEP, }; -extern void printk_address(unsigned long address, int reliable); - #endif /* __ASM_SH_KDEBUG_H */ diff --git a/trunk/arch/sh/include/asm/kgdb.h b/trunk/arch/sh/include/asm/kgdb.h index 9e7d2d1b03e0..f3613952d1ae 100644 --- a/trunk/arch/sh/include/asm/kgdb.h +++ b/trunk/arch/sh/include/asm/kgdb.h @@ -4,6 +4,18 @@ #include #include +/* Same as pt_regs but has vbr in place of syscall_nr */ +struct kgdb_regs { + unsigned long regs[16]; + unsigned long pc; + unsigned long pr; + unsigned long sr; + unsigned long gbr; + unsigned long mach; + unsigned long macl; + unsigned long vbr; +}; + enum regnames { GDB_R0, GDB_R1, GDB_R2, GDB_R3, GDB_R4, GDB_R5, GDB_R6, GDB_R7, GDB_R8, GDB_R9, GDB_R10, GDB_R11, GDB_R12, GDB_R13, GDB_R14, GDB_R15, @@ -11,27 +23,17 @@ enum regnames { GDB_PC, GDB_PR, GDB_SR, GDB_GBR, GDB_MACH, GDB_MACL, GDB_VBR, }; -#define _GP_REGS 16 -#define _EXTRA_REGS 7 -#define GDB_SIZEOF_REG sizeof(u32) - -#define DBG_MAX_REG_NUM (_GP_REGS + _EXTRA_REGS) -#define NUMREGBYTES (DBG_MAX_REG_NUM * sizeof(GDB_SIZEOF_REG)) +#define NUMREGBYTES ((GDB_VBR + 1) * 4) static inline void arch_kgdb_breakpoint(void) { __asm__ __volatile__ ("trapa #0x3c\n"); } -#define BREAK_INSTR_SIZE 2 -#define BUFMAX 2048 - -#ifdef CONFIG_SMP -# define CACHE_FLUSH_IS_SAFE 0 -#else -# define CACHE_FLUSH_IS_SAFE 1 -#endif +#define BUFMAX 2048 +#define CACHE_FLUSH_IS_SAFE 1 +#define BREAK_INSTR_SIZE 2 #define GDB_ADJUSTS_BREAK_OFFSET #endif /* __ASM_SH_KGDB_H */ diff --git a/trunk/arch/sh/include/asm/pgtable_64.h b/trunk/arch/sh/include/asm/pgtable_64.h index dda8c82601b9..42cb9dd52161 100644 --- a/trunk/arch/sh/include/asm/pgtable_64.h +++ b/trunk/arch/sh/include/asm/pgtable_64.h @@ -87,6 +87,9 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) #define pte_unmap(pte) do { } while (0) #ifndef __ASSEMBLY__ +#define IOBASE_VADDR 0xff000000 +#define IOBASE_END 0xffffffff + /* * PTEL coherent flags. * See Chapter 17 ST50 CPU Core Volume 1, Architecture. diff --git a/trunk/arch/sh/include/asm/processor.h b/trunk/arch/sh/include/asm/processor.h index 793b664ef7ff..a229c393826a 100644 --- a/trunk/arch/sh/include/asm/processor.h +++ b/trunk/arch/sh/include/asm/processor.h @@ -18,8 +18,7 @@ enum cpu_type { CPU_SH7619, /* SH-2A types */ - CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_SH7264, CPU_SH7269, - CPU_MXG, + CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG, /* SH-3 types */ CPU_SH7705, CPU_SH7706, CPU_SH7707, @@ -33,7 +32,7 @@ enum cpu_type { /* SH-4A types */ CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786, - CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SH7734, CPU_SHX3, + CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3, /* SH4AL-DSP types */ CPU_SH7343, CPU_SH7722, CPU_SH7366, CPU_SH7372, diff --git a/trunk/arch/sh/include/asm/processor_64.h b/trunk/arch/sh/include/asm/processor_64.h index 740e26876596..e25c4c7d6b63 100644 --- a/trunk/arch/sh/include/asm/processor_64.h +++ b/trunk/arch/sh/include/asm/processor_64.h @@ -121,6 +121,7 @@ struct thread_struct { NULL for a kernel thread. */ struct pt_regs *uregs; + unsigned long trap_no, error_code; unsigned long address; /* Hardware debugging registers may come here */ @@ -137,6 +138,8 @@ struct thread_struct { .pc = 0, \ .kregs = &fake_swapper_regs, \ .uregs = NULL, \ + .trap_no = 0, \ + .error_code = 0, \ .address = 0, \ .flags = 0, \ } diff --git a/trunk/arch/sh/include/asm/stackprotector.h b/trunk/arch/sh/include/asm/stackprotector.h deleted file mode 100644 index d9df3a76847c..000000000000 --- a/trunk/arch/sh/include/asm/stackprotector.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef __ASM_SH_STACKPROTECTOR_H -#define __ASM_SH_STACKPROTECTOR_H - -#include -#include - -extern unsigned long __stack_chk_guard; - -/* - * Initialize the stackprotector canary value. - * - * NOTE: this must only be called from functions that never return, - * and it must always be inlined. - */ -static __always_inline void boot_init_stack_canary(void) -{ - unsigned long canary; - - /* Try to get a semi random initial value. */ - get_random_bytes(&canary, sizeof(canary)); - canary ^= LINUX_VERSION_CODE; - - current->stack_canary = canary; - __stack_chk_guard = current->stack_canary; -} - -#endif /* __ASM_SH_STACKPROTECTOR_H */ diff --git a/trunk/arch/sh/include/asm/thread_info.h b/trunk/arch/sh/include/asm/thread_info.h index 25a13e534ffe..20ee40af16e9 100644 --- a/trunk/arch/sh/include/asm/thread_info.h +++ b/trunk/arch/sh/include/asm/thread_info.h @@ -10,18 +10,8 @@ * - Incorporating suggestions made by Linus Torvalds and Dave Miller */ #ifdef __KERNEL__ - #include -/* - * Page fault error code bits - */ -#define FAULT_CODE_WRITE (1 << 0) /* write access */ -#define FAULT_CODE_INITIAL (1 << 1) /* initial page write */ -#define FAULT_CODE_ITLB (1 << 2) /* ITLB miss */ -#define FAULT_CODE_PROT (1 << 3) /* protection fault */ -#define FAULT_CODE_USER (1 << 4) /* user-mode access */ - #ifndef __ASSEMBLY__ #include @@ -117,13 +107,10 @@ extern void init_thread_xstate(void); #endif /* __ASSEMBLY__ */ /* - * Thread information flags - * - * - Limited to 24 bits, upper byte used for fault code encoding. - * - * - _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or - * we blow the tst immediate size constraints and need to fix up - * arch/sh/kernel/entry-common.S. + * thread information flags + * - these are process state flags that various assembly files may need to access + * - pending work-to-be-done flags are in LSW + * - other flags in MSW */ #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ #define TIF_SIGPENDING 1 /* signal pending */ @@ -146,6 +133,12 @@ extern void init_thread_xstate(void); #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) +/* + * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we + * blow the tst immediate size constraints and need to fix up + * arch/sh/kernel/entry-common.S. + */ + /* work to do in syscall trace */ #define _TIF_WORK_SYSCALL_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \ _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ @@ -172,7 +165,6 @@ extern void init_thread_xstate(void); #define TS_USEDFPU 0x0002 /* FPU used by this task this quantum */ #ifndef __ASSEMBLY__ - #define HAVE_SET_RESTORE_SIGMASK 1 static inline void set_restore_sigmask(void) { @@ -180,24 +172,6 @@ static inline void set_restore_sigmask(void) ti->status |= TS_RESTORE_SIGMASK; set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags); } - -#define TI_FLAG_FAULT_CODE_SHIFT 24 - -/* - * Additional thread flag encoding - */ -static inline void set_thread_fault_code(unsigned int val) -{ - struct thread_info *ti = current_thread_info(); - ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT))) - | (val << TI_FLAG_FAULT_CODE_SHIFT); -} - -static inline unsigned int get_thread_fault_code(void) -{ - struct thread_info *ti = current_thread_info(); - return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT; -} #endif /* !__ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/trunk/arch/sh/include/asm/traps_64.h b/trunk/arch/sh/include/asm/traps_64.h index ef5eff919449..c52d7f9a06c1 100644 --- a/trunk/arch/sh/include/asm/traps_64.h +++ b/trunk/arch/sh/include/asm/traps_64.h @@ -10,22 +10,8 @@ #ifndef __ASM_SH_TRAPS_64_H #define __ASM_SH_TRAPS_64_H -#include - extern void phys_stext(void); -#define lookup_exception_vector() \ -({ \ - unsigned long _vec; \ - \ - __asm__ __volatile__ ( \ - "getcon " __EXPEVT ", %0\n\t" \ - : "=r" (_vec) \ - ); \ - \ - _vec; \ -}) - static inline void trigger_address_error(void) { phys_stext(); diff --git a/trunk/arch/sh/include/cpu-sh2a/cpu/sh7264.h b/trunk/arch/sh/include/cpu-sh2a/cpu/sh7264.h deleted file mode 100644 index 4d1ef6d74bd6..000000000000 --- a/trunk/arch/sh/include/cpu-sh2a/cpu/sh7264.h +++ /dev/null @@ -1,176 +0,0 @@ -#ifndef __ASM_SH7264_H__ -#define __ASM_SH7264_H__ - -enum { - /* Port A */ - GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0, - - /* Port B */ - GPIO_PB22, GPIO_PB21, GPIO_PB20, - GPIO_PB19, GPIO_PB18, GPIO_PB17, GPIO_PB16, - GPIO_PB15, GPIO_PB14, GPIO_PB13, GPIO_PB12, - GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8, - GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4, - GPIO_PB3, GPIO_PB2, GPIO_PB1, - - /* Port C */ - GPIO_PC10, GPIO_PC9, GPIO_PC8, - GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4, - GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0, - - /* Port D */ - GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12, - GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8, - GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4, - GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0, - - /* Port E */ - GPIO_PE5, GPIO_PE4, - GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0, - - /* Port F */ - GPIO_PF12, - GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8, - GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4, - GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0, - - /* Port G */ - GPIO_PG24, - GPIO_PG23, GPIO_PG22, GPIO_PG21, GPIO_PG20, - GPIO_PG19, GPIO_PG18, GPIO_PG17, GPIO_PG16, - GPIO_PG15, GPIO_PG14, GPIO_PG13, GPIO_PG12, - GPIO_PG11, GPIO_PG10, GPIO_PG9, GPIO_PG8, - GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4, - GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0, - - /* Port H */ - GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4, - GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0, - - /* Port I - not on device */ - - /* Port J */ - GPIO_PJ11, GPIO_PJ10, GPIO_PJ9, GPIO_PJ8, - GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4, - GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0, - - /* Port K */ - GPIO_PK11, GPIO_PK10, GPIO_PK9, GPIO_PK8, - GPIO_PK7, GPIO_PK6, GPIO_PK5, GPIO_PK4, - GPIO_PK3, GPIO_PK2, GPIO_PK1, GPIO_PK0, - - /* INTC: IRQ and PINT on PB/PD/PE */ - GPIO_FN_PINT7_PG, GPIO_FN_PINT6_PG, GPIO_FN_PINT5_PG, GPIO_FN_PINT4_PG, - GPIO_FN_PINT3_PG, GPIO_FN_PINT2_PG, GPIO_FN_PINT1_PG, - - GPIO_FN_IRQ7_PC, GPIO_FN_IRQ6_PC, GPIO_FN_IRQ5_PC, GPIO_FN_IRQ4_PC, - GPIO_FN_IRQ3_PG, GPIO_FN_IRQ2_PG, GPIO_FN_IRQ1_PJ, GPIO_FN_IRQ0_PJ, - GPIO_FN_IRQ3_PE, GPIO_FN_IRQ2_PE, GPIO_FN_IRQ1_PE, GPIO_FN_IRQ0_PE, - - /* WDT */ - GPIO_FN_WDTOVF, - - /* CAN */ - GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1, - GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1, - - /* DMAC */ - GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0, - GPIO_FN_TEND1, GPIO_FN_DACK1, GPIO_FN_DREQ1, - - /* ADC */ - GPIO_FN_ADTRG, - - /* BSC */ - - GPIO_FN_A25, GPIO_FN_A24, - GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20, - GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16, - GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12, - GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8, - GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4, - GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0, - GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12, - GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8, - GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4, - GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0, - - GPIO_FN_BS, - GPIO_FN_CS4, GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_CS1, GPIO_FN_CS0, - GPIO_FN_CS6CE1B, GPIO_FN_CS5CE1A, - GPIO_FN_CE2A, GPIO_FN_CE2B, - GPIO_FN_RD, GPIO_FN_RDWR, - GPIO_FN_ICIOWRAH, GPIO_FN_ICIORD, - GPIO_FN_WE1DQMUWE, GPIO_FN_WE0DQML, - GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE, - GPIO_FN_WAIT, GPIO_FN_BREQ, GPIO_FN_BACK, - GPIO_FN_IOIS16, - - /* TMU */ - GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A, - GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A, - GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A, - GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A, - GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA, - - /* SSU */ - GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD, - GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF, - GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD, - GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF, - - /* SCIF */ - GPIO_FN_SCK0, GPIO_FN_SCK1, GPIO_FN_SCK2, GPIO_FN_SCK3, - GPIO_FN_RXD0, GPIO_FN_RXD1, GPIO_FN_RXD2, GPIO_FN_RXD3, - GPIO_FN_TXD0, GPIO_FN_TXD1, GPIO_FN_TXD2, GPIO_FN_TXD3, - GPIO_FN_RXD4, GPIO_FN_RXD5, GPIO_FN_RXD6, GPIO_FN_RXD7, - GPIO_FN_TXD4, GPIO_FN_TXD5, GPIO_FN_TXD6, GPIO_FN_TXD7, - GPIO_FN_RTS1, GPIO_FN_RTS3, GPIO_FN_CTS1, GPIO_FN_CTS3, - - /* RSPI */ - GPIO_FN_RSPCK0, GPIO_FN_MOSI0, - GPIO_FN_MISO0_PF12, GPIO_FN_MISO1, - GPIO_FN_SSL00, - GPIO_FN_RSPCK1, GPIO_FN_MOSI1, - GPIO_FN_MISO1_PG19, GPIO_FN_SSL10, - - /* IIC3 */ - GPIO_FN_SCL0, GPIO_FN_SCL1, GPIO_FN_SCL2, - GPIO_FN_SDA2, GPIO_FN_SDA1, GPIO_FN_SDA0, - - /* SSI */ - GPIO_FN_SSISCK0, GPIO_FN_SSIWS0, GPIO_FN_SSITXD0, GPIO_FN_SSIRXD0, - GPIO_FN_SSIWS1, GPIO_FN_SSIWS2, GPIO_FN_SSIWS3, - GPIO_FN_SSISCK1, GPIO_FN_SSISCK2, GPIO_FN_SSISCK3, - GPIO_FN_SSIDATA1, GPIO_FN_SSIDATA2, GPIO_FN_SSIDATA3, - GPIO_FN_AUDIO_CLK, - - /* SIOF */ - GPIO_FN_SIOFTXD, GPIO_FN_SIOFRXD, GPIO_FN_SIOFSYNC, GPIO_FN_SIOFSCK, - - /* SPDIF */ - GPIO_FN_SPDIF_IN, - GPIO_FN_SPDIF_OUT, - - /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ - GPIO_FN_FCE, - GPIO_FN_FRB, - - /* VDC3 */ - GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC, - GPIO_FN_DV_DATA7, GPIO_FN_DV_DATA6, GPIO_FN_DV_DATA5, GPIO_FN_DV_DATA4, - GPIO_FN_DV_DATA3, GPIO_FN_DV_DATA2, GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0, - GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK, - GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE, - GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14, - GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12, - GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10, - GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8, - GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6, - GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4, - GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2, - GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0, - GPIO_FN_LCD_M_DISP, -}; - -#endif /* __ASM_SH7264_H__ */ diff --git a/trunk/arch/sh/include/cpu-sh2a/cpu/sh7269.h b/trunk/arch/sh/include/cpu-sh2a/cpu/sh7269.h deleted file mode 100644 index 48d14498e774..000000000000 --- a/trunk/arch/sh/include/cpu-sh2a/cpu/sh7269.h +++ /dev/null @@ -1,201 +0,0 @@ -#ifndef __ASM_SH7269_H__ -#define __ASM_SH7269_H__ - -enum { - /* Port A */ - GPIO_PA1, GPIO_PA0, - - /* Port B */ - GPIO_PB22, GPIO_PB21, GPIO_PB20, - GPIO_PB19, GPIO_PB18, GPIO_PB17, GPIO_PB16, - GPIO_PB15, GPIO_PB14, GPIO_PB13, GPIO_PB12, - GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8, - GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4, - GPIO_PB3, GPIO_PB2, GPIO_PB1, - - /* Port C */ - GPIO_PC8, - GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4, - GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0, - - /* Port D */ - GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12, - GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8, - GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4, - GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0, - - /* Port E */ - GPIO_PE7, GPIO_PE6, GPIO_PE5, GPIO_PE4, - GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0, - - /* Port F */ - GPIO_PF23, GPIO_PF22, GPIO_PF21, GPIO_PF20, - GPIO_PF19, GPIO_PF18, GPIO_PF17, GPIO_PF16, - GPIO_PF15, GPIO_PF14, GPIO_PF13, GPIO_PF12, - GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8, - GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4, - GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0, - - /* Port G */ - GPIO_PG27, GPIO_PG26, GPIO_PG25, GPIO_PG24, - GPIO_PG23, GPIO_PG22, GPIO_PG21, GPIO_PG20, - GPIO_PG19, GPIO_PG18, GPIO_PG17, GPIO_PG16, - GPIO_PG15, GPIO_PG14, GPIO_PG13, GPIO_PG12, - GPIO_PG11, GPIO_PG10, GPIO_PG9, GPIO_PG8, - GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4, - GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0, - - /* Port H */ - GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4, - GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0, - - /* Port I - not on device */ - - /* Port J */ - GPIO_PJ31, GPIO_PJ30, GPIO_PJ29, GPIO_PJ28, - GPIO_PJ27, GPIO_PJ26, GPIO_PJ25, GPIO_PJ24, - GPIO_PJ23, GPIO_PJ22, GPIO_PJ21, GPIO_PJ20, - GPIO_PJ19, GPIO_PJ18, GPIO_PJ17, GPIO_PJ16, - GPIO_PJ15, GPIO_PJ14, GPIO_PJ13, GPIO_PJ12, - GPIO_PJ11, GPIO_PJ10, GPIO_PJ9, GPIO_PJ8, - GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4, - GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0, - - /* INTC: IRQ and PINT */ - GPIO_FN_IRQ7_PG, GPIO_FN_IRQ6_PG, GPIO_FN_IRQ5_PG, GPIO_FN_IRQ4_PG, - GPIO_FN_IRQ3_PG, GPIO_FN_IRQ2_PG, GPIO_FN_IRQ1_PG, GPIO_FN_IRQ0_PG, - GPIO_FN_IRQ7_PF, GPIO_FN_IRQ6_PF, GPIO_FN_IRQ5_PF, GPIO_FN_IRQ4_PF, - GPIO_FN_IRQ3_PJ, GPIO_FN_IRQ2_PJ, GPIO_FN_IRQ1_PJ, GPIO_FN_IRQ0_PJ, - GPIO_FN_IRQ1_PC, GPIO_FN_IRQ0_PC, - - GPIO_FN_PINT7_PG, GPIO_FN_PINT6_PG, GPIO_FN_PINT5_PG, GPIO_FN_PINT4_PG, - GPIO_FN_PINT3_PG, GPIO_FN_PINT2_PG, GPIO_FN_PINT1_PG, GPIO_FN_PINT0_PG, - GPIO_FN_PINT7_PH, GPIO_FN_PINT6_PH, GPIO_FN_PINT5_PH, GPIO_FN_PINT4_PH, - GPIO_FN_PINT3_PH, GPIO_FN_PINT2_PH, GPIO_FN_PINT1_PH, GPIO_FN_PINT0_PH, - GPIO_FN_PINT7_PJ, GPIO_FN_PINT6_PJ, GPIO_FN_PINT5_PJ, GPIO_FN_PINT4_PJ, - GPIO_FN_PINT3_PJ, GPIO_FN_PINT2_PJ, GPIO_FN_PINT1_PJ, GPIO_FN_PINT0_PJ, - - /* WDT */ - GPIO_FN_WDTOVF, - - /* CAN */ - GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1, - GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1, GPIO_FN_CRX0_CRX1_CRX2, - - /* DMAC */ - GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0, - GPIO_FN_TEND1, GPIO_FN_DACK1, GPIO_FN_DREQ1, - - /* ADC */ - GPIO_FN_ADTRG, - - /* BSC */ - GPIO_FN_A25, GPIO_FN_A24, - GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20, - GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16, - GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12, - GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8, - GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4, - GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0, - GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12, - GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8, - GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4, - GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0, - - GPIO_FN_BS, - GPIO_FN_CS4, GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_CS1, GPIO_FN_CS0, - GPIO_FN_CS5CE1A, - GPIO_FN_CE2A, GPIO_FN_CE2B, - GPIO_FN_RD, GPIO_FN_RDWR, - GPIO_FN_WE3ICIOWRAHDQMUU, GPIO_FN_WE2ICIORDDQMUL, - GPIO_FN_WE1DQMUWE, GPIO_FN_WE0DQML, - GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE, - GPIO_FN_WAIT, GPIO_FN_BREQ, GPIO_FN_BACK, - GPIO_FN_IOIS16, - - /* TMU */ - GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A, - GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A, - GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A, - GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A, - GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA, - - /* SSU */ - GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD, - GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF, - GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD, - GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF, - - /* SCIF */ - GPIO_FN_SCK0, GPIO_FN_RXD0, GPIO_FN_TXD0, - GPIO_FN_SCK1, GPIO_FN_RXD1, GPIO_FN_TXD1, GPIO_FN_RTS1, GPIO_FN_CTS1, - GPIO_FN_SCK2, GPIO_FN_RXD2, GPIO_FN_TXD2, - GPIO_FN_SCK3, GPIO_FN_RXD3, GPIO_FN_TXD3, - GPIO_FN_SCK4, GPIO_FN_RXD4, GPIO_FN_TXD4, - GPIO_FN_SCK5, GPIO_FN_RXD5, GPIO_FN_TXD5, GPIO_FN_RTS5, GPIO_FN_CTS5, - GPIO_FN_SCK6, GPIO_FN_RXD6, GPIO_FN_TXD6, - GPIO_FN_SCK7, GPIO_FN_RXD7, GPIO_FN_TXD7, GPIO_FN_RTS7, GPIO_FN_CTS7, - - /* RSPI */ - GPIO_FN_MISO0_PJ19, GPIO_FN_MISO0_PB20, - GPIO_FN_MOSI0_PJ18, GPIO_FN_MOSI0_PB19, - GPIO_FN_SSL00_PJ17, GPIO_FN_SSL00_PB18, - GPIO_FN_RSPCK0_PJ16, GPIO_FN_RSPCK0_PB17, - GPIO_FN_RSPCK1, GPIO_FN_MOSI1, - GPIO_FN_MISO1, GPIO_FN_SSL10, - - /* IIC3 */ - GPIO_FN_SCL0, GPIO_FN_SCL1, GPIO_FN_SCL2, - GPIO_FN_SDA2, GPIO_FN_SDA1, GPIO_FN_SDA0, - - /* SSI */ - GPIO_FN_SSISCK0, GPIO_FN_SSIWS0, GPIO_FN_SSITXD0, GPIO_FN_SSIRXD0, - GPIO_FN_SSIWS1, GPIO_FN_SSIWS2, GPIO_FN_SSIWS3, - GPIO_FN_SSISCK1, GPIO_FN_SSISCK2, GPIO_FN_SSISCK3, - GPIO_FN_SSIDATA1, GPIO_FN_SSIDATA2, GPIO_FN_SSIDATA3, - GPIO_FN_AUDIO_CLK, - GPIO_FN_AUDIO_XOUT, - - /* SIOF */ - GPIO_FN_SIOFTXD, GPIO_FN_SIOFRXD, GPIO_FN_SIOFSYNC, GPIO_FN_SIOFSCK, - - /* SPDIF */ - GPIO_FN_SPDIF_IN, - GPIO_FN_SPDIF_OUT, - - /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ - GPIO_FN_FCE, - GPIO_FN_FRB, - - /* VDC */ - GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC, - GPIO_FN_DV_DATA23, GPIO_FN_DV_DATA22, - GPIO_FN_DV_DATA21, GPIO_FN_DV_DATA20, - GPIO_FN_DV_DATA19, GPIO_FN_DV_DATA18, - GPIO_FN_DV_DATA17, GPIO_FN_DV_DATA16, - GPIO_FN_DV_DATA15, GPIO_FN_DV_DATA14, - GPIO_FN_DV_DATA13, GPIO_FN_DV_DATA12, - GPIO_FN_DV_DATA11, GPIO_FN_DV_DATA10, - GPIO_FN_DV_DATA9, GPIO_FN_DV_DATA8, - GPIO_FN_DV_DATA7, GPIO_FN_DV_DATA6, - GPIO_FN_DV_DATA5, GPIO_FN_DV_DATA4, - GPIO_FN_DV_DATA3, GPIO_FN_DV_DATA2, - GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0, - GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK, - GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE, - GPIO_FN_LCD_DATA23, GPIO_FN_LCD_DATA22, - GPIO_FN_LCD_DATA21, GPIO_FN_LCD_DATA20, - GPIO_FN_LCD_DATA19, GPIO_FN_LCD_DATA18, - GPIO_FN_LCD_DATA17, GPIO_FN_LCD_DATA16, - GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14, - GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12, - GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10, - GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8, - GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6, - GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4, - GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2, - GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0, - GPIO_FN_LCD_M_DISP, -}; - -#endif /* __ASM_SH7269_H__ */ diff --git a/trunk/arch/sh/include/cpu-sh4/cpu/freq.h b/trunk/arch/sh/include/cpu-sh4/cpu/freq.h index 1631fc238e6f..cffd25ed0240 100644 --- a/trunk/arch/sh/include/cpu-sh4/cpu/freq.h +++ b/trunk/arch/sh/include/cpu-sh4/cpu/freq.h @@ -47,11 +47,6 @@ #define MSTPCR1 0xa4150034 #define MSTPCR2 0xa4150038 -#elif defined(CONFIG_CPU_SUBTYPE_SH7734) -#define FRQCR0 0xffc80000 -#define FRQCR2 0xffc80008 -#define FRQMR1 0xffc80014 -#define FRQMR2 0xffc80018 #elif defined(CONFIG_CPU_SUBTYPE_SH7785) #define FRQCR0 0xffc80000 #define FRQCR1 0xffc80004 diff --git a/trunk/arch/sh/include/cpu-sh4/cpu/sh7734.h b/trunk/arch/sh/include/cpu-sh4/cpu/sh7734.h deleted file mode 100644 index 2fb9a7b71b41..000000000000 --- a/trunk/arch/sh/include/cpu-sh4/cpu/sh7734.h +++ /dev/null @@ -1,306 +0,0 @@ -#ifndef __ASM_SH7734_H__ -#define __ASM_SH7734_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU - */ -enum { - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3, - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7, - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11, - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15, - GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19, - GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23, - GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27, - GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31, - - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3, - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7, - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11, - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15, - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19, - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23, - GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27, - GPIO_GP_1_28, GPIO_GP_1_29, GPIO_GP_1_30, GPIO_GP_1_31, - - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3, - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7, - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11, - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15, - GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19, - GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23, - GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27, - GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31, - - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3, - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7, - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11, - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15, - GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19, - GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23, - GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27, - GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31, - - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3, - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7, - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11, - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15, - GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19, - GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23, - GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27, - GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31, - - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3, - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7, - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11, - - GPIO_FN_CLKOUT, GPIO_FN_BS, GPIO_FN_CS0, GPIO_FN_EX_CS0, GPIO_FN_RD, - GPIO_FN_WE0, GPIO_FN_WE1, - - GPIO_FN_SCL0, GPIO_FN_PENC0, GPIO_FN_USB_OVC0, - - GPIO_FN_IRQ2_B, GPIO_FN_IRQ3_B, - - /* IPSR0 */ - GPIO_FN_A15, GPIO_FN_ST0_VCO_CLKIN, GPIO_FN_LCD_DATA15_A, - GPIO_FN_TIOC3D_C, - GPIO_FN_A14, GPIO_FN_LCD_DATA14_A, GPIO_FN_TIOC3C_C, - GPIO_FN_A13, GPIO_FN_LCD_DATA13_A, GPIO_FN_TIOC3B_C, - GPIO_FN_A12, GPIO_FN_LCD_DATA12_A, GPIO_FN_TIOC3A_C, - GPIO_FN_A11, GPIO_FN_ST0_D7, GPIO_FN_LCD_DATA11_A, - GPIO_FN_TIOC2B_C, - GPIO_FN_A10, GPIO_FN_ST0_D6, GPIO_FN_LCD_DATA10_A, - GPIO_FN_TIOC2A_C, - GPIO_FN_A9, GPIO_FN_ST0_D5, GPIO_FN_LCD_DATA9_A, - GPIO_FN_TIOC1B_C, - GPIO_FN_A8, GPIO_FN_ST0_D4, GPIO_FN_LCD_DATA8_A, - GPIO_FN_TIOC1A_C, - GPIO_FN_A7, GPIO_FN_ST0_D3, GPIO_FN_LCD_DATA7_A, GPIO_FN_TIOC0D_C, - GPIO_FN_A6, GPIO_FN_ST0_D2, GPIO_FN_LCD_DATA6_A, GPIO_FN_TIOC0C_C, - GPIO_FN_A5, GPIO_FN_ST0_D1, GPIO_FN_LCD_DATA5_A, GPIO_FN_TIOC0B_C, - GPIO_FN_A4, GPIO_FN_ST0_D0, GPIO_FN_LCD_DATA4_A, GPIO_FN_TIOC0A_C, - GPIO_FN_A3, GPIO_FN_ST0_VLD, GPIO_FN_LCD_DATA3_A, GPIO_FN_TCLKD_C, - GPIO_FN_A2, GPIO_FN_ST0_SYC, GPIO_FN_LCD_DATA2_A, GPIO_FN_TCLKC_C, - GPIO_FN_A1, GPIO_FN_ST0_REQ, GPIO_FN_LCD_DATA1_A, GPIO_FN_TCLKB_C, - GPIO_FN_A0, GPIO_FN_ST0_CLKIN, GPIO_FN_LCD_DATA0_A, GPIO_FN_TCLKA_C, - - /* IPSR1 */ - GPIO_FN_D3, GPIO_FN_SD0_DAT3_A, GPIO_FN_MMC_D3_A, GPIO_FN_ST1_D6, - GPIO_FN_FD3_A, - GPIO_FN_D2, GPIO_FN_SD0_DAT2_A, GPIO_FN_MMC_D2_A, GPIO_FN_ST1_D5, - GPIO_FN_FD2_A, - GPIO_FN_D1, GPIO_FN_SD0_DAT1_A, GPIO_FN_MMC_D1_A, GPIO_FN_ST1_D4, - GPIO_FN_FD1_A, - GPIO_FN_D0, GPIO_FN_SD0_DAT0_A, GPIO_FN_MMC_D0_A, GPIO_FN_ST1_D3, - GPIO_FN_FD0_A, - GPIO_FN_A25, GPIO_FN_TX2_D, GPIO_FN_ST1_D2, - GPIO_FN_A24, GPIO_FN_RX2_D, GPIO_FN_ST1_D1, - GPIO_FN_A23, GPIO_FN_ST1_D0, GPIO_FN_LCD_M_DISP_A, - GPIO_FN_A22, GPIO_FN_ST1_VLD, GPIO_FN_LCD_VEPWC_A, - GPIO_FN_A21, GPIO_FN_ST1_SYC, GPIO_FN_LCD_VCPWC_A, - GPIO_FN_A20, GPIO_FN_ST1_REQ, GPIO_FN_LCD_FLM_A, - GPIO_FN_A19, GPIO_FN_ST1_CLKIN, GPIO_FN_LCD_CLK_A, GPIO_FN_TIOC4D_C, - GPIO_FN_A18, GPIO_FN_ST1_PWM, GPIO_FN_LCD_CL2_A, GPIO_FN_TIOC4C_C, - GPIO_FN_A17, GPIO_FN_ST1_VCO_CLKIN, GPIO_FN_LCD_CL1_A, GPIO_FN_TIOC4B_C, - GPIO_FN_A16, GPIO_FN_ST0_PWM, GPIO_FN_LCD_DON_A, GPIO_FN_TIOC4A_C, - - /* IPSR2 */ - GPIO_FN_D14, GPIO_FN_TX2_B, GPIO_FN_FSE_A, GPIO_FN_ET0_TX_CLK_B, - GPIO_FN_D13, GPIO_FN_RX2_B, GPIO_FN_FRB_A, GPIO_FN_ET0_ETXD6_B, - GPIO_FN_D12, GPIO_FN_FWE_A, GPIO_FN_ET0_ETXD5_B, - GPIO_FN_D11, GPIO_FN_RSPI_MISO_A, GPIO_FN_QMI_QIO1_A, - GPIO_FN_FRE_A, GPIO_FN_ET0_ETXD3_B, - GPIO_FN_D10, GPIO_FN_RSPI_MOSI_A, GPIO_FN_QMO_QIO0_A, - GPIO_FN_FALE_A, GPIO_FN_ET0_ETXD2_B, - GPIO_FN_D9, GPIO_FN_SD0_CMD_A, GPIO_FN_MMC_CMD_A, GPIO_FN_QIO3_A, - GPIO_FN_FCLE_A, GPIO_FN_ET0_ETXD1_B, - GPIO_FN_D8, GPIO_FN_SD0_CLK_A, GPIO_FN_MMC_CLK_A, GPIO_FN_QIO2_A, - GPIO_FN_FCE_A, GPIO_FN_ET0_GTX_CLK_B, - GPIO_FN_D7, GPIO_FN_RSPI_SSL_A, GPIO_FN_MMC_D7_A, GPIO_FN_QSSL_A, - GPIO_FN_FD7_A, - GPIO_FN_D6, GPIO_FN_RSPI_RSPCK_A, GPIO_FN_MMC_D6_A, GPIO_FN_QSPCLK_A, - GPIO_FN_FD6_A, - GPIO_FN_D5, GPIO_FN_SD0_WP_A, GPIO_FN_MMC_D5_A, GPIO_FN_FD5_A, - GPIO_FN_D4, GPIO_FN_SD0_CD_A, GPIO_FN_MMC_D4_A, GPIO_FN_ST1_D7, - GPIO_FN_FD4_A, - - /* IPSR3 */ - GPIO_FN_DRACK0, GPIO_FN_SD1_DAT2_A, GPIO_FN_ATAG, GPIO_FN_TCLK1_A, - GPIO_FN_ET0_ETXD7, - GPIO_FN_EX_WAIT2, GPIO_FN_SD1_DAT1_A, GPIO_FN_DACK2, GPIO_FN_CAN1_RX_C, - GPIO_FN_ET0_MAGIC_C, GPIO_FN_ET0_ETXD6_A, - GPIO_FN_EX_WAIT1, GPIO_FN_SD1_DAT0_A, GPIO_FN_DREQ2, GPIO_FN_CAN1_TX_C, - GPIO_FN_ET0_LINK_C, GPIO_FN_ET0_ETXD5_A, - GPIO_FN_EX_WAIT0, GPIO_FN_TCLK1_B, - GPIO_FN_RD_WR, GPIO_FN_TCLK0, - GPIO_FN_EX_CS5, GPIO_FN_SD1_CMD_A, GPIO_FN_ATADIR, GPIO_FN_QSSL_B, - GPIO_FN_ET0_ETXD3_A, - GPIO_FN_EX_CS4, GPIO_FN_SD1_WP_A, GPIO_FN_ATAWR, GPIO_FN_QMI_QIO1_B, - GPIO_FN_ET0_ETXD2_A, - GPIO_FN_EX_CS3, GPIO_FN_SD1_CD_A, GPIO_FN_ATARD, GPIO_FN_QMO_QIO0_B, - GPIO_FN_ET0_ETXD1_A, - GPIO_FN_EX_CS2, GPIO_FN_TX3_B, GPIO_FN_ATACS1, GPIO_FN_QSPCLK_B, - GPIO_FN_ET0_GTX_CLK_A, - GPIO_FN_EX_CS1, GPIO_FN_RX3_B, GPIO_FN_ATACS0, GPIO_FN_QIO2_B, - GPIO_FN_ET0_ETXD0, - GPIO_FN_CS1_A26, GPIO_FN_QIO3_B, - GPIO_FN_D15, GPIO_FN_SCK2_B, - - /* IPSR4 */ - GPIO_FN_SCK2_A, GPIO_FN_VI0_G3, - GPIO_FN_RTS1_B, GPIO_FN_VI0_G2, - GPIO_FN_CTS1_B, GPIO_FN_VI0_DATA7_VI0_G1, - GPIO_FN_TX1_B, GPIO_FN_VI0_DATA6_VI0_G0, GPIO_FN_ET0_PHY_INT_A, - GPIO_FN_RX1_B, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_ET0_MAGIC_A, - GPIO_FN_SCK1_B, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ET0_LINK_A, - GPIO_FN_RTS0_B, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ET0_MDIO_A, - GPIO_FN_CTS0_B, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_RMII0_MDIO_A, - GPIO_FN_ET0_MDC, - GPIO_FN_HTX0_A, GPIO_FN_TX1_A, GPIO_FN_VI0_DATA1_VI0_B1, - GPIO_FN_RMII0_MDC_A, GPIO_FN_ET0_COL, - GPIO_FN_HRX0_A, GPIO_FN_RX1_A, GPIO_FN_VI0_DATA0_VI0_B0, - GPIO_FN_RMII0_CRS_DV_A, GPIO_FN_ET0_CRS, - GPIO_FN_HSCK0_A, GPIO_FN_SCK1_A, GPIO_FN_VI0_VSYNC, - GPIO_FN_RMII0_RX_ER_A, GPIO_FN_ET0_RX_ER, - GPIO_FN_HRTS0_A, GPIO_FN_RTS1_A, GPIO_FN_VI0_HSYNC, - GPIO_FN_RMII0_TXD_EN_A, GPIO_FN_ET0_RX_DV, - GPIO_FN_HCTS0_A, GPIO_FN_CTS1_A, GPIO_FN_VI0_FIELD, - GPIO_FN_RMII0_RXD1_A, GPIO_FN_ET0_ERXD7, - - /* IPSR5 */ - GPIO_FN_SD2_CLK_A, GPIO_FN_RX2_A, GPIO_FN_VI0_G4, GPIO_FN_ET0_RX_CLK_B, - GPIO_FN_SD2_CMD_A, GPIO_FN_TX2_A, GPIO_FN_VI0_G5, GPIO_FN_ET0_ERXD2_B, - GPIO_FN_SD2_DAT0_A, GPIO_FN_RX3_A, GPIO_FN_VI0_R0, GPIO_FN_ET0_ERXD3_B, - GPIO_FN_SD2_DAT1_A, GPIO_FN_TX3_A, GPIO_FN_VI0_R1, GPIO_FN_ET0_MDIO_B, - GPIO_FN_SD2_DAT2_A, GPIO_FN_RX4_A, GPIO_FN_VI0_R2, GPIO_FN_ET0_LINK_B, - GPIO_FN_SD2_DAT3_A, GPIO_FN_TX4_A, GPIO_FN_VI0_R3, GPIO_FN_ET0_MAGIC_B, - GPIO_FN_SD2_CD_A, GPIO_FN_RX5_A, GPIO_FN_VI0_R4, GPIO_FN_ET0_PHY_INT_B, - GPIO_FN_SD2_WP_A, GPIO_FN_TX5_A, GPIO_FN_VI0_R5, - GPIO_FN_REF125CK, GPIO_FN_ADTRG, GPIO_FN_RX5_C, - GPIO_FN_REF50CK, GPIO_FN_CTS1_E, GPIO_FN_HCTS0_D, - - /* IPSR6 */ - GPIO_FN_DU0_DR0, GPIO_FN_SCIF_CLK_B, GPIO_FN_HRX0_D, GPIO_FN_IETX_A, - GPIO_FN_TCLKA_A, GPIO_FN_HIFD00, - GPIO_FN_DU0_DR1, GPIO_FN_SCK0_B, GPIO_FN_HTX0_D, GPIO_FN_IERX_A, - GPIO_FN_TCLKB_A, GPIO_FN_HIFD01, - GPIO_FN_DU0_DR2, GPIO_FN_RX0_B, GPIO_FN_TCLKC_A, GPIO_FN_HIFD02, - GPIO_FN_DU0_DR3, GPIO_FN_TX0_B, GPIO_FN_TCLKD_A, GPIO_FN_HIFD03, - GPIO_FN_DU0_DR4, GPIO_FN_CTS0_C, GPIO_FN_TIOC0A_A, GPIO_FN_HIFD04, - GPIO_FN_DU0_DR5, GPIO_FN_RTS0_C, GPIO_FN_TIOC0B_A, GPIO_FN_HIFD05, - GPIO_FN_DU0_DR6, GPIO_FN_SCK1_C, GPIO_FN_TIOC0C_A, GPIO_FN_HIFD06, - GPIO_FN_DU0_DR7, GPIO_FN_RX1_C, GPIO_FN_TIOC0D_A, GPIO_FN_HIFD07, - GPIO_FN_DU0_DG0, GPIO_FN_TX1_C, GPIO_FN_HSCK0_D, GPIO_FN_IECLK_A, - GPIO_FN_TIOC1A_A, GPIO_FN_HIFD08, - GPIO_FN_DU0_DG1, GPIO_FN_CTS1_C, GPIO_FN_HRTS0_D, GPIO_FN_TIOC1B_A, - GPIO_FN_HIFD09, - - /* IPSR7 */ - GPIO_FN_DU0_DG2, GPIO_FN_RTS1_C, GPIO_FN_RMII0_MDC_B, GPIO_FN_TIOC2A_A, - GPIO_FN_HIFD10, - GPIO_FN_DU0_DG3, GPIO_FN_SCK2_C, GPIO_FN_RMII0_MDIO_B, GPIO_FN_TIOC2B_A, - GPIO_FN_HIFD11, - GPIO_FN_DU0_DG4, GPIO_FN_RX2_C, GPIO_FN_RMII0_CRS_DV_B, - GPIO_FN_TIOC3A_A, GPIO_FN_HIFD12, - GPIO_FN_DU0_DG5, GPIO_FN_TX2_C, GPIO_FN_RMII0_RX_ER_B, - GPIO_FN_TIOC3B_A, GPIO_FN_HIFD13, - GPIO_FN_DU0_DG6, GPIO_FN_RX3_C, GPIO_FN_RMII0_RXD0_B, - GPIO_FN_TIOC3C_A, GPIO_FN_HIFD14, - GPIO_FN_DU0_DG7, GPIO_FN_TX3_C, GPIO_FN_RMII0_RXD1_B, - GPIO_FN_TIOC3D_A, GPIO_FN_HIFD15, - GPIO_FN_DU0_DB0, GPIO_FN_RX4_C, GPIO_FN_RMII0_TXD_EN_B, - GPIO_FN_TIOC4A_A, GPIO_FN_HIFCS, - GPIO_FN_DU0_DB1, GPIO_FN_TX4_C, GPIO_FN_RMII0_TXD0_B, - GPIO_FN_TIOC4B_A, GPIO_FN_HIFRS, - GPIO_FN_DU0_DB2, GPIO_FN_RX5_B, GPIO_FN_RMII0_TXD1_B, - GPIO_FN_TIOC4C_A, GPIO_FN_HIFWR, - GPIO_FN_DU0_DB3, GPIO_FN_TX5_B, GPIO_FN_TIOC4D_A, GPIO_FN_HIFRD, - GPIO_FN_DU0_DB4, GPIO_FN_HIFINT, - - /* IPSR8 */ - GPIO_FN_DU0_DB5, GPIO_FN_HIFDREQ, - GPIO_FN_DU0_DB6, GPIO_FN_HIFRDY, - GPIO_FN_DU0_DB7, GPIO_FN_SSI_SCK0_B, GPIO_FN_HIFEBL_B, - GPIO_FN_DU0_DOTCLKIN, GPIO_FN_HSPI_CS0_C, GPIO_FN_SSI_WS0_B, - GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_HSPI_CLK0_C, GPIO_FN_SSI_SDATA0_B, - GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_HSPI_TX0_C, GPIO_FN_SSI_SCK1_B, - GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_HSPI_RX0_C, GPIO_FN_SSI_WS1_B, - GPIO_FN_DU0_EXODDF_DU0_ODDF, GPIO_FN_CAN0_RX_B, GPIO_FN_HSCK0_B, - GPIO_FN_SSI_SDATA1_B, - GPIO_FN_DU0_DISP, GPIO_FN_CAN0_TX_B, GPIO_FN_HRX0_B, - GPIO_FN_AUDIO_CLKA_B, - GPIO_FN_DU0_CDE, GPIO_FN_HTX0_B, GPIO_FN_AUDIO_CLKB_B, - GPIO_FN_LCD_VCPWC_B, - GPIO_FN_IRQ0_A, GPIO_FN_HSPI_TX_B, GPIO_FN_RX3_E, GPIO_FN_ET0_ERXD0, - GPIO_FN_IRQ1_A, GPIO_FN_HSPI_RX_B, GPIO_FN_TX3_E, GPIO_FN_ET0_ERXD1, - GPIO_FN_IRQ2_A, GPIO_FN_CTS0_A, GPIO_FN_HCTS0_B, GPIO_FN_ET0_ERXD2_A, - GPIO_FN_IRQ3_A, GPIO_FN_RTS0_A, GPIO_FN_HRTS0_B, GPIO_FN_ET0_ERXD3_A, - - /* IPSR9 */ - GPIO_FN_VI1_CLK_A, GPIO_FN_FD0_B, GPIO_FN_LCD_DATA0_B, - GPIO_FN_VI1_0_A, GPIO_FN_FD1_B, GPIO_FN_LCD_DATA1_B, - GPIO_FN_VI1_1_A, GPIO_FN_FD2_B, GPIO_FN_LCD_DATA2_B, - GPIO_FN_VI1_2_A, GPIO_FN_FD3_B, GPIO_FN_LCD_DATA3_B, - GPIO_FN_VI1_3_A, GPIO_FN_FD4_B, GPIO_FN_LCD_DATA4_B, - GPIO_FN_VI1_4_A, GPIO_FN_FD5_B, GPIO_FN_LCD_DATA5_B, - GPIO_FN_VI1_5_A, GPIO_FN_FD6_B, GPIO_FN_LCD_DATA6_B, - GPIO_FN_VI1_6_A, GPIO_FN_FD7_B, GPIO_FN_LCD_DATA7_B, - GPIO_FN_VI1_7_A, GPIO_FN_FCE_B, GPIO_FN_LCD_DATA8_B, - GPIO_FN_SSI_SCK0_A, GPIO_FN_TIOC1A_B, GPIO_FN_LCD_DATA9_B, - GPIO_FN_SSI_WS0_A, GPIO_FN_TIOC1B_B, GPIO_FN_LCD_DATA10_B, - GPIO_FN_SSI_SDATA0_A, GPIO_FN_VI1_0_B, GPIO_FN_TIOC2A_B, - GPIO_FN_LCD_DATA11_B, - GPIO_FN_SSI_SCK1_A, GPIO_FN_VI1_1_B, GPIO_FN_TIOC2B_B, - GPIO_FN_LCD_DATA12_B, - GPIO_FN_SSI_WS1_A, GPIO_FN_VI1_2_B, GPIO_FN_LCD_DATA13_B, - GPIO_FN_SSI_SDATA1_A, GPIO_FN_VI1_3_B, GPIO_FN_LCD_DATA14_B, - - /* IPSR10 */ - GPIO_FN_SSI_SCK23, GPIO_FN_VI1_4_B, GPIO_FN_RX1_D, GPIO_FN_FCLE_B, - GPIO_FN_LCD_DATA15_B, - GPIO_FN_SSI_WS23, GPIO_FN_VI1_5_B, GPIO_FN_TX1_D, GPIO_FN_HSCK0_C, - GPIO_FN_FALE_B, GPIO_FN_LCD_DON_B, - GPIO_FN_SSI_SDATA2, GPIO_FN_VI1_6_B, GPIO_FN_HRX0_C, GPIO_FN_FRE_B, - GPIO_FN_LCD_CL1_B, - GPIO_FN_SSI_SDATA3, GPIO_FN_VI1_7_B, GPIO_FN_HTX0_C, GPIO_FN_FWE_B, - GPIO_FN_LCD_CL2_B, - GPIO_FN_AUDIO_CLKA_A, GPIO_FN_VI1_CLK_B, GPIO_FN_SCK1_D, - GPIO_FN_IECLK_B, GPIO_FN_LCD_FLM_B, - GPIO_FN_AUDIO_CLKB_A, GPIO_FN_LCD_CLK_B, - GPIO_FN_AUDIO_CLKC, GPIO_FN_SCK1_E, GPIO_FN_HCTS0_C, GPIO_FN_FRB_B, - GPIO_FN_LCD_VEPWC_B, - GPIO_FN_AUDIO_CLKOUT, GPIO_FN_TX1_E, GPIO_FN_HRTS0_C, GPIO_FN_FSE_B, - GPIO_FN_LCD_M_DISP_B, - GPIO_FN_CAN_CLK_A, GPIO_FN_RX4_D, - GPIO_FN_CAN0_TX_A, GPIO_FN_TX4_D, GPIO_FN_MLB_CLK, - GPIO_FN_CAN1_RX_A, GPIO_FN_IRQ1_B, - GPIO_FN_CAN0_RX_A, GPIO_FN_IRQ0_B, GPIO_FN_MLB_SIG, - GPIO_FN_CAN1_TX_A, GPIO_FN_TX5_C, GPIO_FN_MLB_DAT, - - /* IPSR11 */ - GPIO_FN_SCL1, GPIO_FN_SCIF_CLK_C, - GPIO_FN_SDA1, GPIO_FN_RX1_E, - GPIO_FN_SDA0, GPIO_FN_HIFEBL_A, - GPIO_FN_SDSELF, GPIO_FN_RTS1_E, - GPIO_FN_SCIF_CLK_A, GPIO_FN_HSPI_CLK_A, GPIO_FN_VI0_CLK, - GPIO_FN_RMII0_TXD0_A, GPIO_FN_ET0_ERXD4, - GPIO_FN_SCK0_A, GPIO_FN_HSPI_CS_A, GPIO_FN_VI0_CLKENB, - GPIO_FN_RMII0_TXD1_A, GPIO_FN_ET0_ERXD5, - GPIO_FN_RX0_A, GPIO_FN_HSPI_RX_A, GPIO_FN_RMII0_RXD0_A, - GPIO_FN_ET0_ERXD6, - GPIO_FN_TX0_A, GPIO_FN_HSPI_TX_A, - GPIO_FN_PENC1, GPIO_FN_TX3_D, GPIO_FN_CAN1_TX_B, GPIO_FN_TX5_D, - GPIO_FN_IETX_B, - GPIO_FN_USB_OVC1, GPIO_FN_RX3_D, GPIO_FN_CAN1_RX_B, GPIO_FN_RX5_D, - GPIO_FN_IERX_B, - GPIO_FN_DREQ0, GPIO_FN_SD1_CLK_A, GPIO_FN_ET0_TX_EN, - GPIO_FN_DACK0, GPIO_FN_SD1_DAT3_A, GPIO_FN_ET0_TX_ER, - GPIO_FN_DREQ1, GPIO_FN_HSPI_CLK_B, GPIO_FN_RX4_B, GPIO_FN_ET0_PHY_INT_C, - GPIO_FN_ET0_TX_CLK_A, - GPIO_FN_DACK1, GPIO_FN_HSPI_CS_B, GPIO_FN_TX4_B, GPIO_FN_ET0_RX_CLK_A, - GPIO_FN_PRESETOUT, GPIO_FN_ST_CLKOUT, - -}; - -#endif /* __ASM_SH7734_H__ */ diff --git a/trunk/arch/sh/kernel/cpu/proc.c b/trunk/arch/sh/kernel/cpu/proc.c index 9e6624c9108b..f47be8727b3b 100644 --- a/trunk/arch/sh/kernel/cpu/proc.c +++ b/trunk/arch/sh/kernel/cpu/proc.c @@ -7,7 +7,6 @@ static const char *cpu_name[] = { [CPU_SH7201] = "SH7201", [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", - [CPU_SH7264] = "SH7264", [CPU_SH7269] = "SH7269", [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", @@ -26,8 +25,7 @@ static const char *cpu_name[] = { [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", - [CPU_SH7372] = "SH7372", [CPU_SH7734] = "SH7734", - [CPU_SH_NONE] = "Unknown" + [CPU_SH7372] = "SH7372", [CPU_SH_NONE] = "Unknown" }; const char *get_cpu_subtype(struct sh_cpuinfo *c) diff --git a/trunk/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/trunk/arch/sh/kernel/cpu/sh2/setup-sh7619.c index e0b740c831c7..0f8befccf9fa 100644 --- a/trunk/arch/sh/kernel/cpu/sh2/setup-sh7619.c +++ b/trunk/arch/sh/kernel/cpu/sh2/setup-sh7619.c @@ -65,7 +65,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(88), + .irqs = { 88, 88, 88, 88 }, }; static struct platform_device scif0_device = { @@ -82,7 +82,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(92), + .irqs = { 92, 92, 92, 92 }, }; static struct platform_device scif1_device = { @@ -99,7 +99,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(96), + .irqs = { 96, 96, 96, 96 }, }; static struct platform_device scif2_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh2a/Makefile b/trunk/arch/sh/kernel/cpu/sh2a/Makefile index 7fdc102d0dd6..45f85c77ef75 100644 --- a/trunk/arch/sh/kernel/cpu/sh2a/Makefile +++ b/trunk/arch/sh/kernel/cpu/sh2a/Makefile @@ -11,14 +11,10 @@ obj-$(CONFIG_SH_FPU) += fpu.o obj-$(CONFIG_CPU_SUBTYPE_SH7201) += setup-sh7201.o clock-sh7201.o obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o -obj-$(CONFIG_CPU_SUBTYPE_SH7264) += setup-sh7264.o clock-sh7264.o obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o -obj-$(CONFIG_CPU_SUBTYPE_SH7269) += setup-sh7269.o clock-sh7269.o obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o # Pinmux setup pinmux-$(CONFIG_CPU_SUBTYPE_SH7203) := pinmux-sh7203.o -pinmux-$(CONFIG_CPU_SUBTYPE_SH7264) := pinmux-sh7264.o -pinmux-$(CONFIG_CPU_SUBTYPE_SH7269) := pinmux-sh7269.o obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y) diff --git a/trunk/arch/sh/kernel/cpu/sh2a/clock-sh7264.c b/trunk/arch/sh/kernel/cpu/sh2a/clock-sh7264.c deleted file mode 100644 index fdf585c95289..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh2a/clock-sh7264.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * arch/sh/kernel/cpu/sh2a/clock-sh7264.c - * - * SH7264 clock framework support - * - * Copyright (C) 2012 Phil Edworthy - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include - -/* SH7264 registers */ -#define FRQCR 0xfffe0010 -#define STBCR3 0xfffe0408 -#define STBCR4 0xfffe040c -#define STBCR5 0xfffe0410 -#define STBCR6 0xfffe0414 -#define STBCR7 0xfffe0418 -#define STBCR8 0xfffe041c - -static const unsigned int pll1rate[] = {8, 12}; - -static unsigned int pll1_div; - -/* Fixed 32 KHz root clock for RTC */ -static struct clk r_clk = { - .rate = 32768, -}; - -/* - * Default rate for the root input clock, reset this with clk_set_rate() - * from the platform code. - */ -static struct clk extal_clk = { - .rate = 18000000, -}; - -static unsigned long pll_recalc(struct clk *clk) -{ - unsigned long rate = clk->parent->rate / pll1_div; - return rate * pll1rate[(__raw_readw(FRQCR) >> 8) & 1]; -} - -static struct sh_clk_ops pll_clk_ops = { - .recalc = pll_recalc, -}; - -static struct clk pll_clk = { - .ops = &pll_clk_ops, - .parent = &extal_clk, - .flags = CLK_ENABLE_ON_INIT, -}; - -struct clk *main_clks[] = { - &r_clk, - &extal_clk, - &pll_clk, -}; - -static int div2[] = { 1, 2, 3, 4, 6, 8, 12 }; - -static struct clk_div_mult_table div4_div_mult_table = { - .divisors = div2, - .nr_divisors = ARRAY_SIZE(div2), -}; - -static struct clk_div4_table div4_table = { - .div_mult_table = &div4_div_mult_table, -}; - -enum { DIV4_I, DIV4_P, - DIV4_NR }; - -#define DIV4(_reg, _bit, _mask, _flags) \ - SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags) - -/* The mask field specifies the div2 entries that are valid */ -struct clk div4_clks[DIV4_NR] = { - [DIV4_I] = DIV4(FRQCR, 4, 0x7, CLK_ENABLE_REG_16BIT - | CLK_ENABLE_ON_INIT), - [DIV4_P] = DIV4(FRQCR, 0, 0x78, CLK_ENABLE_REG_16BIT), -}; - -enum { MSTP77, MSTP74, MSTP72, - MSTP60, - MSTP35, MSTP34, MSTP33, MSTP32, MSTP30, - MSTP_NR }; - -static struct clk mstp_clks[MSTP_NR] = { - [MSTP77] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 7, 0), /* SCIF */ - [MSTP74] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 4, 0), /* VDC */ - [MSTP72] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 2, 0), /* CMT */ - [MSTP60] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR6, 0, 0), /* USB */ - [MSTP35] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 6, 0), /* MTU2 */ - [MSTP34] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */ - [MSTP33] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 3, 0), /* SDHI1 */ - [MSTP32] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 2, 0), /* ADC */ - [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */ -}; - -static struct clk_lookup lookups[] = { - /* main clocks */ - CLKDEV_CON_ID("rclk", &r_clk), - CLKDEV_CON_ID("extal", &extal_clk), - CLKDEV_CON_ID("pll_clk", &pll_clk), - - /* DIV4 clocks */ - CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), - CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), - - /* MSTP clocks */ - CLKDEV_CON_ID("sci_ick", &mstp_clks[MSTP77]), - CLKDEV_CON_ID("vdc3", &mstp_clks[MSTP74]), - CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP72]), - CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]), - CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP35]), - CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP34]), - CLKDEV_CON_ID("sdhi1", &mstp_clks[MSTP33]), - CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]), - CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]), -}; - -int __init arch_clk_init(void) -{ - int k, ret = 0; - - if (test_mode_pin(MODE_PIN0)) { - if (test_mode_pin(MODE_PIN1)) - pll1_div = 3; - else - pll1_div = 4; - } else - pll1_div = 1; - - for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) - ret = clk_register(main_clks[k]); - - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - - if (!ret) - ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); - - if (!ret) - ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); - - return ret; -} diff --git a/trunk/arch/sh/kernel/cpu/sh2a/clock-sh7269.c b/trunk/arch/sh/kernel/cpu/sh2a/clock-sh7269.c deleted file mode 100644 index 6b787620de99..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh2a/clock-sh7269.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * arch/sh/kernel/cpu/sh2a/clock-sh7269.c - * - * SH7269 clock framework support - * - * Copyright (C) 2012 Phil Edworthy - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include - -/* SH7269 registers */ -#define FRQCR 0xfffe0010 -#define STBCR3 0xfffe0408 -#define STBCR4 0xfffe040c -#define STBCR5 0xfffe0410 -#define STBCR6 0xfffe0414 -#define STBCR7 0xfffe0418 - -#define PLL_RATE 20 - -/* Fixed 32 KHz root clock for RTC */ -static struct clk r_clk = { - .rate = 32768, -}; - -/* - * Default rate for the root input clock, reset this with clk_set_rate() - * from the platform code. - */ -static struct clk extal_clk = { - .rate = 13340000, -}; - -static unsigned long pll_recalc(struct clk *clk) -{ - return clk->parent->rate * PLL_RATE; -} - -static struct sh_clk_ops pll_clk_ops = { - .recalc = pll_recalc, -}; - -static struct clk pll_clk = { - .ops = &pll_clk_ops, - .parent = &extal_clk, - .flags = CLK_ENABLE_ON_INIT, -}; - -static unsigned long peripheral0_recalc(struct clk *clk) -{ - return clk->parent->rate / 8; -} - -static struct sh_clk_ops peripheral0_clk_ops = { - .recalc = peripheral0_recalc, -}; - -static struct clk peripheral0_clk = { - .ops = &peripheral0_clk_ops, - .parent = &pll_clk, - .flags = CLK_ENABLE_ON_INIT, -}; - -static unsigned long peripheral1_recalc(struct clk *clk) -{ - return clk->parent->rate / 4; -} - -static struct sh_clk_ops peripheral1_clk_ops = { - .recalc = peripheral1_recalc, -}; - -static struct clk peripheral1_clk = { - .ops = &peripheral1_clk_ops, - .parent = &pll_clk, - .flags = CLK_ENABLE_ON_INIT, -}; - -struct clk *main_clks[] = { - &r_clk, - &extal_clk, - &pll_clk, - &peripheral0_clk, - &peripheral1_clk, -}; - -static int div2[] = { 1, 2, 0, 4 }; - -static struct clk_div_mult_table div4_div_mult_table = { - .divisors = div2, - .nr_divisors = ARRAY_SIZE(div2), -}; - -static struct clk_div4_table div4_table = { - .div_mult_table = &div4_div_mult_table, -}; - -enum { DIV4_I, DIV4_B, - DIV4_NR }; - -#define DIV4(_reg, _bit, _mask, _flags) \ - SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags) - -/* The mask field specifies the div2 entries that are valid */ -struct clk div4_clks[DIV4_NR] = { - [DIV4_I] = DIV4(FRQCR, 8, 0xB, CLK_ENABLE_REG_16BIT - | CLK_ENABLE_ON_INIT), - [DIV4_B] = DIV4(FRQCR, 4, 0xA, CLK_ENABLE_REG_16BIT - | CLK_ENABLE_ON_INIT), -}; - -enum { MSTP72, - MSTP60, - MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40, - MSTP35, MSTP32, MSTP30, - MSTP_NR }; - -static struct clk mstp_clks[MSTP_NR] = { - [MSTP72] = SH_CLK_MSTP8(&peripheral0_clk, STBCR7, 2, 0), /* CMT */ - [MSTP60] = SH_CLK_MSTP8(&peripheral1_clk, STBCR6, 0, 0), /* USB */ - [MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */ - [MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */ - [MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */ - [MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */ - [MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */ - [MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */ - [MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */ - [MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */ - [MSTP35] = SH_CLK_MSTP8(&peripheral0_clk, STBCR3, 5, 0), /* MTU2 */ - [MSTP32] = SH_CLK_MSTP8(&peripheral1_clk, STBCR3, 2, 0), /* ADC */ - [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */ -}; - -static struct clk_lookup lookups[] = { - /* main clocks */ - CLKDEV_CON_ID("rclk", &r_clk), - CLKDEV_CON_ID("extal", &extal_clk), - CLKDEV_CON_ID("pll_clk", &pll_clk), - CLKDEV_CON_ID("peripheral_clk", &peripheral1_clk), - - /* DIV4 clocks */ - CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), - CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]), - - /* MSTP clocks */ - CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP44]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP43]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]), - CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP72]), - CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]), - CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP35]), - CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]), - CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]), -}; - -int __init arch_clk_init(void) -{ - int k, ret = 0; - - for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) - ret = clk_register(main_clks[k]); - - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - - if (!ret) - ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); - - if (!ret) - ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); - - return ret; -} diff --git a/trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c b/trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c deleted file mode 100644 index b055b55d6f27..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c +++ /dev/null @@ -1,2136 +0,0 @@ -/* - * SH7264 Pinmux - * - * Copyright (C) 2012 Renesas Electronics Europe Ltd - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include -#include -#include -#include - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - /* Port A */ - PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA, - /* Port B */ - PB22_DATA, PB21_DATA, PB20_DATA, - PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA, - PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA, - PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA, - PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA, - PB3_DATA, PB2_DATA, PB1_DATA, - /* Port C */ - PC10_DATA, PC9_DATA, PC8_DATA, - PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA, - PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA, - /* Port D */ - PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA, - PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA, - PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA, - PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, - /* Port E */ - PE5_DATA, PE4_DATA, - PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA, - /* Port F */ - PF12_DATA, - PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA, - PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA, - PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, - /* Port G */ - PG24_DATA, - PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA, - PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA, - PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA, - PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA, - PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA, - PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA, - /* Port H */ - /* NOTE - Port H does not have a Data Register, but PH Data is - connected to PH Port Register */ - PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA, - PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA, - /* Port I - not on device */ - /* Port J */ - PJ12_DATA, - PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA, - PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA, - PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA, - /* Port K */ - PK12_DATA, - PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA, - PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA, - PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA, - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - FORCE_IN, - /* Port A */ - PA3_IN, PA2_IN, PA1_IN, PA0_IN, - /* Port B */ - PB22_IN, PB21_IN, PB20_IN, - PB19_IN, PB18_IN, PB17_IN, PB16_IN, - PB15_IN, PB14_IN, PB13_IN, PB12_IN, - PB11_IN, PB10_IN, PB9_IN, PB8_IN, - PB7_IN, PB6_IN, PB5_IN, PB4_IN, - PB3_IN, PB2_IN, PB1_IN, - /* Port C */ - PC10_IN, PC9_IN, PC8_IN, - PC7_IN, PC6_IN, PC5_IN, PC4_IN, - PC3_IN, PC2_IN, PC1_IN, PC0_IN, - /* Port D */ - PD15_IN, PD14_IN, PD13_IN, PD12_IN, - PD11_IN, PD10_IN, PD9_IN, PD8_IN, - PD7_IN, PD6_IN, PD5_IN, PD4_IN, - PD3_IN, PD2_IN, PD1_IN, PD0_IN, - /* Port E */ - PE5_IN, PE4_IN, - PE3_IN, PE2_IN, PE1_IN, PE0_IN, - /* Port F */ - PF12_IN, - PF11_IN, PF10_IN, PF9_IN, PF8_IN, - PF7_IN, PF6_IN, PF5_IN, PF4_IN, - PF3_IN, PF2_IN, PF1_IN, PF0_IN, - /* Port G */ - PG24_IN, - PG23_IN, PG22_IN, PG21_IN, PG20_IN, - PG19_IN, PG18_IN, PG17_IN, PG16_IN, - PG15_IN, PG14_IN, PG13_IN, PG12_IN, - PG11_IN, PG10_IN, PG9_IN, PG8_IN, - PG7_IN, PG6_IN, PG5_IN, PG4_IN, - PG3_IN, PG2_IN, PG1_IN, PG0_IN, - /* Port H - Port H does not have a Data Register */ - /* Port I - not on device */ - /* Port J */ - PJ12_IN, - PJ11_IN, PJ10_IN, PJ9_IN, PJ8_IN, - PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN, - PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN, - /* Port K */ - PK12_IN, - PK11_IN, PK10_IN, PK9_IN, PK8_IN, - PK7_IN, PK6_IN, PK5_IN, PK4_IN, - PK3_IN, PK2_IN, PK1_IN, PK0_IN, - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - FORCE_OUT, - /* Port A */ - PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT, - /* Port B */ - PB22_OUT, PB21_OUT, PB20_OUT, - PB19_OUT, PB18_OUT, PB17_OUT, PB16_OUT, - PB15_OUT, PB14_OUT, PB13_OUT, PB12_OUT, - PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT, - PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT, - PB3_OUT, PB2_OUT, PB1_OUT, - /* Port C */ - PC10_OUT, PC9_OUT, PC8_OUT, - PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT, - PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT, - /* Port D */ - PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT, - PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT, - PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT, - PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT, - /* Port E */ - PE5_OUT, PE4_OUT, - PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT, - /* Port F */ - PF12_OUT, - PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT, - PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT, - PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT, - /* Port G */ - PG24_OUT, - PG23_OUT, PG22_OUT, PG21_OUT, PG20_OUT, - PG19_OUT, PG18_OUT, PG17_OUT, PG16_OUT, - PG15_OUT, PG14_OUT, PG13_OUT, PG12_OUT, - PG11_OUT, PG10_OUT, PG9_OUT, PG8_OUT, - PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT, - PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT, - /* Port H - Port H does not have a Data Register */ - /* Port I - not on device */ - /* Port J */ - PJ12_OUT, - PJ11_OUT, PJ10_OUT, PJ9_OUT, PJ8_OUT, - PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT, - PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT, - /* Port K */ - PK12_OUT, - PK11_OUT, PK10_OUT, PK9_OUT, PK8_OUT, - PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT, - PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT, - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - /* Port A */ - PA3_IOR_IN, PA3_IOR_OUT, - PA2_IOR_IN, PA2_IOR_OUT, - PA1_IOR_IN, PA1_IOR_OUT, - PA0_IOR_IN, PA0_IOR_OUT, - - /* Port B */ - PB11_IOR_IN, PB11_IOR_OUT, - PB10_IOR_IN, PB10_IOR_OUT, - PB9_IOR_IN, PB9_IOR_OUT, - PB8_IOR_IN, PB8_IOR_OUT, - - PB22MD_00, PB22MD_01, PB22MD_10, - PB21MD_0, PB21MD_1, - PB20MD_0, PB20MD_1, - PB19MD_00, PB19MD_01, PB19MD_10, PB19MD_11, - PB18MD_00, PB18MD_01, PB18MD_10, PB18MD_11, - PB17MD_00, PB17MD_01, PB17MD_10, PB17MD_11, - PB16MD_00, PB16MD_01, PB16MD_10, PB16MD_11, - PB15MD_00, PB15MD_01, PB15MD_10, PB15MD_11, - PB14MD_00, PB14MD_01, PB14MD_10, PB14MD_11, - PB13MD_00, PB13MD_01, PB13MD_10, PB13MD_11, - PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, - PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11, - PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11, - PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11, - PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11, - PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, - PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, - PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, - PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, - PB3MD_0, PB3MD_1, - PB2MD_0, PB2MD_1, - PB1MD_0, PB1MD_1, - - /* Port C */ - PC14_IOR_IN, PC14_IOR_OUT, - PC13_IOR_IN, PC13_IOR_OUT, - PC12_IOR_IN, PC12_IOR_OUT, - PC11_IOR_IN, PC11_IOR_OUT, - PC10_IOR_IN, PC10_IOR_OUT, - PC9_IOR_IN, PC9_IOR_OUT, - PC8_IOR_IN, PC8_IOR_OUT, - PC7_IOR_IN, PC7_IOR_OUT, - PC6_IOR_IN, PC6_IOR_OUT, - PC5_IOR_IN, PC5_IOR_OUT, - PC4_IOR_IN, PC4_IOR_OUT, - PC3_IOR_IN, PC3_IOR_OUT, - PC2_IOR_IN, PC2_IOR_OUT, - PC1_IOR_IN, PC1_IOR_OUT, - PC0_IOR_IN, PC0_IOR_OUT, - - PC10MD_0, PC10MD_1, - PC9MD_0, PC9MD_1, - PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11, - PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11, - PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11, - PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11, - PC4MD_0, PC4MD_1, - PC3MD_0, PC3MD_1, - PC2MD_0, PC2MD_1, - PC1MD_0, PC1MD_1, - PC0MD_0, PC0MD_1, - - /* Port D */ - PD15_IOR_IN, PD15_IOR_OUT, - PD14_IOR_IN, PD14_IOR_OUT, - PD13_IOR_IN, PD13_IOR_OUT, - PD12_IOR_IN, PD12_IOR_OUT, - PD11_IOR_IN, PD11_IOR_OUT, - PD10_IOR_IN, PD10_IOR_OUT, - PD9_IOR_IN, PD9_IOR_OUT, - PD8_IOR_IN, PD8_IOR_OUT, - PD7_IOR_IN, PD7_IOR_OUT, - PD6_IOR_IN, PD6_IOR_OUT, - PD5_IOR_IN, PD5_IOR_OUT, - PD4_IOR_IN, PD4_IOR_OUT, - PD3_IOR_IN, PD3_IOR_OUT, - PD2_IOR_IN, PD2_IOR_OUT, - PD1_IOR_IN, PD1_IOR_OUT, - PD0_IOR_IN, PD0_IOR_OUT, - - PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11, - PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11, - PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11, - PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11, - PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11, - PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11, - PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11, - PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11, - PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11, - PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11, - PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11, - PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11, - PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11, - PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11, - PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11, - PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11, - - /* Port E */ - PE5_IOR_IN, PE5_IOR_OUT, - PE4_IOR_IN, PE4_IOR_OUT, - PE3_IOR_IN, PE3_IOR_OUT, - PE2_IOR_IN, PE2_IOR_OUT, - PE1_IOR_IN, PE1_IOR_OUT, - PE0_IOR_IN, PE0_IOR_OUT, - - PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11, - PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11, - PE3MD_00, PE3MD_01, PE3MD_10, PE3MD_11, - PE2MD_00, PE2MD_01, PE2MD_10, PE2MD_11, - PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011, - PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111, - PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, - - /* Port F */ - PF12_IOR_IN, PF12_IOR_OUT, - PF11_IOR_IN, PF11_IOR_OUT, - PF10_IOR_IN, PF10_IOR_OUT, - PF9_IOR_IN, PF9_IOR_OUT, - PF8_IOR_IN, PF8_IOR_OUT, - PF7_IOR_IN, PF7_IOR_OUT, - PF6_IOR_IN, PF6_IOR_OUT, - PF5_IOR_IN, PF5_IOR_OUT, - PF4_IOR_IN, PF4_IOR_OUT, - PF3_IOR_IN, PF3_IOR_OUT, - PF2_IOR_IN, PF2_IOR_OUT, - PF1_IOR_IN, PF1_IOR_OUT, - PF0_IOR_IN, PF0_IOR_OUT, - - PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011, - PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111, - PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011, - PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111, - PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011, - PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111, - PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011, - PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111, - PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11, - PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011, - PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111, - PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011, - PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111, - PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011, - PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111, - PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011, - PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111, - PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011, - PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111, - PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011, - PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111, - PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011, - PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111, - PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011, - PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111, - - /* Port G */ - PG24_IOR_IN, PG24_IOR_OUT, - PG23_IOR_IN, PG23_IOR_OUT, - PG22_IOR_IN, PG22_IOR_OUT, - PG21_IOR_IN, PG21_IOR_OUT, - PG20_IOR_IN, PG20_IOR_OUT, - PG19_IOR_IN, PG19_IOR_OUT, - PG18_IOR_IN, PG18_IOR_OUT, - PG17_IOR_IN, PG17_IOR_OUT, - PG16_IOR_IN, PG16_IOR_OUT, - PG15_IOR_IN, PG15_IOR_OUT, - PG14_IOR_IN, PG14_IOR_OUT, - PG13_IOR_IN, PG13_IOR_OUT, - PG12_IOR_IN, PG12_IOR_OUT, - PG11_IOR_IN, PG11_IOR_OUT, - PG10_IOR_IN, PG10_IOR_OUT, - PG9_IOR_IN, PG9_IOR_OUT, - PG8_IOR_IN, PG8_IOR_OUT, - PG7_IOR_IN, PG7_IOR_OUT, - PG6_IOR_IN, PG6_IOR_OUT, - PG5_IOR_IN, PG5_IOR_OUT, - PG4_IOR_IN, PG4_IOR_OUT, - PG3_IOR_IN, PG3_IOR_OUT, - PG2_IOR_IN, PG2_IOR_OUT, - PG1_IOR_IN, PG1_IOR_OUT, - PG0_IOR_IN, PG0_IOR_OUT, - - PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, - PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11, - PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11, - PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11, - PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011, - PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111, - PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011, - PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111, - PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011, - PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111, - PG17MD_000, PG17MD_001, PG17MD_010, PG17MD_011, - PG17MD_100, PG17MD_101, PG17MD_110, PG17MD_111, - PG16MD_000, PG16MD_001, PG16MD_010, PG16MD_011, - PG16MD_100, PG16MD_101, PG16MD_110, PG16MD_111, - PG15MD_000, PG15MD_001, PG15MD_010, PG15MD_011, - PG15MD_100, PG15MD_101, PG15MD_110, PG15MD_111, - PG14MD_000, PG14MD_001, PG14MD_010, PG14MD_011, - PG14MD_100, PG14MD_101, PG14MD_110, PG14MD_111, - PG13MD_000, PG13MD_001, PG13MD_010, PG13MD_011, - PG13MD_100, PG13MD_101, PG13MD_110, PG13MD_111, - PG12MD_000, PG12MD_001, PG12MD_010, PG12MD_011, - PG12MD_100, PG12MD_101, PG12MD_110, PG12MD_111, - PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011, - PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111, - PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011, - PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111, - PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011, - PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111, - PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011, - PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111, - PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11, - PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11, - PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11, - PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11, - PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11, - PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11, - PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11, - PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011, - PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111, - - /* Port H */ - PH7MD_0, PH7MD_1, - PH6MD_0, PH6MD_1, - PH5MD_0, PH5MD_1, - PH4MD_0, PH4MD_1, - PH3MD_0, PH3MD_1, - PH2MD_0, PH2MD_1, - PH1MD_0, PH1MD_1, - PH0MD_0, PH0MD_1, - - /* Port I - not on device */ - - /* Port J */ - PJ11_IOR_IN, PJ11_IOR_OUT, - PJ10_IOR_IN, PJ10_IOR_OUT, - PJ9_IOR_IN, PJ9_IOR_OUT, - PJ8_IOR_IN, PJ8_IOR_OUT, - PJ7_IOR_IN, PJ7_IOR_OUT, - PJ6_IOR_IN, PJ6_IOR_OUT, - PJ5_IOR_IN, PJ5_IOR_OUT, - PJ4_IOR_IN, PJ4_IOR_OUT, - PJ3_IOR_IN, PJ3_IOR_OUT, - PJ2_IOR_IN, PJ2_IOR_OUT, - PJ1_IOR_IN, PJ1_IOR_OUT, - PJ0_IOR_IN, PJ0_IOR_OUT, - - PJ11MD_00, PJ11MD_01, PJ11MD_10, PJ11MD_11, - PJ10MD_00, PJ10MD_01, PJ10MD_10, PJ10MD_11, - PJ9MD_00, PJ9MD_01, PJ9MD_10, PJ9MD_11, - PJ8MD_00, PJ8MD_01, PJ8MD_10, PJ8MD_11, - PJ7MD_00, PJ7MD_01, PJ7MD_10, PJ7MD_11, - PJ6MD_00, PJ6MD_01, PJ6MD_10, PJ6MD_11, - PJ5MD_00, PJ5MD_01, PJ5MD_10, PJ5MD_11, - PJ4MD_00, PJ4MD_01, PJ4MD_10, PJ4MD_11, - PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11, - PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011, - PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111, - PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011, - PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111, - PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011, - PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111, - - /* Port K */ - PK11_IOR_IN, PK11_IOR_OUT, - PK10_IOR_IN, PK10_IOR_OUT, - PK9_IOR_IN, PK9_IOR_OUT, - PK8_IOR_IN, PK8_IOR_OUT, - PK7_IOR_IN, PK7_IOR_OUT, - PK6_IOR_IN, PK6_IOR_OUT, - PK5_IOR_IN, PK5_IOR_OUT, - PK4_IOR_IN, PK4_IOR_OUT, - PK3_IOR_IN, PK3_IOR_OUT, - PK2_IOR_IN, PK2_IOR_OUT, - PK1_IOR_IN, PK1_IOR_OUT, - PK0_IOR_IN, PK0_IOR_OUT, - - PK11MD_00, PK11MD_01, PK11MD_10, PK11MD_11, - PK10MD_00, PK10MD_01, PK10MD_10, PK10MD_11, - PK9MD_00, PK9MD_01, PK9MD_10, PK9MD_11, - PK8MD_00, PK8MD_01, PK8MD_10, PK8MD_11, - PK7MD_00, PK7MD_01, PK7MD_10, PK7MD_11, - PK6MD_00, PK6MD_01, PK6MD_10, PK6MD_11, - PK5MD_00, PK5MD_01, PK5MD_10, PK5MD_11, - PK4MD_00, PK4MD_01, PK4MD_10, PK4MD_11, - PK3MD_00, PK3MD_01, PK3MD_10, PK3MD_11, - PK2MD_00, PK2MD_01, PK2MD_10, PK2MD_11, - PK1MD_00, PK1MD_01, PK1MD_10, PK1MD_11, - PK0MD_00, PK0MD_01, PK0MD_10, PK0MD_11, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - /* Port A */ - - /* Port B */ - - /* Port C */ - - /* Port D */ - - /* Port E */ - - /* Port F */ - - /* Port G */ - - /* Port H */ - PHAN7_MARK, PHAN6_MARK, PHAN5_MARK, PHAN4_MARK, - PHAN3_MARK, PHAN2_MARK, PHAN1_MARK, PHAN0_MARK, - - /* Port I - not on device */ - - /* Port J */ - - /* Port K */ - - IRQ7_PC_MARK, IRQ6_PC_MARK, IRQ5_PC_MARK, IRQ4_PC_MARK, - IRQ3_PG_MARK, IRQ2_PG_MARK, IRQ1_PJ_MARK, IRQ0_PJ_MARK, - IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK, - - PINT7_PG_MARK, PINT6_PG_MARK, PINT5_PG_MARK, PINT4_PG_MARK, - PINT3_PG_MARK, PINT2_PG_MARK, PINT1_PG_MARK, PINT0_PG_MARK, - - SD_CD_MARK, SD_D0_MARK, SD_D1_MARK, SD_D2_MARK, SD_D3_MARK, - SD_WP_MARK, SD_CLK_MARK, SD_CMD_MARK, - CRX0_MARK, CRX1_MARK, - CTX0_MARK, CTX1_MARK, - - PWM1A_MARK, PWM1B_MARK, PWM1C_MARK, PWM1D_MARK, - PWM1E_MARK, PWM1F_MARK, PWM1G_MARK, PWM1H_MARK, - PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK, - PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK, - IERXD_MARK, IETXD_MARK, - CRX0CRX1_MARK, - WDTOVF_MARK, - - CRX0X1_MARK, - - /* DMAC */ - TEND0_MARK, DACK0_MARK, DREQ0_MARK, - TEND1_MARK, DACK1_MARK, DREQ1_MARK, - - /* ADC */ - ADTRG_MARK, - - /* BSC */ - A25_MARK, A24_MARK, - A23_MARK, A22_MARK, A21_MARK, A20_MARK, - A19_MARK, A18_MARK, A17_MARK, A16_MARK, - A15_MARK, A14_MARK, A13_MARK, A12_MARK, - A11_MARK, A10_MARK, A9_MARK, A8_MARK, - A7_MARK, A6_MARK, A5_MARK, A4_MARK, - A3_MARK, A2_MARK, A1_MARK, A0_MARK, - D15_MARK, D14_MARK, D13_MARK, D12_MARK, - D11_MARK, D10_MARK, D9_MARK, D8_MARK, - D7_MARK, D6_MARK, D5_MARK, D4_MARK, - D3_MARK, D2_MARK, D1_MARK, D0_MARK, - BS_MARK, - CS4_MARK, CS3_MARK, CS2_MARK, CS1_MARK, CS0_MARK, - CS6CE1B_MARK, CS5CE1A_MARK, - CE2A_MARK, CE2B_MARK, - RD_MARK, RDWR_MARK, - ICIOWRAH_MARK, - ICIORD_MARK, - WE1DQMUWE_MARK, - WE0DQML_MARK, - RAS_MARK, CAS_MARK, CKE_MARK, - WAIT_MARK, BREQ_MARK, BACK_MARK, IOIS16_MARK, - - /* TMU */ - TIOC0A_MARK, TIOC0B_MARK, TIOC0C_MARK, TIOC0D_MARK, - TIOC1A_MARK, TIOC1B_MARK, - TIOC2A_MARK, TIOC2B_MARK, - TIOC3A_MARK, TIOC3B_MARK, TIOC3C_MARK, TIOC3D_MARK, - TIOC4A_MARK, TIOC4B_MARK, TIOC4C_MARK, TIOC4D_MARK, - TCLKA_MARK, TCLKB_MARK, TCLKC_MARK, TCLKD_MARK, - - /* SCIF */ - SCK0_MARK, SCK1_MARK, SCK2_MARK, SCK3_MARK, - RXD0_MARK, RXD1_MARK, RXD2_MARK, RXD3_MARK, - TXD0_MARK, TXD1_MARK, TXD2_MARK, TXD3_MARK, - RXD4_MARK, RXD5_MARK, RXD6_MARK, RXD7_MARK, - TXD4_MARK, TXD5_MARK, TXD6_MARK, TXD7_MARK, - RTS1_MARK, RTS3_MARK, - CTS1_MARK, CTS3_MARK, - - /* RSPI */ - RSPCK0_MARK, RSPCK1_MARK, - MOSI0_MARK, MOSI1_MARK, - MISO0_PF12_MARK, MISO1_MARK, MISO1_PG19_MARK, - SSL00_MARK, SSL10_MARK, - - /* IIC3 */ - SCL0_MARK, SCL1_MARK, SCL2_MARK, - SDA0_MARK, SDA1_MARK, SDA2_MARK, - - /* SSI */ - SSISCK0_MARK, - SSIWS0_MARK, - SSITXD0_MARK, - SSIRXD0_MARK, - SSIWS1_MARK, SSIWS2_MARK, SSIWS3_MARK, - SSISCK1_MARK, SSISCK2_MARK, SSISCK3_MARK, - SSIDATA1_MARK, SSIDATA2_MARK, SSIDATA3_MARK, - AUDIO_CLK_MARK, - - /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */ - SIOFTXD_MARK, SIOFRXD_MARK, SIOFSYNC_MARK, SIOFSCK_MARK, - - /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */ - SPDIF_IN_MARK, SPDIF_OUT_MARK, - - /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ - FCE_MARK, - FRB_MARK, - - /* VDC3 */ - DV_CLK_MARK, - DV_VSYNC_MARK, DV_HSYNC_MARK, - DV_DATA7_MARK, DV_DATA6_MARK, DV_DATA5_MARK, DV_DATA4_MARK, - DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK, - LCD_CLK_MARK, LCD_EXTCLK_MARK, - LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK, - LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK, - LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK, - LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK, - LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK, - LCD_M_DISP_MARK, - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - - /* Port A */ - PINMUX_DATA(PA3_DATA, PA3_IN), - PINMUX_DATA(PA2_DATA, PA2_IN), - PINMUX_DATA(PA1_DATA, PA1_IN), - PINMUX_DATA(PA0_DATA, PA0_IN), - - /* Port B */ - PINMUX_DATA(PB22_DATA, PB22MD_00, PB22_IN, PB22_OUT), - PINMUX_DATA(A22_MARK, PB22MD_01), - PINMUX_DATA(CS4_MARK, PB22MD_10), - - PINMUX_DATA(PB21_DATA, PB21MD_0, PB21_IN, PB21_OUT), - PINMUX_DATA(A21_MARK, PB21MD_1), - PINMUX_DATA(A20_MARK, PB20MD_1), - PINMUX_DATA(A19_MARK, PB19MD_01), - PINMUX_DATA(A18_MARK, PB18MD_01), - PINMUX_DATA(A17_MARK, PB17MD_01), - PINMUX_DATA(A16_MARK, PB16MD_01), - PINMUX_DATA(A15_MARK, PB15MD_01), - PINMUX_DATA(A14_MARK, PB14MD_01), - PINMUX_DATA(A13_MARK, PB13MD_01), - PINMUX_DATA(A12_MARK, PB12MD_01), - PINMUX_DATA(A11_MARK, PB11MD_01), - PINMUX_DATA(A10_MARK, PB10MD_01), - PINMUX_DATA(A9_MARK, PB9MD_01), - PINMUX_DATA(A8_MARK, PB8MD_01), - PINMUX_DATA(A7_MARK, PB7MD_01), - PINMUX_DATA(A6_MARK, PB6MD_01), - PINMUX_DATA(A5_MARK, PB5MD_01), - PINMUX_DATA(A4_MARK, PB4MD_01), - PINMUX_DATA(A3_MARK, PB3MD_1), - PINMUX_DATA(A2_MARK, PB2MD_1), - PINMUX_DATA(A1_MARK, PB1MD_1), - - /* Port C */ - PINMUX_DATA(PC10_DATA, PC10MD_0), - PINMUX_DATA(TIOC2B_MARK, PC1MD_1), - PINMUX_DATA(PC9_DATA, PC9MD_0), - PINMUX_DATA(TIOC2A_MARK, PC9MD_1), - PINMUX_DATA(PC8_DATA, PC8MD_00), - PINMUX_DATA(CS3_MARK, PC8MD_01), - PINMUX_DATA(TIOC4D_MARK, PC8MD_10), - PINMUX_DATA(IRQ7_PC_MARK, PC8MD_11), - PINMUX_DATA(PC7_DATA, PC7MD_00), - PINMUX_DATA(CKE_MARK, PC7MD_01), - PINMUX_DATA(TIOC4C_MARK, PC7MD_10), - PINMUX_DATA(IRQ6_PC_MARK, PC7MD_11), - PINMUX_DATA(PC6_DATA, PC6MD_00), - PINMUX_DATA(CAS_MARK, PC6MD_01), - PINMUX_DATA(TIOC4B_MARK, PC6MD_10), - PINMUX_DATA(IRQ5_PC_MARK, PC6MD_11), - PINMUX_DATA(PC5_DATA, PC5MD_00), - PINMUX_DATA(RAS_MARK, PC5MD_01), - PINMUX_DATA(TIOC4A_MARK, PC5MD_10), - PINMUX_DATA(IRQ4_PC_MARK, PC5MD_11), - PINMUX_DATA(PC4_DATA, PC4MD_0), - PINMUX_DATA(WE1DQMUWE_MARK, PC4MD_1), - PINMUX_DATA(PC3_DATA, PC3MD_0), - PINMUX_DATA(WE0DQML_MARK, PC3MD_1), - PINMUX_DATA(PC2_DATA, PC2MD_0), - PINMUX_DATA(RDWR_MARK, PC2MD_1), - PINMUX_DATA(PC1_DATA, PC1MD_0), - PINMUX_DATA(RD_MARK, PC1MD_1), - PINMUX_DATA(PC0_DATA, PC0MD_0), - PINMUX_DATA(CS0_MARK, PC0MD_1), - - /* Port D */ - PINMUX_DATA(D15_MARK, PD15MD_01), - PINMUX_DATA(D14_MARK, PD14MD_01), - PINMUX_DATA(D13_MARK, PD13MD_01), - PINMUX_DATA(D12_MARK, PD12MD_01), - PINMUX_DATA(D11_MARK, PD11MD_01), - PINMUX_DATA(D10_MARK, PD10MD_01), - PINMUX_DATA(D9_MARK, PD9MD_01), - PINMUX_DATA(D8_MARK, PD8MD_01), - PINMUX_DATA(D7_MARK, PD7MD_01), - PINMUX_DATA(D6_MARK, PD6MD_01), - PINMUX_DATA(D5_MARK, PD5MD_01), - PINMUX_DATA(D4_MARK, PD4MD_01), - PINMUX_DATA(D3_MARK, PD3MD_01), - PINMUX_DATA(D2_MARK, PD2MD_01), - PINMUX_DATA(D1_MARK, PD1MD_01), - PINMUX_DATA(D0_MARK, PD0MD_01), - - /* Port E */ - PINMUX_DATA(PE5_DATA, PE5MD_00), - PINMUX_DATA(SDA2_MARK, PE5MD_01), - PINMUX_DATA(DV_HSYNC_MARK, PE5MD_11), - - PINMUX_DATA(PE4_DATA, PE4MD_00), - PINMUX_DATA(SCL2_MARK, PE4MD_01), - PINMUX_DATA(DV_VSYNC_MARK, PE4MD_11), - - PINMUX_DATA(PE3_DATA, PE3MD_00), - PINMUX_DATA(SDA1_MARK, PE3MD_01), - PINMUX_DATA(IRQ3_PE_MARK, PE3MD_11), - - PINMUX_DATA(PE2_DATA, PE2MD_00), - PINMUX_DATA(SCL1_MARK, PE2MD_01), - PINMUX_DATA(IRQ2_PE_MARK, PE2MD_11), - - PINMUX_DATA(PE1_DATA, PE1MD_000), - PINMUX_DATA(SDA0_MARK, PE1MD_001), - PINMUX_DATA(IOIS16_MARK, PE1MD_010), - PINMUX_DATA(IRQ1_PE_MARK, PE1MD_011), - PINMUX_DATA(TCLKA_MARK, PE1MD_100), - PINMUX_DATA(ADTRG_MARK, PE1MD_101), - - PINMUX_DATA(PE0_DATA, PE0MD_00), - PINMUX_DATA(SCL0_MARK, PE0MD_01), - PINMUX_DATA(AUDIO_CLK_MARK, PE0MD_10), - PINMUX_DATA(IRQ0_PE_MARK, PE0MD_11), - - /* Port F */ - PINMUX_DATA(PF12_DATA, PF12MD_000), - PINMUX_DATA(BS_MARK, PF12MD_001), - PINMUX_DATA(MISO0_PF12_MARK, PF12MD_011), - PINMUX_DATA(TIOC3D_MARK, PF12MD_100), - PINMUX_DATA(SPDIF_OUT_MARK, PF12MD_101), - - PINMUX_DATA(PF11_DATA, PF11MD_000), - PINMUX_DATA(A25_MARK, PF11MD_001), - PINMUX_DATA(SSIDATA3_MARK, PF11MD_010), - PINMUX_DATA(MOSI0_MARK, PF11MD_011), - PINMUX_DATA(TIOC3C_MARK, PF11MD_100), - PINMUX_DATA(SPDIF_IN_MARK, PF11MD_101), - - PINMUX_DATA(PF10_DATA, PF10MD_000), - PINMUX_DATA(A24_MARK, PF10MD_001), - PINMUX_DATA(SSIWS3_MARK, PF10MD_010), - PINMUX_DATA(SSL00_MARK, PF10MD_011), - PINMUX_DATA(TIOC3B_MARK, PF10MD_100), - PINMUX_DATA(FCE_MARK, PF10MD_101), - - PINMUX_DATA(PF9_DATA, PF9MD_000), - PINMUX_DATA(A23_MARK, PF9MD_001), - PINMUX_DATA(SSISCK3_MARK, PF9MD_010), - PINMUX_DATA(RSPCK0_MARK, PF9MD_011), - PINMUX_DATA(TIOC3A_MARK, PF9MD_100), - PINMUX_DATA(FRB_MARK, PF9MD_101), - - PINMUX_DATA(PF8_DATA, PF8MD_00), - PINMUX_DATA(CE2B_MARK, PF8MD_01), - PINMUX_DATA(SSIDATA3_MARK, PF8MD_10), - PINMUX_DATA(DV_CLK_MARK, PF8MD_11), - - PINMUX_DATA(PF7_DATA, PF7MD_000), - PINMUX_DATA(CE2A_MARK, PF7MD_001), - PINMUX_DATA(SSIWS3_MARK, PF7MD_010), - PINMUX_DATA(DV_DATA7_MARK, PF7MD_011), - PINMUX_DATA(TCLKD_MARK, PF7MD_100), - - PINMUX_DATA(PF6_DATA, PF6MD_000), - PINMUX_DATA(CS6CE1B_MARK, PF6MD_001), - PINMUX_DATA(SSISCK3_MARK, PF6MD_010), - PINMUX_DATA(DV_DATA6_MARK, PF6MD_011), - PINMUX_DATA(TCLKB_MARK, PF6MD_100), - - PINMUX_DATA(PF5_DATA, PF5MD_000), - PINMUX_DATA(CS5CE1A_MARK, PF5MD_001), - PINMUX_DATA(SSIDATA2_MARK, PF5MD_010), - PINMUX_DATA(DV_DATA5_MARK, PF5MD_011), - PINMUX_DATA(TCLKC_MARK, PF5MD_100), - - PINMUX_DATA(PF4_DATA, PF4MD_000), - PINMUX_DATA(ICIOWRAH_MARK, PF4MD_001), - PINMUX_DATA(SSIWS2_MARK, PF4MD_010), - PINMUX_DATA(DV_DATA4_MARK, PF4MD_011), - PINMUX_DATA(TXD3_MARK, PF4MD_100), - - PINMUX_DATA(PF3_DATA, PF3MD_000), - PINMUX_DATA(ICIORD_MARK, PF3MD_001), - PINMUX_DATA(SSISCK2_MARK, PF3MD_010), - PINMUX_DATA(DV_DATA3_MARK, PF3MD_011), - PINMUX_DATA(RXD3_MARK, PF3MD_100), - - PINMUX_DATA(PF2_DATA, PF2MD_000), - PINMUX_DATA(BACK_MARK, PF2MD_001), - PINMUX_DATA(SSIDATA1_MARK, PF2MD_010), - PINMUX_DATA(DV_DATA2_MARK, PF2MD_011), - PINMUX_DATA(TXD2_MARK, PF2MD_100), - PINMUX_DATA(DACK0_MARK, PF2MD_101), - - PINMUX_DATA(PF1_DATA, PF1MD_000), - PINMUX_DATA(BREQ_MARK, PF1MD_001), - PINMUX_DATA(SSIWS1_MARK, PF1MD_010), - PINMUX_DATA(DV_DATA1_MARK, PF1MD_011), - PINMUX_DATA(RXD2_MARK, PF1MD_100), - PINMUX_DATA(DREQ0_MARK, PF1MD_101), - - PINMUX_DATA(PF0_DATA, PF0MD_000), - PINMUX_DATA(WAIT_MARK, PF0MD_001), - PINMUX_DATA(SSISCK1_MARK, PF0MD_010), - PINMUX_DATA(DV_DATA0_MARK, PF0MD_011), - PINMUX_DATA(SCK2_MARK, PF0MD_100), - PINMUX_DATA(TEND0_MARK, PF0MD_101), - - /* Port G */ - PINMUX_DATA(PG24_DATA, PG24MD_00), - PINMUX_DATA(MOSI0_MARK, PG24MD_01), - PINMUX_DATA(TIOC0D_MARK, PG24MD_10), - - PINMUX_DATA(PG23_DATA, PG23MD_00), - PINMUX_DATA(MOSI1_MARK, PG23MD_01), - PINMUX_DATA(TIOC0C_MARK, PG23MD_10), - - PINMUX_DATA(PG22_DATA, PG22MD_00), - PINMUX_DATA(SSL10_MARK, PG22MD_01), - PINMUX_DATA(TIOC0B_MARK, PG22MD_10), - - PINMUX_DATA(PG21_DATA, PG21MD_00), - PINMUX_DATA(RSPCK1_MARK, PG21MD_01), - PINMUX_DATA(TIOC0A_MARK, PG21MD_10), - - PINMUX_DATA(PG20_DATA, PG20MD_000), - PINMUX_DATA(LCD_EXTCLK_MARK, PG20MD_001), - PINMUX_DATA(MISO1_MARK, PG20MD_011), - PINMUX_DATA(TXD7_MARK, PG20MD_100), - - PINMUX_DATA(PG19_DATA, PG19MD_000), - PINMUX_DATA(LCD_CLK_MARK, PG19MD_001), - PINMUX_DATA(TIOC2B_MARK, PG19MD_010), - PINMUX_DATA(MISO1_PG19_MARK, PG19MD_011), - PINMUX_DATA(RXD7_MARK, PG19MD_100), - - PINMUX_DATA(PG18_DATA, PG18MD_000), - PINMUX_DATA(LCD_DE_MARK, PG18MD_001), - PINMUX_DATA(TIOC2A_MARK, PG18MD_010), - PINMUX_DATA(SSL10_MARK, PG18MD_011), - PINMUX_DATA(TXD6_MARK, PG18MD_100), - - PINMUX_DATA(PG17_DATA, PG17MD_000), - PINMUX_DATA(LCD_HSYNC_MARK, PG17MD_001), - PINMUX_DATA(TIOC1B_MARK, PG17MD_010), - PINMUX_DATA(RSPCK1_MARK, PG17MD_011), - PINMUX_DATA(RXD6_MARK, PG17MD_100), - - PINMUX_DATA(PG16_DATA, PG16MD_000), - PINMUX_DATA(LCD_VSYNC_MARK, PG16MD_001), - PINMUX_DATA(TIOC1A_MARK, PG16MD_010), - PINMUX_DATA(TXD3_MARK, PG16MD_011), - PINMUX_DATA(CTS1_MARK, PG16MD_100), - - PINMUX_DATA(PG15_DATA, PG15MD_000), - PINMUX_DATA(LCD_DATA15_MARK, PG15MD_001), - PINMUX_DATA(TIOC0D_MARK, PG15MD_010), - PINMUX_DATA(RXD3_MARK, PG15MD_011), - PINMUX_DATA(RTS1_MARK, PG15MD_100), - - PINMUX_DATA(PG14_DATA, PG14MD_000), - PINMUX_DATA(LCD_DATA14_MARK, PG14MD_001), - PINMUX_DATA(TIOC0C_MARK, PG14MD_010), - PINMUX_DATA(SCK1_MARK, PG14MD_100), - - PINMUX_DATA(PG13_DATA, PG13MD_000), - PINMUX_DATA(LCD_DATA13_MARK, PG13MD_001), - PINMUX_DATA(TIOC0B_MARK, PG13MD_010), - PINMUX_DATA(TXD1_MARK, PG13MD_100), - - PINMUX_DATA(PG12_DATA, PG12MD_000), - PINMUX_DATA(LCD_DATA12_MARK, PG12MD_001), - PINMUX_DATA(TIOC0A_MARK, PG12MD_010), - PINMUX_DATA(RXD1_MARK, PG12MD_100), - - PINMUX_DATA(PG11_DATA, PG11MD_000), - PINMUX_DATA(LCD_DATA11_MARK, PG11MD_001), - PINMUX_DATA(SSITXD0_MARK, PG11MD_010), - PINMUX_DATA(IRQ3_PG_MARK, PG11MD_011), - PINMUX_DATA(TXD5_MARK, PG11MD_100), - PINMUX_DATA(SIOFTXD_MARK, PG11MD_101), - - PINMUX_DATA(PG10_DATA, PG10MD_000), - PINMUX_DATA(LCD_DATA10_MARK, PG10MD_001), - PINMUX_DATA(SSIRXD0_MARK, PG10MD_010), - PINMUX_DATA(IRQ2_PG_MARK, PG10MD_011), - PINMUX_DATA(RXD5_MARK, PG10MD_100), - PINMUX_DATA(SIOFRXD_MARK, PG10MD_101), - - PINMUX_DATA(PG9_DATA, PG9MD_000), - PINMUX_DATA(LCD_DATA9_MARK, PG9MD_001), - PINMUX_DATA(SSIWS0_MARK, PG9MD_010), - PINMUX_DATA(TXD4_MARK, PG9MD_100), - PINMUX_DATA(SIOFSYNC_MARK, PG9MD_101), - - PINMUX_DATA(PG8_DATA, PG8MD_000), - PINMUX_DATA(LCD_DATA8_MARK, PG8MD_001), - PINMUX_DATA(SSISCK0_MARK, PG8MD_010), - PINMUX_DATA(RXD4_MARK, PG8MD_100), - PINMUX_DATA(SIOFSCK_MARK, PG8MD_101), - - PINMUX_DATA(PG7_DATA, PG7MD_00), - PINMUX_DATA(LCD_DATA7_MARK, PG7MD_01), - PINMUX_DATA(SD_CD_MARK, PG7MD_10), - PINMUX_DATA(PINT7_PG_MARK, PG7MD_11), - - PINMUX_DATA(PG6_DATA, PG7MD_00), - PINMUX_DATA(LCD_DATA6_MARK, PG7MD_01), - PINMUX_DATA(SD_WP_MARK, PG7MD_10), - PINMUX_DATA(PINT6_PG_MARK, PG7MD_11), - - PINMUX_DATA(PG5_DATA, PG5MD_00), - PINMUX_DATA(LCD_DATA5_MARK, PG5MD_01), - PINMUX_DATA(SD_D1_MARK, PG5MD_10), - PINMUX_DATA(PINT5_PG_MARK, PG5MD_11), - - PINMUX_DATA(PG4_DATA, PG4MD_00), - PINMUX_DATA(LCD_DATA4_MARK, PG4MD_01), - PINMUX_DATA(SD_D0_MARK, PG4MD_10), - PINMUX_DATA(PINT4_PG_MARK, PG4MD_11), - - PINMUX_DATA(PG3_DATA, PG3MD_00), - PINMUX_DATA(LCD_DATA3_MARK, PG3MD_01), - PINMUX_DATA(SD_CLK_MARK, PG3MD_10), - PINMUX_DATA(PINT3_PG_MARK, PG3MD_11), - - PINMUX_DATA(PG2_DATA, PG2MD_00), - PINMUX_DATA(LCD_DATA2_MARK, PG2MD_01), - PINMUX_DATA(SD_CMD_MARK, PG2MD_10), - PINMUX_DATA(PINT2_PG_MARK, PG2MD_11), - - PINMUX_DATA(PG1_DATA, PG1MD_00), - PINMUX_DATA(LCD_DATA1_MARK, PG1MD_01), - PINMUX_DATA(SD_D3_MARK, PG1MD_10), - PINMUX_DATA(PINT1_PG_MARK, PG1MD_11), - - PINMUX_DATA(PG0_DATA, PG0MD_000), - PINMUX_DATA(LCD_DATA0_MARK, PG0MD_001), - PINMUX_DATA(SD_D2_MARK, PG0MD_010), - PINMUX_DATA(PINT0_PG_MARK, PG0MD_011), - PINMUX_DATA(WDTOVF_MARK, PG0MD_100), - - /* Port H */ - PINMUX_DATA(PH7_DATA, PH7MD_0), - PINMUX_DATA(PHAN7_MARK, PH7MD_1), - - PINMUX_DATA(PH6_DATA, PH6MD_0), - PINMUX_DATA(PHAN6_MARK, PH6MD_1), - - PINMUX_DATA(PH5_DATA, PH5MD_0), - PINMUX_DATA(PHAN5_MARK, PH5MD_1), - - PINMUX_DATA(PH4_DATA, PH4MD_0), - PINMUX_DATA(PHAN4_MARK, PH4MD_1), - - PINMUX_DATA(PH3_DATA, PH3MD_0), - PINMUX_DATA(PHAN3_MARK, PH3MD_1), - - PINMUX_DATA(PH2_DATA, PH2MD_0), - PINMUX_DATA(PHAN2_MARK, PH2MD_1), - - PINMUX_DATA(PH1_DATA, PH1MD_0), - PINMUX_DATA(PHAN1_MARK, PH1MD_1), - - PINMUX_DATA(PH0_DATA, PH0MD_0), - PINMUX_DATA(PHAN0_MARK, PH0MD_1), - - /* Port I - not on device */ - - /* Port J */ - PINMUX_DATA(PJ11_DATA, PJ11MD_00), - PINMUX_DATA(PWM2H_MARK, PJ11MD_01), - PINMUX_DATA(DACK1_MARK, PJ11MD_10), - - PINMUX_DATA(PJ10_DATA, PJ10MD_00), - PINMUX_DATA(PWM2G_MARK, PJ10MD_01), - PINMUX_DATA(DREQ1_MARK, PJ10MD_10), - - PINMUX_DATA(PJ9_DATA, PJ9MD_00), - PINMUX_DATA(PWM2F_MARK, PJ9MD_01), - PINMUX_DATA(TEND1_MARK, PJ9MD_10), - - PINMUX_DATA(PJ8_DATA, PJ8MD_00), - PINMUX_DATA(PWM2E_MARK, PJ8MD_01), - PINMUX_DATA(RTS3_MARK, PJ8MD_10), - - PINMUX_DATA(PJ7_DATA, PJ7MD_00), - PINMUX_DATA(TIOC1B_MARK, PJ7MD_01), - PINMUX_DATA(CTS3_MARK, PJ7MD_10), - - PINMUX_DATA(PJ6_DATA, PJ6MD_00), - PINMUX_DATA(TIOC1A_MARK, PJ6MD_01), - PINMUX_DATA(SCK3_MARK, PJ6MD_10), - - PINMUX_DATA(PJ5_DATA, PJ5MD_00), - PINMUX_DATA(IERXD_MARK, PJ5MD_01), - PINMUX_DATA(TXD3_MARK, PJ5MD_10), - - PINMUX_DATA(PJ4_DATA, PJ4MD_00), - PINMUX_DATA(IETXD_MARK, PJ4MD_01), - PINMUX_DATA(RXD3_MARK, PJ4MD_10), - - PINMUX_DATA(PJ3_DATA, PJ3MD_00), - PINMUX_DATA(CRX1_MARK, PJ3MD_01), - PINMUX_DATA(CRX0X1_MARK, PJ3MD_10), - PINMUX_DATA(IRQ1_PJ_MARK, PJ3MD_11), - - PINMUX_DATA(PJ2_DATA, PJ2MD_000), - PINMUX_DATA(CTX1_MARK, PJ2MD_001), - PINMUX_DATA(CRX0CRX1_MARK, PJ2MD_010), - PINMUX_DATA(CS2_MARK, PJ2MD_011), - PINMUX_DATA(SCK0_MARK, PJ2MD_100), - PINMUX_DATA(LCD_M_DISP_MARK, PJ2MD_101), - - PINMUX_DATA(PJ1_DATA, PJ1MD_000), - PINMUX_DATA(CRX0_MARK, PJ1MD_001), - PINMUX_DATA(IERXD_MARK, PJ1MD_010), - PINMUX_DATA(IRQ0_PJ_MARK, PJ1MD_011), - PINMUX_DATA(RXD0_MARK, PJ1MD_100), - - PINMUX_DATA(PJ0_DATA, PJ0MD_000), - PINMUX_DATA(CTX0_MARK, PJ0MD_001), - PINMUX_DATA(IERXD_MARK, PJ0MD_010), - PINMUX_DATA(CS1_MARK, PJ0MD_011), - PINMUX_DATA(TXD0_MARK, PJ0MD_100), - PINMUX_DATA(A0_MARK, PJ0MD_101), - - /* Port K */ - PINMUX_DATA(PK11_DATA, PK11MD_00), - PINMUX_DATA(PWM2D_MARK, PK11MD_01), - PINMUX_DATA(SSITXD0_MARK, PK11MD_10), - - PINMUX_DATA(PK10_DATA, PK10MD_00), - PINMUX_DATA(PWM2C_MARK, PK10MD_01), - PINMUX_DATA(SSIRXD0_MARK, PK10MD_10), - - PINMUX_DATA(PK9_DATA, PK9MD_00), - PINMUX_DATA(PWM2B_MARK, PK9MD_01), - PINMUX_DATA(SSIWS0_MARK, PK9MD_10), - - PINMUX_DATA(PK8_DATA, PK8MD_00), - PINMUX_DATA(PWM2A_MARK, PK8MD_01), - PINMUX_DATA(SSISCK0_MARK, PK8MD_10), - - PINMUX_DATA(PK7_DATA, PK7MD_00), - PINMUX_DATA(PWM1H_MARK, PK7MD_01), - PINMUX_DATA(SD_CD_MARK, PK7MD_10), - - PINMUX_DATA(PK6_DATA, PK6MD_00), - PINMUX_DATA(PWM1G_MARK, PK6MD_01), - PINMUX_DATA(SD_WP_MARK, PK6MD_10), - - PINMUX_DATA(PK5_DATA, PK5MD_00), - PINMUX_DATA(PWM1F_MARK, PK5MD_01), - PINMUX_DATA(SD_D1_MARK, PK5MD_10), - - PINMUX_DATA(PK4_DATA, PK4MD_00), - PINMUX_DATA(PWM1E_MARK, PK4MD_01), - PINMUX_DATA(SD_D0_MARK, PK4MD_10), - - PINMUX_DATA(PK3_DATA, PK3MD_00), - PINMUX_DATA(PWM1D_MARK, PK3MD_01), - PINMUX_DATA(SD_CLK_MARK, PK3MD_10), - - PINMUX_DATA(PK2_DATA, PK2MD_00), - PINMUX_DATA(PWM1C_MARK, PK2MD_01), - PINMUX_DATA(SD_CMD_MARK, PK2MD_10), - - PINMUX_DATA(PK1_DATA, PK1MD_00), - PINMUX_DATA(PWM1B_MARK, PK1MD_01), - PINMUX_DATA(SD_D3_MARK, PK1MD_10), - - PINMUX_DATA(PK0_DATA, PK0MD_00), - PINMUX_DATA(PWM1A_MARK, PK0MD_01), - PINMUX_DATA(SD_D2_MARK, PK0MD_10), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - - /* Port A */ - PINMUX_GPIO(GPIO_PA3, PA3_DATA), - PINMUX_GPIO(GPIO_PA2, PA2_DATA), - PINMUX_GPIO(GPIO_PA1, PA1_DATA), - PINMUX_GPIO(GPIO_PA0, PA0_DATA), - - /* Port B */ - PINMUX_GPIO(GPIO_PB22, PB22_DATA), - PINMUX_GPIO(GPIO_PB21, PB21_DATA), - PINMUX_GPIO(GPIO_PB20, PB20_DATA), - PINMUX_GPIO(GPIO_PB19, PB19_DATA), - PINMUX_GPIO(GPIO_PB18, PB18_DATA), - PINMUX_GPIO(GPIO_PB17, PB17_DATA), - PINMUX_GPIO(GPIO_PB16, PB16_DATA), - PINMUX_GPIO(GPIO_PB15, PB15_DATA), - PINMUX_GPIO(GPIO_PB14, PB14_DATA), - PINMUX_GPIO(GPIO_PB13, PB13_DATA), - PINMUX_GPIO(GPIO_PB12, PB12_DATA), - PINMUX_GPIO(GPIO_PB11, PB11_DATA), - PINMUX_GPIO(GPIO_PB10, PB10_DATA), - PINMUX_GPIO(GPIO_PB9, PB9_DATA), - PINMUX_GPIO(GPIO_PB8, PB8_DATA), - PINMUX_GPIO(GPIO_PB7, PB7_DATA), - PINMUX_GPIO(GPIO_PB6, PB6_DATA), - PINMUX_GPIO(GPIO_PB5, PB5_DATA), - PINMUX_GPIO(GPIO_PB4, PB4_DATA), - PINMUX_GPIO(GPIO_PB3, PB3_DATA), - PINMUX_GPIO(GPIO_PB2, PB2_DATA), - PINMUX_GPIO(GPIO_PB1, PB1_DATA), - - /* Port C */ - PINMUX_GPIO(GPIO_PC10, PC10_DATA), - PINMUX_GPIO(GPIO_PC9, PC9_DATA), - PINMUX_GPIO(GPIO_PC8, PC8_DATA), - PINMUX_GPIO(GPIO_PC7, PC7_DATA), - PINMUX_GPIO(GPIO_PC6, PC6_DATA), - PINMUX_GPIO(GPIO_PC5, PC5_DATA), - PINMUX_GPIO(GPIO_PC4, PC4_DATA), - PINMUX_GPIO(GPIO_PC3, PC3_DATA), - PINMUX_GPIO(GPIO_PC2, PC2_DATA), - PINMUX_GPIO(GPIO_PC1, PC1_DATA), - PINMUX_GPIO(GPIO_PC0, PC0_DATA), - - /* Port D */ - PINMUX_GPIO(GPIO_PD15, PD15_DATA), - PINMUX_GPIO(GPIO_PD14, PD14_DATA), - PINMUX_GPIO(GPIO_PD13, PD13_DATA), - PINMUX_GPIO(GPIO_PD12, PD12_DATA), - PINMUX_GPIO(GPIO_PD11, PD11_DATA), - PINMUX_GPIO(GPIO_PD10, PD10_DATA), - PINMUX_GPIO(GPIO_PD9, PD9_DATA), - PINMUX_GPIO(GPIO_PD8, PD8_DATA), - PINMUX_GPIO(GPIO_PD7, PD7_DATA), - PINMUX_GPIO(GPIO_PD6, PD6_DATA), - PINMUX_GPIO(GPIO_PD5, PD5_DATA), - PINMUX_GPIO(GPIO_PD4, PD4_DATA), - PINMUX_GPIO(GPIO_PD3, PD3_DATA), - PINMUX_GPIO(GPIO_PD2, PD2_DATA), - PINMUX_GPIO(GPIO_PD1, PD1_DATA), - PINMUX_GPIO(GPIO_PD0, PD0_DATA), - - /* Port E */ - PINMUX_GPIO(GPIO_PE5, PE5_DATA), - PINMUX_GPIO(GPIO_PE4, PE4_DATA), - PINMUX_GPIO(GPIO_PE3, PE3_DATA), - PINMUX_GPIO(GPIO_PE2, PE2_DATA), - PINMUX_GPIO(GPIO_PE1, PE1_DATA), - PINMUX_GPIO(GPIO_PE0, PE0_DATA), - - /* Port F */ - PINMUX_GPIO(GPIO_PF12, PF12_DATA), - PINMUX_GPIO(GPIO_PF11, PF11_DATA), - PINMUX_GPIO(GPIO_PF10, PF10_DATA), - PINMUX_GPIO(GPIO_PF9, PF9_DATA), - PINMUX_GPIO(GPIO_PF8, PF8_DATA), - PINMUX_GPIO(GPIO_PF7, PF7_DATA), - PINMUX_GPIO(GPIO_PF6, PF6_DATA), - PINMUX_GPIO(GPIO_PF5, PF5_DATA), - PINMUX_GPIO(GPIO_PF4, PF4_DATA), - PINMUX_GPIO(GPIO_PF3, PF3_DATA), - PINMUX_GPIO(GPIO_PF2, PF2_DATA), - PINMUX_GPIO(GPIO_PF1, PF1_DATA), - PINMUX_GPIO(GPIO_PF0, PF0_DATA), - - /* Port G */ - PINMUX_GPIO(GPIO_PG24, PG24_DATA), - PINMUX_GPIO(GPIO_PG23, PG23_DATA), - PINMUX_GPIO(GPIO_PG22, PG22_DATA), - PINMUX_GPIO(GPIO_PG21, PG21_DATA), - PINMUX_GPIO(GPIO_PG20, PG20_DATA), - PINMUX_GPIO(GPIO_PG19, PG19_DATA), - PINMUX_GPIO(GPIO_PG18, PG18_DATA), - PINMUX_GPIO(GPIO_PG17, PG17_DATA), - PINMUX_GPIO(GPIO_PG16, PG16_DATA), - PINMUX_GPIO(GPIO_PG15, PG15_DATA), - PINMUX_GPIO(GPIO_PG14, PG14_DATA), - PINMUX_GPIO(GPIO_PG13, PG13_DATA), - PINMUX_GPIO(GPIO_PG12, PG12_DATA), - PINMUX_GPIO(GPIO_PG11, PG11_DATA), - PINMUX_GPIO(GPIO_PG10, PG10_DATA), - PINMUX_GPIO(GPIO_PG9, PG9_DATA), - PINMUX_GPIO(GPIO_PG8, PG8_DATA), - PINMUX_GPIO(GPIO_PG7, PG7_DATA), - PINMUX_GPIO(GPIO_PG6, PG6_DATA), - PINMUX_GPIO(GPIO_PG5, PG5_DATA), - PINMUX_GPIO(GPIO_PG4, PG4_DATA), - PINMUX_GPIO(GPIO_PG3, PG3_DATA), - PINMUX_GPIO(GPIO_PG2, PG2_DATA), - PINMUX_GPIO(GPIO_PG1, PG1_DATA), - PINMUX_GPIO(GPIO_PG0, PG0_DATA), - - /* Port H - Port H does not have a Data Register */ - - /* Port I - not on device */ - - /* Port J */ - PINMUX_GPIO(GPIO_PJ11, PJ11_DATA), - PINMUX_GPIO(GPIO_PJ10, PJ10_DATA), - PINMUX_GPIO(GPIO_PJ9, PJ9_DATA), - PINMUX_GPIO(GPIO_PJ8, PJ8_DATA), - PINMUX_GPIO(GPIO_PJ7, PJ7_DATA), - PINMUX_GPIO(GPIO_PJ6, PJ6_DATA), - PINMUX_GPIO(GPIO_PJ5, PJ5_DATA), - PINMUX_GPIO(GPIO_PJ4, PJ4_DATA), - PINMUX_GPIO(GPIO_PJ3, PJ3_DATA), - PINMUX_GPIO(GPIO_PJ2, PJ2_DATA), - PINMUX_GPIO(GPIO_PJ1, PJ1_DATA), - PINMUX_GPIO(GPIO_PJ0, PJ0_DATA), - - /* Port K */ - PINMUX_GPIO(GPIO_PK11, PK11_DATA), - PINMUX_GPIO(GPIO_PK10, PK10_DATA), - PINMUX_GPIO(GPIO_PK9, PK9_DATA), - PINMUX_GPIO(GPIO_PK8, PK8_DATA), - PINMUX_GPIO(GPIO_PK7, PK7_DATA), - PINMUX_GPIO(GPIO_PK6, PK6_DATA), - PINMUX_GPIO(GPIO_PK5, PK5_DATA), - PINMUX_GPIO(GPIO_PK4, PK4_DATA), - PINMUX_GPIO(GPIO_PK3, PK3_DATA), - PINMUX_GPIO(GPIO_PK2, PK2_DATA), - PINMUX_GPIO(GPIO_PK1, PK1_DATA), - PINMUX_GPIO(GPIO_PK0, PK0_DATA), - - /* INTC */ - PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK), - - PINMUX_GPIO(GPIO_FN_IRQ7_PC, IRQ7_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PC, IRQ6_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PC, IRQ5_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PC, IRQ4_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK), - - /* WDT */ - PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK), - - /* CAN */ - PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK), - PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0CRX1_MARK), - - /* DMAC */ - PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - - /* ADC */ - PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK), - - /* BSCh */ - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_A21, A21_MARK), - PINMUX_GPIO(GPIO_FN_A20, A20_MARK), - PINMUX_GPIO(GPIO_FN_A19, A19_MARK), - PINMUX_GPIO(GPIO_FN_A18, A18_MARK), - PINMUX_GPIO(GPIO_FN_A17, A17_MARK), - PINMUX_GPIO(GPIO_FN_A16, A16_MARK), - PINMUX_GPIO(GPIO_FN_A15, A15_MARK), - PINMUX_GPIO(GPIO_FN_A14, A14_MARK), - PINMUX_GPIO(GPIO_FN_A13, A13_MARK), - PINMUX_GPIO(GPIO_FN_A12, A12_MARK), - PINMUX_GPIO(GPIO_FN_A11, A11_MARK), - PINMUX_GPIO(GPIO_FN_A10, A10_MARK), - PINMUX_GPIO(GPIO_FN_A9, A9_MARK), - PINMUX_GPIO(GPIO_FN_A8, A8_MARK), - PINMUX_GPIO(GPIO_FN_A7, A7_MARK), - PINMUX_GPIO(GPIO_FN_A6, A6_MARK), - PINMUX_GPIO(GPIO_FN_A5, A5_MARK), - PINMUX_GPIO(GPIO_FN_A4, A4_MARK), - PINMUX_GPIO(GPIO_FN_A3, A3_MARK), - PINMUX_GPIO(GPIO_FN_A2, A2_MARK), - PINMUX_GPIO(GPIO_FN_A1, A1_MARK), - PINMUX_GPIO(GPIO_FN_A0, A0_MARK), - - PINMUX_GPIO(GPIO_FN_D15, D15_MARK), - PINMUX_GPIO(GPIO_FN_D14, D14_MARK), - PINMUX_GPIO(GPIO_FN_D13, D13_MARK), - PINMUX_GPIO(GPIO_FN_D12, D12_MARK), - PINMUX_GPIO(GPIO_FN_D11, D11_MARK), - PINMUX_GPIO(GPIO_FN_D10, D10_MARK), - PINMUX_GPIO(GPIO_FN_D9, D9_MARK), - PINMUX_GPIO(GPIO_FN_D8, D8_MARK), - PINMUX_GPIO(GPIO_FN_D7, D7_MARK), - PINMUX_GPIO(GPIO_FN_D6, D6_MARK), - PINMUX_GPIO(GPIO_FN_D5, D5_MARK), - PINMUX_GPIO(GPIO_FN_D4, D4_MARK), - PINMUX_GPIO(GPIO_FN_D3, D3_MARK), - PINMUX_GPIO(GPIO_FN_D2, D2_MARK), - PINMUX_GPIO(GPIO_FN_D1, D1_MARK), - PINMUX_GPIO(GPIO_FN_D0, D0_MARK), - - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), - PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK), - PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK), - PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK), - PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK), - PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK), - PINMUX_GPIO(GPIO_FN_CS6CE1B, CS6CE1B_MARK), - PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK), - PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK), - PINMUX_GPIO(GPIO_FN_RD, RD_MARK), - PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), - PINMUX_GPIO(GPIO_FN_ICIOWRAH, ICIOWRAH_MARK), - PINMUX_GPIO(GPIO_FN_ICIORD, ICIORD_MARK), - PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK), - PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK), - PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK), - PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK), - PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK), - PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK), - PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK), - PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - - /* TMU */ - PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK), - PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK), - PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK), - PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK), - PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK), - - /* SCIF */ - PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK), - PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK), - PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK), - PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK), - PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK), - PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), - PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), - PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), - PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK), - PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK), - PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), - PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), - PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK), - PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK), - PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK), - PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK), - PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK), - PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK), - PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK), - PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK), - PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK), - PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK), - PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK), - - /* RSPI */ - PINMUX_GPIO(GPIO_FN_RSPCK0, RSPCK0_MARK), - PINMUX_GPIO(GPIO_FN_MOSI0, MOSI0_MARK), - PINMUX_GPIO(GPIO_FN_MISO0_PF12, MISO0_PF12_MARK), - PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK), - PINMUX_GPIO(GPIO_FN_SSL00, SSL00_MARK), - PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK), - PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK), - PINMUX_GPIO(GPIO_FN_MISO1_PG19, MISO1_PG19_MARK), - PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK), - - /* IIC3 */ - PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK), - PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK), - PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK), - PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK), - PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK), - PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK), - - /* SSI */ - PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK), - PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK), - PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK), - - /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */ - PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK), - - /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */ - PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK), - PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK), - - /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ - PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), - - /* VDC3 */ - PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK), - - PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PA3_IN, PA3_OUT, - PA2_IN, PA2_OUT, - PA1_IN, PA1_OUT, - PA0_IN, PA0_OUT } - }, - - { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PB22MD_00, PB22MD_01, PB22MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PB21MD_0, PB21MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB20MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - - }, - { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) { - 0, PB19MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB18MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB17MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB16MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) { - 0, PB15MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB14MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB13MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB12MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) { - 0, PB11MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB10MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB9MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB8MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) { - 0, PB7MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB6MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB5MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB4MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) { - 0, PB3MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB2MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB1MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, - PB22_IN, PB22_OUT, - PB21_IN, PB21_OUT, - PB20_IN, PB20_OUT, - PB19_IN, PB19_OUT, - PB18_IN, PB18_OUT, - PB17_IN, PB17_OUT, - PB16_IN, PB16_OUT } - }, - - { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) { - PB15_IN, PB15_OUT, - PB14_IN, PB14_OUT, - PB13_IN, PB13_OUT, - PB12_IN, PB12_OUT, - PB11_IN, PB11_OUT, - PB10_IN, PB10_OUT, - PB9_IN, PB9_OUT, - PB8_IN, PB8_OUT, - PB7_IN, PB7_OUT, - PB6_IN, PB6_OUT, - PB5_IN, PB5_OUT, - PB4_IN, PB4_OUT, - PB3_IN, PB3_OUT, - PB2_IN, PB2_OUT, - PB1_IN, PB1_OUT, - 0, 0 } - }, - - { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC10MD_0, PC10MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC9MD_0, PC9MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) { - PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC4MD_0, PC4MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) { - PC3MD_0, PC3MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC2MD_0, PC2MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - PC10_IN, PC10_OUT, - PC9_IN, PC9_OUT, - PC8_IN, PC8_OUT, - PC7_IN, PC7_OUT, - PC6_IN, PC6_OUT, - PC5_IN, PC5_OUT, - PC4_IN, PC4_OUT, - PC3_IN, PC3_OUT, - PC2_IN, PC2_OUT, - PC1_IN, PC1_OUT, - PC0_IN, PC0_OUT - } - }, - - { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) { - 0, PD15MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD14MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD13MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD12MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) { - 0, PD11MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD10MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD9MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD8MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) { - 0, PD7MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD6MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD5MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD4MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) { - 0, PD3MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD2MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD1MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PD0MD_01, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) { - PD15_IN, PD15_OUT, - PD14_IN, PD14_OUT, - PD13_IN, PD13_OUT, - PD12_IN, PD12_OUT, - PD11_IN, PD11_OUT, - PD10_IN, PD10_OUT, - PD9_IN, PD9_OUT, - PD8_IN, PD8_OUT, - PD7_IN, PD7_OUT, - PD6_IN, PD6_OUT, - PD5_IN, PD5_OUT, - PD4_IN, PD4_OUT, - PD3_IN, PD3_OUT, - PD2_IN, PD2_OUT, - PD1_IN, PD1_OUT, - PD0_IN, PD0_OUT } - }, - - { PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PE5MD_00, PE5MD_01, 0, PE5MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PE4MD_00, PE4MD_01, 0, PE4MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) { - PE3MD_00, PE3MD_01, 0, PE3MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PE2MD_00, PE2MD_01, 0, PE2MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011, - PE1MD_100, PE1MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, - PE5_IN, PE5_OUT, - PE4_IN, PE4_OUT, - PE3_IN, PE3_OUT, - PE2_IN, PE2_OUT, - PE1_IN, PE1_OUT, - PE0_IN, PE0_OUT } - }, - - { PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) { - PF12MD_000, PF12MD_001, 0, PF12MD_011, - PF12MD_100, PF12MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) { - PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011, - PF11MD_100, PF11MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011, - PF10MD_100, PF10MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011, - PF9MD_100, PF9MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) { - PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011, - PF7MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011, - PF6MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011, - PF5MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011, - PF4MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) { - PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011, - PF3MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011, - PF2MD_100, PF2MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011, - PF1MD_100, PF1MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 - } - }, - - { PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) { - 0, 0, 0, 0, 0, 0, - PF12_IN, PF12_OUT, - PF11_IN, PF11_OUT, - PF10_IN, PF10_OUT, - PF9_IN, PF9_OUT, - PF8_IN, PF8_OUT, - PF7_IN, PF7_OUT, - PF6_IN, PF6_OUT, - PF5_IN, PF5_OUT, - PF4_IN, PF4_OUT, - PF3_IN, PF3_OUT, - PF2_IN, PF2_OUT, - PF1_IN, PF1_OUT, - PF0_IN, PF0_OUT } - }, - - { PINMUX_CFG_REG("PGCR7", 0xfffe38c0, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011, - PG0MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) { - PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011, - PG20MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) { - PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011, - PG19MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011, - PG18MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG17MD_000, PG17MD_001, PG17MD_010, PG17MD_011, - PG17MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG16MD_000, PG16MD_001, PG16MD_010, PG16MD_011, - PG16MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) { - PG15MD_000, PG15MD_001, PG15MD_010, PG15MD_011, - PG15MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG14MD_000, PG14MD_001, PG14MD_010, 0, - PG14MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG13MD_000, PG13MD_001, PG13MD_010, 0, - PG13MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG12MD_000, PG12MD_001, PG12MD_010, 0, - PG12MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) { - PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011, - PG11MD_100, PG11MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011, - PG10MD_100, PG10MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011, - PG9MD_100, PG9MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011, - PG8MD_100, PG8MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) { - PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) { - PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, - PG24_IN, PG24_OUT, - PG23_IN, PG23_OUT, - PG22_IN, PG22_OUT, - PG21_IN, PG21_OUT, - PG20_IN, PG20_OUT, - PG19_IN, PG19_OUT, - PG18_IN, PG18_OUT, - PG17_IN, PG17_OUT, - PG16_IN, PG16_OUT } - }, - - { PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) { - PG15_IN, PG15_OUT, - PG14_IN, PG14_OUT, - PG13_IN, PG13_OUT, - PG12_IN, PG12_OUT, - PG11_IN, PG11_OUT, - PG10_IN, PG10_OUT, - PG9_IN, PG9_OUT, - PG8_IN, PG8_OUT, - PG7_IN, PG7_OUT, - PG6_IN, PG6_OUT, - PG5_IN, PG5_OUT, - PG4_IN, PG4_OUT, - PG3_IN, PG3_OUT, - PG2_IN, PG2_OUT, - PG1_IN, PG1_OUT, - PG0_IN, PG0_OUT - } - }, - - { PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) { - PH7MD_0, PH7MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PH6MD_0, PH6MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PH5MD_0, PH5MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PH4MD_0, PH4MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) { - PH3MD_0, PH3MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PH2MD_0, PH2MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PH1MD_0, PH1MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PH0MD_0, PH0MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) { - PJ11MD_00, PJ11MD_01, PJ11MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ10MD_00, PJ10MD_01, PJ10MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ9MD_00, PJ9MD_01, PJ9MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ8MD_00, PJ8MD_01, PJ8MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) { - PJ7MD_00, PJ7MD_01, PJ7MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ6MD_00, PJ6MD_01, PJ6MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ5MD_00, PJ5MD_01, PJ5MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ4MD_00, PJ4MD_01, PJ4MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) { - PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011, - PJ2MD_100, PJ2MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011, - PJ1MD_100, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011, - PJ0MD_100, PJ0MD_101, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, } - }, - { PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - PJ11_IN, PJ11_OUT, - PJ10_IN, PJ10_OUT, - PJ9_IN, PJ9_OUT, - PJ8_IN, PJ8_OUT, - PJ7_IN, PJ7_OUT, - PJ6_IN, PJ6_OUT, - PJ5_IN, PJ5_OUT, - PJ4_IN, PJ4_OUT, - PJ3_IN, PJ3_OUT, - PJ2_IN, PJ2_OUT, - PJ1_IN, PJ1_OUT, - PJ0_IN, PJ0_OUT } - }, - - { PINMUX_CFG_REG("PKCR2", 0xfffe392a, 16, 4) { - PK11MD_00, PK11MD_01, PK11MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK10MD_00, PK10MD_01, PK10MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK9MD_00, PK9MD_01, PK9MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK8MD_00, PK8MD_01, PK8MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PKCR1", 0xfffe392c, 16, 4) { - PK7MD_00, PK7MD_01, PK7MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK6MD_00, PK6MD_01, PK6MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK5MD_00, PK5MD_01, PK5MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK4MD_00, PK4MD_01, PK4MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PKCR0", 0xfffe392e, 16, 4) { - PK3MD_00, PK3MD_01, PK3MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK2MD_00, PK2MD_01, PK2MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK1MD_00, PK1MD_01, PK1MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PK0MD_00, PK0MD_01, PK0MD_10, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PKIOR0", 0xfffe3932, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - PJ11_IN, PJ11_OUT, - PJ10_IN, PJ10_OUT, - PJ9_IN, PJ9_OUT, - PJ8_IN, PJ8_OUT, - PJ7_IN, PJ7_OUT, - PJ6_IN, PJ6_OUT, - PJ5_IN, PJ5_OUT, - PJ4_IN, PJ4_OUT, - PJ3_IN, PJ3_OUT, - PJ2_IN, PJ2_OUT, - PJ1_IN, PJ1_OUT, - PJ0_IN, PJ0_OUT } - }, - {} -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) { - 0, 0, 0, 0, 0, 0, 0, PA3_DATA, - 0, 0, 0, 0, 0, 0, 0, PA2_DATA } - }, - - { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) { - 0, 0, 0, 0, 0, 0, 0, PA1_DATA, - 0, 0, 0, 0, 0, 0, 0, PA0_DATA } - }, - - { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB22_DATA, PB21_DATA, PB20_DATA, - PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA } - }, - - { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) { - PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA, - PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA, - PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA, - PB3_DATA, PB2_DATA, PB1_DATA, 0 } - }, - - { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) { - 0, 0, 0, 0, - 0, PC10_DATA, PC9_DATA, PC8_DATA, - PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA, - PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA } - }, - - { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) { - PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA, - PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA, - PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA, - PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA } - }, - - { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, PE5_DATA, PE4_DATA, - PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA } - }, - - { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) { - 0, 0, 0, PF12_DATA, - PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA, - PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA, - PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA } - }, - - { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) { - 0, 0, 0, 0, 0, 0, 0, PG24_DATA, - PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA, - PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA } - }, - - { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) { - PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA, - PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA, - PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA, - PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA } - }, - { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) { - 0, 0, 0, PJ12_DATA, - PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA, - PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA, - PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA } - }, - { PINMUX_DATA_REG("PKDR0", 0xfffe3936, 16) { - 0, 0, 0, PK12_DATA, - PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA, - PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA, - PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA } - }, - { } -}; - -static struct pinmux_info sh7264_pinmux_info = { - .name = "sh7264_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_PA3, - .last_gpio = GPIO_FN_LCD_M_DISP, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -static int __init plat_pinmux_setup(void) -{ - return register_pinmux(&sh7264_pinmux_info); -} -arch_initcall(plat_pinmux_setup); diff --git a/trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c b/trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c deleted file mode 100644 index f25127c46eca..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c +++ /dev/null @@ -1,2800 +0,0 @@ -/* - * SH7269 Pinmux - * - * Copyright (C) 2012 Renesas Electronics Europe Ltd - * Copyright (C) 2012 Phil Edworthy - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include -#include -#include -#include - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - /* Port A */ - PA1_DATA, PA0_DATA, - /* Port B */ - PB22_DATA, PB21_DATA, PB20_DATA, - PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA, - PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA, - PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA, - PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA, - PB3_DATA, PB2_DATA, PB1_DATA, - /* Port C */ - PC8_DATA, - PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA, - PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA, - /* Port D */ - PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA, - PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA, - PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA, - PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, - /* Port E */ - PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA, - PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA, - /* Port F */ - PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA, - PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA, - PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA, - PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA, - PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA, - PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, - /* Port G */ - PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA, - PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA, - PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA, - PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA, - PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA, - PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA, - PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA, - /* Port H */ - /* NOTE - Port H does not have a Data Register, but PH Data is - connected to PH Port Register */ - PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA, - PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA, - /* Port I - not on device */ - /* Port J */ - PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA, - PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA, - PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA, - PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA, - PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA, - PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA, - PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA, - PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA, - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - FORCE_IN, - /* Port A */ - PA1_IN, PA0_IN, - /* Port B */ - PB22_IN, PB21_IN, PB20_IN, - PB19_IN, PB18_IN, PB17_IN, PB16_IN, - PB15_IN, PB14_IN, PB13_IN, PB12_IN, - PB11_IN, PB10_IN, PB9_IN, PB8_IN, - PB7_IN, PB6_IN, PB5_IN, PB4_IN, - PB3_IN, PB2_IN, PB1_IN, - /* Port C */ - PC8_IN, - PC7_IN, PC6_IN, PC5_IN, PC4_IN, - PC3_IN, PC2_IN, PC1_IN, PC0_IN, - /* Port D */ - PD15_IN, PD14_IN, PD13_IN, PD12_IN, - PD11_IN, PD10_IN, PD9_IN, PD8_IN, - PD7_IN, PD6_IN, PD5_IN, PD4_IN, - PD3_IN, PD2_IN, PD1_IN, PD0_IN, - /* Port E */ - PE7_IN, PE6_IN, PE5_IN, PE4_IN, - PE3_IN, PE2_IN, PE1_IN, PE0_IN, - /* Port F */ - PF23_IN, PF22_IN, PF21_IN, PF20_IN, - PF19_IN, PF18_IN, PF17_IN, PF16_IN, - PF15_IN, PF14_IN, PF13_IN, PF12_IN, - PF11_IN, PF10_IN, PF9_IN, PF8_IN, - PF7_IN, PF6_IN, PF5_IN, PF4_IN, - PF3_IN, PF2_IN, PF1_IN, PF0_IN, - /* Port G */ - PG27_IN, PG26_IN, PG25_IN, PG24_IN, - PG23_IN, PG22_IN, PG21_IN, PG20_IN, - PG19_IN, PG18_IN, PG17_IN, PG16_IN, - PG15_IN, PG14_IN, PG13_IN, PG12_IN, - PG11_IN, PG10_IN, PG9_IN, PG8_IN, - PG7_IN, PG6_IN, PG5_IN, PG4_IN, - PG3_IN, PG2_IN, PG1_IN, PG0_IN, - /* Port H - Port H does not have a Data Register */ - /* Port I - not on device */ - /* Port J */ - PJ31_IN, PJ30_IN, PJ29_IN, PJ28_IN, - PJ27_IN, PJ26_IN, PJ25_IN, PJ24_IN, - PJ23_IN, PJ22_IN, PJ21_IN, PJ20_IN, - PJ19_IN, PJ18_IN, PJ17_IN, PJ16_IN, - PJ15_IN, PJ14_IN, PJ13_IN, PJ12_IN, - PJ11_IN, PJ10_IN, PJ9_IN, PJ8_IN, - PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN, - PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN, - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - FORCE_OUT, - /* Port A */ - PA1_OUT, PA0_OUT, - /* Port B */ - PB22_OUT, PB21_OUT, PB20_OUT, - PB19_OUT, PB18_OUT, PB17_OUT, PB16_OUT, - PB15_OUT, PB14_OUT, PB13_OUT, PB12_OUT, - PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT, - PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT, - PB3_OUT, PB2_OUT, PB1_OUT, - /* Port C */ - PC8_OUT, - PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT, - PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT, - /* Port D */ - PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT, - PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT, - PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT, - PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT, - /* Port E */ - PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT, - PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT, - /* Port F */ - PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT, - PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT, - PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT, - PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT, - PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT, - PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT, - /* Port G */ - PG27_OUT, PG26_OUT, PG25_OUT, PG24_OUT, - PG23_OUT, PG22_OUT, PG21_OUT, PG20_OUT, - PG19_OUT, PG18_OUT, PG17_OUT, PG16_OUT, - PG15_OUT, PG14_OUT, PG13_OUT, PG12_OUT, - PG11_OUT, PG10_OUT, PG9_OUT, PG8_OUT, - PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT, - PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT, - /* Port H - Port H does not have a Data Register */ - /* Port I - not on device */ - /* Port J */ - PJ31_OUT, PJ30_OUT, PJ29_OUT, PJ28_OUT, - PJ27_OUT, PJ26_OUT, PJ25_OUT, PJ24_OUT, - PJ23_OUT, PJ22_OUT, PJ21_OUT, PJ20_OUT, - PJ19_OUT, PJ18_OUT, PJ17_OUT, PJ16_OUT, - PJ15_OUT, PJ14_OUT, PJ13_OUT, PJ12_OUT, - PJ11_OUT, PJ10_OUT, PJ9_OUT, PJ8_OUT, - PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT, - PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT, - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - /* Port A */ - PA1_IOR_IN, PA1_IOR_OUT, - PA0_IOR_IN, PA0_IOR_OUT, - - /* Port B */ - PB22_IOR_IN, PB22_IOR_OUT, - PB21_IOR_IN, PB21_IOR_OUT, - PB20_IOR_IN, PB20_IOR_OUT, - PB19_IOR_IN, PB19_IOR_OUT, - PB18_IOR_IN, PB18_IOR_OUT, - PB17_IOR_IN, PB17_IOR_OUT, - PB16_IOR_IN, PB16_IOR_OUT, - - PB15_IOR_IN, PB15_IOR_OUT, - PB14_IOR_IN, PB14_IOR_OUT, - PB13_IOR_IN, PB13_IOR_OUT, - PB12_IOR_IN, PB12_IOR_OUT, - PB11_IOR_IN, PB11_IOR_OUT, - PB10_IOR_IN, PB10_IOR_OUT, - PB9_IOR_IN, PB9_IOR_OUT, - PB8_IOR_IN, PB8_IOR_OUT, - - PB7_IOR_IN, PB7_IOR_OUT, - PB6_IOR_IN, PB6_IOR_OUT, - PB5_IOR_IN, PB5_IOR_OUT, - PB4_IOR_IN, PB4_IOR_OUT, - PB3_IOR_IN, PB3_IOR_OUT, - PB2_IOR_IN, PB2_IOR_OUT, - PB1_IOR_IN, PB1_IOR_OUT, - PB0_IOR_IN, PB0_IOR_OUT, - - PB22MD_000, PB22MD_001, PB22MD_010, PB22MD_011, - PB22MD_100, PB22MD_101, PB22MD_110, PB22MD_111, - PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11, - PB20MD_000, PB20MD_001, PB20MD_010, PB20MD_011, - PB20MD_100, PB20MD_101, PB20MD_110, PB20MD_111, - PB19MD_000, PB19MD_001, PB19MD_010, PB19MD_011, - PB19MD_100, PB19MD_101, PB19MD_110, PB19MD_111, - PB18MD_000, PB18MD_001, PB18MD_010, PB18MD_011, - PB18MD_100, PB18MD_101, PB18MD_110, PB18MD_111, - PB17MD_000, PB17MD_001, PB17MD_010, PB17MD_011, - PB17MD_100, PB17MD_101, PB17MD_110, PB17MD_111, - PB16MD_000, PB16MD_001, PB16MD_010, PB16MD_011, - PB16MD_100, PB16MD_101, PB16MD_110, PB16MD_111, - PB15MD_000, PB15MD_001, PB15MD_010, PB15MD_011, - PB15MD_100, PB15MD_101, PB15MD_110, PB15MD_111, - PB14MD_000, PB14MD_001, PB14MD_010, PB14MD_011, - PB14MD_100, PB14MD_101, PB14MD_110, PB14MD_111, - PB13MD_000, PB13MD_001, PB13MD_010, PB13MD_011, - PB13MD_100, PB13MD_101, PB13MD_110, PB13MD_111, - PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, - - PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11, - PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11, - PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11, - PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11, - - PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, - PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, - PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, - PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, - - PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, - PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, - PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, - - /* Port C */ - PC8_IOR_IN, PC8_IOR_OUT, - PC7_IOR_IN, PC7_IOR_OUT, - PC6_IOR_IN, PC6_IOR_OUT, - PC5_IOR_IN, PC5_IOR_OUT, - PC4_IOR_IN, PC4_IOR_OUT, - PC3_IOR_IN, PC3_IOR_OUT, - PC2_IOR_IN, PC2_IOR_OUT, - PC1_IOR_IN, PC1_IOR_OUT, - PC0_IOR_IN, PC0_IOR_OUT, - - PC8MD_000, PC8MD_001, PC8MD_010, PC8MD_011, - PC8MD_100, PC8MD_101, PC8MD_110, PC8MD_111, - PC7MD_000, PC7MD_001, PC7MD_010, PC7MD_011, - PC7MD_100, PC7MD_101, PC7MD_110, PC7MD_111, - PC6MD_000, PC6MD_001, PC6MD_010, PC6MD_011, - PC6MD_100, PC6MD_101, PC6MD_110, PC6MD_111, - PC5MD_000, PC5MD_001, PC5MD_010, PC5MD_011, - PC5MD_100, PC5MD_101, PC5MD_110, PC5MD_111, - PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11, - - PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11, - PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11, - PC1MD_0, PC1MD_1, - PC0MD_0, PC0MD_1, - - /* Port D */ - PD15_IOR_IN, PD15_IOR_OUT, - PD14_IOR_IN, PD14_IOR_OUT, - PD13_IOR_IN, PD13_IOR_OUT, - PD12_IOR_IN, PD12_IOR_OUT, - PD11_IOR_IN, PD11_IOR_OUT, - PD10_IOR_IN, PD10_IOR_OUT, - PD9_IOR_IN, PD9_IOR_OUT, - PD8_IOR_IN, PD8_IOR_OUT, - PD7_IOR_IN, PD7_IOR_OUT, - PD6_IOR_IN, PD6_IOR_OUT, - PD5_IOR_IN, PD5_IOR_OUT, - PD4_IOR_IN, PD4_IOR_OUT, - PD3_IOR_IN, PD3_IOR_OUT, - PD2_IOR_IN, PD2_IOR_OUT, - PD1_IOR_IN, PD1_IOR_OUT, - PD0_IOR_IN, PD0_IOR_OUT, - - PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11, - PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11, - PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11, - PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11, - - PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11, - PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11, - PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11, - PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11, - - PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11, - PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11, - PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11, - PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11, - - PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11, - PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11, - PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11, - PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11, - - /* Port E */ - PE7_IOR_IN, PE7_IOR_OUT, - PE6_IOR_IN, PE6_IOR_OUT, - PE5_IOR_IN, PE5_IOR_OUT, - PE4_IOR_IN, PE4_IOR_OUT, - PE3_IOR_IN, PE3_IOR_OUT, - PE2_IOR_IN, PE2_IOR_OUT, - PE1_IOR_IN, PE1_IOR_OUT, - PE0_IOR_IN, PE0_IOR_OUT, - - PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11, - PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11, - PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11, - PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11, - - PE3MD_000, PE3MD_001, PE3MD_010, PE3MD_011, - PE3MD_100, PE3MD_101, PE3MD_110, PE3MD_111, - PE2MD_000, PE2MD_001, PE2MD_010, PE2MD_011, - PE2MD_100, PE2MD_101, PE2MD_110, PE2MD_111, - PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011, - PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111, - PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, - - /* Port F */ - PF23_IOR_IN, PF23_IOR_OUT, - PF22_IOR_IN, PF22_IOR_OUT, - PF21_IOR_IN, PF21_IOR_OUT, - PF20_IOR_IN, PF20_IOR_OUT, - PF19_IOR_IN, PF19_IOR_OUT, - PF18_IOR_IN, PF18_IOR_OUT, - PF17_IOR_IN, PF17_IOR_OUT, - PF16_IOR_IN, PF16_IOR_OUT, - PF15_IOR_IN, PF15_IOR_OUT, - PF14_IOR_IN, PF14_IOR_OUT, - PF13_IOR_IN, PF13_IOR_OUT, - PF12_IOR_IN, PF12_IOR_OUT, - PF11_IOR_IN, PF11_IOR_OUT, - PF10_IOR_IN, PF10_IOR_OUT, - PF9_IOR_IN, PF9_IOR_OUT, - PF8_IOR_IN, PF8_IOR_OUT, - PF7_IOR_IN, PF7_IOR_OUT, - PF6_IOR_IN, PF6_IOR_OUT, - PF5_IOR_IN, PF5_IOR_OUT, - PF4_IOR_IN, PF4_IOR_OUT, - PF3_IOR_IN, PF3_IOR_OUT, - PF2_IOR_IN, PF2_IOR_OUT, - PF1_IOR_IN, PF1_IOR_OUT, - PF0_IOR_IN, PF0_IOR_OUT, - - PF23MD_000, PF23MD_001, PF23MD_010, PF23MD_011, - PF23MD_100, PF23MD_101, PF23MD_110, PF23MD_111, - PF22MD_000, PF22MD_001, PF22MD_010, PF22MD_011, - PF22MD_100, PF22MD_101, PF22MD_110, PF22MD_111, - PF21MD_000, PF21MD_001, PF21MD_010, PF21MD_011, - PF21MD_100, PF21MD_101, PF21MD_110, PF21MD_111, - PF20MD_000, PF20MD_001, PF20MD_010, PF20MD_011, - PF20MD_100, PF20MD_101, PF20MD_110, PF20MD_111, - - PF19MD_000, PF19MD_001, PF19MD_010, PF19MD_011, - PF19MD_100, PF19MD_101, PF19MD_110, PF19MD_111, - PF18MD_000, PF18MD_001, PF18MD_010, PF18MD_011, - PF18MD_100, PF18MD_101, PF18MD_110, PF18MD_111, - PF17MD_000, PF17MD_001, PF17MD_010, PF17MD_011, - PF17MD_100, PF17MD_101, PF17MD_110, PF17MD_111, - PF16MD_000, PF16MD_001, PF16MD_010, PF16MD_011, - PF16MD_100, PF16MD_101, PF16MD_110, PF16MD_111, - - PF15MD_000, PF15MD_001, PF15MD_010, PF15MD_011, - PF15MD_100, PF15MD_101, PF15MD_110, PF15MD_111, - PF14MD_000, PF14MD_001, PF14MD_010, PF14MD_011, - PF14MD_100, PF14MD_101, PF14MD_110, PF14MD_111, - PF13MD_000, PF13MD_001, PF13MD_010, PF13MD_011, - PF13MD_100, PF13MD_101, PF13MD_110, PF13MD_111, - PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011, - PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111, - - PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011, - PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111, - PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011, - PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111, - PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011, - PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111, - PF8MD_000, PF8MD_001, PF8MD_010, PF8MD_011, - PF8MD_100, PF8MD_101, PF8MD_110, PF8MD_111, - - PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011, - PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111, - PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011, - PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111, - PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011, - PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111, - PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011, - PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111, - - PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011, - PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111, - PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011, - PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111, - PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011, - PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111, - PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011, - PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111, - - /* Port G */ - PG27_IOR_IN, PG27_IOR_OUT, - PG26_IOR_IN, PG26_IOR_OUT, - PG25_IOR_IN, PG25_IOR_OUT, - PG24_IOR_IN, PG24_IOR_OUT, - PG23_IOR_IN, PG23_IOR_OUT, - PG22_IOR_IN, PG22_IOR_OUT, - PG21_IOR_IN, PG21_IOR_OUT, - PG20_IOR_IN, PG20_IOR_OUT, - PG19_IOR_IN, PG19_IOR_OUT, - PG18_IOR_IN, PG18_IOR_OUT, - PG17_IOR_IN, PG17_IOR_OUT, - PG16_IOR_IN, PG16_IOR_OUT, - PG15_IOR_IN, PG15_IOR_OUT, - PG14_IOR_IN, PG14_IOR_OUT, - PG13_IOR_IN, PG13_IOR_OUT, - PG12_IOR_IN, PG12_IOR_OUT, - PG11_IOR_IN, PG11_IOR_OUT, - PG10_IOR_IN, PG10_IOR_OUT, - PG9_IOR_IN, PG9_IOR_OUT, - PG8_IOR_IN, PG8_IOR_OUT, - PG7_IOR_IN, PG7_IOR_OUT, - PG6_IOR_IN, PG6_IOR_OUT, - PG5_IOR_IN, PG5_IOR_OUT, - PG4_IOR_IN, PG4_IOR_OUT, - PG3_IOR_IN, PG3_IOR_OUT, - PG2_IOR_IN, PG2_IOR_OUT, - PG1_IOR_IN, PG1_IOR_OUT, - PG0_IOR_IN, PG0_IOR_OUT, - - PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11, - PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11, - PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11, - PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, - - PG23MD_000, PG23MD_001, PG23MD_010, PG23MD_011, - PG23MD_100, PG23MD_101, PG23MD_110, PG23MD_111, - PG22MD_000, PG22MD_001, PG22MD_010, PG22MD_011, - PG22MD_100, PG22MD_101, PG22MD_110, PG22MD_111, - PG21MD_000, PG21MD_001, PG21MD_010, PG21MD_011, - PG21MD_100, PG21MD_101, PG21MD_110, PG21MD_111, - PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011, - PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111, - - PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011, - PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111, - PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011, - PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111, - PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11, - PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11, - - PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11, - PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11, - PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11, - PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11, - - PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011, - PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111, - PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011, - PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111, - PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011, - PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111, - PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011, - PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111, - - PG7MD_000, PG7MD_001, PG7MD_010, PG7MD_011, - PG7MD_100, PG7MD_101, PG7MD_110, PG7MD_111, - PG6MD_000, PG6MD_001, PG6MD_010, PG6MD_011, - PG6MD_100, PG6MD_101, PG6MD_110, PG6MD_111, - PG5MD_000, PG5MD_001, PG5MD_010, PG5MD_011, - PG5MD_100, PG5MD_101, PG5MD_110, PG5MD_111, - PG4MD_000, PG4MD_001, PG4MD_010, PG4MD_011, - PG4MD_100, PG4MD_101, PG4MD_110, PG4MD_111, - - PG3MD_000, PG3MD_001, PG3MD_010, PG3MD_011, - PG3MD_100, PG3MD_101, PG3MD_110, PG3MD_111, - PG2MD_000, PG2MD_001, PG2MD_010, PG2MD_011, - PG2MD_100, PG2MD_101, PG2MD_110, PG2MD_111, - PG1MD_000, PG1MD_001, PG1MD_010, PG1MD_011, - PG1MD_100, PG1MD_101, PG1MD_110, PG1MD_111, - PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011, - PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111, - - /* Port H */ - PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11, - PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11, - PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11, - PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11, - - PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11, - PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11, - PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11, - PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11, - - /* Port I - not on device */ - - /* Port J */ - PJ31_IOR_IN, PJ31_IOR_OUT, - PJ30_IOR_IN, PJ30_IOR_OUT, - PJ29_IOR_IN, PJ29_IOR_OUT, - PJ28_IOR_IN, PJ28_IOR_OUT, - PJ27_IOR_IN, PJ27_IOR_OUT, - PJ26_IOR_IN, PJ26_IOR_OUT, - PJ25_IOR_IN, PJ25_IOR_OUT, - PJ24_IOR_IN, PJ24_IOR_OUT, - PJ23_IOR_IN, PJ23_IOR_OUT, - PJ22_IOR_IN, PJ22_IOR_OUT, - PJ21_IOR_IN, PJ21_IOR_OUT, - PJ20_IOR_IN, PJ20_IOR_OUT, - PJ19_IOR_IN, PJ19_IOR_OUT, - PJ18_IOR_IN, PJ18_IOR_OUT, - PJ17_IOR_IN, PJ17_IOR_OUT, - PJ16_IOR_IN, PJ16_IOR_OUT, - PJ15_IOR_IN, PJ15_IOR_OUT, - PJ14_IOR_IN, PJ14_IOR_OUT, - PJ13_IOR_IN, PJ13_IOR_OUT, - PJ12_IOR_IN, PJ12_IOR_OUT, - PJ11_IOR_IN, PJ11_IOR_OUT, - PJ10_IOR_IN, PJ10_IOR_OUT, - PJ9_IOR_IN, PJ9_IOR_OUT, - PJ8_IOR_IN, PJ8_IOR_OUT, - PJ7_IOR_IN, PJ7_IOR_OUT, - PJ6_IOR_IN, PJ6_IOR_OUT, - PJ5_IOR_IN, PJ5_IOR_OUT, - PJ4_IOR_IN, PJ4_IOR_OUT, - PJ3_IOR_IN, PJ3_IOR_OUT, - PJ2_IOR_IN, PJ2_IOR_OUT, - PJ1_IOR_IN, PJ1_IOR_OUT, - PJ0_IOR_IN, PJ0_IOR_OUT, - - PJ31MD_0, PJ31MD_1, - PJ30MD_000, PJ30MD_001, PJ30MD_010, PJ30MD_011, - PJ30MD_100, PJ30MD_101, PJ30MD_110, PJ30MD_111, - PJ29MD_000, PJ29MD_001, PJ29MD_010, PJ29MD_011, - PJ29MD_100, PJ29MD_101, PJ29MD_110, PJ29MD_111, - PJ28MD_000, PJ28MD_001, PJ28MD_010, PJ28MD_011, - PJ28MD_100, PJ28MD_101, PJ28MD_110, PJ28MD_111, - - PJ27MD_000, PJ27MD_001, PJ27MD_010, PJ27MD_011, - PJ27MD_100, PJ27MD_101, PJ27MD_110, PJ27MD_111, - PJ26MD_000, PJ26MD_001, PJ26MD_010, PJ26MD_011, - PJ26MD_100, PJ26MD_101, PJ26MD_110, PJ26MD_111, - PJ25MD_000, PJ25MD_001, PJ25MD_010, PJ25MD_011, - PJ25MD_100, PJ25MD_101, PJ25MD_110, PJ25MD_111, - PJ24MD_000, PJ24MD_001, PJ24MD_010, PJ24MD_011, - PJ24MD_100, PJ24MD_101, PJ24MD_110, PJ24MD_111, - - PJ23MD_000, PJ23MD_001, PJ23MD_010, PJ23MD_011, - PJ23MD_100, PJ23MD_101, PJ23MD_110, PJ23MD_111, - PJ22MD_000, PJ22MD_001, PJ22MD_010, PJ22MD_011, - PJ22MD_100, PJ22MD_101, PJ22MD_110, PJ22MD_111, - PJ21MD_000, PJ21MD_001, PJ21MD_010, PJ21MD_011, - PJ21MD_100, PJ21MD_101, PJ21MD_110, PJ21MD_111, - PJ20MD_000, PJ20MD_001, PJ20MD_010, PJ20MD_011, - PJ20MD_100, PJ20MD_101, PJ20MD_110, PJ20MD_111, - - PJ19MD_000, PJ19MD_001, PJ19MD_010, PJ19MD_011, - PJ19MD_100, PJ19MD_101, PJ19MD_110, PJ19MD_111, - PJ18MD_000, PJ18MD_001, PJ18MD_010, PJ18MD_011, - PJ18MD_100, PJ18MD_101, PJ18MD_110, PJ18MD_111, - PJ17MD_000, PJ17MD_001, PJ17MD_010, PJ17MD_011, - PJ17MD_100, PJ17MD_101, PJ17MD_110, PJ17MD_111, - PJ16MD_000, PJ16MD_001, PJ16MD_010, PJ16MD_011, - PJ16MD_100, PJ16MD_101, PJ16MD_110, PJ16MD_111, - - PJ15MD_000, PJ15MD_001, PJ15MD_010, PJ15MD_011, - PJ15MD_100, PJ15MD_101, PJ15MD_110, PJ15MD_111, - PJ14MD_000, PJ14MD_001, PJ14MD_010, PJ14MD_011, - PJ14MD_100, PJ14MD_101, PJ14MD_110, PJ14MD_111, - PJ13MD_000, PJ13MD_001, PJ13MD_010, PJ13MD_011, - PJ13MD_100, PJ13MD_101, PJ13MD_110, PJ13MD_111, - PJ12MD_000, PJ12MD_001, PJ12MD_010, PJ12MD_011, - PJ12MD_100, PJ12MD_101, PJ12MD_110, PJ12MD_111, - - PJ11MD_000, PJ11MD_001, PJ11MD_010, PJ11MD_011, - PJ11MD_100, PJ11MD_101, PJ11MD_110, PJ11MD_111, - PJ10MD_000, PJ10MD_001, PJ10MD_010, PJ10MD_011, - PJ10MD_100, PJ10MD_101, PJ10MD_110, PJ10MD_111, - PJ9MD_000, PJ9MD_001, PJ9MD_010, PJ9MD_011, - PJ9MD_100, PJ9MD_101, PJ9MD_110, PJ9MD_111, - PJ8MD_000, PJ8MD_001, PJ8MD_010, PJ8MD_011, - PJ8MD_100, PJ8MD_101, PJ8MD_110, PJ8MD_111, - - PJ7MD_000, PJ7MD_001, PJ7MD_010, PJ7MD_011, - PJ7MD_100, PJ7MD_101, PJ7MD_110, PJ7MD_111, - PJ6MD_000, PJ6MD_001, PJ6MD_010, PJ6MD_011, - PJ6MD_100, PJ6MD_101, PJ6MD_110, PJ6MD_111, - PJ5MD_000, PJ5MD_001, PJ5MD_010, PJ5MD_011, - PJ5MD_100, PJ5MD_101, PJ5MD_110, PJ5MD_111, - PJ4MD_000, PJ4MD_001, PJ4MD_010, PJ4MD_011, - PJ4MD_100, PJ4MD_101, PJ4MD_110, PJ4MD_111, - - PJ3MD_000, PJ3MD_001, PJ3MD_010, PJ3MD_011, - PJ3MD_100, PJ3MD_101, PJ3MD_110, PJ3MD_111, - PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011, - PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111, - PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011, - PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111, - PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011, - PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111, - - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - /* Port H */ - PHAN7_MARK, PHAN6_MARK, PHAN5_MARK, PHAN4_MARK, - PHAN3_MARK, PHAN2_MARK, PHAN1_MARK, PHAN0_MARK, - - /* IRQs */ - IRQ7_PG_MARK, IRQ6_PG_MARK, IRQ5_PG_MARK, IRQ4_PG_MARK, - IRQ3_PG_MARK, IRQ2_PG_MARK, IRQ1_PG_MARK, IRQ0_PG_MARK, - IRQ7_PF_MARK, IRQ6_PF_MARK, IRQ5_PF_MARK, IRQ4_PF_MARK, - IRQ3_PJ_MARK, IRQ2_PJ_MARK, IRQ1_PJ_MARK, IRQ0_PJ_MARK, - IRQ1_PC_MARK, IRQ0_PC_MARK, - - PINT7_PG_MARK, PINT6_PG_MARK, PINT5_PG_MARK, PINT4_PG_MARK, - PINT3_PG_MARK, PINT2_PG_MARK, PINT1_PG_MARK, PINT0_PG_MARK, - PINT7_PH_MARK, PINT6_PH_MARK, PINT5_PH_MARK, PINT4_PH_MARK, - PINT3_PH_MARK, PINT2_PH_MARK, PINT1_PH_MARK, PINT0_PH_MARK, - PINT7_PJ_MARK, PINT6_PJ_MARK, PINT5_PJ_MARK, PINT4_PJ_MARK, - PINT3_PJ_MARK, PINT2_PJ_MARK, PINT1_PJ_MARK, PINT0_PJ_MARK, - - /* SD */ - SD_D0_MARK, SD_D1_MARK, SD_D2_MARK, SD_D3_MARK, - SD_WP_MARK, SD_CLK_MARK, SD_CMD_MARK, SD_CD_MARK, - - /* MMC */ - MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK, - MMC_D4_MARK, MMC_D5_MARK, MMC_D6_MARK, MMC_D7_MARK, - MMC_CLK_MARK, MMC_CMD_MARK, MMC_CD_MARK, - - /* PWM */ - PWM1A_MARK, PWM1B_MARK, PWM1C_MARK, PWM1D_MARK, - PWM1E_MARK, PWM1F_MARK, PWM1G_MARK, PWM1H_MARK, - PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK, - PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK, - - /* IEBus */ - IERXD_MARK, IETXD_MARK, - - /* WDT */ - WDTOVF_MARK, - - /* DMAC */ - TEND0_MARK, DACK0_MARK, DREQ0_MARK, - TEND1_MARK, DACK1_MARK, DREQ1_MARK, - - /* ADC */ - ADTRG_MARK, - - /* BSC */ - A25_MARK, A24_MARK, - A23_MARK, A22_MARK, A21_MARK, A20_MARK, - A19_MARK, A18_MARK, A17_MARK, A16_MARK, - A15_MARK, A14_MARK, A13_MARK, A12_MARK, - A11_MARK, A10_MARK, A9_MARK, A8_MARK, - A7_MARK, A6_MARK, A5_MARK, A4_MARK, - A3_MARK, A2_MARK, A1_MARK, A0_MARK, - D31_MARK, D30_MARK, D29_MARK, D28_MARK, - D27_MARK, D26_MARK, D25_MARK, D24_MARK, - D23_MARK, D22_MARK, D21_MARK, D20_MARK, - D19_MARK, D18_MARK, D17_MARK, D16_MARK, - D15_MARK, D14_MARK, D13_MARK, D12_MARK, - D11_MARK, D10_MARK, D9_MARK, D8_MARK, - D7_MARK, D6_MARK, D5_MARK, D4_MARK, - D3_MARK, D2_MARK, D1_MARK, D0_MARK, - BS_MARK, - CS4_MARK, CS3_MARK, CS2_MARK, CS1_MARK, CS0_MARK, - CS5CE1A_MARK, - CE2A_MARK, CE2B_MARK, - RD_MARK, RDWR_MARK, - WE3ICIOWRAHDQMUU_MARK, - WE2ICIORDDQMUL_MARK, - WE1DQMUWE_MARK, - WE0DQML_MARK, - RAS_MARK, CAS_MARK, CKE_MARK, - WAIT_MARK, BREQ_MARK, BACK_MARK, IOIS16_MARK, - - /* TMU */ - TIOC0A_MARK, TIOC0B_MARK, TIOC0C_MARK, TIOC0D_MARK, - TIOC1A_MARK, TIOC1B_MARK, - TIOC2A_MARK, TIOC2B_MARK, - TIOC3A_MARK, TIOC3B_MARK, TIOC3C_MARK, TIOC3D_MARK, - TIOC4A_MARK, TIOC4B_MARK, TIOC4C_MARK, TIOC4D_MARK, - TCLKA_MARK, TCLKB_MARK, TCLKC_MARK, TCLKD_MARK, - - /* SCIF */ - SCK0_MARK, RXD0_MARK, TXD0_MARK, - SCK1_MARK, RXD1_MARK, TXD1_MARK, RTS1_MARK, CTS1_MARK, - SCK2_MARK, RXD2_MARK, TXD2_MARK, - SCK3_MARK, RXD3_MARK, TXD3_MARK, - SCK4_MARK, RXD4_MARK, TXD4_MARK, - SCK5_MARK, RXD5_MARK, TXD5_MARK, RTS5_MARK, CTS5_MARK, - SCK6_MARK, RXD6_MARK, TXD6_MARK, - SCK7_MARK, RXD7_MARK, TXD7_MARK, RTS7_MARK, CTS7_MARK, - - /* RSPI */ - MISO0_PB20_MARK, MOSI0_PB19_MARK, SSL00_PB18_MARK, RSPCK0_PB17_MARK, - MISO0_PJ19_MARK, MOSI0_PJ18_MARK, SSL00_PJ17_MARK, RSPCK0_PJ16_MARK, - MISO1_MARK, MOSI1_MARK, SSL10_MARK, RSPCK1_MARK, - - /* IIC3 */ - SCL0_MARK, SDA0_MARK, - SCL1_MARK, SDA1_MARK, - SCL2_MARK, SDA2_MARK, - SCL3_MARK, SDA3_MARK, - - /* SSI */ - SSISCK0_MARK, SSIWS0_MARK, SSITXD0_MARK, SSIRXD0_MARK, - SSISCK1_MARK, SSIWS1_MARK, SSIDATA1_MARK, - SSISCK2_MARK, SSIWS2_MARK, SSIDATA2_MARK, - SSISCK3_MARK, SSIWS3_MARK, SSIDATA3_MARK, - SSISCK4_MARK, SSIWS4_MARK, SSIDATA4_MARK, - SSISCK5_MARK, SSIWS5_MARK, SSIDATA5_MARK, - AUDIO_CLK_MARK, - AUDIO_XOUT_MARK, - - /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */ - SIOFTXD_MARK, SIOFRXD_MARK, SIOFSYNC_MARK, SIOFSCK_MARK, - - /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */ - SPDIF_IN_MARK, SPDIF_OUT_MARK, - SPDIF_IN_PJ24_MARK, SPDIF_OUT_PJ25_MARK, - - /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ - FCE_MARK, - FRB_MARK, - - /* CAN */ - CRX0_MARK, CTX0_MARK, - CRX1_MARK, CTX1_MARK, - CRX2_MARK, CTX2_MARK, - CRX0CRX1_MARK, - CRX0CRX1CRX2_MARK, - CTX0CTX1CTX2_MARK, - CRX1_PJ22_MARK, CTX1_PJ23_MARK, - CRX2_PJ20_MARK, CTX2_PJ21_MARK, - CRX0CRX1_PJ22_MARK, - CRX0CRX1CRX2_PJ20_MARK, - - /* VDC */ - DV_CLK_MARK, - DV_VSYNC_MARK, DV_HSYNC_MARK, - DV_DATA23_MARK, DV_DATA22_MARK, DV_DATA21_MARK, DV_DATA20_MARK, - DV_DATA19_MARK, DV_DATA18_MARK, DV_DATA17_MARK, DV_DATA16_MARK, - DV_DATA15_MARK, DV_DATA14_MARK, DV_DATA13_MARK, DV_DATA12_MARK, - DV_DATA11_MARK, DV_DATA10_MARK, DV_DATA9_MARK, DV_DATA8_MARK, - DV_DATA7_MARK, DV_DATA6_MARK, DV_DATA5_MARK, DV_DATA4_MARK, - DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK, - LCD_CLK_MARK, LCD_EXTCLK_MARK, - LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK, - LCD_DATA23_MARK, LCD_DATA22_MARK, LCD_DATA21_MARK, LCD_DATA20_MARK, - LCD_DATA19_MARK, LCD_DATA18_MARK, LCD_DATA17_MARK, LCD_DATA16_MARK, - LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK, - LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK, - LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK, - LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK, - LCD_TCON6_MARK, LCD_TCON5_MARK, LCD_TCON4_MARK, - LCD_TCON3_MARK, LCD_TCON2_MARK, LCD_TCON1_MARK, LCD_TCON0_MARK, - LCD_M_DISP_MARK, - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - - /* Port A */ - PINMUX_DATA(PA1_DATA, PA1_IN), - PINMUX_DATA(PA0_DATA, PA0_IN), - - /* Port B */ - PINMUX_DATA(PB22_DATA, PB22MD_000, PB22_IN, PB22_OUT), - PINMUX_DATA(A22_MARK, PB22MD_001), - PINMUX_DATA(CTX2_MARK, PB22MD_010), - PINMUX_DATA(IETXD_MARK, PB22MD_011), - PINMUX_DATA(CS4_MARK, PB22MD_100), - - PINMUX_DATA(PB21_DATA, PB21MD_00, PB21_IN, PB21_OUT), - PINMUX_DATA(A21_MARK, PB21MD_01), - PINMUX_DATA(CRX2_MARK, PB21MD_10), - PINMUX_DATA(IERXD_MARK, PB21MD_11), - - PINMUX_DATA(A20_MARK, PB20MD_001), - PINMUX_DATA(A19_MARK, PB19MD_001), - PINMUX_DATA(A18_MARK, PB18MD_001), - PINMUX_DATA(A17_MARK, PB17MD_001), - PINMUX_DATA(A16_MARK, PB16MD_001), - PINMUX_DATA(A15_MARK, PB15MD_001), - PINMUX_DATA(A14_MARK, PB14MD_001), - PINMUX_DATA(A13_MARK, PB13MD_001), - PINMUX_DATA(A12_MARK, PB12MD_01), - PINMUX_DATA(A11_MARK, PB11MD_01), - PINMUX_DATA(A10_MARK, PB10MD_01), - PINMUX_DATA(A9_MARK, PB9MD_01), - PINMUX_DATA(A8_MARK, PB8MD_01), - PINMUX_DATA(A7_MARK, PB7MD_01), - PINMUX_DATA(A6_MARK, PB6MD_01), - PINMUX_DATA(A5_MARK, PB5MD_01), - PINMUX_DATA(A4_MARK, PB4MD_01), - PINMUX_DATA(A3_MARK, PB3MD_01), - PINMUX_DATA(A2_MARK, PB2MD_01), - PINMUX_DATA(A1_MARK, PB1MD_01), - - /* Port C */ - PINMUX_DATA(PC8_DATA, PC8MD_000), - PINMUX_DATA(CS3_MARK, PC8MD_001), - PINMUX_DATA(TXD7_MARK, PC8MD_010), - PINMUX_DATA(CTX1_MARK, PC8MD_011), - - PINMUX_DATA(PC7_DATA, PC7MD_000), - PINMUX_DATA(CKE_MARK, PC7MD_001), - PINMUX_DATA(RXD7_MARK, PC7MD_010), - PINMUX_DATA(CRX1_MARK, PC7MD_011), - PINMUX_DATA(CRX0CRX1_MARK, PC7MD_100), - PINMUX_DATA(IRQ1_PC_MARK, PC7MD_101), - - PINMUX_DATA(PC6_DATA, PC6MD_000), - PINMUX_DATA(CAS_MARK, PC6MD_001), - PINMUX_DATA(SCK7_MARK, PC6MD_010), - PINMUX_DATA(CTX0_MARK, PC6MD_011), - - PINMUX_DATA(PC5_DATA, PC5MD_000), - PINMUX_DATA(RAS_MARK, PC5MD_001), - PINMUX_DATA(CRX0_MARK, PC5MD_011), - PINMUX_DATA(CTX0CTX1CTX2_MARK, PC5MD_100), - PINMUX_DATA(IRQ0_PC_MARK, PC5MD_101), - - PINMUX_DATA(PC4_DATA, PC4MD_00), - PINMUX_DATA(WE1DQMUWE_MARK, PC4MD_01), - PINMUX_DATA(TXD6_MARK, PC4MD_10), - - PINMUX_DATA(PC3_DATA, PC3MD_00), - PINMUX_DATA(WE0DQML_MARK, PC3MD_01), - PINMUX_DATA(RXD6_MARK, PC3MD_10), - - PINMUX_DATA(PC2_DATA, PC2MD_00), - PINMUX_DATA(RDWR_MARK, PC2MD_01), - PINMUX_DATA(SCK5_MARK, PC2MD_10), - - PINMUX_DATA(PC1_DATA, PC1MD_0), - PINMUX_DATA(RD_MARK, PC1MD_1), - - PINMUX_DATA(PC0_DATA, PC0MD_0), - PINMUX_DATA(CS0_MARK, PC0MD_1), - - /* Port D */ - PINMUX_DATA(D15_MARK, PD15MD_01), - PINMUX_DATA(D14_MARK, PD14MD_01), - - PINMUX_DATA(PD13_DATA, PD13MD_00), - PINMUX_DATA(D13_MARK, PD13MD_01), - PINMUX_DATA(PWM2F_MARK, PD13MD_10), - - PINMUX_DATA(PD12_DATA, PD12MD_00), - PINMUX_DATA(D12_MARK, PD12MD_01), - PINMUX_DATA(PWM2E_MARK, PD12MD_10), - - PINMUX_DATA(D11_MARK, PD11MD_01), - PINMUX_DATA(D10_MARK, PD10MD_01), - PINMUX_DATA(D9_MARK, PD9MD_01), - PINMUX_DATA(D8_MARK, PD8MD_01), - PINMUX_DATA(D7_MARK, PD7MD_01), - PINMUX_DATA(D6_MARK, PD6MD_01), - PINMUX_DATA(D5_MARK, PD5MD_01), - PINMUX_DATA(D4_MARK, PD4MD_01), - PINMUX_DATA(D3_MARK, PD3MD_01), - PINMUX_DATA(D2_MARK, PD2MD_01), - PINMUX_DATA(D1_MARK, PD1MD_01), - PINMUX_DATA(D0_MARK, PD0MD_01), - - /* Port E */ - PINMUX_DATA(PE7_DATA, PE7MD_00), - PINMUX_DATA(SDA3_MARK, PE7MD_01), - PINMUX_DATA(RXD7_MARK, PE7MD_10), - - PINMUX_DATA(PE6_DATA, PE6MD_00), - PINMUX_DATA(SCL3_MARK, PE6MD_01), - PINMUX_DATA(RXD6_MARK, PE6MD_10), - - PINMUX_DATA(PE5_DATA, PE5MD_00), - PINMUX_DATA(SDA2_MARK, PE5MD_01), - PINMUX_DATA(RXD5_MARK, PE5MD_10), - PINMUX_DATA(DV_HSYNC_MARK, PE5MD_11), - - PINMUX_DATA(PE4_DATA, PE4MD_00), - PINMUX_DATA(SCL2_MARK, PE4MD_01), - PINMUX_DATA(DV_VSYNC_MARK, PE4MD_11), - - PINMUX_DATA(PE3_DATA, PE3MD_000), - PINMUX_DATA(SDA1_MARK, PE3MD_001), - PINMUX_DATA(TCLKD_MARK, PE3MD_010), - PINMUX_DATA(ADTRG_MARK, PE3MD_011), - PINMUX_DATA(DV_HSYNC_MARK, PE3MD_100), - - PINMUX_DATA(PE2_DATA, PE2MD_000), - PINMUX_DATA(SCL1_MARK, PE2MD_001), - PINMUX_DATA(TCLKD_MARK, PE2MD_010), - PINMUX_DATA(IOIS16_MARK, PE2MD_011), - PINMUX_DATA(DV_VSYNC_MARK, PE2MD_100), - - PINMUX_DATA(PE1_DATA, PE1MD_000), - PINMUX_DATA(SDA0_MARK, PE1MD_001), - PINMUX_DATA(TCLKB_MARK, PE1MD_010), - PINMUX_DATA(AUDIO_CLK_MARK, PE1MD_010), - PINMUX_DATA(DV_CLK_MARK, PE1MD_100), - - PINMUX_DATA(PE0_DATA, PE0MD_00), - PINMUX_DATA(SCL0_MARK, PE0MD_01), - PINMUX_DATA(TCLKA_MARK, PE0MD_10), - PINMUX_DATA(LCD_EXTCLK_MARK, PE0MD_11), - - /* Port F */ - PINMUX_DATA(PF23_DATA, PF23MD_000), - PINMUX_DATA(SD_D2_MARK, PF23MD_001), - PINMUX_DATA(TXD3_MARK, PF23MD_100), - PINMUX_DATA(MMC_D2_MARK, PF23MD_101), - - PINMUX_DATA(PF22_DATA, PF22MD_000), - PINMUX_DATA(SD_D3_MARK, PF22MD_001), - PINMUX_DATA(RXD3_MARK, PF22MD_100), - PINMUX_DATA(MMC_D3_MARK, PF22MD_101), - - PINMUX_DATA(PF21_DATA, PF21MD_000), - PINMUX_DATA(SD_CMD_MARK, PF21MD_001), - PINMUX_DATA(SCK3_MARK, PF21MD_100), - PINMUX_DATA(MMC_CMD_MARK, PF21MD_101), - - PINMUX_DATA(PF20_DATA, PF20MD_000), - PINMUX_DATA(SD_CLK_MARK, PF20MD_001), - PINMUX_DATA(SSIDATA3_MARK, PF20MD_010), - PINMUX_DATA(MMC_CLK_MARK, PF20MD_101), - - PINMUX_DATA(PF19_DATA, PF19MD_000), - PINMUX_DATA(SD_D0_MARK, PF19MD_001), - PINMUX_DATA(SSIWS3_MARK, PF19MD_010), - PINMUX_DATA(IRQ7_PF_MARK, PF19MD_100), - PINMUX_DATA(MMC_D0_MARK, PF19MD_101), - - PINMUX_DATA(PF18_DATA, PF18MD_000), - PINMUX_DATA(SD_D1_MARK, PF18MD_001), - PINMUX_DATA(SSISCK3_MARK, PF18MD_010), - PINMUX_DATA(IRQ6_PF_MARK, PF18MD_100), - PINMUX_DATA(MMC_D1_MARK, PF18MD_101), - - PINMUX_DATA(PF17_DATA, PF17MD_000), - PINMUX_DATA(SD_WP_MARK, PF17MD_001), - PINMUX_DATA(FRB_MARK, PF17MD_011), - PINMUX_DATA(IRQ5_PF_MARK, PF17MD_100), - - PINMUX_DATA(PF16_DATA, PF16MD_000), - PINMUX_DATA(SD_CD_MARK, PF16MD_001), - PINMUX_DATA(FCE_MARK, PF16MD_011), - PINMUX_DATA(IRQ4_PF_MARK, PF16MD_100), - PINMUX_DATA(MMC_CD_MARK, PF16MD_101), - - PINMUX_DATA(PF15_DATA, PF15MD_000), - PINMUX_DATA(A0_MARK, PF15MD_001), - PINMUX_DATA(SSIDATA2_MARK, PF15MD_010), - PINMUX_DATA(WDTOVF_MARK, PF15MD_011), - PINMUX_DATA(TXD2_MARK, PF15MD_100), - - PINMUX_DATA(PF14_DATA, PF14MD_000), - PINMUX_DATA(A25_MARK, PF14MD_001), - PINMUX_DATA(SSIWS2_MARK, PF14MD_010), - PINMUX_DATA(RXD2_MARK, PF14MD_100), - - PINMUX_DATA(PF13_DATA, PF13MD_000), - PINMUX_DATA(A24_MARK, PF13MD_001), - PINMUX_DATA(SSISCK2_MARK, PF13MD_010), - PINMUX_DATA(SCK2_MARK, PF13MD_100), - - PINMUX_DATA(PF12_DATA, PF12MD_000), - PINMUX_DATA(SSIDATA1_MARK, PF12MD_010), - PINMUX_DATA(DV_DATA12_MARK, PF12MD_011), - PINMUX_DATA(TXD1_MARK, PF12MD_100), - PINMUX_DATA(MMC_D7_MARK, PF12MD_101), - - PINMUX_DATA(PF11_DATA, PF11MD_000), - PINMUX_DATA(SSIWS1_MARK, PF11MD_010), - PINMUX_DATA(DV_DATA2_MARK, PF11MD_011), - PINMUX_DATA(RXD1_MARK, PF11MD_100), - PINMUX_DATA(MMC_D6_MARK, PF11MD_101), - - PINMUX_DATA(PF10_DATA, PF10MD_000), - PINMUX_DATA(CS1_MARK, PF10MD_001), - PINMUX_DATA(SSISCK1_MARK, PF10MD_010), - PINMUX_DATA(DV_DATA1_MARK, PF10MD_011), - PINMUX_DATA(SCK1_MARK, PF10MD_100), - PINMUX_DATA(MMC_D5_MARK, PF10MD_101), - - PINMUX_DATA(PF9_DATA, PF9MD_000), - PINMUX_DATA(BS_MARK, PF9MD_001), - PINMUX_DATA(DV_DATA0_MARK, PF9MD_011), - PINMUX_DATA(SCK0_MARK, PF9MD_100), - PINMUX_DATA(MMC_D4_MARK, PF9MD_101), - PINMUX_DATA(RTS1_MARK, PF9MD_110), - - PINMUX_DATA(PF8_DATA, PF8MD_000), - PINMUX_DATA(A23_MARK, PF8MD_001), - PINMUX_DATA(TXD0_MARK, PF8MD_100), - - PINMUX_DATA(PF7_DATA, PF7MD_000), - PINMUX_DATA(SSIRXD0_MARK, PF7MD_010), - PINMUX_DATA(RXD0_MARK, PF7MD_100), - PINMUX_DATA(CTS1_MARK, PF7MD_110), - - PINMUX_DATA(PF6_DATA, PF6MD_000), - PINMUX_DATA(CE2A_MARK, PF6MD_001), - PINMUX_DATA(SSITXD0_MARK, PF6MD_010), - - PINMUX_DATA(PF5_DATA, PF5MD_000), - PINMUX_DATA(SSIWS0_MARK, PF5MD_010), - - PINMUX_DATA(PF4_DATA, PF4MD_000), - PINMUX_DATA(CS5CE1A_MARK, PF4MD_001), - PINMUX_DATA(SSISCK0_MARK, PF4MD_010), - - PINMUX_DATA(PF3_DATA, PF3MD_000), - PINMUX_DATA(CS2_MARK, PF3MD_001), - PINMUX_DATA(MISO1_MARK, PF3MD_011), - PINMUX_DATA(TIOC4D_MARK, PF3MD_100), - - PINMUX_DATA(PF2_DATA, PF2MD_000), - PINMUX_DATA(WAIT_MARK, PF2MD_001), - PINMUX_DATA(MOSI1_MARK, PF2MD_011), - PINMUX_DATA(TIOC4C_MARK, PF2MD_100), - PINMUX_DATA(TEND0_MARK, PF2MD_101), - - PINMUX_DATA(PF1_DATA, PF1MD_000), - PINMUX_DATA(BACK_MARK, PF1MD_001), - PINMUX_DATA(TIOC4B_MARK, PF1MD_100), - PINMUX_DATA(DACK0_MARK, PF1MD_101), - - PINMUX_DATA(PF0_DATA, PF0MD_000), - PINMUX_DATA(BREQ_MARK, PF0MD_001), - PINMUX_DATA(RSPCK1_MARK, PF0MD_011), - PINMUX_DATA(TIOC4A_MARK, PF0MD_100), - PINMUX_DATA(DREQ0_MARK, PF0MD_101), - - /* Port G */ - PINMUX_DATA(PG27_DATA, PG27MD_00), - PINMUX_DATA(LCD_TCON2_MARK, PG27MD_10), - PINMUX_DATA(LCD_EXTCLK_MARK, PG27MD_11), - - PINMUX_DATA(PG26_DATA, PG26MD_00), - PINMUX_DATA(LCD_TCON1_MARK, PG26MD_10), - - PINMUX_DATA(PG25_DATA, PG25MD_00), - PINMUX_DATA(LCD_TCON0_MARK, PG25MD_10), - - PINMUX_DATA(PG24_DATA, PG24MD_00), - PINMUX_DATA(LCD_CLK_MARK, PG24MD_10), - - PINMUX_DATA(PG23_DATA, PG23MD_000), - PINMUX_DATA(LCD_DATA23_MARK, PG23MD_010), - PINMUX_DATA(LCD_TCON6_MARK, PG23MD_011), - PINMUX_DATA(TXD5_MARK, PG23MD_100), - - PINMUX_DATA(PG22_DATA, PG22MD_000), - PINMUX_DATA(LCD_DATA22_MARK, PG22MD_010), - PINMUX_DATA(LCD_TCON5_MARK, PG22MD_011), - PINMUX_DATA(RXD5_MARK, PG22MD_100), - - PINMUX_DATA(PG21_DATA, PG21MD_000), - PINMUX_DATA(DV_DATA7_MARK, PG21MD_001), - PINMUX_DATA(LCD_DATA21_MARK, PG21MD_010), - PINMUX_DATA(LCD_TCON4_MARK, PG21MD_011), - PINMUX_DATA(TXD4_MARK, PG21MD_100), - - PINMUX_DATA(PG20_DATA, PG20MD_000), - PINMUX_DATA(DV_DATA6_MARK, PG20MD_001), - PINMUX_DATA(LCD_DATA20_MARK, PG21MD_010), - PINMUX_DATA(LCD_TCON3_MARK, PG20MD_011), - PINMUX_DATA(RXD4_MARK, PG20MD_100), - - PINMUX_DATA(PG19_DATA, PG19MD_000), - PINMUX_DATA(DV_DATA5_MARK, PG19MD_001), - PINMUX_DATA(LCD_DATA19_MARK, PG19MD_010), - PINMUX_DATA(SPDIF_OUT_MARK, PG19MD_011), - PINMUX_DATA(SCK5_MARK, PG19MD_100), - - PINMUX_DATA(PG18_DATA, PG18MD_000), - PINMUX_DATA(DV_DATA4_MARK, PG18MD_001), - PINMUX_DATA(LCD_DATA18_MARK, PG18MD_010), - PINMUX_DATA(SPDIF_IN_MARK, PG18MD_011), - PINMUX_DATA(SCK4_MARK, PG18MD_100), - -// TODO hardware manual has PG17 3 bits wide in reg picture and 2 bits in description -// we're going with 2 bits - PINMUX_DATA(PG17_DATA, PG17MD_00), - PINMUX_DATA(WE3ICIOWRAHDQMUU_MARK, PG17MD_01), - PINMUX_DATA(LCD_DATA17_MARK, PG17MD_10), - -// TODO hardware manual has PG16 3 bits wide in reg picture and 2 bits in description -// we're going with 2 bits - PINMUX_DATA(PG16_DATA, PG16MD_00), - PINMUX_DATA(WE2ICIORDDQMUL_MARK, PG16MD_01), - PINMUX_DATA(LCD_DATA16_MARK, PG16MD_10), - - PINMUX_DATA(PG15_DATA, PG15MD_00), - PINMUX_DATA(D31_MARK, PG15MD_01), - PINMUX_DATA(LCD_DATA15_MARK, PG15MD_10), - PINMUX_DATA(PINT7_PG_MARK, PG15MD_11), - - PINMUX_DATA(PG14_DATA, PG14MD_00), - PINMUX_DATA(D30_MARK, PG14MD_01), - PINMUX_DATA(LCD_DATA14_MARK, PG14MD_10), - PINMUX_DATA(PINT6_PG_MARK, PG14MD_11), - - PINMUX_DATA(PG13_DATA, PG13MD_00), - PINMUX_DATA(D29_MARK, PG13MD_01), - PINMUX_DATA(LCD_DATA13_MARK, PG13MD_10), - PINMUX_DATA(PINT5_PG_MARK, PG13MD_11), - - PINMUX_DATA(PG12_DATA, PG12MD_00), - PINMUX_DATA(D28_MARK, PG12MD_01), - PINMUX_DATA(LCD_DATA12_MARK, PG12MD_10), - PINMUX_DATA(PINT4_PG_MARK, PG12MD_11), - - PINMUX_DATA(PG11_DATA, PG11MD_000), - PINMUX_DATA(D27_MARK, PG11MD_001), - PINMUX_DATA(LCD_DATA11_MARK, PG11MD_010), - PINMUX_DATA(PINT3_PG_MARK, PG11MD_011), - PINMUX_DATA(TIOC3D_MARK, PG11MD_100), - - PINMUX_DATA(PG10_DATA, PG10MD_000), - PINMUX_DATA(D26_MARK, PG10MD_001), - PINMUX_DATA(LCD_DATA10_MARK, PG10MD_010), - PINMUX_DATA(PINT2_PG_MARK, PG10MD_011), - PINMUX_DATA(TIOC3C_MARK, PG10MD_100), - - PINMUX_DATA(PG9_DATA, PG9MD_000), - PINMUX_DATA(D25_MARK, PG9MD_001), - PINMUX_DATA(LCD_DATA9_MARK, PG9MD_010), - PINMUX_DATA(PINT1_PG_MARK, PG9MD_011), - PINMUX_DATA(TIOC3B_MARK, PG9MD_100), - - PINMUX_DATA(PG8_DATA, PG8MD_000), - PINMUX_DATA(D24_MARK, PG8MD_001), - PINMUX_DATA(LCD_DATA8_MARK, PG8MD_010), - PINMUX_DATA(PINT0_PG_MARK, PG8MD_011), - PINMUX_DATA(TIOC3A_MARK, PG8MD_100), - - PINMUX_DATA(PG7_DATA, PG7MD_000), - PINMUX_DATA(D23_MARK, PG7MD_001), - PINMUX_DATA(LCD_DATA7_MARK, PG7MD_010), - PINMUX_DATA(IRQ7_PG_MARK, PG7MD_011), - PINMUX_DATA(TIOC2B_MARK, PG7MD_100), - - PINMUX_DATA(PG6_DATA, PG6MD_000), - PINMUX_DATA(D22_MARK, PG6MD_001), - PINMUX_DATA(LCD_DATA6_MARK, PG6MD_010), - PINMUX_DATA(IRQ6_PG_MARK, PG6MD_011), - PINMUX_DATA(TIOC2A_MARK, PG6MD_100), - - PINMUX_DATA(PG5_DATA, PG5MD_000), - PINMUX_DATA(D21_MARK, PG5MD_001), - PINMUX_DATA(LCD_DATA5_MARK, PG5MD_010), - PINMUX_DATA(IRQ5_PG_MARK, PG5MD_011), - PINMUX_DATA(TIOC1B_MARK, PG5MD_100), - - PINMUX_DATA(PG4_DATA, PG4MD_000), - PINMUX_DATA(D20_MARK, PG4MD_001), - PINMUX_DATA(LCD_DATA4_MARK, PG4MD_010), - PINMUX_DATA(IRQ4_PG_MARK, PG4MD_011), - PINMUX_DATA(TIOC1A_MARK, PG4MD_100), - - PINMUX_DATA(PG3_DATA, PG3MD_000), - PINMUX_DATA(D19_MARK, PG3MD_001), - PINMUX_DATA(LCD_DATA3_MARK, PG3MD_010), - PINMUX_DATA(IRQ3_PG_MARK, PG3MD_011), - PINMUX_DATA(TIOC0D_MARK, PG3MD_100), - - PINMUX_DATA(PG2_DATA, PG2MD_000), - PINMUX_DATA(D18_MARK, PG2MD_001), - PINMUX_DATA(LCD_DATA2_MARK, PG2MD_010), - PINMUX_DATA(IRQ2_PG_MARK, PG2MD_011), - PINMUX_DATA(TIOC0C_MARK, PG2MD_100), - - PINMUX_DATA(PG1_DATA, PG1MD_000), - PINMUX_DATA(D17_MARK, PG1MD_001), - PINMUX_DATA(LCD_DATA1_MARK, PG1MD_010), - PINMUX_DATA(IRQ1_PG_MARK, PG1MD_011), - PINMUX_DATA(TIOC0B_MARK, PG1MD_100), - - PINMUX_DATA(PG0_DATA, PG0MD_000), - PINMUX_DATA(D16_MARK, PG0MD_001), - PINMUX_DATA(LCD_DATA0_MARK, PG0MD_010), - PINMUX_DATA(IRQ0_PG_MARK, PG0MD_011), - PINMUX_DATA(TIOC0A_MARK, PG0MD_100), - - /* Port H */ - PINMUX_DATA(PH7_DATA, PH7MD_00), - PINMUX_DATA(PHAN7_MARK, PH7MD_01), - PINMUX_DATA(PINT7_PH_MARK, PH7MD_10), - - PINMUX_DATA(PH6_DATA, PH6MD_00), - PINMUX_DATA(PHAN6_MARK, PH6MD_01), - PINMUX_DATA(PINT6_PH_MARK, PH6MD_10), - - PINMUX_DATA(PH5_DATA, PH5MD_00), - PINMUX_DATA(PHAN5_MARK, PH5MD_01), - PINMUX_DATA(PINT5_PH_MARK, PH5MD_10), - PINMUX_DATA(LCD_EXTCLK_MARK, PH5MD_11), - - PINMUX_DATA(PH4_DATA, PH4MD_00), - PINMUX_DATA(PHAN4_MARK, PH4MD_01), - PINMUX_DATA(PINT4_PH_MARK, PH4MD_10), - - PINMUX_DATA(PH3_DATA, PH3MD_00), - PINMUX_DATA(PHAN3_MARK, PH3MD_01), - PINMUX_DATA(PINT3_PH_MARK, PH3MD_10), - - PINMUX_DATA(PH2_DATA, PH2MD_00), - PINMUX_DATA(PHAN2_MARK, PH2MD_01), - PINMUX_DATA(PINT2_PH_MARK, PH2MD_10), - - PINMUX_DATA(PH1_DATA, PH1MD_00), - PINMUX_DATA(PHAN1_MARK, PH1MD_01), - PINMUX_DATA(PINT1_PH_MARK, PH1MD_10), - - PINMUX_DATA(PH0_DATA, PH0MD_00), - PINMUX_DATA(PHAN0_MARK, PH0MD_01), - PINMUX_DATA(PINT0_PH_MARK, PH0MD_10), - - /* Port I - not on device */ - - /* Port J */ - PINMUX_DATA(PJ31_DATA, PJ31MD_0), - PINMUX_DATA(DV_CLK_MARK, PJ31MD_1), - - PINMUX_DATA(PJ30_DATA, PJ30MD_000), - PINMUX_DATA(SSIDATA5_MARK, PJ30MD_010), - PINMUX_DATA(TIOC2B_MARK, PJ30MD_100), - PINMUX_DATA(IETXD_MARK, PJ30MD_101), - - PINMUX_DATA(PJ29_DATA, PJ29MD_000), - PINMUX_DATA(SSIWS5_MARK, PJ29MD_010), - PINMUX_DATA(TIOC2A_MARK, PJ29MD_100), - PINMUX_DATA(IERXD_MARK, PJ29MD_101), - - PINMUX_DATA(PJ28_DATA, PJ28MD_000), - PINMUX_DATA(SSISCK5_MARK, PJ28MD_010), - PINMUX_DATA(TIOC1B_MARK, PJ28MD_100), - PINMUX_DATA(RTS7_MARK, PJ28MD_101), - - PINMUX_DATA(PJ27_DATA, PJ27MD_000), - PINMUX_DATA(TIOC1A_MARK, PJ27MD_100), - PINMUX_DATA(CTS7_MARK, PJ27MD_101), - - PINMUX_DATA(PJ26_DATA, PJ26MD_000), - PINMUX_DATA(SSIDATA4_MARK, PJ26MD_010), - PINMUX_DATA(LCD_TCON5_MARK, PJ26MD_011), - PINMUX_DATA(TXD7_MARK, PJ26MD_101), - - PINMUX_DATA(PJ25_DATA, PJ25MD_000), - PINMUX_DATA(SSIWS4_MARK, PJ25MD_010), - PINMUX_DATA(LCD_TCON4_MARK, PJ25MD_011), - PINMUX_DATA(SPDIF_OUT_MARK, PJ25MD_100), - PINMUX_DATA(RXD7_MARK, PJ25MD_101), - - PINMUX_DATA(PJ24_DATA, PJ24MD_000), - PINMUX_DATA(SSISCK4_MARK, PJ24MD_010), - PINMUX_DATA(LCD_TCON3_MARK, PJ24MD_011), - PINMUX_DATA(SPDIF_IN_MARK, PJ24MD_100), - PINMUX_DATA(SCK7_MARK, PJ24MD_101), - - PINMUX_DATA(PJ23_DATA, PJ23MD_000), - PINMUX_DATA(DV_DATA23_MARK, PJ23MD_001), - PINMUX_DATA(LCD_DATA23_MARK, PJ23MD_010), - PINMUX_DATA(LCD_TCON6_MARK, PJ23MD_011), - PINMUX_DATA(IRQ3_PJ_MARK, PJ23MD_100), - PINMUX_DATA(CTX1_MARK, PJ23MD_101), - - PINMUX_DATA(PJ22_DATA, PJ22MD_000), - PINMUX_DATA(DV_DATA22_MARK, PJ22MD_001), - PINMUX_DATA(LCD_DATA22_MARK, PJ22MD_010), - PINMUX_DATA(LCD_TCON5_MARK, PJ22MD_011), - PINMUX_DATA(IRQ2_PJ_MARK, PJ22MD_100), - PINMUX_DATA(CRX1_MARK, PJ22MD_101), - PINMUX_DATA(CRX0CRX1_MARK, PJ22MD_110), - - PINMUX_DATA(PJ21_DATA, PJ21MD_000), - PINMUX_DATA(DV_DATA21_MARK, PJ21MD_001), - PINMUX_DATA(LCD_DATA21_MARK, PJ21MD_010), - PINMUX_DATA(LCD_TCON4_MARK, PJ21MD_011), - PINMUX_DATA(IRQ1_PJ_MARK, PJ21MD_100), - PINMUX_DATA(CTX2_MARK, PJ21MD_101), - - PINMUX_DATA(PJ20_DATA, PJ20MD_000), - PINMUX_DATA(DV_DATA20_MARK, PJ20MD_001), - PINMUX_DATA(LCD_DATA20_MARK, PJ20MD_010), - PINMUX_DATA(LCD_TCON3_MARK, PJ20MD_011), - PINMUX_DATA(IRQ0_PJ_MARK, PJ20MD_100), - PINMUX_DATA(CRX2_MARK, PJ20MD_101), - PINMUX_DATA(CRX0CRX1CRX2_PJ20_MARK, PJ20MD_110), - - PINMUX_DATA(PJ19_DATA, PJ19MD_000), - PINMUX_DATA(DV_DATA19_MARK, PJ19MD_001), - PINMUX_DATA(LCD_DATA19_MARK, PJ19MD_010), - PINMUX_DATA(MISO0_PJ19_MARK, PJ19MD_011), - PINMUX_DATA(TIOC0D_MARK, PJ19MD_100), - PINMUX_DATA(SIOFRXD_MARK, PJ19MD_101), - PINMUX_DATA(AUDIO_XOUT_MARK, PJ19MD_110), - - PINMUX_DATA(PJ18_DATA, PJ18MD_000), - PINMUX_DATA(DV_DATA18_MARK, PJ18MD_001), - PINMUX_DATA(LCD_DATA18_MARK, PJ18MD_010), - PINMUX_DATA(MOSI0_PJ18_MARK, PJ18MD_011), - PINMUX_DATA(TIOC0C_MARK, PJ18MD_100), - PINMUX_DATA(SIOFTXD_MARK, PJ18MD_101), - - PINMUX_DATA(PJ17_DATA, PJ17MD_000), - PINMUX_DATA(DV_DATA17_MARK, PJ17MD_001), - PINMUX_DATA(LCD_DATA17_MARK, PJ17MD_010), - PINMUX_DATA(SSL00_PJ17_MARK, PJ17MD_011), - PINMUX_DATA(TIOC0B_MARK, PJ17MD_100), - PINMUX_DATA(SIOFSYNC_MARK, PJ17MD_101), - - PINMUX_DATA(PJ16_DATA, PJ16MD_000), - PINMUX_DATA(DV_DATA16_MARK, PJ16MD_001), - PINMUX_DATA(LCD_DATA16_MARK, PJ16MD_010), - PINMUX_DATA(RSPCK0_PJ16_MARK, PJ16MD_011), - PINMUX_DATA(TIOC0A_MARK, PJ16MD_100), - PINMUX_DATA(SIOFSCK_MARK, PJ16MD_101), - - PINMUX_DATA(PJ15_DATA, PJ15MD_000), - PINMUX_DATA(DV_DATA15_MARK, PJ15MD_001), - PINMUX_DATA(LCD_DATA15_MARK, PJ15MD_010), - PINMUX_DATA(PINT7_PJ_MARK, PJ15MD_011), - PINMUX_DATA(PWM2H_MARK, PJ15MD_100), - PINMUX_DATA(TXD7_MARK, PJ15MD_101), - - PINMUX_DATA(PJ14_DATA, PJ14MD_000), - PINMUX_DATA(DV_DATA14_MARK, PJ14MD_001), - PINMUX_DATA(LCD_DATA14_MARK, PJ14MD_010), - PINMUX_DATA(PINT6_PJ_MARK, PJ14MD_011), - PINMUX_DATA(PWM2G_MARK, PJ14MD_100), - PINMUX_DATA(TXD6_MARK, PJ14MD_101), - - PINMUX_DATA(PJ13_DATA, PJ13MD_000), - PINMUX_DATA(DV_DATA13_MARK, PJ13MD_001), - PINMUX_DATA(LCD_DATA13_MARK, PJ13MD_010), - PINMUX_DATA(PINT5_PJ_MARK, PJ13MD_011), - PINMUX_DATA(PWM2F_MARK, PJ13MD_100), - PINMUX_DATA(TXD5_MARK, PJ13MD_101), - - PINMUX_DATA(PJ12_DATA, PJ12MD_000), - PINMUX_DATA(DV_DATA12_MARK, PJ12MD_001), - PINMUX_DATA(LCD_DATA12_MARK, PJ12MD_010), - PINMUX_DATA(PINT4_PJ_MARK, PJ12MD_011), - PINMUX_DATA(PWM2E_MARK, PJ12MD_100), - PINMUX_DATA(SCK7_MARK, PJ12MD_101), - - PINMUX_DATA(PJ11_DATA, PJ11MD_000), - PINMUX_DATA(DV_DATA11_MARK, PJ11MD_001), - PINMUX_DATA(LCD_DATA11_MARK, PJ11MD_010), - PINMUX_DATA(PINT3_PJ_MARK, PJ11MD_011), - PINMUX_DATA(PWM2D_MARK, PJ11MD_100), - PINMUX_DATA(SCK6_MARK, PJ11MD_101), - - PINMUX_DATA(PJ10_DATA, PJ10MD_000), - PINMUX_DATA(DV_DATA10_MARK, PJ10MD_001), - PINMUX_DATA(LCD_DATA10_MARK, PJ10MD_010), - PINMUX_DATA(PINT2_PJ_MARK, PJ10MD_011), - PINMUX_DATA(PWM2C_MARK, PJ10MD_100), - PINMUX_DATA(SCK5_MARK, PJ10MD_101), - - PINMUX_DATA(PJ9_DATA, PJ9MD_000), - PINMUX_DATA(DV_DATA9_MARK, PJ9MD_001), - PINMUX_DATA(LCD_DATA9_MARK, PJ9MD_010), - PINMUX_DATA(PINT1_PJ_MARK, PJ9MD_011), - PINMUX_DATA(PWM2B_MARK, PJ9MD_100), - PINMUX_DATA(RTS5_MARK, PJ9MD_101), - - PINMUX_DATA(PJ8_DATA, PJ8MD_000), - PINMUX_DATA(DV_DATA8_MARK, PJ8MD_001), - PINMUX_DATA(LCD_DATA8_MARK, PJ8MD_010), - PINMUX_DATA(PINT0_PJ_MARK, PJ8MD_011), - PINMUX_DATA(PWM2A_MARK, PJ8MD_100), - PINMUX_DATA(CTS5_MARK, PJ8MD_101), - - PINMUX_DATA(PJ7_DATA, PJ7MD_000), - PINMUX_DATA(DV_DATA7_MARK, PJ7MD_001), - PINMUX_DATA(LCD_DATA7_MARK, PJ7MD_010), - PINMUX_DATA(SD_D2_MARK, PJ7MD_011), - PINMUX_DATA(PWM1H_MARK, PJ7MD_100), - - PINMUX_DATA(PJ6_DATA, PJ6MD_000), - PINMUX_DATA(DV_DATA6_MARK, PJ6MD_001), - PINMUX_DATA(LCD_DATA6_MARK, PJ6MD_010), - PINMUX_DATA(SD_D3_MARK, PJ6MD_011), - PINMUX_DATA(PWM1G_MARK, PJ6MD_100), - - PINMUX_DATA(PJ5_DATA, PJ5MD_000), - PINMUX_DATA(DV_DATA5_MARK, PJ5MD_001), - PINMUX_DATA(LCD_DATA5_MARK, PJ5MD_010), - PINMUX_DATA(SD_CMD_MARK, PJ5MD_011), - PINMUX_DATA(PWM1F_MARK, PJ5MD_100), - - PINMUX_DATA(PJ4_DATA, PJ4MD_000), - PINMUX_DATA(DV_DATA4_MARK, PJ4MD_001), - PINMUX_DATA(LCD_DATA4_MARK, PJ4MD_010), - PINMUX_DATA(SD_CLK_MARK, PJ4MD_011), - PINMUX_DATA(PWM1E_MARK, PJ4MD_100), - - PINMUX_DATA(PJ3_DATA, PJ3MD_000), - PINMUX_DATA(DV_DATA3_MARK, PJ3MD_001), - PINMUX_DATA(LCD_DATA3_MARK, PJ3MD_010), - PINMUX_DATA(SD_D0_MARK, PJ3MD_011), - PINMUX_DATA(PWM1D_MARK, PJ3MD_100), - - PINMUX_DATA(PJ2_DATA, PJ2MD_000), - PINMUX_DATA(DV_DATA2_MARK, PJ2MD_001), - PINMUX_DATA(LCD_DATA2_MARK, PJ2MD_010), - PINMUX_DATA(SD_D1_MARK, PJ2MD_011), - PINMUX_DATA(PWM1C_MARK, PJ2MD_100), - - PINMUX_DATA(PJ1_DATA, PJ1MD_000), - PINMUX_DATA(DV_DATA1_MARK, PJ1MD_001), - PINMUX_DATA(LCD_DATA1_MARK, PJ1MD_010), - PINMUX_DATA(SD_WP_MARK, PJ1MD_011), - PINMUX_DATA(PWM1B_MARK, PJ1MD_100), - - PINMUX_DATA(PJ0_DATA, PJ0MD_000), - PINMUX_DATA(DV_DATA0_MARK, PJ0MD_001), - PINMUX_DATA(LCD_DATA0_MARK, PJ0MD_010), - PINMUX_DATA(SD_CD_MARK, PJ0MD_011), - PINMUX_DATA(PWM1A_MARK, PJ0MD_100), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - /* Port A */ - PINMUX_GPIO(GPIO_PA1, PA1_DATA), - PINMUX_GPIO(GPIO_PA0, PA0_DATA), - - /* Port B */ - PINMUX_GPIO(GPIO_PB22, PB22_DATA), - PINMUX_GPIO(GPIO_PB21, PB21_DATA), - PINMUX_GPIO(GPIO_PB20, PB20_DATA), - PINMUX_GPIO(GPIO_PB19, PB19_DATA), - PINMUX_GPIO(GPIO_PB18, PB18_DATA), - PINMUX_GPIO(GPIO_PB17, PB17_DATA), - PINMUX_GPIO(GPIO_PB16, PB16_DATA), - PINMUX_GPIO(GPIO_PB15, PB15_DATA), - PINMUX_GPIO(GPIO_PB14, PB14_DATA), - PINMUX_GPIO(GPIO_PB13, PB13_DATA), - PINMUX_GPIO(GPIO_PB12, PB12_DATA), - PINMUX_GPIO(GPIO_PB11, PB11_DATA), - PINMUX_GPIO(GPIO_PB10, PB10_DATA), - PINMUX_GPIO(GPIO_PB9, PB9_DATA), - PINMUX_GPIO(GPIO_PB8, PB8_DATA), - PINMUX_GPIO(GPIO_PB7, PB7_DATA), - PINMUX_GPIO(GPIO_PB6, PB6_DATA), - PINMUX_GPIO(GPIO_PB5, PB5_DATA), - PINMUX_GPIO(GPIO_PB4, PB4_DATA), - PINMUX_GPIO(GPIO_PB3, PB3_DATA), - PINMUX_GPIO(GPIO_PB2, PB2_DATA), - PINMUX_GPIO(GPIO_PB1, PB1_DATA), - - /* Port C */ - PINMUX_GPIO(GPIO_PC8, PC8_DATA), - PINMUX_GPIO(GPIO_PC7, PC7_DATA), - PINMUX_GPIO(GPIO_PC6, PC6_DATA), - PINMUX_GPIO(GPIO_PC5, PC5_DATA), - PINMUX_GPIO(GPIO_PC4, PC4_DATA), - PINMUX_GPIO(GPIO_PC3, PC3_DATA), - PINMUX_GPIO(GPIO_PC2, PC2_DATA), - PINMUX_GPIO(GPIO_PC1, PC1_DATA), - PINMUX_GPIO(GPIO_PC0, PC0_DATA), - - /* Port D */ - PINMUX_GPIO(GPIO_PD15, PD15_DATA), - PINMUX_GPIO(GPIO_PD14, PD14_DATA), - PINMUX_GPIO(GPIO_PD13, PD13_DATA), - PINMUX_GPIO(GPIO_PD12, PD12_DATA), - PINMUX_GPIO(GPIO_PD11, PD11_DATA), - PINMUX_GPIO(GPIO_PD10, PD10_DATA), - PINMUX_GPIO(GPIO_PD9, PD9_DATA), - PINMUX_GPIO(GPIO_PD8, PD8_DATA), - PINMUX_GPIO(GPIO_PD7, PD7_DATA), - PINMUX_GPIO(GPIO_PD6, PD6_DATA), - PINMUX_GPIO(GPIO_PD5, PD5_DATA), - PINMUX_GPIO(GPIO_PD4, PD4_DATA), - PINMUX_GPIO(GPIO_PD3, PD3_DATA), - PINMUX_GPIO(GPIO_PD2, PD2_DATA), - PINMUX_GPIO(GPIO_PD1, PD1_DATA), - PINMUX_GPIO(GPIO_PD0, PD0_DATA), - - /* Port E */ - PINMUX_GPIO(GPIO_PE7, PE7_DATA), - PINMUX_GPIO(GPIO_PE6, PE6_DATA), - PINMUX_GPIO(GPIO_PE5, PE5_DATA), - PINMUX_GPIO(GPIO_PE4, PE4_DATA), - PINMUX_GPIO(GPIO_PE3, PE3_DATA), - PINMUX_GPIO(GPIO_PE2, PE2_DATA), - PINMUX_GPIO(GPIO_PE1, PE1_DATA), - PINMUX_GPIO(GPIO_PE0, PE0_DATA), - - /* Port F */ - PINMUX_GPIO(GPIO_PF23, PF23_DATA), - PINMUX_GPIO(GPIO_PF22, PF22_DATA), - PINMUX_GPIO(GPIO_PF21, PF21_DATA), - PINMUX_GPIO(GPIO_PF20, PF20_DATA), - PINMUX_GPIO(GPIO_PF19, PF19_DATA), - PINMUX_GPIO(GPIO_PF18, PF18_DATA), - PINMUX_GPIO(GPIO_PF17, PF17_DATA), - PINMUX_GPIO(GPIO_PF16, PF16_DATA), - PINMUX_GPIO(GPIO_PF15, PF15_DATA), - PINMUX_GPIO(GPIO_PF14, PF14_DATA), - PINMUX_GPIO(GPIO_PF13, PF13_DATA), - PINMUX_GPIO(GPIO_PF12, PF12_DATA), - PINMUX_GPIO(GPIO_PF11, PF11_DATA), - PINMUX_GPIO(GPIO_PF10, PF10_DATA), - PINMUX_GPIO(GPIO_PF9, PF9_DATA), - PINMUX_GPIO(GPIO_PF8, PF8_DATA), - PINMUX_GPIO(GPIO_PF7, PF7_DATA), - PINMUX_GPIO(GPIO_PF6, PF6_DATA), - PINMUX_GPIO(GPIO_PF5, PF5_DATA), - PINMUX_GPIO(GPIO_PF4, PF4_DATA), - PINMUX_GPIO(GPIO_PF3, PF3_DATA), - PINMUX_GPIO(GPIO_PF2, PF2_DATA), - PINMUX_GPIO(GPIO_PF1, PF1_DATA), - PINMUX_GPIO(GPIO_PF0, PF0_DATA), - - /* Port G */ - PINMUX_GPIO(GPIO_PG27, PG27_DATA), - PINMUX_GPIO(GPIO_PG26, PG26_DATA), - PINMUX_GPIO(GPIO_PG25, PG25_DATA), - PINMUX_GPIO(GPIO_PG24, PG24_DATA), - PINMUX_GPIO(GPIO_PG23, PG23_DATA), - PINMUX_GPIO(GPIO_PG22, PG22_DATA), - PINMUX_GPIO(GPIO_PG21, PG21_DATA), - PINMUX_GPIO(GPIO_PG20, PG20_DATA), - PINMUX_GPIO(GPIO_PG19, PG19_DATA), - PINMUX_GPIO(GPIO_PG18, PG18_DATA), - PINMUX_GPIO(GPIO_PG17, PG17_DATA), - PINMUX_GPIO(GPIO_PG16, PG16_DATA), - PINMUX_GPIO(GPIO_PG15, PG15_DATA), - PINMUX_GPIO(GPIO_PG14, PG14_DATA), - PINMUX_GPIO(GPIO_PG13, PG13_DATA), - PINMUX_GPIO(GPIO_PG12, PG12_DATA), - PINMUX_GPIO(GPIO_PG11, PG11_DATA), - PINMUX_GPIO(GPIO_PG10, PG10_DATA), - PINMUX_GPIO(GPIO_PG9, PG9_DATA), - PINMUX_GPIO(GPIO_PG8, PG8_DATA), - PINMUX_GPIO(GPIO_PG7, PG7_DATA), - PINMUX_GPIO(GPIO_PG6, PG6_DATA), - PINMUX_GPIO(GPIO_PG5, PG5_DATA), - PINMUX_GPIO(GPIO_PG4, PG4_DATA), - PINMUX_GPIO(GPIO_PG3, PG3_DATA), - PINMUX_GPIO(GPIO_PG2, PG2_DATA), - PINMUX_GPIO(GPIO_PG1, PG1_DATA), - PINMUX_GPIO(GPIO_PG0, PG0_DATA), - - /* Port H - Port H does not have a Data Register */ - - /* Port I - not on device */ - - /* Port J */ - PINMUX_GPIO(GPIO_PJ31, PJ31_DATA), - PINMUX_GPIO(GPIO_PJ30, PJ30_DATA), - PINMUX_GPIO(GPIO_PJ29, PJ29_DATA), - PINMUX_GPIO(GPIO_PJ28, PJ28_DATA), - PINMUX_GPIO(GPIO_PJ27, PJ27_DATA), - PINMUX_GPIO(GPIO_PJ26, PJ26_DATA), - PINMUX_GPIO(GPIO_PJ25, PJ25_DATA), - PINMUX_GPIO(GPIO_PJ24, PJ24_DATA), - PINMUX_GPIO(GPIO_PJ23, PJ23_DATA), - PINMUX_GPIO(GPIO_PJ22, PJ22_DATA), - PINMUX_GPIO(GPIO_PJ21, PJ21_DATA), - PINMUX_GPIO(GPIO_PJ20, PJ20_DATA), - PINMUX_GPIO(GPIO_PJ19, PJ19_DATA), - PINMUX_GPIO(GPIO_PJ18, PJ18_DATA), - PINMUX_GPIO(GPIO_PJ17, PJ17_DATA), - PINMUX_GPIO(GPIO_PJ16, PJ16_DATA), - PINMUX_GPIO(GPIO_PJ15, PJ15_DATA), - PINMUX_GPIO(GPIO_PJ14, PJ14_DATA), - PINMUX_GPIO(GPIO_PJ13, PJ13_DATA), - PINMUX_GPIO(GPIO_PJ12, PJ12_DATA), - PINMUX_GPIO(GPIO_PJ11, PJ11_DATA), - PINMUX_GPIO(GPIO_PJ10, PJ10_DATA), - PINMUX_GPIO(GPIO_PJ9, PJ9_DATA), - PINMUX_GPIO(GPIO_PJ8, PJ8_DATA), - PINMUX_GPIO(GPIO_PJ7, PJ7_DATA), - PINMUX_GPIO(GPIO_PJ6, PJ6_DATA), - PINMUX_GPIO(GPIO_PJ5, PJ5_DATA), - PINMUX_GPIO(GPIO_PJ4, PJ4_DATA), - PINMUX_GPIO(GPIO_PJ3, PJ3_DATA), - PINMUX_GPIO(GPIO_PJ2, PJ2_DATA), - PINMUX_GPIO(GPIO_PJ1, PJ1_DATA), - PINMUX_GPIO(GPIO_PJ0, PJ0_DATA), - - /* INTC */ - PINMUX_GPIO(GPIO_FN_IRQ7_PG, IRQ7_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PG, IRQ6_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PG, IRQ5_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PG, IRQ4_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PG, IRQ1_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PG, IRQ0_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ7_PF, IRQ7_PF_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PF, IRQ6_PF_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PF, IRQ5_PF_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PF, IRQ4_PF_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PJ, IRQ3_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PJ, IRQ2_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PC, IRQ1_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PC, IRQ0_PC_MARK), - - PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT0_PG, PINT0_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT7_PH, PINT7_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PH, PINT6_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PH, PINT5_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PH, PINT4_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PH, PINT3_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PH, PINT2_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PH, PINT1_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT0_PH, PINT0_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT7_PJ, PINT7_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PJ, PINT6_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PJ, PINT5_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PJ, PINT4_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PJ, PINT3_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PJ, PINT2_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PJ, PINT1_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT0_PJ, PINT0_PJ_MARK), - - /* WDT */ - PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK), - - /* CAN */ - PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK), - PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0CRX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1_CRX2, CRX0CRX1CRX2_MARK), - - /* DMAC */ - PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - - /* ADC */ - PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK), - - /* BSCh */ - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_A21, A21_MARK), - PINMUX_GPIO(GPIO_FN_A20, A20_MARK), - PINMUX_GPIO(GPIO_FN_A19, A19_MARK), - PINMUX_GPIO(GPIO_FN_A18, A18_MARK), - PINMUX_GPIO(GPIO_FN_A17, A17_MARK), - PINMUX_GPIO(GPIO_FN_A16, A16_MARK), - PINMUX_GPIO(GPIO_FN_A15, A15_MARK), - PINMUX_GPIO(GPIO_FN_A14, A14_MARK), - PINMUX_GPIO(GPIO_FN_A13, A13_MARK), - PINMUX_GPIO(GPIO_FN_A12, A12_MARK), - PINMUX_GPIO(GPIO_FN_A11, A11_MARK), - PINMUX_GPIO(GPIO_FN_A10, A10_MARK), - PINMUX_GPIO(GPIO_FN_A9, A9_MARK), - PINMUX_GPIO(GPIO_FN_A8, A8_MARK), - PINMUX_GPIO(GPIO_FN_A7, A7_MARK), - PINMUX_GPIO(GPIO_FN_A6, A6_MARK), - PINMUX_GPIO(GPIO_FN_A5, A5_MARK), - PINMUX_GPIO(GPIO_FN_A4, A4_MARK), - PINMUX_GPIO(GPIO_FN_A3, A3_MARK), - PINMUX_GPIO(GPIO_FN_A2, A2_MARK), - PINMUX_GPIO(GPIO_FN_A1, A1_MARK), - PINMUX_GPIO(GPIO_FN_A0, A0_MARK), - - PINMUX_GPIO(GPIO_FN_D15, D15_MARK), - PINMUX_GPIO(GPIO_FN_D14, D14_MARK), - PINMUX_GPIO(GPIO_FN_D13, D13_MARK), - PINMUX_GPIO(GPIO_FN_D12, D12_MARK), - PINMUX_GPIO(GPIO_FN_D11, D11_MARK), - PINMUX_GPIO(GPIO_FN_D10, D10_MARK), - PINMUX_GPIO(GPIO_FN_D9, D9_MARK), - PINMUX_GPIO(GPIO_FN_D8, D8_MARK), - PINMUX_GPIO(GPIO_FN_D7, D7_MARK), - PINMUX_GPIO(GPIO_FN_D6, D6_MARK), - PINMUX_GPIO(GPIO_FN_D5, D5_MARK), - PINMUX_GPIO(GPIO_FN_D4, D4_MARK), - PINMUX_GPIO(GPIO_FN_D3, D3_MARK), - PINMUX_GPIO(GPIO_FN_D2, D2_MARK), - PINMUX_GPIO(GPIO_FN_D1, D1_MARK), - PINMUX_GPIO(GPIO_FN_D0, D0_MARK), - - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), - PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK), - PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK), - PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK), - PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK), - PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK), - PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK), - PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK), - PINMUX_GPIO(GPIO_FN_RD, RD_MARK), - PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), - PINMUX_GPIO(GPIO_FN_WE3ICIOWRAHDQMUU, WE3ICIOWRAHDQMUU_MARK), - PINMUX_GPIO(GPIO_FN_WE2ICIORDDQMUL, WE2ICIORDDQMUL_MARK), - PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK), - PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK), - PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK), - PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK), - PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK), - PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK), - PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK), - PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - - /* TMU */ - PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK), - PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK), - PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK), - PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK), - PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK), - - /* SCIF */ - PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK), - PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK), - PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK), - PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK), - PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK), - PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK), - PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK), - PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), - PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), - PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), - PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK), - PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), - PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), - PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK), - PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK), - PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK), - PINMUX_GPIO(GPIO_FN_SCK5, SCK5_MARK), - PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK), - PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK), - PINMUX_GPIO(GPIO_FN_RTS5, RTS5_MARK), - PINMUX_GPIO(GPIO_FN_CTS5, CTS5_MARK), - PINMUX_GPIO(GPIO_FN_SCK6, SCK6_MARK), - PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK), - PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK), - PINMUX_GPIO(GPIO_FN_SCK7, SCK7_MARK), - PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK), - PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK), - PINMUX_GPIO(GPIO_FN_RTS7, RTS7_MARK), - PINMUX_GPIO(GPIO_FN_CTS7, CTS7_MARK), - - /* RSPI */ - PINMUX_GPIO(GPIO_FN_RSPCK0_PJ16, RSPCK0_PJ16_MARK), - PINMUX_GPIO(GPIO_FN_SSL00_PJ17, SSL00_PJ17_MARK), - PINMUX_GPIO(GPIO_FN_MOSI0_PJ18, MOSI0_PJ18_MARK), - PINMUX_GPIO(GPIO_FN_MISO0_PJ19, MISO0_PJ19_MARK), - PINMUX_GPIO(GPIO_FN_RSPCK0_PB17, RSPCK0_PB17_MARK), - PINMUX_GPIO(GPIO_FN_SSL00_PB18, SSL00_PB18_MARK), - PINMUX_GPIO(GPIO_FN_MOSI0_PB19, MOSI0_PB19_MARK), - PINMUX_GPIO(GPIO_FN_MISO0_PB20, MISO0_PB20_MARK), - PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK), - PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK), - PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK), - PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK), - - /* IIC3 */ - PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK), - PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK), - PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK), - PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK), - PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK), - PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK), - - /* SSI */ - PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK), - PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK), - PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK), - PINMUX_GPIO(GPIO_FN_AUDIO_XOUT, AUDIO_XOUT_MARK), - - /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */ - PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK), - - /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */ - PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK), - PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK), - - /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ - PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), - - /* VDC3 */ - PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK), - - PINMUX_GPIO(GPIO_FN_DV_DATA23, DV_DATA23_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA22, DV_DATA22_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA21, DV_DATA21_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA20, DV_DATA20_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA19, DV_DATA19_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA18, DV_DATA18_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA17, DV_DATA17_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA16, DV_DATA16_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA15, DV_DATA15_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA14, DV_DATA14_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA13, DV_DATA13_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA12, DV_DATA12_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA11, DV_DATA11_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA10, DV_DATA10_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA9, DV_DATA9_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA8, DV_DATA8_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_DATA23, LCD_DATA23_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA22, LCD_DATA22_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA21, LCD_DATA21_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA20, LCD_DATA20_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA19, LCD_DATA19_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA18, LCD_DATA18_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA17, LCD_DATA17_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA16, LCD_DATA16_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - /* "name" addr register_size Field_Width */ - - /* where Field_Width is 1 for single mode registers or 4 for upto 16 - mode registers and modes are described in assending order [0..16] */ - - { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, PA1_IN, PA1_OUT, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, PA0_IN, PA0_OUT } - }, - { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - PB22MD_000, PB22MD_001, PB22MD_010, PB22MD_011, - PB22MD_100, PB22MD_101, PB22MD_110, PB22MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB20MD_000, PB20MD_001, PB20MD_010, PB20MD_011, - PB20MD_100, PB20MD_101, PB20MD_110, PB20MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) { - PB19MD_000, PB19MD_001, PB19MD_010, PB19MD_011, - PB19MD_100, PB19MD_101, PB19MD_110, PB19MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB18MD_000, PB18MD_001, PB18MD_010, PB18MD_011, - PB18MD_100, PB18MD_101, PB18MD_110, PB18MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB17MD_000, PB17MD_001, PB17MD_010, PB17MD_011, - PB17MD_100, PB17MD_101, PB17MD_110, PB17MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB16MD_000, PB16MD_001, PB16MD_010, PB16MD_011, - PB16MD_100, PB16MD_101, PB16MD_110, PB16MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) { - PB15MD_000, PB15MD_001, PB15MD_010, PB15MD_011, - PB15MD_100, PB15MD_101, PB15MD_110, PB15MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB14MD_000, PB14MD_001, PB14MD_010, PB14MD_011, - PB14MD_100, PB14MD_101, PB14MD_110, PB14MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB13MD_000, PB13MD_001, PB13MD_010, PB13MD_011, - PB13MD_100, PB13MD_101, PB13MD_110, PB13MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) { - PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) { - PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) { - PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, - PB22_IN, PB22_OUT, - PB21_IN, PB21_OUT, - PB20_IN, PB20_OUT, - PB19_IN, PB19_OUT, - PB18_IN, PB18_OUT, - PB17_IN, PB17_OUT, - PB16_IN, PB16_OUT } - }, - { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) { - PB15_IN, PB15_OUT, - PB14_IN, PB14_OUT, - PB13_IN, PB13_OUT, - PB12_IN, PB12_OUT, - PB11_IN, PB11_OUT, - PB10_IN, PB10_OUT, - PB9_IN, PB9_OUT, - PB8_IN, PB8_OUT, - PB7_IN, PB7_OUT, - PB6_IN, PB6_OUT, - PB5_IN, PB5_OUT, - PB4_IN, PB4_OUT, - PB3_IN, PB3_OUT, - PB2_IN, PB2_OUT, - PB1_IN, PB1_OUT, - 0, 0 } - }, - - { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - PC8MD_000, PC8MD_001, PC8MD_010, PC8MD_011, - PC8MD_100, PC8MD_101, PC8MD_110, PC8MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) { - PC7MD_000, PC7MD_001, PC7MD_010, PC7MD_011, - PC7MD_100, PC7MD_101, PC7MD_110, PC7MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PC6MD_000, PC6MD_001, PC6MD_010, PC6MD_011, - PC6MD_100, PC6MD_101, PC6MD_110, PC6MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PC5MD_000, PC5MD_001, PC5MD_010, PC5MD_011, - PC5MD_100, PC5MD_101, PC5MD_110, PC5MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) { - PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - PC8_IN, PC8_OUT, - PC7_IN, PC7_OUT, - PC6_IN, PC6_OUT, - PC5_IN, PC5_OUT, - PC4_IN, PC4_OUT, - PC3_IN, PC3_OUT, - PC2_IN, PC2_OUT, - PC1_IN, PC1_OUT, - PC0_IN, PC0_OUT } - }, - - { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) { - PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) { - PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) { - PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) { - PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) { - PD15_IN, PD15_OUT, - PD14_IN, PD14_OUT, - PD13_IN, PD13_OUT, - PD12_IN, PD12_OUT, - PD11_IN, PD11_OUT, - PD10_IN, PD10_OUT, - PD9_IN, PD9_OUT, - PD8_IN, PD8_OUT, - PD7_IN, PD7_OUT, - PD6_IN, PD6_OUT, - PD5_IN, PD5_OUT, - PD4_IN, PD4_OUT, - PD3_IN, PD3_OUT, - PD2_IN, PD2_OUT, - PD1_IN, PD1_OUT, - PD0_IN, PD0_OUT } - }, - - { PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) { - PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) { - PE3MD_000, PE3MD_001, PE3MD_010, PE3MD_011, - PE3MD_100, PE3MD_101, PE3MD_110, PE3MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PE2MD_000, PE2MD_001, PE2MD_010, PE2MD_011, - PE2MD_100, PE2MD_101, PE2MD_110, PE2MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011, - PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PE7_IN, PE7_OUT, - PE6_IN, PE6_OUT, - PE5_IN, PE5_OUT, - PE4_IN, PE4_OUT, - PE3_IN, PE3_OUT, - PE2_IN, PE2_OUT, - PE1_IN, PE1_OUT, - PE0_IN, PE0_OUT } - }, - - { PINMUX_CFG_REG("PFCR6", 0xfffe38a2, 16, 4) { - PF23MD_000, PF23MD_001, PF23MD_010, PF23MD_011, - PF23MD_100, PF23MD_101, PF23MD_110, PF23MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF22MD_000, PF22MD_001, PF22MD_010, PF22MD_011, - PF22MD_100, PF22MD_101, PF22MD_110, PF22MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF21MD_000, PF21MD_001, PF21MD_010, PF21MD_011, - PF21MD_100, PF21MD_101, PF21MD_110, PF21MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF20MD_000, PF20MD_001, PF20MD_010, PF20MD_011, - PF20MD_100, PF20MD_101, PF20MD_110, PF20MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PFCR5", 0xfffe38a4, 16, 4) { - PF19MD_000, PF19MD_001, PF19MD_010, PF19MD_011, - PF19MD_100, PF19MD_101, PF19MD_110, PF19MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF18MD_000, PF18MD_001, PF18MD_010, PF18MD_011, - PF18MD_100, PF18MD_101, PF18MD_110, PF18MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF17MD_000, PF17MD_001, PF17MD_010, PF17MD_011, - PF17MD_100, PF17MD_101, PF17MD_110, PF17MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF16MD_000, PF16MD_001, PF16MD_010, PF16MD_011, - PF16MD_100, PF16MD_101, PF16MD_110, PF16MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PFCR4", 0xfffe38a6, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - PF15MD_000, PF15MD_001, PF15MD_010, PF15MD_011, - PF15MD_100, PF15MD_101, PF15MD_110, PF15MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - - PF14MD_000, PF14MD_001, PF14MD_010, PF14MD_011, - PF14MD_100, PF14MD_101, PF14MD_110, PF14MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF13MD_000, PF13MD_001, PF13MD_010, PF13MD_011, - PF13MD_100, PF13MD_101, PF13MD_110, PF13MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011, - PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) { - PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011, - PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011, - PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011, - PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF8MD_000, PF8MD_001, PF8MD_010, PF8MD_011, - PF8MD_100, PF8MD_101, PF8MD_110, PF8MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) { - PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011, - PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011, - PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011, - PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011, - PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) { - PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011, - PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011, - PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011, - PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011, - PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PFIOR1", 0xfffe38b0, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - PF23_IN, PF23_OUT, - PF22_IN, PF22_OUT, - PF21_IN, PF21_OUT, - PF20_IN, PF20_OUT, - PF19_IN, PF19_OUT, - PF18_IN, PF18_OUT, - PF17_IN, PF17_OUT, - PF16_IN, PF16_OUT } - }, - { PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) { - PF15_IN, PF15_OUT, - PF14_IN, PF14_OUT, - PF13_IN, PF13_OUT, - PF12_IN, PF12_OUT, - PF11_IN, PF11_OUT, - PF10_IN, PF10_OUT, - PF9_IN, PF9_OUT, - PF8_IN, PF8_OUT, - PF7_IN, PF7_OUT, - PF6_IN, PF6_OUT, - PF5_IN, PF5_OUT, - PF4_IN, PF4_OUT, - PF3_IN, PF3_OUT, - PF2_IN, PF2_OUT, - PF1_IN, PF1_OUT, - PF0_IN, PF0_OUT } - }, - - { PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) { - PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) { - PG23MD_000, PG23MD_001, PG23MD_010, PG23MD_011, - PG23MD_100, PG23MD_101, PG23MD_110, PG23MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG22MD_000, PG22MD_001, PG22MD_010, PG22MD_011, - PG22MD_100, PG22MD_101, PG22MD_110, PG22MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG21MD_000, PG21MD_001, PG21MD_010, PG21MD_011, - PG21MD_100, PG21MD_101, PG21MD_110, PG21MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011, - PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) { - PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011, - PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011, - PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) { - PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) { - PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011, - PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011, - PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011, - PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011, - PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) { - PG7MD_000, PG7MD_001, PG7MD_010, PG7MD_011, - PG7MD_100, PG7MD_101, PG7MD_110, PG7MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG6MD_000, PG6MD_001, PG6MD_010, PG6MD_011, - PG6MD_100, PG6MD_101, PG6MD_110, PG6MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG5MD_000, PG5MD_001, PG5MD_010, PG5MD_011, - PG5MD_100, PG5MD_101, PG5MD_110, PG5MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG4MD_000, PG4MD_001, PG4MD_010, PG4MD_011, - PG4MD_100, PG4MD_101, PG4MD_110, PG4MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) { - PG3MD_000, PG3MD_001, PG3MD_010, PG3MD_011, - PG3MD_100, PG3MD_101, PG3MD_110, PG3MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG2MD_000, PG2MD_001, PG2MD_010, PG2MD_011, - PG2MD_100, PG2MD_101, PG2MD_110, PG2MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG1MD_000, PG1MD_001, PG1MD_010, PG1MD_011, - PG1MD_100, PG1MD_101, PG1MD_110, PG1MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011, - PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, - PG27_IN, PG27_OUT, - PG26_IN, PG26_OUT, - PG25_IN, PG25_OUT, - PG24_IN, PG24_OUT, - PG23_IN, PG23_OUT, - PG22_IN, PG22_OUT, - PG21_IN, PG21_OUT, - PG20_IN, PG20_OUT, - PG19_IN, PG19_OUT, - PG18_IN, PG18_OUT, - PG17_IN, PG17_OUT, - PG16_IN, PG16_OUT } - }, - { PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) { - PG15_IN, PG15_OUT, - PG14_IN, PG14_OUT, - PG13_IN, PG13_OUT, - PG12_IN, PG12_OUT, - PG11_IN, PG11_OUT, - PG10_IN, PG10_OUT, - PG9_IN, PG9_OUT, - PG8_IN, PG8_OUT, - PG7_IN, PG7_OUT, - PG6_IN, PG6_OUT, - PG5_IN, PG5_OUT, - PG4_IN, PG4_OUT, - PG3_IN, PG3_OUT, - PG2_IN, PG2_OUT, - PG1_IN, PG1_OUT, - PG0_IN, PG0_OUT } - }, - - { PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) { - PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) { - PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PJCR7", 0xfffe3900, 16, 4) { - PJ31MD_0, PJ31MD_1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ30MD_000, PJ30MD_001, PJ30MD_010, PJ30MD_011, - PJ30MD_100, PJ30MD_101, PJ30MD_110, PJ30MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ29MD_000, PJ29MD_001, PJ29MD_010, PJ29MD_011, - PJ29MD_100, PJ29MD_101, PJ29MD_110, PJ29MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ28MD_000, PJ28MD_001, PJ28MD_010, PJ28MD_011, - PJ28MD_100, PJ28MD_101, PJ28MD_110, PJ28MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR6", 0xfffe3902, 16, 4) { - PJ27MD_000, PJ27MD_001, PJ27MD_010, PJ27MD_011, - PJ27MD_100, PJ27MD_101, PJ27MD_110, PJ27MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ26MD_000, PJ26MD_001, PJ26MD_010, PJ26MD_011, - PJ26MD_100, PJ26MD_101, PJ26MD_110, PJ26MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ25MD_000, PJ25MD_001, PJ25MD_010, PJ25MD_011, - PJ25MD_100, PJ25MD_101, PJ25MD_110, PJ25MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ24MD_000, PJ24MD_001, PJ24MD_010, PJ24MD_011, - PJ24MD_100, PJ24MD_101, PJ24MD_110, PJ24MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR5", 0xfffe3904, 16, 4) { - PJ23MD_000, PJ23MD_001, PJ23MD_010, PJ23MD_011, - PJ23MD_100, PJ23MD_101, PJ23MD_110, PJ23MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ22MD_000, PJ22MD_001, PJ22MD_010, PJ22MD_011, - PJ22MD_100, PJ22MD_101, PJ22MD_110, PJ22MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ21MD_000, PJ21MD_001, PJ21MD_010, PJ21MD_011, - PJ21MD_100, PJ21MD_101, PJ21MD_110, PJ21MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ20MD_000, PJ20MD_001, PJ20MD_010, PJ20MD_011, - PJ20MD_100, PJ20MD_101, PJ20MD_110, PJ20MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR4", 0xfffe3906, 16, 4) { - PJ19MD_000, PJ19MD_001, PJ19MD_010, PJ19MD_011, - PJ19MD_100, PJ19MD_101, PJ19MD_110, PJ19MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ18MD_000, PJ18MD_001, PJ18MD_010, PJ18MD_011, - PJ18MD_100, PJ18MD_101, PJ18MD_110, PJ18MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ17MD_000, PJ17MD_001, PJ17MD_010, PJ17MD_011, - PJ17MD_100, PJ17MD_101, PJ17MD_110, PJ17MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ16MD_000, PJ16MD_001, PJ16MD_010, PJ16MD_011, - PJ16MD_100, PJ16MD_101, PJ16MD_110, PJ16MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR3", 0xfffe3908, 16, 4) { - PJ15MD_000, PJ15MD_001, PJ15MD_010, PJ15MD_011, - PJ15MD_100, PJ15MD_101, PJ15MD_110, PJ15MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ14MD_000, PJ14MD_001, PJ14MD_010, PJ14MD_011, - PJ14MD_100, PJ14MD_101, PJ14MD_110, PJ14MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ13MD_000, PJ13MD_001, PJ13MD_010, PJ13MD_011, - PJ13MD_100, PJ13MD_101, PJ13MD_110, PJ13MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ12MD_000, PJ12MD_001, PJ12MD_010, PJ12MD_011, - PJ12MD_100, PJ12MD_101, PJ12MD_110, PJ12MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) { - PJ11MD_000, PJ11MD_001, PJ11MD_010, PJ11MD_011, - PJ11MD_100, PJ11MD_101, PJ11MD_110, PJ11MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ10MD_000, PJ10MD_001, PJ10MD_010, PJ10MD_011, - PJ10MD_100, PJ10MD_101, PJ10MD_110, PJ10MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ9MD_000, PJ9MD_001, PJ9MD_010, PJ9MD_011, - PJ9MD_100, PJ9MD_101, PJ9MD_110, PJ9MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ8MD_000, PJ8MD_001, PJ8MD_010, PJ8MD_011, - PJ8MD_100, PJ8MD_101, PJ8MD_110, PJ8MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) { - PJ7MD_000, PJ7MD_001, PJ7MD_010, PJ7MD_011, - PJ7MD_100, PJ7MD_101, PJ7MD_110, PJ7MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ6MD_000, PJ6MD_001, PJ6MD_010, PJ6MD_011, - PJ6MD_100, PJ6MD_101, PJ6MD_110, PJ6MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ5MD_000, PJ5MD_001, PJ5MD_010, PJ5MD_011, - PJ5MD_100, PJ5MD_101, PJ5MD_110, PJ5MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ4MD_000, PJ4MD_001, PJ4MD_010, PJ4MD_011, - PJ4MD_100, PJ4MD_101, PJ4MD_110, PJ4MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) { - PJ3MD_000, PJ3MD_001, PJ3MD_010, PJ3MD_011, - PJ3MD_100, PJ3MD_101, PJ3MD_110, PJ3MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011, - PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011, - PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111, - 0, 0, 0, 0, 0, 0, 0, 0, - - PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011, - PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111, - 0, 0, 0, 0, 0, 0, 0, 0 } - }, - - { PINMUX_CFG_REG("PJIOR1", 0xfffe3910, 16, 1) { - PJ31_IN, PJ31_OUT, - PJ30_IN, PJ30_OUT, - PJ29_IN, PJ29_OUT, - PJ28_IN, PJ28_OUT, - PJ27_IN, PJ27_OUT, - PJ26_IN, PJ26_OUT, - PJ25_IN, PJ25_OUT, - PJ24_IN, PJ24_OUT, - PJ23_IN, PJ23_OUT, - PJ22_IN, PJ22_OUT, - PJ21_IN, PJ21_OUT, - PJ20_IN, PJ20_OUT, - PJ19_IN, PJ19_OUT, - PJ18_IN, PJ18_OUT, - PJ17_IN, PJ17_OUT, - PJ16_IN, PJ16_OUT } - }, - { PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) { - PJ15_IN, PJ15_OUT, - PJ14_IN, PJ14_OUT, - PJ13_IN, PJ13_OUT, - PJ12_IN, PJ12_OUT, - PJ11_IN, PJ11_OUT, - PJ10_IN, PJ10_OUT, - PJ9_IN, PJ9_OUT, - PJ8_IN, PJ8_OUT, - PJ7_IN, PJ7_OUT, - PJ6_IN, PJ6_OUT, - PJ5_IN, PJ5_OUT, - PJ4_IN, PJ4_OUT, - PJ3_IN, PJ3_OUT, - PJ2_IN, PJ2_OUT, - PJ1_IN, PJ1_OUT, - PJ0_IN, PJ0_OUT } - }, - - {} -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) { - 0, 0, 0, 0, 0, 0, 0, PA1_DATA, - 0, 0, 0, 0, 0, 0, 0, PA0_DATA } - }, - - { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) { - 0, 0, 0, 0, 0, 0, 0, 0, - 0, PB22_DATA, PB21_DATA, PB20_DATA, - PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA } - }, - { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) { - PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA, - PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA, - PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA, - PB3_DATA, PB2_DATA, PB1_DATA, 0 } - }, - - { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) { - 0, 0, 0, 0, - 0, 0, 0, PC8_DATA, - PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA, - PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA } - }, - - { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) { - PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA, - PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA, - PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA, - PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA } - }, - - { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) { - 0, 0, 0, 0, 0, 0, 0, 0, - PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA, - PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA } - }, - - { PINMUX_DATA_REG("PFDR1", 0xfffe38b4, 16) { - 0, 0, 0, 0, 0, 0, 0, 0, - PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA, - PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA } - }, - { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) { - PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA, - PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA, - PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA, - PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA } - }, - - { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) { - 0, 0, 0, 0, - PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA, - PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA, - PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA } - }, - { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) { - PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA, - PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA, - PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA, - PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA } - }, - - { PINMUX_DATA_REG("PJDR1", 0xfffe3914, 16) { - PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA, - PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA, - PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA, - PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA } - }, - { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) { - PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA, - PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA, - PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA, - PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA } - }, - - { } -}; - -static struct pinmux_info sh7269_pinmux_info = { - .name = "sh7269_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_PA1, - .last_gpio = GPIO_FN_LCD_M_DISP, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -static int __init plat_pinmux_setup(void) -{ - return register_pinmux(&sh7269_pinmux_info); -} -arch_initcall(plat_pinmux_setup); diff --git a/trunk/arch/sh/kernel/cpu/sh2a/probe.c b/trunk/arch/sh/kernel/cpu/sh2a/probe.c index 5170b6aa4129..48e97a2a0c8d 100644 --- a/trunk/arch/sh/kernel/cpu/sh2a/probe.c +++ b/trunk/arch/sh/kernel/cpu/sh2a/probe.c @@ -29,12 +29,6 @@ void __cpuinit cpu_probe(void) #elif defined(CONFIG_CPU_SUBTYPE_SH7263) boot_cpu_data.type = CPU_SH7263; boot_cpu_data.flags |= CPU_HAS_FPU; -#elif defined(CONFIG_CPU_SUBTYPE_SH7264) - boot_cpu_data.type = CPU_SH7264; - boot_cpu_data.flags |= CPU_HAS_FPU; -#elif defined(CONFIG_CPU_SUBTYPE_SH7269) - boot_cpu_data.type = CPU_SH7269; - boot_cpu_data.flags |= CPU_HAS_FPU; #elif defined(CONFIG_CPU_SUBTYPE_SH7206) boot_cpu_data.type = CPU_SH7206; boot_cpu_data.flags |= CPU_HAS_DSP; diff --git a/trunk/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/trunk/arch/sh/kernel/cpu/sh2a/setup-mxg.c index f7f1cf2af302..949bf2bac28c 100644 --- a/trunk/arch/sh/kernel/cpu/sh2a/setup-mxg.c +++ b/trunk/arch/sh/kernel/cpu/sh2a/setup-mxg.c @@ -204,7 +204,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(220), + .irqs = { 220, 220, 220, 220 }, }; static struct platform_device scif0_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7201.c index 7b84785b8962..9df558dcdb86 100644 --- a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7201.c +++ b/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7201.c @@ -183,7 +183,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(180), + .irqs = { 180, 180, 180, 180 } }; static struct platform_device scif0_device = { @@ -200,7 +200,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(184), + .irqs = { 184, 184, 184, 184 } }; static struct platform_device scif1_device = { @@ -217,7 +217,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(188), + .irqs = { 188, 188, 188, 188 } }; static struct platform_device scif2_device = { @@ -234,7 +234,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(192), + .irqs = { 192, 192, 192, 192 } }; static struct platform_device scif3_device = { @@ -251,7 +251,7 @@ static struct plat_sci_port scif4_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(196), + .irqs = { 196, 196, 196, 196 } }; static struct platform_device scif4_device = { @@ -268,7 +268,7 @@ static struct plat_sci_port scif5_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(200), + .irqs = { 200, 200, 200, 200 } }; static struct platform_device scif5_device = { @@ -285,7 +285,7 @@ static struct plat_sci_port scif6_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(204), + .irqs = { 204, 204, 204, 204 } }; static struct platform_device scif6_device = { @@ -302,7 +302,7 @@ static struct plat_sci_port scif7_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(208), + .irqs = { 208, 208, 208, 208 } }; static struct platform_device scif7_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7203.c index bfc33f6a28c3..0bd744f9a3b7 100644 --- a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7203.c +++ b/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7203.c @@ -180,7 +180,7 @@ static struct plat_sci_port scif0_platform_data = { SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(192), + .irqs = { 192, 192, 192, 192 }, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, }; @@ -199,7 +199,7 @@ static struct plat_sci_port scif1_platform_data = { SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(196), + .irqs = { 196, 196, 196, 196 }, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, }; @@ -218,7 +218,7 @@ static struct plat_sci_port scif2_platform_data = { SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(200), + .irqs = { 200, 200, 200, 200 }, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, }; @@ -237,7 +237,7 @@ static struct plat_sci_port scif3_platform_data = { SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(204), + .irqs = { 204, 204, 204, 204 }, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, }; diff --git a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7206.c index a5010741de85..5d14f849aea3 100644 --- a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7206.c +++ b/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7206.c @@ -139,7 +139,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(240), + .irqs = { 240, 240, 240, 240 }, }; static struct platform_device scif0_device = { @@ -156,7 +156,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(244), + .irqs = { 244, 244, 244, 244 }, }; static struct platform_device scif1_device = { @@ -173,7 +173,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(248), + .irqs = { 248, 248, 248, 248 }, }; static struct platform_device scif2_device = { @@ -190,7 +190,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(252), + .irqs = { 252, 252, 252, 252 }, }; static struct platform_device scif3_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7264.c b/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7264.c deleted file mode 100644 index ce5c1b5aebfa..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7264.c +++ /dev/null @@ -1,606 +0,0 @@ -/* - * SH7264 Setup - * - * Copyright (C) 2012 Renesas Electronics Europe Ltd - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include -#include - -enum { - UNUSED = 0, - - /* interrupt sources */ - IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, - PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, - - DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7, - DMAC8, DMAC9, DMAC10, DMAC11, DMAC12, DMAC13, DMAC14, DMAC15, - USB, VDC3, CMT0, CMT1, BSC, WDT, - MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU, - MTU3_ABCD, MTU3_TCI3V, MTU4_ABCD, MTU4_TCI4V, - PWMT1, PWMT2, ADC_ADI, - SSIF0, SSII1, SSII2, SSII3, - RSPDIF, - IIC30, IIC31, IIC32, IIC33, - SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI, - SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI, - SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI, - SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI, - SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI, - SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI, - SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI, - SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI, - SIO_FIFO, RSPIC0, RSPIC1, - RCAN0, RCAN1, IEBC, CD_ROMD, - NFMC, SDHI, RTC, - SRCC0, SRCC1, DCOMU, OFFI, IFEI, - - /* interrupt groups */ - PINT, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7, -}; - -static struct intc_vect vectors[] __initdata = { - INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65), - INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67), - INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69), - INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71), - - INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81), - INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83), - INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85), - INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87), - - INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109), - INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113), - INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117), - INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121), - INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125), - INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129), - INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133), - INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137), - INTC_IRQ(DMAC8, 140), INTC_IRQ(DMAC8, 141), - INTC_IRQ(DMAC9, 144), INTC_IRQ(DMAC9, 145), - INTC_IRQ(DMAC10, 148), INTC_IRQ(DMAC10, 149), - INTC_IRQ(DMAC11, 152), INTC_IRQ(DMAC11, 153), - INTC_IRQ(DMAC12, 156), INTC_IRQ(DMAC12, 157), - INTC_IRQ(DMAC13, 160), INTC_IRQ(DMAC13, 161), - INTC_IRQ(DMAC14, 164), INTC_IRQ(DMAC14, 165), - INTC_IRQ(DMAC15, 168), INTC_IRQ(DMAC15, 169), - - INTC_IRQ(USB, 170), - INTC_IRQ(VDC3, 171), INTC_IRQ(VDC3, 172), - INTC_IRQ(VDC3, 173), INTC_IRQ(VDC3, 174), - INTC_IRQ(CMT0, 175), INTC_IRQ(CMT1, 176), - INTC_IRQ(BSC, 177), INTC_IRQ(WDT, 178), - - INTC_IRQ(MTU0_ABCD, 179), INTC_IRQ(MTU0_ABCD, 180), - INTC_IRQ(MTU0_ABCD, 181), INTC_IRQ(MTU0_ABCD, 182), - INTC_IRQ(MTU0_VEF, 183), - INTC_IRQ(MTU0_VEF, 184), INTC_IRQ(MTU0_VEF, 185), - INTC_IRQ(MTU1_AB, 186), INTC_IRQ(MTU1_AB, 187), - INTC_IRQ(MTU1_VU, 188), INTC_IRQ(MTU1_VU, 189), - INTC_IRQ(MTU2_AB, 190), INTC_IRQ(MTU2_AB, 191), - INTC_IRQ(MTU2_VU, 192), INTC_IRQ(MTU2_VU, 193), - INTC_IRQ(MTU3_ABCD, 194), INTC_IRQ(MTU3_ABCD, 195), - INTC_IRQ(MTU3_ABCD, 196), INTC_IRQ(MTU3_ABCD, 197), - INTC_IRQ(MTU3_TCI3V, 198), - INTC_IRQ(MTU4_ABCD, 199), INTC_IRQ(MTU4_ABCD, 200), - INTC_IRQ(MTU4_ABCD, 201), INTC_IRQ(MTU4_ABCD, 202), - INTC_IRQ(MTU4_TCI4V, 203), - - INTC_IRQ(PWMT1, 204), INTC_IRQ(PWMT2, 205), - - INTC_IRQ(ADC_ADI, 206), - - INTC_IRQ(SSIF0, 207), INTC_IRQ(SSIF0, 208), - INTC_IRQ(SSIF0, 209), - INTC_IRQ(SSII1, 210), INTC_IRQ(SSII1, 211), - INTC_IRQ(SSII2, 212), INTC_IRQ(SSII2, 213), - INTC_IRQ(SSII3, 214), INTC_IRQ(SSII3, 215), - - INTC_IRQ(RSPDIF, 216), - - INTC_IRQ(IIC30, 217), INTC_IRQ(IIC30, 218), - INTC_IRQ(IIC30, 219), INTC_IRQ(IIC30, 220), - INTC_IRQ(IIC30, 221), - INTC_IRQ(IIC31, 222), INTC_IRQ(IIC31, 223), - INTC_IRQ(IIC31, 224), INTC_IRQ(IIC31, 225), - INTC_IRQ(IIC31, 226), - INTC_IRQ(IIC32, 227), INTC_IRQ(IIC32, 228), - INTC_IRQ(IIC32, 229), INTC_IRQ(IIC32, 230), - INTC_IRQ(IIC32, 231), - - INTC_IRQ(SCIF0_BRI, 232), INTC_IRQ(SCIF0_ERI, 233), - INTC_IRQ(SCIF0_RXI, 234), INTC_IRQ(SCIF0_TXI, 235), - INTC_IRQ(SCIF1_BRI, 236), INTC_IRQ(SCIF1_ERI, 237), - INTC_IRQ(SCIF1_RXI, 238), INTC_IRQ(SCIF1_TXI, 239), - INTC_IRQ(SCIF2_BRI, 240), INTC_IRQ(SCIF2_ERI, 241), - INTC_IRQ(SCIF2_RXI, 242), INTC_IRQ(SCIF2_TXI, 243), - INTC_IRQ(SCIF3_BRI, 244), INTC_IRQ(SCIF3_ERI, 245), - INTC_IRQ(SCIF3_RXI, 246), INTC_IRQ(SCIF3_TXI, 247), - INTC_IRQ(SCIF4_BRI, 248), INTC_IRQ(SCIF4_ERI, 249), - INTC_IRQ(SCIF4_RXI, 250), INTC_IRQ(SCIF4_TXI, 251), - INTC_IRQ(SCIF5_BRI, 252), INTC_IRQ(SCIF5_ERI, 253), - INTC_IRQ(SCIF5_RXI, 254), INTC_IRQ(SCIF5_TXI, 255), - INTC_IRQ(SCIF6_BRI, 256), INTC_IRQ(SCIF6_ERI, 257), - INTC_IRQ(SCIF6_RXI, 258), INTC_IRQ(SCIF6_TXI, 259), - INTC_IRQ(SCIF7_BRI, 260), INTC_IRQ(SCIF7_ERI, 261), - INTC_IRQ(SCIF7_RXI, 262), INTC_IRQ(SCIF7_TXI, 263), - - INTC_IRQ(SIO_FIFO, 264), - - INTC_IRQ(RSPIC0, 265), INTC_IRQ(RSPIC0, 266), - INTC_IRQ(RSPIC0, 267), - INTC_IRQ(RSPIC1, 268), INTC_IRQ(RSPIC1, 269), - INTC_IRQ(RSPIC1, 270), - - INTC_IRQ(RCAN0, 271), INTC_IRQ(RCAN0, 272), - INTC_IRQ(RCAN0, 273), INTC_IRQ(RCAN0, 274), - INTC_IRQ(RCAN0, 275), - INTC_IRQ(RCAN1, 276), INTC_IRQ(RCAN1, 277), - INTC_IRQ(RCAN1, 278), INTC_IRQ(RCAN1, 279), - INTC_IRQ(RCAN1, 280), - - INTC_IRQ(IEBC, 281), - - INTC_IRQ(CD_ROMD, 282), INTC_IRQ(CD_ROMD, 283), - INTC_IRQ(CD_ROMD, 284), INTC_IRQ(CD_ROMD, 285), - INTC_IRQ(CD_ROMD, 286), INTC_IRQ(CD_ROMD, 287), - - INTC_IRQ(NFMC, 288), INTC_IRQ(NFMC, 289), - INTC_IRQ(NFMC, 290), INTC_IRQ(NFMC, 291), - - INTC_IRQ(SDHI, 292), INTC_IRQ(SDHI, 293), - INTC_IRQ(SDHI, 294), - - INTC_IRQ(RTC, 296), INTC_IRQ(RTC, 297), - INTC_IRQ(RTC, 298), - - INTC_IRQ(SRCC0, 299), INTC_IRQ(SRCC0, 300), - INTC_IRQ(SRCC0, 301), INTC_IRQ(SRCC0, 302), - INTC_IRQ(SRCC0, 303), - INTC_IRQ(SRCC1, 304), INTC_IRQ(SRCC1, 305), - INTC_IRQ(SRCC1, 306), INTC_IRQ(SRCC1, 307), - INTC_IRQ(SRCC1, 308), - - INTC_IRQ(DCOMU, 310), INTC_IRQ(DCOMU, 311), - INTC_IRQ(DCOMU, 312), -}; - -static struct intc_group groups[] __initdata = { - INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3, - PINT4, PINT5, PINT6, PINT7), - INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI), - INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI), - INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI), - INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI), - INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI), - INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI), - INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI), - INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI), -}; - -static struct intc_prio_reg prio_registers[] __initdata = { - { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } }, - { 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } }, - { 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } }, - { 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } }, - { 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4, DMAC5, DMAC6, DMAC7 } }, - { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { DMAC8, DMAC9, - DMAC10, DMAC11 } }, - { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { DMAC12, DMAC13, - DMAC14, DMAC15 } }, - { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { USB, VDC3, CMT0, CMT1 } }, - { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } }, - { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { MTU1_AB, MTU1_VU, - MTU2_AB, MTU2_VU } }, - { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { MTU3_ABCD, MTU3_TCI3V, - MTU4_ABCD, MTU4_TCI4V } }, - { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { PWMT1, PWMT2, ADC_ADI, 0 } }, - { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSIF0, SSII1, SSII2, SSII3 } }, - { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { RSPDIF, IIC30, IIC31, IIC32 } }, - { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { SCIF0, SCIF1, SCIF2, SCIF3 } }, - { 0xfffe0c18, 0, 16, 4, /* IPR18 */ { SCIF4, SCIF5, SCIF6, SCIF7 } }, - { 0xfffe0c1a, 0, 16, 4, /* IPR19 */ { SIO_FIFO, 0, RSPIC0, RSPIC1, } }, - { 0xfffe0c1c, 0, 16, 4, /* IPR20 */ { RCAN0, RCAN1, IEBC, CD_ROMD } }, - { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } }, - { 0xfffe0c20, 0, 16, 4, /* IPR22 */ { SRCC0, SRCC1, 0, DCOMU } }, -}; - -static struct intc_mask_reg mask_registers[] __initdata = { - { 0xfffe0808, 0, 16, /* PINTER */ - { 0, 0, 0, 0, 0, 0, 0, 0, - PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } }, -}; - -static DECLARE_INTC_DESC(intc_desc, "sh7264", vectors, groups, - mask_registers, prio_registers, NULL); - -static struct plat_sci_port scif0_platform_data = { - .mapbase = 0xfffe8000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 233, 234, 235, 232 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif0_device = { - .name = "sh-sci", - .id = 0, - .dev = { - .platform_data = &scif0_platform_data, - }, -}; - -static struct plat_sci_port scif1_platform_data = { - .mapbase = 0xfffe8800, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 237, 238, 239, 236 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif1_device = { - .name = "sh-sci", - .id = 1, - .dev = { - .platform_data = &scif1_platform_data, - }, -}; - -static struct plat_sci_port scif2_platform_data = { - .mapbase = 0xfffe9000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 241, 242, 243, 240 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif2_device = { - .name = "sh-sci", - .id = 2, - .dev = { - .platform_data = &scif2_platform_data, - }, -}; - -static struct plat_sci_port scif3_platform_data = { - .mapbase = 0xfffe9800, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 245, 246, 247, 244 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif3_device = { - .name = "sh-sci", - .id = 3, - .dev = { - .platform_data = &scif3_platform_data, - }, -}; - -static struct plat_sci_port scif4_platform_data = { - .mapbase = 0xfffea000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 249, 250, 251, 248 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif4_device = { - .name = "sh-sci", - .id = 4, - .dev = { - .platform_data = &scif4_platform_data, - }, -}; - -static struct plat_sci_port scif5_platform_data = { - .mapbase = 0xfffea800, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 253, 254, 255, 252 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif5_device = { - .name = "sh-sci", - .id = 5, - .dev = { - .platform_data = &scif5_platform_data, - }, -}; - -static struct plat_sci_port scif6_platform_data = { - .mapbase = 0xfffeb000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 257, 258, 259, 256 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif6_device = { - .name = "sh-sci", - .id = 6, - .dev = { - .platform_data = &scif6_platform_data, - }, -}; - -static struct plat_sci_port scif7_platform_data = { - .mapbase = 0xfffeb800, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 261, 262, 263, 260 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif7_device = { - .name = "sh-sci", - .id = 7, - .dev = { - .platform_data = &scif7_platform_data, - }, -}; - -static struct sh_timer_config cmt0_platform_data = { - .channel_offset = 0x02, - .timer_bit = 0, - .clockevent_rating = 125, - .clocksource_rating = 0, /* disabled due to code generation issues */ -}; - -static struct resource cmt0_resources[] = { - [0] = { - .name = "CMT0", - .start = 0xfffec002, - .end = 0xfffec007, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 175, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cmt0_device = { - .name = "sh_cmt", - .id = 0, - .dev = { - .platform_data = &cmt0_platform_data, - }, - .resource = cmt0_resources, - .num_resources = ARRAY_SIZE(cmt0_resources), -}; - -static struct sh_timer_config cmt1_platform_data = { - .name = "CMT1", - .channel_offset = 0x08, - .timer_bit = 1, - .clockevent_rating = 125, - .clocksource_rating = 0, /* disabled due to code generation issues */ -}; - -static struct resource cmt1_resources[] = { - [0] = { - .name = "CMT1", - .start = 0xfffec008, - .end = 0xfffec00d, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 176, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cmt1_device = { - .name = "sh_cmt", - .id = 1, - .dev = { - .platform_data = &cmt1_platform_data, - }, - .resource = cmt1_resources, - .num_resources = ARRAY_SIZE(cmt1_resources), -}; - -static struct sh_timer_config mtu2_0_platform_data = { - .name = "MTU2_0", - .channel_offset = -0x80, - .timer_bit = 0, - .clockevent_rating = 200, -}; - -static struct resource mtu2_0_resources[] = { - [0] = { - .name = "MTU2_0", - .start = 0xfffe4300, - .end = 0xfffe4326, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 179, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mtu2_0_device = { - .name = "sh_mtu2", - .id = 0, - .dev = { - .platform_data = &mtu2_0_platform_data, - }, - .resource = mtu2_0_resources, - .num_resources = ARRAY_SIZE(mtu2_0_resources), -}; - -static struct sh_timer_config mtu2_1_platform_data = { - .name = "MTU2_1", - .channel_offset = -0x100, - .timer_bit = 1, - .clockevent_rating = 200, -}; - -static struct resource mtu2_1_resources[] = { - [0] = { - .name = "MTU2_1", - .start = 0xfffe4380, - .end = 0xfffe4390, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 186, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mtu2_1_device = { - .name = "sh_mtu2", - .id = 1, - .dev = { - .platform_data = &mtu2_1_platform_data, - }, - .resource = mtu2_1_resources, - .num_resources = ARRAY_SIZE(mtu2_1_resources), -}; - -static struct resource rtc_resources[] = { - [0] = { - .start = 0xfffe6000, - .end = 0xfffe6000 + 0x30 - 1, - .flags = IORESOURCE_IO, - }, - [1] = { - /* Shared Period/Carry/Alarm IRQ */ - .start = 296, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device rtc_device = { - .name = "sh-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(rtc_resources), - .resource = rtc_resources, -}; - -/* USB Host */ -static void usb_port_power(int port, int power) -{ - __raw_writew(0x200 , 0xffffc0c2) ; /* Initialise UACS25 */ -} - -static struct r8a66597_platdata r8a66597_data = { - .on_chip = 1, - .endian = 1, - .port_power = usb_port_power, -}; - -static struct resource r8a66597_usb_host_resources[] = { - [0] = { - .start = 0xffffc000, - .end = 0xffffc0e4, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 170, - .end = 170, - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, - }, -}; - -static struct platform_device r8a66597_usb_host_device = { - .name = "r8a66597_hcd", - .id = 0, - .dev = { - .dma_mask = NULL, /* not use dma */ - .coherent_dma_mask = 0xffffffff, - .platform_data = &r8a66597_data, - }, - .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources), - .resource = r8a66597_usb_host_resources, -}; - -static struct platform_device *sh7264_devices[] __initdata = { - &scif0_device, - &scif1_device, - &scif2_device, - &scif3_device, - &scif4_device, - &scif5_device, - &scif6_device, - &scif7_device, - &cmt0_device, - &cmt1_device, - &mtu2_0_device, - &mtu2_1_device, - &rtc_device, - &r8a66597_usb_host_device, -}; - -static int __init sh7264_devices_setup(void) -{ - return platform_add_devices(sh7264_devices, - ARRAY_SIZE(sh7264_devices)); -} -arch_initcall(sh7264_devices_setup); - -void __init plat_irq_setup(void) -{ - register_intc_controller(&intc_desc); -} - -static struct platform_device *sh7264_early_devices[] __initdata = { - &scif0_device, - &scif1_device, - &scif2_device, - &scif3_device, - &scif4_device, - &scif5_device, - &scif6_device, - &scif7_device, - &cmt0_device, - &cmt1_device, - &mtu2_0_device, - &mtu2_1_device, -}; - -void __init plat_early_device_setup(void) -{ - early_platform_add_devices(sh7264_early_devices, - ARRAY_SIZE(sh7264_early_devices)); -} diff --git a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7269.c b/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7269.c deleted file mode 100644 index e82ae9d8d3bc..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh2a/setup-sh7269.c +++ /dev/null @@ -1,615 +0,0 @@ -/* - * SH7269 Setup - * - * Copyright (C) 2012 Renesas Electronics Europe Ltd - * Copyright (C) 2012 Phil Edworthy - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include -#include - -enum { - UNUSED = 0, - - /* interrupt sources */ - IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, - PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, - - DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7, - DMAC8, DMAC9, DMAC10, DMAC11, DMAC12, DMAC13, DMAC14, DMAC15, - USB, VDC4, CMT0, CMT1, BSC, WDT, - MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU, - MTU3_ABCD, MTU3_TCI3V, MTU4_ABCD, MTU4_TCI4V, - PWMT1, PWMT2, ADC_ADI, - SSIF0, SSII1, SSII2, SSII3, SSII4, SSII5, - RSPDIF, - IIC30, IIC31, IIC32, IIC33, - SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI, - SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI, - SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI, - SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI, - SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI, - SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI, - SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI, - SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI, - RCAN0, RCAN1, RCAN2, - RSPIC0, RSPIC1, - IEBC, CD_ROMD, - NFMC, - SDHI0, SDHI1, - RTC, - SRCC0, SRCC1, SRCC2, - - /* interrupt groups */ - PINT, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7, -}; - -static struct intc_vect vectors[] __initdata = { - INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65), - INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67), - INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69), - INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71), - - INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81), - INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83), - INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85), - INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87), - - INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109), - INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113), - INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117), - INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121), - INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125), - INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129), - INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133), - INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137), - INTC_IRQ(DMAC8, 140), INTC_IRQ(DMAC8, 141), - INTC_IRQ(DMAC9, 144), INTC_IRQ(DMAC9, 145), - INTC_IRQ(DMAC10, 148), INTC_IRQ(DMAC10, 149), - INTC_IRQ(DMAC11, 152), INTC_IRQ(DMAC11, 153), - INTC_IRQ(DMAC12, 156), INTC_IRQ(DMAC12, 157), - INTC_IRQ(DMAC13, 160), INTC_IRQ(DMAC13, 161), - INTC_IRQ(DMAC14, 164), INTC_IRQ(DMAC14, 165), - INTC_IRQ(DMAC15, 168), INTC_IRQ(DMAC15, 169), - - INTC_IRQ(USB, 170), - - INTC_IRQ(VDC4, 171), INTC_IRQ(VDC4, 172), - INTC_IRQ(VDC4, 173), INTC_IRQ(VDC4, 174), - INTC_IRQ(VDC4, 175), INTC_IRQ(VDC4, 176), - INTC_IRQ(VDC4, 177), INTC_IRQ(VDC4, 177), - - INTC_IRQ(CMT0, 188), INTC_IRQ(CMT1, 189), - - INTC_IRQ(BSC, 190), INTC_IRQ(WDT, 191), - - INTC_IRQ(MTU0_ABCD, 192), INTC_IRQ(MTU0_ABCD, 193), - INTC_IRQ(MTU0_ABCD, 194), INTC_IRQ(MTU0_ABCD, 195), - INTC_IRQ(MTU0_VEF, 196), INTC_IRQ(MTU0_VEF, 197), - INTC_IRQ(MTU0_VEF, 198), - INTC_IRQ(MTU1_AB, 199), INTC_IRQ(MTU1_AB, 200), - INTC_IRQ(MTU1_VU, 201), INTC_IRQ(MTU1_VU, 202), - INTC_IRQ(MTU2_AB, 203), INTC_IRQ(MTU2_AB, 204), - INTC_IRQ(MTU2_VU, 205), INTC_IRQ(MTU2_VU, 206), - INTC_IRQ(MTU3_ABCD, 207), INTC_IRQ(MTU3_ABCD, 208), - INTC_IRQ(MTU3_ABCD, 209), INTC_IRQ(MTU3_ABCD, 210), - INTC_IRQ(MTU3_TCI3V, 211), - INTC_IRQ(MTU4_ABCD, 212), INTC_IRQ(MTU4_ABCD, 213), - INTC_IRQ(MTU4_ABCD, 214), INTC_IRQ(MTU4_ABCD, 215), - INTC_IRQ(MTU4_TCI4V, 216), - - INTC_IRQ(PWMT1, 217), INTC_IRQ(PWMT2, 218), - - INTC_IRQ(ADC_ADI, 223), - - INTC_IRQ(SSIF0, 224), INTC_IRQ(SSIF0, 225), - INTC_IRQ(SSIF0, 226), - INTC_IRQ(SSII1, 227), INTC_IRQ(SSII1, 228), - INTC_IRQ(SSII2, 229), INTC_IRQ(SSII2, 230), - INTC_IRQ(SSII3, 231), INTC_IRQ(SSII3, 232), - INTC_IRQ(SSII4, 233), INTC_IRQ(SSII4, 234), - INTC_IRQ(SSII5, 235), INTC_IRQ(SSII5, 236), - - INTC_IRQ(RSPDIF, 237), - - INTC_IRQ(IIC30, 238), INTC_IRQ(IIC30, 239), - INTC_IRQ(IIC30, 240), INTC_IRQ(IIC30, 241), - INTC_IRQ(IIC30, 242), - INTC_IRQ(IIC31, 243), INTC_IRQ(IIC31, 244), - INTC_IRQ(IIC31, 245), INTC_IRQ(IIC31, 246), - INTC_IRQ(IIC31, 247), - INTC_IRQ(IIC32, 248), INTC_IRQ(IIC32, 249), - INTC_IRQ(IIC32, 250), INTC_IRQ(IIC32, 251), - INTC_IRQ(IIC32, 252), - INTC_IRQ(IIC33, 253), INTC_IRQ(IIC33, 254), - INTC_IRQ(IIC33, 255), INTC_IRQ(IIC33, 256), - INTC_IRQ(IIC33, 257), - - INTC_IRQ(SCIF0_BRI, 258), INTC_IRQ(SCIF0_ERI, 259), - INTC_IRQ(SCIF0_RXI, 260), INTC_IRQ(SCIF0_TXI, 261), - INTC_IRQ(SCIF1_BRI, 262), INTC_IRQ(SCIF1_ERI, 263), - INTC_IRQ(SCIF1_RXI, 264), INTC_IRQ(SCIF1_TXI, 265), - INTC_IRQ(SCIF2_BRI, 266), INTC_IRQ(SCIF2_ERI, 267), - INTC_IRQ(SCIF2_RXI, 268), INTC_IRQ(SCIF2_TXI, 269), - INTC_IRQ(SCIF3_BRI, 270), INTC_IRQ(SCIF3_ERI, 271), - INTC_IRQ(SCIF3_RXI, 272), INTC_IRQ(SCIF3_TXI, 273), - INTC_IRQ(SCIF4_BRI, 274), INTC_IRQ(SCIF4_ERI, 275), - INTC_IRQ(SCIF4_RXI, 276), INTC_IRQ(SCIF4_TXI, 277), - INTC_IRQ(SCIF5_BRI, 278), INTC_IRQ(SCIF5_ERI, 279), - INTC_IRQ(SCIF5_RXI, 280), INTC_IRQ(SCIF5_TXI, 281), - INTC_IRQ(SCIF6_BRI, 282), INTC_IRQ(SCIF6_ERI, 283), - INTC_IRQ(SCIF6_RXI, 284), INTC_IRQ(SCIF6_TXI, 285), - INTC_IRQ(SCIF7_BRI, 286), INTC_IRQ(SCIF7_ERI, 287), - INTC_IRQ(SCIF7_RXI, 288), INTC_IRQ(SCIF7_TXI, 289), - - INTC_IRQ(RCAN0, 291), INTC_IRQ(RCAN0, 292), - INTC_IRQ(RCAN0, 293), INTC_IRQ(RCAN0, 294), - INTC_IRQ(RCAN0, 295), - INTC_IRQ(RCAN1, 296), INTC_IRQ(RCAN1, 297), - INTC_IRQ(RCAN1, 298), INTC_IRQ(RCAN1, 299), - INTC_IRQ(RCAN1, 300), - INTC_IRQ(RCAN2, 301), INTC_IRQ(RCAN2, 302), - INTC_IRQ(RCAN2, 303), INTC_IRQ(RCAN2, 304), - INTC_IRQ(RCAN2, 305), - - INTC_IRQ(RSPIC0, 306), INTC_IRQ(RSPIC0, 307), - INTC_IRQ(RSPIC0, 308), - INTC_IRQ(RSPIC1, 309), INTC_IRQ(RSPIC1, 310), - INTC_IRQ(RSPIC1, 311), - - INTC_IRQ(IEBC, 318), - - INTC_IRQ(CD_ROMD, 319), INTC_IRQ(CD_ROMD, 320), - INTC_IRQ(CD_ROMD, 321), INTC_IRQ(CD_ROMD, 322), - INTC_IRQ(CD_ROMD, 323), INTC_IRQ(CD_ROMD, 324), - - INTC_IRQ(NFMC, 325), INTC_IRQ(NFMC, 326), - INTC_IRQ(NFMC, 327), INTC_IRQ(NFMC, 328), - - INTC_IRQ(SDHI0, 332), INTC_IRQ(SDHI0, 333), - INTC_IRQ(SDHI0, 334), - INTC_IRQ(SDHI1, 335), INTC_IRQ(SDHI1, 336), - INTC_IRQ(SDHI1, 337), - - INTC_IRQ(RTC, 338), INTC_IRQ(RTC, 339), - INTC_IRQ(RTC, 340), - - INTC_IRQ(SRCC0, 341), INTC_IRQ(SRCC0, 342), - INTC_IRQ(SRCC0, 343), INTC_IRQ(SRCC0, 344), - INTC_IRQ(SRCC0, 345), - INTC_IRQ(SRCC1, 346), INTC_IRQ(SRCC1, 347), - INTC_IRQ(SRCC1, 348), INTC_IRQ(SRCC1, 349), - INTC_IRQ(SRCC1, 350), - INTC_IRQ(SRCC2, 351), INTC_IRQ(SRCC2, 352), - INTC_IRQ(SRCC2, 353), INTC_IRQ(SRCC2, 354), - INTC_IRQ(SRCC2, 355), -}; - -static struct intc_group groups[] __initdata = { - INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3, - PINT4, PINT5, PINT6, PINT7), - INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI), - INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI), - INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI), - INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI), - INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI), - INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI), - INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI), - INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI), -}; - -static struct intc_prio_reg prio_registers[] __initdata = { - { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } }, - { 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } }, - { 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } }, - { 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } }, - { 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4, DMAC5, DMAC6, DMAC7 } }, - { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { DMAC8, DMAC9, - DMAC10, DMAC11 } }, - { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { DMAC12, DMAC13, - DMAC14, DMAC15 } }, - { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { USB, VDC4, VDC4, VDC4 } }, - { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { 0, 0, 0, 0 } }, - { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { CMT0, CMT1, BSC, WDT } }, - { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { MTU0_ABCD, MTU0_VEF, - MTU1_AB, MTU1_VU } }, - { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { MTU2_AB, MTU2_VU, - MTU3_ABCD, MTU3_TCI3V } }, - { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { MTU4_ABCD, MTU4_TCI4V, - PWMT1, PWMT2 } }, - { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { 0, 0, 0, 0 } }, - { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { ADC_ADI, SSIF0, SSII1, SSII2 } }, - { 0xfffe0c18, 0, 16, 4, /* IPR18 */ { SSII3, SSII4, SSII5, RSPDIF} }, - { 0xfffe0c1a, 0, 16, 4, /* IPR19 */ { IIC30, IIC31, IIC32, IIC33 } }, - { 0xfffe0c1c, 0, 16, 4, /* IPR20 */ { SCIF0, SCIF1, SCIF2, SCIF3 } }, - { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { SCIF4, SCIF5, SCIF6, SCIF7 } }, - { 0xfffe0c20, 0, 16, 4, /* IPR22 */ { 0, RCAN0, RCAN1, RCAN2 } }, - { 0xfffe0c22, 0, 16, 4, /* IPR23 */ { RSPIC0, RSPIC1, 0, 0 } }, - { 0xfffe0c24, 0, 16, 4, /* IPR24 */ { IEBC, CD_ROMD, NFMC, 0 } }, - { 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } }, - { 0xfffe0c28, 0, 16, 4, /* IPR26 */ { SRCC0, SRCC1, SRCC2, 0 } }, -}; - -static struct intc_mask_reg mask_registers[] __initdata = { - { 0xfffe0808, 0, 16, /* PINTER */ - { 0, 0, 0, 0, 0, 0, 0, 0, - PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } }, -}; - -static DECLARE_INTC_DESC(intc_desc, "sh7269", vectors, groups, - mask_registers, prio_registers, NULL); - -static struct plat_sci_port scif0_platform_data = { - .mapbase = 0xe8007000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 259, 260, 261, 258 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif0_device = { - .name = "sh-sci", - .id = 0, - .dev = { - .platform_data = &scif0_platform_data, - }, -}; - -static struct plat_sci_port scif1_platform_data = { - .mapbase = 0xe8007800, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 263, 264, 265, 262 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif1_device = { - .name = "sh-sci", - .id = 1, - .dev = { - .platform_data = &scif1_platform_data, - }, -}; - -static struct plat_sci_port scif2_platform_data = { - .mapbase = 0xe8008000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 267, 268, 269, 266 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif2_device = { - .name = "sh-sci", - .id = 2, - .dev = { - .platform_data = &scif2_platform_data, - }, -}; - -static struct plat_sci_port scif3_platform_data = { - .mapbase = 0xe8008800, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 271, 272, 273, 270 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif3_device = { - .name = "sh-sci", - .id = 3, - .dev = { - .platform_data = &scif3_platform_data, - }, -}; - -static struct plat_sci_port scif4_platform_data = { - .mapbase = 0xe8009000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 275, 276, 277, 274 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif4_device = { - .name = "sh-sci", - .id = 4, - .dev = { - .platform_data = &scif4_platform_data, - }, -}; - -static struct plat_sci_port scif5_platform_data = { - .mapbase = 0xe8009800, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 279, 280, 281, 278 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif5_device = { - .name = "sh-sci", - .id = 5, - .dev = { - .platform_data = &scif5_platform_data, - }, -}; - -static struct plat_sci_port scif6_platform_data = { - .mapbase = 0xe800a000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 283, 284, 285, 282 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif6_device = { - .name = "sh-sci", - .id = 6, - .dev = { - .platform_data = &scif6_platform_data, - }, -}; - -static struct plat_sci_port scif7_platform_data = { - .mapbase = 0xe800a800, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | - SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = { 287, 288, 289, 286 }, - .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, -}; - -static struct platform_device scif7_device = { - .name = "sh-sci", - .id = 7, - .dev = { - .platform_data = &scif7_platform_data, - }, -}; - -static struct sh_timer_config cmt0_platform_data = { - .channel_offset = 0x02, - .timer_bit = 0, - .clockevent_rating = 125, - .clocksource_rating = 0, /* disabled due to code generation issues */ -}; - -static struct resource cmt0_resources[] = { - [0] = { - .start = 0xfffec002, - .end = 0xfffec007, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 188, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cmt0_device = { - .name = "sh_cmt", - .id = 0, - .dev = { - .platform_data = &cmt0_platform_data, - }, - .resource = cmt0_resources, - .num_resources = ARRAY_SIZE(cmt0_resources), -}; - -static struct sh_timer_config cmt1_platform_data = { - .channel_offset = 0x08, - .timer_bit = 1, - .clockevent_rating = 125, - .clocksource_rating = 0, /* disabled due to code generation issues */ -}; - -static struct resource cmt1_resources[] = { - [0] = { - .start = 0xfffec008, - .end = 0xfffec00d, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 189, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cmt1_device = { - .name = "sh_cmt", - .id = 1, - .dev = { - .platform_data = &cmt1_platform_data, - }, - .resource = cmt1_resources, - .num_resources = ARRAY_SIZE(cmt1_resources), -}; - -static struct sh_timer_config mtu2_0_platform_data = { - .channel_offset = -0x80, - .timer_bit = 0, - .clockevent_rating = 200, -}; - -static struct resource mtu2_0_resources[] = { - [0] = { - .start = 0xfffe4300, - .end = 0xfffe4326, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 192, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mtu2_0_device = { - .name = "sh_mtu2", - .id = 0, - .dev = { - .platform_data = &mtu2_0_platform_data, - }, - .resource = mtu2_0_resources, - .num_resources = ARRAY_SIZE(mtu2_0_resources), -}; - -static struct sh_timer_config mtu2_1_platform_data = { - .channel_offset = -0x100, - .timer_bit = 1, - .clockevent_rating = 200, -}; - -static struct resource mtu2_1_resources[] = { - [0] = { - .start = 0xfffe4380, - .end = 0xfffe4390, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 203, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mtu2_1_device = { - .name = "sh_mtu2", - .id = 1, - .dev = { - .platform_data = &mtu2_1_platform_data, - }, - .resource = mtu2_1_resources, - .num_resources = ARRAY_SIZE(mtu2_1_resources), -}; - -static struct resource rtc_resources[] = { - [0] = { - .start = 0xfffe6000, - .end = 0xfffe6000 + 0x30 - 1, - .flags = IORESOURCE_IO, - }, - [1] = { - /* Shared Period/Carry/Alarm IRQ */ - .start = 338, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device rtc_device = { - .name = "sh-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(rtc_resources), - .resource = rtc_resources, -}; - -/* USB Host */ -static struct r8a66597_platdata r8a66597_data = { - .on_chip = 1, - .endian = 1, -}; - -static struct resource r8a66597_usb_host_resources[] = { - [0] = { - .start = 0xe8010000, - .end = 0xe80100e4, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 170, - .end = 170, - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, - }, -}; - -static struct platform_device r8a66597_usb_host_device = { - .name = "r8a66597_hcd", - .id = 0, - .dev = { - .dma_mask = NULL, /* not use dma */ - .coherent_dma_mask = 0xffffffff, - .platform_data = &r8a66597_data, - }, - .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources), - .resource = r8a66597_usb_host_resources, -}; - -static struct platform_device *sh7269_devices[] __initdata = { - &scif0_device, - &scif1_device, - &scif2_device, - &scif3_device, - &scif4_device, - &scif5_device, - &scif6_device, - &scif7_device, - &cmt0_device, - &cmt1_device, - &mtu2_0_device, - &mtu2_1_device, - &rtc_device, - &r8a66597_usb_host_device, -}; - -static int __init sh7269_devices_setup(void) -{ - return platform_add_devices(sh7269_devices, - ARRAY_SIZE(sh7269_devices)); -} -arch_initcall(sh7269_devices_setup); - -void __init plat_irq_setup(void) -{ - register_intc_controller(&intc_desc); -} - -static struct platform_device *sh7269_early_devices[] __initdata = { - &scif0_device, - &scif1_device, - &scif2_device, - &scif3_device, - &scif4_device, - &scif5_device, - &scif6_device, - &scif7_device, - &cmt0_device, - &cmt1_device, - &mtu2_0_device, - &mtu2_1_device, -}; - -void __init plat_early_device_setup(void) -{ - early_platform_add_devices(sh7269_early_devices, - ARRAY_SIZE(sh7269_early_devices)); -} diff --git a/trunk/arch/sh/kernel/cpu/sh3/entry.S b/trunk/arch/sh/kernel/cpu/sh3/entry.S index 262db6ec067b..f6a389c996cb 100644 --- a/trunk/arch/sh/kernel/cpu/sh3/entry.S +++ b/trunk/arch/sh/kernel/cpu/sh3/entry.S @@ -2,7 +2,7 @@ * arch/sh/kernel/cpu/sh3/entry.S * * Copyright (C) 1999, 2000, 2002 Niibe Yutaka - * Copyright (C) 2003 - 2012 Paul Mundt + * Copyright (C) 2003 - 2006 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -17,7 +17,6 @@ #include #include #include -#include ! NOTE: ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address @@ -115,22 +114,22 @@ ENTRY(tlb_miss_load) .align 2 ENTRY(tlb_miss_store) bra call_handle_tlbmiss - mov #FAULT_CODE_WRITE, r5 + mov #1, r5 .align 2 ENTRY(initial_page_write) bra call_handle_tlbmiss - mov #FAULT_CODE_INITIAL, r5 + mov #2, r5 .align 2 ENTRY(tlb_protection_violation_load) bra call_do_page_fault - mov #FAULT_CODE_PROT, r5 + mov #0, r5 .align 2 ENTRY(tlb_protection_violation_store) bra call_do_page_fault - mov #(FAULT_CODE_PROT | FAULT_CODE_WRITE), r5 + mov #1, r5 call_handle_tlbmiss: mov.l 1f, r0 diff --git a/trunk/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/trunk/arch/sh/kernel/cpu/sh3/setup-sh7705.c index 97416a597dd8..2309618c015d 100644 --- a/trunk/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/trunk/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -75,7 +75,7 @@ static struct plat_sci_port scif0_platform_data = { SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0, .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)), + .irqs = { 56, 56, 56 }, .ops = &sh770x_sci_port_ops, .regtype = SCIx_SH7705_SCIF_REGTYPE, }; @@ -94,7 +94,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE, .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)), + .irqs = { 52, 52, 52 }, .ops = &sh770x_sci_port_ops, .regtype = SCIx_SH7705_SCIF_REGTYPE, }; diff --git a/trunk/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/trunk/arch/sh/kernel/cpu/sh3/setup-sh770x.c index 50f95a32a8c5..3f3d5fe5892d 100644 --- a/trunk/arch/sh/kernel/cpu/sh3/setup-sh770x.c +++ b/trunk/arch/sh/kernel/cpu/sh3/setup-sh770x.c @@ -114,7 +114,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_TE | SCSCR_RE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCI, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x4E0)), + .irqs = { 23, 23, 23, 0 }, .ops = &sh770x_sci_port_ops, .regshift = 1, }; @@ -135,7 +135,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_TE | SCSCR_RE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)), + .irqs = { 56, 56, 56, 56 }, .ops = &sh770x_sci_port_ops, .regtype = SCIx_SH3_SCIF_REGTYPE, }; @@ -157,7 +157,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_TE | SCSCR_RE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_IRDA, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)), + .irqs = { 52, 52, 52, 52 }, .ops = &sh770x_sci_port_ops, .regshift = 1, }; diff --git a/trunk/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/trunk/arch/sh/kernel/cpu/sh3/setup-sh7710.c index 7ef248731820..78f6b01d42c3 100644 --- a/trunk/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/trunk/arch/sh/kernel/cpu/sh3/setup-sh7710.c @@ -103,7 +103,7 @@ static struct plat_sci_port scif0_platform_data = { SCSCR_CKE1 | SCSCR_CKE0, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)), + .irqs = { 52, 52, 52, 52 }, }; static struct platform_device scif0_device = { @@ -121,7 +121,7 @@ static struct plat_sci_port scif1_platform_data = { SCSCR_CKE1 | SCSCR_CKE0, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)), + .irqs = { 56, 56, 56, 56 }, }; static struct platform_device scif1_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/trunk/arch/sh/kernel/cpu/sh3/setup-sh7720.c index b2557485d0ce..94920345c14d 100644 --- a/trunk/arch/sh/kernel/cpu/sh3/setup-sh7720.c +++ b/trunk/arch/sh/kernel/cpu/sh3/setup-sh7720.c @@ -55,7 +55,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE, .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)), + .irqs = { 80, 80, 80, 80 }, .ops = &sh7720_sci_port_ops, .regtype = SCIx_SH7705_SCIF_REGTYPE, }; @@ -74,7 +74,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE, .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)), + .irqs = { 81, 81, 81, 81 }, .ops = &sh7720_sci_port_ops, .regtype = SCIx_SH7705_SCIF_REGTYPE, }; diff --git a/trunk/arch/sh/kernel/cpu/sh4/probe.c b/trunk/arch/sh/kernel/cpu/sh4/probe.c index 0fbbd50bc8ad..971cf0fce4f5 100644 --- a/trunk/arch/sh/kernel/cpu/sh4/probe.c +++ b/trunk/arch/sh/kernel/cpu/sh4/probe.c @@ -158,9 +158,6 @@ void __cpuinit cpu_probe(void) case 0x40: /* yon-ten-go */ boot_cpu_data.type = CPU_SH7372; break; - case 0xE0: /* 0x4E0 */ - boot_cpu_data.type = CPU_SH7734; /* SH7733/SH7734 */ - break; } break; diff --git a/trunk/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/trunk/arch/sh/kernel/cpu/sh4/setup-sh7750.c index 56b3bdc0b285..98cc0c794c76 100644 --- a/trunk/arch/sh/kernel/cpu/sh4/setup-sh7750.c +++ b/trunk/arch/sh/kernel/cpu/sh4/setup-sh7750.c @@ -43,7 +43,7 @@ static struct plat_sci_port sci_platform_data = { .scscr = SCSCR_TE | SCSCR_RE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCI, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xE40)), + .irqs = { 23, 23, 23, 0 }, .regshift = 2, }; @@ -61,7 +61,7 @@ static struct plat_sci_port scif_platform_data = { .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)), + .irqs = { 40, 40, 40, 40 }, }; static struct platform_device scif_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh4a/Makefile b/trunk/arch/sh/kernel/cpu/sh4a/Makefile index 8fc6ec2be2fa..0b22d108f4c5 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/Makefile +++ b/trunk/arch/sh/kernel/cpu/sh4a/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o serial-sh7722.o obj-$(CONFIG_CPU_SUBTYPE_SH7723) += setup-sh7723.o obj-$(CONFIG_CPU_SUBTYPE_SH7724) += setup-sh7724.o -obj-$(CONFIG_CPU_SUBTYPE_SH7734) += setup-sh7734.o obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o intc-shx3.o @@ -31,7 +30,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o -clock-$(CONFIG_CPU_SUBTYPE_SH7734) := clock-sh7734.o clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o @@ -39,7 +37,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o pinmux-$(CONFIG_CPU_SUBTYPE_SH7722) := pinmux-sh7722.o pinmux-$(CONFIG_CPU_SUBTYPE_SH7723) := pinmux-sh7723.o pinmux-$(CONFIG_CPU_SUBTYPE_SH7724) := pinmux-sh7724.o -pinmux-$(CONFIG_CPU_SUBTYPE_SH7734) := pinmux-sh7734.o pinmux-$(CONFIG_CPU_SUBTYPE_SH7757) := pinmux-sh7757.o pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o diff --git a/trunk/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/trunk/arch/sh/kernel/cpu/sh4a/clock-sh7734.c deleted file mode 100644 index 1697642c1f73..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh4a/clock-sh7734.c +++ /dev/null @@ -1,266 +0,0 @@ -/* - * arch/sh/kernel/cpu/sh4a/clock-sh7734.c - * - * Clock framework for SH7734 - * - * Copyright (C) 2011, 2012 Nobuhiro Iwamatsu - * Copyright (C) 2011, 2012 Renesas Solutions Corp. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include -#include -#include -#include -#include -#include -#include - -static struct clk extal_clk = { - .rate = 33333333, -}; - -#define MODEMR (0xFFCC0020) -#define MODEMR_MASK (0x6) -#define MODEMR_533MHZ (0x2) - -static unsigned long pll_recalc(struct clk *clk) -{ - int mode = 12; - u32 r = __raw_readl(MODEMR); - - if ((r & MODEMR_MASK) & MODEMR_533MHZ) - mode = 16; - - return clk->parent->rate * mode; -} - -static struct sh_clk_ops pll_clk_ops = { - .recalc = pll_recalc, -}; - -static struct clk pll_clk = { - .ops = &pll_clk_ops, - .parent = &extal_clk, - .flags = CLK_ENABLE_ON_INIT, -}; - -static struct clk *main_clks[] = { - &extal_clk, - &pll_clk, -}; - -static int multipliers[] = { 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; -static int divisors[] = { 1, 3, 2, 3, 4, 6, 8, 9, 12, 16, 18, 24 }; - -static struct clk_div_mult_table div4_div_mult_table = { - .divisors = divisors, - .nr_divisors = ARRAY_SIZE(divisors), - .multipliers = multipliers, - .nr_multipliers = ARRAY_SIZE(multipliers), -}; - -static struct clk_div4_table div4_table = { - .div_mult_table = &div4_div_mult_table, -}; - -enum { DIV4_I, DIV4_S, DIV4_B, DIV4_M, DIV4_S1, DIV4_P, DIV4_NR }; - -#define DIV4(_reg, _bit, _mask, _flags) \ - SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags) - -struct clk div4_clks[DIV4_NR] = { - [DIV4_I] = DIV4(FRQMR1, 28, 0x0003, CLK_ENABLE_ON_INIT), - [DIV4_S] = DIV4(FRQMR1, 20, 0x000C, CLK_ENABLE_ON_INIT), - [DIV4_B] = DIV4(FRQMR1, 16, 0x0140, CLK_ENABLE_ON_INIT), - [DIV4_M] = DIV4(FRQMR1, 12, 0x0004, CLK_ENABLE_ON_INIT), - [DIV4_S1] = DIV4(FRQMR1, 4, 0x0030, CLK_ENABLE_ON_INIT), - [DIV4_P] = DIV4(FRQMR1, 0, 0x0140, CLK_ENABLE_ON_INIT), -}; - -#define MSTPCR0 0xFFC80030 -#define MSTPCR1 0xFFC80034 -#define MSTPCR3 0xFFC8003C - -enum { - MSTP030, MSTP029, /* IIC */ - MSTP026, MSTP025, MSTP024, /* SCIF */ - MSTP023, - MSTP022, MSTP021, - MSTP019, /* HSCIF */ - MSTP016, MSTP015, MSTP014, /* TMU / TIMER */ - MSTP012, MSTP011, MSTP010, MSTP009, MSTP008, /* SSI */ - MSTP007, /* HSPI */ - MSTP115, /* ADMAC */ - MSTP114, /* GETHER */ - MSTP111, /* DMAC */ - MSTP109, /* VIDEOIN1 */ - MSTP108, /* VIDEOIN0 */ - MSTP107, /* RGPVBG */ - MSTP106, /* 2DG */ - MSTP103, /* VIEW */ - MSTP100, /* USB */ - MSTP331, /* MMC */ - MSTP330, /* MIMLB */ - MSTP323, /* SDHI0 */ - MSTP322, /* SDHI1 */ - MSTP321, /* SDHI2 */ - MSTP320, /* RQSPI */ - MSTP319, /* SRC0 */ - MSTP318, /* SRC1 */ - MSTP317, /* RSPI */ - MSTP316, /* RCAN0 */ - MSTP315, /* RCAN1 */ - MSTP314, /* FLTCL */ - MSTP313, /* ADC */ - MSTP312, /* MTU */ - MSTP304, /* IE-BUS */ - MSTP303, /* RTC */ - MSTP302, /* HIF */ - MSTP301, /* STIF0 */ - MSTP300, /* STIF1 */ - MSTP_NR }; - -static struct clk mstp_clks[MSTP_NR] = { - /* MSTPCR0 */ - [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), - [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0), - [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), - [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), - [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), - [MSTP023] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 23, 0), - [MSTP022] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 22, 0), - [MSTP021] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 21, 0), - [MSTP019] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 19, 0), - [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0), - [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), - [MSTP014] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 14, 0), - [MSTP012] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 12, 0), - [MSTP011] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 11, 0), - [MSTP010] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0), - [MSTP009] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0), - [MSTP008] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0), - [MSTP007] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0), - - /* MSTPCR1 */ - [MSTP115] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 15, 0), - [MSTP114] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 14, 0), - [MSTP111] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 11, 0), - [MSTP109] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0), - [MSTP108] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 8, 0), - [MSTP107] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 7, 0), - [MSTP106] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 6, 0), - [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 3, 0), - [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), - - /* MSTPCR3 */ - [MSTP331] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 31, 0), - [MSTP330] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 30, 0), - [MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 23, 0), - [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), - [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), - [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), - [MSTP319] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 19, 0), - [MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 18, 0), - [MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 17, 0), - [MSTP316] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 16, 0), - [MSTP315] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 15, 0), - [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 14, 0), - [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 13, 0), - [MSTP312] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 12, 0), - [MSTP304] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 4, 0), - [MSTP303] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 3, 0), - [MSTP302] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 2, 0), - [MSTP301] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 1, 0), - [MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 0, 0), -}; - -static struct clk_lookup lookups[] = { - /* main clocks */ - CLKDEV_CON_ID("extal", &extal_clk), - CLKDEV_CON_ID("pll_clk", &pll_clk), - - /* clocks */ - CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), - CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_S]), - CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_M]), - CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]), - CLKDEV_CON_ID("shyway_clk1", &div4_clks[DIV4_S1]), - CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), - - /* MSTP32 clocks */ - CLKDEV_DEV_ID("i2c-sh7734.0", &mstp_clks[MSTP030]), - CLKDEV_DEV_ID("i2c-sh7734.1", &mstp_clks[MSTP029]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP026]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP025]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP024]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP023]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP022]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP021]), - CLKDEV_CON_ID("hscif", &mstp_clks[MSTP019]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP016]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP016]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP016]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP015]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP015]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP015]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &mstp_clks[MSTP014]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &mstp_clks[MSTP014]), - CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &mstp_clks[MSTP014]), - CLKDEV_CON_ID("ssi0", &mstp_clks[MSTP012]), - CLKDEV_CON_ID("ssi1", &mstp_clks[MSTP011]), - CLKDEV_CON_ID("ssi2", &mstp_clks[MSTP010]), - CLKDEV_CON_ID("ssi3", &mstp_clks[MSTP009]), - CLKDEV_CON_ID("sss", &mstp_clks[MSTP008]), - CLKDEV_CON_ID("hspi", &mstp_clks[MSTP007]), - CLKDEV_CON_ID("usb_fck", &mstp_clks[MSTP100]), - CLKDEV_CON_ID("videoin0", &mstp_clks[MSTP109]), - CLKDEV_CON_ID("videoin1", &mstp_clks[MSTP108]), - CLKDEV_CON_ID("rgpvg", &mstp_clks[MSTP107]), - CLKDEV_CON_ID("2dg", &mstp_clks[MSTP106]), - CLKDEV_CON_ID("view", &mstp_clks[MSTP103]), - - CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP331]), - CLKDEV_CON_ID("mimlb0", &mstp_clks[MSTP330]), - CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP323]), - CLKDEV_CON_ID("sdhi1", &mstp_clks[MSTP322]), - CLKDEV_CON_ID("sdhi2", &mstp_clks[MSTP321]), - CLKDEV_CON_ID("rqspi0", &mstp_clks[MSTP320]), - CLKDEV_CON_ID("src0", &mstp_clks[MSTP319]), - CLKDEV_CON_ID("src1", &mstp_clks[MSTP318]), - CLKDEV_CON_ID("rsp0", &mstp_clks[MSTP317]), - CLKDEV_CON_ID("rcan0", &mstp_clks[MSTP316]), - CLKDEV_CON_ID("rcan1", &mstp_clks[MSTP315]), - CLKDEV_CON_ID("fltcl0", &mstp_clks[MSTP314]), - CLKDEV_CON_ID("adc0", &mstp_clks[MSTP313]), - CLKDEV_CON_ID("mtu0", &mstp_clks[MSTP312]), - CLKDEV_CON_ID("iebus0", &mstp_clks[MSTP304]), - CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[MSTP114]), - CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP303]), - CLKDEV_CON_ID("hif0", &mstp_clks[MSTP302]), - CLKDEV_CON_ID("stif0", &mstp_clks[MSTP301]), - CLKDEV_CON_ID("stif1", &mstp_clks[MSTP300]), -}; - -int __init arch_clk_init(void) -{ - int i, ret = 0; - - for (i = 0; i < ARRAY_SIZE(main_clks); i++) - ret |= clk_register(main_clks[i]); - - for (i = 0; i < ARRAY_SIZE(lookups); i++) - clkdev_add(&lookups[i]); - - if (!ret) - ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), - &div4_table); - - if (!ret) - ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); - - return ret; -} diff --git a/trunk/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c b/trunk/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c deleted file mode 100644 index eed3b9d19d38..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c +++ /dev/null @@ -1,2497 +0,0 @@ -/* - * SH7734 processor support - PFC hardware block - * - * Copyright (C) 2012 Renesas Solutions Corp. - * Copyright (C) 2012 Nobuhiro Iwamatsu - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include - -#define CPU_32_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_1(fn, pfx##31, sfx) - -#define CPU_32_PORT5(fn, pfx, sfx) \ - PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \ - PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \ - PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \ - PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \ - PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx), \ - PORT_1(fn, pfx##10, sfx), PORT_1(fn, pfx##11, sfx) - -/* GPSR0 - GPSR5 */ -#define CPU_ALL_PORT(fn, pfx, sfx) \ - CPU_32_PORT(fn, pfx##_0_, sfx), \ - CPU_32_PORT(fn, pfx##_1_, sfx), \ - CPU_32_PORT(fn, pfx##_2_, sfx), \ - CPU_32_PORT(fn, pfx##_3_, sfx), \ - CPU_32_PORT(fn, pfx##_4_, sfx), \ - CPU_32_PORT5(fn, pfx##_5_, sfx) - -#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) -#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ - GP##pfx##_IN, GP##pfx##_OUT) - -#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT -#define _GP_INDT(pfx, sfx) GP##pfx##_DATA - -#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) -#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) - -#define PORT_10_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ - PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ - PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ - PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ - PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) - -#define CPU_32_PORT_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ - PORT_10_REV(fn, pfx, sfx) - -#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) -#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) - -#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) -#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ - FN_##ipsr, FN_##fn) - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - GP_ALL(DATA), /* GP_0_0_DATA -> GP_5_11_DATA */ - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - GP_ALL(IN), /* GP_0_0_IN -> GP_5_11_IN */ - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - GP_ALL(OUT), /* GP_0_0_OUT -> GP_5_11_OUT */ - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - GP_ALL(FN), /* GP_0_0_FN -> GP_5_11_FN */ - - /* GPSR0 */ - FN_IP1_9_8, FN_IP1_11_10, FN_IP1_13_12, FN_IP1_15_14, - FN_IP0_7_6, FN_IP0_9_8, FN_IP0_11_10, FN_IP0_13_12, - FN_IP0_15_14, FN_IP0_17_16, FN_IP0_19_18, FN_IP0_21_20, - FN_IP0_23_22, FN_IP0_25_24, FN_IP0_27_26, FN_IP0_29_28, - FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, - FN_IP1_7_6, FN_IP11_28, FN_IP0_1_0, FN_IP0_3_2, - FN_IP0_5_4, FN_IP1_17_16, FN_IP1_19_18, FN_IP1_22_20, - FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, - - /* GPSR1 */ - FN_IP3_20, FN_IP3_29_27, FN_IP11_20_19, FN_IP11_22_21, - FN_IP2_16_14, FN_IP2_19_17, FN_IP2_22_20, FN_IP2_24_23, - FN_IP2_27_25, FN_IP2_30_28, FN_IP3_1_0, FN_CLKOUT, - FN_BS, FN_CS0, FN_IP3_2, FN_EX_CS0, - FN_IP3_5_3, FN_IP3_8_6, FN_IP3_11_9, FN_IP3_14_12, - FN_IP3_17_15, FN_RD, FN_IP3_19_18, FN_WE0, - FN_WE1, FN_IP2_4_3, FN_IP3_23_21, FN_IP3_26_24, - FN_IP2_7_5, FN_IP2_10_8, FN_IP2_13_11, FN_IP11_25_23, - - /* GPSR2 */ - FN_IP11_6_4, FN_IP11_9_7, FN_IP11_11_10, FN_IP4_2_0, - FN_IP8_29_28, FN_IP11_27_26, FN_IP8_22_20, FN_IP8_25_23, - FN_IP11_12, FN_IP8_27_26, FN_IP4_5_3, FN_IP4_8_6, - FN_IP4_11_9, FN_IP4_14_12, FN_IP4_17_15, FN_IP4_19_18, - FN_IP4_21_20, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26, - FN_IP4_29_28, FN_IP4_31_30, FN_IP5_2_0, FN_IP5_5_3, - FN_IP5_8_6, FN_IP5_11_9, FN_IP5_14_12, FN_IP5_17_15, - FN_IP5_20_18, FN_IP5_22_21, FN_IP5_24_23, FN_IP5_26_25, - - /* GPSR3 */ - FN_IP6_2_0, FN_IP6_5_3, FN_IP6_7_6, FN_IP6_9_8, - FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, FN_IP6_17_16, - FN_IP6_20_18, FN_IP6_23_21, FN_IP7_2_0, FN_IP7_5_3, - FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, - FN_IP7_20_18, FN_IP7_23_21, FN_IP7_26_24, FN_IP7_28_27, - FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4, - FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, - FN_IP8_15_14, FN_IP8_17_16, FN_IP8_19_18, FN_IP9_1_0, - - /* GPSR4 */ - FN_IP9_19_18, FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, - FN_IP9_11_10, FN_IP9_13_12, FN_IP9_15_14, FN_IP9_17_16, - FN_IP9_3_2, FN_IP9_5_4, FN_IP9_7_6, FN_IP9_9_8, - FN_IP9_27_26, FN_IP9_29_28, FN_IP10_2_0, FN_IP10_5_3, - FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_15, - FN_IP10_18_16, FN_IP10_21_19, FN_IP11_0, FN_IP11_1, - FN_SCL0, FN_IP11_2, FN_PENC0, FN_IP11_15_13, /* Need check*/ - FN_USB_OVC0, FN_IP11_18_16, - FN_IP10_22, FN_IP10_24_23, - - /* GPSR5 */ - FN_IP10_25, FN_IP11_3, FN_IRQ2_B, FN_IRQ3_B, - FN_IP10_27_26, /* 10 */ - FN_IP10_29_28, /* 11 */ - - /* IPSR0 */ - FN_A15, FN_ST0_VCO_CLKIN, FN_LCD_DATA15_A, FN_TIOC3D_C, - FN_A14, FN_LCD_DATA14_A, FN_TIOC3C_C, - FN_A13, FN_LCD_DATA13_A, FN_TIOC3B_C, - FN_A12, FN_LCD_DATA12_A, FN_TIOC3A_C, - FN_A11, FN_ST0_D7, FN_LCD_DATA11_A, FN_TIOC2B_C, - FN_A10, FN_ST0_D6, FN_LCD_DATA10_A, FN_TIOC2A_C, - FN_A9, FN_ST0_D5, FN_LCD_DATA9_A, FN_TIOC1B_C, - FN_A8, FN_ST0_D4, FN_LCD_DATA8_A, FN_TIOC1A_C, - FN_A7, FN_ST0_D3, FN_LCD_DATA7_A, FN_TIOC0D_C, - FN_A6, FN_ST0_D2, FN_LCD_DATA6_A, FN_TIOC0C_C, - FN_A5, FN_ST0_D1, FN_LCD_DATA5_A, FN_TIOC0B_C, - FN_A4, FN_ST0_D0, FN_LCD_DATA4_A, FN_TIOC0A_C, - FN_A3, FN_ST0_VLD, FN_LCD_DATA3_A, FN_TCLKD_C, - FN_A2, FN_ST0_SYC, FN_LCD_DATA2_A, FN_TCLKC_C, - FN_A1, FN_ST0_REQ, FN_LCD_DATA1_A, FN_TCLKB_C, - FN_A0, FN_ST0_CLKIN, FN_LCD_DATA0_A, FN_TCLKA_C, - - /* IPSR1 */ - FN_D3, FN_SD0_DAT3_A, FN_MMC_D3_A, FN_ST1_D6, FN_FD3_A, - FN_D2, FN_SD0_DAT2_A, FN_MMC_D2_A, FN_ST1_D5, FN_FD2_A, - FN_D1, FN_SD0_DAT1_A, FN_MMC_D1_A, FN_ST1_D4, FN_FD1_A, - FN_D0, FN_SD0_DAT0_A, FN_MMC_D0_A, FN_ST1_D3, FN_FD0_A, - FN_A25, FN_TX2_D, FN_ST1_D2, - FN_A24, FN_RX2_D, FN_ST1_D1, - FN_A23, FN_ST1_D0, FN_LCD_M_DISP_A, - FN_A22, FN_ST1_VLD, FN_LCD_VEPWC_A, - FN_A21, FN_ST1_SYC, FN_LCD_VCPWC_A, - FN_A20, FN_ST1_REQ, FN_LCD_FLM_A, - FN_A19, FN_ST1_CLKIN, FN_LCD_CLK_A, FN_TIOC4D_C, - FN_A18, FN_ST1_PWM, FN_LCD_CL2_A, FN_TIOC4C_C, - FN_A17, FN_ST1_VCO_CLKIN, FN_LCD_CL1_A, FN_TIOC4B_C, - FN_A16, FN_ST0_PWM, FN_LCD_DON_A, FN_TIOC4A_C, - - /* IPSR2 */ - FN_D14, FN_TX2_B, FN_FSE_A, FN_ET0_TX_CLK_B, - FN_D13, FN_RX2_B, FN_FRB_A, FN_ET0_ETXD6_B, - FN_D12, FN_FWE_A, FN_ET0_ETXD5_B, - FN_D11, FN_RSPI_MISO_A, FN_QMI_QIO1_A, FN_FRE_A, - FN_ET0_ETXD3_B, - FN_D10, FN_RSPI_MOSI_A, FN_QMO_QIO0_A, FN_FALE_A, - FN_ET0_ETXD2_B, - FN_D9, FN_SD0_CMD_A, FN_MMC_CMD_A, FN_QIO3_A, FN_FCLE_A, - FN_ET0_ETXD1_B, - FN_D8, FN_SD0_CLK_A, FN_MMC_CLK_A, FN_QIO2_A, FN_FCE_A, - FN_ET0_GTX_CLK_B, - FN_D7, FN_RSPI_SSL_A, FN_MMC_D7_A, FN_QSSL_A, FN_FD7_A, - FN_D6, FN_RSPI_RSPCK_A, FN_MMC_D6_A, FN_QSPCLK_A, FN_FD6_A, - FN_D5, FN_SD0_WP_A, FN_MMC_D5_A, FN_FD5_A, - FN_D4, FN_SD0_CD_A, FN_MMC_D4_A, FN_ST1_D7, FN_FD4_A, - - /* IPSR3 */ - FN_DRACK0, FN_SD1_DAT2_A, FN_ATAG, FN_TCLK1_A, FN_ET0_ETXD7, - FN_EX_WAIT2, FN_SD1_DAT1_A, FN_DACK2, FN_CAN1_RX_C, - FN_ET0_MAGIC_C, FN_ET0_ETXD6_A, - FN_EX_WAIT1, FN_SD1_DAT0_A, FN_DREQ2, FN_CAN1_TX_C, - FN_ET0_LINK_C, FN_ET0_ETXD5_A, - FN_EX_WAIT0, FN_TCLK1_B, - FN_RD_WR, FN_TCLK0, FN_CAN_CLK_B, FN_ET0_ETXD4, - FN_EX_CS5, FN_SD1_CMD_A, FN_ATADIR, FN_QSSL_B, FN_ET0_ETXD3_A, - FN_EX_CS4, FN_SD1_WP_A, FN_ATAWR, FN_QMI_QIO1_B, FN_ET0_ETXD2_A, - FN_EX_CS3, FN_SD1_CD_A, FN_ATARD, FN_QMO_QIO0_B, FN_ET0_ETXD1_A, - FN_EX_CS2, FN_TX3_B, FN_ATACS1, FN_QSPCLK_B, FN_ET0_GTX_CLK_A, - FN_EX_CS1, FN_RX3_B, FN_ATACS0, FN_QIO2_B, FN_ET0_ETXD0, - FN_CS1_A26, FN_QIO3_B, - FN_D15, FN_SCK2_B, - - /* IPSR4 */ - FN_SCK2_A, FN_VI0_G3, - FN_RTS1_B, FN_VI0_G2, - FN_CTS1_B, FN_VI0_DATA7_VI0_G1, - FN_TX1_B, FN_VI0_DATA6_VI0_G0, FN_ET0_PHY_INT_A, - FN_RX1_B, FN_VI0_DATA5_VI0_B5, FN_ET0_MAGIC_A, - FN_SCK1_B, FN_VI0_DATA4_VI0_B4, FN_ET0_LINK_A, - FN_RTS0_B, FN_VI0_DATA3_VI0_B3, FN_ET0_MDIO_A, - FN_CTS0_B, FN_VI0_DATA2_VI0_B2, FN_RMII0_MDIO_A, FN_ET0_MDC, - FN_HTX0_A, FN_TX1_A, FN_VI0_DATA1_VI0_B1, FN_RMII0_MDC_A, FN_ET0_COL, - FN_HRX0_A, FN_RX1_A, FN_VI0_DATA0_VI0_B0, FN_RMII0_CRS_DV_A, FN_ET0_CRS, - FN_HSCK0_A, FN_SCK1_A, FN_VI0_VSYNC, FN_RMII0_RX_ER_A, FN_ET0_RX_ER, - FN_HRTS0_A, FN_RTS1_A, FN_VI0_HSYNC, FN_RMII0_TXD_EN_A, FN_ET0_RX_DV, - FN_HCTS0_A, FN_CTS1_A, FN_VI0_FIELD, FN_RMII0_RXD1_A, FN_ET0_ERXD7, - - /* IPSR5 */ - FN_SD2_CLK_A, FN_RX2_A, FN_VI0_G4, FN_ET0_RX_CLK_B, - FN_SD2_CMD_A, FN_TX2_A, FN_VI0_G5, FN_ET0_ERXD2_B, - FN_SD2_DAT0_A, FN_RX3_A, FN_VI0_R0, FN_ET0_ERXD3_B, - FN_SD2_DAT1_A, FN_TX3_A, FN_VI0_R1, FN_ET0_MDIO_B, - FN_SD2_DAT2_A, FN_RX4_A, FN_VI0_R2, FN_ET0_LINK_B, - FN_SD2_DAT3_A, FN_TX4_A, FN_VI0_R3, FN_ET0_MAGIC_B, - FN_SD2_CD_A, FN_RX5_A, FN_VI0_R4, FN_ET0_PHY_INT_B, - FN_SD2_WP_A, FN_TX5_A, FN_VI0_R5, - FN_REF125CK, FN_ADTRG, FN_RX5_C, - FN_REF50CK, FN_CTS1_E, FN_HCTS0_D, - - /* IPSR6 */ - FN_DU0_DR0, FN_SCIF_CLK_B, FN_HRX0_D, FN_IETX_A, FN_TCLKA_A, FN_HIFD00, - FN_DU0_DR1, FN_SCK0_B, FN_HTX0_D, FN_IERX_A, FN_TCLKB_A, FN_HIFD01, - FN_DU0_DR2, FN_RX0_B, FN_TCLKC_A, FN_HIFD02, - FN_DU0_DR3, FN_TX0_B, FN_TCLKD_A, FN_HIFD03, - FN_DU0_DR4, FN_CTS0_C, FN_TIOC0A_A, FN_HIFD04, - FN_DU0_DR5, FN_RTS0_C, FN_TIOC0B_A, FN_HIFD05, - FN_DU0_DR6, FN_SCK1_C, FN_TIOC0C_A, FN_HIFD06, - FN_DU0_DR7, FN_RX1_C, FN_TIOC0D_A, FN_HIFD07, - FN_DU0_DG0, FN_TX1_C, FN_HSCK0_D, FN_IECLK_A, FN_TIOC1A_A, FN_HIFD08, - FN_DU0_DG1, FN_CTS1_C, FN_HRTS0_D, FN_TIOC1B_A, FN_HIFD09, - - /* IPSR7 */ - FN_DU0_DG2, FN_RTS1_C, FN_RMII0_MDC_B, FN_TIOC2A_A, FN_HIFD10, - FN_DU0_DG3, FN_SCK2_C, FN_RMII0_MDIO_B, FN_TIOC2B_A, FN_HIFD11, - FN_DU0_DG4, FN_RX2_C, FN_RMII0_CRS_DV_B, FN_TIOC3A_A, FN_HIFD12, - FN_DU0_DG5, FN_TX2_C, FN_RMII0_RX_ER_B, FN_TIOC3B_A, FN_HIFD13, - FN_DU0_DG6, FN_RX3_C, FN_RMII0_RXD0_B, FN_TIOC3C_A, FN_HIFD14, - FN_DU0_DG7, FN_TX3_C, FN_RMII0_RXD1_B, FN_TIOC3D_A, FN_HIFD15, - FN_DU0_DB0, FN_RX4_C, FN_RMII0_TXD_EN_B, FN_TIOC4A_A, FN_HIFCS, - FN_DU0_DB1, FN_TX4_C, FN_RMII0_TXD0_B, FN_TIOC4B_A, FN_HIFRS, - FN_DU0_DB2, FN_RX5_B, FN_RMII0_TXD1_B, FN_TIOC4C_A, FN_HIFWR, - FN_DU0_DB3, FN_TX5_B, FN_TIOC4D_A, FN_HIFRD, - FN_DU0_DB4, FN_HIFINT, - - /* IPSR8 */ - FN_DU0_DB5, FN_HIFDREQ, - FN_DU0_DB6, FN_HIFRDY, - FN_DU0_DB7, FN_SSI_SCK0_B, FN_HIFEBL_B, - FN_DU0_DOTCLKIN, FN_HSPI_CS0_C, FN_SSI_WS0_B, - FN_DU0_DOTCLKOUT, FN_HSPI_CLK0_C, FN_SSI_SDATA0_B, - FN_DU0_EXHSYNC_DU0_HSYNC, FN_HSPI_TX0_C, FN_SSI_SCK1_B, - FN_DU0_EXVSYNC_DU0_VSYNC, FN_HSPI_RX0_C, FN_SSI_WS1_B, - FN_DU0_EXODDF_DU0_ODDF, FN_CAN0_RX_B, FN_HSCK0_B, FN_SSI_SDATA1_B, - FN_DU0_DISP, FN_CAN0_TX_B, FN_HRX0_B, FN_AUDIO_CLKA_B, - FN_DU0_CDE, FN_HTX0_B, FN_AUDIO_CLKB_B, FN_LCD_VCPWC_B, - FN_IRQ0_A, FN_HSPI_TX_B, FN_RX3_E, FN_ET0_ERXD0, - FN_IRQ1_A, FN_HSPI_RX_B, FN_TX3_E, FN_ET0_ERXD1, - FN_IRQ2_A, FN_CTS0_A, FN_HCTS0_B, FN_ET0_ERXD2_A, - FN_IRQ3_A, FN_RTS0_A, FN_HRTS0_B, FN_ET0_ERXD3_A, - - /* IPSR9 */ - FN_VI1_CLK_A, FN_FD0_B, FN_LCD_DATA0_B, - FN_VI1_0_A, FN_FD1_B, FN_LCD_DATA1_B, - FN_VI1_1_A, FN_FD2_B, FN_LCD_DATA2_B, - FN_VI1_2_A, FN_FD3_B, FN_LCD_DATA3_B, - FN_VI1_3_A, FN_FD4_B, FN_LCD_DATA4_B, - FN_VI1_4_A, FN_FD5_B, FN_LCD_DATA5_B, - FN_VI1_5_A, FN_FD6_B, FN_LCD_DATA6_B, - FN_VI1_6_A, FN_FD7_B, FN_LCD_DATA7_B, - FN_VI1_7_A, FN_FCE_B, FN_LCD_DATA8_B, - FN_SSI_SCK0_A, FN_TIOC1A_B, FN_LCD_DATA9_B, - FN_SSI_WS0_A, FN_TIOC1B_B, FN_LCD_DATA10_B, - FN_SSI_SDATA0_A, FN_VI1_0_B, FN_TIOC2A_B, FN_LCD_DATA11_B, - FN_SSI_SCK1_A, FN_VI1_1_B, FN_TIOC2B_B, FN_LCD_DATA12_B, - FN_SSI_WS1_A, FN_VI1_2_B, FN_LCD_DATA13_B, - FN_SSI_SDATA1_A, FN_VI1_3_B, FN_LCD_DATA14_B, - - /* IPSR10 */ - FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B, FN_LCD_DATA15_B, - FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B, FN_LCD_DON_B, - FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B, FN_LCD_CL1_B, - FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B, FN_LCD_CL2_B, - FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B, FN_LCD_FLM_B, - FN_AUDIO_CLKB_A, FN_LCD_CLK_B, - FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B, FN_LCD_VEPWC_B, - FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B, FN_LCD_M_DISP_B, - FN_CAN_CLK_A, FN_RX4_D, - FN_CAN0_TX_A, FN_TX4_D, FN_MLB_CLK, - FN_CAN1_RX_A, FN_IRQ1_B, - FN_CAN0_RX_A, FN_IRQ0_B, FN_MLB_SIG, - FN_CAN1_TX_A, FN_TX5_C, FN_MLB_DAT, - - /* IPSR11 */ - FN_SCL1, FN_SCIF_CLK_C, - FN_SDA1, FN_RX1_E, - FN_SDA0, FN_HIFEBL_A, - FN_SDSELF, FN_RTS1_E, - FN_SCIF_CLK_A, FN_HSPI_CLK_A, FN_VI0_CLK, FN_RMII0_TXD0_A, FN_ET0_ERXD4, - FN_SCK0_A, FN_HSPI_CS_A, FN_VI0_CLKENB, FN_RMII0_TXD1_A, FN_ET0_ERXD5, - FN_RX0_A, FN_HSPI_RX_A, FN_RMII0_RXD0_A, FN_ET0_ERXD6, - FN_TX0_A, FN_HSPI_TX_A, - FN_PENC1, FN_TX3_D, FN_CAN1_TX_B, FN_TX5_D, FN_IETX_B, - FN_USB_OVC1, FN_RX3_D, FN_CAN1_RX_B, FN_RX5_D, FN_IERX_B, - FN_DREQ0, FN_SD1_CLK_A, FN_ET0_TX_EN, - FN_DACK0, FN_SD1_DAT3_A, FN_ET0_TX_ER, - FN_DREQ1, FN_HSPI_CLK_B, FN_RX4_B, FN_ET0_PHY_INT_C, FN_ET0_TX_CLK_A, - FN_DACK1, FN_HSPI_CS_B, FN_TX4_B, FN_ET0_RX_CLK_A, - FN_PRESETOUT, FN_ST_CLKOUT, - - /* MOD_SEL1 */ - FN_SEL_IEBUS_0, FN_SEL_IEBUS_1, - FN_SEL_RQSPI_0, FN_SEL_RQSPI_1, - FN_SEL_VIN1_0, FN_SEL_VIN1_1, - FN_SEL_HIF_0, FN_SEL_HIF_1, - FN_SEL_RSPI_0, FN_SEL_RSPI_1, - FN_SEL_LCDC_0, FN_SEL_LCDC_1, - FN_SEL_ET0_CTL_0, FN_SEL_ET0_CTL_1, FN_SEL_ET0_CTL_2, - FN_SEL_ET0_0, FN_SEL_ET0_1, - FN_SEL_RMII_0, FN_SEL_RMII_1, - FN_SEL_TMU_0, FN_SEL_TMU_1, - FN_SEL_HSPI_0, FN_SEL_HSPI_1, FN_SEL_HSPI_2, - FN_SEL_HSCIF_0, FN_SEL_HSCIF_1, FN_SEL_HSCIF_2, FN_SEL_HSCIF_3, - FN_SEL_RCAN_CLK_0, FN_SEL_RCAN_CLK_1, - FN_SEL_RCAN1_0, FN_SEL_RCAN1_1, FN_SEL_RCAN1_2, - FN_SEL_RCAN0_0, FN_SEL_RCAN0_1, - FN_SEL_SDHI2_0, FN_SEL_SDHI2_1, - FN_SEL_SDHI1_0, FN_SEL_SDHI1_1, - FN_SEL_SDHI0_0, FN_SEL_SDHI0_1, - FN_SEL_SSI1_0, FN_SEL_SSI1_1, - FN_SEL_SSI0_0, FN_SEL_SSI0_1, - FN_SEL_AUDIO_CLKB_0, FN_SEL_AUDIO_CLKB_1, - FN_SEL_AUDIO_CLKA_0, FN_SEL_AUDIO_CLKA_1, - FN_SEL_FLCTL_0, FN_SEL_FLCTL_1, - FN_SEL_MMC_0, FN_SEL_MMC_1, - FN_SEL_INTC_0, FN_SEL_INTC_1, - - /* MOD_SEL2 */ - FN_SEL_MTU2_CLK_0, FN_SEL_MTU2_CLK_1, - FN_SEL_MTU2_CH4_0, FN_SEL_MTU2_CH4_1, - FN_SEL_MTU2_CH3_0, FN_SEL_MTU2_CH3_1, - FN_SEL_MTU2_CH2_0, FN_SEL_MTU2_CH2_1, FN_SEL_MTU2_CH2_2, - FN_SEL_MTU2_CH1_0, FN_SEL_MTU2_CH1_1, FN_SEL_MTU2_CH1_2, - FN_SEL_MTU2_CH0_0, FN_SEL_MTU2_CH0_1, - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, - FN_SEL_SCIF5_2, FN_SEL_SCIF5_3, - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, - FN_SEL_SCIF4_2, FN_SEL_SCIF4_3, - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, - FN_SEL_SCIF3_3, FN_SEL_SCIF3_4, - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, - FN_SEL_SCIF2_3, - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, - FN_SEL_SCIF1_3, FN_SEL_SCIF1_4, - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, - FN_SEL_SCIF_CLK_0, FN_SEL_SCIF_CLK_1, FN_SEL_SCIF_CLK_2, - - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - - CLKOUT_MARK, BS_MARK, CS0_MARK, EX_CS0_MARK, RD_MARK, - WE0_MARK, WE1_MARK, - - SCL0_MARK, PENC0_MARK, USB_OVC0_MARK, - - IRQ2_B_MARK, IRQ3_B_MARK, - - /* IPSR0 */ - A15_MARK, ST0_VCO_CLKIN_MARK, LCD_DATA15_A_MARK, TIOC3D_C_MARK, - A14_MARK, LCD_DATA14_A_MARK, TIOC3C_C_MARK, - A13_MARK, LCD_DATA13_A_MARK, TIOC3B_C_MARK, - A12_MARK, LCD_DATA12_A_MARK, TIOC3A_C_MARK, - A11_MARK, ST0_D7_MARK, LCD_DATA11_A_MARK, TIOC2B_C_MARK, - A10_MARK, ST0_D6_MARK, LCD_DATA10_A_MARK, TIOC2A_C_MARK, - A9_MARK, ST0_D5_MARK, LCD_DATA9_A_MARK, TIOC1B_C_MARK, - A8_MARK, ST0_D4_MARK, LCD_DATA8_A_MARK, TIOC1A_C_MARK, - A7_MARK, ST0_D3_MARK, LCD_DATA7_A_MARK, TIOC0D_C_MARK, - A6_MARK, ST0_D2_MARK, LCD_DATA6_A_MARK, TIOC0C_C_MARK, - A5_MARK, ST0_D1_MARK, LCD_DATA5_A_MARK, TIOC0B_C_MARK, - A4_MARK, ST0_D0_MARK, LCD_DATA4_A_MARK, TIOC0A_C_MARK, - A3_MARK, ST0_VLD_MARK, LCD_DATA3_A_MARK, TCLKD_C_MARK, - A2_MARK, ST0_SYC_MARK, LCD_DATA2_A_MARK, TCLKC_C_MARK, - A1_MARK, ST0_REQ_MARK, LCD_DATA1_A_MARK, TCLKB_C_MARK, - A0_MARK, ST0_CLKIN_MARK, LCD_DATA0_A_MARK, TCLKA_C_MARK, - - /* IPSR1 */ - D3_MARK, SD0_DAT3_A_MARK, MMC_D3_A_MARK, ST1_D6_MARK, FD3_A_MARK, - D2_MARK, SD0_DAT2_A_MARK, MMC_D2_A_MARK, ST1_D5_MARK, FD2_A_MARK, - D1_MARK, SD0_DAT1_A_MARK, MMC_D1_A_MARK, ST1_D4_MARK, FD1_A_MARK, - D0_MARK, SD0_DAT0_A_MARK, MMC_D0_A_MARK, ST1_D3_MARK, FD0_A_MARK, - A25_MARK, TX2_D_MARK, ST1_D2_MARK, - A24_MARK, RX2_D_MARK, ST1_D1_MARK, - A23_MARK, ST1_D0_MARK, LCD_M_DISP_A_MARK, - A22_MARK, ST1_VLD_MARK, LCD_VEPWC_A_MARK, - A21_MARK, ST1_SYC_MARK, LCD_VCPWC_A_MARK, - A20_MARK, ST1_REQ_MARK, LCD_FLM_A_MARK, - A19_MARK, ST1_CLKIN_MARK, LCD_CLK_A_MARK, TIOC4D_C_MARK, - A18_MARK, ST1_PWM_MARK, LCD_CL2_A_MARK, TIOC4C_C_MARK, - A17_MARK, ST1_VCO_CLKIN_MARK, LCD_CL1_A_MARK, TIOC4B_C_MARK, - A16_MARK, ST0_PWM_MARK, LCD_DON_A_MARK, TIOC4A_C_MARK, - - /* IPSR2 */ - D14_MARK, TX2_B_MARK, FSE_A_MARK, ET0_TX_CLK_B_MARK, - D13_MARK, RX2_B_MARK, FRB_A_MARK, ET0_ETXD6_B_MARK, - D12_MARK, FWE_A_MARK, ET0_ETXD5_B_MARK, - D11_MARK, RSPI_MISO_A_MARK, QMI_QIO1_A_MARK, FRE_A_MARK, - ET0_ETXD3_B_MARK, - D10_MARK, RSPI_MOSI_A_MARK, QMO_QIO0_A_MARK, FALE_A_MARK, - ET0_ETXD2_B_MARK, - D9_MARK, SD0_CMD_A_MARK, MMC_CMD_A_MARK, QIO3_A_MARK, - FCLE_A_MARK, ET0_ETXD1_B_MARK, - D8_MARK, SD0_CLK_A_MARK, MMC_CLK_A_MARK, QIO2_A_MARK, - FCE_A_MARK, ET0_GTX_CLK_B_MARK, - D7_MARK, RSPI_SSL_A_MARK, MMC_D7_A_MARK, QSSL_A_MARK, - FD7_A_MARK, - D6_MARK, RSPI_RSPCK_A_MARK, MMC_D6_A_MARK, QSPCLK_A_MARK, - FD6_A_MARK, - D5_MARK, SD0_WP_A_MARK, MMC_D5_A_MARK, FD5_A_MARK, - D4_MARK, SD0_CD_A_MARK, MMC_D4_A_MARK, ST1_D7_MARK, - FD4_A_MARK, - - /* IPSR3 */ - DRACK0_MARK, SD1_DAT2_A_MARK, ATAG_MARK, TCLK1_A_MARK, ET0_ETXD7_MARK, - EX_WAIT2_MARK, SD1_DAT1_A_MARK, DACK2_MARK, CAN1_RX_C_MARK, - ET0_MAGIC_C_MARK, ET0_ETXD6_A_MARK, - EX_WAIT1_MARK, SD1_DAT0_A_MARK, DREQ2_MARK, CAN1_TX_C_MARK, - ET0_LINK_C_MARK, ET0_ETXD5_A_MARK, - EX_WAIT0_MARK, TCLK1_B_MARK, - RD_WR_MARK, TCLK0_MARK, CAN_CLK_B_MARK, ET0_ETXD4_MARK, - EX_CS5_MARK, SD1_CMD_A_MARK, ATADIR_MARK, QSSL_B_MARK, - ET0_ETXD3_A_MARK, - EX_CS4_MARK, SD1_WP_A_MARK, ATAWR_MARK, QMI_QIO1_B_MARK, - ET0_ETXD2_A_MARK, - EX_CS3_MARK, SD1_CD_A_MARK, ATARD_MARK, QMO_QIO0_B_MARK, - ET0_ETXD1_A_MARK, - EX_CS2_MARK, TX3_B_MARK, ATACS1_MARK, QSPCLK_B_MARK, - ET0_GTX_CLK_A_MARK, - EX_CS1_MARK, RX3_B_MARK, ATACS0_MARK, QIO2_B_MARK, - ET0_ETXD0_MARK, - CS1_A26_MARK, QIO3_B_MARK, - D15_MARK, SCK2_B_MARK, - - /* IPSR4 */ - SCK2_A_MARK, VI0_G3_MARK, - RTS1_B_MARK, VI0_G2_MARK, - CTS1_B_MARK, VI0_DATA7_VI0_G1_MARK, - TX1_B_MARK, VI0_DATA6_VI0_G0_MARK, ET0_PHY_INT_A_MARK, - RX1_B_MARK, VI0_DATA5_VI0_B5_MARK, ET0_MAGIC_A_MARK, - SCK1_B_MARK, VI0_DATA4_VI0_B4_MARK, ET0_LINK_A_MARK, - RTS0_B_MARK, VI0_DATA3_VI0_B3_MARK, ET0_MDIO_A_MARK, - CTS0_B_MARK, VI0_DATA2_VI0_B2_MARK, RMII0_MDIO_A_MARK, - ET0_MDC_MARK, - HTX0_A_MARK, TX1_A_MARK, VI0_DATA1_VI0_B1_MARK, - RMII0_MDC_A_MARK, ET0_COL_MARK, - HRX0_A_MARK, RX1_A_MARK, VI0_DATA0_VI0_B0_MARK, - RMII0_CRS_DV_A_MARK, ET0_CRS_MARK, - HSCK0_A_MARK, SCK1_A_MARK, VI0_VSYNC_MARK, - RMII0_RX_ER_A_MARK, ET0_RX_ER_MARK, - HRTS0_A_MARK, RTS1_A_MARK, VI0_HSYNC_MARK, - RMII0_TXD_EN_A_MARK, ET0_RX_DV_MARK, - HCTS0_A_MARK, CTS1_A_MARK, VI0_FIELD_MARK, - RMII0_RXD1_A_MARK, ET0_ERXD7_MARK, - - /* IPSR5 */ - SD2_CLK_A_MARK, RX2_A_MARK, VI0_G4_MARK, ET0_RX_CLK_B_MARK, - SD2_CMD_A_MARK, TX2_A_MARK, VI0_G5_MARK, ET0_ERXD2_B_MARK, - SD2_DAT0_A_MARK, RX3_A_MARK, VI0_R0_MARK, ET0_ERXD3_B_MARK, - SD2_DAT1_A_MARK, TX3_A_MARK, VI0_R1_MARK, ET0_MDIO_B_MARK, - SD2_DAT2_A_MARK, RX4_A_MARK, VI0_R2_MARK, ET0_LINK_B_MARK, - SD2_DAT3_A_MARK, TX4_A_MARK, VI0_R3_MARK, ET0_MAGIC_B_MARK, - SD2_CD_A_MARK, RX5_A_MARK, VI0_R4_MARK, ET0_PHY_INT_B_MARK, - SD2_WP_A_MARK, TX5_A_MARK, VI0_R5_MARK, - REF125CK_MARK, ADTRG_MARK, RX5_C_MARK, - REF50CK_MARK, CTS1_E_MARK, HCTS0_D_MARK, - - /* IPSR6 */ - DU0_DR0_MARK, SCIF_CLK_B_MARK, HRX0_D_MARK, IETX_A_MARK, - TCLKA_A_MARK, HIFD00_MARK, - DU0_DR1_MARK, SCK0_B_MARK, HTX0_D_MARK, IERX_A_MARK, - TCLKB_A_MARK, HIFD01_MARK, - DU0_DR2_MARK, RX0_B_MARK, TCLKC_A_MARK, HIFD02_MARK, - DU0_DR3_MARK, TX0_B_MARK, TCLKD_A_MARK, HIFD03_MARK, - DU0_DR4_MARK, CTS0_C_MARK, TIOC0A_A_MARK, HIFD04_MARK, - DU0_DR5_MARK, RTS0_C_MARK, TIOC0B_A_MARK, HIFD05_MARK, - DU0_DR6_MARK, SCK1_C_MARK, TIOC0C_A_MARK, HIFD06_MARK, - DU0_DR7_MARK, RX1_C_MARK, TIOC0D_A_MARK, HIFD07_MARK, - DU0_DG0_MARK, TX1_C_MARK, HSCK0_D_MARK, IECLK_A_MARK, - TIOC1A_A_MARK, HIFD08_MARK, - DU0_DG1_MARK, CTS1_C_MARK, HRTS0_D_MARK, TIOC1B_A_MARK, - HIFD09_MARK, - - /* IPSR7 */ - DU0_DG2_MARK, RTS1_C_MARK, RMII0_MDC_B_MARK, TIOC2A_A_MARK, - HIFD10_MARK, - DU0_DG3_MARK, SCK2_C_MARK, RMII0_MDIO_B_MARK, TIOC2B_A_MARK, - HIFD11_MARK, - DU0_DG4_MARK, RX2_C_MARK, RMII0_CRS_DV_B_MARK, TIOC3A_A_MARK, - HIFD12_MARK, - DU0_DG5_MARK, TX2_C_MARK, RMII0_RX_ER_B_MARK, TIOC3B_A_MARK, - HIFD13_MARK, - DU0_DG6_MARK, RX3_C_MARK, RMII0_RXD0_B_MARK, TIOC3C_A_MARK, - HIFD14_MARK, - DU0_DG7_MARK, TX3_C_MARK, RMII0_RXD1_B_MARK, TIOC3D_A_MARK, - HIFD15_MARK, - DU0_DB0_MARK, RX4_C_MARK, RMII0_TXD_EN_B_MARK, TIOC4A_A_MARK, - HIFCS_MARK, - DU0_DB1_MARK, TX4_C_MARK, RMII0_TXD0_B_MARK, TIOC4B_A_MARK, - HIFRS_MARK, - DU0_DB2_MARK, RX5_B_MARK, RMII0_TXD1_B_MARK, TIOC4C_A_MARK, - HIFWR_MARK, - DU0_DB3_MARK, TX5_B_MARK, TIOC4D_A_MARK, HIFRD_MARK, - DU0_DB4_MARK, HIFINT_MARK, - - /* IPSR8 */ - DU0_DB5_MARK, HIFDREQ_MARK, - DU0_DB6_MARK, HIFRDY_MARK, - DU0_DB7_MARK, SSI_SCK0_B_MARK, HIFEBL_B_MARK, - DU0_DOTCLKIN_MARK, HSPI_CS0_C_MARK, SSI_WS0_B_MARK, - DU0_DOTCLKOUT_MARK, HSPI_CLK0_C_MARK, SSI_SDATA0_B_MARK, - DU0_EXHSYNC_DU0_HSYNC_MARK, HSPI_TX0_C_MARK, SSI_SCK1_B_MARK, - DU0_EXVSYNC_DU0_VSYNC_MARK, HSPI_RX0_C_MARK, SSI_WS1_B_MARK, - DU0_EXODDF_DU0_ODDF_MARK, CAN0_RX_B_MARK, HSCK0_B_MARK, - SSI_SDATA1_B_MARK, - DU0_DISP_MARK, CAN0_TX_B_MARK, HRX0_B_MARK, AUDIO_CLKA_B_MARK, - DU0_CDE_MARK, HTX0_B_MARK, AUDIO_CLKB_B_MARK, LCD_VCPWC_B_MARK, - IRQ0_A_MARK, HSPI_TX_B_MARK, RX3_E_MARK, ET0_ERXD0_MARK, - IRQ1_A_MARK, HSPI_RX_B_MARK, TX3_E_MARK, ET0_ERXD1_MARK, - IRQ2_A_MARK, CTS0_A_MARK, HCTS0_B_MARK, ET0_ERXD2_A_MARK, - IRQ3_A_MARK, RTS0_A_MARK, HRTS0_B_MARK, ET0_ERXD3_A_MARK, - - /* IPSR9 */ - VI1_CLK_A_MARK, FD0_B_MARK, LCD_DATA0_B_MARK, - VI1_0_A_MARK, FD1_B_MARK, LCD_DATA1_B_MARK, - VI1_1_A_MARK, FD2_B_MARK, LCD_DATA2_B_MARK, - VI1_2_A_MARK, FD3_B_MARK, LCD_DATA3_B_MARK, - VI1_3_A_MARK, FD4_B_MARK, LCD_DATA4_B_MARK, - VI1_4_A_MARK, FD5_B_MARK, LCD_DATA5_B_MARK, - VI1_5_A_MARK, FD6_B_MARK, LCD_DATA6_B_MARK, - VI1_6_A_MARK, FD7_B_MARK, LCD_DATA7_B_MARK, - VI1_7_A_MARK, FCE_B_MARK, LCD_DATA8_B_MARK, - SSI_SCK0_A_MARK, TIOC1A_B_MARK, LCD_DATA9_B_MARK, - SSI_WS0_A_MARK, TIOC1B_B_MARK, LCD_DATA10_B_MARK, - SSI_SDATA0_A_MARK, VI1_0_B_MARK, TIOC2A_B_MARK, LCD_DATA11_B_MARK, - SSI_SCK1_A_MARK, VI1_1_B_MARK, TIOC2B_B_MARK, LCD_DATA12_B_MARK, - SSI_WS1_A_MARK, VI1_2_B_MARK, LCD_DATA13_B_MARK, - SSI_SDATA1_A_MARK, VI1_3_B_MARK, LCD_DATA14_B_MARK, - - /* IPSR10 */ - SSI_SCK23_MARK, VI1_4_B_MARK, RX1_D_MARK, FCLE_B_MARK, - LCD_DATA15_B_MARK, - SSI_WS23_MARK, VI1_5_B_MARK, TX1_D_MARK, HSCK0_C_MARK, - FALE_B_MARK, LCD_DON_B_MARK, - SSI_SDATA2_MARK, VI1_6_B_MARK, HRX0_C_MARK, FRE_B_MARK, - LCD_CL1_B_MARK, - SSI_SDATA3_MARK, VI1_7_B_MARK, HTX0_C_MARK, FWE_B_MARK, - LCD_CL2_B_MARK, - AUDIO_CLKA_A_MARK, VI1_CLK_B_MARK, SCK1_D_MARK, IECLK_B_MARK, - LCD_FLM_B_MARK, - AUDIO_CLKB_A_MARK, LCD_CLK_B_MARK, - AUDIO_CLKC_MARK, SCK1_E_MARK, HCTS0_C_MARK, FRB_B_MARK, - LCD_VEPWC_B_MARK, - AUDIO_CLKOUT_MARK, TX1_E_MARK, HRTS0_C_MARK, FSE_B_MARK, - LCD_M_DISP_B_MARK, - CAN_CLK_A_MARK, RX4_D_MARK, - CAN0_TX_A_MARK, TX4_D_MARK, MLB_CLK_MARK, - CAN1_RX_A_MARK, IRQ1_B_MARK, - CAN0_RX_A_MARK, IRQ0_B_MARK, MLB_SIG_MARK, - CAN1_TX_A_MARK, TX5_C_MARK, MLB_DAT_MARK, - - /* IPSR11 */ - SCL1_MARK, SCIF_CLK_C_MARK, - SDA1_MARK, RX1_E_MARK, - SDA0_MARK, HIFEBL_A_MARK, - SDSELF_MARK, RTS1_E_MARK, - SCIF_CLK_A_MARK, HSPI_CLK_A_MARK, VI0_CLK_MARK, RMII0_TXD0_A_MARK, - ET0_ERXD4_MARK, - SCK0_A_MARK, HSPI_CS_A_MARK, VI0_CLKENB_MARK, RMII0_TXD1_A_MARK, - ET0_ERXD5_MARK, - RX0_A_MARK, HSPI_RX_A_MARK, RMII0_RXD0_A_MARK, ET0_ERXD6_MARK, - TX0_A_MARK, HSPI_TX_A_MARK, - PENC1_MARK, TX3_D_MARK, CAN1_TX_B_MARK, TX5_D_MARK, - IETX_B_MARK, - USB_OVC1_MARK, RX3_D_MARK, CAN1_RX_B_MARK, RX5_D_MARK, - IERX_B_MARK, - DREQ0_MARK, SD1_CLK_A_MARK, ET0_TX_EN_MARK, - DACK0_MARK, SD1_DAT3_A_MARK, ET0_TX_ER_MARK, - DREQ1_MARK, HSPI_CLK_B_MARK, RX4_B_MARK, ET0_PHY_INT_C_MARK, - ET0_TX_CLK_A_MARK, - DACK1_MARK, HSPI_CS_B_MARK, TX4_B_MARK, ET0_RX_CLK_A_MARK, - PRESETOUT_MARK, ST_CLKOUT_MARK, - - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ - - PINMUX_DATA(CLKOUT_MARK, FN_CLKOUT), - PINMUX_DATA(BS_MARK, FN_BS), PINMUX_DATA(CS0_MARK, FN_CS0), - PINMUX_DATA(EX_CS0_MARK, FN_EX_CS0), - PINMUX_DATA(RD_MARK, FN_RD), PINMUX_DATA(WE0_MARK, FN_WE0), - PINMUX_DATA(WE1_MARK, FN_WE1), - PINMUX_DATA(SCL0_MARK, FN_SCL0), PINMUX_DATA(PENC0_MARK, FN_PENC0), - PINMUX_DATA(USB_OVC0_MARK, FN_USB_OVC0), - PINMUX_DATA(IRQ2_B_MARK, FN_IRQ2_B), - PINMUX_DATA(IRQ3_B_MARK, FN_IRQ3_B), - - /* IPSR0 */ - PINMUX_IPSR_DATA(IP0_1_0, A0), - PINMUX_IPSR_DATA(IP0_1_0, ST0_CLKIN), - PINMUX_IPSR_MODSEL_DATA(IP0_1_0, LCD_DATA0_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_1_0, TCLKA_C, SEL_MTU2_CLK_1), - - PINMUX_IPSR_DATA(IP0_3_2, A1), - PINMUX_IPSR_DATA(IP0_3_2, ST0_REQ), - PINMUX_IPSR_MODSEL_DATA(IP0_3_2, LCD_DATA1_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_3_2, TCLKB_C, SEL_MTU2_CLK_1), - - PINMUX_IPSR_DATA(IP0_5_4, A2), - PINMUX_IPSR_DATA(IP0_5_4, ST0_SYC), - PINMUX_IPSR_MODSEL_DATA(IP0_5_4, LCD_DATA2_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_5_4, TCLKC_C, SEL_MTU2_CLK_1), - - PINMUX_IPSR_DATA(IP0_7_6, A3), - PINMUX_IPSR_DATA(IP0_7_6, ST0_VLD), - PINMUX_IPSR_MODSEL_DATA(IP0_7_6, LCD_DATA3_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_7_6, TCLKD_C, SEL_MTU2_CLK_1), - - PINMUX_IPSR_DATA(IP0_9_8, A4), - PINMUX_IPSR_DATA(IP0_9_8, ST0_D0), - PINMUX_IPSR_MODSEL_DATA(IP0_9_8, LCD_DATA4_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_9_8, TIOC0A_C, SEL_MTU2_CH0_1), - - PINMUX_IPSR_DATA(IP0_11_10, A5), - PINMUX_IPSR_DATA(IP0_11_10, ST0_D1), - PINMUX_IPSR_MODSEL_DATA(IP0_11_10, LCD_DATA5_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_11_10, TIOC0B_C, SEL_MTU2_CH0_1), - - PINMUX_IPSR_DATA(IP0_13_12, A6), - PINMUX_IPSR_DATA(IP0_13_12, ST0_D2), - PINMUX_IPSR_MODSEL_DATA(IP0_13_12, LCD_DATA6_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_13_12, TIOC0C_C, SEL_MTU2_CH0_1), - - PINMUX_IPSR_DATA(IP0_15_14, A7), - PINMUX_IPSR_DATA(IP0_15_14, ST0_D3), - PINMUX_IPSR_MODSEL_DATA(IP0_15_14, LCD_DATA7_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_15_14, TIOC0D_C, SEL_MTU2_CH0_1), - - PINMUX_IPSR_DATA(IP0_17_16, A8), - PINMUX_IPSR_DATA(IP0_17_16, ST0_D4), - PINMUX_IPSR_MODSEL_DATA(IP0_17_16, LCD_DATA8_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_17_16, TIOC1A_C, SEL_MTU2_CH1_2), - - PINMUX_IPSR_DATA(IP0_19_18, A9), - PINMUX_IPSR_DATA(IP0_19_18, ST0_D5), - PINMUX_IPSR_MODSEL_DATA(IP0_19_18, LCD_DATA9_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_19_18, TIOC1B_C, SEL_MTU2_CH1_2), - - PINMUX_IPSR_DATA(IP0_21_20, A10), - PINMUX_IPSR_DATA(IP0_21_20, ST0_D6), - PINMUX_IPSR_MODSEL_DATA(IP0_21_20, LCD_DATA10_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_21_20, TIOC2A_C, SEL_MTU2_CH2_2), - - PINMUX_IPSR_DATA(IP0_23_22, A11), - PINMUX_IPSR_DATA(IP0_23_22, ST0_D7), - PINMUX_IPSR_MODSEL_DATA(IP0_23_22, LCD_DATA11_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_23_22, TIOC2B_C, SEL_MTU2_CH2_2), - - PINMUX_IPSR_DATA(IP0_25_24, A12), - PINMUX_IPSR_MODSEL_DATA(IP0_25_24, LCD_DATA12_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_25_24, TIOC3A_C, SEL_MTU2_CH3_1), - - PINMUX_IPSR_DATA(IP0_27_26, A13), - PINMUX_IPSR_MODSEL_DATA(IP0_27_26, LCD_DATA13_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_27_26, TIOC3B_C, SEL_MTU2_CH3_1), - - PINMUX_IPSR_DATA(IP0_29_28, A14), - PINMUX_IPSR_MODSEL_DATA(IP0_29_28, LCD_DATA14_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_29_28, TIOC3C_C, SEL_MTU2_CH3_1), - - PINMUX_IPSR_DATA(IP0_31_30, A15), - PINMUX_IPSR_DATA(IP0_31_30, ST0_VCO_CLKIN), - PINMUX_IPSR_MODSEL_DATA(IP0_31_30, LCD_DATA15_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP0_31_30, TIOC3D_C, SEL_MTU2_CH3_1), - - - /* IPSR1 */ - PINMUX_IPSR_DATA(IP1_1_0, A16), - PINMUX_IPSR_DATA(IP1_1_0, ST0_PWM), - PINMUX_IPSR_MODSEL_DATA(IP1_1_0, LCD_DON_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP1_1_0, TIOC4A_C, SEL_MTU2_CH4_1), - - PINMUX_IPSR_DATA(IP1_3_2, A17), - PINMUX_IPSR_DATA(IP1_3_2, ST1_VCO_CLKIN), - PINMUX_IPSR_MODSEL_DATA(IP1_3_2, LCD_CL1_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP1_3_2, TIOC4B_C, SEL_MTU2_CH4_1), - - PINMUX_IPSR_DATA(IP1_5_4, A18), - PINMUX_IPSR_DATA(IP1_5_4, ST1_PWM), - PINMUX_IPSR_MODSEL_DATA(IP1_5_4, LCD_CL2_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP1_5_4, TIOC4C_C, SEL_MTU2_CH4_1), - - PINMUX_IPSR_DATA(IP1_7_6, A19), - PINMUX_IPSR_DATA(IP1_7_6, ST1_CLKIN), - PINMUX_IPSR_MODSEL_DATA(IP1_7_6, LCD_CLK_A, SEL_LCDC_0), - PINMUX_IPSR_MODSEL_DATA(IP1_7_6, TIOC4D_C, SEL_MTU2_CH4_1), - - PINMUX_IPSR_DATA(IP1_9_8, A20), - PINMUX_IPSR_DATA(IP1_9_8, ST1_REQ), - PINMUX_IPSR_MODSEL_DATA(IP1_9_8, LCD_FLM_A, SEL_LCDC_0), - - PINMUX_IPSR_DATA(IP1_11_10, A21), - PINMUX_IPSR_DATA(IP1_11_10, ST1_SYC), - PINMUX_IPSR_MODSEL_DATA(IP1_11_10, LCD_VCPWC_A, SEL_LCDC_0), - - PINMUX_IPSR_DATA(IP1_13_12, A22), - PINMUX_IPSR_DATA(IP1_13_12, ST1_VLD), - PINMUX_IPSR_MODSEL_DATA(IP1_13_12, LCD_VEPWC_A, SEL_LCDC_0), - - PINMUX_IPSR_DATA(IP1_15_14, A23), - PINMUX_IPSR_DATA(IP1_15_14, ST1_D0), - PINMUX_IPSR_MODSEL_DATA(IP1_15_14, LCD_M_DISP_A, SEL_LCDC_0), - - PINMUX_IPSR_DATA(IP1_17_16, A24), - PINMUX_IPSR_MODSEL_DATA(IP1_17_16, RX2_D, SEL_SCIF2_3), - PINMUX_IPSR_DATA(IP1_17_16, ST1_D1), - - PINMUX_IPSR_DATA(IP1_19_18, A25), - PINMUX_IPSR_MODSEL_DATA(IP1_17_16, RX2_D, SEL_SCIF2_3), - PINMUX_IPSR_DATA(IP1_17_16, ST1_D2), - - PINMUX_IPSR_DATA(IP1_22_20, D0), - PINMUX_IPSR_MODSEL_DATA(IP1_22_20, SD0_DAT0_A, SEL_SDHI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_22_20, MMC_D0_A, SEL_MMC_0), - PINMUX_IPSR_DATA(IP1_22_20, ST1_D3), - PINMUX_IPSR_MODSEL_DATA(IP1_22_20, FD0_A, SEL_FLCTL_0), - - PINMUX_IPSR_DATA(IP1_25_23, D1), - PINMUX_IPSR_MODSEL_DATA(IP1_25_23, SD0_DAT0_A, SEL_SDHI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_25_23, MMC_D1_A, SEL_MMC_0), - PINMUX_IPSR_DATA(IP1_25_23, ST1_D4), - PINMUX_IPSR_MODSEL_DATA(IP1_25_23, FD1_A, SEL_FLCTL_0), - - PINMUX_IPSR_DATA(IP1_28_26, D2), - PINMUX_IPSR_MODSEL_DATA(IP1_28_26, SD0_DAT0_A, SEL_SDHI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_28_26, MMC_D2_A, SEL_MMC_0), - PINMUX_IPSR_DATA(IP1_28_26, ST1_D5), - PINMUX_IPSR_MODSEL_DATA(IP1_28_26, FD2_A, SEL_FLCTL_0), - - PINMUX_IPSR_DATA(IP1_31_29, D3), - PINMUX_IPSR_MODSEL_DATA(IP1_31_29, SD0_DAT0_A, SEL_SDHI0_0), - PINMUX_IPSR_MODSEL_DATA(IP1_31_29, MMC_D3_A, SEL_MMC_0), - PINMUX_IPSR_DATA(IP1_31_29, ST1_D6), - PINMUX_IPSR_MODSEL_DATA(IP1_31_29, FD3_A, SEL_FLCTL_0), - - /* IPSR2 */ - PINMUX_IPSR_DATA(IP2_2_0, D4), - PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SD0_CD_A, SEL_SDHI0_0), - PINMUX_IPSR_MODSEL_DATA(IP2_2_0, MMC_D4_A, SEL_MMC_0), - PINMUX_IPSR_DATA(IP2_2_0, ST1_D7), - PINMUX_IPSR_MODSEL_DATA(IP2_2_0, FD4_A, SEL_FLCTL_0), - - PINMUX_IPSR_DATA(IP2_4_3, D5), - PINMUX_IPSR_MODSEL_DATA(IP2_4_3, SD0_WP_A, SEL_SDHI0_0), - PINMUX_IPSR_MODSEL_DATA(IP2_4_3, MMC_D5_A, SEL_MMC_0), - PINMUX_IPSR_MODSEL_DATA(IP2_4_3, FD5_A, SEL_FLCTL_0), - - PINMUX_IPSR_DATA(IP2_7_5, D6), - PINMUX_IPSR_MODSEL_DATA(IP2_7_5, RSPI_RSPCK_A, SEL_RSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_7_5, MMC_D6_A, SEL_MMC_0), - PINMUX_IPSR_MODSEL_DATA(IP2_7_5, QSPCLK_A, SEL_RQSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_7_5, FD6_A, SEL_FLCTL_0), - - PINMUX_IPSR_DATA(IP2_10_8, D7), - PINMUX_IPSR_MODSEL_DATA(IP2_10_8, RSPI_SSL_A, SEL_RSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_10_8, MMC_D7_A, SEL_MMC_0), - PINMUX_IPSR_MODSEL_DATA(IP2_10_8, QSSL_A, SEL_RQSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_10_8, FD7_A, SEL_FLCTL_0), - - PINMUX_IPSR_DATA(IP2_13_11, D8), - PINMUX_IPSR_MODSEL_DATA(IP2_13_11, SD0_CLK_A, SEL_SDHI0_0), - PINMUX_IPSR_MODSEL_DATA(IP2_13_11, MMC_CLK_A, SEL_MMC_0), - PINMUX_IPSR_MODSEL_DATA(IP2_13_11, QIO2_A, SEL_RQSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_13_11, FCE_A, SEL_FLCTL_0), - PINMUX_IPSR_MODSEL_DATA(IP2_13_11, ET0_GTX_CLK_B, SEL_ET0_1), - - PINMUX_IPSR_DATA(IP2_16_14, D9), - PINMUX_IPSR_MODSEL_DATA(IP2_16_14, SD0_CMD_A, SEL_SDHI0_0), - PINMUX_IPSR_MODSEL_DATA(IP2_16_14, MMC_CMD_A, SEL_MMC_0), - PINMUX_IPSR_MODSEL_DATA(IP2_16_14, QIO3_A, SEL_RQSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_16_14, FCLE_A, SEL_FLCTL_0), - PINMUX_IPSR_MODSEL_DATA(IP2_16_14, ET0_ETXD1_B, SEL_ET0_1), - - PINMUX_IPSR_DATA(IP2_19_17, D10), - PINMUX_IPSR_MODSEL_DATA(IP2_19_17, RSPI_MOSI_A, SEL_RSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_19_17, QMO_QIO0_A, SEL_RQSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_19_17, FALE_A, SEL_FLCTL_0), - PINMUX_IPSR_MODSEL_DATA(IP2_19_17, ET0_ETXD2_B, SEL_ET0_1), - - PINMUX_IPSR_DATA(IP2_22_20, D11), - PINMUX_IPSR_MODSEL_DATA(IP2_22_20, RSPI_MISO_A, SEL_RSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_22_20, QMI_QIO1_A, SEL_RQSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP2_22_20, FRE_A, SEL_FLCTL_0), - - PINMUX_IPSR_DATA(IP2_24_23, D12), - PINMUX_IPSR_MODSEL_DATA(IP2_24_23, FWE_A, SEL_FLCTL_0), - PINMUX_IPSR_MODSEL_DATA(IP2_24_23, ET0_ETXD5_B, SEL_ET0_1), - - PINMUX_IPSR_DATA(IP2_27_25, D13), - PINMUX_IPSR_MODSEL_DATA(IP2_27_25, RX2_B, SEL_SCIF2_1), - PINMUX_IPSR_MODSEL_DATA(IP2_27_25, FRB_A, SEL_FLCTL_0), - PINMUX_IPSR_MODSEL_DATA(IP2_27_25, ET0_ETXD6_B, SEL_ET0_1), - - PINMUX_IPSR_DATA(IP2_30_28, D14), - PINMUX_IPSR_MODSEL_DATA(IP2_30_28, TX2_B, SEL_SCIF2_1), - PINMUX_IPSR_MODSEL_DATA(IP2_30_28, FSE_A, SEL_FLCTL_0), - PINMUX_IPSR_MODSEL_DATA(IP2_30_28, ET0_TX_CLK_B, SEL_ET0_1), - - /* IPSR3 */ - PINMUX_IPSR_DATA(IP3_1_0, D15), - PINMUX_IPSR_MODSEL_DATA(IP3_1_0, SCK2_B, SEL_SCIF2_1), - - PINMUX_IPSR_DATA(IP3_2, CS1_A26), - PINMUX_IPSR_MODSEL_DATA(IP3_2, QIO3_B, SEL_RQSPI_1), - - PINMUX_IPSR_DATA(IP3_5_3, EX_CS1), - PINMUX_IPSR_MODSEL_DATA(IP3_5_3, RX3_B, SEL_SCIF2_1), - PINMUX_IPSR_DATA(IP3_5_3, ATACS0), - PINMUX_IPSR_MODSEL_DATA(IP3_5_3, QIO2_B, SEL_RQSPI_1), - PINMUX_IPSR_DATA(IP3_5_3, ET0_ETXD0), - - PINMUX_IPSR_DATA(IP3_8_6, EX_CS2), - PINMUX_IPSR_MODSEL_DATA(IP3_8_6, TX3_B, SEL_SCIF3_1), - PINMUX_IPSR_DATA(IP3_8_6, ATACS1), - PINMUX_IPSR_MODSEL_DATA(IP3_8_6, QSPCLK_B, SEL_RQSPI_1), - PINMUX_IPSR_MODSEL_DATA(IP3_8_6, ET0_GTX_CLK_A, SEL_ET0_0), - - PINMUX_IPSR_DATA(IP3_11_9, EX_CS3), - PINMUX_IPSR_MODSEL_DATA(IP3_11_9, SD1_CD_A, SEL_SDHI1_0), - PINMUX_IPSR_DATA(IP3_11_9, ATARD), - PINMUX_IPSR_MODSEL_DATA(IP3_11_9, QMO_QIO0_B, SEL_RQSPI_1), - PINMUX_IPSR_MODSEL_DATA(IP3_11_9, ET0_ETXD1_A, SEL_ET0_0), - - PINMUX_IPSR_DATA(IP3_14_12, EX_CS4), - PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SD1_WP_A, SEL_SDHI1_0), - PINMUX_IPSR_DATA(IP3_14_12, ATAWR), - PINMUX_IPSR_MODSEL_DATA(IP3_14_12, QMI_QIO1_B, SEL_RQSPI_1), - PINMUX_IPSR_MODSEL_DATA(IP3_14_12, ET0_ETXD2_A, SEL_ET0_0), - - PINMUX_IPSR_DATA(IP3_17_15, EX_CS5), - PINMUX_IPSR_MODSEL_DATA(IP3_17_15, SD1_CMD_A, SEL_SDHI1_0), - PINMUX_IPSR_DATA(IP3_17_15, ATADIR), - PINMUX_IPSR_MODSEL_DATA(IP3_17_15, QSSL_B, SEL_RQSPI_1), - PINMUX_IPSR_MODSEL_DATA(IP3_17_15, ET0_ETXD3_A, SEL_ET0_0), - - PINMUX_IPSR_DATA(IP3_19_18, RD_WR), - PINMUX_IPSR_DATA(IP3_19_18, TCLK0), - PINMUX_IPSR_MODSEL_DATA(IP3_19_18, CAN_CLK_B, SEL_RCAN_CLK_1), - PINMUX_IPSR_DATA(IP3_19_18, ET0_ETXD4), - - PINMUX_IPSR_DATA(IP3_20, EX_WAIT0), - PINMUX_IPSR_MODSEL_DATA(IP3_20, TCLK1_B, SEL_TMU_1), - - PINMUX_IPSR_DATA(IP3_23_21, EX_WAIT1), - PINMUX_IPSR_MODSEL_DATA(IP3_23_21, SD1_DAT0_A, SEL_SDHI1_0), - PINMUX_IPSR_DATA(IP3_23_21, DREQ2), - PINMUX_IPSR_MODSEL_DATA(IP3_23_21, CAN1_TX_C, SEL_RCAN1_2), - PINMUX_IPSR_MODSEL_DATA(IP3_23_21, ET0_LINK_C, SEL_ET0_CTL_2), - PINMUX_IPSR_MODSEL_DATA(IP3_23_21, ET0_ETXD5_A, SEL_ET0_0), - - PINMUX_IPSR_DATA(IP3_26_24, EX_WAIT2), - PINMUX_IPSR_MODSEL_DATA(IP3_26_24, SD1_DAT1_A, SEL_SDHI1_0), - PINMUX_IPSR_DATA(IP3_26_24, DACK2), - PINMUX_IPSR_MODSEL_DATA(IP3_26_24, CAN1_RX_C, SEL_RCAN1_2), - PINMUX_IPSR_MODSEL_DATA(IP3_26_24, ET0_MAGIC_C, SEL_ET0_CTL_2), - PINMUX_IPSR_MODSEL_DATA(IP3_26_24, ET0_ETXD6_A, SEL_ET0_0), - - PINMUX_IPSR_DATA(IP3_29_27, DRACK0), - PINMUX_IPSR_MODSEL_DATA(IP3_29_27, SD1_DAT2_A, SEL_SDHI1_0), - PINMUX_IPSR_DATA(IP3_29_27, ATAG), - PINMUX_IPSR_MODSEL_DATA(IP3_29_27, TCLK1_A, SEL_TMU_0), - PINMUX_IPSR_DATA(IP3_29_27, ET0_ETXD7), - - /* IPSR4 */ - PINMUX_IPSR_MODSEL_DATA(IP4_2_0, HCTS0_A, SEL_HSCIF_0), - PINMUX_IPSR_MODSEL_DATA(IP4_2_0, CTS1_A, SEL_SCIF1_0), - PINMUX_IPSR_DATA(IP4_2_0, VI0_FIELD), - PINMUX_IPSR_MODSEL_DATA(IP4_2_0, RMII0_RXD1_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP4_2_0, ET0_ERXD7), - - PINMUX_IPSR_MODSEL_DATA(IP4_5_3, HRTS0_A, SEL_HSCIF_0), - PINMUX_IPSR_MODSEL_DATA(IP4_5_3, RTS1_A, SEL_SCIF1_0), - PINMUX_IPSR_DATA(IP4_5_3, VI0_HSYNC), - PINMUX_IPSR_MODSEL_DATA(IP4_5_3, RMII0_TXD_EN_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP4_5_3, ET0_RX_DV), - - PINMUX_IPSR_MODSEL_DATA(IP4_8_6, HSCK0_A, SEL_HSCIF_0), - PINMUX_IPSR_MODSEL_DATA(IP4_8_6, SCK1_A, SEL_SCIF1_0), - PINMUX_IPSR_DATA(IP4_8_6, VI0_VSYNC), - PINMUX_IPSR_MODSEL_DATA(IP4_8_6, RMII0_RX_ER_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP4_8_6, ET0_RX_ER), - - PINMUX_IPSR_MODSEL_DATA(IP4_11_9, HRX0_A, SEL_HSCIF_0), - PINMUX_IPSR_MODSEL_DATA(IP4_11_9, RX1_A, SEL_SCIF1_0), - PINMUX_IPSR_DATA(IP4_11_9, VI0_DATA0_VI0_B0), - PINMUX_IPSR_MODSEL_DATA(IP4_11_9, RMII0_CRS_DV_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP4_11_9, ET0_CRS), - - PINMUX_IPSR_MODSEL_DATA(IP4_14_12, HTX0_A, SEL_HSCIF_0), - PINMUX_IPSR_MODSEL_DATA(IP4_14_12, TX1_A, SEL_SCIF1_0), - PINMUX_IPSR_DATA(IP4_14_12, VI0_DATA1_VI0_B1), - PINMUX_IPSR_MODSEL_DATA(IP4_14_12, RMII0_MDC_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP4_14_12, ET0_COL), - - PINMUX_IPSR_MODSEL_DATA(IP4_17_15, CTS0_B, SEL_SCIF0_1), - PINMUX_IPSR_DATA(IP4_17_15, VI0_DATA2_VI0_B2), - PINMUX_IPSR_MODSEL_DATA(IP4_17_15, RMII0_MDIO_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP4_17_15, ET0_MDC), - - PINMUX_IPSR_MODSEL_DATA(IP4_19_18, RTS0_B, SEL_SCIF0_1), - PINMUX_IPSR_DATA(IP4_19_18, VI0_DATA3_VI0_B3), - PINMUX_IPSR_MODSEL_DATA(IP4_19_18, ET0_MDIO_A, SEL_ET0_0), - - PINMUX_IPSR_MODSEL_DATA(IP4_21_20, SCK1_B, SEL_SCIF1_1), - PINMUX_IPSR_DATA(IP4_21_20, VI0_DATA4_VI0_B4), - PINMUX_IPSR_MODSEL_DATA(IP4_21_20, ET0_LINK_A, SEL_ET0_CTL_0), - - PINMUX_IPSR_MODSEL_DATA(IP4_23_22, RX1_B, SEL_SCIF1_1), - PINMUX_IPSR_DATA(IP4_23_22, VI0_DATA5_VI0_B5), - PINMUX_IPSR_MODSEL_DATA(IP4_23_22, ET0_MAGIC_A, SEL_ET0_CTL_0), - - PINMUX_IPSR_MODSEL_DATA(IP4_25_24, TX1_B, SEL_SCIF1_1), - PINMUX_IPSR_DATA(IP4_25_24, VI0_DATA6_VI0_G0), - PINMUX_IPSR_MODSEL_DATA(IP4_25_24, ET0_PHY_INT_A, SEL_ET0_CTL_0), - - PINMUX_IPSR_MODSEL_DATA(IP4_27_26, CTS1_B, SEL_SCIF1_1), - PINMUX_IPSR_DATA(IP4_27_26, VI0_DATA7_VI0_G1), - - PINMUX_IPSR_MODSEL_DATA(IP4_29_28, RTS1_B, SEL_SCIF1_1), - PINMUX_IPSR_DATA(IP4_29_28, VI0_G2), - - PINMUX_IPSR_MODSEL_DATA(IP4_31_30, SCK2_A, SEL_SCIF2_0), - PINMUX_IPSR_DATA(IP4_31_30, VI0_G3), - - /* IPSR5 */ - PINMUX_IPSR_MODSEL_DATA(IP5_2_0, SD2_CLK_A, SEL_SDHI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_2_0, RX2_A, SEL_SCIF2_0), - PINMUX_IPSR_DATA(IP5_2_0, VI0_G4), - PINMUX_IPSR_MODSEL_DATA(IP5_2_0, ET0_RX_CLK_B, SEL_ET0_1), - - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, SD2_CMD_A, SEL_SDHI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, TX2_A, SEL_SCIF2_0), - PINMUX_IPSR_DATA(IP5_5_3, VI0_G5), - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, ET0_ERXD2_B, SEL_ET0_1), - - PINMUX_IPSR_MODSEL_DATA(IP5_8_6, SD2_DAT0_A, SEL_SDHI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_8_6, RX3_A, SEL_SCIF3_0), - PINMUX_IPSR_DATA(IP4_8_6, VI0_R0), - PINMUX_IPSR_MODSEL_DATA(IP4_8_6, ET0_ERXD2_B, SEL_ET0_1), - - PINMUX_IPSR_MODSEL_DATA(IP5_11_9, SD2_DAT1_A, SEL_SDHI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_11_9, TX3_A, SEL_SCIF3_0), - PINMUX_IPSR_DATA(IP5_11_9, VI0_R1), - PINMUX_IPSR_MODSEL_DATA(IP5_11_9, ET0_MDIO_B, SEL_ET0_1), - - PINMUX_IPSR_MODSEL_DATA(IP5_14_12, SD2_DAT2_A, SEL_SDHI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_14_12, RX4_A, SEL_SCIF4_0), - PINMUX_IPSR_DATA(IP5_14_12, VI0_R2), - PINMUX_IPSR_MODSEL_DATA(IP5_14_12, ET0_LINK_B, SEL_ET0_CTL_1), - - PINMUX_IPSR_MODSEL_DATA(IP5_17_15, SD2_DAT3_A, SEL_SDHI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_17_15, TX4_A, SEL_SCIF4_0), - PINMUX_IPSR_DATA(IP5_17_15, VI0_R3), - PINMUX_IPSR_MODSEL_DATA(IP5_17_15, ET0_MAGIC_B, SEL_ET0_CTL_1), - - PINMUX_IPSR_MODSEL_DATA(IP5_20_18, SD2_CD_A, SEL_SDHI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_20_18, RX5_A, SEL_SCIF5_0), - PINMUX_IPSR_DATA(IP5_20_18, VI0_R4), - PINMUX_IPSR_MODSEL_DATA(IP5_20_18, ET0_PHY_INT_B, SEL_ET0_CTL_1), - - PINMUX_IPSR_MODSEL_DATA(IP5_22_21, SD2_WP_A, SEL_SDHI2_0), - PINMUX_IPSR_MODSEL_DATA(IP5_22_21, TX5_A, SEL_SCIF5_0), - PINMUX_IPSR_DATA(IP5_22_21, VI0_R5), - - PINMUX_IPSR_DATA(IP5_24_23, REF125CK), - PINMUX_IPSR_DATA(IP5_24_23, ADTRG), - PINMUX_IPSR_MODSEL_DATA(IP5_24_23, RX5_C, SEL_SCIF5_2), - PINMUX_IPSR_DATA(IP5_26_25, REF50CK), - PINMUX_IPSR_MODSEL_DATA(IP5_26_25, CTS1_E, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP5_26_25, HCTS0_D, SEL_HSCIF_3), - - /* IPSR6 */ - PINMUX_IPSR_DATA(IP6_2_0, DU0_DR0), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SCIF_CLK_B, SEL_SCIF_CLK_1), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, HRX0_D, SEL_HSCIF_3), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, IETX_A, SEL_IEBUS_0), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, TCLKA_A, SEL_MTU2_CLK_0), - PINMUX_IPSR_DATA(IP6_2_0, HIFD00), - - PINMUX_IPSR_DATA(IP6_5_3, DU0_DR1), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCK0_B, SEL_SCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, HTX0_D, SEL_HSCIF_3), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, IERX_A, SEL_IEBUS_0), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, TCLKB_A, SEL_MTU2_CLK_0), - PINMUX_IPSR_DATA(IP6_5_3, HIFD01), - - PINMUX_IPSR_DATA(IP6_7_6, DU0_DR2), - PINMUX_IPSR_MODSEL_DATA(IP6_7_6, RX0_B, SEL_SCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_7_6, TCLKC_A, SEL_MTU2_CLK_0), - PINMUX_IPSR_DATA(IP6_7_6, HIFD02), - - PINMUX_IPSR_DATA(IP6_9_8, DU0_DR3), - PINMUX_IPSR_MODSEL_DATA(IP6_9_8, TX0_B, SEL_SCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_9_8, TCLKD_A, SEL_MTU2_CLK_0), - PINMUX_IPSR_DATA(IP6_9_8, HIFD03), - - PINMUX_IPSR_DATA(IP6_11_10, DU0_DR4), - PINMUX_IPSR_MODSEL_DATA(IP6_11_10, CTS0_C, SEL_SCIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP6_11_10, TIOC0A_A, SEL_MTU2_CH0_0), - PINMUX_IPSR_DATA(IP6_11_10, HIFD04), - - PINMUX_IPSR_DATA(IP6_13_12, DU0_DR5), - PINMUX_IPSR_MODSEL_DATA(IP6_13_12, RTS0_C, SEL_SCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_13_12, TIOC0B_A, SEL_MTU2_CH0_0), - PINMUX_IPSR_DATA(IP6_13_12, HIFD05), - - PINMUX_IPSR_DATA(IP6_15_14, DU0_DR6), - PINMUX_IPSR_MODSEL_DATA(IP6_15_14, SCK1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_15_14, TIOC0C_A, SEL_MTU2_CH0_0), - PINMUX_IPSR_DATA(IP6_15_14, HIFD06), - - PINMUX_IPSR_DATA(IP6_17_16, DU0_DR7), - PINMUX_IPSR_MODSEL_DATA(IP6_17_16, RX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_17_16, TIOC0D_A, SEL_MTU2_CH0_0), - PINMUX_IPSR_DATA(IP6_17_16, HIFD07), - - PINMUX_IPSR_DATA(IP6_20_18, DU0_DG0), - PINMUX_IPSR_MODSEL_DATA(IP6_20_18, TX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_20_18, HSCK0_D, SEL_HSCIF_3), - PINMUX_IPSR_MODSEL_DATA(IP6_20_18, IECLK_A, SEL_IEBUS_0), - PINMUX_IPSR_MODSEL_DATA(IP6_20_18, TIOC1A_A, SEL_MTU2_CH1_0), - PINMUX_IPSR_DATA(IP6_20_18, HIFD08), - - PINMUX_IPSR_DATA(IP6_23_21, DU0_DG1), - PINMUX_IPSR_MODSEL_DATA(IP6_23_21, CTS1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_23_21, HRTS0_D, SEL_HSCIF_3), - PINMUX_IPSR_MODSEL_DATA(IP6_23_21, TIOC1B_A, SEL_MTU2_CH1_0), - PINMUX_IPSR_DATA(IP6_23_21, HIFD09), - - /* IPSR7 */ - PINMUX_IPSR_DATA(IP7_2_0, DU0_DG2), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, RTS1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, RMII0_MDC_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, TIOC2A_A, SEL_MTU2_CH2_0), - PINMUX_IPSR_DATA(IP7_2_0, HIFD10), - - PINMUX_IPSR_DATA(IP7_5_3, DU0_DG3), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, SCK2_C, SEL_SCIF2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RMII0_MDIO_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, TIOC2B_A, SEL_MTU2_CH2_0), - PINMUX_IPSR_DATA(IP7_5_3, HIFD11), - - PINMUX_IPSR_DATA(IP7_8_6, DU0_DG4), - PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RX2_C, SEL_SCIF2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RMII0_CRS_DV_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_8_6, TIOC3A_A, SEL_MTU2_CH3_0), - PINMUX_IPSR_DATA(IP7_8_6, HIFD12), - - PINMUX_IPSR_DATA(IP7_11_9, DU0_DG5), - PINMUX_IPSR_MODSEL_DATA(IP7_11_9, TX2_C, SEL_SCIF2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_11_9, RMII0_RX_ER_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_11_9, TIOC3B_A, SEL_MTU2_CH3_0), - PINMUX_IPSR_DATA(IP7_11_9, HIFD13), - - PINMUX_IPSR_DATA(IP7_14_12, DU0_DG6), - PINMUX_IPSR_MODSEL_DATA(IP7_14_12, RX3_C, SEL_SCIF3_2), - PINMUX_IPSR_MODSEL_DATA(IP7_14_12, RMII0_RXD0_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_14_12, TIOC3C_A, SEL_MTU2_CH3_0), - PINMUX_IPSR_DATA(IP7_14_12, HIFD14), - - PINMUX_IPSR_DATA(IP7_17_15, DU0_DG7), - PINMUX_IPSR_MODSEL_DATA(IP7_17_15, TX3_C, SEL_SCIF3_2), - PINMUX_IPSR_MODSEL_DATA(IP7_17_15, RMII0_RXD1_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_17_15, TIOC3D_A, SEL_MTU2_CH3_0), - PINMUX_IPSR_DATA(IP7_17_15, HIFD15), - - PINMUX_IPSR_DATA(IP7_20_18, DU0_DB0), - PINMUX_IPSR_MODSEL_DATA(IP7_20_18, RX4_C, SEL_SCIF4_2), - PINMUX_IPSR_MODSEL_DATA(IP7_20_18, RMII0_TXD_EN_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_20_18, TIOC4A_A, SEL_MTU2_CH4_0), - PINMUX_IPSR_DATA(IP7_20_18, HIFCS), - - PINMUX_IPSR_DATA(IP7_23_21, DU0_DB1), - PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TX4_C, SEL_SCIF4_2), - PINMUX_IPSR_MODSEL_DATA(IP7_23_21, RMII0_TXD0_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TIOC4B_A, SEL_MTU2_CH4_0), - PINMUX_IPSR_DATA(IP7_23_21, HIFWR), - - PINMUX_IPSR_DATA(IP7_26_24, DU0_DB2), - PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RX5_B, SEL_SCIF5_1), - PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RMII0_TXD1_B, SEL_RMII_1), - PINMUX_IPSR_MODSEL_DATA(IP7_26_24, TIOC4C_A, SEL_MTU2_CH4_0), - - PINMUX_IPSR_DATA(IP7_28_27, DU0_DB3), - PINMUX_IPSR_MODSEL_DATA(IP7_28_27, TX5_B, SEL_SCIF5_1), - PINMUX_IPSR_MODSEL_DATA(IP7_28_27, TIOC4D_A, SEL_MTU2_CH4_0), - PINMUX_IPSR_DATA(IP7_28_27, HIFRD), - - PINMUX_IPSR_DATA(IP7_30_29, DU0_DB4), - PINMUX_IPSR_DATA(IP7_30_29, HIFINT), - - /* IPSR8 */ - PINMUX_IPSR_DATA(IP8_1_0, DU0_DB5), - PINMUX_IPSR_DATA(IP8_1_0, HIFDREQ), - - PINMUX_IPSR_DATA(IP8_3_2, DU0_DB6), - PINMUX_IPSR_DATA(IP8_3_2, HIFRDY), - - PINMUX_IPSR_DATA(IP8_5_4, DU0_DB7), - PINMUX_IPSR_MODSEL_DATA(IP8_5_4, SSI_SCK0_B, SEL_SSI0_1), - PINMUX_IPSR_MODSEL_DATA(IP8_5_4, HIFEBL_B, SEL_HIF_1), - - PINMUX_IPSR_DATA(IP8_7_6, DU0_DOTCLKIN), - PINMUX_IPSR_MODSEL_DATA(IP8_7_6, HSPI_CS0_C, SEL_HSPI_2), - PINMUX_IPSR_MODSEL_DATA(IP8_7_6, SSI_WS0_B, SEL_SSI0_1), - - PINMUX_IPSR_DATA(IP8_9_8, DU0_DOTCLKOUT), - PINMUX_IPSR_MODSEL_DATA(IP8_9_8, HSPI_CLK0_C, SEL_HSPI_2), - PINMUX_IPSR_MODSEL_DATA(IP8_9_8, SSI_SDATA0_B, SEL_SSI0_1), - - PINMUX_IPSR_DATA(IP8_11_10, DU0_EXHSYNC_DU0_HSYNC), - PINMUX_IPSR_MODSEL_DATA(IP8_11_10, HSPI_TX0_C, SEL_HSPI_2), - PINMUX_IPSR_MODSEL_DATA(IP8_11_10, SSI_SCK1_B, SEL_SSI1_1), - - PINMUX_IPSR_DATA(IP8_13_12, DU0_EXVSYNC_DU0_VSYNC), - PINMUX_IPSR_MODSEL_DATA(IP8_13_12, HSPI_RX0_C, SEL_HSPI_2), - PINMUX_IPSR_MODSEL_DATA(IP8_13_12, SSI_WS1_B, SEL_SSI1_1), - - PINMUX_IPSR_DATA(IP8_15_14, DU0_EXODDF_DU0_ODDF), - PINMUX_IPSR_MODSEL_DATA(IP8_15_14, CAN0_RX_B, SEL_RCAN0_1), - PINMUX_IPSR_MODSEL_DATA(IP8_15_14, HSCK0_B, SEL_HSCIF_1), - PINMUX_IPSR_MODSEL_DATA(IP8_15_14, SSI_SDATA1_B, SEL_SSI1_1), - - PINMUX_IPSR_DATA(IP8_17_16, DU0_DISP), - PINMUX_IPSR_MODSEL_DATA(IP8_17_16, CAN0_TX_B, SEL_RCAN0_1), - PINMUX_IPSR_MODSEL_DATA(IP8_17_16, HRX0_B, SEL_HSCIF_1), - PINMUX_IPSR_MODSEL_DATA(IP8_17_16, AUDIO_CLKA_B, SEL_AUDIO_CLKA_1), - - PINMUX_IPSR_DATA(IP8_19_18, DU0_CDE), - PINMUX_IPSR_MODSEL_DATA(IP8_19_18, HTX0_B, SEL_HSCIF_1), - PINMUX_IPSR_MODSEL_DATA(IP8_19_18, AUDIO_CLKB_B, SEL_AUDIO_CLKB_1), - PINMUX_IPSR_MODSEL_DATA(IP8_19_18, LCD_VCPWC_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP8_22_20, IRQ0_A, SEL_INTC_0), - PINMUX_IPSR_MODSEL_DATA(IP8_22_20, HSPI_TX_B, SEL_HSPI_1), - PINMUX_IPSR_MODSEL_DATA(IP8_22_20, RX3_E, SEL_SCIF3_4), - PINMUX_IPSR_DATA(IP8_22_20, ET0_ERXD0), - - PINMUX_IPSR_MODSEL_DATA(IP8_25_23, IRQ1_A, SEL_INTC_0), - PINMUX_IPSR_MODSEL_DATA(IP8_25_23, HSPI_RX_B, SEL_HSPI_1), - PINMUX_IPSR_MODSEL_DATA(IP8_25_23, TX3_E, SEL_SCIF3_4), - PINMUX_IPSR_DATA(IP8_25_23, ET0_ERXD1), - - PINMUX_IPSR_MODSEL_DATA(IP8_27_26, IRQ2_A, SEL_INTC_0), - PINMUX_IPSR_MODSEL_DATA(IP8_27_26, CTS0_A, SEL_SCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP8_27_26, HCTS0_B, SEL_HSCIF_1), - PINMUX_IPSR_MODSEL_DATA(IP8_27_26, ET0_ERXD2_A, SEL_ET0_0), - - PINMUX_IPSR_MODSEL_DATA(IP8_29_28, IRQ3_A, SEL_INTC_0), - PINMUX_IPSR_MODSEL_DATA(IP8_29_28, RTS0_A, SEL_SCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP8_29_28, HRTS0_B, SEL_HSCIF_1), - PINMUX_IPSR_MODSEL_DATA(IP8_29_28, ET0_ERXD3_A, SEL_ET0_0), - - /* IPSR9 */ - PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_CLK_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_1_0, FD0_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_1_0, LCD_DATA0_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_0_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_3_2, FD1_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_3_2, LCD_DATA1_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_1_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_5_4, FD2_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_5_4, LCD_DATA2_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_2_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_7_6, FD3_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_7_6, LCD_DATA3_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_9_8, VI1_3_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_9_8, FD4_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_9_8, LCD_DATA4_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_11_10, VI1_4_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_11_10, FD5_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_11_10, LCD_DATA5_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_13_12, VI1_5_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_13_12, FD6_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_13_12, LCD_DATA6_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_15_14, VI1_6_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_15_14, FD7_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_15_14, LCD_DATA7_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_17_16, VI1_7_A, SEL_VIN1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_17_16, FCE_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP9_17_16, LCD_DATA8_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SSI_SCK0_A, SEL_SSI0_0), - PINMUX_IPSR_MODSEL_DATA(IP9_19_18, TIOC1A_B, SEL_MTU2_CH1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_19_18, LCD_DATA9_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SSI_WS0_A, SEL_SSI0_0), - PINMUX_IPSR_MODSEL_DATA(IP9_21_20, TIOC1B_B, SEL_MTU2_CH1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_21_20, LCD_DATA10_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SSI_SDATA0_A, SEL_SSI0_0), - PINMUX_IPSR_MODSEL_DATA(IP9_23_22, VI1_0_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_23_22, TIOC2A_B, SEL_MTU2_CH2_1), - PINMUX_IPSR_MODSEL_DATA(IP9_23_22, LCD_DATA11_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SSI_SCK1_A, SEL_SSI1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_25_24, VI1_1_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_25_24, TIOC2B_B, SEL_MTU2_CH2_1), - PINMUX_IPSR_MODSEL_DATA(IP9_25_24, LCD_DATA12_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SSI_WS1_A, SEL_SSI1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_27_26, VI1_2_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_27_26, LCD_DATA13_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP9_29_28, SSI_SDATA1_A, SEL_SSI1_0), - PINMUX_IPSR_MODSEL_DATA(IP9_29_28, VI1_3_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_29_28, LCD_DATA14_B, SEL_LCDC_1), - - /* IPSE10 */ - PINMUX_IPSR_DATA(IP10_2_0, SSI_SCK23), - PINMUX_IPSR_MODSEL_DATA(IP10_2_0, VI1_4_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_2_0, RX1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_2_0, FCLE_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP10_2_0, LCD_DATA15_B, SEL_LCDC_1), - - PINMUX_IPSR_DATA(IP10_5_3, SSI_WS23), - PINMUX_IPSR_MODSEL_DATA(IP10_5_3, VI1_5_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_5_3, TX1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_5_3, HSCK0_C, SEL_HSCIF_2), - PINMUX_IPSR_MODSEL_DATA(IP10_5_3, FALE_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP10_5_3, LCD_DON_B, SEL_LCDC_1), - - PINMUX_IPSR_DATA(IP10_8_6, SSI_SDATA2), - PINMUX_IPSR_MODSEL_DATA(IP10_8_6, VI1_6_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_8_6, HRX0_C, SEL_HSCIF_2), - PINMUX_IPSR_MODSEL_DATA(IP10_8_6, FRE_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP10_8_6, LCD_CL1_B, SEL_LCDC_1), - - PINMUX_IPSR_DATA(IP10_11_9, SSI_SDATA3), - PINMUX_IPSR_MODSEL_DATA(IP10_11_9, VI1_7_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_11_9, HTX0_C, SEL_HSCIF_2), - PINMUX_IPSR_MODSEL_DATA(IP10_11_9, FWE_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP10_11_9, LCD_CL2_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP10_14_12, AUDIO_CLKA_A, SEL_AUDIO_CLKA_0), - PINMUX_IPSR_MODSEL_DATA(IP10_14_12, VI1_CLK_B, SEL_VIN1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_14_12, SCK1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_14_12, IECLK_B, SEL_IEBUS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_14_12, LCD_FLM_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP10_15, AUDIO_CLKB_A, SEL_AUDIO_CLKB_0), - PINMUX_IPSR_MODSEL_DATA(IP10_15, LCD_CLK_B, SEL_LCDC_1), - - PINMUX_IPSR_DATA(IP10_18_16, AUDIO_CLKC), - PINMUX_IPSR_MODSEL_DATA(IP10_18_16, SCK1_E, SEL_SCIF1_4), - PINMUX_IPSR_MODSEL_DATA(IP10_18_16, HCTS0_C, SEL_HSCIF_2), - PINMUX_IPSR_MODSEL_DATA(IP10_18_16, FRB_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_16, LCD_VEPWC_B, SEL_LCDC_1), - - PINMUX_IPSR_DATA(IP10_21_19, AUDIO_CLKOUT), - PINMUX_IPSR_MODSEL_DATA(IP10_21_19, TX1_E, SEL_SCIF1_4), - PINMUX_IPSR_MODSEL_DATA(IP10_21_19, HRTS0_C, SEL_HSCIF_2), - PINMUX_IPSR_MODSEL_DATA(IP10_21_19, FSE_B, SEL_FLCTL_1), - PINMUX_IPSR_MODSEL_DATA(IP10_21_19, LCD_M_DISP_B, SEL_LCDC_1), - - PINMUX_IPSR_MODSEL_DATA(IP10_22, CAN_CLK_A, SEL_RCAN_CLK_0), - PINMUX_IPSR_MODSEL_DATA(IP10_22, RX4_D, SEL_SCIF4_3), - - PINMUX_IPSR_MODSEL_DATA(IP10_24_23, CAN0_TX_A, SEL_RCAN0_0), - PINMUX_IPSR_MODSEL_DATA(IP10_24_23, TX4_D, SEL_SCIF4_3), - PINMUX_IPSR_DATA(IP10_24_23, MLB_CLK), - - PINMUX_IPSR_MODSEL_DATA(IP10_25, CAN1_RX_A, SEL_RCAN1_0), - PINMUX_IPSR_MODSEL_DATA(IP10_25, IRQ1_B, SEL_INTC_1), - - PINMUX_IPSR_MODSEL_DATA(IP10_27_26, CAN0_RX_A, SEL_RCAN0_0), - PINMUX_IPSR_MODSEL_DATA(IP10_27_26, IRQ0_B, SEL_INTC_1), - PINMUX_IPSR_DATA(IP10_27_26, MLB_SIG), - - PINMUX_IPSR_MODSEL_DATA(IP10_29_28, CAN1_TX_A, SEL_RCAN1_0), - PINMUX_IPSR_MODSEL_DATA(IP10_29_28, TX5_C, SEL_SCIF1_2), - PINMUX_IPSR_DATA(IP10_29_28, MLB_DAT), - - /* IPSR11 */ - PINMUX_IPSR_DATA(IP11_0, SCL1), - PINMUX_IPSR_MODSEL_DATA(IP11_0, SCIF_CLK_C, SEL_SCIF_CLK_2), - - PINMUX_IPSR_DATA(IP11_1, SDA1), - PINMUX_IPSR_MODSEL_DATA(IP11_0, RX1_E, SEL_SCIF1_4), - - PINMUX_IPSR_DATA(IP11_2, SDA0), - PINMUX_IPSR_MODSEL_DATA(IP11_2, HIFEBL_A, SEL_HIF_0), - - PINMUX_IPSR_DATA(IP11_3, SDSELF), - PINMUX_IPSR_MODSEL_DATA(IP11_3, RTS1_E, SEL_SCIF1_3), - - PINMUX_IPSR_MODSEL_DATA(IP11_6_4, SCIF_CLK_A, SEL_SCIF_CLK_0), - PINMUX_IPSR_MODSEL_DATA(IP11_6_4, HSPI_CLK_A, SEL_HSPI_0), - PINMUX_IPSR_DATA(IP11_6_4, VI0_CLK), - PINMUX_IPSR_MODSEL_DATA(IP11_6_4, RMII0_TXD0_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP11_6_4, ET0_ERXD4), - - PINMUX_IPSR_MODSEL_DATA(IP11_9_7, SCK0_A, SEL_SCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP11_9_7, HSPI_CS_A, SEL_HSPI_0), - PINMUX_IPSR_DATA(IP11_9_7, VI0_CLKENB), - PINMUX_IPSR_MODSEL_DATA(IP11_9_7, RMII0_TXD1_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP11_9_7, ET0_ERXD5), - - PINMUX_IPSR_MODSEL_DATA(IP11_11_10, RX0_A, SEL_SCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP11_11_10, HSPI_RX_A, SEL_HSPI_0), - PINMUX_IPSR_MODSEL_DATA(IP11_11_10, RMII0_RXD0_A, SEL_RMII_0), - PINMUX_IPSR_DATA(IP11_11_10, ET0_ERXD6), - - PINMUX_IPSR_MODSEL_DATA(IP11_12, TX0_A, SEL_SCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP11_12, HSPI_TX_A, SEL_HSPI_0), - - PINMUX_IPSR_DATA(IP11_15_13, PENC1), - PINMUX_IPSR_MODSEL_DATA(IP11_15_13, TX3_D, SEL_SCIF3_3), - PINMUX_IPSR_MODSEL_DATA(IP11_15_13, CAN1_TX_B, SEL_RCAN1_1), - PINMUX_IPSR_MODSEL_DATA(IP11_15_13, TX5_D, SEL_SCIF5_3), - PINMUX_IPSR_MODSEL_DATA(IP11_15_13, IETX_B, SEL_IEBUS_1), - - PINMUX_IPSR_DATA(IP11_18_16, USB_OVC1), - PINMUX_IPSR_MODSEL_DATA(IP11_18_16, RX3_D, SEL_SCIF3_3), - PINMUX_IPSR_MODSEL_DATA(IP11_18_16, CAN1_RX_B, SEL_RCAN1_1), - PINMUX_IPSR_MODSEL_DATA(IP11_18_16, RX5_D, SEL_SCIF5_3), - PINMUX_IPSR_MODSEL_DATA(IP11_18_16, IERX_B, SEL_IEBUS_1), - - PINMUX_IPSR_DATA(IP11_20_19, DREQ0), - PINMUX_IPSR_MODSEL_DATA(IP11_20_19, SD1_CLK_A, SEL_SDHI1_0), - PINMUX_IPSR_DATA(IP11_20_19, ET0_TX_EN), - - PINMUX_IPSR_DATA(IP11_22_21, DACK0), - PINMUX_IPSR_MODSEL_DATA(IP11_22_21, SD1_DAT3_A, SEL_SDHI1_0), - PINMUX_IPSR_DATA(IP11_22_21, ET0_TX_ER), - - PINMUX_IPSR_DATA(IP11_25_23, DREQ1), - PINMUX_IPSR_MODSEL_DATA(IP11_25_23, HSPI_CLK_B, SEL_HSPI_1), - PINMUX_IPSR_MODSEL_DATA(IP11_25_23, RX4_B, SEL_SCIF4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_25_23, ET0_PHY_INT_C, SEL_ET0_CTL_0), - PINMUX_IPSR_MODSEL_DATA(IP11_25_23, ET0_TX_CLK_A, SEL_ET0_0), - - PINMUX_IPSR_DATA(IP11_27_26, DACK1), - PINMUX_IPSR_MODSEL_DATA(IP11_27_26, HSPI_CS_B, SEL_HSPI_1), - PINMUX_IPSR_MODSEL_DATA(IP11_27_26, TX4_B, SEL_SCIF3_1), - PINMUX_IPSR_MODSEL_DATA(IP11_27_26, ET0_RX_CLK_A, SEL_ET0_0), - - PINMUX_IPSR_DATA(IP11_28, PRESETOUT), - PINMUX_IPSR_DATA(IP11_28, ST_CLKOUT), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - PINMUX_GPIO_GP_ALL(), - - GPIO_FN(CLKOUT), GPIO_FN(BS), GPIO_FN(CS0), GPIO_FN(EX_CS0), - GPIO_FN(RD), GPIO_FN(WE0), GPIO_FN(WE1), - GPIO_FN(SCL0), GPIO_FN(PENC0), GPIO_FN(USB_OVC0), - GPIO_FN(IRQ2_B), GPIO_FN(IRQ3_B), - - /* IPSR0 */ - GPIO_FN(A0), GPIO_FN(ST0_CLKIN), GPIO_FN(LCD_DATA0_A), - GPIO_FN(TCLKA_C), - GPIO_FN(A1), GPIO_FN(ST0_REQ), GPIO_FN(LCD_DATA1_A), - GPIO_FN(TCLKB_C), - GPIO_FN(A2), GPIO_FN(ST0_SYC), GPIO_FN(LCD_DATA2_A), - GPIO_FN(TCLKC_C), - GPIO_FN(A3), GPIO_FN(ST0_VLD), GPIO_FN(LCD_DATA3_A), - GPIO_FN(TCLKD_C), - GPIO_FN(A4), GPIO_FN(ST0_D0), GPIO_FN(LCD_DATA4_A), - GPIO_FN(TIOC0A_C), - GPIO_FN(A5), GPIO_FN(ST0_D1), GPIO_FN(LCD_DATA5_A), - GPIO_FN(TIOC0B_C), - GPIO_FN(A6), GPIO_FN(ST0_D2), GPIO_FN(LCD_DATA6_A), - GPIO_FN(TIOC0C_C), - GPIO_FN(A7), GPIO_FN(ST0_D3), GPIO_FN(LCD_DATA7_A), - GPIO_FN(TIOC0D_C), - GPIO_FN(A8), GPIO_FN(ST0_D4), GPIO_FN(LCD_DATA8_A), - GPIO_FN(TIOC1A_C), - GPIO_FN(A9), GPIO_FN(ST0_D5), GPIO_FN(LCD_DATA9_A), - GPIO_FN(TIOC1B_C), - GPIO_FN(A10), GPIO_FN(ST0_D6), GPIO_FN(LCD_DATA10_A), - GPIO_FN(TIOC2A_C), - GPIO_FN(A11), GPIO_FN(ST0_D7), GPIO_FN(LCD_DATA11_A), - GPIO_FN(TIOC2B_C), - GPIO_FN(A12), GPIO_FN(LCD_DATA12_A), GPIO_FN(TIOC3A_C), - GPIO_FN(A13), GPIO_FN(LCD_DATA13_A), GPIO_FN(TIOC3B_C), - GPIO_FN(A14), GPIO_FN(LCD_DATA14_A), GPIO_FN(TIOC3C_C), - GPIO_FN(A15), GPIO_FN(ST0_VCO_CLKIN), GPIO_FN(LCD_DATA15_A), - GPIO_FN(TIOC3D_C), - - /* IPSR1 */ - GPIO_FN(A16), GPIO_FN(ST0_PWM), GPIO_FN(LCD_DON_A), - GPIO_FN(TIOC4A_C), - GPIO_FN(A17), GPIO_FN(ST1_VCO_CLKIN), GPIO_FN(LCD_CL1_A), - GPIO_FN(TIOC4B_C), - GPIO_FN(A18), GPIO_FN(ST1_PWM), GPIO_FN(LCD_CL2_A), - GPIO_FN(TIOC4C_C), - GPIO_FN(A19), GPIO_FN(ST1_CLKIN), GPIO_FN(LCD_CLK_A), - GPIO_FN(TIOC4D_C), - GPIO_FN(A20), GPIO_FN(ST1_REQ), GPIO_FN(LCD_FLM_A), - GPIO_FN(A21), GPIO_FN(ST1_SYC), GPIO_FN(LCD_VCPWC_A), - GPIO_FN(A22), GPIO_FN(ST1_VLD), GPIO_FN(LCD_VEPWC_A), - GPIO_FN(A23), GPIO_FN(ST1_D0), GPIO_FN(LCD_M_DISP_A), - GPIO_FN(A24), GPIO_FN(RX2_D), GPIO_FN(ST1_D1), - GPIO_FN(A25), GPIO_FN(TX2_D), GPIO_FN(ST1_D2), - GPIO_FN(D0), GPIO_FN(SD0_DAT0_A), GPIO_FN(MMC_D0_A), - GPIO_FN(ST1_D3), GPIO_FN(FD0_A), - GPIO_FN(D1), GPIO_FN(SD0_DAT1_A), GPIO_FN(MMC_D1_A), - GPIO_FN(ST1_D4), GPIO_FN(FD1_A), - GPIO_FN(D2), GPIO_FN(SD0_DAT2_A), GPIO_FN(MMC_D2_A), - GPIO_FN(ST1_D5), GPIO_FN(FD2_A), - GPIO_FN(D3), GPIO_FN(SD0_DAT3_A), GPIO_FN(MMC_D3_A), - GPIO_FN(ST1_D6), GPIO_FN(FD3_A), - - /* IPSR2 */ - GPIO_FN(D4), GPIO_FN(SD0_CD_A), GPIO_FN(MMC_D4_A), GPIO_FN(ST1_D7), - GPIO_FN(FD4_A), - GPIO_FN(D5), GPIO_FN(SD0_WP_A), GPIO_FN(MMC_D5_A), GPIO_FN(FD5_A), - GPIO_FN(D6), GPIO_FN(RSPI_RSPCK_A), GPIO_FN(MMC_D6_A), - GPIO_FN(QSPCLK_A), - GPIO_FN(FD6_A), - GPIO_FN(D7), GPIO_FN(RSPI_SSL_A), GPIO_FN(MMC_D7_A), GPIO_FN(QSSL_A), - GPIO_FN(FD7_A), - GPIO_FN(D8), GPIO_FN(SD0_CLK_A), GPIO_FN(MMC_CLK_A), GPIO_FN(QIO2_A), - GPIO_FN(FCE_A), GPIO_FN(ET0_GTX_CLK_B), - GPIO_FN(D9), GPIO_FN(SD0_CMD_A), GPIO_FN(MMC_CMD_A), GPIO_FN(QIO3_A), - GPIO_FN(FCLE_A), GPIO_FN(ET0_ETXD1_B), - GPIO_FN(D10), GPIO_FN(RSPI_MOSI_A), GPIO_FN(QMO_QIO0_A), - GPIO_FN(FALE_A), GPIO_FN(ET0_ETXD2_B), - GPIO_FN(D11), GPIO_FN(RSPI_MISO_A), GPIO_FN(QMI_QIO1_A), GPIO_FN(FRE_A), - GPIO_FN(ET0_ETXD3_B), - GPIO_FN(D12), GPIO_FN(FWE_A), GPIO_FN(ET0_ETXD5_B), - GPIO_FN(D13), GPIO_FN(RX2_B), GPIO_FN(FRB_A), GPIO_FN(ET0_ETXD6_B), - GPIO_FN(D14), GPIO_FN(TX2_B), GPIO_FN(FSE_A), GPIO_FN(ET0_TX_CLK_B), - - /* IPSR3 */ - GPIO_FN(D15), GPIO_FN(SCK2_B), - GPIO_FN(CS1_A26), GPIO_FN(QIO3_B), - GPIO_FN(EX_CS1), GPIO_FN(RX3_B), GPIO_FN(ATACS0), GPIO_FN(QIO2_B), - GPIO_FN(ET0_ETXD0), - GPIO_FN(EX_CS2), GPIO_FN(TX3_B), GPIO_FN(ATACS1), GPIO_FN(QSPCLK_B), - GPIO_FN(ET0_GTX_CLK_A), - GPIO_FN(EX_CS3), GPIO_FN(SD1_CD_A), GPIO_FN(ATARD), GPIO_FN(QMO_QIO0_B), - GPIO_FN(ET0_ETXD1_A), - GPIO_FN(EX_CS4), GPIO_FN(SD1_WP_A), GPIO_FN(ATAWR), GPIO_FN(QMI_QIO1_B), - GPIO_FN(ET0_ETXD2_A), - GPIO_FN(EX_CS5), GPIO_FN(SD1_CMD_A), GPIO_FN(ATADIR), GPIO_FN(QSSL_B), - GPIO_FN(ET0_ETXD3_A), - GPIO_FN(RD_WR), GPIO_FN(TCLK1_B), - GPIO_FN(EX_WAIT0), GPIO_FN(TCLK1_B), - GPIO_FN(EX_WAIT1), GPIO_FN(SD1_DAT0_A), GPIO_FN(DREQ2), - GPIO_FN(CAN1_TX_C), GPIO_FN(ET0_LINK_C), GPIO_FN(ET0_ETXD5_A), - GPIO_FN(EX_WAIT2), GPIO_FN(SD1_DAT1_A), GPIO_FN(DACK2), - GPIO_FN(CAN1_RX_C), GPIO_FN(ET0_MAGIC_C), GPIO_FN(ET0_ETXD6_A), - GPIO_FN(DRACK0), GPIO_FN(SD1_DAT2_A), GPIO_FN(ATAG), GPIO_FN(TCLK1_A), - GPIO_FN(ET0_ETXD7), - - /* IPSR4 */ - GPIO_FN(HCTS0_A), GPIO_FN(CTS1_A), GPIO_FN(VI0_FIELD), - GPIO_FN(RMII0_RXD1_A), GPIO_FN(ET0_ERXD7), - GPIO_FN(HRTS0_A), GPIO_FN(RTS1_A), GPIO_FN(VI0_HSYNC), - GPIO_FN(RMII0_TXD_EN_A), GPIO_FN(ET0_RX_DV), - GPIO_FN(HSCK0_A), GPIO_FN(SCK1_A), GPIO_FN(VI0_VSYNC), - GPIO_FN(RMII0_RX_ER_A), GPIO_FN(ET0_RX_ER), - GPIO_FN(HRX0_A), GPIO_FN(RX1_A), GPIO_FN(VI0_DATA0_VI0_B0), - GPIO_FN(RMII0_CRS_DV_A), GPIO_FN(ET0_CRS), - GPIO_FN(HTX0_A), GPIO_FN(TX1_A), GPIO_FN(VI0_DATA1_VI0_B1), - GPIO_FN(RMII0_MDC_A), GPIO_FN(ET0_COL), - GPIO_FN(CTS0_B), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(RMII0_MDIO_A), - GPIO_FN(ET0_MDC), - GPIO_FN(RTS0_B), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ET0_MDIO_A), - GPIO_FN(SCK1_B), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ET0_LINK_A), - GPIO_FN(RX1_B), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(ET0_MAGIC_A), - GPIO_FN(TX1_B), GPIO_FN(VI0_DATA6_VI0_G0), GPIO_FN(ET0_PHY_INT_A), - GPIO_FN(CTS1_B), GPIO_FN(VI0_DATA7_VI0_G1), - GPIO_FN(RTS1_B), GPIO_FN(VI0_G2), - GPIO_FN(SCK2_A), GPIO_FN(VI0_G3), - - /* IPSR5 */ - GPIO_FN(REF50CK), GPIO_FN(CTS1_E), GPIO_FN(HCTS0_D), - GPIO_FN(REF125CK), GPIO_FN(ADTRG), GPIO_FN(RX5_C), - GPIO_FN(SD2_WP_A), GPIO_FN(TX5_A), GPIO_FN(VI0_R5), - GPIO_FN(SD2_CD_A), GPIO_FN(RX5_A), GPIO_FN(VI0_R4), - GPIO_FN(ET0_PHY_INT_B), - GPIO_FN(SD2_DAT3_A), GPIO_FN(TX4_A), GPIO_FN(VI0_R3), - GPIO_FN(ET0_MAGIC_B), - GPIO_FN(SD2_DAT2_A), GPIO_FN(RX4_A), GPIO_FN(VI0_R2), - GPIO_FN(ET0_LINK_B), - GPIO_FN(SD2_DAT1_A), GPIO_FN(TX3_A), GPIO_FN(VI0_R1), - GPIO_FN(ET0_MDIO_B), - GPIO_FN(SD2_DAT0_A), GPIO_FN(RX3_A), GPIO_FN(VI0_R0), - GPIO_FN(ET0_ERXD3_B), - GPIO_FN(SD2_CMD_A), GPIO_FN(TX2_A), GPIO_FN(VI0_G5), - GPIO_FN(ET0_ERXD2_B), - GPIO_FN(SD2_CLK_A), GPIO_FN(RX2_A), GPIO_FN(VI0_G4), - GPIO_FN(ET0_RX_CLK_B), - - /* IPSR6 */ - GPIO_FN(DU0_DG1), GPIO_FN(CTS1_C), GPIO_FN(HRTS0_D), - GPIO_FN(TIOC1B_A), GPIO_FN(HIFD09), - GPIO_FN(DU0_DG0), GPIO_FN(TX1_C), GPIO_FN(HSCK0_D), - GPIO_FN(IECLK_A), GPIO_FN(TIOC1A_A), GPIO_FN(HIFD08), - GPIO_FN(DU0_DR7), GPIO_FN(RX1_C), GPIO_FN(TIOC0D_A), - GPIO_FN(HIFD07), - GPIO_FN(DU0_DR6), GPIO_FN(SCK1_C), GPIO_FN(TIOC0C_A), - GPIO_FN(HIFD06), - GPIO_FN(DU0_DR5), GPIO_FN(RTS0_C), GPIO_FN(TIOC0B_A), - GPIO_FN(HIFD05), - GPIO_FN(DU0_DR4), GPIO_FN(CTS0_C), GPIO_FN(TIOC0A_A), - GPIO_FN(HIFD04), - GPIO_FN(DU0_DR3), GPIO_FN(TX0_B), GPIO_FN(TCLKD_A), GPIO_FN(HIFD03), - GPIO_FN(DU0_DR2), GPIO_FN(RX0_B), GPIO_FN(TCLKC_A), GPIO_FN(HIFD02), - GPIO_FN(DU0_DR1), GPIO_FN(SCK0_B), GPIO_FN(HTX0_D), - GPIO_FN(IERX_A), GPIO_FN(TCLKB_A), GPIO_FN(HIFD01), - GPIO_FN(DU0_DR0), GPIO_FN(SCIF_CLK_B), GPIO_FN(HRX0_D), - GPIO_FN(IETX_A), GPIO_FN(TCLKA_A), GPIO_FN(HIFD00), - - /* IPSR7 */ - GPIO_FN(DU0_DB4), GPIO_FN(HIFINT), - GPIO_FN(DU0_DB3), GPIO_FN(TX5_B), GPIO_FN(TIOC4D_A), GPIO_FN(HIFRD), - GPIO_FN(DU0_DB2), GPIO_FN(RX5_B), GPIO_FN(RMII0_TXD1_B), - GPIO_FN(TIOC4C_A), GPIO_FN(HIFWR), - GPIO_FN(DU0_DB1), GPIO_FN(TX4_C), GPIO_FN(RMII0_TXD0_B), - GPIO_FN(TIOC4B_A), GPIO_FN(HIFRS), - GPIO_FN(DU0_DB0), GPIO_FN(RX4_C), GPIO_FN(RMII0_TXD_EN_B), - GPIO_FN(TIOC4A_A), GPIO_FN(HIFCS), - GPIO_FN(DU0_DG7), GPIO_FN(TX3_C), GPIO_FN(RMII0_RXD1_B), - GPIO_FN(TIOC3D_A), GPIO_FN(HIFD15), - GPIO_FN(DU0_DG6), GPIO_FN(RX3_C), GPIO_FN(RMII0_RXD0_B), - GPIO_FN(TIOC3C_A), GPIO_FN(HIFD14), - GPIO_FN(DU0_DG5), GPIO_FN(TX2_C), GPIO_FN(RMII0_RX_ER_B), - GPIO_FN(TIOC3B_A), GPIO_FN(HIFD13), - GPIO_FN(DU0_DG4), GPIO_FN(RX2_C), GPIO_FN(RMII0_CRS_DV_B), - GPIO_FN(TIOC3A_A), GPIO_FN(HIFD12), - GPIO_FN(DU0_DG3), GPIO_FN(SCK2_C), GPIO_FN(RMII0_MDIO_B), - GPIO_FN(TIOC2B_A), GPIO_FN(HIFD11), - GPIO_FN(DU0_DG2), GPIO_FN(RTS1_C), GPIO_FN(RMII0_MDC_B), - GPIO_FN(TIOC2A_A), GPIO_FN(HIFD10), - - /* IPSR8 */ - GPIO_FN(IRQ3_A), GPIO_FN(RTS0_A), GPIO_FN(HRTS0_B), - GPIO_FN(ET0_ERXD3_A), - GPIO_FN(IRQ2_A), GPIO_FN(CTS0_A), GPIO_FN(HCTS0_B), - GPIO_FN(ET0_ERXD2_A), - GPIO_FN(IRQ1_A), GPIO_FN(HSPI_RX_B), GPIO_FN(TX3_E), - GPIO_FN(ET0_ERXD1), - GPIO_FN(IRQ0_A), GPIO_FN(HSPI_TX_B), GPIO_FN(RX3_E), - GPIO_FN(ET0_ERXD0), - GPIO_FN(DU0_CDE), GPIO_FN(HTX0_B), GPIO_FN(AUDIO_CLKB_B), - GPIO_FN(LCD_VCPWC_B), - GPIO_FN(DU0_DISP), GPIO_FN(CAN0_TX_B), GPIO_FN(HRX0_B), - GPIO_FN(AUDIO_CLKA_B), - GPIO_FN(DU0_EXODDF_DU0_ODDF), GPIO_FN(CAN0_RX_B), GPIO_FN(HSCK0_B), - GPIO_FN(SSI_SDATA1_B), - GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(HSPI_RX0_C), - GPIO_FN(SSI_WS1_B), - GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(HSPI_TX0_C), - GPIO_FN(SSI_SCK1_B), - GPIO_FN(DU0_DOTCLKOUT), GPIO_FN(HSPI_CLK0_C), - GPIO_FN(SSI_SDATA0_B), - GPIO_FN(DU0_DOTCLKIN), GPIO_FN(HSPI_CS0_C), - GPIO_FN(SSI_WS0_B), - GPIO_FN(DU0_DB7), GPIO_FN(SSI_SCK0_B), GPIO_FN(HIFEBL_B), - GPIO_FN(DU0_DB6), GPIO_FN(HIFRDY), - GPIO_FN(DU0_DB5), GPIO_FN(HIFDREQ), - - /* IPSR9 */ - GPIO_FN(SSI_SDATA1_A), GPIO_FN(VI1_3_B), GPIO_FN(LCD_DATA14_B), - GPIO_FN(SSI_WS1_A), GPIO_FN(VI1_2_B), GPIO_FN(LCD_DATA13_B), - GPIO_FN(SSI_SCK1_A), GPIO_FN(VI1_1_B), GPIO_FN(TIOC2B_B), - GPIO_FN(LCD_DATA12_B), - GPIO_FN(SSI_SDATA0_A), GPIO_FN(VI1_0_B), GPIO_FN(TIOC2A_B), - GPIO_FN(LCD_DATA11_B), - GPIO_FN(SSI_WS0_A), GPIO_FN(TIOC1B_B), GPIO_FN(LCD_DATA10_B), - GPIO_FN(SSI_SCK0_A), GPIO_FN(TIOC1A_B), GPIO_FN(LCD_DATA9_B), - GPIO_FN(VI1_7_A), GPIO_FN(FCE_B), GPIO_FN(LCD_DATA8_B), - GPIO_FN(VI1_6_A), GPIO_FN(FD7_B), GPIO_FN(LCD_DATA7_B), - GPIO_FN(VI1_5_A), GPIO_FN(FD6_B), GPIO_FN(LCD_DATA6_B), - GPIO_FN(VI1_4_A), GPIO_FN(FD5_B), GPIO_FN(LCD_DATA5_B), - GPIO_FN(VI1_3_A), GPIO_FN(FD4_B), GPIO_FN(LCD_DATA4_B), - GPIO_FN(VI1_2_A), GPIO_FN(FD3_B), GPIO_FN(LCD_DATA3_B), - GPIO_FN(VI1_1_A), GPIO_FN(FD2_B), GPIO_FN(LCD_DATA2_B), - GPIO_FN(VI1_0_A), GPIO_FN(FD1_B), GPIO_FN(LCD_DATA1_B), - GPIO_FN(VI1_CLK_A), GPIO_FN(FD0_B), GPIO_FN(LCD_DATA0_B), - - /* IPSR10 */ - GPIO_FN(CAN1_TX_A), GPIO_FN(TX5_C), GPIO_FN(MLB_DAT), - GPIO_FN(CAN0_RX_A), GPIO_FN(IRQ0_B), GPIO_FN(MLB_SIG), - GPIO_FN(CAN1_RX_A), GPIO_FN(IRQ1_B), - GPIO_FN(CAN0_TX_A), GPIO_FN(TX4_D), GPIO_FN(MLB_CLK), - GPIO_FN(CAN_CLK_A), GPIO_FN(RX4_D), - GPIO_FN(AUDIO_CLKOUT), GPIO_FN(TX1_E), GPIO_FN(HRTS0_C), - GPIO_FN(FSE_B), GPIO_FN(LCD_M_DISP_B), - GPIO_FN(AUDIO_CLKC), GPIO_FN(SCK1_E), GPIO_FN(HCTS0_C), - GPIO_FN(FRB_B), GPIO_FN(LCD_VEPWC_B), - GPIO_FN(AUDIO_CLKB_A), GPIO_FN(LCD_CLK_B), - GPIO_FN(AUDIO_CLKA_A), GPIO_FN(VI1_CLK_B), GPIO_FN(SCK1_D), - GPIO_FN(IECLK_B), GPIO_FN(LCD_FLM_B), - GPIO_FN(SSI_SDATA3), GPIO_FN(VI1_7_B), GPIO_FN(HTX0_C), - GPIO_FN(FWE_B), GPIO_FN(LCD_CL2_B), - GPIO_FN(SSI_SDATA2), GPIO_FN(VI1_6_B), GPIO_FN(HRX0_C), - GPIO_FN(FRE_B), GPIO_FN(LCD_CL1_B), - GPIO_FN(SSI_WS23), GPIO_FN(VI1_5_B), GPIO_FN(TX1_D), - GPIO_FN(HSCK0_C), GPIO_FN(FALE_B), GPIO_FN(LCD_DON_B), - GPIO_FN(SSI_SCK23), GPIO_FN(VI1_4_B), GPIO_FN(RX1_D), - GPIO_FN(FCLE_B), GPIO_FN(LCD_DATA15_B), - - /* IPSR11 */ - GPIO_FN(PRESETOUT), GPIO_FN(ST_CLKOUT), - GPIO_FN(DACK1), GPIO_FN(HSPI_CS_B), GPIO_FN(TX4_B), - GPIO_FN(ET0_RX_CLK_A), - GPIO_FN(DREQ1), GPIO_FN(HSPI_CLK_B), GPIO_FN(RX4_B), - GPIO_FN(ET0_PHY_INT_C), GPIO_FN(ET0_TX_CLK_A), - GPIO_FN(DACK0), GPIO_FN(SD1_DAT3_A), GPIO_FN(ET0_TX_ER), - GPIO_FN(DREQ0), GPIO_FN(SD1_CLK_A), GPIO_FN(ET0_TX_EN), - GPIO_FN(USB_OVC1), GPIO_FN(RX3_D), GPIO_FN(CAN1_RX_B), - GPIO_FN(RX5_D), GPIO_FN(IERX_B), - GPIO_FN(PENC1), GPIO_FN(TX3_D), GPIO_FN(CAN1_TX_B), - GPIO_FN(TX5_D), GPIO_FN(IETX_B), - GPIO_FN(TX0_A), GPIO_FN(HSPI_TX_A), - GPIO_FN(RX0_A), GPIO_FN(HSPI_RX_A), GPIO_FN(RMII0_RXD0_A), - GPIO_FN(ET0_ERXD6), - GPIO_FN(SCK0_A), GPIO_FN(HSPI_CS_A), GPIO_FN(VI0_CLKENB), - GPIO_FN(RMII0_TXD1_A), GPIO_FN(ET0_ERXD5), - GPIO_FN(SCIF_CLK_A), GPIO_FN(HSPI_CLK_A), GPIO_FN(VI0_CLK), - GPIO_FN(RMII0_TXD0_A), GPIO_FN(ET0_ERXD4), - GPIO_FN(SDSELF), GPIO_FN(RTS1_E), - GPIO_FN(SDA0), GPIO_FN(HIFEBL_A), - GPIO_FN(SDA1), GPIO_FN(RX1_E), - GPIO_FN(SCL1), GPIO_FN(SCIF_CLK_C), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1) { - GP_0_31_FN, FN_IP2_2_0, - GP_0_30_FN, FN_IP1_31_29, - GP_0_29_FN, FN_IP1_28_26, - GP_0_28_FN, FN_IP1_25_23, - GP_0_27_FN, FN_IP1_22_20, - GP_0_26_FN, FN_IP1_19_18, - GP_0_25_FN, FN_IP1_17_16, - GP_0_24_FN, FN_IP0_5_4, - GP_0_23_FN, FN_IP0_3_2, - GP_0_22_FN, FN_IP0_1_0, - GP_0_21_FN, FN_IP11_28, - GP_0_20_FN, FN_IP1_7_6, - GP_0_19_FN, FN_IP1_5_4, - GP_0_18_FN, FN_IP1_3_2, - GP_0_17_FN, FN_IP1_1_0, - GP_0_16_FN, FN_IP0_31_30, - GP_0_15_FN, FN_IP0_29_28, - GP_0_14_FN, FN_IP0_27_26, - GP_0_13_FN, FN_IP0_25_24, - GP_0_12_FN, FN_IP0_23_22, - GP_0_11_FN, FN_IP0_21_20, - GP_0_10_FN, FN_IP0_19_18, - GP_0_9_FN, FN_IP0_17_16, - GP_0_8_FN, FN_IP0_15_14, - GP_0_7_FN, FN_IP0_13_12, - GP_0_6_FN, FN_IP0_11_10, - GP_0_5_FN, FN_IP0_9_8, - GP_0_4_FN, FN_IP0_7_6, - GP_0_3_FN, FN_IP1_15_14, - GP_0_2_FN, FN_IP1_13_12, - GP_0_1_FN, FN_IP1_11_10, - GP_0_0_FN, FN_IP1_9_8 } - }, - { PINMUX_CFG_REG("GPSR1", 0xFFFC0008, 32, 1) { - GP_1_31_FN, FN_IP11_25_23, - GP_1_30_FN, FN_IP2_13_11, - GP_1_29_FN, FN_IP2_10_8, - GP_1_28_FN, FN_IP2_7_5, - GP_1_27_FN, FN_IP3_26_24, - GP_1_26_FN, FN_IP3_23_21, - GP_1_25_FN, FN_IP2_4_3, - GP_1_24_FN, FN_WE1, - GP_1_23_FN, FN_WE0, - GP_1_22_FN, FN_IP3_19_18, - GP_1_21_FN, FN_RD, - GP_1_20_FN, FN_IP3_17_15, - GP_1_19_FN, FN_IP3_14_12, - GP_1_18_FN, FN_IP3_11_9, - GP_1_17_FN, FN_IP3_8_6, - GP_1_16_FN, FN_IP3_5_3, - GP_1_15_FN, FN_EX_CS0, - GP_1_14_FN, FN_IP3_2, - GP_1_13_FN, FN_CS0, - GP_1_12_FN, FN_BS, - GP_1_11_FN, FN_CLKOUT, - GP_1_10_FN, FN_IP3_1_0, - GP_1_9_FN, FN_IP2_30_28, - GP_1_8_FN, FN_IP2_27_25, - GP_1_7_FN, FN_IP2_24_23, - GP_1_6_FN, FN_IP2_22_20, - GP_1_5_FN, FN_IP2_19_17, - GP_1_4_FN, FN_IP2_16_14, - GP_1_3_FN, FN_IP11_22_21, - GP_1_2_FN, FN_IP11_20_19, - GP_1_1_FN, FN_IP3_29_27, - GP_1_0_FN, FN_IP3_20 } - }, - { PINMUX_CFG_REG("GPSR2", 0xFFFC000C, 32, 1) { - GP_2_31_FN, FN_IP4_31_30, - GP_2_30_FN, FN_IP5_2_0, - GP_2_29_FN, FN_IP5_5_3, - GP_2_28_FN, FN_IP5_8_6, - GP_2_27_FN, FN_IP5_11_9, - GP_2_26_FN, FN_IP5_14_12, - GP_2_25_FN, FN_IP5_17_15, - GP_2_24_FN, FN_IP5_20_18, - GP_2_23_FN, FN_IP5_22_21, - GP_2_22_FN, FN_IP5_24_23, - GP_2_21_FN, FN_IP5_26_25, - GP_2_20_FN, FN_IP4_29_28, - GP_2_19_FN, FN_IP4_27_26, - GP_2_18_FN, FN_IP4_25_24, - GP_2_17_FN, FN_IP4_23_22, - GP_2_16_FN, FN_IP4_21_20, - GP_2_15_FN, FN_IP4_19_18, - GP_2_14_FN, FN_IP4_17_15, - GP_2_13_FN, FN_IP4_14_12, - GP_2_12_FN, FN_IP4_11_9, - GP_2_11_FN, FN_IP4_8_6, - GP_2_10_FN, FN_IP4_5_3, - GP_2_9_FN, FN_IP8_27_26, - GP_2_8_FN, FN_IP11_12, - GP_2_7_FN, FN_IP8_25_23, - GP_2_6_FN, FN_IP8_22_20, - GP_2_5_FN, FN_IP11_27_26, - GP_2_4_FN, FN_IP8_29_28, - GP_2_3_FN, FN_IP4_2_0, - GP_2_2_FN, FN_IP11_11_10, - GP_2_1_FN, FN_IP11_9_7, - GP_2_0_FN, FN_IP11_6_4 } - }, - { PINMUX_CFG_REG("GPSR3", 0xFFFC0010, 32, 1) { - GP_3_31_FN, FN_IP9_1_0, - GP_3_30_FN, FN_IP8_19_18, - GP_3_29_FN, FN_IP8_17_16, - GP_3_28_FN, FN_IP8_15_14, - GP_3_27_FN, FN_IP8_13_12, - GP_3_26_FN, FN_IP8_11_10, - GP_3_25_FN, FN_IP8_9_8, - GP_3_24_FN, FN_IP8_7_6, - GP_3_23_FN, FN_IP8_5_4, - GP_3_22_FN, FN_IP8_3_2, - GP_3_21_FN, FN_IP8_1_0, - GP_3_20_FN, FN_IP7_30_29, - GP_3_19_FN, FN_IP7_28_27, - GP_3_18_FN, FN_IP7_26_24, - GP_3_17_FN, FN_IP7_23_21, - GP_3_16_FN, FN_IP7_20_18, - GP_3_15_FN, FN_IP7_17_15, - GP_3_14_FN, FN_IP7_14_12, - GP_3_13_FN, FN_IP7_11_9, - GP_3_12_FN, FN_IP7_8_6, - GP_3_11_FN, FN_IP7_5_3, - GP_3_10_FN, FN_IP7_2_0, - GP_3_9_FN, FN_IP6_23_21, - GP_3_8_FN, FN_IP6_20_18, - GP_3_7_FN, FN_IP6_17_16, - GP_3_6_FN, FN_IP6_15_14, - GP_3_5_FN, FN_IP6_13_12, - GP_3_4_FN, FN_IP6_11_10, - GP_3_3_FN, FN_IP6_9_8, - GP_3_2_FN, FN_IP6_7_6, - GP_3_1_FN, FN_IP6_5_3, - GP_3_0_FN, FN_IP6_2_0 } - }, - - { PINMUX_CFG_REG("GPSR4", 0xFFFC0014, 32, 1) { - GP_4_31_FN, FN_IP10_24_23, - GP_4_30_FN, FN_IP10_22, - GP_4_29_FN, FN_IP11_18_16, - GP_4_28_FN, FN_USB_OVC0, - GP_4_27_FN, FN_IP11_15_13, - GP_4_26_FN, FN_PENC0, - GP_4_25_FN, FN_IP11_2, - GP_4_24_FN, FN_SCL0, - GP_4_23_FN, FN_IP11_1, - GP_4_22_FN, FN_IP11_0, - GP_4_21_FN, FN_IP10_21_19, - GP_4_20_FN, FN_IP10_18_16, - GP_4_19_FN, FN_IP10_15, - GP_4_18_FN, FN_IP10_14_12, - GP_4_17_FN, FN_IP10_11_9, - GP_4_16_FN, FN_IP10_8_6, - GP_4_15_FN, FN_IP10_5_3, - GP_4_14_FN, FN_IP10_2_0, - GP_4_13_FN, FN_IP9_29_28, - GP_4_12_FN, FN_IP9_27_26, - GP_4_11_FN, FN_IP9_9_8, - GP_4_10_FN, FN_IP9_7_6, - GP_4_9_FN, FN_IP9_5_4, - GP_4_8_FN, FN_IP9_3_2, - GP_4_7_FN, FN_IP9_17_16, - GP_4_6_FN, FN_IP9_15_14, - GP_4_5_FN, FN_IP9_13_12, - GP_4_4_FN, FN_IP9_11_10, - GP_4_3_FN, FN_IP9_25_24, - GP_4_2_FN, FN_IP9_23_22, - GP_4_1_FN, FN_IP9_21_20, - GP_4_0_FN, FN_IP9_19_18 } - }, - { PINMUX_CFG_REG("GPSR5", 0xFFFC0018, 32, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, /* 31 - 28 */ - 0, 0, 0, 0, 0, 0, 0, 0, /* 27 - 24 */ - 0, 0, 0, 0, 0, 0, 0, 0, /* 23 - 20 */ - 0, 0, 0, 0, 0, 0, 0, 0, /* 19 - 16 */ - 0, 0, 0, 0, 0, 0, 0, 0, /* 15 - 12 */ - GP_5_11_FN, FN_IP10_29_28, - GP_5_10_FN, FN_IP10_27_26, - 0, 0, 0, 0, 0, 0, 0, 0, /* 9 - 6 */ - 0, 0, 0, 0, /* 5, 4 */ - GP_5_3_FN, FN_IRQ3_B, - GP_5_2_FN, FN_IRQ2_B, - GP_5_1_FN, FN_IP11_3, - GP_5_0_FN, FN_IP10_25 } - }, - - { PINMUX_CFG_REG_VAR("IPSR0", 0xFFFC001C, 32, - 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2) { - /* IP0_31_30 [2] */ - FN_A15, FN_ST0_VCO_CLKIN, FN_LCD_DATA15_A, - FN_TIOC3D_C, - /* IP0_29_28 [2] */ - FN_A14, FN_LCD_DATA14_A, FN_TIOC3C_C, 0, - /* IP0_27_26 [2] */ - FN_A13, FN_LCD_DATA13_A, FN_TIOC3B_C, 0, - /* IP0_25_24 [2] */ - FN_A12, FN_LCD_DATA12_A, FN_TIOC3A_C, 0, - /* IP0_23_22 [2] */ - FN_A11, FN_ST0_D7, FN_LCD_DATA11_A, FN_TIOC2B_C, - /* IP0_21_20 [2] */ - FN_A10, FN_ST0_D6, FN_LCD_DATA10_A, FN_TIOC2A_C, - /* IP0_19_18 [2] */ - FN_A9, FN_ST0_D5, FN_LCD_DATA9_A, FN_TIOC1B_C, - /* IP0_17_16 [2] */ - FN_A8, FN_ST0_D4, FN_LCD_DATA8_A, FN_TIOC1A_C, - /* IP0_15_14 [2] */ - FN_A7, FN_ST0_D3, FN_LCD_DATA7_A, FN_TIOC0D_C, - /* IP0_13_12 [2] */ - FN_A6, FN_ST0_D2, FN_LCD_DATA6_A, FN_TIOC0C_C, - /* IP0_11_10 [2] */ - FN_A5, FN_ST0_D1, FN_LCD_DATA5_A, FN_TIOC0B_C, - /* IP0_9_8 [2] */ - FN_A4, FN_ST0_D0, FN_LCD_DATA4_A, FN_TIOC0A_C, - /* IP0_7_6 [2] */ - FN_A3, FN_ST0_VLD, FN_LCD_DATA3_A, FN_TCLKD_C, - /* IP0_5_4 [2] */ - FN_A2, FN_ST0_SYC, FN_LCD_DATA2_A, FN_TCLKC_C, - /* IP0_3_2 [2] */ - FN_A1, FN_ST0_REQ, FN_LCD_DATA1_A, FN_TCLKB_C, - /* IP0_1_0 [2] */ - FN_A0, FN_ST0_CLKIN, FN_LCD_DATA0_A, FN_TCLKA_C } - }, - { PINMUX_CFG_REG_VAR("IPSR1", 0xFFFC0020, 32, - 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2) { - /* IP1_31_29 [3] */ - FN_D3, FN_SD0_DAT3_A, FN_MMC_D3_A, FN_ST1_D6, - FN_FD3_A, 0, 0, 0, - /* IP1_28_26 [3] */ - FN_D2, FN_SD0_DAT2_A, FN_MMC_D2_A, FN_ST1_D5, - FN_FD2_A, 0, 0, 0, - /* IP1_25_23 [3] */ - FN_D1, FN_SD0_DAT1_A, FN_MMC_D1_A, FN_ST1_D4, - FN_FD1_A, 0, 0, 0, - /* IP1_22_20 [3] */ - FN_D0, FN_SD0_DAT0_A, FN_MMC_D0_A, FN_ST1_D3, - FN_FD0_A, 0, 0, 0, - /* IP1_19_18 [2] */ - FN_A25, FN_TX2_D, FN_ST1_D2, 0, - /* IP1_17_16 [2] */ - FN_A24, FN_RX2_D, FN_ST1_D1, 0, - /* IP1_15_14 [2] */ - FN_A23, FN_ST1_D0, FN_LCD_M_DISP_A, 0, - /* IP1_13_12 [2] */ - FN_A22, FN_ST1_VLD, FN_LCD_VEPWC_A, 0, - /* IP1_11_10 [2] */ - FN_A21, FN_ST1_SYC, FN_LCD_VCPWC_A, 0, - /* IP1_9_8 [2] */ - FN_A20, FN_ST1_REQ, FN_LCD_FLM_A, 0, - /* IP1_7_6 [2] */ - FN_A19, FN_ST1_CLKIN, FN_LCD_CLK_A, FN_TIOC4D_C, - /* IP1_5_4 [2] */ - FN_A18, FN_ST1_PWM, FN_LCD_CL2_A, FN_TIOC4C_C, - /* IP1_3_2 [2] */ - FN_A17, FN_ST1_VCO_CLKIN, FN_LCD_CL1_A, FN_TIOC4B_C, - /* IP1_1_0 [2] */ - FN_A16, FN_ST0_PWM, FN_LCD_DON_A, FN_TIOC4A_C } - }, - { PINMUX_CFG_REG_VAR("IPSR2", 0xFFFC0024, 32, - 1, 3, 3, 2, 3, 3, 3, 3, 3, 3, 2, 3) { - /* IP2_31 [1] */ - 0, 0, - /* IP2_30_28 [3] */ - FN_D14, FN_TX2_B, 0, FN_FSE_A, - FN_ET0_TX_CLK_B, 0, 0, 0, - /* IP2_27_25 [3] */ - FN_D13, FN_RX2_B, 0, FN_FRB_A, - FN_ET0_ETXD6_B, 0, 0, 0, - /* IP2_24_23 [2] */ - FN_D12, 0, FN_FWE_A, FN_ET0_ETXD5_B, - /* IP2_22_20 [3] */ - FN_D11, FN_RSPI_MISO_A, 0, FN_QMI_QIO1_A, - FN_FRE_A, FN_ET0_ETXD3_B, 0, 0, - /* IP2_19_17 [3] */ - FN_D10, FN_RSPI_MOSI_A, 0, FN_QMO_QIO0_A, - FN_FALE_A, FN_ET0_ETXD2_B, 0, 0, - /* IP2_16_14 [3] */ - FN_D9, FN_SD0_CMD_A, FN_MMC_CMD_A, FN_QIO3_A, - FN_FCLE_A, FN_ET0_ETXD1_B, 0, 0, - /* IP2_13_11 [3] */ - FN_D8, FN_SD0_CLK_A, FN_MMC_CLK_A, FN_QIO2_A, - FN_FCE_A, FN_ET0_GTX_CLK_B, 0, 0, - /* IP2_10_8 [3] */ - FN_D7, FN_RSPI_SSL_A, FN_MMC_D7_A, FN_QSSL_A, - FN_FD7_A, 0, 0, 0, - /* IP2_7_5 [3] */ - FN_D6, FN_RSPI_RSPCK_A, FN_MMC_D6_A, FN_QSPCLK_A, - FN_FD6_A, 0, 0, 0, - /* IP2_4_3 [2] */ - FN_D5, FN_SD0_WP_A, FN_MMC_D5_A, FN_FD5_A, - /* IP2_2_0 [3] */ - FN_D4, FN_SD0_CD_A, FN_MMC_D4_A, FN_ST1_D7, - FN_FD4_A, 0, 0, 0 } - }, - { PINMUX_CFG_REG_VAR("IPSR3", 0xFFFC0028, 32, - 2, 3, 3, 3, 1, 2, 3, 3, 3, 3, 3, 1, 2) { - /* IP3_31_30 [2] */ - 0, 0, 0, 0, - /* IP3_29_27 [3] */ - FN_DRACK0, FN_SD1_DAT2_A, FN_ATAG, FN_TCLK1_A, - FN_ET0_ETXD7, 0, 0, 0, - /* IP3_26_24 [3] */ - FN_EX_WAIT2, FN_SD1_DAT1_A, FN_DACK2, FN_CAN1_RX_C, - FN_ET0_MAGIC_C, FN_ET0_ETXD6_A, 0, 0, - /* IP3_23_21 [3] */ - FN_EX_WAIT1, FN_SD1_DAT0_A, FN_DREQ2, FN_CAN1_TX_C, - FN_ET0_LINK_C, FN_ET0_ETXD5_A, 0, 0, - /* IP3_20 [1] */ - FN_EX_WAIT0, FN_TCLK1_B, - /* IP3_19_18 [2] */ - FN_RD_WR, FN_TCLK1_B, 0, 0, - /* IP3_17_15 [3] */ - FN_EX_CS5, FN_SD1_CMD_A, FN_ATADIR, FN_QSSL_B, - FN_ET0_ETXD3_A, 0, 0, 0, - /* IP3_14_12 [3] */ - FN_EX_CS4, FN_SD1_WP_A, FN_ATAWR, FN_QMI_QIO1_B, - FN_ET0_ETXD2_A, 0, 0, 0, - /* IP3_11_9 [3] */ - FN_EX_CS3, FN_SD1_CD_A, FN_ATARD, FN_QMO_QIO0_B, - FN_ET0_ETXD1_A, 0, 0, 0, - /* IP3_8_6 [3] */ - FN_EX_CS2, FN_TX3_B, FN_ATACS1, FN_QSPCLK_B, - FN_ET0_GTX_CLK_A, 0, 0, 0, - /* IP3_5_3 [3] */ - FN_EX_CS1, FN_RX3_B, FN_ATACS0, FN_QIO2_B, - FN_ET0_ETXD0, 0, 0, 0, - /* IP3_2 [1] */ - FN_CS1_A26, FN_QIO3_B, - /* IP3_1_0 [2] */ - FN_D15, FN_SCK2_B, 0, 0 } - }, - { PINMUX_CFG_REG_VAR("IPSR4", 0xFFFC002C, 32, - 2, 2, 2, 2, 2, 2 , 2, 3, 3, 3, 3, 3, 3) { - /* IP4_31_30 [2] */ - 0, FN_SCK2_A, FN_VI0_G3, 0, - /* IP4_29_28 [2] */ - 0, FN_RTS1_B, FN_VI0_G2, 0, - /* IP4_27_26 [2] */ - 0, FN_CTS1_B, FN_VI0_DATA7_VI0_G1, 0, - /* IP4_25_24 [2] */ - 0, FN_TX1_B, FN_VI0_DATA6_VI0_G0, FN_ET0_PHY_INT_A, - /* IP4_23_22 [2] */ - 0, FN_RX1_B, FN_VI0_DATA5_VI0_B5, FN_ET0_MAGIC_A, - /* IP4_21_20 [2] */ - 0, FN_SCK1_B, FN_VI0_DATA4_VI0_B4, FN_ET0_LINK_A, - /* IP4_19_18 [2] */ - 0, FN_RTS0_B, FN_VI0_DATA3_VI0_B3, FN_ET0_MDIO_A, - /* IP4_17_15 [3] */ - 0, FN_CTS0_B, FN_VI0_DATA2_VI0_B2, FN_RMII0_MDIO_A, - FN_ET0_MDC, 0, 0, 0, - /* IP4_14_12 [3] */ - FN_HTX0_A, FN_TX1_A, FN_VI0_DATA1_VI0_B1, FN_RMII0_MDC_A, - FN_ET0_COL, 0, 0, 0, - /* IP4_11_9 [3] */ - FN_HRX0_A, FN_RX1_A, FN_VI0_DATA0_VI0_B0, FN_RMII0_CRS_DV_A, - FN_ET0_CRS, 0, 0, 0, - /* IP4_8_6 [3] */ - FN_HSCK0_A, FN_SCK1_A, FN_VI0_VSYNC, FN_RMII0_RX_ER_A, - FN_ET0_RX_ER, 0, 0, 0, - /* IP4_5_3 [3] */ - FN_HRTS0_A, FN_RTS1_A, FN_VI0_HSYNC, FN_RMII0_TXD_EN_A, - FN_ET0_RX_DV, 0, 0, 0, - /* IP4_2_0 [3] */ - FN_HCTS0_A, FN_CTS1_A, FN_VI0_FIELD, FN_RMII0_RXD1_A, - FN_ET0_ERXD7, 0, 0, 0 } - }, - { PINMUX_CFG_REG_VAR("IPSR5", 0xFFFC0030, 32, - 1, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3) { - /* IP5_31 [1] */ - 0, 0, - /* IP5_30 [1] */ - 0, 0, - /* IP5_29 [1] */ - 0, 0, - /* IP5_28 [1] */ - 0, 0, - /* IP5_27 [1] */ - 0, 0, - /* IP5_26_25 [2] */ - FN_REF50CK, FN_CTS1_E, FN_HCTS0_D, 0, - /* IP5_24_23 [2] */ - FN_REF125CK, FN_ADTRG, FN_RX5_C, 0, - /* IP5_22_21 [2] */ - FN_SD2_WP_A, FN_TX5_A, FN_VI0_R5, 0, - /* IP5_20_18 [3] */ - FN_SD2_CD_A, FN_RX5_A, FN_VI0_R4, 0, - 0, 0, 0, FN_ET0_PHY_INT_B, - /* IP5_17_15 [3] */ - FN_SD2_DAT3_A, FN_TX4_A, FN_VI0_R3, 0, - 0, 0, 0, FN_ET0_MAGIC_B, - /* IP5_14_12 [3] */ - FN_SD2_DAT2_A, FN_RX4_A, FN_VI0_R2, 0, - 0, 0, 0, FN_ET0_LINK_B, - /* IP5_11_9 [3] */ - FN_SD2_DAT1_A, FN_TX3_A, FN_VI0_R1, 0, - 0, 0, 0, FN_ET0_MDIO_B, - /* IP5_8_6 [3] */ - FN_SD2_DAT0_A, FN_RX3_A, FN_VI0_R0, 0, - 0, 0, 0, FN_ET0_ERXD3_B, - /* IP5_5_3 [3] */ - FN_SD2_CMD_A, FN_TX2_A, FN_VI0_G5, 0, - 0, 0, 0, FN_ET0_ERXD2_B, - /* IP5_2_0 [3] */ - FN_SD2_CLK_A, FN_RX2_A, FN_VI0_G4, 0, - FN_ET0_RX_CLK_B, 0, 0, 0 } - }, - { PINMUX_CFG_REG_VAR("IPSR6", 0xFFFC0034, 32, - 1, 1, 1, 1, 1, 1, 1, 1, - 3, 3, 2, 2, 2, 2, 2, 2, 3, 3) { - /* IP5_31 [1] */ - 0, 0, - /* IP6_30 [1] */ - 0, 0, - /* IP6_29 [1] */ - 0, 0, - /* IP6_28 [1] */ - 0, 0, - /* IP6_27 [1] */ - 0, 0, - /* IP6_26 [1] */ - 0, 0, - /* IP6_25 [1] */ - 0, 0, - /* IP6_24 [1] */ - 0, 0, - /* IP6_23_21 [3] */ - FN_DU0_DG1, FN_CTS1_C, FN_HRTS0_D, FN_TIOC1B_A, - FN_HIFD09, 0, 0, 0, - /* IP6_20_18 [3] */ - FN_DU0_DG0, FN_TX1_C, FN_HSCK0_D, FN_IECLK_A, - FN_TIOC1A_A, FN_HIFD08, 0, 0, - /* IP6_17_16 [2] */ - FN_DU0_DR7, FN_RX1_C, FN_TIOC0D_A, FN_HIFD07, - /* IP6_15_14 [2] */ - FN_DU0_DR6, FN_SCK1_C, FN_TIOC0C_A, FN_HIFD06, - /* IP6_13_12 [2] */ - FN_DU0_DR5, FN_RTS0_C, FN_TIOC0B_A, FN_HIFD05, - /* IP6_11_10 [2] */ - FN_DU0_DR4, FN_CTS0_C, FN_TIOC0A_A, FN_HIFD04, - /* IP6_9_8 [2] */ - FN_DU0_DR3, FN_TX0_B, FN_TCLKD_A, FN_HIFD03, - /* IP6_7_6 [2] */ - FN_DU0_DR2, FN_RX0_B, FN_TCLKC_A, FN_HIFD02, - /* IP6_5_3 [3] */ - FN_DU0_DR1, FN_SCK0_B, FN_HTX0_D, FN_IERX_A, - FN_TCLKB_A, FN_HIFD01, 0, 0, - /* IP6_2_0 [3] */ - FN_DU0_DR0, FN_SCIF_CLK_B, FN_HRX0_D, FN_IETX_A, - FN_TCLKA_A, FN_HIFD00, 0, 0 } - }, - { PINMUX_CFG_REG_VAR("IPSR7", 0xFFFC0038, 32, - 1, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3) { - /* IP7_31 [1] */ - 0, 0, - /* IP7_30_29 [2] */ - FN_DU0_DB4, 0, FN_HIFINT, 0, - /* IP7_28_27 [2] */ - FN_DU0_DB3, FN_TX5_B, FN_TIOC4D_A, FN_HIFRD, - /* IP7_26_24 [3] */ - FN_DU0_DB2, FN_RX5_B, FN_RMII0_TXD1_B, FN_TIOC4C_A, - FN_HIFWR, 0, 0, 0, - /* IP7_23_21 [3] */ - FN_DU0_DB1, FN_TX4_C, FN_RMII0_TXD0_B, FN_TIOC4B_A, - FN_HIFRS, 0, 0, 0, - /* IP7_20_18 [3] */ - FN_DU0_DB0, FN_RX4_C, FN_RMII0_TXD_EN_B, FN_TIOC4A_A, - FN_HIFCS, 0, 0, 0, - /* IP7_17_15 [3] */ - FN_DU0_DG7, FN_TX3_C, FN_RMII0_RXD1_B, FN_TIOC3D_A, - FN_HIFD15, 0, 0, 0, - /* IP7_14_12 [3] */ - FN_DU0_DG6, FN_RX3_C, FN_RMII0_RXD0_B, FN_TIOC3C_A, - FN_HIFD14, 0, 0, 0, - /* IP7_11_9 [3] */ - FN_DU0_DG5, FN_TX2_C, FN_RMII0_RX_ER_B, FN_TIOC3B_A, - FN_HIFD13, 0, 0, 0, - /* IP7_8_6 [3] */ - FN_DU0_DG4, FN_RX2_C, FN_RMII0_CRS_DV_B, FN_TIOC3A_A, - FN_HIFD12, 0, 0, 0, - /* IP7_5_3 [3] */ - FN_DU0_DG3, FN_SCK2_C, FN_RMII0_MDIO_B, FN_TIOC2B_A, - FN_HIFD11, 0, 0, 0, - /* IP7_2_0 [3] */ - FN_DU0_DG2, FN_RTS1_C, FN_RMII0_MDC_B, FN_TIOC2A_A, - FN_HIFD10, 0, 0, 0 } - }, - { PINMUX_CFG_REG_VAR("IPSR8", 0xFFFC003C, 32, - 2, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2) { - /* IP9_31_30 [2] */ - 0, 0, 0, 0, - /* IP8_29_28 [2] */ - FN_IRQ3_A, FN_RTS0_A, FN_HRTS0_B, FN_ET0_ERXD3_A, - /* IP8_27_26 [2] */ - FN_IRQ2_A, FN_CTS0_A, FN_HCTS0_B, FN_ET0_ERXD2_A, - /* IP8_25_23 [3] */ - FN_IRQ1_A, 0, FN_HSPI_RX_B, FN_TX3_E, - FN_ET0_ERXD1, 0, 0, 0, - /* IP8_22_20 [3] */ - FN_IRQ0_A, 0, FN_HSPI_TX_B, FN_RX3_E, - FN_ET0_ERXD0, 0, 0, 0, - /* IP8_19_18 [2] */ - FN_DU0_CDE, FN_HTX0_B, FN_AUDIO_CLKB_B, FN_LCD_VCPWC_B, - /* IP8_17_16 [2] */ - FN_DU0_DISP, FN_CAN0_TX_B, FN_HRX0_B, FN_AUDIO_CLKA_B, - /* IP8_15_14 [2] */ - FN_DU0_EXODDF_DU0_ODDF, FN_CAN0_RX_B, FN_HSCK0_B, - FN_SSI_SDATA1_B, - /* IP8_13_12 [2] */ - FN_DU0_EXVSYNC_DU0_VSYNC, 0, FN_HSPI_RX0_C, FN_SSI_WS1_B, - /* IP8_11_10 [2] */ - FN_DU0_EXHSYNC_DU0_HSYNC, 0, FN_HSPI_TX0_C, FN_SSI_SCK1_B, - /* IP8_9_8 [2] */ - FN_DU0_DOTCLKOUT, 0, FN_HSPI_CLK0_C, FN_SSI_SDATA0_B, - /* IP8_7_6 [2] */ - FN_DU0_DOTCLKIN, 0, FN_HSPI_CS0_C, FN_SSI_WS0_B, - /* IP8_5_4 [2] */ - FN_DU0_DB7, 0, FN_SSI_SCK0_B, FN_HIFEBL_B, - /* IP8_3_2 [2] */ - FN_DU0_DB6, 0, FN_HIFRDY, 0, - /* IP8_1_0 [2] */ - FN_DU0_DB5, 0, FN_HIFDREQ, 0 } - }, - { PINMUX_CFG_REG_VAR("IPSR9", 0xFFFC0040, 32, - 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2) { - /* IP9_31_30 [2] */ - 0, 0, 0, 0, - /* IP9_29_28 [2] */ - FN_SSI_SDATA1_A, FN_VI1_3_B, FN_LCD_DATA14_B, 0, - /* IP9_27_26 [2] */ - FN_SSI_WS1_A, FN_VI1_2_B, FN_LCD_DATA13_B, 0, - /* IP9_25_24 [2] */ - FN_SSI_SCK1_A, FN_VI1_1_B, FN_TIOC2B_B, FN_LCD_DATA12_B, - /* IP9_23_22 [2] */ - FN_SSI_SDATA0_A, FN_VI1_0_B, FN_TIOC2A_B, FN_LCD_DATA11_B, - /* IP9_21_20 [2] */ - FN_SSI_WS0_A, FN_TIOC1B_B, FN_LCD_DATA10_B, 0, - /* IP9_19_18 [2] */ - FN_SSI_SCK0_A, FN_TIOC1A_B, FN_LCD_DATA9_B, 0, - /* IP9_17_16 [2] */ - FN_VI1_7_A, FN_FCE_B, FN_LCD_DATA8_B, 0, - /* IP9_15_14 [2] */ - FN_VI1_6_A, 0, FN_FD7_B, FN_LCD_DATA7_B, - /* IP9_13_12 [2] */ - FN_VI1_5_A, 0, FN_FD6_B, FN_LCD_DATA6_B, - /* IP9_11_10 [2] */ - FN_VI1_4_A, 0, FN_FD5_B, FN_LCD_DATA5_B, - /* IP9_9_8 [2] */ - FN_VI1_3_A, 0, FN_FD4_B, FN_LCD_DATA4_B, - /* IP9_7_6 [2] */ - FN_VI1_2_A, 0, FN_FD3_B, FN_LCD_DATA3_B, - /* IP9_5_4 [2] */ - FN_VI1_1_A, 0, FN_FD2_B, FN_LCD_DATA2_B, - /* IP9_3_2 [2] */ - FN_VI1_0_A, 0, FN_FD1_B, FN_LCD_DATA1_B, - /* IP9_1_0 [2] */ - FN_VI1_CLK_A, 0, FN_FD0_B, FN_LCD_DATA0_B } - }, - { PINMUX_CFG_REG_VAR("IPSR10", 0xFFFC0044, 32, - 2, 2, 2, 1, 2, 1, 3, - 3, 1, 3, 3, 3, 3, 3) { - /* IP9_31_30 [2] */ - 0, 0, 0, 0, - /* IP10_29_28 [2] */ - FN_CAN1_TX_A, FN_TX5_C, FN_MLB_DAT, 0, - /* IP10_27_26 [2] */ - FN_CAN0_RX_A, FN_IRQ0_B, FN_MLB_SIG, 0, - /* IP10_25 [1] */ - FN_CAN1_RX_A, FN_IRQ1_B, - /* IP10_24_23 [2] */ - FN_CAN0_TX_A, FN_TX4_D, FN_MLB_CLK, 0, - /* IP10_22 [1] */ - FN_CAN_CLK_A, FN_RX4_D, - /* IP10_21_19 [3] */ - FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B, - FN_LCD_M_DISP_B, 0, 0, 0, - /* IP10_18_16 [3] */ - FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B, - FN_LCD_VEPWC_B, 0, 0, 0, - /* IP10_15 [1] */ - FN_AUDIO_CLKB_A, FN_LCD_CLK_B, - /* IP10_14_12 [3] */ - FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B, - FN_LCD_FLM_B, 0, 0, 0, - /* IP10_11_9 [3] */ - FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B, - FN_LCD_CL2_B, 0, 0, 0, - /* IP10_8_6 [3] */ - FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B, - FN_LCD_CL1_B, 0, 0, 0, - /* IP10_5_3 [3] */ - FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B, - FN_LCD_DON_B, 0, 0, 0, - /* IP10_2_0 [3] */ - FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B, - FN_LCD_DATA15_B, 0, 0, 0 } - }, - { PINMUX_CFG_REG_VAR("IPSR11", 0xFFFC0048, 32, - 3, 1, 2, 2, 2, 3, 3, 1, 2, 3, 3, 1, 1, 1, 1) { - /* IP11_31_29 [3] */ - 0, 0, 0, 0, 0, 0, 0, 0, - /* IP11_28 [1] */ - FN_PRESETOUT, FN_ST_CLKOUT, - /* IP11_27_26 [2] */ - FN_DACK1, FN_HSPI_CS_B, FN_TX4_B, FN_ET0_RX_CLK_A, - /* IP11_25_23 [3] */ - FN_DREQ1, FN_HSPI_CLK_B, FN_RX4_B, FN_ET0_PHY_INT_C, - FN_ET0_TX_CLK_A, 0, 0, 0, - /* IP11_22_21 [2] */ - FN_DACK0, FN_SD1_DAT3_A, FN_ET0_TX_ER, 0, - /* IP11_20_19 [2] */ - FN_DREQ0, FN_SD1_CLK_A, FN_ET0_TX_EN, 0, - /* IP11_18_16 [3] */ - FN_USB_OVC1, FN_RX3_D, FN_CAN1_RX_B, FN_RX5_D, - FN_IERX_B, 0, 0, 0, - /* IP11_15_13 [3] */ - FN_PENC1, FN_TX3_D, FN_CAN1_TX_B, FN_TX5_D, - FN_IETX_B, 0, 0, 0, - /* IP11_12 [1] */ - FN_TX0_A, FN_HSPI_TX_A, - /* IP11_11_10 [2] */ - FN_RX0_A, FN_HSPI_RX_A, FN_RMII0_RXD0_A, FN_ET0_ERXD6, - /* IP11_9_7 [3] */ - FN_SCK0_A, FN_HSPI_CS_A, FN_VI0_CLKENB, FN_RMII0_TXD1_A, - FN_ET0_ERXD5, 0, 0, 0, - /* IP11_6_4 [3] */ - FN_SCIF_CLK_A, FN_HSPI_CLK_A, FN_VI0_CLK, FN_RMII0_TXD0_A, - FN_ET0_ERXD4, 0, 0, 0, - /* IP11_3 [1] */ - FN_SDSELF, FN_RTS1_E, - /* IP11_2 [1] */ - FN_SDA0, FN_HIFEBL_A, - /* IP11_1 [1] */ - FN_SDA1, FN_RX1_E, - /* IP11_0 [1] */ - FN_SCL1, FN_SCIF_CLK_C } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xFFFC004C, 32, - 3, 1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 2, 2, - 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) { - /* SEL1_31_29 [3] */ - 0, 0, 0, 0, 0, 0, 0, 0, - /* SEL1_28 [1] */ - FN_SEL_IEBUS_0, FN_SEL_IEBUS_1, - /* SEL1_27 [1] */ - FN_SEL_RQSPI_0, FN_SEL_RQSPI_1, - /* SEL1_26 [1] */ - FN_SEL_VIN1_0, FN_SEL_VIN1_1, - /* SEL1_25 [1] */ - FN_SEL_HIF_0, FN_SEL_HIF_1, - /* SEL1_24 [1] */ - FN_SEL_RSPI_0, FN_SEL_RSPI_1, - /* SEL1_23 [1] */ - FN_SEL_LCDC_0, FN_SEL_LCDC_1, - /* SEL1_22_21 [2] */ - FN_SEL_ET0_CTL_0, FN_SEL_ET0_CTL_1, FN_SEL_ET0_CTL_2, 0, - /* SEL1_20 [1] */ - FN_SEL_ET0_0, FN_SEL_ET0_1, - /* SEL1_19 [1] */ - FN_SEL_RMII_0, FN_SEL_RMII_1, - /* SEL1_18 [1] */ - FN_SEL_TMU_0, FN_SEL_TMU_1, - /* SEL1_17_16 [2] */ - FN_SEL_HSPI_0, FN_SEL_HSPI_1, FN_SEL_HSPI_2, 0, - /* SEL1_15_14 [2] */ - FN_SEL_HSCIF_0, FN_SEL_HSCIF_1, FN_SEL_HSCIF_2, FN_SEL_HSCIF_3, - /* SEL1_13 [1] */ - FN_SEL_RCAN_CLK_0, FN_SEL_RCAN_CLK_1, - /* SEL1_12_11 [2] */ - FN_SEL_RCAN1_0, FN_SEL_RCAN1_1, FN_SEL_RCAN1_2, 0, - /* SEL1_10 [1] */ - FN_SEL_RCAN0_0, FN_SEL_RCAN0_1, - /* SEL1_9 [1] */ - FN_SEL_SDHI2_0, FN_SEL_SDHI2_1, - /* SEL1_8 [1] */ - FN_SEL_SDHI1_0, FN_SEL_SDHI1_1, - /* SEL1_7 [1] */ - FN_SEL_SDHI0_0, FN_SEL_SDHI0_1, - /* SEL1_6 [1] */ - FN_SEL_SSI1_0, FN_SEL_SSI1_1, - /* SEL1_5 [1] */ - FN_SEL_SSI0_0, FN_SEL_SSI0_1, - /* SEL1_4 [1] */ - FN_SEL_AUDIO_CLKB_0, FN_SEL_AUDIO_CLKB_1, - /* SEL1_3 [1] */ - FN_SEL_AUDIO_CLKA_0, FN_SEL_AUDIO_CLKA_1, - /* SEL1_2 [1] */ - FN_SEL_FLCTL_0, FN_SEL_FLCTL_1, - /* SEL1_1 [1] */ - FN_SEL_MMC_0, FN_SEL_MMC_1, - /* SEL1_0 [1] */ - FN_SEL_INTC_0, FN_SEL_INTC_1 } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xFFFC0050, 32, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 2, 2, 1, 2, 2, 3, 2, 3, 2, 2) { - /* SEL2_31 [1] */ - 0, 0, - /* SEL2_30 [1] */ - 0, 0, - /* SEL2_29 [1] */ - 0, 0, - /* SEL2_28 [1] */ - 0, 0, - /* SEL2_27 [1] */ - 0, 0, - /* SEL2_26 [1] */ - 0, 0, - /* SEL2_25 [1] */ - 0, 0, - /* SEL2_24 [1] */ - 0, 0, - /* SEL2_23 [1] */ - FN_SEL_MTU2_CLK_0, FN_SEL_MTU2_CLK_1, - /* SEL2_22 [1] */ - FN_SEL_MTU2_CH4_0, FN_SEL_MTU2_CH4_1, - /* SEL2_21 [1] */ - FN_SEL_MTU2_CH3_0, FN_SEL_MTU2_CH3_1, - /* SEL2_20_19 [2] */ - FN_SEL_MTU2_CH2_0, FN_SEL_MTU2_CH2_1, FN_SEL_MTU2_CH2_2, 0, - /* SEL2_18_17 [2] */ - FN_SEL_MTU2_CH1_0, FN_SEL_MTU2_CH1_1, FN_SEL_MTU2_CH1_2, 0, - /* SEL2_16 [1] */ - FN_SEL_MTU2_CH0_0, FN_SEL_MTU2_CH0_1, - /* SEL2_15_14 [2] */ - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3, - /* SEL2_13_12 [2] */ - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3, - /* SEL2_11_9 [3] */ - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, - FN_SEL_SCIF3_4, 0, 0, 0, - /* SEL2_8_7 [2] */ - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3, - /* SEL2_6_4 [3] */ - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, - FN_SEL_SCIF1_4, 0, 0, 0, - /* SEL2_3_2 [2] */ - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, 0, - /* SEL2_1_0 [2] */ - FN_SEL_SCIF_CLK_0, FN_SEL_SCIF_CLK_1, FN_SEL_SCIF_CLK_2, 0 } - }, - /* GPIO 0 - 5*/ - { PINMUX_CFG_REG("INOUTSEL0", 0xFFC40004, 32, 1) { GP_INOUTSEL(0) } }, - { PINMUX_CFG_REG("INOUTSEL1", 0xFFC41004, 32, 1) { GP_INOUTSEL(1) } }, - { PINMUX_CFG_REG("INOUTSEL2", 0xFFC42004, 32, 1) { GP_INOUTSEL(2) } }, - { PINMUX_CFG_REG("INOUTSEL3", 0xFFC43004, 32, 1) { GP_INOUTSEL(3) } }, - { PINMUX_CFG_REG("INOUTSEL4", 0xFFC44004, 32, 1) { GP_INOUTSEL(4) } }, - { PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 31 - 24 */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 23 - 16 */ - 0, 0, 0, 0, 0, 0, 0, 0, /* 15 - 12 */ - GP_5_11_IN, GP_5_11_OUT, - GP_5_10_IN, GP_5_10_OUT, - GP_5_9_IN, GP_5_9_OUT, - GP_5_8_IN, GP_5_8_OUT, - GP_5_7_IN, GP_5_7_OUT, - GP_5_6_IN, GP_5_6_OUT, - GP_5_5_IN, GP_5_5_OUT, - GP_5_4_IN, GP_5_4_OUT, - GP_5_3_IN, GP_5_3_OUT, - GP_5_2_IN, GP_5_2_OUT, - GP_5_1_IN, GP_5_1_OUT, - GP_5_0_IN, GP_5_0_OUT } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - /* GPIO 0 - 5*/ - { PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32) { GP_INDT(0) } }, - { PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32) { GP_INDT(1) } }, - { PINMUX_DATA_REG("INDT2", 0xFFC4200C, 32) { GP_INDT(2) } }, - { PINMUX_DATA_REG("INDT3", 0xFFC4300C, 32) { GP_INDT(3) } }, - { PINMUX_DATA_REG("INDT4", 0xFFC4400C, 32) { GP_INDT(4) } }, - { PINMUX_DATA_REG("INDT5", 0xFFC4500C, 32) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, - GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA, - GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA, - GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA } - }, - { }, -}; - -static struct resource sh7734_pfc_resources[] = { - [0] = { /* PFC */ - .start = 0xFFFC0000, - .end = 0xFFFC011C, - .flags = IORESOURCE_MEM, - }, - [1] = { /* GPIO */ - .start = 0xFFC40000, - .end = 0xFFC4502B, - .flags = IORESOURCE_MEM, - } -}; - -static struct pinmux_info sh7734_pinmux_info = { - .name = "sh7734_pfc", - - .resource = sh7734_pfc_resources, - .num_resources = ARRAY_SIZE(sh7734_pfc_resources), - - .unlock_reg = 0xFFFC0000, - - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_GP_0_0, - .last_gpio = GPIO_FN_ST_CLKOUT, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -static int __init plat_pinmux_setup(void) -{ - return register_pinmux(&sh7734_pinmux_info); -} -arch_initcall(plat_pinmux_setup); diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 5773643b8a53..1b8848317e9c 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7343.c @@ -22,7 +22,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)), + .irqs = { 80, 80, 80, 80 }, }; static struct platform_device scif0_device = { @@ -39,7 +39,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)), + .irqs = { 81, 81, 81, 81 }, }; static struct platform_device scif1_device = { @@ -56,7 +56,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC40)), + .irqs = { 82, 82, 82, 82 }, }; static struct platform_device scif2_device = { @@ -73,7 +73,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC60)), + .irqs = { 83, 83, 83, 83 }, }; static struct platform_device scif3_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index 20f9e366a814..87773869a2f3 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7366.c @@ -25,7 +25,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)), + .irqs = { 80, 80, 80, 80 }, }; static struct platform_device scif0_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index 34b2ee5805d3..8420d4bc8bfc 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7722.c @@ -182,7 +182,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)), + .irqs = { 80, 80, 80, 80 }, .ops = &sh7722_sci_port_ops, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; @@ -201,7 +201,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)), + .irqs = { 81, 81, 81, 81 }, .ops = &sh7722_sci_port_ops, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; @@ -220,7 +220,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC40)), + .irqs = { 82, 82, 82, 82 }, .ops = &sh7722_sci_port_ops, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 3c1da7e3067d..a188c9ea4393 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7723.c @@ -28,7 +28,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)), + .irqs = { 80, 80, 80, 80 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; @@ -47,7 +47,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)), + .irqs = { 81, 81, 81, 81 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; @@ -66,7 +66,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC40)), + .irqs = { 82, 82, 82, 82 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index 20623baeb1c6..4c671cfe68aa 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7724.c @@ -295,7 +295,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)), + .irqs = { 80, 80, 80, 80 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; @@ -314,7 +314,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)), + .irqs = { 81, 81, 81, 81 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; @@ -333,7 +333,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xC40)), + .irqs = { 82, 82, 82, 82 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; @@ -352,7 +352,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE, .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)), + .irqs = { 56, 56, 56, 56 }, }; static struct platform_device scif3_device = { @@ -370,7 +370,7 @@ static struct plat_sci_port scif4_platform_data = { .scscr = SCSCR_RE | SCSCR_TE, .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xD00)), + .irqs = { 88, 88, 88, 88 }, }; static struct platform_device scif4_device = { @@ -388,7 +388,7 @@ static struct plat_sci_port scif5_platform_data = { .scscr = SCSCR_RE | SCSCR_TE, .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xFA0)), + .irqs = { 109, 109, 109, 109 }, }; static struct platform_device scif5_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7734.c deleted file mode 100644 index f799971d453c..000000000000 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7734.c +++ /dev/null @@ -1,800 +0,0 @@ -/* - * arch/sh/kernel/cpu/sh4a/setup-sh7734.c - - * SH7734 Setup - * - * Copyright (C) 2011,2012 Nobuhiro Iwamatsu - * Copyright (C) 2011,2012 Renesas Solutions Corp. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* SCIF */ -static struct plat_sci_port scif0_platform_data = { - .mapbase = 0xFFE40000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x8C0)), - .regtype = SCIx_SH4_SCIF_REGTYPE, -}; - -static struct platform_device scif0_device = { - .name = "sh-sci", - .id = 0, - .dev = { - .platform_data = &scif0_platform_data, - }, -}; - -static struct plat_sci_port scif1_platform_data = { - .mapbase = 0xFFE41000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x8E0)), - .regtype = SCIx_SH4_SCIF_REGTYPE, -}; - -static struct platform_device scif1_device = { - .name = "sh-sci", - .id = 1, - .dev = { - .platform_data = &scif1_platform_data, - }, -}; - -static struct plat_sci_port scif2_platform_data = { - .mapbase = 0xFFE42000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)), - .regtype = SCIx_SH4_SCIF_REGTYPE, -}; - -static struct platform_device scif2_device = { - .name = "sh-sci", - .id = 2, - .dev = { - .platform_data = &scif2_platform_data, - }, -}; - -static struct plat_sci_port scif3_platform_data = { - .mapbase = 0xFFE43000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x920)), - .regtype = SCIx_SH4_SCIF_REGTYPE, -}; - -static struct platform_device scif3_device = { - .name = "sh-sci", - .id = 3, - .dev = { - .platform_data = &scif3_platform_data, - }, -}; - -static struct plat_sci_port scif4_platform_data = { - .mapbase = 0xFFE44000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x940)), - .regtype = SCIx_SH4_SCIF_REGTYPE, -}; - -static struct platform_device scif4_device = { - .name = "sh-sci", - .id = 4, - .dev = { - .platform_data = &scif4_platform_data, - }, -}; - -static struct plat_sci_port scif5_platform_data = { - .mapbase = 0xFFE43000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, - .scbrr_algo_id = SCBRR_ALGO_2, - .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x960)), - .regtype = SCIx_SH4_SCIF_REGTYPE, -}; - -static struct platform_device scif5_device = { - .name = "sh-sci", - .id = 5, - .dev = { - .platform_data = &scif5_platform_data, - }, -}; - -/* RTC */ -static struct resource rtc_resources[] = { - [0] = { - .name = "rtc", - .start = 0xFFFC5000, - .end = 0xFFFC5000 + 0x26 - 1, - .flags = IORESOURCE_IO, - }, - [1] = { - .start = evt2irq(0xC00), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device rtc_device = { - .name = "sh-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(rtc_resources), - .resource = rtc_resources, -}; - -/* I2C 0 */ -static struct resource i2c0_resources[] = { - [0] = { - .name = "IIC0", - .start = 0xFFC70000, - .end = 0xFFC7000A - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x860), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device i2c0_device = { - .name = "i2c-sh7734", - .id = 0, - .num_resources = ARRAY_SIZE(i2c0_resources), - .resource = i2c0_resources, -}; - -/* TMU */ -static struct sh_timer_config tmu0_platform_data = { - .channel_offset = 0x04, - .timer_bit = 0, - .clockevent_rating = 200, -}; - -static struct resource tmu0_resources[] = { - [0] = { - .start = 0xFFD80008, - .end = 0xFFD80014 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x400), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu0_device = { - .name = "sh_tmu", - .id = 0, - .dev = { - .platform_data = &tmu0_platform_data, - }, - .resource = tmu0_resources, - .num_resources = ARRAY_SIZE(tmu0_resources), -}; - -static struct sh_timer_config tmu1_platform_data = { - .channel_offset = 0x10, - .timer_bit = 1, - .clocksource_rating = 200, -}; - -static struct resource tmu1_resources[] = { - [0] = { - .start = 0xFFD80014, - .end = 0xFFD80020 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x420), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu1_device = { - .name = "sh_tmu", - .id = 1, - .dev = { - .platform_data = &tmu1_platform_data, - }, - .resource = tmu1_resources, - .num_resources = ARRAY_SIZE(tmu1_resources), -}; - -static struct sh_timer_config tmu2_platform_data = { - .channel_offset = 0x1c, - .timer_bit = 2, -}; - -static struct resource tmu2_resources[] = { - [0] = { - .start = 0xFFD80020, - .end = 0xFFD80030 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x440), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu2_device = { - .name = "sh_tmu", - .id = 2, - .dev = { - .platform_data = &tmu2_platform_data, - }, - .resource = tmu2_resources, - .num_resources = ARRAY_SIZE(tmu2_resources), -}; - - -static struct sh_timer_config tmu3_platform_data = { - .channel_offset = 0x04, - .timer_bit = 0, -}; - -static struct resource tmu3_resources[] = { - [0] = { - .start = 0xFFD81008, - .end = 0xFFD81014 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x480), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu3_device = { - .name = "sh_tmu", - .id = 3, - .dev = { - .platform_data = &tmu3_platform_data, - }, - .resource = tmu3_resources, - .num_resources = ARRAY_SIZE(tmu3_resources), -}; - -static struct sh_timer_config tmu4_platform_data = { - .channel_offset = 0x10, - .timer_bit = 1, -}; - -static struct resource tmu4_resources[] = { - [0] = { - .start = 0xFFD81014, - .end = 0xFFD81020 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x4A0), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu4_device = { - .name = "sh_tmu", - .id = 4, - .dev = { - .platform_data = &tmu4_platform_data, - }, - .resource = tmu4_resources, - .num_resources = ARRAY_SIZE(tmu4_resources), -}; - -static struct sh_timer_config tmu5_platform_data = { - .channel_offset = 0x1c, - .timer_bit = 2, -}; - -static struct resource tmu5_resources[] = { - [0] = { - .start = 0xFFD81020, - .end = 0xFFD81030 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x4C0), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu5_device = { - .name = "sh_tmu", - .id = 5, - .dev = { - .platform_data = &tmu5_platform_data, - }, - .resource = tmu5_resources, - .num_resources = ARRAY_SIZE(tmu5_resources), -}; - -static struct sh_timer_config tmu6_platform_data = { - .channel_offset = 0x4, - .timer_bit = 0, -}; - -static struct resource tmu6_resources[] = { - [0] = { - .start = 0xFFD82008, - .end = 0xFFD82014 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x500), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu6_device = { - .name = "sh_tmu", - .id = 6, - .dev = { - .platform_data = &tmu6_platform_data, - }, - .resource = tmu6_resources, - .num_resources = ARRAY_SIZE(tmu6_resources), -}; - -static struct sh_timer_config tmu7_platform_data = { - .channel_offset = 0x10, - .timer_bit = 1, -}; - -static struct resource tmu7_resources[] = { - [0] = { - .start = 0xFFD82014, - .end = 0xFFD82020 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x520), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu7_device = { - .name = "sh_tmu", - .id = 7, - .dev = { - .platform_data = &tmu7_platform_data, - }, - .resource = tmu7_resources, - .num_resources = ARRAY_SIZE(tmu7_resources), -}; - -static struct sh_timer_config tmu8_platform_data = { - .channel_offset = 0x1c, - .timer_bit = 2, -}; - -static struct resource tmu8_resources[] = { - [0] = { - .start = 0xFFD82020, - .end = 0xFFD82030 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x540), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu8_device = { - .name = "sh_tmu", - .id = 8, - .dev = { - .platform_data = &tmu8_platform_data, - }, - .resource = tmu8_resources, - .num_resources = ARRAY_SIZE(tmu8_resources), -}; - -static struct platform_device *sh7734_devices[] __initdata = { - &scif0_device, - &scif1_device, - &scif2_device, - &scif3_device, - &scif4_device, - &scif5_device, - &tmu0_device, - &tmu1_device, - &tmu2_device, - &tmu3_device, - &tmu4_device, - &tmu5_device, - &tmu6_device, - &tmu7_device, - &tmu8_device, - &rtc_device, -}; - -static struct platform_device *sh7734_early_devices[] __initdata = { - &scif0_device, - &scif1_device, - &scif2_device, - &scif3_device, - &scif4_device, - &scif5_device, - &tmu0_device, - &tmu1_device, - &tmu2_device, - &tmu3_device, - &tmu4_device, - &tmu5_device, - &tmu6_device, - &tmu7_device, - &tmu8_device, -}; - -void __init plat_early_device_setup(void) -{ - early_platform_add_devices(sh7734_early_devices, - ARRAY_SIZE(sh7734_early_devices)); -} - -#define GROUP 0 -enum { - UNUSED = 0, - - /* interrupt sources */ - - IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH, - IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH, - IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH, - IRL0_HHLL, IRL0_HHLH, IRL0_HHHL, - - IRQ0, IRQ1, IRQ2, IRQ3, - DU, - TMU00, TMU10, TMU20, TMU21, - TMU30, TMU40, TMU50, TMU51, - TMU60, TMU70, TMU80, - RESET_WDT, - USB, - HUDI, - SHDMAC, - SSI0, SSI1, SSI2, SSI3, - VIN0, - RGPVG, - _2DG, - MMC, - HSPI, - LBSCATA, - I2C0, - RCAN0, - MIMLB, - SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, - LBSCDMAC0, LBSCDMAC1, LBSCDMAC2, - RCAN1, - SDHI0, SDHI1, - IEBUS, - HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18, HPBDMAC19_22, HPBDMAC23_25_27_28, - RTC, - VIN1, - LCDC, - SRC0, SRC1, - GETHER, - SDHI2, - GPIO0_3, GPIO4_5, - STIF0, STIF1, - ADMAC, - HIF, - FLCTL, - ADC, - MTU2, - RSPI, - QSPI, - HSCIF, - VEU3F_VE3, - - /* Group */ - /* Mask */ - STIF_M, - GPIO_M, - HPBDMAC_M, - LBSCDMAC_M, - RCAN_M, - SRC_M, - SCIF_M, - LCDC_M, - _2DG_M, - VIN_M, - TMU_3_M, - TMU_0_M, - - /* Priority */ - RCAN_P, - LBSCDMAC_P, - - /* Common */ - SDHI, - SSI, - SPI, -}; - -static struct intc_vect vectors[] __initdata = { - INTC_VECT(DU, 0x3E0), - INTC_VECT(TMU00, 0x400), - INTC_VECT(TMU10, 0x420), - INTC_VECT(TMU20, 0x440), - INTC_VECT(TMU30, 0x480), - INTC_VECT(TMU40, 0x4A0), - INTC_VECT(TMU50, 0x4C0), - INTC_VECT(TMU51, 0x4E0), - INTC_VECT(TMU60, 0x500), - INTC_VECT(TMU70, 0x520), - INTC_VECT(TMU80, 0x540), - INTC_VECT(RESET_WDT, 0x560), - INTC_VECT(USB, 0x580), - INTC_VECT(HUDI, 0x600), - INTC_VECT(SHDMAC, 0x620), - INTC_VECT(SSI0, 0x6C0), - INTC_VECT(SSI1, 0x6E0), - INTC_VECT(SSI2, 0x700), - INTC_VECT(SSI3, 0x720), - INTC_VECT(VIN0, 0x740), - INTC_VECT(RGPVG, 0x760), - INTC_VECT(_2DG, 0x780), - INTC_VECT(MMC, 0x7A0), - INTC_VECT(HSPI, 0x7E0), - INTC_VECT(LBSCATA, 0x840), - INTC_VECT(I2C0, 0x860), - INTC_VECT(RCAN0, 0x880), - INTC_VECT(SCIF0, 0x8A0), - INTC_VECT(SCIF1, 0x8C0), - INTC_VECT(SCIF2, 0x900), - INTC_VECT(SCIF3, 0x920), - INTC_VECT(SCIF4, 0x940), - INTC_VECT(SCIF5, 0x960), - INTC_VECT(LBSCDMAC0, 0x9E0), - INTC_VECT(LBSCDMAC1, 0xA00), - INTC_VECT(LBSCDMAC2, 0xA20), - INTC_VECT(RCAN1, 0xA60), - INTC_VECT(SDHI0, 0xAE0), - INTC_VECT(SDHI1, 0xB00), - INTC_VECT(IEBUS, 0xB20), - INTC_VECT(HPBDMAC0_3, 0xB60), - INTC_VECT(HPBDMAC4_10, 0xB80), - INTC_VECT(HPBDMAC11_18, 0xBA0), - INTC_VECT(HPBDMAC19_22, 0xBC0), - INTC_VECT(HPBDMAC23_25_27_28, 0xBE0), - INTC_VECT(RTC, 0xC00), - INTC_VECT(VIN1, 0xC20), - INTC_VECT(LCDC, 0xC40), - INTC_VECT(SRC0, 0xC60), - INTC_VECT(SRC1, 0xC80), - INTC_VECT(GETHER, 0xCA0), - INTC_VECT(SDHI2, 0xCC0), - INTC_VECT(GPIO0_3, 0xCE0), - INTC_VECT(GPIO4_5, 0xD00), - INTC_VECT(STIF0, 0xD20), - INTC_VECT(STIF1, 0xD40), - INTC_VECT(ADMAC, 0xDA0), - INTC_VECT(HIF, 0xDC0), - INTC_VECT(FLCTL, 0xDE0), - INTC_VECT(ADC, 0xE00), - INTC_VECT(MTU2, 0xE20), - INTC_VECT(RSPI, 0xE40), - INTC_VECT(QSPI, 0xE60), - INTC_VECT(HSCIF, 0xFC0), - INTC_VECT(VEU3F_VE3, 0xF40), -}; - -static struct intc_group groups[] __initdata = { - /* Common */ - INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2), - INTC_GROUP(SPI, HSPI, RSPI, QSPI), - INTC_GROUP(SSI, SSI0, SSI1, SSI2, SSI3), - - /* Mask group */ - INTC_GROUP(STIF_M, STIF0, STIF1), /* 22 */ - INTC_GROUP(GPIO_M, GPIO0_3, GPIO4_5), /* 21 */ - INTC_GROUP(HPBDMAC_M, HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18, - HPBDMAC19_22, HPBDMAC23_25_27_28), /* 19 */ - INTC_GROUP(LBSCDMAC_M, LBSCDMAC0, LBSCDMAC1, LBSCDMAC2), /* 18 */ - INTC_GROUP(RCAN_M, RCAN0, RCAN1, IEBUS), /* 17 */ - INTC_GROUP(SRC_M, SRC0, SRC1), /* 16 */ - INTC_GROUP(SCIF_M, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, - HSCIF), /* 14 */ - INTC_GROUP(LCDC_M, LCDC, MIMLB), /* 13 */ - INTC_GROUP(_2DG_M, _2DG, RGPVG), /* 12 */ - INTC_GROUP(VIN_M, VIN0, VIN1), /* 10 */ - INTC_GROUP(TMU_3_M, TMU30, TMU40, TMU50, TMU51, - TMU60, TMU60, TMU70, TMU80), /* 2 */ - INTC_GROUP(TMU_0_M, TMU00, TMU10, TMU20, TMU21), /* 1 */ - - /* Priority group*/ - INTC_GROUP(RCAN_P, RCAN0, RCAN1), /* INT2PRI5 */ - INTC_GROUP(LBSCDMAC_P, LBSCDMAC0, LBSCDMAC1), /* INT2PRI5 */ -}; - -static struct intc_mask_reg mask_registers[] __initdata = { - { 0xFF804040, 0xFF804044, 32, /* INT2MSKRG / INT2MSKCR */ - { 0, - VEU3F_VE3, - SDHI, /* SDHI 0-2 */ - ADMAC, - FLCTL, - RESET_WDT, - HIF, - ADC, - MTU2, - STIF_M, /* STIF 0,1 */ - GPIO_M, /* GPIO 0-5*/ - GETHER, - HPBDMAC_M, /* HPBDMAC 0_3 - 23_25_27_28 */ - LBSCDMAC_M, /* LBSCDMAC 0 - 2 */ - RCAN_M, /* RCAN, IEBUS */ - SRC_M, /* SRC 0,1 */ - LBSCATA, - SCIF_M, /* SCIF 0-5, HSCIF */ - LCDC_M, /* LCDC, MIMLB */ - _2DG_M, /* 2DG, RGPVG */ - SPI, /* HSPI, RSPI, QSPI */ - VIN_M, /* VIN0, 1 */ - SSI, /* SSI 0-3 */ - USB, - SHDMAC, - HUDI, - MMC, - RTC, - I2C0, /* I2C */ /* I2C 0, 1*/ - TMU_3_M, /* TMU30 - TMU80 */ - TMU_0_M, /* TMU00 - TMU21 */ - DU } }, -}; - -static struct intc_prio_reg prio_registers[] __initdata = { - { 0xFF804000, 0, 32, 8, /* INT2PRI0 */ - { DU, TMU00, TMU10, TMU20 } }, - { 0xFF804004, 0, 32, 8, /* INT2PRI1 */ - { TMU30, TMU60, RTC, SDHI } }, - { 0xFF804008, 0, 32, 8, /* INT2PRI2 */ - { HUDI, SHDMAC, USB, SSI } }, - { 0xFF80400C, 0, 32, 8, /* INT2PRI3 */ - { VIN0, SPI, _2DG, LBSCATA } }, - { 0xFF804010, 0, 32, 8, /* INT2PRI4 */ - { SCIF0, SCIF3, HSCIF, LCDC } }, - { 0xFF804014, 0, 32, 8, /* INT2PRI5 */ - { RCAN_P, LBSCDMAC_P, LBSCDMAC2, MMC } }, - { 0xFF804018, 0, 32, 8, /* INT2PRI6 */ - { HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18, HPBDMAC19_22 } }, - { 0xFF80401C, 0, 32, 8, /* INT2PRI7 */ - { HPBDMAC23_25_27_28, I2C0, SRC0, SRC1 } }, - { 0xFF804020, 0, 32, 8, /* INT2PRI8 */ - { 0 /* ADIF */, VIN1, RESET_WDT, HIF } }, - { 0xFF804024, 0, 32, 8, /* INT2PRI9 */ - { ADMAC, FLCTL, GPIO0_3, GPIO4_5 } }, - { 0xFF804028, 0, 32, 8, /* INT2PRI10 */ - { STIF0, STIF1, VEU3F_VE3, GETHER } }, - { 0xFF80402C, 0, 32, 8, /* INT2PRI11 */ - { MTU2, RGPVG, MIMLB, IEBUS } }, -}; - -static DECLARE_INTC_DESC(intc_desc, "sh7734", vectors, groups, - mask_registers, prio_registers, NULL); - -/* Support for external interrupt pins in IRQ mode */ - -static struct intc_vect irq3210_vectors[] __initdata = { - INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), - INTC_VECT(IRQ2, 0x2C0), INTC_VECT(IRQ3, 0x300), -}; - -static struct intc_sense_reg irq3210_sense_registers[] __initdata = { - { 0xFF80201C, 32, 2, /* ICR1 */ - { IRQ0, IRQ1, IRQ2, IRQ3, } }, -}; - -static struct intc_mask_reg irq3210_ack_registers[] __initdata = { - { 0xFF802024, 0, 32, /* INTREQ */ - { IRQ0, IRQ1, IRQ2, IRQ3, } }, -}; - -static struct intc_mask_reg irq3210_mask_registers[] __initdata = { - { 0xFF802044, 0xFF802064, 32, /* INTMSK0 / INTMSKCLR0 */ - { IRQ0, IRQ1, IRQ2, IRQ3, } }, -}; - -static struct intc_prio_reg irq3210_prio_registers[] __initdata = { - { 0xFF802010, 0, 32, 4, /* INTPRI */ - { IRQ0, IRQ1, IRQ2, IRQ3, } }, -}; - -static DECLARE_INTC_DESC_ACK(intc_desc_irq3210, "sh7734-irq3210", - irq3210_vectors, NULL, - irq3210_mask_registers, irq3210_prio_registers, - irq3210_sense_registers, irq3210_ack_registers); - -/* External interrupt pins in IRL mode */ - -static struct intc_vect vectors_irl3210[] __initdata = { - INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220), - INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260), - INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0), - INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0), - INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320), - INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360), - INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0), - INTC_VECT(IRL0_HHHL, 0x3c0), -}; - -static DECLARE_INTC_DESC(intc_desc_irl3210, "sh7734-irl3210", - vectors_irl3210, NULL, mask_registers, NULL, NULL); - -#define INTC_ICR0 0xFF802000 -#define INTC_INTMSK0 0xFF802044 -#define INTC_INTMSK1 0xFF802048 -#define INTC_INTMSKCLR0 0xFF802064 -#define INTC_INTMSKCLR1 0xFF802068 - -void __init plat_irq_setup(void) -{ - /* disable IRQ3-0 */ - __raw_writel(0xF0000000, INTC_INTMSK0); - - /* disable IRL3-0 */ - __raw_writel(0x80000000, INTC_INTMSK1); - - /* select IRL mode for IRL3-0 */ - __raw_writel(__raw_readl(INTC_ICR0) & ~0x00800000, INTC_ICR0); - - /* disable holding function, ie enable "SH-4 Mode (LVLMODE)" */ - __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0); - - register_intc_controller(&intc_desc); -} - -void __init plat_irq_setup_pins(int mode) -{ - switch (mode) { - case IRQ_MODE_IRQ3210: - /* select IRQ mode for IRL3-0 */ - __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0); - register_intc_controller(&intc_desc_irq3210); - break; - case IRQ_MODE_IRL3210: - /* enable IRL0-3 but don't provide any masking */ - __raw_writel(0x80000000, INTC_INTMSKCLR1); - __raw_writel(0xf0000000, INTC_INTMSKCLR0); - break; - case IRQ_MODE_IRL3210_MASK: - /* enable IRL0-3 and mask using cpu intc controller */ - __raw_writel(0x80000000, INTC_INTMSKCLR0); - register_intc_controller(&intc_desc_irl3210); - break; - default: - BUG(); - } -} diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7757.c index fe45e4cb183d..c8836cffa216 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7757.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7757.c @@ -28,7 +28,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)), + .irqs = { 40, 40, 40, 40 }, }; static struct platform_device scif2_device = { @@ -45,7 +45,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xB80)), + .irqs = { 76, 76, 76, 76 }, }; static struct platform_device scif3_device = { @@ -62,7 +62,7 @@ static struct plat_sci_port scif4_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xF00)), + .irqs = { 104, 104, 104, 104 }, }; static struct platform_device scif4_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7763.c index 197e4c9a4a01..00113515f233 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7763.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7763.c @@ -22,7 +22,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)), + .irqs = { 40, 40, 40, 40 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -40,7 +40,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xB80)), + .irqs = { 76, 76, 76, 76 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -58,7 +58,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xF00)), + .irqs = { 104, 104, 104, 104 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7770.c index 46ea8703d18a..2c6aa22cf5f6 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7770.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7770.c @@ -20,7 +20,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x9A0)), + .irqs = { 61, 61, 61, 61 }, }; static struct platform_device scif0_device = { @@ -37,7 +37,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x9C0)), + .irqs = { 62, 62, 62, 62 }, }; static struct platform_device scif1_device = { @@ -54,7 +54,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x9E0)), + .irqs = { 63, 63, 63, 63 }, }; static struct platform_device scif2_device = { @@ -71,7 +71,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xA00)), + .irqs = { 64, 64, 64, 64 }, }; static struct platform_device scif3_device = { @@ -88,7 +88,7 @@ static struct plat_sci_port scif4_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xA20)), + .irqs = { 65, 65, 65, 65 }, }; static struct platform_device scif4_device = { @@ -105,7 +105,7 @@ static struct plat_sci_port scif5_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xA40)), + .irqs = { 66, 66, 66, 66 }, }; static struct platform_device scif5_device = { @@ -122,7 +122,7 @@ static struct plat_sci_port scif6_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xA60)), + .irqs = { 67, 67, 67, 67 }, }; static struct platform_device scif6_device = { @@ -139,7 +139,7 @@ static struct plat_sci_port scif7_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xA80)), + .irqs = { 68, 68, 68, 68 }, }; static struct platform_device scif7_device = { @@ -156,7 +156,7 @@ static struct plat_sci_port scif8_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xAA0)), + .irqs = { 69, 69, 69, 69 }, }; static struct platform_device scif8_device = { @@ -173,7 +173,7 @@ static struct plat_sci_port scif9_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0xAC0)), + .irqs = { 70, 70, 70, 70 }, }; static struct platform_device scif9_device = { diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index 304339fe7a24..81588ef15a6c 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -24,7 +24,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)), + .irqs = { 40, 40, 40, 40 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -42,7 +42,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x780)), + .irqs = { 44, 44, 44, 44 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -60,7 +60,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x980)), + .irqs = { 60, 60, 60, 60 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -78,7 +78,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x9A0)), + .irqs = { 61, 61, 61, 61 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -96,7 +96,7 @@ static struct plat_sci_port scif4_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x9C0)), + .irqs = { 62, 62, 62, 62 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -114,7 +114,7 @@ static struct plat_sci_port scif5_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x9E0)), + .irqs = { 63, 63, 63, 63 }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; diff --git a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index 9befe2dcf45e..2e6952f87848 100644 --- a/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/trunk/arch/sh/kernel/cpu/sh4a/setup-sh7786.c @@ -32,7 +32,10 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, - .irqs = { 40, 41, 43, 42 }, + .irqs = { evt2irq(0x700), + evt2irq(0x720), + evt2irq(0x760), + evt2irq(0x740) }, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -125,7 +128,7 @@ static struct plat_sci_port scif5_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(evt2irq(0x8A0)), + .irqs = SCIx_IRQ_MUXED(evt2irq(0x8a0)), .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -150,7 +153,7 @@ static struct resource tmu0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 16, + .start = evt2irq(0x400), .flags = IORESOURCE_IRQ, }, }; @@ -178,7 +181,7 @@ static struct resource tmu1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 17, + .start = evt2irq(0x420), .flags = IORESOURCE_IRQ, }, }; @@ -205,7 +208,7 @@ static struct resource tmu2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 18, + .start = evt2irq(0x440), .flags = IORESOURCE_IRQ, }, }; @@ -232,7 +235,7 @@ static struct resource tmu3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 20, + .start = evt2irq(0x480), .flags = IORESOURCE_IRQ, }, }; @@ -259,7 +262,7 @@ static struct resource tmu4_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 21, + .start = evt2irq(0x4a0), .flags = IORESOURCE_IRQ, }, }; @@ -286,7 +289,7 @@ static struct resource tmu5_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 22, + .start = evt2irq(0x4c0), .flags = IORESOURCE_IRQ, }, }; @@ -313,7 +316,7 @@ static struct resource tmu6_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 45, + .start = evt2irq(0x7a0), .flags = IORESOURCE_IRQ, }, }; @@ -340,7 +343,7 @@ static struct resource tmu7_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 45, + .start = evt2irq(0x7a0), .flags = IORESOURCE_IRQ, }, }; @@ -367,7 +370,7 @@ static struct resource tmu8_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 45, + .start = evt2irq(0x7a0), .flags = IORESOURCE_IRQ, }, }; @@ -394,7 +397,7 @@ static struct resource tmu9_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 46, + .start = evt2irq(0x7c0), .flags = IORESOURCE_IRQ, }, }; @@ -421,7 +424,7 @@ static struct resource tmu10_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 46, + .start = evt2irq(0x7c0), .flags = IORESOURCE_IRQ, }, }; @@ -448,7 +451,7 @@ static struct resource tmu11_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 46, + .start = evt2irq(0x7c0), .flags = IORESOURCE_IRQ, }, }; @@ -550,8 +553,8 @@ static struct resource usb_ehci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 77, - .end = 77, + .start = evt2irq(0xba0), + .end = evt2irq(0xba0), .flags = IORESOURCE_IRQ, }, }; @@ -574,8 +577,8 @@ static struct resource usb_ohci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 77, - .end = 77, + .start = evt2irq(0xba0), + .end = evt2irq(0xba0), .flags = IORESOURCE_IRQ, }, }; diff --git a/trunk/arch/sh/kernel/cpu/sh5/entry.S b/trunk/arch/sh/kernel/cpu/sh5/entry.S index ff1f0e6e9bec..6b80295dd7a4 100644 --- a/trunk/arch/sh/kernel/cpu/sh5/entry.S +++ b/trunk/arch/sh/kernel/cpu/sh5/entry.S @@ -335,7 +335,7 @@ tlb_miss: /* If the fast path handler fixed the fault, just drop through quickly to the restore code right away to return to the excepting context. */ - bnei/u r2, 0, tr1 + beqi/u r2, 0, tr1 fast_tlb_miss_restore: ld.q SP, SAVED_TR0, r2 @@ -1079,8 +1079,9 @@ restore_all: * * Kernel TLB fault handlers will get a slightly different interface. * (r2) struct pt_regs *, original register's frame pointer - * (r3) page fault error code (see asm/thread_info.h) - * (r4) Effective Address of fault + * (r3) writeaccess, whether it's a store fault as opposed to load fault + * (r4) execaccess, whether it's a ITLB fault as opposed to DTLB fault + * (r5) Effective Address of fault * (LINK) return address * (SP) = r2 * @@ -1091,25 +1092,26 @@ restore_all: tlb_miss_load: or SP, ZERO, r2 or ZERO, ZERO, r3 /* Read */ - getcon TEA, r4 + or ZERO, ZERO, r4 /* Data */ + getcon TEA, r5 pta call_do_page_fault, tr0 beq ZERO, ZERO, tr0 tlb_miss_store: or SP, ZERO, r2 - movi FAULT_CODE_WRITE, r3 /* Write */ - getcon TEA, r4 + movi 1, r3 /* Write */ + or ZERO, ZERO, r4 /* Data */ + getcon TEA, r5 pta call_do_page_fault, tr0 beq ZERO, ZERO, tr0 itlb_miss_or_IRQ: pta its_IRQ, tr0 beqi/u r4, EVENT_INTERRUPT, tr0 - - /* ITLB miss */ or SP, ZERO, r2 - movi FAULT_CODE_ITLB, r3 - getcon TEA, r4 + or ZERO, ZERO, r3 /* Read */ + movi 1, r4 /* Text */ + getcon TEA, r5 /* Fall through */ call_do_page_fault: diff --git a/trunk/arch/sh/kernel/cpu/sh5/fpu.c b/trunk/arch/sh/kernel/cpu/sh5/fpu.c index 9f8713aa7184..4b3bb35e99f3 100644 --- a/trunk/arch/sh/kernel/cpu/sh5/fpu.c +++ b/trunk/arch/sh/kernel/cpu/sh5/fpu.c @@ -107,5 +107,8 @@ asmlinkage void do_fpu_error(unsigned long ex, struct pt_regs *regs) regs->pc += 4; + tsk->thread.trap_no = 11; + tsk->thread.error_code = 0; + force_sig(SIGFPE, tsk); } diff --git a/trunk/arch/sh/kernel/kgdb.c b/trunk/arch/sh/kernel/kgdb.c index 38b313909ac9..b117781bfea2 100644 --- a/trunk/arch/sh/kernel/kgdb.c +++ b/trunk/arch/sh/kernel/kgdb.c @@ -1,7 +1,7 @@ /* * SuperH KGDB support * - * Copyright (C) 2008 - 2012 Paul Mundt + * Copyright (C) 2008 - 2009 Paul Mundt * * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel. * @@ -164,89 +164,42 @@ static void undo_single_step(struct pt_regs *linux_regs) stepped_opcode = 0; } -struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = { - { "r0", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[0]) }, - { "r1", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[1]) }, - { "r2", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[2]) }, - { "r3", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[3]) }, - { "r4", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[4]) }, - { "r5", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[5]) }, - { "r6", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[6]) }, - { "r7", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[7]) }, - { "r8", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[8]) }, - { "r9", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[9]) }, - { "r10", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[10]) }, - { "r11", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[11]) }, - { "r12", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[12]) }, - { "r13", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[13]) }, - { "r14", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[14]) }, - { "r15", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[15]) }, - { "pc", GDB_SIZEOF_REG, offsetof(struct pt_regs, pc) }, - { "pr", GDB_SIZEOF_REG, offsetof(struct pt_regs, pr) }, - { "sr", GDB_SIZEOF_REG, offsetof(struct pt_regs, sr) }, - { "gbr", GDB_SIZEOF_REG, offsetof(struct pt_regs, gbr) }, - { "mach", GDB_SIZEOF_REG, offsetof(struct pt_regs, mach) }, - { "macl", GDB_SIZEOF_REG, offsetof(struct pt_regs, macl) }, - { "vbr", GDB_SIZEOF_REG, -1 }, -}; - -int dbg_set_reg(int regno, void *mem, struct pt_regs *regs) +void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) { - if (regno < 0 || regno >= DBG_MAX_REG_NUM) - return -EINVAL; + int i; + + for (i = 0; i < 16; i++) + gdb_regs[GDB_R0 + i] = regs->regs[i]; - if (dbg_reg_def[regno].offset != -1) - memcpy((void *)regs + dbg_reg_def[regno].offset, mem, - dbg_reg_def[regno].size); + gdb_regs[GDB_PC] = regs->pc; + gdb_regs[GDB_PR] = regs->pr; + gdb_regs[GDB_SR] = regs->sr; + gdb_regs[GDB_GBR] = regs->gbr; + gdb_regs[GDB_MACH] = regs->mach; + gdb_regs[GDB_MACL] = regs->macl; - return 0; + __asm__ __volatile__ ("stc vbr, %0" : "=r" (gdb_regs[GDB_VBR])); } -char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs) +void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) { - if (regno >= DBG_MAX_REG_NUM || regno < 0) - return NULL; + int i; - if (dbg_reg_def[regno].size != -1) - memcpy(mem, (void *)regs + dbg_reg_def[regno].offset, - dbg_reg_def[regno].size); - - switch (regno) { - case GDB_VBR: - __asm__ __volatile__ ("stc vbr, %0" : "=r" (mem)); - break; - } + for (i = 0; i < 16; i++) + regs->regs[GDB_R0 + i] = gdb_regs[GDB_R0 + i]; - return dbg_reg_def[regno].name; + regs->pc = gdb_regs[GDB_PC]; + regs->pr = gdb_regs[GDB_PR]; + regs->sr = gdb_regs[GDB_SR]; + regs->gbr = gdb_regs[GDB_GBR]; + regs->mach = gdb_regs[GDB_MACH]; + regs->macl = gdb_regs[GDB_MACL]; } void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) { - struct pt_regs *thread_regs = task_pt_regs(p); - int reg; - - /* Initialize to zero */ - for (reg = 0; reg < DBG_MAX_REG_NUM; reg++) - gdb_regs[reg] = 0; - - /* - * Copy out GP regs 8 to 14. - * - * switch_to() relies on SR.RB toggling, so regs 0->7 are banked - * and need privileged instructions to get to. The r15 value we - * fetch from the thread info directly. - */ - for (reg = GDB_R8; reg < GDB_R15; reg++) - gdb_regs[reg] = thread_regs->regs[reg]; - gdb_regs[GDB_R15] = p->thread.sp; gdb_regs[GDB_PC] = p->thread.pc; - - /* - * Additional registers we have context for - */ - gdb_regs[GDB_PR] = thread_regs->pr; - gdb_regs[GDB_GBR] = thread_regs->gbr; } int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, @@ -311,18 +264,6 @@ BUILD_TRAP_HANDLER(singlestep) local_irq_restore(flags); } -static void kgdb_call_nmi_hook(void *ignored) -{ - kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs()); -} - -void kgdb_roundup_cpus(unsigned long flags) -{ - local_irq_enable(); - smp_call_function(kgdb_call_nmi_hook, NULL, 0); - local_irq_disable(); -} - static int __kgdb_notify(struct die_args *args, unsigned long cmd) { int ret; diff --git a/trunk/arch/sh/kernel/process.c b/trunk/arch/sh/kernel/process.c index f3f03e4c785d..325f98b1736d 100644 --- a/trunk/arch/sh/kernel/process.c +++ b/trunk/arch/sh/kernel/process.c @@ -2,17 +2,10 @@ #include #include #include -#include -#include struct kmem_cache *task_xstate_cachep = NULL; unsigned int xstate_size; -#ifdef CONFIG_CC_STACKPROTECTOR -unsigned long __stack_chk_guard __read_mostly; -EXPORT_SYMBOL(__stack_chk_guard); -#endif - int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) { *dst = *src; diff --git a/trunk/arch/sh/kernel/process_32.c b/trunk/arch/sh/kernel/process_32.c index f78cc421e665..94273aaf78c1 100644 --- a/trunk/arch/sh/kernel/process_32.c +++ b/trunk/arch/sh/kernel/process_32.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include @@ -221,10 +220,6 @@ __switch_to(struct task_struct *prev, struct task_struct *next) { struct thread_struct *next_t = &next->thread; -#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP) - __stack_chk_guard = next->stack_canary; -#endif - unlazy_fpu(prev, task_pt_regs(prev)); /* we're going to use this soon, after a few expensive things */ diff --git a/trunk/arch/sh/kernel/traps_64.c b/trunk/arch/sh/kernel/traps_64.c index 8dae93ed8aff..6c0486094e48 100644 --- a/trunk/arch/sh/kernel/traps_64.c +++ b/trunk/arch/sh/kernel/traps_64.c @@ -283,6 +283,8 @@ static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_na unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk) { show_excp_regs(fn_name, trapnr, signr, regs); + tsk->thread.error_code = error_code; + tsk->thread.trap_no = trapnr; if (user_mode(regs)) force_sig(signr, tsk); diff --git a/trunk/arch/sh/mm/Makefile b/trunk/arch/sh/mm/Makefile index cee6b9999d86..2228c8cee4d6 100644 --- a/trunk/arch/sh/mm/Makefile +++ b/trunk/arch/sh/mm/Makefile @@ -15,8 +15,8 @@ cacheops-$(CONFIG_CPU_SHX3) += cache-shx3.o obj-y += $(cacheops-y) mmu-y := nommu.o extable_32.o -mmu-$(CONFIG_MMU) := extable_$(BITS).o fault.o gup.o ioremap.o kmap.o \ - pgtable.o tlbex_$(BITS).o tlbflush_$(BITS).o +mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o gup.o \ + ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o obj-y += $(mmu-y) @@ -44,7 +44,7 @@ obj-$(CONFIG_HAVE_SRAM_POOL) += sram.o GCOV_PROFILE_pmb.o := n -# Special flags for tlbex_64.o. This puts restrictions on the number of +# Special flags for fault_64.o. This puts restrictions on the number of # caller-save registers that the compiler can target when building this file. # This is required because the code is called from a context in entry.S where # very few registers have been saved in the exception handler (for speed @@ -59,7 +59,7 @@ GCOV_PROFILE_pmb.o := n # The resources not listed below are callee save, i.e. the compiler is free to # use any of them and will spill them to the stack itself. -CFLAGS_tlbex_64.o += -ffixed-r7 \ +CFLAGS_fault_64.o += -ffixed-r7 \ -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \ -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \ -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \ diff --git a/trunk/arch/sh/mm/fault.c b/trunk/arch/sh/mm/fault.c deleted file mode 100644 index 16799f920f90..000000000000 --- a/trunk/arch/sh/mm/fault.c +++ /dev/null @@ -1,508 +0,0 @@ -/* - * Page fault handler for SH with an MMU. - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 - 2012 Paul Mundt - * - * Based on linux/arch/i386/mm/fault.c: - * Copyright (C) 1995 Linus Torvalds - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static inline int notify_page_fault(struct pt_regs *regs, int trap) -{ - int ret = 0; - - if (kprobes_built_in() && !user_mode(regs)) { - preempt_disable(); - if (kprobe_running() && kprobe_fault_handler(regs, trap)) - ret = 1; - preempt_enable(); - } - - return ret; -} - -static void -force_sig_info_fault(int si_signo, int si_code, unsigned long address, - struct task_struct *tsk) -{ - siginfo_t info; - - info.si_signo = si_signo; - info.si_errno = 0; - info.si_code = si_code; - info.si_addr = (void __user *)address; - - force_sig_info(si_signo, &info, tsk); -} - -/* - * This is useful to dump out the page tables associated with - * 'addr' in mm 'mm'. - */ -static void show_pte(struct mm_struct *mm, unsigned long addr) -{ - pgd_t *pgd; - - if (mm) - pgd = mm->pgd; - else - pgd = get_TTB(); - - printk(KERN_ALERT "pgd = %p\n", pgd); - pgd += pgd_index(addr); - printk(KERN_ALERT "[%08lx] *pgd=%0*Lx", addr, - (u32)(sizeof(*pgd) * 2), (u64)pgd_val(*pgd)); - - do { - pud_t *pud; - pmd_t *pmd; - pte_t *pte; - - if (pgd_none(*pgd)) - break; - - if (pgd_bad(*pgd)) { - printk("(bad)"); - break; - } - - pud = pud_offset(pgd, addr); - if (PTRS_PER_PUD != 1) - printk(", *pud=%0*Lx", (u32)(sizeof(*pud) * 2), - (u64)pud_val(*pud)); - - if (pud_none(*pud)) - break; - - if (pud_bad(*pud)) { - printk("(bad)"); - break; - } - - pmd = pmd_offset(pud, addr); - if (PTRS_PER_PMD != 1) - printk(", *pmd=%0*Lx", (u32)(sizeof(*pmd) * 2), - (u64)pmd_val(*pmd)); - - if (pmd_none(*pmd)) - break; - - if (pmd_bad(*pmd)) { - printk("(bad)"); - break; - } - - /* We must not map this if we have highmem enabled */ - if (PageHighMem(pfn_to_page(pmd_val(*pmd) >> PAGE_SHIFT))) - break; - - pte = pte_offset_kernel(pmd, addr); - printk(", *pte=%0*Lx", (u32)(sizeof(*pte) * 2), - (u64)pte_val(*pte)); - } while (0); - - printk("\n"); -} - -static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) -{ - unsigned index = pgd_index(address); - pgd_t *pgd_k; - pud_t *pud, *pud_k; - pmd_t *pmd, *pmd_k; - - pgd += index; - pgd_k = init_mm.pgd + index; - - if (!pgd_present(*pgd_k)) - return NULL; - - pud = pud_offset(pgd, address); - pud_k = pud_offset(pgd_k, address); - if (!pud_present(*pud_k)) - return NULL; - - if (!pud_present(*pud)) - set_pud(pud, *pud_k); - - pmd = pmd_offset(pud, address); - pmd_k = pmd_offset(pud_k, address); - if (!pmd_present(*pmd_k)) - return NULL; - - if (!pmd_present(*pmd)) - set_pmd(pmd, *pmd_k); - else { - /* - * The page tables are fully synchronised so there must - * be another reason for the fault. Return NULL here to - * signal that we have not taken care of the fault. - */ - BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); - return NULL; - } - - return pmd_k; -} - -/* - * Handle a fault on the vmalloc or module mapping area - */ -static noinline int vmalloc_fault(unsigned long address) -{ - pgd_t *pgd_k; - pmd_t *pmd_k; - pte_t *pte_k; - - /* Make sure we are in vmalloc/module area: */ - if (!is_vmalloc_addr((void *)address)) - return -1; - - /* - * Synchronize this task's top level page-table - * with the 'reference' page table. - * - * Do _not_ use "current" here. We might be inside - * an interrupt in the middle of a task switch.. - */ - pgd_k = get_TTB(); - pmd_k = vmalloc_sync_one(pgd_k, address); - if (!pmd_k) - return -1; - - pte_k = pte_offset_kernel(pmd_k, address); - if (!pte_present(*pte_k)) - return -1; - - return 0; -} - -static void -show_fault_oops(struct pt_regs *regs, unsigned long address) -{ - if (!oops_may_print()) - return; - - printk(KERN_ALERT "BUG: unable to handle kernel "); - if (address < PAGE_SIZE) - printk(KERN_CONT "NULL pointer dereference"); - else - printk(KERN_CONT "paging request"); - - printk(KERN_CONT " at %08lx\n", address); - printk(KERN_ALERT "PC:"); - printk_address(regs->pc, 1); - - show_pte(NULL, address); -} - -static noinline void -no_context(struct pt_regs *regs, unsigned long error_code, - unsigned long address) -{ - /* Are we prepared to handle this kernel fault? */ - if (fixup_exception(regs)) - return; - - if (handle_trapped_io(regs, address)) - return; - - /* - * Oops. The kernel tried to access some bad page. We'll have to - * terminate things with extreme prejudice. - */ - bust_spinlocks(1); - - show_fault_oops(regs, address); - - die("Oops", regs, error_code); - bust_spinlocks(0); - do_exit(SIGKILL); -} - -static void -__bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, - unsigned long address, int si_code) -{ - struct task_struct *tsk = current; - - /* User mode accesses just cause a SIGSEGV */ - if (user_mode(regs)) { - /* - * It's possible to have interrupts off here: - */ - local_irq_enable(); - - force_sig_info_fault(SIGSEGV, si_code, address, tsk); - - return; - } - - no_context(regs, error_code, address); -} - -static noinline void -bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, - unsigned long address) -{ - __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR); -} - -static void -__bad_area(struct pt_regs *regs, unsigned long error_code, - unsigned long address, int si_code) -{ - struct mm_struct *mm = current->mm; - - /* - * Something tried to access memory that isn't in our memory map.. - * Fix it, but check if it's kernel or user first.. - */ - up_read(&mm->mmap_sem); - - __bad_area_nosemaphore(regs, error_code, address, si_code); -} - -static noinline void -bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address) -{ - __bad_area(regs, error_code, address, SEGV_MAPERR); -} - -static noinline void -bad_area_access_error(struct pt_regs *regs, unsigned long error_code, - unsigned long address) -{ - __bad_area(regs, error_code, address, SEGV_ACCERR); -} - -static void out_of_memory(void) -{ - /* - * We ran out of memory, call the OOM killer, and return the userspace - * (which will retry the fault, or kill us if we got oom-killed): - */ - up_read(¤t->mm->mmap_sem); - - pagefault_out_of_memory(); -} - -static void -do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address) -{ - struct task_struct *tsk = current; - struct mm_struct *mm = tsk->mm; - - up_read(&mm->mmap_sem); - - /* Kernel mode? Handle exceptions or die: */ - if (!user_mode(regs)) - no_context(regs, error_code, address); - - force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); -} - -static noinline int -mm_fault_error(struct pt_regs *regs, unsigned long error_code, - unsigned long address, unsigned int fault) -{ - /* - * Pagefault was interrupted by SIGKILL. We have no reason to - * continue pagefault. - */ - if (fatal_signal_pending(current)) { - if (!(fault & VM_FAULT_RETRY)) - up_read(¤t->mm->mmap_sem); - if (!user_mode(regs)) - no_context(regs, error_code, address); - return 1; - } - - if (!(fault & VM_FAULT_ERROR)) - return 0; - - if (fault & VM_FAULT_OOM) { - /* Kernel mode? Handle exceptions or die: */ - if (!user_mode(regs)) { - up_read(¤t->mm->mmap_sem); - no_context(regs, error_code, address); - return 1; - } - - out_of_memory(); - } else { - if (fault & VM_FAULT_SIGBUS) - do_sigbus(regs, error_code, address); - else - BUG(); - } - - return 1; -} - -static inline int access_error(int error_code, struct vm_area_struct *vma) -{ - if (error_code & FAULT_CODE_WRITE) { - /* write, present and write, not present: */ - if (unlikely(!(vma->vm_flags & VM_WRITE))) - return 1; - return 0; - } - - /* ITLB miss on NX page */ - if (unlikely((error_code & FAULT_CODE_ITLB) && - !(vma->vm_flags & VM_EXEC))) - return 1; - - /* read, not present: */ - if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))) - return 1; - - return 0; -} - -static int fault_in_kernel_space(unsigned long address) -{ - return address >= TASK_SIZE; -} - -/* - * This routine handles page faults. It determines the address, - * and the problem, and then passes it off to one of the appropriate - * routines. - */ -asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, - unsigned long error_code, - unsigned long address) -{ - unsigned long vec; - struct task_struct *tsk; - struct mm_struct *mm; - struct vm_area_struct * vma; - int fault; - int write = error_code & FAULT_CODE_WRITE; - unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE | - (write ? FAULT_FLAG_WRITE : 0)); - - tsk = current; - mm = tsk->mm; - vec = lookup_exception_vector(); - - /* - * We fault-in kernel-space virtual memory on-demand. The - * 'reference' page table is init_mm.pgd. - * - * NOTE! We MUST NOT take any locks for this case. We may - * be in an interrupt or a critical region, and should - * only copy the information from the master page table, - * nothing more. - */ - if (unlikely(fault_in_kernel_space(address))) { - if (vmalloc_fault(address) >= 0) - return; - if (notify_page_fault(regs, vec)) - return; - - bad_area_nosemaphore(regs, error_code, address); - return; - } - - if (unlikely(notify_page_fault(regs, vec))) - return; - - /* Only enable interrupts if they were on before the fault */ - if ((regs->sr & SR_IMASK) != SR_IMASK) - local_irq_enable(); - - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); - - /* - * If we're in an interrupt, have no user context or are running - * in an atomic region then we must not take the fault: - */ - if (unlikely(in_atomic() || !mm)) { - bad_area_nosemaphore(regs, error_code, address); - return; - } - -retry: - down_read(&mm->mmap_sem); - - vma = find_vma(mm, address); - if (unlikely(!vma)) { - bad_area(regs, error_code, address); - return; - } - if (likely(vma->vm_start <= address)) - goto good_area; - if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) { - bad_area(regs, error_code, address); - return; - } - if (unlikely(expand_stack(vma, address))) { - bad_area(regs, error_code, address); - return; - } - - /* - * Ok, we have a good vm_area for this memory access, so - * we can handle it.. - */ -good_area: - if (unlikely(access_error(error_code, vma))) { - bad_area_access_error(regs, error_code, address); - return; - } - - set_thread_fault_code(error_code); - - /* - * If for any reason at all we couldn't handle the fault, - * make sure we exit gracefully rather than endlessly redo - * the fault. - */ - fault = handle_mm_fault(mm, vma, address, flags); - - if (unlikely(fault & (VM_FAULT_RETRY | VM_FAULT_ERROR))) - if (mm_fault_error(regs, error_code, address, fault)) - return; - - if (flags & FAULT_FLAG_ALLOW_RETRY) { - if (fault & VM_FAULT_MAJOR) { - tsk->maj_flt++; - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, - regs, address); - } else { - tsk->min_flt++; - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, - regs, address); - } - if (fault & VM_FAULT_RETRY) { - flags &= ~FAULT_FLAG_ALLOW_RETRY; - - /* - * No need to up_read(&mm->mmap_sem) as we would - * have already released it in __lock_page_or_retry - * in mm/filemap.c. - */ - goto retry; - } - } - - up_read(&mm->mmap_sem); -} diff --git a/trunk/arch/sh/mm/fault_32.c b/trunk/arch/sh/mm/fault_32.c new file mode 100644 index 000000000000..e99b104d967a --- /dev/null +++ b/trunk/arch/sh/mm/fault_32.c @@ -0,0 +1,374 @@ +/* + * Page fault handler for SH with an MMU. + * + * Copyright (C) 1999 Niibe Yutaka + * Copyright (C) 2003 - 2009 Paul Mundt + * + * Based on linux/arch/i386/mm/fault.c: + * Copyright (C) 1995 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static inline int notify_page_fault(struct pt_regs *regs, int trap) +{ + int ret = 0; + + if (kprobes_built_in() && !user_mode(regs)) { + preempt_disable(); + if (kprobe_running() && kprobe_fault_handler(regs, trap)) + ret = 1; + preempt_enable(); + } + + return ret; +} + +static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) +{ + unsigned index = pgd_index(address); + pgd_t *pgd_k; + pud_t *pud, *pud_k; + pmd_t *pmd, *pmd_k; + + pgd += index; + pgd_k = init_mm.pgd + index; + + if (!pgd_present(*pgd_k)) + return NULL; + + pud = pud_offset(pgd, address); + pud_k = pud_offset(pgd_k, address); + if (!pud_present(*pud_k)) + return NULL; + + if (!pud_present(*pud)) + set_pud(pud, *pud_k); + + pmd = pmd_offset(pud, address); + pmd_k = pmd_offset(pud_k, address); + if (!pmd_present(*pmd_k)) + return NULL; + + if (!pmd_present(*pmd)) + set_pmd(pmd, *pmd_k); + else { + /* + * The page tables are fully synchronised so there must + * be another reason for the fault. Return NULL here to + * signal that we have not taken care of the fault. + */ + BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); + return NULL; + } + + return pmd_k; +} + +/* + * Handle a fault on the vmalloc or module mapping area + */ +static noinline int vmalloc_fault(unsigned long address) +{ + pgd_t *pgd_k; + pmd_t *pmd_k; + pte_t *pte_k; + + /* Make sure we are in vmalloc/module/P3 area: */ + if (!(address >= P3SEG && address < P3_ADDR_MAX)) + return -1; + + /* + * Synchronize this task's top level page-table + * with the 'reference' page table. + * + * Do _not_ use "current" here. We might be inside + * an interrupt in the middle of a task switch.. + */ + pgd_k = get_TTB(); + pmd_k = vmalloc_sync_one(pgd_k, address); + if (!pmd_k) + return -1; + + pte_k = pte_offset_kernel(pmd_k, address); + if (!pte_present(*pte_k)) + return -1; + + return 0; +} + +static int fault_in_kernel_space(unsigned long address) +{ + return address >= TASK_SIZE; +} + +/* + * This routine handles page faults. It determines the address, + * and the problem, and then passes it off to one of the appropriate + * routines. + */ +asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, + unsigned long writeaccess, + unsigned long address) +{ + unsigned long vec; + struct task_struct *tsk; + struct mm_struct *mm; + struct vm_area_struct * vma; + int si_code; + int fault; + siginfo_t info; + + tsk = current; + mm = tsk->mm; + si_code = SEGV_MAPERR; + vec = lookup_exception_vector(); + + /* + * We fault-in kernel-space virtual memory on-demand. The + * 'reference' page table is init_mm.pgd. + * + * NOTE! We MUST NOT take any locks for this case. We may + * be in an interrupt or a critical region, and should + * only copy the information from the master page table, + * nothing more. + */ + if (unlikely(fault_in_kernel_space(address))) { + if (vmalloc_fault(address) >= 0) + return; + if (notify_page_fault(regs, vec)) + return; + + goto bad_area_nosemaphore; + } + + if (unlikely(notify_page_fault(regs, vec))) + return; + + /* Only enable interrupts if they were on before the fault */ + if ((regs->sr & SR_IMASK) != SR_IMASK) + local_irq_enable(); + + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); + + /* + * If we're in an interrupt, have no user context or are running + * in an atomic region then we must not take the fault: + */ + if (in_atomic() || !mm) + goto no_context; + + down_read(&mm->mmap_sem); + + vma = find_vma(mm, address); + if (!vma) + goto bad_area; + if (vma->vm_start <= address) + goto good_area; + if (!(vma->vm_flags & VM_GROWSDOWN)) + goto bad_area; + if (expand_stack(vma, address)) + goto bad_area; + + /* + * Ok, we have a good vm_area for this memory access, so + * we can handle it.. + */ +good_area: + si_code = SEGV_ACCERR; + if (writeaccess) { + if (!(vma->vm_flags & VM_WRITE)) + goto bad_area; + } else { + if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) + goto bad_area; + } + + /* + * If for any reason at all we couldn't handle the fault, + * make sure we exit gracefully rather than endlessly redo + * the fault. + */ + fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0); + if (unlikely(fault & VM_FAULT_ERROR)) { + if (fault & VM_FAULT_OOM) + goto out_of_memory; + else if (fault & VM_FAULT_SIGBUS) + goto do_sigbus; + BUG(); + } + if (fault & VM_FAULT_MAJOR) { + tsk->maj_flt++; + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, + regs, address); + } else { + tsk->min_flt++; + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, + regs, address); + } + + up_read(&mm->mmap_sem); + return; + + /* + * Something tried to access memory that isn't in our memory map.. + * Fix it, but check if it's kernel or user first.. + */ +bad_area: + up_read(&mm->mmap_sem); + +bad_area_nosemaphore: + if (user_mode(regs)) { + info.si_signo = SIGSEGV; + info.si_errno = 0; + info.si_code = si_code; + info.si_addr = (void *) address; + force_sig_info(SIGSEGV, &info, tsk); + return; + } + +no_context: + /* Are we prepared to handle this kernel fault? */ + if (fixup_exception(regs)) + return; + + if (handle_trapped_io(regs, address)) + return; +/* + * Oops. The kernel tried to access some bad page. We'll have to + * terminate things with extreme prejudice. + * + */ + + bust_spinlocks(1); + + if (oops_may_print()) { + unsigned long page; + + if (address < PAGE_SIZE) + printk(KERN_ALERT "Unable to handle kernel NULL " + "pointer dereference"); + else + printk(KERN_ALERT "Unable to handle kernel paging " + "request"); + printk(" at virtual address %08lx\n", address); + printk(KERN_ALERT "pc = %08lx\n", regs->pc); + page = (unsigned long)get_TTB(); + if (page) { + page = ((__typeof__(page) *)page)[address >> PGDIR_SHIFT]; + printk(KERN_ALERT "*pde = %08lx\n", page); + if (page & _PAGE_PRESENT) { + page &= PAGE_MASK; + address &= 0x003ff000; + page = ((__typeof__(page) *) + __va(page))[address >> + PAGE_SHIFT]; + printk(KERN_ALERT "*pte = %08lx\n", page); + } + } + } + + die("Oops", regs, writeaccess); + bust_spinlocks(0); + do_exit(SIGKILL); + +/* + * We ran out of memory, or some other thing happened to us that made + * us unable to handle the page fault gracefully. + */ +out_of_memory: + up_read(&mm->mmap_sem); + if (!user_mode(regs)) + goto no_context; + pagefault_out_of_memory(); + return; + +do_sigbus: + up_read(&mm->mmap_sem); + + /* + * Send a sigbus, regardless of whether we were in kernel + * or user mode. + */ + info.si_signo = SIGBUS; + info.si_errno = 0; + info.si_code = BUS_ADRERR; + info.si_addr = (void *)address; + force_sig_info(SIGBUS, &info, tsk); + + /* Kernel mode? Handle exceptions or die */ + if (!user_mode(regs)) + goto no_context; +} + +/* + * Called with interrupts disabled. + */ +asmlinkage int __kprobes +handle_tlbmiss(struct pt_regs *regs, unsigned long writeaccess, + unsigned long address) +{ + pgd_t *pgd; + pud_t *pud; + pmd_t *pmd; + pte_t *pte; + pte_t entry; + + /* + * We don't take page faults for P1, P2, and parts of P4, these + * are always mapped, whether it be due to legacy behaviour in + * 29-bit mode, or due to PMB configuration in 32-bit mode. + */ + if (address >= P3SEG && address < P3_ADDR_MAX) { + pgd = pgd_offset_k(address); + } else { + if (unlikely(address >= TASK_SIZE || !current->mm)) + return 1; + + pgd = pgd_offset(current->mm, address); + } + + pud = pud_offset(pgd, address); + if (pud_none_or_clear_bad(pud)) + return 1; + pmd = pmd_offset(pud, address); + if (pmd_none_or_clear_bad(pmd)) + return 1; + pte = pte_offset_kernel(pmd, address); + entry = *pte; + if (unlikely(pte_none(entry) || pte_not_present(entry))) + return 1; + if (unlikely(writeaccess && !pte_write(entry))) + return 1; + + if (writeaccess) + entry = pte_mkdirty(entry); + entry = pte_mkyoung(entry); + + set_pte(pte, entry); + +#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP) + /* + * SH-4 does not set MMUCR.RC to the corresponding TLB entry in + * the case of an initial page write exception, so we need to + * flush it in order to avoid potential TLB entry duplication. + */ + if (writeaccess == 2) + local_flush_tlb_one(get_asid(), address & PAGE_MASK); +#endif + + update_mmu_cache(NULL, address, pte); + + return 0; +} diff --git a/trunk/arch/sh/mm/fault_64.c b/trunk/arch/sh/mm/fault_64.c new file mode 100644 index 000000000000..44a341029e7b --- /dev/null +++ b/trunk/arch/sh/mm/fault_64.c @@ -0,0 +1,265 @@ +/* + * The SH64 TLB miss. + * + * Original code from fault.c + * Copyright (C) 2000, 2001 Paolo Alberelli + * + * Fast PTE->TLB refill path + * Copyright (C) 2003 Richard.Curnow@superh.com + * + * IMPORTANT NOTES : + * The do_fast_page_fault function is called from a context in entry.S + * where very few registers have been saved. In particular, the code in + * this file must be compiled not to use ANY caller-save registers that + * are not part of the restricted save set. Also, it means that code in + * this file must not make calls to functions elsewhere in the kernel, or + * else the excepting context will see corruption in its caller-save + * registers. Plus, the entry.S save area is non-reentrant, so this code + * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic + * on any exception. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Callable from fault.c, so not static */ +inline void __do_tlb_refill(unsigned long address, + unsigned long long is_text_not_data, pte_t *pte) +{ + unsigned long long ptel; + unsigned long long pteh=0; + struct tlb_info *tlbp; + unsigned long long next; + + /* Get PTEL first */ + ptel = pte_val(*pte); + + /* + * Set PTEH register + */ + pteh = neff_sign_extend(address & MMU_VPN_MASK); + + /* Set the ASID. */ + pteh |= get_asid() << PTEH_ASID_SHIFT; + pteh |= PTEH_VALID; + + /* Set PTEL register, set_pte has performed the sign extension */ + ptel &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ + + tlbp = is_text_not_data ? &(cpu_data->itlb) : &(cpu_data->dtlb); + next = tlbp->next; + __flush_tlb_slot(next); + asm volatile ("putcfg %0,1,%2\n\n\t" + "putcfg %0,0,%1\n" + : : "r" (next), "r" (pteh), "r" (ptel) ); + + next += TLB_STEP; + if (next > tlbp->last) next = tlbp->first; + tlbp->next = next; + +} + +static int handle_vmalloc_fault(struct mm_struct *mm, + unsigned long protection_flags, + unsigned long long textaccess, + unsigned long address) +{ + pgd_t *dir; + pud_t *pud; + pmd_t *pmd; + static pte_t *pte; + pte_t entry; + + dir = pgd_offset_k(address); + + pud = pud_offset(dir, address); + if (pud_none_or_clear_bad(pud)) + return 0; + + pmd = pmd_offset(pud, address); + if (pmd_none_or_clear_bad(pmd)) + return 0; + + pte = pte_offset_kernel(pmd, address); + entry = *pte; + + if (pte_none(entry) || !pte_present(entry)) + return 0; + if ((pte_val(entry) & protection_flags) != protection_flags) + return 0; + + __do_tlb_refill(address, textaccess, pte); + + return 1; +} + +static int handle_tlbmiss(struct mm_struct *mm, + unsigned long long protection_flags, + unsigned long long textaccess, + unsigned long address) +{ + pgd_t *dir; + pud_t *pud; + pmd_t *pmd; + pte_t *pte; + pte_t entry; + + /* NB. The PGD currently only contains a single entry - there is no + page table tree stored for the top half of the address space since + virtual pages in that region should never be mapped in user mode. + (In kernel mode, the only things in that region are the 512Mb super + page (locked in), and vmalloc (modules) + I/O device pages (handled + by handle_vmalloc_fault), so no PGD for the upper half is required + by kernel mode either). + + See how mm->pgd is allocated and initialised in pgd_alloc to see why + the next test is necessary. - RPC */ + if (address >= (unsigned long) TASK_SIZE) + /* upper half - never has page table entries. */ + return 0; + + dir = pgd_offset(mm, address); + if (pgd_none(*dir) || !pgd_present(*dir)) + return 0; + if (!pgd_present(*dir)) + return 0; + + pud = pud_offset(dir, address); + if (pud_none(*pud) || !pud_present(*pud)) + return 0; + + pmd = pmd_offset(pud, address); + if (pmd_none(*pmd) || !pmd_present(*pmd)) + return 0; + + pte = pte_offset_kernel(pmd, address); + entry = *pte; + + if (pte_none(entry) || !pte_present(entry)) + return 0; + + /* + * If the page doesn't have sufficient protection bits set to + * service the kind of fault being handled, there's not much + * point doing the TLB refill. Punt the fault to the general + * handler. + */ + if ((pte_val(entry) & protection_flags) != protection_flags) + return 0; + + __do_tlb_refill(address, textaccess, pte); + + return 1; +} + +/* + * Put all this information into one structure so that everything is just + * arithmetic relative to a single base address. This reduces the number + * of movi/shori pairs needed just to load addresses of static data. + */ +struct expevt_lookup { + unsigned short protection_flags[8]; + unsigned char is_text_access[8]; + unsigned char is_write_access[8]; +}; + +#define PRU (1<<9) +#define PRW (1<<8) +#define PRX (1<<7) +#define PRR (1<<6) + +#define DIRTY (_PAGE_DIRTY | _PAGE_ACCESSED) +#define YOUNG (_PAGE_ACCESSED) + +/* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether + the fault happened in user mode or privileged mode. */ +static struct expevt_lookup expevt_lookup_table = { + .protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW}, + .is_text_access = {1, 1, 0, 0, 0, 0, 0, 0} +}; + +/* + This routine handles page faults that can be serviced just by refilling a + TLB entry from an existing page table entry. (This case represents a very + large majority of page faults.) Return 1 if the fault was successfully + handled. Return 0 if the fault could not be handled. (This leads into the + general fault handling in fault.c which deals with mapping file-backed + pages, stack growth, segmentation faults, swapping etc etc) + */ +asmlinkage int do_fast_page_fault(unsigned long long ssr_md, + unsigned long long expevt, + unsigned long address) +{ + struct task_struct *tsk; + struct mm_struct *mm; + unsigned long long textaccess; + unsigned long long protection_flags; + unsigned long long index; + unsigned long long expevt4; + + /* The next few lines implement a way of hashing EXPEVT into a + * small array index which can be used to lookup parameters + * specific to the type of TLBMISS being handled. + * + * Note: + * ITLBMISS has EXPEVT==0xa40 + * RTLBMISS has EXPEVT==0x040 + * WTLBMISS has EXPEVT==0x060 + */ + expevt4 = (expevt >> 4); + /* TODO : xor ssr_md into this expression too. Then we can check + * that PRU is set when it needs to be. */ + index = expevt4 ^ (expevt4 >> 5); + index &= 7; + protection_flags = expevt_lookup_table.protection_flags[index]; + textaccess = expevt_lookup_table.is_text_access[index]; + + /* SIM + * Note this is now called with interrupts still disabled + * This is to cope with being called for a missing IO port + * address with interrupts disabled. This should be fixed as + * soon as we have a better 'fast path' miss handler. + * + * Plus take care how you try and debug this stuff. + * For example, writing debug data to a port which you + * have just faulted on is not going to work. + */ + + tsk = current; + mm = tsk->mm; + + if ((address >= VMALLOC_START && address < VMALLOC_END) || + (address >= IOBASE_VADDR && address < IOBASE_END)) { + if (ssr_md) + /* + * Process-contexts can never have this address + * range mapped + */ + if (handle_vmalloc_fault(mm, protection_flags, + textaccess, address)) + return 1; + } else if (!in_interrupt() && mm) { + if (handle_tlbmiss(mm, protection_flags, textaccess, address)) + return 1; + } + + return 0; +} diff --git a/trunk/arch/sh/mm/tlb-sh5.c b/trunk/arch/sh/mm/tlb-sh5.c index 3aea25dc431a..f27dbe1c1599 100644 --- a/trunk/arch/sh/mm/tlb-sh5.c +++ b/trunk/arch/sh/mm/tlb-sh5.c @@ -182,43 +182,3 @@ void tlb_unwire_entry(void) local_irq_restore(flags); } - -void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) -{ - unsigned long long ptel; - unsigned long long pteh=0; - struct tlb_info *tlbp; - unsigned long long next; - unsigned int fault_code = get_thread_fault_code(); - - /* Get PTEL first */ - ptel = pte.pte_low; - - /* - * Set PTEH register - */ - pteh = neff_sign_extend(address & MMU_VPN_MASK); - - /* Set the ASID. */ - pteh |= get_asid() << PTEH_ASID_SHIFT; - pteh |= PTEH_VALID; - - /* Set PTEL register, set_pte has performed the sign extension */ - ptel &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ - - if (fault_code & FAULT_CODE_ITLB) - tlbp = &cpu_data->itlb; - else - tlbp = &cpu_data->dtlb; - - next = tlbp->next; - __flush_tlb_slot(next); - asm volatile ("putcfg %0,1,%2\n\n\t" - "putcfg %0,0,%1\n" - : : "r" (next), "r" (pteh), "r" (ptel) ); - - next += TLB_STEP; - if (next > tlbp->last) - next = tlbp->first; - tlbp->next = next; -} diff --git a/trunk/arch/sh/mm/tlbex_32.c b/trunk/arch/sh/mm/tlbex_32.c deleted file mode 100644 index 382262dc0c4b..000000000000 --- a/trunk/arch/sh/mm/tlbex_32.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * TLB miss handler for SH with an MMU. - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 - 2012 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include - -/* - * Called with interrupts disabled. - */ -asmlinkage int __kprobes -handle_tlbmiss(struct pt_regs *regs, unsigned long error_code, - unsigned long address) -{ - pgd_t *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte; - pte_t entry; - - /* - * We don't take page faults for P1, P2, and parts of P4, these - * are always mapped, whether it be due to legacy behaviour in - * 29-bit mode, or due to PMB configuration in 32-bit mode. - */ - if (address >= P3SEG && address < P3_ADDR_MAX) { - pgd = pgd_offset_k(address); - } else { - if (unlikely(address >= TASK_SIZE || !current->mm)) - return 1; - - pgd = pgd_offset(current->mm, address); - } - - pud = pud_offset(pgd, address); - if (pud_none_or_clear_bad(pud)) - return 1; - pmd = pmd_offset(pud, address); - if (pmd_none_or_clear_bad(pmd)) - return 1; - pte = pte_offset_kernel(pmd, address); - entry = *pte; - if (unlikely(pte_none(entry) || pte_not_present(entry))) - return 1; - if (unlikely(error_code && !pte_write(entry))) - return 1; - - if (error_code) - entry = pte_mkdirty(entry); - entry = pte_mkyoung(entry); - - set_pte(pte, entry); - -#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP) - /* - * SH-4 does not set MMUCR.RC to the corresponding TLB entry in - * the case of an initial page write exception, so we need to - * flush it in order to avoid potential TLB entry duplication. - */ - if (error_code == FAULT_CODE_INITIAL) - local_flush_tlb_one(get_asid(), address & PAGE_MASK); -#endif - - set_thread_fault_code(error_code); - update_mmu_cache(NULL, address, pte); - - return 0; -} diff --git a/trunk/arch/sh/mm/tlbex_64.c b/trunk/arch/sh/mm/tlbex_64.c deleted file mode 100644 index 8557548fc53e..000000000000 --- a/trunk/arch/sh/mm/tlbex_64.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - * The SH64 TLB miss. - * - * Original code from fault.c - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * Fast PTE->TLB refill path - * Copyright (C) 2003 Richard.Curnow@superh.com - * - * IMPORTANT NOTES : - * The do_fast_page_fault function is called from a context in entry.S - * where very few registers have been saved. In particular, the code in - * this file must be compiled not to use ANY caller-save registers that - * are not part of the restricted save set. Also, it means that code in - * this file must not make calls to functions elsewhere in the kernel, or - * else the excepting context will see corruption in its caller-save - * registers. Plus, the entry.S save area is non-reentrant, so this code - * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic - * on any exception. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static int handle_tlbmiss(unsigned long long protection_flags, - unsigned long address) -{ - pgd_t *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte; - pte_t entry; - - if (is_vmalloc_addr((void *)address)) { - pgd = pgd_offset_k(address); - } else { - if (unlikely(address >= TASK_SIZE || !current->mm)) - return 1; - - pgd = pgd_offset(current->mm, address); - } - - pud = pud_offset(pgd, address); - if (pud_none(*pud) || !pud_present(*pud)) - return 1; - - pmd = pmd_offset(pud, address); - if (pmd_none(*pmd) || !pmd_present(*pmd)) - return 1; - - pte = pte_offset_kernel(pmd, address); - entry = *pte; - if (pte_none(entry) || !pte_present(entry)) - return 1; - - /* - * If the page doesn't have sufficient protection bits set to - * service the kind of fault being handled, there's not much - * point doing the TLB refill. Punt the fault to the general - * handler. - */ - if ((pte_val(entry) & protection_flags) != protection_flags) - return 1; - - update_mmu_cache(NULL, address, pte); - - return 0; -} - -/* - * Put all this information into one structure so that everything is just - * arithmetic relative to a single base address. This reduces the number - * of movi/shori pairs needed just to load addresses of static data. - */ -struct expevt_lookup { - unsigned short protection_flags[8]; - unsigned char is_text_access[8]; - unsigned char is_write_access[8]; -}; - -#define PRU (1<<9) -#define PRW (1<<8) -#define PRX (1<<7) -#define PRR (1<<6) - -/* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether - the fault happened in user mode or privileged mode. */ -static struct expevt_lookup expevt_lookup_table = { - .protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW}, - .is_text_access = {1, 1, 0, 0, 0, 0, 0, 0} -}; - -static inline unsigned int -expevt_to_fault_code(unsigned long expevt) -{ - if (expevt == 0xa40) - return FAULT_CODE_ITLB; - else if (expevt == 0x060) - return FAULT_CODE_WRITE; - - return 0; -} - -/* - This routine handles page faults that can be serviced just by refilling a - TLB entry from an existing page table entry. (This case represents a very - large majority of page faults.) Return 1 if the fault was successfully - handled. Return 0 if the fault could not be handled. (This leads into the - general fault handling in fault.c which deals with mapping file-backed - pages, stack growth, segmentation faults, swapping etc etc) - */ -asmlinkage int __kprobes -do_fast_page_fault(unsigned long long ssr_md, unsigned long long expevt, - unsigned long address) -{ - unsigned long long protection_flags; - unsigned long long index; - unsigned long long expevt4; - unsigned int fault_code; - - /* The next few lines implement a way of hashing EXPEVT into a - * small array index which can be used to lookup parameters - * specific to the type of TLBMISS being handled. - * - * Note: - * ITLBMISS has EXPEVT==0xa40 - * RTLBMISS has EXPEVT==0x040 - * WTLBMISS has EXPEVT==0x060 - */ - expevt4 = (expevt >> 4); - /* TODO : xor ssr_md into this expression too. Then we can check - * that PRU is set when it needs to be. */ - index = expevt4 ^ (expevt4 >> 5); - index &= 7; - - fault_code = expevt_to_fault_code(expevt); - - protection_flags = expevt_lookup_table.protection_flags[index]; - - if (expevt_lookup_table.is_text_access[index]) - fault_code |= FAULT_CODE_ITLB; - if (!ssr_md) - fault_code |= FAULT_CODE_USER; - - set_thread_fault_code(fault_code); - - return handle_tlbmiss(protection_flags, address); -} diff --git a/trunk/arch/sh/mm/tlbflush_64.c b/trunk/arch/sh/mm/tlbflush_64.c index f33fdd2558e8..11c5a18f10ed 100644 --- a/trunk/arch/sh/mm/tlbflush_64.c +++ b/trunk/arch/sh/mm/tlbflush_64.c @@ -3,7 +3,7 @@ * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2003 Richard Curnow (/proc/tlb, bug fixes) - * Copyright (C) 2003 - 2012 Paul Mundt + * Copyright (C) 2003 - 2009 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -28,6 +28,294 @@ #include #include +extern void die(const char *,struct pt_regs *,long); + +#define PFLAG(val,flag) (( (val) & (flag) ) ? #flag : "" ) +#define PPROT(flag) PFLAG(pgprot_val(prot),flag) + +static inline void print_prots(pgprot_t prot) +{ + printk("prot is 0x%016llx\n",pgprot_val(prot)); + + printk("%s %s %s %s %s\n",PPROT(_PAGE_SHARED),PPROT(_PAGE_READ), + PPROT(_PAGE_EXECUTE),PPROT(_PAGE_WRITE),PPROT(_PAGE_USER)); +} + +static inline void print_vma(struct vm_area_struct *vma) +{ + printk("vma start 0x%08lx\n", vma->vm_start); + printk("vma end 0x%08lx\n", vma->vm_end); + + print_prots(vma->vm_page_prot); + printk("vm_flags 0x%08lx\n", vma->vm_flags); +} + +static inline void print_task(struct task_struct *tsk) +{ + printk("Task pid %d\n", task_pid_nr(tsk)); +} + +static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address) +{ + pgd_t *dir; + pud_t *pud; + pmd_t *pmd; + pte_t *pte; + pte_t entry; + + dir = pgd_offset(mm, address); + if (pgd_none(*dir)) + return NULL; + + pud = pud_offset(dir, address); + if (pud_none(*pud)) + return NULL; + + pmd = pmd_offset(pud, address); + if (pmd_none(*pmd)) + return NULL; + + pte = pte_offset_kernel(pmd, address); + entry = *pte; + if (pte_none(entry) || !pte_present(entry)) + return NULL; + + return pte; +} + +/* + * This routine handles page faults. It determines the address, + * and the problem, and then passes it off to one of the appropriate + * routines. + */ +asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess, + unsigned long textaccess, unsigned long address) +{ + struct task_struct *tsk; + struct mm_struct *mm; + struct vm_area_struct * vma; + const struct exception_table_entry *fixup; + pte_t *pte; + int fault; + + /* SIM + * Note this is now called with interrupts still disabled + * This is to cope with being called for a missing IO port + * address with interrupts disabled. This should be fixed as + * soon as we have a better 'fast path' miss handler. + * + * Plus take care how you try and debug this stuff. + * For example, writing debug data to a port which you + * have just faulted on is not going to work. + */ + + tsk = current; + mm = tsk->mm; + + /* Not an IO address, so reenable interrupts */ + local_irq_enable(); + + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); + + /* + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ + if (in_atomic() || !mm) + goto no_context; + + /* TLB misses upon some cache flushes get done under cli() */ + down_read(&mm->mmap_sem); + + vma = find_vma(mm, address); + + if (!vma) { +#ifdef DEBUG_FAULT + print_task(tsk); + printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n", + __func__, __LINE__, + address,regs->pc,textaccess,writeaccess); + show_regs(regs); +#endif + goto bad_area; + } + if (vma->vm_start <= address) { + goto good_area; + } + + if (!(vma->vm_flags & VM_GROWSDOWN)) { +#ifdef DEBUG_FAULT + print_task(tsk); + printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n", + __func__, __LINE__, + address,regs->pc,textaccess,writeaccess); + show_regs(regs); + + print_vma(vma); +#endif + goto bad_area; + } + if (expand_stack(vma, address)) { +#ifdef DEBUG_FAULT + print_task(tsk); + printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n", + __func__, __LINE__, + address,regs->pc,textaccess,writeaccess); + show_regs(regs); +#endif + goto bad_area; + } +/* + * Ok, we have a good vm_area for this memory access, so + * we can handle it.. + */ +good_area: + if (textaccess) { + if (!(vma->vm_flags & VM_EXEC)) + goto bad_area; + } else { + if (writeaccess) { + if (!(vma->vm_flags & VM_WRITE)) + goto bad_area; + } else { + if (!(vma->vm_flags & VM_READ)) + goto bad_area; + } + } + + /* + * If for any reason at all we couldn't handle the fault, + * make sure we exit gracefully rather than endlessly redo + * the fault. + */ + fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0); + if (unlikely(fault & VM_FAULT_ERROR)) { + if (fault & VM_FAULT_OOM) + goto out_of_memory; + else if (fault & VM_FAULT_SIGBUS) + goto do_sigbus; + BUG(); + } + + if (fault & VM_FAULT_MAJOR) { + tsk->maj_flt++; + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, + regs, address); + } else { + tsk->min_flt++; + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, + regs, address); + } + + /* If we get here, the page fault has been handled. Do the TLB refill + now from the newly-setup PTE, to avoid having to fault again right + away on the same instruction. */ + pte = lookup_pte (mm, address); + if (!pte) { + /* From empirical evidence, we can get here, due to + !pte_present(pte). (e.g. if a swap-in occurs, and the page + is swapped back out again before the process that wanted it + gets rescheduled?) */ + goto no_pte; + } + + __do_tlb_refill(address, textaccess, pte); + +no_pte: + + up_read(&mm->mmap_sem); + return; + +/* + * Something tried to access memory that isn't in our memory map.. + * Fix it, but check if it's kernel or user first.. + */ +bad_area: +#ifdef DEBUG_FAULT + printk("fault:bad area\n"); +#endif + up_read(&mm->mmap_sem); + + if (user_mode(regs)) { + static int count=0; + siginfo_t info; + if (count < 4) { + /* This is really to help debug faults when starting + * usermode, so only need a few */ + count++; + printk("user mode bad_area address=%08lx pid=%d (%s) pc=%08lx\n", + address, task_pid_nr(current), current->comm, + (unsigned long) regs->pc); +#if 0 + show_regs(regs); +#endif + } + if (is_global_init(tsk)) { + panic("INIT had user mode bad_area\n"); + } + tsk->thread.address = address; + tsk->thread.error_code = writeaccess; + info.si_signo = SIGSEGV; + info.si_errno = 0; + info.si_addr = (void *) address; + force_sig_info(SIGSEGV, &info, tsk); + return; + } + +no_context: +#ifdef DEBUG_FAULT + printk("fault:No context\n"); +#endif + /* Are we prepared to handle this kernel fault? */ + fixup = search_exception_tables(regs->pc); + if (fixup) { + regs->pc = fixup->fixup; + return; + } + +/* + * Oops. The kernel tried to access some bad page. We'll have to + * terminate things with extreme prejudice. + * + */ + if (address < PAGE_SIZE) + printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); + else + printk(KERN_ALERT "Unable to handle kernel paging request"); + printk(" at virtual address %08lx\n", address); + printk(KERN_ALERT "pc = %08Lx%08Lx\n", regs->pc >> 32, regs->pc & 0xffffffff); + die("Oops", regs, writeaccess); + do_exit(SIGKILL); + +/* + * We ran out of memory, or some other thing happened to us that made + * us unable to handle the page fault gracefully. + */ +out_of_memory: + up_read(&mm->mmap_sem); + if (!user_mode(regs)) + goto no_context; + pagefault_out_of_memory(); + return; + +do_sigbus: + printk("fault:Do sigbus\n"); + up_read(&mm->mmap_sem); + + /* + * Send a sigbus, regardless of whether we were in kernel + * or user mode. + */ + tsk->thread.address = address; + tsk->thread.error_code = writeaccess; + tsk->thread.trap_no = 14; + force_sig(SIGBUS, tsk); + + /* Kernel mode? Handle exceptions or die */ + if (!user_mode(regs)) + goto no_context; +} + void local_flush_tlb_one(unsigned long asid, unsigned long page) { unsigned long long match, pteh=0, lpage; @@ -170,3 +458,7 @@ void __flush_tlb_global(void) { flush_tlb_all(); } + +void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) +{ +} diff --git a/trunk/arch/sh/tools/mach-types b/trunk/arch/sh/tools/mach-types index 569977e52c91..6dd56c4d0054 100644 --- a/trunk/arch/sh/tools/mach-types +++ b/trunk/arch/sh/tools/mach-types @@ -51,8 +51,6 @@ SDK7780 SH_SDK7780 MIGOR SH_MIGOR RSK7201 SH_RSK7201 RSK7203 SH_RSK7203 -RSK7264 SH_RSK7264 -RSK7269 SH_RSK7269 AP325RXA SH_AP325RXA SH2007 SH_SH2007 SH7757LCR SH_SH7757LCR diff --git a/trunk/arch/sparc/kernel/central.c b/trunk/arch/sparc/kernel/central.c index 38d48a59879c..9708851a8b9f 100644 --- a/trunk/arch/sparc/kernel/central.c +++ b/trunk/arch/sparc/kernel/central.c @@ -269,4 +269,4 @@ static int __init sunfire_init(void) return 0; } -subsys_initcall(sunfire_init); +fs_initcall(sunfire_init); diff --git a/trunk/arch/sparc/mm/ultra.S b/trunk/arch/sparc/mm/ultra.S index b57a5942ba64..874162a11ceb 100644 --- a/trunk/arch/sparc/mm/ultra.S +++ b/trunk/arch/sparc/mm/ultra.S @@ -495,11 +495,11 @@ xcall_fetch_glob_regs: stx %o7, [%g1 + GR_SNAP_O7] stx %i7, [%g1 + GR_SNAP_I7] /* Don't try this at home kids... */ - rdpr %cwp, %g2 - sub %g2, 1, %g7 + rdpr %cwp, %g3 + sub %g3, 1, %g7 wrpr %g7, %cwp mov %i7, %g7 - wrpr %g2, %cwp + wrpr %g3, %cwp stx %g7, [%g1 + GR_SNAP_RPC] sethi %hi(trap_block), %g7 or %g7, %lo(trap_block), %g7 diff --git a/trunk/arch/tile/include/asm/thread_info.h b/trunk/arch/tile/include/asm/thread_info.h index bc4f562bd459..7594764d8a69 100644 --- a/trunk/arch/tile/include/asm/thread_info.h +++ b/trunk/arch/tile/include/asm/thread_info.h @@ -100,9 +100,14 @@ extern void cpu_idle_on_new_stack(struct thread_info *old_ti, #else /* __ASSEMBLY__ */ -/* how to get the thread information struct from ASM */ +/* + * How to get the thread information struct from assembly. + * Note that we use different macros since different architectures + * have different semantics in their "mm" instruction and we would + * like to guarantee that the macro expands to exactly one instruction. + */ #ifdef __tilegx__ -#define GET_THREAD_INFO(reg) move reg, sp; mm reg, zero, LOG2_THREAD_SIZE, 63 +#define EXTRACT_THREAD_INFO(reg) mm reg, zero, LOG2_THREAD_SIZE, 63 #else #define GET_THREAD_INFO(reg) mm reg, sp, zero, LOG2_THREAD_SIZE, 31 #endif diff --git a/trunk/arch/tile/kernel/compat_signal.c b/trunk/arch/tile/kernel/compat_signal.c index 77763ccd5a7d..cdef6e5ec022 100644 --- a/trunk/arch/tile/kernel/compat_signal.c +++ b/trunk/arch/tile/kernel/compat_signal.c @@ -403,19 +403,17 @@ int compat_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, * Set up registers for signal handler. * Registers that we don't modify keep the value they had from * user-space at the time we took the signal. + * We always pass siginfo and mcontext, regardless of SA_SIGINFO, + * since some things rely on this (e.g. glibc's debug/segfault.c). */ regs->pc = ptr_to_compat_reg(ka->sa.sa_handler); regs->ex1 = PL_ICS_EX1(USER_PL, 1); /* set crit sec in handler */ regs->sp = ptr_to_compat_reg(frame); regs->lr = restorer; regs->regs[0] = (unsigned long) usig; - - if (ka->sa.sa_flags & SA_SIGINFO) { - /* Need extra arguments, so mark to restore caller-saves. */ - regs->regs[1] = ptr_to_compat_reg(&frame->info); - regs->regs[2] = ptr_to_compat_reg(&frame->uc); - regs->flags |= PT_FLAGS_CALLER_SAVES; - } + regs->regs[1] = ptr_to_compat_reg(&frame->info); + regs->regs[2] = ptr_to_compat_reg(&frame->uc); + regs->flags |= PT_FLAGS_CALLER_SAVES; /* * Notify any tracer that was single-stepping it. diff --git a/trunk/arch/tile/kernel/intvec_32.S b/trunk/arch/tile/kernel/intvec_32.S index 5d56a1ef5ba5..6943515100f8 100644 --- a/trunk/arch/tile/kernel/intvec_32.S +++ b/trunk/arch/tile/kernel/intvec_32.S @@ -838,6 +838,18 @@ STD_ENTRY(interrupt_return) .Lresume_userspace: FEEDBACK_REENTER(interrupt_return) + /* + * Use r33 to hold whether we have already loaded the callee-saves + * into ptregs. We don't want to do it twice in this loop, since + * then we'd clobber whatever changes are made by ptrace, etc. + * Get base of stack in r32. + */ + { + GET_THREAD_INFO(r32) + movei r33, 0 + } + +.Lretry_work_pending: /* * Disable interrupts so as to make sure we don't * miss an interrupt that sets any of the thread flags (like @@ -848,9 +860,6 @@ STD_ENTRY(interrupt_return) IRQ_DISABLE(r20, r21) TRACE_IRQS_OFF /* Note: clobbers registers r0-r29 */ - /* Get base of stack in r32; note r30/31 are used as arguments here. */ - GET_THREAD_INFO(r32) - /* Check to see if there is any work to do before returning to user. */ { @@ -866,16 +875,18 @@ STD_ENTRY(interrupt_return) /* * Make sure we have all the registers saved for signal - * handling or single-step. Call out to C code to figure out - * exactly what we need to do for each flag bit, then if - * necessary, reload the flags and recheck. + * handling, notify-resume, or single-step. Call out to C + * code to figure out exactly what we need to do for each flag bit, + * then if necessary, reload the flags and recheck. */ - push_extra_callee_saves r0 { PTREGS_PTR(r0, PTREGS_OFFSET_BASE) - jal do_work_pending + bnz r33, 1f } - bnz r0, .Lresume_userspace + push_extra_callee_saves r0 + movei r33, 1 +1: jal do_work_pending + bnz r0, .Lretry_work_pending /* * In the NMI case we @@ -1180,10 +1191,12 @@ handle_syscall: add r20, r20, tp lw r21, r20 addi r21, r21, 1 - sw r20, r21 + { + sw r20, r21 + GET_THREAD_INFO(r31) + } /* Trace syscalls, if requested. */ - GET_THREAD_INFO(r31) addi r31, r31, THREAD_INFO_FLAGS_OFFSET lw r30, r31 andi r30, r30, _TIF_SYSCALL_TRACE @@ -1362,7 +1375,10 @@ handle_ill: 3: /* set PC and continue */ lw r26, r24 - sw r28, r26 + { + sw r28, r26 + GET_THREAD_INFO(r0) + } /* * Clear TIF_SINGLESTEP to prevent recursion if we execute an ill. @@ -1370,7 +1386,6 @@ handle_ill: * need to clear it here and can't really impose on all other arches. * So what's another write between friends? */ - GET_THREAD_INFO(r0) addi r1, r0, THREAD_INFO_FLAGS_OFFSET { diff --git a/trunk/arch/tile/kernel/intvec_64.S b/trunk/arch/tile/kernel/intvec_64.S index 49d9d6621682..30ae76e50c44 100644 --- a/trunk/arch/tile/kernel/intvec_64.S +++ b/trunk/arch/tile/kernel/intvec_64.S @@ -646,6 +646,20 @@ STD_ENTRY(interrupt_return) .Lresume_userspace: FEEDBACK_REENTER(interrupt_return) + /* + * Use r33 to hold whether we have already loaded the callee-saves + * into ptregs. We don't want to do it twice in this loop, since + * then we'd clobber whatever changes are made by ptrace, etc. + */ + { + movei r33, 0 + move r32, sp + } + + /* Get base of stack in r32. */ + EXTRACT_THREAD_INFO(r32) + +.Lretry_work_pending: /* * Disable interrupts so as to make sure we don't * miss an interrupt that sets any of the thread flags (like @@ -656,9 +670,6 @@ STD_ENTRY(interrupt_return) IRQ_DISABLE(r20, r21) TRACE_IRQS_OFF /* Note: clobbers registers r0-r29 */ - /* Get base of stack in r32; note r30/31 are used as arguments here. */ - GET_THREAD_INFO(r32) - /* Check to see if there is any work to do before returning to user. */ { @@ -674,16 +685,18 @@ STD_ENTRY(interrupt_return) /* * Make sure we have all the registers saved for signal - * handling or single-step. Call out to C code to figure out + * handling or notify-resume. Call out to C code to figure out * exactly what we need to do for each flag bit, then if * necessary, reload the flags and recheck. */ - push_extra_callee_saves r0 { PTREGS_PTR(r0, PTREGS_OFFSET_BASE) - jal do_work_pending + bnez r33, 1f } - bnez r0, .Lresume_userspace + push_extra_callee_saves r0 + movei r33, 1 +1: jal do_work_pending + bnez r0, .Lretry_work_pending /* * In the NMI case we @@ -968,11 +981,16 @@ handle_syscall: shl16insli r20, r20, hw0(irq_stat + IRQ_CPUSTAT_SYSCALL_COUNT_OFFSET) add r20, r20, tp ld4s r21, r20 - addi r21, r21, 1 - st4 r20, r21 + { + addi r21, r21, 1 + move r31, sp + } + { + st4 r20, r21 + EXTRACT_THREAD_INFO(r31) + } /* Trace syscalls, if requested. */ - GET_THREAD_INFO(r31) addi r31, r31, THREAD_INFO_FLAGS_OFFSET ld r30, r31 andi r30, r30, _TIF_SYSCALL_TRACE diff --git a/trunk/arch/tile/kernel/process.c b/trunk/arch/tile/kernel/process.c index 2d5ef617bb39..54e6c64b85cc 100644 --- a/trunk/arch/tile/kernel/process.c +++ b/trunk/arch/tile/kernel/process.c @@ -567,6 +567,10 @@ struct task_struct *__sched _switch_to(struct task_struct *prev, */ int do_work_pending(struct pt_regs *regs, u32 thread_info_flags) { + /* If we enter in kernel mode, do nothing and exit the caller loop. */ + if (!user_mode(regs)) + return 0; + if (thread_info_flags & _TIF_NEED_RESCHED) { schedule(); return 1; @@ -589,8 +593,7 @@ int do_work_pending(struct pt_regs *regs, u32 thread_info_flags) return 1; } if (thread_info_flags & _TIF_SINGLESTEP) { - if ((regs->ex1 & SPR_EX_CONTEXT_1_1__PL_MASK) == 0) - single_step_once(regs); + single_step_once(regs); return 0; } panic("work_pending: bad flags %#x\n", thread_info_flags); diff --git a/trunk/arch/x86/include/asm/kvm_para.h b/trunk/arch/x86/include/asm/kvm_para.h index 734c3767cfac..183922e13de1 100644 --- a/trunk/arch/x86/include/asm/kvm_para.h +++ b/trunk/arch/x86/include/asm/kvm_para.h @@ -170,6 +170,9 @@ static inline int kvm_para_available(void) unsigned int eax, ebx, ecx, edx; char signature[13]; + if (boot_cpu_data.cpuid_level < 0) + return 0; /* So we don't blow up on old processors */ + cpuid(KVM_CPUID_SIGNATURE, &eax, &ebx, &ecx, &edx); memcpy(signature + 0, &ebx, 4); memcpy(signature + 4, &ecx, 4); diff --git a/trunk/arch/x86/kernel/acpi/boot.c b/trunk/arch/x86/kernel/acpi/boot.c index a415b1f44365..7c439fe4941b 100644 --- a/trunk/arch/x86/kernel/acpi/boot.c +++ b/trunk/arch/x86/kernel/acpi/boot.c @@ -593,7 +593,7 @@ void __init acpi_set_irq_model_ioapic(void) #ifdef CONFIG_ACPI_HOTPLUG_CPU #include -static void __cpuinitdata acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) +static void __cpuinit acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) { #ifdef CONFIG_ACPI_NUMA int nid; diff --git a/trunk/arch/x86/kernel/microcode_intel.c b/trunk/arch/x86/kernel/microcode_intel.c index 3ca42d0e43a2..0327e2b3c408 100644 --- a/trunk/arch/x86/kernel/microcode_intel.c +++ b/trunk/arch/x86/kernel/microcode_intel.c @@ -147,12 +147,6 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) memset(csig, 0, sizeof(*csig)); - if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 || - cpu_has(c, X86_FEATURE_IA64)) { - pr_err("CPU%d not a capable Intel processor\n", cpu_num); - return -1; - } - csig->sig = cpuid_eax(0x00000001); if ((c->x86_model >= 5) || (c->x86 > 6)) { @@ -463,6 +457,14 @@ static struct microcode_ops microcode_intel_ops = { struct microcode_ops * __init init_intel_microcode(void) { + struct cpuinfo_x86 *c = &cpu_data(0); + + if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 || + cpu_has(c, X86_FEATURE_IA64)) { + pr_err("Intel CPU family 0x%x not supported\n", c->x86); + return NULL; + } + return µcode_intel_ops; } diff --git a/trunk/drivers/acpi/bus.c b/trunk/drivers/acpi/bus.c index 3263b68cdfa3..3188da3df8da 100644 --- a/trunk/drivers/acpi/bus.c +++ b/trunk/drivers/acpi/bus.c @@ -250,6 +250,10 @@ static int __acpi_bus_set_power(struct acpi_device *device, int state) return -ENODEV; } + /* For D3cold we should execute _PS3, not _PS4. */ + if (state == ACPI_STATE_D3_COLD) + object_name[3] = '3'; + /* * Transition Power * ---------------- diff --git a/trunk/drivers/acpi/power.c b/trunk/drivers/acpi/power.c index 330bb4d75852..0500f719f63e 100644 --- a/trunk/drivers/acpi/power.c +++ b/trunk/drivers/acpi/power.c @@ -660,7 +660,7 @@ int acpi_power_on_resources(struct acpi_device *device, int state) int acpi_power_transition(struct acpi_device *device, int state) { - int result; + int result = 0; if (!device || (state < ACPI_STATE_D0) || (state > ACPI_STATE_D3_COLD)) return -EINVAL; @@ -679,8 +679,11 @@ int acpi_power_transition(struct acpi_device *device, int state) * (e.g. so the device doesn't lose power while transitioning). Then, * we dereference all power resources used in the current list. */ - result = acpi_power_on_list(&device->power.states[state].resources); - if (!result) + if (state < ACPI_STATE_D3_COLD) + result = acpi_power_on_list( + &device->power.states[state].resources); + + if (!result && device->power.state < ACPI_STATE_D3_COLD) acpi_power_off_list( &device->power.states[device->power.state].resources); diff --git a/trunk/drivers/acpi/scan.c b/trunk/drivers/acpi/scan.c index 7417267e88fa..85cbfdccc97c 100644 --- a/trunk/drivers/acpi/scan.c +++ b/trunk/drivers/acpi/scan.c @@ -908,6 +908,10 @@ static int acpi_bus_get_power_flags(struct acpi_device *device) device->power.states[ACPI_STATE_D3].flags.valid = 1; device->power.states[ACPI_STATE_D3].power = 0; + /* Set D3cold's explicit_set flag if _PS3 exists. */ + if (device->power.states[ACPI_STATE_D3_HOT].flags.explicit_set) + device->power.states[ACPI_STATE_D3_COLD].flags.explicit_set = 1; + acpi_bus_init_power(device); return 0; diff --git a/trunk/drivers/block/drbd/drbd_nl.c b/trunk/drivers/block/drbd/drbd_nl.c index abfaacaaf346..946166e13953 100644 --- a/trunk/drivers/block/drbd/drbd_nl.c +++ b/trunk/drivers/block/drbd/drbd_nl.c @@ -2297,7 +2297,7 @@ static void drbd_connector_callback(struct cn_msg *req, struct netlink_skb_parms return; } - if (!cap_raised(current_cap(), CAP_SYS_ADMIN)) { + if (!capable(CAP_SYS_ADMIN)) { retcode = ERR_PERM; goto fail; } diff --git a/trunk/drivers/char/virtio_console.c b/trunk/drivers/char/virtio_console.c index ddf86b6500b7..cdf2f5451c76 100644 --- a/trunk/drivers/char/virtio_console.c +++ b/trunk/drivers/char/virtio_console.c @@ -1895,6 +1895,13 @@ static int virtcons_restore(struct virtio_device *vdev) /* Get port open/close status on the host */ send_control_msg(port, VIRTIO_CONSOLE_PORT_READY, 1); + + /* + * If a port was open at the time of suspending, we + * have to let the host know that it's still open. + */ + if (port->guest_connected) + send_control_msg(port, VIRTIO_CONSOLE_PORT_OPEN, 1); } return 0; } diff --git a/trunk/drivers/crypto/Kconfig b/trunk/drivers/crypto/Kconfig index ab9abb46d01a..dd414d9350ef 100644 --- a/trunk/drivers/crypto/Kconfig +++ b/trunk/drivers/crypto/Kconfig @@ -164,6 +164,7 @@ config CRYPTO_DEV_MV_CESA select CRYPTO_ALGAPI select CRYPTO_AES select CRYPTO_BLKCIPHER2 + select CRYPTO_HASH help This driver allows you to utilize the Cryptographic Engines and Security Accelerator (CESA) which can be found on the Marvell Orion diff --git a/trunk/drivers/dma/at_hdmac.c b/trunk/drivers/dma/at_hdmac.c index 445fdf811695..bf0d7e4e345b 100644 --- a/trunk/drivers/dma/at_hdmac.c +++ b/trunk/drivers/dma/at_hdmac.c @@ -245,7 +245,9 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc) dev_vdbg(chan2dev(&atchan->chan_common), "descriptor %u complete\n", txd->cookie); - dma_cookie_complete(txd); + /* mark the descriptor as complete for non cyclic cases only */ + if (!atc_chan_is_cyclic(atchan)) + dma_cookie_complete(txd); /* move children to free_list */ list_splice_init(&desc->tx_list, &atchan->free_list); diff --git a/trunk/drivers/dma/ep93xx_dma.c b/trunk/drivers/dma/ep93xx_dma.c index e6f133b78dc2..f6e9b572b998 100644 --- a/trunk/drivers/dma/ep93xx_dma.c +++ b/trunk/drivers/dma/ep93xx_dma.c @@ -703,7 +703,9 @@ static void ep93xx_dma_tasklet(unsigned long data) desc = ep93xx_dma_get_active(edmac); if (desc) { if (desc->complete) { - dma_cookie_complete(&desc->txd); + /* mark descriptor complete for non cyclic case only */ + if (!test_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags)) + dma_cookie_complete(&desc->txd); list_splice_init(&edmac->active, &list); } callback = desc->txd.callback; diff --git a/trunk/drivers/dma/pl330.c b/trunk/drivers/dma/pl330.c index 2ee6e23930ad..fa3fb21e60be 100644 --- a/trunk/drivers/dma/pl330.c +++ b/trunk/drivers/dma/pl330.c @@ -2322,7 +2322,8 @@ static void pl330_tasklet(unsigned long data) /* Pick up ripe tomatoes */ list_for_each_entry_safe(desc, _dt, &pch->work_list, node) if (desc->status == DONE) { - dma_cookie_complete(&desc->txd); + if (pch->cyclic) + dma_cookie_complete(&desc->txd); list_move_tail(&desc->node, &list); } diff --git a/trunk/drivers/gpio/gpio-omap.c b/trunk/drivers/gpio/gpio-omap.c index 1adc2ec1e383..4461540653a8 100644 --- a/trunk/drivers/gpio/gpio-omap.c +++ b/trunk/drivers/gpio/gpio-omap.c @@ -965,18 +965,15 @@ static void omap_gpio_mod_init(struct gpio_bank *bank) } _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv); - _gpio_rmw(base, bank->regs->irqstatus, l, - bank->regs->irqenable_inv == false); - _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->debounce_en != 0); - _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->ctrl != 0); + _gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv); if (bank->regs->debounce_en) - _gpio_rmw(base, bank->regs->debounce_en, 0, 1); + __raw_writel(0, base + bank->regs->debounce_en); /* Save OE default value (0xffffffff) in the context */ bank->context.oe = __raw_readl(bank->base + bank->regs->direction); /* Initialize interface clk ungated, module enabled */ if (bank->regs->ctrl) - _gpio_rmw(base, bank->regs->ctrl, 0, 1); + __raw_writel(0, base + bank->regs->ctrl); } static __devinit void diff --git a/trunk/drivers/gpio/gpio-pch.c b/trunk/drivers/gpio/gpio-pch.c index e8729cc2ba2b..2cd958e0b822 100644 --- a/trunk/drivers/gpio/gpio-pch.c +++ b/trunk/drivers/gpio/gpio-pch.c @@ -230,16 +230,12 @@ static void pch_gpio_setup(struct pch_gpio *chip) static int pch_irq_type(struct irq_data *d, unsigned int type) { - u32 im; - u32 __iomem *im_reg; - u32 ien; - u32 im_pos; - int ch; - unsigned long flags; - u32 val; - int irq = d->irq; struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct pch_gpio *chip = gc->private; + u32 im, im_pos, val; + u32 __iomem *im_reg; + unsigned long flags; + int ch, irq = d->irq; ch = irq - chip->irq_base; if (irq <= chip->irq_base + 7) { @@ -270,30 +266,22 @@ static int pch_irq_type(struct irq_data *d, unsigned int type) case IRQ_TYPE_LEVEL_LOW: val = PCH_LEVEL_L; break; - case IRQ_TYPE_PROBE: - goto end; default: - dev_warn(chip->dev, "%s: unknown type(%dd)", - __func__, type); - goto end; + goto unlock; } /* Set interrupt mode */ im = ioread32(im_reg) & ~(PCH_IM_MASK << (im_pos * 4)); iowrite32(im | (val << (im_pos * 4)), im_reg); - /* iclr */ - iowrite32(BIT(ch), &chip->reg->iclr); + /* And the handler */ + if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) + __irq_set_handler_locked(d->irq, handle_level_irq); + else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) + __irq_set_handler_locked(d->irq, handle_edge_irq); - /* IMASKCLR */ - iowrite32(BIT(ch), &chip->reg->imaskclr); - - /* Enable interrupt */ - ien = ioread32(&chip->reg->ien); - iowrite32(ien | BIT(ch), &chip->reg->ien); -end: +unlock: spin_unlock_irqrestore(&chip->spinlock, flags); - return 0; } @@ -313,18 +301,24 @@ static void pch_irq_mask(struct irq_data *d) iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->imask); } +static void pch_irq_ack(struct irq_data *d) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); + struct pch_gpio *chip = gc->private; + + iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->iclr); +} + static irqreturn_t pch_gpio_handler(int irq, void *dev_id) { struct pch_gpio *chip = dev_id; u32 reg_val = ioread32(&chip->reg->istatus); - int i; - int ret = IRQ_NONE; + int i, ret = IRQ_NONE; for (i = 0; i < gpio_pins[chip->ioh]; i++) { if (reg_val & BIT(i)) { dev_dbg(chip->dev, "%s:[%d]:irq=%d status=0x%x\n", __func__, i, irq, reg_val); - iowrite32(BIT(i), &chip->reg->iclr); generic_handle_irq(chip->irq_base + i); ret = IRQ_HANDLED; } @@ -343,6 +337,7 @@ static __devinit void pch_gpio_alloc_generic_chip(struct pch_gpio *chip, gc->private = chip; ct = gc->chip_types; + ct->chip.irq_ack = pch_irq_ack; ct->chip.irq_mask = pch_irq_mask; ct->chip.irq_unmask = pch_irq_unmask; ct->chip.irq_set_type = pch_irq_type; @@ -357,6 +352,7 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev, s32 ret; struct pch_gpio *chip; int irq_base; + u32 msk; chip = kzalloc(sizeof(*chip), GFP_KERNEL); if (chip == NULL) @@ -408,8 +404,13 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev, } chip->irq_base = irq_base; + /* Mask all interrupts, but enable them */ + msk = (1 << gpio_pins[chip->ioh]) - 1; + iowrite32(msk, &chip->reg->imask); + iowrite32(msk, &chip->reg->ien); + ret = request_irq(pdev->irq, pch_gpio_handler, - IRQF_SHARED, KBUILD_MODNAME, chip); + IRQF_SHARED, KBUILD_MODNAME, chip); if (ret != 0) { dev_err(&pdev->dev, "%s request_irq failed\n", __func__); @@ -418,8 +419,6 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev, pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]); - /* Initialize interrupt ien register */ - iowrite32(0, &chip->reg->ien); end: return 0; diff --git a/trunk/drivers/gpio/gpio-samsung.c b/trunk/drivers/gpio/gpio-samsung.c index 19d6fc0229c3..e991d9171961 100644 --- a/trunk/drivers/gpio/gpio-samsung.c +++ b/trunk/drivers/gpio/gpio-samsung.c @@ -452,12 +452,14 @@ static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = { }; #endif +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) static struct samsung_gpio_cfg exynos_gpio_cfg = { .set_pull = exynos_gpio_setpull, .get_pull = exynos_gpio_getpull, .set_config = samsung_gpio_setcfg_4bit, .get_config = samsung_gpio_getcfg_4bit, }; +#endif #if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = { @@ -2123,8 +2125,8 @@ static struct samsung_gpio_chip s5pv210_gpios_4bit[] = { * uses the above macro and depends on the banks being listed in order here. */ -static struct samsung_gpio_chip exynos4_gpios_1[] = { #ifdef CONFIG_ARCH_EXYNOS4 +static struct samsung_gpio_chip exynos4_gpios_1[] = { { .chip = { .base = EXYNOS4_GPA0(0), @@ -2222,11 +2224,11 @@ static struct samsung_gpio_chip exynos4_gpios_1[] = { .label = "GPF3", }, }, -#endif }; +#endif -static struct samsung_gpio_chip exynos4_gpios_2[] = { #ifdef CONFIG_ARCH_EXYNOS4 +static struct samsung_gpio_chip exynos4_gpios_2[] = { { .chip = { .base = EXYNOS4_GPJ0(0), @@ -2367,11 +2369,11 @@ static struct samsung_gpio_chip exynos4_gpios_2[] = { .to_irq = samsung_gpiolib_to_irq, }, }, -#endif }; +#endif -static struct samsung_gpio_chip exynos4_gpios_3[] = { #ifdef CONFIG_ARCH_EXYNOS4 +static struct samsung_gpio_chip exynos4_gpios_3[] = { { .chip = { .base = EXYNOS4_GPZ(0), @@ -2379,8 +2381,8 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = { .label = "GPZ", }, }, -#endif }; +#endif #ifdef CONFIG_ARCH_EXYNOS5 static struct samsung_gpio_chip exynos5_gpios_1[] = { @@ -2719,7 +2721,9 @@ static __init int samsung_gpiolib_init(void) { struct samsung_gpio_chip *chip; int i, nr_chips; +#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS5250) void __iomem *gpio_base1, *gpio_base2, *gpio_base3, *gpio_base4; +#endif int group = 0; samsung_gpiolib_set_cfg(samsung_gpio_cfgs, ARRAY_SIZE(samsung_gpio_cfgs)); @@ -2971,6 +2975,7 @@ static __init int samsung_gpiolib_init(void) return 0; +#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS5250) err_ioremap4: iounmap(gpio_base3); err_ioremap3: @@ -2979,6 +2984,7 @@ static __init int samsung_gpiolib_init(void) iounmap(gpio_base1); err_ioremap1: return -ENOMEM; +#endif } core_initcall(samsung_gpiolib_init); diff --git a/trunk/drivers/leds/leds-netxbig.c b/trunk/drivers/leds/leds-netxbig.c index d8433f2d53bc..73973fdbd8be 100644 --- a/trunk/drivers/leds/leds-netxbig.c +++ b/trunk/drivers/leds/leds-netxbig.c @@ -112,7 +112,7 @@ static int __devinit gpio_ext_init(struct netxbig_gpio_ext *gpio_ext) return err; } -static void __devexit gpio_ext_free(struct netxbig_gpio_ext *gpio_ext) +static void gpio_ext_free(struct netxbig_gpio_ext *gpio_ext) { int i; @@ -294,7 +294,7 @@ static ssize_t netxbig_led_sata_show(struct device *dev, static DEVICE_ATTR(sata, 0644, netxbig_led_sata_show, netxbig_led_sata_store); -static void __devexit delete_netxbig_led(struct netxbig_led_data *led_dat) +static void delete_netxbig_led(struct netxbig_led_data *led_dat) { if (led_dat->mode_val[NETXBIG_LED_SATA] != NETXBIG_LED_INVALID_MODE) device_remove_file(led_dat->cdev.dev, &dev_attr_sata); diff --git a/trunk/drivers/leds/leds-ns2.c b/trunk/drivers/leds/leds-ns2.c index 2f0a14421a73..01cf89ec6944 100644 --- a/trunk/drivers/leds/leds-ns2.c +++ b/trunk/drivers/leds/leds-ns2.c @@ -255,7 +255,7 @@ create_ns2_led(struct platform_device *pdev, struct ns2_led_data *led_dat, return ret; } -static void __devexit delete_ns2_led(struct ns2_led_data *led_dat) +static void delete_ns2_led(struct ns2_led_data *led_dat) { device_remove_file(led_dat->cdev.dev, &dev_attr_sata); led_classdev_unregister(&led_dat->cdev); diff --git a/trunk/drivers/md/dm-log-userspace-transfer.c b/trunk/drivers/md/dm-log-userspace-transfer.c index 1f23e048f077..08d9a207259a 100644 --- a/trunk/drivers/md/dm-log-userspace-transfer.c +++ b/trunk/drivers/md/dm-log-userspace-transfer.c @@ -134,7 +134,7 @@ static void cn_ulog_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp) { struct dm_ulog_request *tfr = (struct dm_ulog_request *)(msg + 1); - if (!cap_raised(current_cap(), CAP_SYS_ADMIN)) + if (!capable(CAP_SYS_ADMIN)) return; spin_lock(&receiving_list_lock); diff --git a/trunk/drivers/md/dm-mpath.c b/trunk/drivers/md/dm-mpath.c index 922a3385eead..754f38f8a692 100644 --- a/trunk/drivers/md/dm-mpath.c +++ b/trunk/drivers/md/dm-mpath.c @@ -718,8 +718,8 @@ static int parse_hw_handler(struct dm_arg_set *as, struct multipath *m) return 0; m->hw_handler_name = kstrdup(dm_shift_arg(as), GFP_KERNEL); - request_module("scsi_dh_%s", m->hw_handler_name); - if (scsi_dh_handler_exist(m->hw_handler_name) == 0) { + if (!try_then_request_module(scsi_dh_handler_exist(m->hw_handler_name), + "scsi_dh_%s", m->hw_handler_name)) { ti->error = "unknown hardware handler type"; ret = -EINVAL; goto fail; diff --git a/trunk/drivers/md/dm-thin.c b/trunk/drivers/md/dm-thin.c index 213ae32a0fc4..2fd87b544a93 100644 --- a/trunk/drivers/md/dm-thin.c +++ b/trunk/drivers/md/dm-thin.c @@ -279,8 +279,10 @@ static void __cell_release(struct cell *cell, struct bio_list *inmates) hlist_del(&cell->list); - bio_list_add(inmates, cell->holder); - bio_list_merge(inmates, &cell->bios); + if (inmates) { + bio_list_add(inmates, cell->holder); + bio_list_merge(inmates, &cell->bios); + } mempool_free(cell, prison->cell_pool); } @@ -303,9 +305,10 @@ static void cell_release(struct cell *cell, struct bio_list *bios) */ static void __cell_release_singleton(struct cell *cell, struct bio *bio) { - hlist_del(&cell->list); BUG_ON(cell->holder != bio); BUG_ON(!bio_list_empty(&cell->bios)); + + __cell_release(cell, NULL); } static void cell_release_singleton(struct cell *cell, struct bio *bio) @@ -1177,6 +1180,7 @@ static void no_space(struct cell *cell) static void process_discard(struct thin_c *tc, struct bio *bio) { int r; + unsigned long flags; struct pool *pool = tc->pool; struct cell *cell, *cell2; struct cell_key key, key2; @@ -1218,7 +1222,9 @@ static void process_discard(struct thin_c *tc, struct bio *bio) m->bio = bio; if (!ds_add_work(&pool->all_io_ds, &m->list)) { + spin_lock_irqsave(&pool->lock, flags); list_add(&m->list, &pool->prepared_discards); + spin_unlock_irqrestore(&pool->lock, flags); wake_worker(pool); } } else { @@ -2626,8 +2632,10 @@ static int thin_endio(struct dm_target *ti, if (h->all_io_entry) { INIT_LIST_HEAD(&work); ds_dec(h->all_io_entry, &work); + spin_lock_irqsave(&pool->lock, flags); list_for_each_entry_safe(m, tmp, &work, list) list_add(&m->list, &pool->prepared_discards); + spin_unlock_irqrestore(&pool->lock, flags); } mempool_free(h, pool->endio_hook_pool); @@ -2759,6 +2767,6 @@ static void dm_thin_exit(void) module_init(dm_thin_init); module_exit(dm_thin_exit); -MODULE_DESCRIPTION(DM_NAME "device-mapper thin provisioning target"); +MODULE_DESCRIPTION(DM_NAME " thin provisioning target"); MODULE_AUTHOR("Joe Thornber "); MODULE_LICENSE("GPL"); diff --git a/trunk/drivers/md/md.c b/trunk/drivers/md/md.c index 477eb2e180c0..01233d855eb2 100644 --- a/trunk/drivers/md/md.c +++ b/trunk/drivers/md/md.c @@ -391,6 +391,8 @@ void mddev_suspend(struct mddev *mddev) synchronize_rcu(); wait_event(mddev->sb_wait, atomic_read(&mddev->active_io) == 0); mddev->pers->quiesce(mddev, 1); + + del_timer_sync(&mddev->safemode_timer); } EXPORT_SYMBOL_GPL(mddev_suspend); diff --git a/trunk/drivers/md/raid10.c b/trunk/drivers/md/raid10.c index c8dbb84d5357..3e7b1548111a 100644 --- a/trunk/drivers/md/raid10.c +++ b/trunk/drivers/md/raid10.c @@ -3164,12 +3164,40 @@ raid10_size(struct mddev *mddev, sector_t sectors, int raid_disks) return size << conf->chunk_shift; } +static void calc_sectors(struct r10conf *conf, sector_t size) +{ + /* Calculate the number of sectors-per-device that will + * actually be used, and set conf->dev_sectors and + * conf->stride + */ + + size = size >> conf->chunk_shift; + sector_div(size, conf->far_copies); + size = size * conf->raid_disks; + sector_div(size, conf->near_copies); + /* 'size' is now the number of chunks in the array */ + /* calculate "used chunks per device" */ + size = size * conf->copies; + + /* We need to round up when dividing by raid_disks to + * get the stride size. + */ + size = DIV_ROUND_UP_SECTOR_T(size, conf->raid_disks); + + conf->dev_sectors = size << conf->chunk_shift; + + if (conf->far_offset) + conf->stride = 1 << conf->chunk_shift; + else { + sector_div(size, conf->near_copies); + conf->stride = size << conf->chunk_shift; + } +} static struct r10conf *setup_conf(struct mddev *mddev) { struct r10conf *conf = NULL; int nc, fc, fo; - sector_t stride, size; int err = -EINVAL; if (mddev->new_chunk_sectors < (PAGE_SIZE >> 9) || @@ -3219,28 +3247,7 @@ static struct r10conf *setup_conf(struct mddev *mddev) if (!conf->r10bio_pool) goto out; - size = mddev->dev_sectors >> conf->chunk_shift; - sector_div(size, fc); - size = size * conf->raid_disks; - sector_div(size, nc); - /* 'size' is now the number of chunks in the array */ - /* calculate "used chunks per device" in 'stride' */ - stride = size * conf->copies; - - /* We need to round up when dividing by raid_disks to - * get the stride size. - */ - stride += conf->raid_disks - 1; - sector_div(stride, conf->raid_disks); - - conf->dev_sectors = stride << conf->chunk_shift; - - if (fo) - stride = 1; - else - sector_div(stride, fc); - conf->stride = stride << conf->chunk_shift; - + calc_sectors(conf, mddev->dev_sectors); spin_lock_init(&conf->device_lock); INIT_LIST_HEAD(&conf->retry_list); @@ -3468,7 +3475,8 @@ static int raid10_resize(struct mddev *mddev, sector_t sectors) mddev->recovery_cp = oldsize; set_bit(MD_RECOVERY_NEEDED, &mddev->recovery); } - mddev->dev_sectors = sectors; + calc_sectors(conf, sectors); + mddev->dev_sectors = conf->dev_sectors; mddev->resync_max_sectors = size; return 0; } diff --git a/trunk/drivers/media/dvb/dvb-core/dvb_frontend.c b/trunk/drivers/media/dvb/dvb-core/dvb_frontend.c index 0f64d7182657..cb888d835a89 100644 --- a/trunk/drivers/media/dvb/dvb-core/dvb_frontend.c +++ b/trunk/drivers/media/dvb/dvb-core/dvb_frontend.c @@ -1921,6 +1921,10 @@ static int dtv_set_frontend(struct dvb_frontend *fe) } else { /* default values */ switch (c->delivery_system) { + case SYS_DVBS: + case SYS_DVBS2: + case SYS_ISDBS: + case SYS_TURBO: case SYS_DVBC_ANNEX_A: case SYS_DVBC_ANNEX_C: fepriv->min_delay = HZ / 20; diff --git a/trunk/drivers/media/rc/ene_ir.c b/trunk/drivers/media/rc/ene_ir.c index 860c112e0fd2..bef5296173c9 100644 --- a/trunk/drivers/media/rc/ene_ir.c +++ b/trunk/drivers/media/rc/ene_ir.c @@ -1018,22 +1018,6 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id) spin_lock_init(&dev->hw_lock); - /* claim the resources */ - error = -EBUSY; - dev->hw_io = pnp_port_start(pnp_dev, 0); - if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) { - dev->hw_io = -1; - dev->irq = -1; - goto error; - } - - dev->irq = pnp_irq(pnp_dev, 0); - if (request_irq(dev->irq, ene_isr, - IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) { - dev->irq = -1; - goto error; - } - pnp_set_drvdata(pnp_dev, dev); dev->pnp_dev = pnp_dev; @@ -1086,6 +1070,22 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id) device_set_wakeup_capable(&pnp_dev->dev, true); device_set_wakeup_enable(&pnp_dev->dev, true); + /* claim the resources */ + error = -EBUSY; + dev->hw_io = pnp_port_start(pnp_dev, 0); + if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) { + dev->hw_io = -1; + dev->irq = -1; + goto error; + } + + dev->irq = pnp_irq(pnp_dev, 0); + if (request_irq(dev->irq, ene_isr, + IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) { + dev->irq = -1; + goto error; + } + error = rc_register_device(rdev); if (error < 0) goto error; diff --git a/trunk/drivers/media/rc/fintek-cir.c b/trunk/drivers/media/rc/fintek-cir.c index 392d4be91f8f..4a3a238bcfbc 100644 --- a/trunk/drivers/media/rc/fintek-cir.c +++ b/trunk/drivers/media/rc/fintek-cir.c @@ -197,7 +197,7 @@ static int fintek_hw_detect(struct fintek_dev *fintek) /* * Newer reviews of this chipset uses port 8 instead of 5 */ - if ((chip != 0x0408) || (chip != 0x0804)) + if ((chip != 0x0408) && (chip != 0x0804)) fintek->logical_dev_cir = LOGICAL_DEV_CIR_REV2; else fintek->logical_dev_cir = LOGICAL_DEV_CIR_REV1; @@ -514,16 +514,6 @@ static int fintek_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id spin_lock_init(&fintek->fintek_lock); - ret = -EBUSY; - /* now claim resources */ - if (!request_region(fintek->cir_addr, - fintek->cir_port_len, FINTEK_DRIVER_NAME)) - goto failure; - - if (request_irq(fintek->cir_irq, fintek_cir_isr, IRQF_SHARED, - FINTEK_DRIVER_NAME, (void *)fintek)) - goto failure; - pnp_set_drvdata(pdev, fintek); fintek->pdev = pdev; @@ -558,6 +548,16 @@ static int fintek_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id /* rx resolution is hardwired to 50us atm, 1, 25, 100 also possible */ rdev->rx_resolution = US_TO_NS(CIR_SAMPLE_PERIOD); + ret = -EBUSY; + /* now claim resources */ + if (!request_region(fintek->cir_addr, + fintek->cir_port_len, FINTEK_DRIVER_NAME)) + goto failure; + + if (request_irq(fintek->cir_irq, fintek_cir_isr, IRQF_SHARED, + FINTEK_DRIVER_NAME, (void *)fintek)) + goto failure; + ret = rc_register_device(rdev); if (ret) goto failure; diff --git a/trunk/drivers/media/rc/ite-cir.c b/trunk/drivers/media/rc/ite-cir.c index 682009d76cdf..0e49c99abf68 100644 --- a/trunk/drivers/media/rc/ite-cir.c +++ b/trunk/drivers/media/rc/ite-cir.c @@ -1515,16 +1515,6 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id /* initialize raw event */ init_ir_raw_event(&itdev->rawir); - ret = -EBUSY; - /* now claim resources */ - if (!request_region(itdev->cir_addr, - dev_desc->io_region_size, ITE_DRIVER_NAME)) - goto failure; - - if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED, - ITE_DRIVER_NAME, (void *)itdev)) - goto failure; - /* set driver data into the pnp device */ pnp_set_drvdata(pdev, itdev); itdev->pdev = pdev; @@ -1600,6 +1590,16 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id rdev->driver_name = ITE_DRIVER_NAME; rdev->map_name = RC_MAP_RC6_MCE; + ret = -EBUSY; + /* now claim resources */ + if (!request_region(itdev->cir_addr, + dev_desc->io_region_size, ITE_DRIVER_NAME)) + goto failure; + + if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED, + ITE_DRIVER_NAME, (void *)itdev)) + goto failure; + ret = rc_register_device(rdev); if (ret) goto failure; diff --git a/trunk/drivers/media/rc/nuvoton-cir.c b/trunk/drivers/media/rc/nuvoton-cir.c index 144f3f55d765..8b2c071ac0ab 100644 --- a/trunk/drivers/media/rc/nuvoton-cir.c +++ b/trunk/drivers/media/rc/nuvoton-cir.c @@ -1021,24 +1021,6 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id) spin_lock_init(&nvt->nvt_lock); spin_lock_init(&nvt->tx.lock); - ret = -EBUSY; - /* now claim resources */ - if (!request_region(nvt->cir_addr, - CIR_IOREG_LENGTH, NVT_DRIVER_NAME)) - goto failure; - - if (request_irq(nvt->cir_irq, nvt_cir_isr, IRQF_SHARED, - NVT_DRIVER_NAME, (void *)nvt)) - goto failure; - - if (!request_region(nvt->cir_wake_addr, - CIR_IOREG_LENGTH, NVT_DRIVER_NAME)) - goto failure; - - if (request_irq(nvt->cir_wake_irq, nvt_cir_wake_isr, IRQF_SHARED, - NVT_DRIVER_NAME, (void *)nvt)) - goto failure; - pnp_set_drvdata(pdev, nvt); nvt->pdev = pdev; @@ -1085,6 +1067,24 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id) rdev->tx_resolution = XYZ; #endif + ret = -EBUSY; + /* now claim resources */ + if (!request_region(nvt->cir_addr, + CIR_IOREG_LENGTH, NVT_DRIVER_NAME)) + goto failure; + + if (request_irq(nvt->cir_irq, nvt_cir_isr, IRQF_SHARED, + NVT_DRIVER_NAME, (void *)nvt)) + goto failure; + + if (!request_region(nvt->cir_wake_addr, + CIR_IOREG_LENGTH, NVT_DRIVER_NAME)) + goto failure; + + if (request_irq(nvt->cir_wake_irq, nvt_cir_wake_isr, IRQF_SHARED, + NVT_DRIVER_NAME, (void *)nvt)) + goto failure; + ret = rc_register_device(rdev); if (ret) goto failure; diff --git a/trunk/drivers/media/rc/winbond-cir.c b/trunk/drivers/media/rc/winbond-cir.c index af526586fa26..342c2c8c1ddf 100644 --- a/trunk/drivers/media/rc/winbond-cir.c +++ b/trunk/drivers/media/rc/winbond-cir.c @@ -991,39 +991,10 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id) "(w: 0x%lX, e: 0x%lX, s: 0x%lX, i: %u)\n", data->wbase, data->ebase, data->sbase, data->irq); - if (!request_region(data->wbase, WAKEUP_IOMEM_LEN, DRVNAME)) { - dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", - data->wbase, data->wbase + WAKEUP_IOMEM_LEN - 1); - err = -EBUSY; - goto exit_free_data; - } - - if (!request_region(data->ebase, EHFUNC_IOMEM_LEN, DRVNAME)) { - dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", - data->ebase, data->ebase + EHFUNC_IOMEM_LEN - 1); - err = -EBUSY; - goto exit_release_wbase; - } - - if (!request_region(data->sbase, SP_IOMEM_LEN, DRVNAME)) { - dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", - data->sbase, data->sbase + SP_IOMEM_LEN - 1); - err = -EBUSY; - goto exit_release_ebase; - } - - err = request_irq(data->irq, wbcir_irq_handler, - IRQF_DISABLED, DRVNAME, device); - if (err) { - dev_err(dev, "Failed to claim IRQ %u\n", data->irq); - err = -EBUSY; - goto exit_release_sbase; - } - led_trigger_register_simple("cir-tx", &data->txtrigger); if (!data->txtrigger) { err = -ENOMEM; - goto exit_free_irq; + goto exit_free_data; } led_trigger_register_simple("cir-rx", &data->rxtrigger); @@ -1062,9 +1033,38 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id) data->dev->priv = data; data->dev->dev.parent = &device->dev; + if (!request_region(data->wbase, WAKEUP_IOMEM_LEN, DRVNAME)) { + dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", + data->wbase, data->wbase + WAKEUP_IOMEM_LEN - 1); + err = -EBUSY; + goto exit_free_rc; + } + + if (!request_region(data->ebase, EHFUNC_IOMEM_LEN, DRVNAME)) { + dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", + data->ebase, data->ebase + EHFUNC_IOMEM_LEN - 1); + err = -EBUSY; + goto exit_release_wbase; + } + + if (!request_region(data->sbase, SP_IOMEM_LEN, DRVNAME)) { + dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", + data->sbase, data->sbase + SP_IOMEM_LEN - 1); + err = -EBUSY; + goto exit_release_ebase; + } + + err = request_irq(data->irq, wbcir_irq_handler, + IRQF_DISABLED, DRVNAME, device); + if (err) { + dev_err(dev, "Failed to claim IRQ %u\n", data->irq); + err = -EBUSY; + goto exit_release_sbase; + } + err = rc_register_device(data->dev); if (err) - goto exit_free_rc; + goto exit_free_irq; device_init_wakeup(&device->dev, 1); @@ -1072,14 +1072,6 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id) return 0; -exit_free_rc: - rc_free_device(data->dev); -exit_unregister_led: - led_classdev_unregister(&data->led); -exit_unregister_rxtrigger: - led_trigger_unregister_simple(data->rxtrigger); -exit_unregister_txtrigger: - led_trigger_unregister_simple(data->txtrigger); exit_free_irq: free_irq(data->irq, device); exit_release_sbase: @@ -1088,6 +1080,14 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id) release_region(data->ebase, EHFUNC_IOMEM_LEN); exit_release_wbase: release_region(data->wbase, WAKEUP_IOMEM_LEN); +exit_free_rc: + rc_free_device(data->dev); +exit_unregister_led: + led_classdev_unregister(&data->led); +exit_unregister_rxtrigger: + led_trigger_unregister_simple(data->rxtrigger); +exit_unregister_txtrigger: + led_trigger_unregister_simple(data->txtrigger); exit_free_data: kfree(data); pnp_set_drvdata(device, NULL); diff --git a/trunk/drivers/media/video/gspca/sonixj.c b/trunk/drivers/media/video/gspca/sonixj.c index db8e5084df06..863c755dd2b7 100644 --- a/trunk/drivers/media/video/gspca/sonixj.c +++ b/trunk/drivers/media/video/gspca/sonixj.c @@ -2923,6 +2923,10 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev, * not the JPEG end of frame ('ff d9'). */ + /* count the packets and their size */ + sd->npkt++; + sd->pktsz += len; + /*fixme: assumption about the following code: * - there can be only one marker in a packet */ @@ -2945,10 +2949,6 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev, data += i; } - /* count the packets and their size */ - sd->npkt++; - sd->pktsz += len; - /* search backwards if there is a marker in the packet */ for (i = len - 1; --i >= 0; ) { if (data[i] != 0xff) { diff --git a/trunk/drivers/media/video/marvell-ccic/mmp-driver.c b/trunk/drivers/media/video/marvell-ccic/mmp-driver.c index d23552323f45..c4c17fe76c0d 100644 --- a/trunk/drivers/media/video/marvell-ccic/mmp-driver.c +++ b/trunk/drivers/media/video/marvell-ccic/mmp-driver.c @@ -181,7 +181,6 @@ static int mmpcam_probe(struct platform_device *pdev) INIT_LIST_HEAD(&cam->devlist); mcam = &cam->mcam; - mcam->platform = MHP_Armada610; mcam->plat_power_up = mmpcam_power_up; mcam->plat_power_down = mmpcam_power_down; mcam->dev = &pdev->dev; diff --git a/trunk/drivers/media/video/s5p-fimc/fimc-capture.c b/trunk/drivers/media/video/s5p-fimc/fimc-capture.c index b06efd208328..7e9b2c612b03 100644 --- a/trunk/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/trunk/drivers/media/video/s5p-fimc/fimc-capture.c @@ -246,28 +246,37 @@ int fimc_capture_resume(struct fimc_dev *fimc) } -static unsigned int get_plane_size(struct fimc_frame *fr, unsigned int plane) -{ - if (!fr || plane >= fr->fmt->memplanes) - return 0; - return fr->f_width * fr->f_height * fr->fmt->depth[plane] / 8; -} - -static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt, +static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt, unsigned int *num_buffers, unsigned int *num_planes, unsigned int sizes[], void *allocators[]) { + const struct v4l2_pix_format_mplane *pixm = NULL; struct fimc_ctx *ctx = vq->drv_priv; - struct fimc_fmt *fmt = ctx->d_frame.fmt; + struct fimc_frame *frame = &ctx->d_frame; + struct fimc_fmt *fmt = frame->fmt; + unsigned long wh; int i; - if (!fmt) + if (pfmt) { + pixm = &pfmt->fmt.pix_mp; + fmt = fimc_find_format(&pixm->pixelformat, NULL, + FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1); + wh = pixm->width * pixm->height; + } else { + wh = frame->f_width * frame->f_height; + } + + if (fmt == NULL) return -EINVAL; *num_planes = fmt->memplanes; for (i = 0; i < fmt->memplanes; i++) { - sizes[i] = get_plane_size(&ctx->d_frame, i); + unsigned int size = (wh * fmt->depth[i]) / 8; + if (pixm) + sizes[i] = max(size, pixm->plane_fmt[i].sizeimage); + else + sizes[i] = size; allocators[i] = ctx->fimc_dev->alloc_ctx; } @@ -1383,7 +1392,7 @@ static int fimc_subdev_set_crop(struct v4l2_subdev *sd, fimc_capture_try_crop(ctx, r, crop->pad); if (crop->which == V4L2_SUBDEV_FORMAT_TRY) { - mutex_lock(&fimc->lock); + mutex_unlock(&fimc->lock); *v4l2_subdev_get_try_crop(fh, crop->pad) = *r; return 0; } diff --git a/trunk/drivers/media/video/s5p-fimc/fimc-core.c b/trunk/drivers/media/video/s5p-fimc/fimc-core.c index e184e650022a..e09ba7b0076e 100644 --- a/trunk/drivers/media/video/s5p-fimc/fimc-core.c +++ b/trunk/drivers/media/video/s5p-fimc/fimc-core.c @@ -1048,14 +1048,14 @@ static int fimc_m2m_g_fmt_mplane(struct file *file, void *fh, * @mask: the color flags to match * @index: offset in the fimc_formats array, ignored if negative */ -struct fimc_fmt *fimc_find_format(u32 *pixelformat, u32 *mbus_code, +struct fimc_fmt *fimc_find_format(const u32 *pixelformat, const u32 *mbus_code, unsigned int mask, int index) { struct fimc_fmt *fmt, *def_fmt = NULL; unsigned int i; int id = 0; - if (index >= ARRAY_SIZE(fimc_formats)) + if (index >= (int)ARRAY_SIZE(fimc_formats)) return NULL; for (i = 0; i < ARRAY_SIZE(fimc_formats); ++i) { diff --git a/trunk/drivers/media/video/s5p-fimc/fimc-core.h b/trunk/drivers/media/video/s5p-fimc/fimc-core.h index a18291e648e2..84fd83550bd7 100644 --- a/trunk/drivers/media/video/s5p-fimc/fimc-core.h +++ b/trunk/drivers/media/video/s5p-fimc/fimc-core.h @@ -718,7 +718,7 @@ void fimc_alpha_ctrl_update(struct fimc_ctx *ctx); int fimc_fill_format(struct fimc_frame *frame, struct v4l2_format *f); void fimc_adjust_mplane_format(struct fimc_fmt *fmt, u32 width, u32 height, struct v4l2_pix_format_mplane *pix); -struct fimc_fmt *fimc_find_format(u32 *pixelformat, u32 *mbus_code, +struct fimc_fmt *fimc_find_format(const u32 *pixelformat, const u32 *mbus_code, unsigned int mask, int index); int fimc_check_scaler_ratio(struct fimc_ctx *ctx, int sw, int sh, diff --git a/trunk/drivers/media/video/soc_camera.c b/trunk/drivers/media/video/soc_camera.c index eb25756a07af..aedb970d13f6 100644 --- a/trunk/drivers/media/video/soc_camera.c +++ b/trunk/drivers/media/video/soc_camera.c @@ -530,7 +530,10 @@ static int soc_camera_open(struct file *file) if (icl->reset) icl->reset(icd->pdev); + /* Don't mess with the host during probe */ + mutex_lock(&ici->host_lock); ret = ici->ops->add(icd); + mutex_unlock(&ici->host_lock); if (ret < 0) { dev_err(icd->pdev, "Couldn't activate the camera: %d\n", ret); goto eiciadd; @@ -956,7 +959,7 @@ static void scan_add_host(struct soc_camera_host *ici) { struct soc_camera_device *icd; - mutex_lock(&list_lock); + mutex_lock(&ici->host_lock); list_for_each_entry(icd, &devices, list) { if (icd->iface == ici->nr) { @@ -967,7 +970,7 @@ static void scan_add_host(struct soc_camera_host *ici) } } - mutex_unlock(&list_lock); + mutex_unlock(&ici->host_lock); } #ifdef CONFIG_I2C_BOARDINFO @@ -1313,6 +1316,7 @@ int soc_camera_host_register(struct soc_camera_host *ici) list_add_tail(&ici->list, &hosts); mutex_unlock(&list_lock); + mutex_init(&ici->host_lock); scan_add_host(ici); return 0; diff --git a/trunk/drivers/media/video/videobuf2-dma-contig.c b/trunk/drivers/media/video/videobuf2-dma-contig.c index f17ad98fcc5f..4b7132660a93 100644 --- a/trunk/drivers/media/video/videobuf2-dma-contig.c +++ b/trunk/drivers/media/video/videobuf2-dma-contig.c @@ -15,6 +15,7 @@ #include #include +#include #include struct vb2_dc_conf { @@ -85,7 +86,7 @@ static void *vb2_dma_contig_vaddr(void *buf_priv) { struct vb2_dc_buf *buf = buf_priv; if (!buf) - return 0; + return NULL; return buf->vaddr; } diff --git a/trunk/drivers/media/video/videobuf2-memops.c b/trunk/drivers/media/video/videobuf2-memops.c index c41cb60245d6..504cd4cbe29e 100644 --- a/trunk/drivers/media/video/videobuf2-memops.c +++ b/trunk/drivers/media/video/videobuf2-memops.c @@ -55,6 +55,7 @@ struct vm_area_struct *vb2_get_vma(struct vm_area_struct *vma) return vma_copy; } +EXPORT_SYMBOL_GPL(vb2_get_vma); /** * vb2_put_userptr() - release a userspace virtual memory area diff --git a/trunk/drivers/mtd/mtdchar.c b/trunk/drivers/mtd/mtdchar.c index 58fc65f5c817..f2f482bec573 100644 --- a/trunk/drivers/mtd/mtdchar.c +++ b/trunk/drivers/mtd/mtdchar.c @@ -376,7 +376,7 @@ static int otp_select_filemode(struct mtd_file_info *mfi, int mode) * Make a fake call to mtd_read_fact_prot_reg() to check if OTP * operations are supported. */ - if (mtd_read_fact_prot_reg(mtd, -1, -1, &retlen, NULL) == -EOPNOTSUPP) + if (mtd_read_fact_prot_reg(mtd, -1, 0, &retlen, NULL) == -EOPNOTSUPP) return -EOPNOTSUPP; switch (mode) { diff --git a/trunk/drivers/mtd/nand/ams-delta.c b/trunk/drivers/mtd/nand/ams-delta.c index 73416951f4c1..861ca8f7e47d 100644 --- a/trunk/drivers/mtd/nand/ams-delta.c +++ b/trunk/drivers/mtd/nand/ams-delta.c @@ -212,18 +212,17 @@ static int __devinit ams_delta_init(struct platform_device *pdev) /* Link the private data with the MTD structure */ ams_delta_mtd->priv = this; - if (!request_mem_region(res->start, resource_size(res), - dev_name(&pdev->dev))) { - dev_err(&pdev->dev, "request_mem_region failed\n"); - err = -EBUSY; - goto out_free; - } + /* + * Don't try to request the memory region from here, + * it should have been already requested from the + * gpio-omap driver and requesting it again would fail. + */ io_base = ioremap(res->start, resource_size(res)); if (io_base == NULL) { dev_err(&pdev->dev, "ioremap failed\n"); err = -EIO; - goto out_release_io; + goto out_free; } this->priv = io_base; @@ -271,8 +270,6 @@ static int __devinit ams_delta_init(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB); iounmap(io_base); -out_release_io: - release_mem_region(res->start, resource_size(res)); out_free: kfree(ams_delta_mtd); out: @@ -285,7 +282,6 @@ static int __devinit ams_delta_init(struct platform_device *pdev) static int __devexit ams_delta_cleanup(struct platform_device *pdev) { void __iomem *io_base = platform_get_drvdata(pdev); - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); /* Release resources, unregister device */ nand_release(ams_delta_mtd); @@ -293,7 +289,6 @@ static int __devexit ams_delta_cleanup(struct platform_device *pdev) gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio)); gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB); iounmap(io_base); - release_mem_region(res->start, resource_size(res)); /* Free the MTD device structure */ kfree(ams_delta_mtd); diff --git a/trunk/drivers/net/bonding/bond_3ad.c b/trunk/drivers/net/bonding/bond_3ad.c index 793b00138275..3463b469e657 100644 --- a/trunk/drivers/net/bonding/bond_3ad.c +++ b/trunk/drivers/net/bonding/bond_3ad.c @@ -2173,9 +2173,10 @@ void bond_3ad_state_machine_handler(struct work_struct *work) * received frames (loopback). Since only the payload is given to this * function, it check for loopback. */ -static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u16 length) +static int bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u16 length) { struct port *port; + int ret = RX_HANDLER_ANOTHER; if (length >= sizeof(struct lacpdu)) { @@ -2184,11 +2185,12 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u if (!port->slave) { pr_warning("%s: Warning: port of slave %s is uninitialized\n", slave->dev->name, slave->dev->master->name); - return; + return ret; } switch (lacpdu->subtype) { case AD_TYPE_LACPDU: + ret = RX_HANDLER_CONSUMED; pr_debug("Received LACPDU on port %d\n", port->actor_port_number); /* Protect against concurrent state machines */ @@ -2198,6 +2200,7 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u break; case AD_TYPE_MARKER: + ret = RX_HANDLER_CONSUMED; // No need to convert fields to Little Endian since we don't use the marker's fields. switch (((struct bond_marker *)lacpdu)->tlv_type) { @@ -2219,6 +2222,7 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u } } } + return ret; } /** @@ -2456,18 +2460,20 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev) return NETDEV_TX_OK; } -void bond_3ad_lacpdu_recv(struct sk_buff *skb, struct bonding *bond, +int bond_3ad_lacpdu_recv(struct sk_buff *skb, struct bonding *bond, struct slave *slave) { + int ret = RX_HANDLER_ANOTHER; if (skb->protocol != PKT_TYPE_LACPDU) - return; + return ret; if (!pskb_may_pull(skb, sizeof(struct lacpdu))) - return; + return ret; read_lock(&bond->lock); - bond_3ad_rx_indication((struct lacpdu *) skb->data, slave, skb->len); + ret = bond_3ad_rx_indication((struct lacpdu *) skb->data, slave, skb->len); read_unlock(&bond->lock); + return ret; } /* diff --git a/trunk/drivers/net/bonding/bond_3ad.h b/trunk/drivers/net/bonding/bond_3ad.h index 235b2cc58b28..5ee7e3c45db7 100644 --- a/trunk/drivers/net/bonding/bond_3ad.h +++ b/trunk/drivers/net/bonding/bond_3ad.h @@ -274,7 +274,7 @@ void bond_3ad_adapter_duplex_changed(struct slave *slave); void bond_3ad_handle_link_change(struct slave *slave, char link); int bond_3ad_get_active_agg_info(struct bonding *bond, struct ad_info *ad_info); int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev); -void bond_3ad_lacpdu_recv(struct sk_buff *skb, struct bonding *bond, +int bond_3ad_lacpdu_recv(struct sk_buff *skb, struct bonding *bond, struct slave *slave); int bond_3ad_set_carrier(struct bonding *bond); void bond_3ad_update_lacp_rate(struct bonding *bond); diff --git a/trunk/drivers/net/bonding/bond_alb.c b/trunk/drivers/net/bonding/bond_alb.c index 9abfde479316..2e1f8066f1a8 100644 --- a/trunk/drivers/net/bonding/bond_alb.c +++ b/trunk/drivers/net/bonding/bond_alb.c @@ -342,26 +342,26 @@ static void rlb_update_entry_from_arp(struct bonding *bond, struct arp_pkt *arp) _unlock_rx_hashtbl_bh(bond); } -static void rlb_arp_recv(struct sk_buff *skb, struct bonding *bond, +static int rlb_arp_recv(struct sk_buff *skb, struct bonding *bond, struct slave *slave) { struct arp_pkt *arp; if (skb->protocol != cpu_to_be16(ETH_P_ARP)) - return; + goto out; arp = (struct arp_pkt *) skb->data; if (!arp) { pr_debug("Packet has no ARP data\n"); - return; + goto out; } if (!pskb_may_pull(skb, arp_hdr_len(bond->dev))) - return; + goto out; if (skb->len < sizeof(struct arp_pkt)) { pr_debug("Packet is too small to be an ARP\n"); - return; + goto out; } if (arp->op_code == htons(ARPOP_REPLY)) { @@ -369,6 +369,8 @@ static void rlb_arp_recv(struct sk_buff *skb, struct bonding *bond, rlb_update_entry_from_arp(bond, arp); pr_debug("Server received an ARP Reply from client\n"); } +out: + return RX_HANDLER_ANOTHER; } /* Caller must hold bond lock for read */ diff --git a/trunk/drivers/net/bonding/bond_main.c b/trunk/drivers/net/bonding/bond_main.c index 62d2409bb293..bc13b3d77432 100644 --- a/trunk/drivers/net/bonding/bond_main.c +++ b/trunk/drivers/net/bonding/bond_main.c @@ -1444,8 +1444,9 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb) struct sk_buff *skb = *pskb; struct slave *slave; struct bonding *bond; - void (*recv_probe)(struct sk_buff *, struct bonding *, + int (*recv_probe)(struct sk_buff *, struct bonding *, struct slave *); + int ret = RX_HANDLER_ANOTHER; skb = skb_share_check(skb, GFP_ATOMIC); if (unlikely(!skb)) @@ -1464,8 +1465,12 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb) struct sk_buff *nskb = skb_clone(skb, GFP_ATOMIC); if (likely(nskb)) { - recv_probe(nskb, bond, slave); + ret = recv_probe(nskb, bond, slave); dev_kfree_skb(nskb); + if (ret == RX_HANDLER_CONSUMED) { + consume_skb(skb); + return ret; + } } } @@ -1487,7 +1492,7 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb) memcpy(eth_hdr(skb)->h_dest, bond->dev->dev_addr, ETH_ALEN); } - return RX_HANDLER_ANOTHER; + return ret; } /* enslave device to bond device */ @@ -2723,7 +2728,7 @@ static void bond_validate_arp(struct bonding *bond, struct slave *slave, __be32 } } -static void bond_arp_rcv(struct sk_buff *skb, struct bonding *bond, +static int bond_arp_rcv(struct sk_buff *skb, struct bonding *bond, struct slave *slave) { struct arphdr *arp; @@ -2731,7 +2736,7 @@ static void bond_arp_rcv(struct sk_buff *skb, struct bonding *bond, __be32 sip, tip; if (skb->protocol != __cpu_to_be16(ETH_P_ARP)) - return; + return RX_HANDLER_ANOTHER; read_lock(&bond->lock); @@ -2776,6 +2781,7 @@ static void bond_arp_rcv(struct sk_buff *skb, struct bonding *bond, out_unlock: read_unlock(&bond->lock); + return RX_HANDLER_ANOTHER; } /* diff --git a/trunk/drivers/net/bonding/bonding.h b/trunk/drivers/net/bonding/bonding.h index 9f2bae6616d3..4581aa5ccaba 100644 --- a/trunk/drivers/net/bonding/bonding.h +++ b/trunk/drivers/net/bonding/bonding.h @@ -218,7 +218,7 @@ struct bonding { struct slave *primary_slave; bool force_primary; s32 slave_cnt; /* never change this value outside the attach/detach wrappers */ - void (*recv_probe)(struct sk_buff *, struct bonding *, + int (*recv_probe)(struct sk_buff *, struct bonding *, struct slave *); rwlock_t lock; rwlock_t curr_slave_lock; diff --git a/trunk/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/trunk/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index e077d2508727..6af310195bae 100644 --- a/trunk/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/trunk/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c @@ -9122,13 +9122,34 @@ static int __devinit bnx2x_prev_unload_common(struct bnx2x *bp) return bnx2x_prev_mcp_done(bp); } +/* previous driver DMAE transaction may have occurred when pre-boot stage ended + * and boot began, or when kdump kernel was loaded. Either case would invalidate + * the addresses of the transaction, resulting in was-error bit set in the pci + * causing all hw-to-host pcie transactions to timeout. If this happened we want + * to clear the interrupt which detected this from the pglueb and the was done + * bit + */ +static void __devinit bnx2x_prev_interrupted_dmae(struct bnx2x *bp) +{ + u32 val = REG_RD(bp, PGLUE_B_REG_PGLUE_B_INT_STS); + if (val & PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN) { + BNX2X_ERR("was error bit was found to be set in pglueb upon startup. Clearing"); + REG_WR(bp, PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR, 1 << BP_FUNC(bp)); + } +} + static int __devinit bnx2x_prev_unload(struct bnx2x *bp) { int time_counter = 10; u32 rc, fw, hw_lock_reg, hw_lock_val; BNX2X_DEV_INFO("Entering Previous Unload Flow\n"); - /* Release previously held locks */ + /* clear hw from errors which may have resulted from an interrupted + * dmae transaction. + */ + bnx2x_prev_interrupted_dmae(bp); + + /* Release previously held locks */ hw_lock_reg = (BP_FUNC(bp) <= 5) ? (MISC_REG_DRIVER_CONTROL_1 + BP_FUNC(bp) * 8) : (MISC_REG_DRIVER_CONTROL_7 + (BP_FUNC(bp) - 6) * 8); diff --git a/trunk/drivers/net/ethernet/ibm/ehea/ehea_main.c b/trunk/drivers/net/ethernet/ibm/ehea/ehea_main.c index c9069a28832b..f4d2da0db1b1 100644 --- a/trunk/drivers/net/ethernet/ibm/ehea/ehea_main.c +++ b/trunk/drivers/net/ethernet/ibm/ehea/ehea_main.c @@ -3335,6 +3335,8 @@ static int __devinit ehea_probe_adapter(struct platform_device *dev, goto out_shutdown_ports; } + /* Handle any events that might be pending. */ + tasklet_hi_schedule(&adapter->neq_tasklet); ret = 0; goto out; diff --git a/trunk/drivers/net/ethernet/intel/e1000/e1000_main.c b/trunk/drivers/net/ethernet/intel/e1000/e1000_main.c index 4348b6fd44fa..8d8908d2a9b1 100644 --- a/trunk/drivers/net/ethernet/intel/e1000/e1000_main.c +++ b/trunk/drivers/net/ethernet/intel/e1000/e1000_main.c @@ -493,7 +493,11 @@ static void e1000_power_down_phy(struct e1000_adapter *adapter) static void e1000_down_and_stop(struct e1000_adapter *adapter) { set_bit(__E1000_DOWN, &adapter->flags); - cancel_work_sync(&adapter->reset_task); + + /* Only kill reset task if adapter is not resetting */ + if (!test_bit(__E1000_RESETTING, &adapter->flags)) + cancel_work_sync(&adapter->reset_task); + cancel_delayed_work_sync(&adapter->watchdog_task); cancel_delayed_work_sync(&adapter->phy_info_task); cancel_delayed_work_sync(&adapter->fifo_stall_task); @@ -3380,7 +3384,7 @@ static void e1000_dump(struct e1000_adapter *adapter) for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i); struct e1000_buffer *buffer_info = &tx_ring->buffer_info[i]; - struct my_u { u64 a; u64 b; }; + struct my_u { __le64 a; __le64 b; }; struct my_u *u = (struct my_u *)tx_desc; const char *type; @@ -3424,7 +3428,7 @@ static void e1000_dump(struct e1000_adapter *adapter) for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) { struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i); struct e1000_buffer *buffer_info = &rx_ring->buffer_info[i]; - struct my_u { u64 a; u64 b; }; + struct my_u { __le64 a; __le64 b; }; struct my_u *u = (struct my_u *)rx_desc; const char *type; diff --git a/trunk/drivers/net/ethernet/intel/igb/igb_main.c b/trunk/drivers/net/ethernet/intel/igb/igb_main.c index 5ec31598ee47..8683ca4748c8 100644 --- a/trunk/drivers/net/ethernet/intel/igb/igb_main.c +++ b/trunk/drivers/net/ethernet/intel/igb/igb_main.c @@ -1111,9 +1111,12 @@ static int igb_set_interrupt_capability(struct igb_adapter *adapter) adapter->flags |= IGB_FLAG_HAS_MSI; out: /* Notify the stack of the (possibly) reduced queue counts. */ + rtnl_lock(); netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues); - return netif_set_real_num_rx_queues(adapter->netdev, - adapter->num_rx_queues); + err = netif_set_real_num_rx_queues(adapter->netdev, + adapter->num_rx_queues); + rtnl_unlock(); + return err; } /** @@ -2771,8 +2774,6 @@ void igb_configure_tx_ring(struct igb_adapter *adapter, txdctl |= E1000_TXDCTL_QUEUE_ENABLE; wr32(E1000_TXDCTL(reg_idx), txdctl); - - netdev_tx_reset_queue(txring_txq(ring)); } /** @@ -3282,6 +3283,8 @@ static void igb_clean_tx_ring(struct igb_ring *tx_ring) igb_unmap_and_free_tx_resource(tx_ring, buffer_info); } + netdev_tx_reset_queue(txring_txq(tx_ring)); + size = sizeof(struct igb_tx_buffer) * tx_ring->count; memset(tx_ring->tx_buffer_info, 0, size); @@ -6796,18 +6799,7 @@ static int igb_resume(struct device *dev) pci_enable_wake(pdev, PCI_D3hot, 0); pci_enable_wake(pdev, PCI_D3cold, 0); - if (!rtnl_is_locked()) { - /* - * shut up ASSERT_RTNL() warning in - * netif_set_real_num_tx/rx_queues. - */ - rtnl_lock(); - err = igb_init_interrupt_scheme(adapter); - rtnl_unlock(); - } else { - err = igb_init_interrupt_scheme(adapter); - } - if (err) { + if (igb_init_interrupt_scheme(adapter)) { dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); return -ENOMEM; } diff --git a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe.h index 74e192107f9a..81b155589532 100644 --- a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe.h +++ b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe.h @@ -574,9 +574,6 @@ extern struct ixgbe_info ixgbe_82599_info; extern struct ixgbe_info ixgbe_X540_info; #ifdef CONFIG_IXGBE_DCB extern const struct dcbnl_rtnl_ops dcbnl_ops; -extern int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg, - struct ixgbe_dcb_config *dst_dcb_cfg, - int tc_max); #endif extern char ixgbe_driver_name[]; diff --git a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c index 652e4b09546d..32e5c02ff6d0 100644 --- a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c +++ b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c @@ -44,18 +44,26 @@ #define DCB_NO_HW_CHG 1 /* DCB configuration did not change */ #define DCB_HW_CHG 2 /* DCB configuration changed, no reset */ -int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *scfg, - struct ixgbe_dcb_config *dcfg, int tc_max) +static int ixgbe_copy_dcb_cfg(struct ixgbe_adapter *adapter, int tc_max) { + struct ixgbe_dcb_config *scfg = &adapter->temp_dcb_cfg; + struct ixgbe_dcb_config *dcfg = &adapter->dcb_cfg; struct tc_configuration *src = NULL; struct tc_configuration *dst = NULL; int i, j; int tx = DCB_TX_CONFIG; int rx = DCB_RX_CONFIG; int changes = 0; +#ifdef IXGBE_FCOE + struct dcb_app app = { + .selector = DCB_APP_IDTYPE_ETHTYPE, + .protocol = ETH_P_FCOE, + }; + u8 up = dcb_getapp(adapter->netdev, &app); - if (!scfg || !dcfg) - return changes; + if (up && !(up & (1 << adapter->fcoe.up))) + changes |= BIT_APP_UPCHG; +#endif for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) { src = &scfg->tc_config[i - DCB_PG_ATTR_TC_0]; @@ -332,28 +340,12 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) struct ixgbe_adapter *adapter = netdev_priv(netdev); int ret = DCB_NO_HW_CHG; int i; -#ifdef IXGBE_FCOE - struct dcb_app app = { - .selector = DCB_APP_IDTYPE_ETHTYPE, - .protocol = ETH_P_FCOE, - }; - u8 up; - - /* In IEEE mode, use the IEEE Ethertype selector value */ - if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) { - app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; - up = dcb_ieee_getapp_mask(netdev, &app); - } else { - up = dcb_getapp(netdev, &app); - } -#endif /* Fail command if not in CEE mode */ if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) return ret; - adapter->dcb_set_bitmap |= ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, - &adapter->dcb_cfg, + adapter->dcb_set_bitmap |= ixgbe_copy_dcb_cfg(adapter, MAX_TRAFFIC_CLASS); if (!adapter->dcb_set_bitmap) return ret; @@ -440,8 +432,13 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) * FCoE is using changes. This happens if the APP info * changes or the up2tc mapping is updated. */ - if ((up && !(up & (1 << adapter->fcoe.up))) || - (adapter->dcb_set_bitmap & BIT_APP_UPCHG)) { + if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) { + struct dcb_app app = { + .selector = DCB_APP_IDTYPE_ETHTYPE, + .protocol = ETH_P_FCOE, + }; + u8 up = dcb_getapp(netdev, &app); + adapter->fcoe.up = ffs(up) - 1; ixgbe_dcbnl_devreset(netdev); ret = DCB_HW_CHG_RST; diff --git a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c index 31a2bf76a346..cfe7d269590c 100644 --- a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c +++ b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c @@ -1780,6 +1780,8 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); } + netdev_tx_reset_queue(txring_txq(tx_ring)); + /* re-map buffers to ring, store next to clean values */ ixgbe_alloc_rx_buffers(rx_ring, count); rx_ring->next_to_clean = rx_ntc; diff --git a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 88f6b2e9b72d..467948e9ecd9 100644 --- a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c @@ -2671,8 +2671,6 @@ void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter, /* enable queue */ IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl); - netdev_tx_reset_queue(txring_txq(ring)); - /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */ if (hw->mac.type == ixgbe_mac_82598EB && !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) @@ -4167,6 +4165,8 @@ static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring) ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info); } + netdev_tx_reset_queue(txring_txq(tx_ring)); + size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count; memset(tx_ring->tx_buffer_info, 0, size); @@ -4418,8 +4418,8 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) adapter->dcb_cfg.pfc_mode_enable = false; adapter->dcb_set_bitmap = 0x00; adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE; - ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg, - MAX_TRAFFIC_CLASS); + memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg, + sizeof(adapter->temp_dcb_cfg)); #endif @@ -4866,10 +4866,12 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake) netif_device_detach(netdev); if (netif_running(netdev)) { + rtnl_lock(); ixgbe_down(adapter); ixgbe_free_irq(adapter); ixgbe_free_all_tx_resources(adapter); ixgbe_free_all_rx_resources(adapter); + rtnl_unlock(); } ixgbe_clear_interrupt_scheme(adapter); diff --git a/trunk/drivers/net/ethernet/micrel/ks8851.c b/trunk/drivers/net/ethernet/micrel/ks8851.c index f8dda009d3c0..5e313e9a252f 100644 --- a/trunk/drivers/net/ethernet/micrel/ks8851.c +++ b/trunk/drivers/net/ethernet/micrel/ks8851.c @@ -618,10 +618,8 @@ static void ks8851_irq_work(struct work_struct *work) netif_dbg(ks, intr, ks->netdev, "%s: status 0x%04x\n", __func__, status); - if (status & IRQ_LCI) { - /* should do something about checking link status */ + if (status & IRQ_LCI) handled |= IRQ_LCI; - } if (status & IRQ_LDI) { u16 pmecr = ks8851_rdreg16(ks, KS_PMECR); @@ -684,6 +682,9 @@ static void ks8851_irq_work(struct work_struct *work) mutex_unlock(&ks->lock); + if (status & IRQ_LCI) + mii_check_link(&ks->mii); + if (status & IRQ_TXI) netif_wake_queue(ks->netdev); diff --git a/trunk/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h b/trunk/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h index dd14915f54bb..ba781747d174 100644 --- a/trunk/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h +++ b/trunk/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h @@ -584,7 +584,6 @@ struct pch_gbe_hw_stats { /** * struct pch_gbe_adapter - board specific private data structure * @stats_lock: Spinlock structure for status - * @tx_queue_lock: Spinlock structure for transmit * @ethtool_lock: Spinlock structure for ethtool * @irq_sem: Semaphore for interrupt * @netdev: Pointer of network device structure @@ -609,7 +608,6 @@ struct pch_gbe_hw_stats { struct pch_gbe_adapter { spinlock_t stats_lock; - spinlock_t tx_queue_lock; spinlock_t ethtool_lock; atomic_t irq_sem; struct net_device *netdev; diff --git a/trunk/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/trunk/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index 8035e5ff6e06..1e38d502a062 100644 --- a/trunk/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +++ b/trunk/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c @@ -640,14 +640,11 @@ static void pch_gbe_mac_set_pause_packet(struct pch_gbe_hw *hw) */ static int pch_gbe_alloc_queues(struct pch_gbe_adapter *adapter) { - int size; - - size = (int)sizeof(struct pch_gbe_tx_ring); - adapter->tx_ring = kzalloc(size, GFP_KERNEL); + adapter->tx_ring = kzalloc(sizeof(*adapter->tx_ring), GFP_KERNEL); if (!adapter->tx_ring) return -ENOMEM; - size = (int)sizeof(struct pch_gbe_rx_ring); - adapter->rx_ring = kzalloc(size, GFP_KERNEL); + + adapter->rx_ring = kzalloc(sizeof(*adapter->rx_ring), GFP_KERNEL); if (!adapter->rx_ring) { kfree(adapter->tx_ring); return -ENOMEM; @@ -1162,7 +1159,6 @@ static void pch_gbe_tx_queue(struct pch_gbe_adapter *adapter, struct sk_buff *tmp_skb; unsigned int frame_ctrl; unsigned int ring_num; - unsigned long flags; /*-- Set frame control --*/ frame_ctrl = 0; @@ -1211,14 +1207,14 @@ static void pch_gbe_tx_queue(struct pch_gbe_adapter *adapter, } } } - spin_lock_irqsave(&tx_ring->tx_lock, flags); + ring_num = tx_ring->next_to_use; if (unlikely((ring_num + 1) == tx_ring->count)) tx_ring->next_to_use = 0; else tx_ring->next_to_use = ring_num + 1; - spin_unlock_irqrestore(&tx_ring->tx_lock, flags); + buffer_info = &tx_ring->buffer_info[ring_num]; tmp_skb = buffer_info->skb; @@ -1518,7 +1514,7 @@ pch_gbe_alloc_rx_buffers_pool(struct pch_gbe_adapter *adapter, &rx_ring->rx_buff_pool_logic, GFP_KERNEL); if (!rx_ring->rx_buff_pool) { - pr_err("Unable to allocate memory for the receive poll buffer\n"); + pr_err("Unable to allocate memory for the receive pool buffer\n"); return -ENOMEM; } memset(rx_ring->rx_buff_pool, 0, size); @@ -1637,15 +1633,17 @@ pch_gbe_clean_tx(struct pch_gbe_adapter *adapter, pr_debug("called pch_gbe_unmap_and_free_tx_resource() %d count\n", cleaned_count); /* Recover from running out of Tx resources in xmit_frame */ + spin_lock(&tx_ring->tx_lock); if (unlikely(cleaned && (netif_queue_stopped(adapter->netdev)))) { netif_wake_queue(adapter->netdev); adapter->stats.tx_restart_count++; pr_debug("Tx wake queue\n"); } - spin_lock(&adapter->tx_queue_lock); + tx_ring->next_to_clean = i; - spin_unlock(&adapter->tx_queue_lock); + pr_debug("next_to_clean : %d\n", tx_ring->next_to_clean); + spin_unlock(&tx_ring->tx_lock); return cleaned; } @@ -2037,7 +2035,6 @@ static int pch_gbe_sw_init(struct pch_gbe_adapter *adapter) return -ENOMEM; } spin_lock_init(&adapter->hw.miim_lock); - spin_lock_init(&adapter->tx_queue_lock); spin_lock_init(&adapter->stats_lock); spin_lock_init(&adapter->ethtool_lock); atomic_set(&adapter->irq_sem, 0); @@ -2142,10 +2139,10 @@ static int pch_gbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev) tx_ring->next_to_use, tx_ring->next_to_clean); return NETDEV_TX_BUSY; } - spin_unlock_irqrestore(&tx_ring->tx_lock, flags); /* CRC,ITAG no support */ pch_gbe_tx_queue(adapter, tx_ring, skb); + spin_unlock_irqrestore(&tx_ring->tx_lock, flags); return NETDEV_TX_OK; } diff --git a/trunk/drivers/net/ethernet/realtek/r8169.c b/trunk/drivers/net/ethernet/realtek/r8169.c index f54509377efa..ce6b44d1f252 100644 --- a/trunk/drivers/net/ethernet/realtek/r8169.c +++ b/trunk/drivers/net/ethernet/realtek/r8169.c @@ -61,8 +61,12 @@ #define R8169_MSG_DEFAULT \ (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN) -#define TX_BUFFS_AVAIL(tp) \ - (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1) +#define TX_SLOTS_AVAIL(tp) \ + (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx) + +/* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */ +#define TX_FRAGS_READY_FOR(tp,nr_frags) \ + (TX_SLOTS_AVAIL(tp) >= (nr_frags + 1)) /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). The RTL chips use a 64 element hash table based on the Ethernet CRC. */ @@ -5115,7 +5119,7 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb, u32 opts[2]; int frags; - if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) { + if (unlikely(!TX_FRAGS_READY_FOR(tp, skb_shinfo(skb)->nr_frags))) { netif_err(tp, drv, dev, "BUG! Tx Ring full when queue awake!\n"); goto err_stop_0; } @@ -5169,7 +5173,7 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb, mmiowb(); - if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) { + if (!TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) { /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must * not miss a ring update when it notices a stopped queue. */ @@ -5183,7 +5187,7 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb, * can't. */ smp_mb(); - if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS) + if (TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) netif_wake_queue(dev); } @@ -5306,7 +5310,7 @@ static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp) */ smp_mb(); if (netif_queue_stopped(dev) && - (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) { + TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) { netif_wake_queue(dev); } /* diff --git a/trunk/drivers/net/ethernet/sfc/efx.c b/trunk/drivers/net/ethernet/sfc/efx.c index 3cbfbffe3f00..4a0005342e65 100644 --- a/trunk/drivers/net/ethernet/sfc/efx.c +++ b/trunk/drivers/net/ethernet/sfc/efx.c @@ -1349,7 +1349,7 @@ static int efx_probe_interrupts(struct efx_nic *efx) } /* RSS might be usable on VFs even if it is disabled on the PF */ - efx->rss_spread = (efx->n_rx_channels > 1 ? + efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ? efx->n_rx_channels : efx_vf_size(efx)); return 0; diff --git a/trunk/drivers/net/macvlan.c b/trunk/drivers/net/macvlan.c index f975afdc315c..025367a94add 100644 --- a/trunk/drivers/net/macvlan.c +++ b/trunk/drivers/net/macvlan.c @@ -259,7 +259,7 @@ static int macvlan_queue_xmit(struct sk_buff *skb, struct net_device *dev) xmit_world: skb->ip_summed = ip_summed; - skb_set_dev(skb, vlan->lowerdev); + skb->dev = vlan->lowerdev; return dev_queue_xmit(skb); } diff --git a/trunk/drivers/net/macvtap.c b/trunk/drivers/net/macvtap.c index 0427c6561c84..cb8fd5069dbe 100644 --- a/trunk/drivers/net/macvtap.c +++ b/trunk/drivers/net/macvtap.c @@ -1,5 +1,6 @@ #include #include +#include #include #include #include @@ -759,6 +760,8 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q, struct macvlan_dev *vlan; int ret; int vnet_hdr_len = 0; + int vlan_offset = 0; + int copied; if (q->flags & IFF_VNET_HDR) { struct virtio_net_hdr vnet_hdr; @@ -773,18 +776,48 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q, if (memcpy_toiovecend(iv, (void *)&vnet_hdr, 0, sizeof(vnet_hdr))) return -EFAULT; } + copied = vnet_hdr_len; + + if (!vlan_tx_tag_present(skb)) + len = min_t(int, skb->len, len); + else { + int copy; + struct { + __be16 h_vlan_proto; + __be16 h_vlan_TCI; + } veth; + veth.h_vlan_proto = htons(ETH_P_8021Q); + veth.h_vlan_TCI = htons(vlan_tx_tag_get(skb)); + + vlan_offset = offsetof(struct vlan_ethhdr, h_vlan_proto); + len = min_t(int, skb->len + VLAN_HLEN, len); + + copy = min_t(int, vlan_offset, len); + ret = skb_copy_datagram_const_iovec(skb, 0, iv, copied, copy); + len -= copy; + copied += copy; + if (ret || !len) + goto done; + + copy = min_t(int, sizeof(veth), len); + ret = memcpy_toiovecend(iv, (void *)&veth, copied, copy); + len -= copy; + copied += copy; + if (ret || !len) + goto done; + } - len = min_t(int, skb->len, len); - - ret = skb_copy_datagram_const_iovec(skb, 0, iv, vnet_hdr_len, len); + ret = skb_copy_datagram_const_iovec(skb, vlan_offset, iv, copied, len); + copied += len; +done: rcu_read_lock_bh(); vlan = rcu_dereference_bh(q->vlan); if (vlan) - macvlan_count_rx(vlan, len, ret == 0, 0); + macvlan_count_rx(vlan, copied - vnet_hdr_len, ret == 0, 0); rcu_read_unlock_bh(); - return ret ? ret : (len + vnet_hdr_len); + return ret ? ret : copied; } static ssize_t macvtap_do_read(struct macvtap_queue *q, struct kiocb *iocb, diff --git a/trunk/drivers/net/usb/cdc_ether.c b/trunk/drivers/net/usb/cdc_ether.c index 90a30026a931..425e201f597c 100644 --- a/trunk/drivers/net/usb/cdc_ether.c +++ b/trunk/drivers/net/usb/cdc_ether.c @@ -83,6 +83,7 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) struct cdc_state *info = (void *) &dev->data; int status; int rndis; + bool android_rndis_quirk = false; struct usb_driver *driver = driver_of(intf); struct usb_cdc_mdlm_desc *desc = NULL; struct usb_cdc_mdlm_detail_desc *detail = NULL; @@ -195,6 +196,11 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) info->control, info->u->bSlaveInterface0, info->data); + /* fall back to hard-wiring for RNDIS */ + if (rndis) { + android_rndis_quirk = true; + goto next_desc; + } goto bad_desc; } if (info->control != intf) { @@ -271,11 +277,15 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) /* Microsoft ActiveSync based and some regular RNDIS devices lack the * CDC descriptors, so we'll hard-wire the interfaces and not check * for descriptors. + * + * Some Android RNDIS devices have a CDC Union descriptor pointing + * to non-existing interfaces. Ignore that and attempt the same + * hard-wired 0 and 1 interfaces. */ - if (rndis && !info->u) { + if (rndis && (!info->u || android_rndis_quirk)) { info->control = usb_ifnum_to_if(dev->udev, 0); info->data = usb_ifnum_to_if(dev->udev, 1); - if (!info->control || !info->data) { + if (!info->control || !info->data || info->control != intf) { dev_dbg(&intf->dev, "rndis: master #0/%p slave #1/%p\n", info->control, @@ -475,6 +485,7 @@ static const struct driver_info wwan_info = { /*-------------------------------------------------------------------------*/ #define HUAWEI_VENDOR_ID 0x12D1 +#define NOVATEL_VENDOR_ID 0x1410 static const struct usb_device_id products [] = { /* @@ -592,6 +603,21 @@ static const struct usb_device_id products [] = { * because of bugs/quirks in a given product (like Zaurus, above). */ { + /* Novatel USB551L */ + /* This match must come *before* the generic CDC-ETHER match so that + * we get FLAG_WWAN set on the device, since it's descriptors are + * generic CDC-ETHER. + */ + .match_flags = USB_DEVICE_ID_MATCH_VENDOR + | USB_DEVICE_ID_MATCH_PRODUCT + | USB_DEVICE_ID_MATCH_INT_INFO, + .idVendor = NOVATEL_VENDOR_ID, + .idProduct = 0xB001, + .bInterfaceClass = USB_CLASS_COMM, + .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, + .bInterfaceProtocol = USB_CDC_PROTO_NONE, + .driver_info = (unsigned long)&wwan_info, +}, { USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE), .driver_info = (unsigned long) &cdc_info, diff --git a/trunk/drivers/net/usb/usbnet.c b/trunk/drivers/net/usb/usbnet.c index 2d927fb4adf4..b38db48b1ce0 100644 --- a/trunk/drivers/net/usb/usbnet.c +++ b/trunk/drivers/net/usb/usbnet.c @@ -282,17 +282,32 @@ int usbnet_change_mtu (struct net_device *net, int new_mtu) } EXPORT_SYMBOL_GPL(usbnet_change_mtu); +/* The caller must hold list->lock */ +static void __usbnet_queue_skb(struct sk_buff_head *list, + struct sk_buff *newsk, enum skb_state state) +{ + struct skb_data *entry = (struct skb_data *) newsk->cb; + + __skb_queue_tail(list, newsk); + entry->state = state; +} + /*-------------------------------------------------------------------------*/ /* some LK 2.4 HCDs oopsed if we freed or resubmitted urbs from * completion callbacks. 2.5 should have fixed those bugs... */ -static void defer_bh(struct usbnet *dev, struct sk_buff *skb, struct sk_buff_head *list) +static enum skb_state defer_bh(struct usbnet *dev, struct sk_buff *skb, + struct sk_buff_head *list, enum skb_state state) { unsigned long flags; + enum skb_state old_state; + struct skb_data *entry = (struct skb_data *) skb->cb; spin_lock_irqsave(&list->lock, flags); + old_state = entry->state; + entry->state = state; __skb_unlink(skb, list); spin_unlock(&list->lock); spin_lock(&dev->done.lock); @@ -300,6 +315,7 @@ static void defer_bh(struct usbnet *dev, struct sk_buff *skb, struct sk_buff_hea if (dev->done.qlen == 1) tasklet_schedule(&dev->bh); spin_unlock_irqrestore(&dev->done.lock, flags); + return old_state; } /* some work can't be done in tasklets, so we use keventd @@ -340,7 +356,6 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags) entry = (struct skb_data *) skb->cb; entry->urb = urb; entry->dev = dev; - entry->state = rx_start; entry->length = 0; usb_fill_bulk_urb (urb, dev->udev, dev->in, @@ -372,7 +387,7 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags) tasklet_schedule (&dev->bh); break; case 0: - __skb_queue_tail (&dev->rxq, skb); + __usbnet_queue_skb(&dev->rxq, skb, rx_start); } } else { netif_dbg(dev, ifdown, dev->net, "rx: stopped\n"); @@ -423,16 +438,17 @@ static void rx_complete (struct urb *urb) struct skb_data *entry = (struct skb_data *) skb->cb; struct usbnet *dev = entry->dev; int urb_status = urb->status; + enum skb_state state; skb_put (skb, urb->actual_length); - entry->state = rx_done; + state = rx_done; entry->urb = NULL; switch (urb_status) { /* success */ case 0: if (skb->len < dev->net->hard_header_len) { - entry->state = rx_cleanup; + state = rx_cleanup; dev->net->stats.rx_errors++; dev->net->stats.rx_length_errors++; netif_dbg(dev, rx_err, dev->net, @@ -471,7 +487,7 @@ static void rx_complete (struct urb *urb) "rx throttle %d\n", urb_status); } block: - entry->state = rx_cleanup; + state = rx_cleanup; entry->urb = urb; urb = NULL; break; @@ -482,17 +498,18 @@ static void rx_complete (struct urb *urb) // FALLTHROUGH default: - entry->state = rx_cleanup; + state = rx_cleanup; dev->net->stats.rx_errors++; netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status); break; } - defer_bh(dev, skb, &dev->rxq); + state = defer_bh(dev, skb, &dev->rxq, state); if (urb) { if (netif_running (dev->net) && - !test_bit (EVENT_RX_HALT, &dev->flags)) { + !test_bit (EVENT_RX_HALT, &dev->flags) && + state != unlink_start) { rx_submit (dev, urb, GFP_ATOMIC); usb_mark_last_busy(dev->udev); return; @@ -579,16 +596,23 @@ EXPORT_SYMBOL_GPL(usbnet_purge_paused_rxq); static int unlink_urbs (struct usbnet *dev, struct sk_buff_head *q) { unsigned long flags; - struct sk_buff *skb, *skbnext; + struct sk_buff *skb; int count = 0; spin_lock_irqsave (&q->lock, flags); - skb_queue_walk_safe(q, skb, skbnext) { + while (!skb_queue_empty(q)) { struct skb_data *entry; struct urb *urb; int retval; - entry = (struct skb_data *) skb->cb; + skb_queue_walk(q, skb) { + entry = (struct skb_data *) skb->cb; + if (entry->state != unlink_start) + goto found; + } + break; +found: + entry->state = unlink_start; urb = entry->urb; /* @@ -1039,8 +1063,7 @@ static void tx_complete (struct urb *urb) } usb_autopm_put_interface_async(dev->intf); - entry->state = tx_done; - defer_bh(dev, skb, &dev->txq); + (void) defer_bh(dev, skb, &dev->txq, tx_done); } /*-------------------------------------------------------------------------*/ @@ -1096,7 +1119,6 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb, entry = (struct skb_data *) skb->cb; entry->urb = urb; entry->dev = dev; - entry->state = tx_start; entry->length = length; usb_fill_bulk_urb (urb, dev->udev, dev->out, @@ -1155,7 +1177,7 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb, break; case 0: net->trans_start = jiffies; - __skb_queue_tail (&dev->txq, skb); + __usbnet_queue_skb(&dev->txq, skb, tx_start); if (dev->txq.qlen >= TX_QLEN (dev)) netif_stop_queue (net); } diff --git a/trunk/drivers/net/virtio_net.c b/trunk/drivers/net/virtio_net.c index af8acc85f4bb..cbefe671bcc6 100644 --- a/trunk/drivers/net/virtio_net.c +++ b/trunk/drivers/net/virtio_net.c @@ -492,7 +492,9 @@ static void virtnet_napi_enable(struct virtnet_info *vi) * We synchronize against interrupts via NAPI_STATE_SCHED */ if (napi_schedule_prep(&vi->napi)) { virtqueue_disable_cb(vi->rvq); + local_bh_disable(); __napi_schedule(&vi->napi); + local_bh_enable(); } } diff --git a/trunk/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/trunk/drivers/net/wireless/ath/ath9k/ar9003_phy.c index deb6cfb2959a..600aca9fe6b1 100644 --- a/trunk/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/trunk/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -373,7 +373,7 @@ static void ar9003_hw_spur_ofdm_work(struct ath_hw *ah, else spur_subchannel_sd = 0; - spur_freq_sd = (freq_offset << 9) / 11; + spur_freq_sd = ((freq_offset + 10) << 9) / 11; } else { if (REG_READ_FIELD(ah, AR_PHY_GEN_CTRL, @@ -382,7 +382,7 @@ static void ar9003_hw_spur_ofdm_work(struct ath_hw *ah, else spur_subchannel_sd = 1; - spur_freq_sd = (freq_offset << 9) / 11; + spur_freq_sd = ((freq_offset - 10) << 9) / 11; } diff --git a/trunk/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c b/trunk/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c index eb3829b03cd3..e2b34e1563f4 100644 --- a/trunk/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c +++ b/trunk/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c @@ -2637,6 +2637,7 @@ static int brcmf_sdbrcm_dpc_thread(void *data) /* after stopping the bus, exit thread */ brcmf_sdbrcm_bus_stop(bus->sdiodev->dev); bus->dpc_tsk = NULL; + spin_lock_irqsave(&bus->dpc_tl_lock, flags); break; } diff --git a/trunk/drivers/net/wireless/iwlwifi/iwl-agn-rx.c b/trunk/drivers/net/wireless/iwlwifi/iwl-agn-rx.c index f4b84d1596e3..22474608a70b 100644 --- a/trunk/drivers/net/wireless/iwlwifi/iwl-agn-rx.c +++ b/trunk/drivers/net/wireless/iwlwifi/iwl-agn-rx.c @@ -773,8 +773,7 @@ static void iwlagn_pass_packet_to_mac80211(struct iwl_priv *priv, struct sk_buff *skb; __le16 fc = hdr->frame_control; struct iwl_rxon_context *ctx; - struct page *p; - int offset; + unsigned int hdrlen, fraglen; /* We only process data packets if the interface is open */ if (unlikely(!priv->is_open)) { @@ -788,16 +787,24 @@ static void iwlagn_pass_packet_to_mac80211(struct iwl_priv *priv, iwlagn_set_decrypted_flag(priv, hdr, ampdu_status, stats)) return; - skb = dev_alloc_skb(128); + /* Dont use dev_alloc_skb(), we'll have enough headroom once + * ieee80211_hdr pulled. + */ + skb = alloc_skb(128, GFP_ATOMIC); if (!skb) { - IWL_ERR(priv, "dev_alloc_skb failed\n"); + IWL_ERR(priv, "alloc_skb failed\n"); return; } + hdrlen = min_t(unsigned int, len, skb_tailroom(skb)); + memcpy(skb_put(skb, hdrlen), hdr, hdrlen); + fraglen = len - hdrlen; - offset = (void *)hdr - rxb_addr(rxb); - p = rxb_steal_page(rxb); - skb_add_rx_frag(skb, 0, p, offset, len, len); + if (fraglen) { + int offset = (void *)hdr + hdrlen - rxb_addr(rxb); + skb_add_rx_frag(skb, 0, rxb_steal_page(rxb), offset, + fraglen, rxb->truesize); + } iwl_update_stats(priv, false, fc, len); /* diff --git a/trunk/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c b/trunk/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c index 8b1a7988e176..aa7aea168138 100644 --- a/trunk/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c +++ b/trunk/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c @@ -374,8 +374,9 @@ static void iwl_rx_handle_rxbuf(struct iwl_trans *trans, if (WARN_ON(!rxb)) return; + rxcb.truesize = PAGE_SIZE << hw_params(trans).rx_page_order; dma_unmap_page(trans->dev, rxb->page_dma, - PAGE_SIZE << hw_params(trans).rx_page_order, + rxcb.truesize, DMA_FROM_DEVICE); rxcb._page = rxb->page; diff --git a/trunk/drivers/net/wireless/iwlwifi/iwl-trans.h b/trunk/drivers/net/wireless/iwlwifi/iwl-trans.h index 0c81cbaa8088..fdf97886a5e4 100644 --- a/trunk/drivers/net/wireless/iwlwifi/iwl-trans.h +++ b/trunk/drivers/net/wireless/iwlwifi/iwl-trans.h @@ -260,6 +260,7 @@ static inline void iwl_free_resp(struct iwl_host_cmd *cmd) struct iwl_rx_cmd_buffer { struct page *_page; + unsigned int truesize; }; static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r) diff --git a/trunk/drivers/net/wireless/rtlwifi/pci.c b/trunk/drivers/net/wireless/rtlwifi/pci.c index cc15fdb36060..67f9430ee197 100644 --- a/trunk/drivers/net/wireless/rtlwifi/pci.c +++ b/trunk/drivers/net/wireless/rtlwifi/pci.c @@ -1851,14 +1851,6 @@ int __devinit rtl_pci_probe(struct pci_dev *pdev, /*like read eeprom and so on */ rtlpriv->cfg->ops->read_eeprom_info(hw); - if (rtlpriv->cfg->ops->init_sw_vars(hw)) { - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n"); - err = -ENODEV; - goto fail3; - } - - rtlpriv->cfg->ops->init_sw_leds(hw); - /*aspm */ rtl_pci_init_aspm(hw); @@ -1877,6 +1869,14 @@ int __devinit rtl_pci_probe(struct pci_dev *pdev, goto fail3; } + if (rtlpriv->cfg->ops->init_sw_vars(hw)) { + RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n"); + err = -ENODEV; + goto fail3; + } + + rtlpriv->cfg->ops->init_sw_leds(hw); + err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group); if (err) { RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, diff --git a/trunk/drivers/net/wireless/rtlwifi/usb.c b/trunk/drivers/net/wireless/rtlwifi/usb.c index d04dbda13f5a..a6049d7d51b3 100644 --- a/trunk/drivers/net/wireless/rtlwifi/usb.c +++ b/trunk/drivers/net/wireless/rtlwifi/usb.c @@ -971,11 +971,6 @@ int __devinit rtl_usb_probe(struct usb_interface *intf, rtlpriv->cfg->ops->read_chip_version(hw); /*like read eeprom and so on */ rtlpriv->cfg->ops->read_eeprom_info(hw); - if (rtlpriv->cfg->ops->init_sw_vars(hw)) { - RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n"); - goto error_out; - } - rtlpriv->cfg->ops->init_sw_leds(hw); err = _rtl_usb_init(hw); if (err) goto error_out; @@ -987,6 +982,11 @@ int __devinit rtl_usb_probe(struct usb_interface *intf, "Can't allocate sw for mac80211\n"); goto error_out; } + if (rtlpriv->cfg->ops->init_sw_vars(hw)) { + RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n"); + goto error_out; + } + rtlpriv->cfg->ops->init_sw_leds(hw); return 0; error_out: diff --git a/trunk/drivers/parisc/sba_iommu.c b/trunk/drivers/parisc/sba_iommu.c index 8644d5372e7f..42cfcd9eb9aa 100644 --- a/trunk/drivers/parisc/sba_iommu.c +++ b/trunk/drivers/parisc/sba_iommu.c @@ -44,6 +44,7 @@ #include #include /* for proc_mckinley_root */ #include /* for proc_runway_root */ +#include /* for PAGE0 */ #include /* for PDC_MODEL_* */ #include /* for is_pdc_pat() */ #include diff --git a/trunk/drivers/pci/pci-acpi.c b/trunk/drivers/pci/pci-acpi.c index 1929c0c63b75..61e2fefeedab 100644 --- a/trunk/drivers/pci/pci-acpi.c +++ b/trunk/drivers/pci/pci-acpi.c @@ -223,7 +223,7 @@ static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state) [PCI_D0] = ACPI_STATE_D0, [PCI_D1] = ACPI_STATE_D1, [PCI_D2] = ACPI_STATE_D2, - [PCI_D3hot] = ACPI_STATE_D3_HOT, + [PCI_D3hot] = ACPI_STATE_D3, [PCI_D3cold] = ACPI_STATE_D3 }; int error = -EINVAL; diff --git a/trunk/drivers/ptp/ptp_pch.c b/trunk/drivers/ptp/ptp_pch.c index 375eb04c16ea..6fff68020488 100644 --- a/trunk/drivers/ptp/ptp_pch.c +++ b/trunk/drivers/ptp/ptp_pch.c @@ -30,6 +30,7 @@ #include #include #include +#include #define STATION_ADDR_LEN 20 #define PCI_DEVICE_ID_PCH_1588 0x8819 diff --git a/trunk/drivers/remoteproc/remoteproc_core.c b/trunk/drivers/remoteproc/remoteproc_core.c index ee15c68fb519..e756a0df3664 100644 --- a/trunk/drivers/remoteproc/remoteproc_core.c +++ b/trunk/drivers/remoteproc/remoteproc_core.c @@ -354,7 +354,7 @@ static void __rproc_free_vrings(struct rproc_vdev *rvdev, int i) { struct rproc *rproc = rvdev->rproc; - for (i--; i > 0; i--) { + for (i--; i >= 0; i--) { struct rproc_vring *rvring = &rvdev->vring[i]; int size = PAGE_ALIGN(vring_size(rvring->len, rvring->align)); diff --git a/trunk/drivers/scsi/hosts.c b/trunk/drivers/scsi/hosts.c index 351dc0b86fab..a3a056a9db67 100644 --- a/trunk/drivers/scsi/hosts.c +++ b/trunk/drivers/scsi/hosts.c @@ -218,6 +218,9 @@ int scsi_add_host_with_dma(struct Scsi_Host *shost, struct device *dev, if (!shost->shost_gendev.parent) shost->shost_gendev.parent = dev ? dev : &platform_bus; + if (!dma_dev) + dma_dev = shost->shost_gendev.parent; + shost->dma_dev = dma_dev; error = device_add(&shost->shost_gendev); diff --git a/trunk/drivers/scsi/qla2xxx/qla_bsg.c b/trunk/drivers/scsi/qla2xxx/qla_bsg.c index f74cc0602f3b..bc3cc6d91117 100644 --- a/trunk/drivers/scsi/qla2xxx/qla_bsg.c +++ b/trunk/drivers/scsi/qla2xxx/qla_bsg.c @@ -1367,6 +1367,9 @@ qla2x00_read_optrom(struct fc_bsg_job *bsg_job) struct qla_hw_data *ha = vha->hw; int rval = 0; + if (ha->flags.isp82xx_reset_hdlr_active) + return -EBUSY; + rval = qla2x00_optrom_setup(bsg_job, vha, 0); if (rval) return rval; diff --git a/trunk/drivers/scsi/qla2xxx/qla_dbg.c b/trunk/drivers/scsi/qla2xxx/qla_dbg.c index 897731b93df2..62324a1d5573 100644 --- a/trunk/drivers/scsi/qla2xxx/qla_dbg.c +++ b/trunk/drivers/scsi/qla2xxx/qla_dbg.c @@ -15,7 +15,7 @@ * | Mailbox commands | 0x113e | 0x112c-0x112e | * | | | 0x113a | * | Device Discovery | 0x2086 | 0x2020-0x2022 | - * | Queue Command and IO tracing | 0x302f | 0x3006,0x3008 | + * | Queue Command and IO tracing | 0x3030 | 0x3006,0x3008 | * | | | 0x302d-0x302e | * | DPC Thread | 0x401c | | * | Async Events | 0x505d | 0x502b-0x502f | diff --git a/trunk/drivers/scsi/qla2xxx/qla_isr.c b/trunk/drivers/scsi/qla2xxx/qla_isr.c index f79844ce7122..ce42288049b5 100644 --- a/trunk/drivers/scsi/qla2xxx/qla_isr.c +++ b/trunk/drivers/scsi/qla2xxx/qla_isr.c @@ -1715,13 +1715,24 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) res = DID_ERROR << 16; break; } - } else { + } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && + lscsi_status != SAM_STAT_BUSY) { + /* + * scsi status of task set and busy are considered to be + * task not completed. + */ + ql_dbg(ql_dbg_io, fcport->vha, 0x301f, "Dropped frame(s) detected (0x%x " - "of 0x%x bytes).\n", resid, scsi_bufflen(cp)); + "of 0x%x bytes).\n", resid, + scsi_bufflen(cp)); res = DID_ERROR << 16 | lscsi_status; goto check_scsi_status; + } else { + ql_dbg(ql_dbg_io, fcport->vha, 0x3030, + "scsi_status: 0x%x, lscsi_status: 0x%x\n", + scsi_status, lscsi_status); } res = DID_OK << 16 | lscsi_status; diff --git a/trunk/drivers/scsi/qla2xxx/qla_nx.c b/trunk/drivers/scsi/qla2xxx/qla_nx.c index f0528539bbbc..de722a933438 100644 --- a/trunk/drivers/scsi/qla2xxx/qla_nx.c +++ b/trunk/drivers/scsi/qla2xxx/qla_nx.c @@ -3125,6 +3125,7 @@ qla82xx_need_reset_handler(scsi_qla_host_t *vha) ql_log(ql_log_info, vha, 0x00b7, "HW State: COLD/RE-INIT.\n"); qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA82XX_DEV_COLD); + qla82xx_set_rst_ready(ha); if (ql2xmdenable) { if (qla82xx_md_collect(vha)) ql_log(ql_log_warn, vha, 0xb02c, diff --git a/trunk/drivers/scsi/qla2xxx/qla_os.c b/trunk/drivers/scsi/qla2xxx/qla_os.c index a2f999273a5f..7db803377c64 100644 --- a/trunk/drivers/scsi/qla2xxx/qla_os.c +++ b/trunk/drivers/scsi/qla2xxx/qla_os.c @@ -3577,9 +3577,25 @@ void qla2x00_relogin(struct scsi_qla_host *vha) continue; /* Attempt a retry. */ status = 1; - } else + } else { status = qla2x00_fabric_login(vha, fcport, &next_loopid); + if (status == QLA_SUCCESS) { + int status2; + uint8_t opts; + + opts = 0; + if (fcport->flags & + FCF_FCP2_DEVICE) + opts |= BIT_1; + status2 = + qla2x00_get_port_database( + vha, fcport, + opts); + if (status2 != QLA_SUCCESS) + status = 1; + } + } } else status = qla2x00_local_device_login(vha, fcport); diff --git a/trunk/drivers/scsi/qla2xxx/qla_sup.c b/trunk/drivers/scsi/qla2xxx/qla_sup.c index 3c13c0a6be63..a683e766d1ae 100644 --- a/trunk/drivers/scsi/qla2xxx/qla_sup.c +++ b/trunk/drivers/scsi/qla2xxx/qla_sup.c @@ -1017,6 +1017,9 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *vha) !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha)) return; + if (ha->flags.isp82xx_reset_hdlr_active) + return; + ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr, ha->flt_region_npiv_conf << 2, sizeof(struct qla_npiv_header)); if (hdr.version == __constant_cpu_to_le16(0xffff)) diff --git a/trunk/drivers/scsi/qla2xxx/qla_version.h b/trunk/drivers/scsi/qla2xxx/qla_version.h index 29d780c38040..f5fdb16bec9b 100644 --- a/trunk/drivers/scsi/qla2xxx/qla_version.h +++ b/trunk/drivers/scsi/qla2xxx/qla_version.h @@ -7,9 +7,9 @@ /* * Driver version */ -#define QLA2XXX_VERSION "8.03.07.13-k" +#define QLA2XXX_VERSION "8.04.00.03-k" #define QLA_DRIVER_MAJOR_VER 8 -#define QLA_DRIVER_MINOR_VER 3 -#define QLA_DRIVER_PATCH_VER 7 +#define QLA_DRIVER_MINOR_VER 4 +#define QLA_DRIVER_PATCH_VER 0 #define QLA_DRIVER_BETA_VER 3 diff --git a/trunk/drivers/scsi/virtio_scsi.c b/trunk/drivers/scsi/virtio_scsi.c index efccd72c4a3e..1b3843117268 100644 --- a/trunk/drivers/scsi/virtio_scsi.c +++ b/trunk/drivers/scsi/virtio_scsi.c @@ -175,7 +175,8 @@ static void virtscsi_complete_free(void *buf) if (cmd->comp) complete_all(cmd->comp); - mempool_free(cmd, virtscsi_cmd_pool); + else + mempool_free(cmd, virtscsi_cmd_pool); } static void virtscsi_ctrl_done(struct virtqueue *vq) @@ -311,21 +312,22 @@ static int virtscsi_queuecommand(struct Scsi_Host *sh, struct scsi_cmnd *sc) static int virtscsi_tmf(struct virtio_scsi *vscsi, struct virtio_scsi_cmd *cmd) { DECLARE_COMPLETION_ONSTACK(comp); - int ret; + int ret = FAILED; cmd->comp = ∁ - ret = virtscsi_kick_cmd(vscsi, vscsi->ctrl_vq, cmd, - sizeof cmd->req.tmf, sizeof cmd->resp.tmf, - GFP_NOIO); - if (ret < 0) - return FAILED; + if (virtscsi_kick_cmd(vscsi, vscsi->ctrl_vq, cmd, + sizeof cmd->req.tmf, sizeof cmd->resp.tmf, + GFP_NOIO) < 0) + goto out; wait_for_completion(&comp); - if (cmd->resp.tmf.response != VIRTIO_SCSI_S_OK && - cmd->resp.tmf.response != VIRTIO_SCSI_S_FUNCTION_SUCCEEDED) - return FAILED; + if (cmd->resp.tmf.response == VIRTIO_SCSI_S_OK || + cmd->resp.tmf.response == VIRTIO_SCSI_S_FUNCTION_SUCCEEDED) + ret = SUCCESS; - return SUCCESS; +out: + mempool_free(cmd, virtscsi_cmd_pool); + return ret; } static int virtscsi_device_reset(struct scsi_cmnd *sc) diff --git a/trunk/drivers/sh/clk/cpg.c b/trunk/drivers/sh/clk/cpg.c index f0d015dd0fef..91b6d52f74eb 100644 --- a/trunk/drivers/sh/clk/cpg.c +++ b/trunk/drivers/sh/clk/cpg.c @@ -2,7 +2,6 @@ * Helper routines for SuperH Clock Pulse Generator blocks (CPG). * * Copyright (C) 2010 Magnus Damm - * Copyright (C) 2010 - 2012 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -14,44 +13,26 @@ #include #include -static unsigned int sh_clk_read(struct clk *clk) +static int sh_clk_mstp32_enable(struct clk *clk) { - if (clk->flags & CLK_ENABLE_REG_8BIT) - return ioread8(clk->mapped_reg); - else if (clk->flags & CLK_ENABLE_REG_16BIT) - return ioread16(clk->mapped_reg); - - return ioread32(clk->mapped_reg); -} - -static void sh_clk_write(int value, struct clk *clk) -{ - if (clk->flags & CLK_ENABLE_REG_8BIT) - iowrite8(value, clk->mapped_reg); - else if (clk->flags & CLK_ENABLE_REG_16BIT) - iowrite16(value, clk->mapped_reg); - else - iowrite32(value, clk->mapped_reg); -} - -static int sh_clk_mstp_enable(struct clk *clk) -{ - sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk); + iowrite32(ioread32(clk->mapped_reg) & ~(1 << clk->enable_bit), + clk->mapped_reg); return 0; } -static void sh_clk_mstp_disable(struct clk *clk) +static void sh_clk_mstp32_disable(struct clk *clk) { - sh_clk_write(sh_clk_read(clk) | (1 << clk->enable_bit), clk); + iowrite32(ioread32(clk->mapped_reg) | (1 << clk->enable_bit), + clk->mapped_reg); } -static struct sh_clk_ops sh_clk_mstp_clk_ops = { - .enable = sh_clk_mstp_enable, - .disable = sh_clk_mstp_disable, +static struct sh_clk_ops sh_clk_mstp32_clk_ops = { + .enable = sh_clk_mstp32_enable, + .disable = sh_clk_mstp32_disable, .recalc = followparent_recalc, }; -int __init sh_clk_mstp_register(struct clk *clks, int nr) +int __init sh_clk_mstp32_register(struct clk *clks, int nr) { struct clk *clkp; int ret = 0; @@ -59,7 +40,7 @@ int __init sh_clk_mstp_register(struct clk *clks, int nr) for (k = 0; !ret && (k < nr); k++) { clkp = clks + k; - clkp->ops = &sh_clk_mstp_clk_ops; + clkp->ops = &sh_clk_mstp32_clk_ops; ret |= clk_register(clkp); } @@ -91,7 +72,7 @@ static unsigned long sh_clk_div6_recalc(struct clk *clk) clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, table, NULL); - idx = sh_clk_read(clk) & 0x003f; + idx = ioread32(clk->mapped_reg) & 0x003f; return clk->freq_table[idx].frequency; } @@ -117,10 +98,10 @@ static int sh_clk_div6_set_parent(struct clk *clk, struct clk *parent) if (ret < 0) return ret; - value = sh_clk_read(clk) & + value = ioread32(clk->mapped_reg) & ~(((1 << clk->src_width) - 1) << clk->src_shift); - sh_clk_write(value | (i << clk->src_shift), clk); + iowrite32(value | (i << clk->src_shift), clk->mapped_reg); /* Rebuild the frequency table */ clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, @@ -138,10 +119,10 @@ static int sh_clk_div6_set_rate(struct clk *clk, unsigned long rate) if (idx < 0) return idx; - value = sh_clk_read(clk); + value = ioread32(clk->mapped_reg); value &= ~0x3f; value |= idx; - sh_clk_write(value, clk); + iowrite32(value, clk->mapped_reg); return 0; } @@ -152,9 +133,9 @@ static int sh_clk_div6_enable(struct clk *clk) ret = sh_clk_div6_set_rate(clk, clk->rate); if (ret == 0) { - value = sh_clk_read(clk); + value = ioread32(clk->mapped_reg); value &= ~0x100; /* clear stop bit to enable clock */ - sh_clk_write(value, clk); + iowrite32(value, clk->mapped_reg); } return ret; } @@ -163,10 +144,10 @@ static void sh_clk_div6_disable(struct clk *clk) { unsigned long value; - value = sh_clk_read(clk); + value = ioread32(clk->mapped_reg); value |= 0x100; /* stop clock */ value |= 0x3f; /* VDIV bits must be non-zero, overwrite divider */ - sh_clk_write(value, clk); + iowrite32(value, clk->mapped_reg); } static struct sh_clk_ops sh_clk_div6_clk_ops = { @@ -201,7 +182,7 @@ static int __init sh_clk_init_parent(struct clk *clk) return -EINVAL; } - val = (sh_clk_read(clk) >> clk->src_shift); + val = (ioread32(clk->mapped_reg) >> clk->src_shift); val &= (1 << clk->src_width) - 1; if (val >= clk->parent_num) { @@ -271,7 +252,7 @@ static unsigned long sh_clk_div4_recalc(struct clk *clk) clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, table, &clk->arch_flags); - idx = (sh_clk_read(clk) >> clk->enable_bit) & 0x000f; + idx = (ioread32(clk->mapped_reg) >> clk->enable_bit) & 0x000f; return clk->freq_table[idx].frequency; } @@ -289,15 +270,15 @@ static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent) */ if (parent->flags & CLK_ENABLE_ON_INIT) - value = sh_clk_read(clk) & ~(1 << 7); + value = ioread32(clk->mapped_reg) & ~(1 << 7); else - value = sh_clk_read(clk) | (1 << 7); + value = ioread32(clk->mapped_reg) | (1 << 7); ret = clk_reparent(clk, parent); if (ret < 0) return ret; - sh_clk_write(value, clk); + iowrite32(value, clk->mapped_reg); /* Rebiuld the frequency table */ clk_rate_table_build(clk, clk->freq_table, table->nr_divisors, @@ -314,10 +295,10 @@ static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate) if (idx < 0) return idx; - value = sh_clk_read(clk); + value = ioread32(clk->mapped_reg); value &= ~(0xf << clk->enable_bit); value |= (idx << clk->enable_bit); - sh_clk_write(value, clk); + iowrite32(value, clk->mapped_reg); if (d4t->kick) d4t->kick(clk); @@ -327,13 +308,13 @@ static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate) static int sh_clk_div4_enable(struct clk *clk) { - sh_clk_write(sh_clk_read(clk) & ~(1 << 8), clk); + iowrite32(ioread32(clk->mapped_reg) & ~(1 << 8), clk->mapped_reg); return 0; } static void sh_clk_div4_disable(struct clk *clk) { - sh_clk_write(sh_clk_read(clk) | (1 << 8), clk); + iowrite32(ioread32(clk->mapped_reg) | (1 << 8), clk->mapped_reg); } static struct sh_clk_ops sh_clk_div4_clk_ops = { diff --git a/trunk/drivers/target/target_core_file.c b/trunk/drivers/target/target_core_file.c index 7ed58e2df791..f286955331a2 100644 --- a/trunk/drivers/target/target_core_file.c +++ b/trunk/drivers/target/target_core_file.c @@ -169,6 +169,7 @@ static struct se_device *fd_create_virtdevice( inode = file->f_mapping->host; if (S_ISBLK(inode->i_mode)) { struct request_queue *q; + unsigned long long dev_size; /* * Setup the local scope queue_limits from struct request_queue->limits * to pass into transport_add_device_to_core_hba() as struct se_dev_limits. @@ -183,13 +184,12 @@ static struct se_device *fd_create_virtdevice( * one (1) logical sector from underlying struct block_device */ fd_dev->fd_block_size = bdev_logical_block_size(inode->i_bdev); - fd_dev->fd_dev_size = (i_size_read(file->f_mapping->host) - + dev_size = (i_size_read(file->f_mapping->host) - fd_dev->fd_block_size); pr_debug("FILEIO: Using size: %llu bytes from struct" " block_device blocks: %llu logical_block_size: %d\n", - fd_dev->fd_dev_size, - div_u64(fd_dev->fd_dev_size, fd_dev->fd_block_size), + dev_size, div_u64(dev_size, fd_dev->fd_block_size), fd_dev->fd_block_size); } else { if (!(fd_dev->fbd_flags & FBDF_HAS_SIZE)) { @@ -605,10 +605,20 @@ static u32 fd_get_device_type(struct se_device *dev) static sector_t fd_get_blocks(struct se_device *dev) { struct fd_dev *fd_dev = dev->dev_ptr; - unsigned long long blocks_long = div_u64(fd_dev->fd_dev_size, - dev->se_sub_dev->se_dev_attrib.block_size); + struct file *f = fd_dev->fd_file; + struct inode *i = f->f_mapping->host; + unsigned long long dev_size; + /* + * When using a file that references an underlying struct block_device, + * ensure dev_size is always based on the current inode size in order + * to handle underlying block_device resize operations. + */ + if (S_ISBLK(i->i_mode)) + dev_size = (i_size_read(i) - fd_dev->fd_block_size); + else + dev_size = fd_dev->fd_dev_size; - return blocks_long; + return div_u64(dev_size, dev->se_sub_dev->se_dev_attrib.block_size); } static struct se_subsystem_api fileio_template = { diff --git a/trunk/drivers/target/target_core_pr.c b/trunk/drivers/target/target_core_pr.c index 86f0c3b5d500..c3148b10b4b3 100644 --- a/trunk/drivers/target/target_core_pr.c +++ b/trunk/drivers/target/target_core_pr.c @@ -220,6 +220,9 @@ int target_scsi2_reservation_release(struct se_task *task) if (dev->dev_reserved_node_acl != sess->se_node_acl) goto out_unlock; + if (dev->dev_res_bin_isid != sess->sess_bin_isid) + goto out_unlock; + dev->dev_reserved_node_acl = NULL; dev->dev_flags &= ~DF_SPC2_RESERVATIONS; if (dev->dev_flags & DF_SPC2_RESERVATIONS_WITH_ISID) { diff --git a/trunk/drivers/target/target_core_tpg.c b/trunk/drivers/target/target_core_tpg.c index 70c3ffb981e7..e320ec24aa1b 100644 --- a/trunk/drivers/target/target_core_tpg.c +++ b/trunk/drivers/target/target_core_tpg.c @@ -60,7 +60,6 @@ static void core_clear_initiator_node_from_tpg( int i; struct se_dev_entry *deve; struct se_lun *lun; - struct se_lun_acl *acl, *acl_tmp; spin_lock_irq(&nacl->device_list_lock); for (i = 0; i < TRANSPORT_MAX_LUNS_PER_TPG; i++) { @@ -81,28 +80,7 @@ static void core_clear_initiator_node_from_tpg( core_update_device_list_for_node(lun, NULL, deve->mapped_lun, TRANSPORT_LUNFLAGS_NO_ACCESS, nacl, tpg, 0); - spin_lock(&lun->lun_acl_lock); - list_for_each_entry_safe(acl, acl_tmp, - &lun->lun_acl_list, lacl_list) { - if (!strcmp(acl->initiatorname, nacl->initiatorname) && - (acl->mapped_lun == deve->mapped_lun)) - break; - } - - if (!acl) { - pr_err("Unable to locate struct se_lun_acl for %s," - " mapped_lun: %u\n", nacl->initiatorname, - deve->mapped_lun); - spin_unlock(&lun->lun_acl_lock); - spin_lock_irq(&nacl->device_list_lock); - continue; - } - - list_del(&acl->lacl_list); - spin_unlock(&lun->lun_acl_lock); - spin_lock_irq(&nacl->device_list_lock); - kfree(acl); } spin_unlock_irq(&nacl->device_list_lock); } diff --git a/trunk/drivers/tty/serial/sh-sci.c b/trunk/drivers/tty/serial/sh-sci.c index be31d85a50e3..3158e17b665c 100644 --- a/trunk/drivers/tty/serial/sh-sci.c +++ b/trunk/drivers/tty/serial/sh-sci.c @@ -1564,32 +1564,10 @@ static void sci_enable_ms(struct uart_port *port) static void sci_break_ctl(struct uart_port *port, int break_state) { - struct sci_port *s = to_sci_port(port); - struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR; - unsigned short scscr, scsptr; - - /* check wheter the port has SCSPTR */ - if (!reg->size) { - /* - * Not supported by hardware. Most parts couple break and rx - * interrupts together, with break detection always enabled. - */ - return; - } - - scsptr = serial_port_in(port, SCSPTR); - scscr = serial_port_in(port, SCSCR); - - if (break_state == -1) { - scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT; - scscr &= ~SCSCR_TE; - } else { - scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO; - scscr |= SCSCR_TE; - } - - serial_port_out(port, SCSPTR, scsptr); - serial_port_out(port, SCSCR, scscr); + /* + * Not supported by hardware. Most parts couple break and rx + * interrupts together, with break detection always enabled. + */ } #ifdef CONFIG_SERIAL_SH_SCI_DMA diff --git a/trunk/drivers/tty/vt/keyboard.c b/trunk/drivers/tty/vt/keyboard.c index 29ca20dbd335..3b0c4e32ed7b 100644 --- a/trunk/drivers/tty/vt/keyboard.c +++ b/trunk/drivers/tty/vt/keyboard.c @@ -2044,7 +2044,7 @@ int vt_do_kdskled(int console, int cmd, unsigned long arg, int perm) kbd->default_ledflagstate = ((arg >> 4) & 7); set_leds(); spin_unlock_irqrestore(&kbd_event_lock, flags); - break; + return 0; /* the ioctls below only set the lights, not the functions */ /* for those, see KDGKBLED and KDSKBLED above */ diff --git a/trunk/drivers/vhost/net.c b/trunk/drivers/vhost/net.c index 1f21d2a1e528..5c170100de9c 100644 --- a/trunk/drivers/vhost/net.c +++ b/trunk/drivers/vhost/net.c @@ -24,6 +24,7 @@ #include #include #include +#include #include @@ -283,8 +284,12 @@ static int peek_head_len(struct sock *sk) spin_lock_irqsave(&sk->sk_receive_queue.lock, flags); head = skb_peek(&sk->sk_receive_queue); - if (likely(head)) + if (likely(head)) { len = head->len; + if (vlan_tx_tag_present(head)) + len += VLAN_HLEN; + } + spin_unlock_irqrestore(&sk->sk_receive_queue.lock, flags); return len; } diff --git a/trunk/drivers/video/console/sticore.c b/trunk/drivers/video/console/sticore.c index 6468a297e341..39571f9e0162 100644 --- a/trunk/drivers/video/console/sticore.c +++ b/trunk/drivers/video/console/sticore.c @@ -22,7 +22,9 @@ #include #include +#include #include +#include #include #include diff --git a/trunk/drivers/video/uvesafb.c b/trunk/drivers/video/uvesafb.c index 26e83d7fdd6f..b0e2a4261afe 100644 --- a/trunk/drivers/video/uvesafb.c +++ b/trunk/drivers/video/uvesafb.c @@ -73,7 +73,7 @@ static void uvesafb_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *ns struct uvesafb_task *utask; struct uvesafb_ktask *task; - if (!cap_raised(current_cap(), CAP_SYS_ADMIN)) + if (!capable(CAP_SYS_ADMIN)) return; if (msg->seq >= UVESAFB_TASKS_MAX) diff --git a/trunk/drivers/virtio/virtio_balloon.c b/trunk/drivers/virtio/virtio_balloon.c index c2d05a8279fd..8807fe501d20 100644 --- a/trunk/drivers/virtio/virtio_balloon.c +++ b/trunk/drivers/virtio/virtio_balloon.c @@ -390,6 +390,7 @@ static void __devexit virtballoon_remove(struct virtio_device *vdev) /* There might be pages left in the balloon: free them. */ while (vb->num_pages) leak_balloon(vb, vb->num_pages); + update_balloon_size(vb); /* Now we reset the device so we can clean up the queues. */ vdev->config->reset(vdev); diff --git a/trunk/drivers/watchdog/Kconfig b/trunk/drivers/watchdog/Kconfig index 67957393393f..37096246c937 100644 --- a/trunk/drivers/watchdog/Kconfig +++ b/trunk/drivers/watchdog/Kconfig @@ -1138,7 +1138,6 @@ config ZVM_WATCHDOG config SH_WDT tristate "SuperH Watchdog" depends on SUPERH && (CPU_SH3 || CPU_SH4) - select WATCHDOG_CORE help This driver adds watchdog support for the integrated watchdog in the SuperH processors. If you have one of these processors and wish diff --git a/trunk/drivers/watchdog/shwdt.c b/trunk/drivers/watchdog/shwdt.c index e5b59bebcdb1..93958a7763e6 100644 --- a/trunk/drivers/watchdog/shwdt.c +++ b/trunk/drivers/watchdog/shwdt.c @@ -3,7 +3,7 @@ * * Watchdog driver for integrated watchdog in the SuperH processors. * - * Copyright (C) 2001 - 2012 Paul Mundt + * Copyright (C) 2001 - 2010 Paul Mundt * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -25,15 +25,16 @@ #include #include #include -#include #include #include -#include +#include +#include +#include #include #include #include #include -#include +#include #include #define DRV_NAME "sh-wdt" @@ -68,6 +69,10 @@ static int clock_division_ratio = WTCSR_CKS_4096; #define next_ping_period(cks) (jiffies + msecs_to_jiffies(cks - 4)) +static const struct watchdog_info sh_wdt_info; +static struct platform_device *sh_wdt_dev; +static DEFINE_SPINLOCK(shwdt_lock); + #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */ static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */ static bool nowayout = WATCHDOG_NOWAYOUT; @@ -76,22 +81,19 @@ static unsigned long next_heartbeat; struct sh_wdt { void __iomem *base; struct device *dev; - struct clk *clk; - spinlock_t lock; struct timer_list timer; + + unsigned long enabled; + char expect_close; }; -static int sh_wdt_start(struct watchdog_device *wdt_dev) +static void sh_wdt_start(struct sh_wdt *wdt) { - struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev); unsigned long flags; u8 csr; - pm_runtime_get_sync(wdt->dev); - clk_enable(wdt->clk); - - spin_lock_irqsave(&wdt->lock, flags); + spin_lock_irqsave(&shwdt_lock, flags); next_heartbeat = jiffies + (heartbeat * HZ); mod_timer(&wdt->timer, next_ping_period(clock_division_ratio)); @@ -120,18 +122,15 @@ static int sh_wdt_start(struct watchdog_device *wdt_dev) csr &= ~RSTCSR_RSTS; sh_wdt_write_rstcsr(csr); #endif - spin_unlock_irqrestore(&wdt->lock, flags); - - return 0; + spin_unlock_irqrestore(&shwdt_lock, flags); } -static int sh_wdt_stop(struct watchdog_device *wdt_dev) +static void sh_wdt_stop(struct sh_wdt *wdt) { - struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev); unsigned long flags; u8 csr; - spin_lock_irqsave(&wdt->lock, flags); + spin_lock_irqsave(&shwdt_lock, flags); del_timer(&wdt->timer); @@ -139,39 +138,28 @@ static int sh_wdt_stop(struct watchdog_device *wdt_dev) csr &= ~WTCSR_TME; sh_wdt_write_csr(csr); - spin_unlock_irqrestore(&wdt->lock, flags); - - clk_disable(wdt->clk); - pm_runtime_put_sync(wdt->dev); - - return 0; + spin_unlock_irqrestore(&shwdt_lock, flags); } -static int sh_wdt_keepalive(struct watchdog_device *wdt_dev) +static inline void sh_wdt_keepalive(struct sh_wdt *wdt) { - struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev); unsigned long flags; - spin_lock_irqsave(&wdt->lock, flags); + spin_lock_irqsave(&shwdt_lock, flags); next_heartbeat = jiffies + (heartbeat * HZ); - spin_unlock_irqrestore(&wdt->lock, flags); - - return 0; + spin_unlock_irqrestore(&shwdt_lock, flags); } -static int sh_wdt_set_heartbeat(struct watchdog_device *wdt_dev, unsigned t) +static int sh_wdt_set_heartbeat(int t) { - struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev); unsigned long flags; if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */ return -EINVAL; - spin_lock_irqsave(&wdt->lock, flags); + spin_lock_irqsave(&shwdt_lock, flags); heartbeat = t; - wdt_dev->timeout = t; - spin_unlock_irqrestore(&wdt->lock, flags); - + spin_unlock_irqrestore(&shwdt_lock, flags); return 0; } @@ -180,7 +168,7 @@ static void sh_wdt_ping(unsigned long data) struct sh_wdt *wdt = (struct sh_wdt *)data; unsigned long flags; - spin_lock_irqsave(&wdt->lock, flags); + spin_lock_irqsave(&shwdt_lock, flags); if (time_before(jiffies, next_heartbeat)) { u8 csr; @@ -194,9 +182,137 @@ static void sh_wdt_ping(unsigned long data) } else dev_warn(wdt->dev, "Heartbeat lost! Will not ping " "the watchdog\n"); - spin_unlock_irqrestore(&wdt->lock, flags); + spin_unlock_irqrestore(&shwdt_lock, flags); +} + +static int sh_wdt_open(struct inode *inode, struct file *file) +{ + struct sh_wdt *wdt = platform_get_drvdata(sh_wdt_dev); + + if (test_and_set_bit(0, &wdt->enabled)) + return -EBUSY; + if (nowayout) + __module_get(THIS_MODULE); + + file->private_data = wdt; + + sh_wdt_start(wdt); + + return nonseekable_open(inode, file); +} + +static int sh_wdt_close(struct inode *inode, struct file *file) +{ + struct sh_wdt *wdt = file->private_data; + + if (wdt->expect_close == 42) { + sh_wdt_stop(wdt); + } else { + dev_crit(wdt->dev, "Unexpected close, not " + "stopping watchdog!\n"); + sh_wdt_keepalive(wdt); + } + + clear_bit(0, &wdt->enabled); + wdt->expect_close = 0; + + return 0; +} + +static ssize_t sh_wdt_write(struct file *file, const char *buf, + size_t count, loff_t *ppos) +{ + struct sh_wdt *wdt = file->private_data; + + if (count) { + if (!nowayout) { + size_t i; + + wdt->expect_close = 0; + + for (i = 0; i != count; i++) { + char c; + if (get_user(c, buf + i)) + return -EFAULT; + if (c == 'V') + wdt->expect_close = 42; + } + } + sh_wdt_keepalive(wdt); + } + + return count; } +static long sh_wdt_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + struct sh_wdt *wdt = file->private_data; + int new_heartbeat; + int options, retval = -EINVAL; + + switch (cmd) { + case WDIOC_GETSUPPORT: + return copy_to_user((struct watchdog_info *)arg, + &sh_wdt_info, sizeof(sh_wdt_info)) ? -EFAULT : 0; + case WDIOC_GETSTATUS: + case WDIOC_GETBOOTSTATUS: + return put_user(0, (int *)arg); + case WDIOC_SETOPTIONS: + if (get_user(options, (int *)arg)) + return -EFAULT; + + if (options & WDIOS_DISABLECARD) { + sh_wdt_stop(wdt); + retval = 0; + } + + if (options & WDIOS_ENABLECARD) { + sh_wdt_start(wdt); + retval = 0; + } + + return retval; + case WDIOC_KEEPALIVE: + sh_wdt_keepalive(wdt); + return 0; + case WDIOC_SETTIMEOUT: + if (get_user(new_heartbeat, (int *)arg)) + return -EFAULT; + + if (sh_wdt_set_heartbeat(new_heartbeat)) + return -EINVAL; + + sh_wdt_keepalive(wdt); + /* Fall */ + case WDIOC_GETTIMEOUT: + return put_user(heartbeat, (int *)arg); + default: + return -ENOTTY; + } + return 0; +} + +static int sh_wdt_notify_sys(struct notifier_block *this, + unsigned long code, void *unused) +{ + struct sh_wdt *wdt = platform_get_drvdata(sh_wdt_dev); + + if (code == SYS_DOWN || code == SYS_HALT) + sh_wdt_stop(wdt); + + return NOTIFY_DONE; +} + +static const struct file_operations sh_wdt_fops = { + .owner = THIS_MODULE, + .llseek = no_llseek, + .write = sh_wdt_write, + .unlocked_ioctl = sh_wdt_ioctl, + .open = sh_wdt_open, + .release = sh_wdt_close, +}; + static const struct watchdog_info sh_wdt_info = { .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, @@ -204,17 +320,14 @@ static const struct watchdog_info sh_wdt_info = { .identity = "SH WDT", }; -static const struct watchdog_ops sh_wdt_ops = { - .owner = THIS_MODULE, - .start = sh_wdt_start, - .stop = sh_wdt_stop, - .ping = sh_wdt_keepalive, - .set_timeout = sh_wdt_set_heartbeat, +static struct notifier_block sh_wdt_notifier = { + .notifier_call = sh_wdt_notify_sys, }; -static struct watchdog_device sh_wdt_dev = { - .info = &sh_wdt_info, - .ops = &sh_wdt_ops, +static struct miscdevice sh_wdt_miscdev = { + .minor = WATCHDOG_MINOR, + .name = "watchdog", + .fops = &sh_wdt_fops, }; static int __devinit sh_wdt_probe(struct platform_device *pdev) @@ -234,49 +347,39 @@ static int __devinit sh_wdt_probe(struct platform_device *pdev) if (unlikely(!res)) return -EINVAL; + if (!devm_request_mem_region(&pdev->dev, res->start, + resource_size(res), DRV_NAME)) + return -EBUSY; + wdt = devm_kzalloc(&pdev->dev, sizeof(struct sh_wdt), GFP_KERNEL); - if (unlikely(!wdt)) - return -ENOMEM; + if (unlikely(!wdt)) { + rc = -ENOMEM; + goto out_release; + } wdt->dev = &pdev->dev; - wdt->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(wdt->clk)) { - /* - * Clock framework support is optional, continue on - * anyways if we don't find a matching clock. - */ - wdt->clk = NULL; - } - - wdt->base = devm_request_and_ioremap(wdt->dev, res); + wdt->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (unlikely(!wdt->base)) { - rc = -EADDRNOTAVAIL; - goto err; + rc = -ENXIO; + goto out_err; } - watchdog_set_nowayout(&sh_wdt_dev, nowayout); - watchdog_set_drvdata(&sh_wdt_dev, wdt); - - spin_lock_init(&wdt->lock); - - rc = sh_wdt_set_heartbeat(&sh_wdt_dev, heartbeat); + rc = register_reboot_notifier(&sh_wdt_notifier); if (unlikely(rc)) { - /* Default timeout if invalid */ - sh_wdt_set_heartbeat(&sh_wdt_dev, WATCHDOG_HEARTBEAT); - - dev_warn(&pdev->dev, - "heartbeat value must be 1<=x<=3600, using %d\n", - sh_wdt_dev.timeout); + dev_err(&pdev->dev, + "Can't register reboot notifier (err=%d)\n", rc); + goto out_unmap; } - dev_info(&pdev->dev, "configured with heartbeat=%d sec (nowayout=%d)\n", - sh_wdt_dev.timeout, nowayout); + sh_wdt_miscdev.parent = wdt->dev; - rc = watchdog_register_device(&sh_wdt_dev); + rc = misc_register(&sh_wdt_miscdev); if (unlikely(rc)) { - dev_err(&pdev->dev, "Can't register watchdog (err=%d)\n", rc); - goto err; + dev_err(&pdev->dev, + "Can't register miscdev on minor=%d (err=%d)\n", + sh_wdt_miscdev.minor, rc); + goto out_unreg; } init_timer(&wdt->timer); @@ -285,15 +388,20 @@ static int __devinit sh_wdt_probe(struct platform_device *pdev) wdt->timer.expires = next_ping_period(clock_division_ratio); platform_set_drvdata(pdev, wdt); + sh_wdt_dev = pdev; dev_info(&pdev->dev, "initialized.\n"); - pm_runtime_enable(&pdev->dev); - return 0; -err: - clk_put(wdt->clk); +out_unreg: + unregister_reboot_notifier(&sh_wdt_notifier); +out_unmap: + devm_iounmap(&pdev->dev, wdt->base); +out_err: + devm_kfree(&pdev->dev, wdt); +out_release: + devm_release_mem_region(&pdev->dev, res->start, resource_size(res)); return rc; } @@ -301,20 +409,20 @@ static int __devinit sh_wdt_probe(struct platform_device *pdev) static int __devexit sh_wdt_remove(struct platform_device *pdev) { struct sh_wdt *wdt = platform_get_drvdata(pdev); + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); platform_set_drvdata(pdev, NULL); - watchdog_unregister_device(&sh_wdt_dev); + misc_deregister(&sh_wdt_miscdev); - pm_runtime_disable(&pdev->dev); - clk_put(wdt->clk); + sh_wdt_dev = NULL; - return 0; -} + unregister_reboot_notifier(&sh_wdt_notifier); + devm_release_mem_region(&pdev->dev, res->start, resource_size(res)); + devm_iounmap(&pdev->dev, wdt->base); + devm_kfree(&pdev->dev, wdt); -static void sh_wdt_shutdown(struct platform_device *pdev) -{ - sh_wdt_stop(&sh_wdt_dev); + return 0; } static struct platform_driver sh_wdt_driver = { @@ -323,13 +431,14 @@ static struct platform_driver sh_wdt_driver = { .owner = THIS_MODULE, }, - .probe = sh_wdt_probe, - .remove = __devexit_p(sh_wdt_remove), - .shutdown = sh_wdt_shutdown, + .probe = sh_wdt_probe, + .remove = __devexit_p(sh_wdt_remove), }; static int __init sh_wdt_init(void) { + int rc; + if (unlikely(clock_division_ratio < 0x5 || clock_division_ratio > 0x7)) { clock_division_ratio = WTCSR_CKS_4096; @@ -338,6 +447,17 @@ static int __init sh_wdt_init(void) clock_division_ratio); } + rc = sh_wdt_set_heartbeat(heartbeat); + if (unlikely(rc)) { + heartbeat = WATCHDOG_HEARTBEAT; + + pr_info("heartbeat value must be 1<=x<=3600, using %d\n", + heartbeat); + } + + pr_info("configured with heartbeat=%d sec (nowayout=%d)\n", + heartbeat, nowayout); + return platform_driver_register(&sh_wdt_driver); } diff --git a/trunk/fs/cifs/cifsfs.c b/trunk/fs/cifs/cifsfs.c index ca6a3796a33b..541ef81f6ae8 100644 --- a/trunk/fs/cifs/cifsfs.c +++ b/trunk/fs/cifs/cifsfs.c @@ -699,7 +699,7 @@ static loff_t cifs_llseek(struct file *file, loff_t offset, int origin) * origin == SEEK_END || SEEK_DATA || SEEK_HOLE => we must revalidate * the cached file length */ - if (origin != SEEK_SET || origin != SEEK_CUR) { + if (origin != SEEK_SET && origin != SEEK_CUR) { int rc; struct inode *inode = file->f_path.dentry->d_inode; diff --git a/trunk/fs/cifs/connect.c b/trunk/fs/cifs/connect.c index 5dcc55197fb3..e0b56d7a19c5 100644 --- a/trunk/fs/cifs/connect.c +++ b/trunk/fs/cifs/connect.c @@ -164,7 +164,8 @@ static const match_table_t cifs_mount_option_tokens = { { Opt_sign, "sign" }, { Opt_seal, "seal" }, { Opt_direct, "direct" }, - { Opt_direct, "forceddirectio" }, + { Opt_direct, "directio" }, + { Opt_direct, "forcedirectio" }, { Opt_strictcache, "strictcache" }, { Opt_noac, "noac" }, { Opt_fsc, "fsc" }, diff --git a/trunk/fs/jffs2/gc.c b/trunk/fs/jffs2/gc.c index ad271c70aa25..5a2dec2b064c 100644 --- a/trunk/fs/jffs2/gc.c +++ b/trunk/fs/jffs2/gc.c @@ -234,8 +234,8 @@ int jffs2_garbage_collect_pass(struct jffs2_sb_info *c) return 0; jffs2_dbg(1, "No progress from erasing block; doing GC anyway\n"); - spin_lock(&c->erase_completion_lock); mutex_lock(&c->alloc_sem); + spin_lock(&c->erase_completion_lock); } /* First, work out which block we're garbage-collecting */ diff --git a/trunk/fs/proc/task_mmu.c b/trunk/fs/proc/task_mmu.c index 2d60492d6df8..1030a716d155 100644 --- a/trunk/fs/proc/task_mmu.c +++ b/trunk/fs/proc/task_mmu.c @@ -747,6 +747,8 @@ static void pte_to_pagemap_entry(pagemap_entry_t *pme, pte_t pte) else if (pte_present(pte)) *pme = make_pme(PM_PFRAME(pte_pfn(pte)) | PM_PSHIFT(PAGE_SHIFT) | PM_PRESENT); + else + *pme = make_pme(PM_NOT_PRESENT); } #ifdef CONFIG_TRANSPARENT_HUGEPAGE @@ -761,6 +763,8 @@ static void thp_pmd_to_pagemap_entry(pagemap_entry_t *pme, if (pmd_present(pmd)) *pme = make_pme(PM_PFRAME(pmd_pfn(pmd) + offset) | PM_PSHIFT(PAGE_SHIFT) | PM_PRESENT); + else + *pme = make_pme(PM_NOT_PRESENT); } #else static inline void thp_pmd_to_pagemap_entry(pagemap_entry_t *pme, @@ -801,8 +805,10 @@ static int pagemap_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end, /* check to see if we've left 'vma' behind * and need a new, higher one */ - if (vma && (addr >= vma->vm_end)) + if (vma && (addr >= vma->vm_end)) { vma = find_vma(walk->mm, addr); + pme = make_pme(PM_NOT_PRESENT); + } /* check that 'vma' actually covers this address, * and that it isn't a huge page vma */ @@ -830,6 +836,8 @@ static void huge_pte_to_pagemap_entry(pagemap_entry_t *pme, if (pte_present(pte)) *pme = make_pme(PM_PFRAME(pte_pfn(pte) + offset) | PM_PSHIFT(PAGE_SHIFT) | PM_PRESENT); + else + *pme = make_pme(PM_NOT_PRESENT); } /* This function walks within one hugetlb entry in the single call */ @@ -839,7 +847,7 @@ static int pagemap_hugetlb_range(pte_t *pte, unsigned long hmask, { struct pagemapread *pm = walk->private; int err = 0; - pagemap_entry_t pme = make_pme(PM_NOT_PRESENT); + pagemap_entry_t pme; for (; addr != end; addr += PAGE_SIZE) { int offset = (addr & ~hmask) >> PAGE_SHIFT; diff --git a/trunk/include/linux/etherdevice.h b/trunk/include/linux/etherdevice.h index 8a1835855faa..fe5136d81454 100644 --- a/trunk/include/linux/etherdevice.h +++ b/trunk/include/linux/etherdevice.h @@ -159,7 +159,8 @@ static inline void eth_hw_addr_random(struct net_device *dev) * @addr1: Pointer to a six-byte array containing the Ethernet address * @addr2: Pointer other six-byte array containing the Ethernet address * - * Compare two ethernet addresses, returns 0 if equal + * Compare two ethernet addresses, returns 0 if equal, non-zero otherwise. + * Unlike memcmp(), it doesn't return a value suitable for sorting. */ static inline unsigned compare_ether_addr(const u8 *addr1, const u8 *addr2) { @@ -184,10 +185,10 @@ static inline unsigned long zap_last_2bytes(unsigned long value) * @addr1: Pointer to an array of 8 bytes * @addr2: Pointer to an other array of 8 bytes * - * Compare two ethernet addresses, returns 0 if equal. - * Same result than "memcmp(addr1, addr2, ETH_ALEN)" but without conditional - * branches, and possibly long word memory accesses on CPU allowing cheap - * unaligned memory reads. + * Compare two ethernet addresses, returns 0 if equal, non-zero otherwise. + * Unlike memcmp(), it doesn't return a value suitable for sorting. + * The function doesn't need any conditional branches and possibly uses + * word memory accesses on CPU allowing cheap unaligned memory reads. * arrays = { byte1, byte2, byte3, byte4, byte6, byte7, pad1, pad2} * * Please note that alignment of addr1 & addr2 is only guaranted to be 16 bits. diff --git a/trunk/include/linux/ftrace_event.h b/trunk/include/linux/ftrace_event.h index 5f3f3be5af09..176a939d1547 100644 --- a/trunk/include/linux/ftrace_event.h +++ b/trunk/include/linux/ftrace_event.h @@ -179,6 +179,7 @@ enum { TRACE_EVENT_FL_RECORDED_CMD_BIT, TRACE_EVENT_FL_CAP_ANY_BIT, TRACE_EVENT_FL_NO_SET_FILTER_BIT, + TRACE_EVENT_FL_IGNORE_ENABLE_BIT, }; enum { @@ -187,6 +188,7 @@ enum { TRACE_EVENT_FL_RECORDED_CMD = (1 << TRACE_EVENT_FL_RECORDED_CMD_BIT), TRACE_EVENT_FL_CAP_ANY = (1 << TRACE_EVENT_FL_CAP_ANY_BIT), TRACE_EVENT_FL_NO_SET_FILTER = (1 << TRACE_EVENT_FL_NO_SET_FILTER_BIT), + TRACE_EVENT_FL_IGNORE_ENABLE = (1 << TRACE_EVENT_FL_IGNORE_ENABLE_BIT), }; struct ftrace_event_call { diff --git a/trunk/include/linux/netdevice.h b/trunk/include/linux/netdevice.h index 5cbaa20f1659..33900a53c990 100644 --- a/trunk/include/linux/netdevice.h +++ b/trunk/include/linux/netdevice.h @@ -1403,15 +1403,6 @@ static inline bool netdev_uses_dsa_tags(struct net_device *dev) return 0; } -#ifndef CONFIG_NET_NS -static inline void skb_set_dev(struct sk_buff *skb, struct net_device *dev) -{ - skb->dev = dev; -} -#else /* CONFIG_NET_NS */ -void skb_set_dev(struct sk_buff *skb, struct net_device *dev); -#endif - static inline bool netdev_uses_trailer_tags(struct net_device *dev) { #ifdef CONFIG_NET_DSA_TAG_TRAILER diff --git a/trunk/include/linux/netfilter/ipset/ip_set_ahash.h b/trunk/include/linux/netfilter/ipset/ip_set_ahash.h index 05a5d72680be..230a290e1973 100644 --- a/trunk/include/linux/netfilter/ipset/ip_set_ahash.h +++ b/trunk/include/linux/netfilter/ipset/ip_set_ahash.h @@ -99,6 +99,22 @@ struct ip_set_hash { #endif }; +static size_t +htable_size(u8 hbits) +{ + size_t hsize; + + /* We must fit both into u32 in jhash and size_t */ + if (hbits > 31) + return 0; + hsize = jhash_size(hbits); + if ((((size_t)-1) - sizeof(struct htable))/sizeof(struct hbucket) + < hsize) + return 0; + + return hsize * sizeof(struct hbucket) + sizeof(struct htable); +} + /* Compute htable_bits from the user input parameter hashsize */ static u8 htable_bits(u32 hashsize) diff --git a/trunk/include/linux/serial_sci.h b/trunk/include/linux/serial_sci.h index eb763adf9815..78779074f6e8 100644 --- a/trunk/include/linux/serial_sci.h +++ b/trunk/include/linux/serial_sci.h @@ -52,8 +52,6 @@ enum { /* SCSPTR, optional */ #define SCSPTR_RTSIO (1 << 7) #define SCSPTR_CTSIO (1 << 5) -#define SCSPTR_SPB2IO (1 << 1) -#define SCSPTR_SPB2DT (1 << 0) /* Offsets into the sci_port->irqs array */ enum { diff --git a/trunk/include/linux/sh_clk.h b/trunk/include/linux/sh_clk.h index c513b73cd7cb..0a9d8f2ac519 100644 --- a/trunk/include/linux/sh_clk.h +++ b/trunk/include/linux/sh_clk.h @@ -59,15 +59,7 @@ struct clk { unsigned int nr_freqs; }; -#define CLK_ENABLE_ON_INIT BIT(0) - -#define CLK_ENABLE_REG_32BIT BIT(1) /* default access size */ -#define CLK_ENABLE_REG_16BIT BIT(2) -#define CLK_ENABLE_REG_8BIT BIT(3) - -#define CLK_ENABLE_REG_MASK (CLK_ENABLE_REG_32BIT | \ - CLK_ENABLE_REG_16BIT | \ - CLK_ENABLE_REG_8BIT) +#define CLK_ENABLE_ON_INIT (1 << 0) /* drivers/sh/clk.c */ unsigned long followparent_recalc(struct clk *); @@ -110,7 +102,7 @@ long clk_round_parent(struct clk *clk, unsigned long target, unsigned long *best_freq, unsigned long *parent_freq, unsigned int div_min, unsigned int div_max); -#define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _flags) \ +#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \ { \ .parent = _parent, \ .enable_reg = (void __iomem *)_enable_reg, \ @@ -118,27 +110,7 @@ long clk_round_parent(struct clk *clk, unsigned long target, .flags = _flags, \ } -#define SH_CLK_MSTP32(_p, _r, _b, _f) \ - SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_32BIT) - -#define SH_CLK_MSTP16(_p, _r, _b, _f) \ - SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_16BIT) - -#define SH_CLK_MSTP8(_p, _r, _b, _f) \ - SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_8BIT) - -int sh_clk_mstp_register(struct clk *clks, int nr); - -/* - * MSTP registration never really cared about access size, despite the - * original enable/disable pairs assuming a 32-bit access. Clocks are - * responsible for defining their access sizes either directly or via the - * clock definition wrappers. - */ -static inline int __deprecated sh_clk_mstp32_register(struct clk *clks, int nr) -{ - return sh_clk_mstp_register(clks, nr); -} +int sh_clk_mstp32_register(struct clk *clks, int nr); #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \ { \ diff --git a/trunk/include/linux/usb/usbnet.h b/trunk/include/linux/usb/usbnet.h index 605b0aa8d852..76f439647c4b 100644 --- a/trunk/include/linux/usb/usbnet.h +++ b/trunk/include/linux/usb/usbnet.h @@ -191,7 +191,8 @@ extern void usbnet_cdc_status(struct usbnet *, struct urb *); enum skb_state { illegal = 0, tx_start, tx_done, - rx_start, rx_done, rx_cleanup + rx_start, rx_done, rx_cleanup, + unlink_start }; struct skb_data { /* skb->cb is one of these */ diff --git a/trunk/include/media/soc_camera.h b/trunk/include/media/soc_camera.h index b5c2b6cb0d81..cad374bdcf4b 100644 --- a/trunk/include/media/soc_camera.h +++ b/trunk/include/media/soc_camera.h @@ -59,7 +59,8 @@ struct soc_camera_device { struct soc_camera_host { struct v4l2_device v4l2_dev; struct list_head list; - unsigned char nr; /* Host number */ + struct mutex host_lock; /* Protect during probing */ + unsigned char nr; /* Host number */ void *priv; const char *drv_name; struct soc_camera_host_ops *ops; diff --git a/trunk/include/net/bluetooth/bluetooth.h b/trunk/include/net/bluetooth/bluetooth.h index 262ebd1747d4..a65910bda381 100644 --- a/trunk/include/net/bluetooth/bluetooth.h +++ b/trunk/include/net/bluetooth/bluetooth.h @@ -191,6 +191,7 @@ struct bt_sock { struct list_head accept_q; struct sock *parent; u32 defer_setup; + bool suspended; }; struct bt_sock_list { diff --git a/trunk/include/net/sctp/sctp.h b/trunk/include/net/sctp/sctp.h index 6ee44b24864a..a2ef81466b00 100644 --- a/trunk/include/net/sctp/sctp.h +++ b/trunk/include/net/sctp/sctp.h @@ -704,4 +704,17 @@ static inline void sctp_v4_map_v6(union sctp_addr *addr) addr->v6.sin6_addr.s6_addr32[2] = htonl(0x0000ffff); } +/* The cookie is always 0 since this is how it's used in the + * pmtu code. + */ +static inline struct dst_entry *sctp_transport_dst_check(struct sctp_transport *t) +{ + if (t->dst && !dst_check(t->dst, 0)) { + dst_release(t->dst); + t->dst = NULL; + } + + return t->dst; +} + #endif /* __net_sctp_h__ */ diff --git a/trunk/kernel/compat.c b/trunk/kernel/compat.c index 74ff8498809a..d2c67aa49ae6 100644 --- a/trunk/kernel/compat.c +++ b/trunk/kernel/compat.c @@ -372,25 +372,54 @@ asmlinkage long compat_sys_sigpending(compat_old_sigset_t __user *set) #ifdef __ARCH_WANT_SYS_SIGPROCMASK -asmlinkage long compat_sys_sigprocmask(int how, compat_old_sigset_t __user *set, - compat_old_sigset_t __user *oset) +/* + * sys_sigprocmask SIG_SETMASK sets the first (compat) word of the + * blocked set of signals to the supplied signal set + */ +static inline void compat_sig_setmask(sigset_t *blocked, compat_sigset_word set) { - old_sigset_t s; - long ret; - mm_segment_t old_fs; + memcpy(blocked->sig, &set, sizeof(set)); +} - if (set && get_user(s, set)) - return -EFAULT; - old_fs = get_fs(); - set_fs(KERNEL_DS); - ret = sys_sigprocmask(how, - set ? (old_sigset_t __user *) &s : NULL, - oset ? (old_sigset_t __user *) &s : NULL); - set_fs(old_fs); - if (ret == 0) - if (oset) - ret = put_user(s, oset); - return ret; +asmlinkage long compat_sys_sigprocmask(int how, + compat_old_sigset_t __user *nset, + compat_old_sigset_t __user *oset) +{ + old_sigset_t old_set, new_set; + sigset_t new_blocked; + + old_set = current->blocked.sig[0]; + + if (nset) { + if (get_user(new_set, nset)) + return -EFAULT; + new_set &= ~(sigmask(SIGKILL) | sigmask(SIGSTOP)); + + new_blocked = current->blocked; + + switch (how) { + case SIG_BLOCK: + sigaddsetmask(&new_blocked, new_set); + break; + case SIG_UNBLOCK: + sigdelsetmask(&new_blocked, new_set); + break; + case SIG_SETMASK: + compat_sig_setmask(&new_blocked, new_set); + break; + default: + return -EINVAL; + } + + set_current_blocked(&new_blocked); + } + + if (oset) { + if (put_user(old_set, oset)) + return -EFAULT; + } + + return 0; } #endif diff --git a/trunk/kernel/fork.c b/trunk/kernel/fork.c index b9372a0bff18..687a15d56243 100644 --- a/trunk/kernel/fork.c +++ b/trunk/kernel/fork.c @@ -47,6 +47,7 @@ #include #include #include +#include #include #include #include @@ -1464,6 +1465,8 @@ static struct task_struct *copy_process(unsigned long clone_flags, if (p->io_context) exit_io_context(p); bad_fork_cleanup_namespaces: + if (unlikely(clone_flags & CLONE_NEWPID)) + pid_ns_release_proc(p->nsproxy->pid_ns); exit_task_namespaces(p); bad_fork_cleanup_mm: if (p->mm) diff --git a/trunk/kernel/irq/chip.c b/trunk/kernel/irq/chip.c index 6080f6bc8c33..3914c1e03cff 100644 --- a/trunk/kernel/irq/chip.c +++ b/trunk/kernel/irq/chip.c @@ -518,6 +518,7 @@ handle_edge_irq(unsigned int irq, struct irq_desc *desc) out_unlock: raw_spin_unlock(&desc->lock); } +EXPORT_SYMBOL(handle_edge_irq); #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER /** diff --git a/trunk/kernel/irq/irqdesc.c b/trunk/kernel/irq/irqdesc.c index d86e254b95eb..192a302d6cfd 100644 --- a/trunk/kernel/irq/irqdesc.c +++ b/trunk/kernel/irq/irqdesc.c @@ -112,6 +112,7 @@ struct irq_desc *irq_to_desc(unsigned int irq) { return radix_tree_lookup(&irq_desc_tree, irq); } +EXPORT_SYMBOL(irq_to_desc); static void delete_irq_desc(unsigned int irq) { diff --git a/trunk/kernel/sched/core.c b/trunk/kernel/sched/core.c index 0533a688ce22..e5212ae294f6 100644 --- a/trunk/kernel/sched/core.c +++ b/trunk/kernel/sched/core.c @@ -6382,6 +6382,8 @@ static int __sdt_alloc(const struct cpumask *cpu_map) if (!sg) return -ENOMEM; + sg->next = sg; + *per_cpu_ptr(sdd->sg, j) = sg; sgp = kzalloc_node(sizeof(struct sched_group_power), diff --git a/trunk/kernel/trace/trace_events.c b/trunk/kernel/trace/trace_events.c index 079a93ae8a9d..29111da1d100 100644 --- a/trunk/kernel/trace/trace_events.c +++ b/trunk/kernel/trace/trace_events.c @@ -294,6 +294,9 @@ static int __ftrace_set_clr_event(const char *match, const char *sub, if (!call->name || !call->class || !call->class->reg) continue; + if (call->flags & TRACE_EVENT_FL_IGNORE_ENABLE) + continue; + if (match && strcmp(match, call->name) != 0 && strcmp(match, call->class->system) != 0) @@ -1164,7 +1167,7 @@ event_create_dir(struct ftrace_event_call *call, struct dentry *d_events, return -1; } - if (call->class->reg) + if (call->class->reg && !(call->flags & TRACE_EVENT_FL_IGNORE_ENABLE)) trace_create_file("enable", 0644, call->dir, call, enable); diff --git a/trunk/kernel/trace/trace_export.c b/trunk/kernel/trace/trace_export.c index 3dd15e8bc856..e039906b037d 100644 --- a/trunk/kernel/trace/trace_export.c +++ b/trunk/kernel/trace/trace_export.c @@ -180,6 +180,7 @@ struct ftrace_event_call __used event_##call = { \ .event.type = etype, \ .class = &event_class_ftrace_##call, \ .print_fmt = print, \ + .flags = TRACE_EVENT_FL_IGNORE_ENABLE, \ }; \ struct ftrace_event_call __used \ __attribute__((section("_ftrace_events"))) *__event_##call = &event_##call; diff --git a/trunk/mm/hugetlb.c b/trunk/mm/hugetlb.c index 5a16423a512c..ae8f708e3d75 100644 --- a/trunk/mm/hugetlb.c +++ b/trunk/mm/hugetlb.c @@ -2498,7 +2498,6 @@ static int hugetlb_cow(struct mm_struct *mm, struct vm_area_struct *vma, if (outside_reserve) { BUG_ON(huge_pte_none(pte)); if (unmap_ref_private(mm, vma, old_page, address)) { - BUG_ON(page_count(old_page) != 1); BUG_ON(huge_pte_none(pte)); spin_lock(&mm->page_table_lock); ptep = huge_pte_offset(mm, address & huge_page_mask(h)); diff --git a/trunk/mm/memcontrol.c b/trunk/mm/memcontrol.c index 31ab9c3f0178..b659260c56ad 100644 --- a/trunk/mm/memcontrol.c +++ b/trunk/mm/memcontrol.c @@ -4507,6 +4507,12 @@ static void mem_cgroup_usage_unregister_event(struct cgroup *cgrp, swap_buffers: /* Swap primary and spare array */ thresholds->spare = thresholds->primary; + /* If all events are unregistered, free the spare array */ + if (!new) { + kfree(thresholds->spare); + thresholds->spare = NULL; + } + rcu_assign_pointer(thresholds->primary, new); /* To be sure that nobody uses thresholds */ diff --git a/trunk/mm/nobootmem.c b/trunk/mm/nobootmem.c index e53bb8a256b1..1983fb1c7026 100644 --- a/trunk/mm/nobootmem.c +++ b/trunk/mm/nobootmem.c @@ -82,8 +82,7 @@ void __init free_bootmem_late(unsigned long addr, unsigned long size) static void __init __free_pages_memory(unsigned long start, unsigned long end) { - int i; - unsigned long start_aligned, end_aligned; + unsigned long i, start_aligned, end_aligned; int order = ilog2(BITS_PER_LONG); start_aligned = (start + (BITS_PER_LONG - 1)) & ~(BITS_PER_LONG - 1); diff --git a/trunk/mm/page_alloc.c b/trunk/mm/page_alloc.c index a712fb9e04ce..918330f71dba 100644 --- a/trunk/mm/page_alloc.c +++ b/trunk/mm/page_alloc.c @@ -5203,7 +5203,7 @@ int percpu_pagelist_fraction_sysctl_handler(ctl_table *table, int write, int ret; ret = proc_dointvec_minmax(table, write, buffer, length, ppos); - if (!write || (ret == -EINVAL)) + if (!write || (ret < 0)) return ret; for_each_populated_zone(zone) { for_each_possible_cpu(cpu) { diff --git a/trunk/mm/percpu.c b/trunk/mm/percpu.c index f921fdfb5430..bb4be7435ce3 100644 --- a/trunk/mm/percpu.c +++ b/trunk/mm/percpu.c @@ -1650,6 +1650,16 @@ int __init pcpu_embed_first_chunk(size_t reserved_size, size_t dyn_size, areas[group] = ptr; base = min(ptr, base); + } + + /* + * Copy data and free unused parts. This should happen after all + * allocations are complete; otherwise, we may end up with + * overlapping groups. + */ + for (group = 0; group < ai->nr_groups; group++) { + struct pcpu_group_info *gi = &ai->groups[group]; + void *ptr = areas[group]; for (i = 0; i < gi->nr_units; i++, ptr += ai->unit_size) { if (gi->cpu_map[i] == NR_CPUS) { @@ -1885,6 +1895,8 @@ void __init setup_per_cpu_areas(void) fc = __alloc_bootmem(unit_size, PAGE_SIZE, __pa(MAX_DMA_ADDRESS)); if (!ai || !fc) panic("Failed to allocate memory for percpu areas."); + /* kmemleak tracks the percpu allocations separately */ + kmemleak_free(fc); ai->dyn_size = unit_size; ai->unit_size = unit_size; diff --git a/trunk/net/8021q/vlan_dev.c b/trunk/net/8021q/vlan_dev.c index 9988d4abb372..9757c193c86b 100644 --- a/trunk/net/8021q/vlan_dev.c +++ b/trunk/net/8021q/vlan_dev.c @@ -157,7 +157,7 @@ static netdev_tx_t vlan_dev_hard_start_xmit(struct sk_buff *skb, skb = __vlan_hwaccel_put_tag(skb, vlan_tci); } - skb_set_dev(skb, vlan_dev_priv(dev)->real_dev); + skb->dev = vlan_dev_priv(dev)->real_dev; len = skb->len; if (netpoll_tx_running(dev)) return skb->dev->netdev_ops->ndo_start_xmit(skb, skb->dev); diff --git a/trunk/net/bluetooth/af_bluetooth.c b/trunk/net/bluetooth/af_bluetooth.c index 72eb187a5f60..6fb68a9743af 100644 --- a/trunk/net/bluetooth/af_bluetooth.c +++ b/trunk/net/bluetooth/af_bluetooth.c @@ -450,7 +450,7 @@ unsigned int bt_sock_poll(struct file *file, struct socket *sock, poll_table *wa sk->sk_state == BT_CONFIG) return mask; - if (sock_writeable(sk)) + if (!bt_sk(sk)->suspended && sock_writeable(sk)) mask |= POLLOUT | POLLWRNORM | POLLWRBAND; else set_bit(SOCK_ASYNC_NOSPACE, &sk->sk_socket->flags); diff --git a/trunk/net/bluetooth/hci_core.c b/trunk/net/bluetooth/hci_core.c index edfd61addcec..d6dc44cd15b0 100644 --- a/trunk/net/bluetooth/hci_core.c +++ b/trunk/net/bluetooth/hci_core.c @@ -2784,6 +2784,14 @@ static inline void hci_acldata_packet(struct hci_dev *hdev, struct sk_buff *skb) if (conn) { hci_conn_enter_active_mode(conn, BT_POWER_FORCE_ACTIVE_OFF); + hci_dev_lock(hdev); + if (test_bit(HCI_MGMT, &hdev->dev_flags) && + !test_and_set_bit(HCI_CONN_MGMT_CONNECTED, &conn->flags)) + mgmt_device_connected(hdev, &conn->dst, conn->type, + conn->dst_type, 0, NULL, 0, + conn->dev_class); + hci_dev_unlock(hdev); + /* Send to upper protocol */ l2cap_recv_acldata(conn, skb, flags); return; diff --git a/trunk/net/bluetooth/hci_event.c b/trunk/net/bluetooth/hci_event.c index 6c065254afc0..1266f78fa8e3 100644 --- a/trunk/net/bluetooth/hci_event.c +++ b/trunk/net/bluetooth/hci_event.c @@ -2039,6 +2039,12 @@ static inline void hci_encrypt_change_evt(struct hci_dev *hdev, struct sk_buff * clear_bit(HCI_CONN_ENCRYPT_PEND, &conn->flags); + if (ev->status && conn->state == BT_CONNECTED) { + hci_acl_disconn(conn, 0x13); + hci_conn_put(conn); + goto unlock; + } + if (conn->state == BT_CONFIG) { if (!ev->status) conn->state = BT_CONNECTED; @@ -2049,6 +2055,7 @@ static inline void hci_encrypt_change_evt(struct hci_dev *hdev, struct sk_buff * hci_encrypt_cfm(conn, ev->status, ev->encrypt); } +unlock: hci_dev_unlock(hdev); } @@ -2102,7 +2109,7 @@ static inline void hci_remote_features_evt(struct hci_dev *hdev, struct sk_buff goto unlock; } - if (!ev->status) { + if (!ev->status && !test_bit(HCI_CONN_MGMT_CONNECTED, &conn->flags)) { struct hci_cp_remote_name_req cp; memset(&cp, 0, sizeof(cp)); bacpy(&cp.bdaddr, &conn->dst); @@ -2871,7 +2878,7 @@ static inline void hci_remote_ext_features_evt(struct hci_dev *hdev, struct sk_b if (conn->state != BT_CONFIG) goto unlock; - if (!ev->status) { + if (!ev->status && !test_bit(HCI_CONN_MGMT_CONNECTED, &conn->flags)) { struct hci_cp_remote_name_req cp; memset(&cp, 0, sizeof(cp)); bacpy(&cp.bdaddr, &conn->dst); diff --git a/trunk/net/bluetooth/l2cap_core.c b/trunk/net/bluetooth/l2cap_core.c index 94552b33d528..6f9c25b633a6 100644 --- a/trunk/net/bluetooth/l2cap_core.c +++ b/trunk/net/bluetooth/l2cap_core.c @@ -4589,6 +4589,11 @@ int l2cap_security_cfm(struct hci_conn *hcon, u8 status, u8 encrypt) if (!status && (chan->state == BT_CONNECTED || chan->state == BT_CONFIG)) { + struct sock *sk = chan->sk; + + bt_sk(sk)->suspended = false; + sk->sk_state_change(sk); + l2cap_check_encryption(chan, encrypt); l2cap_chan_unlock(chan); continue; diff --git a/trunk/net/bluetooth/l2cap_sock.c b/trunk/net/bluetooth/l2cap_sock.c index 29122ed28ea9..04e7c172d49c 100644 --- a/trunk/net/bluetooth/l2cap_sock.c +++ b/trunk/net/bluetooth/l2cap_sock.c @@ -592,10 +592,14 @@ static int l2cap_sock_setsockopt(struct socket *sock, int level, int optname, ch sk->sk_state = BT_CONFIG; chan->state = BT_CONFIG; - /* or for ACL link, under defer_setup time */ - } else if (sk->sk_state == BT_CONNECT2 && - bt_sk(sk)->defer_setup) { - err = l2cap_chan_check_security(chan); + /* or for ACL link */ + } else if ((sk->sk_state == BT_CONNECT2 && + bt_sk(sk)->defer_setup) || + sk->sk_state == BT_CONNECTED) { + if (!l2cap_chan_check_security(chan)) + bt_sk(sk)->suspended = true; + else + sk->sk_state_change(sk); } else { err = -EINVAL; } diff --git a/trunk/net/core/dev.c b/trunk/net/core/dev.c index 9bb8f87c4cda..99e1d759f41e 100644 --- a/trunk/net/core/dev.c +++ b/trunk/net/core/dev.c @@ -1617,10 +1617,14 @@ int dev_forward_skb(struct net_device *dev, struct sk_buff *skb) return NET_RX_DROP; } skb->skb_iif = 0; - skb_set_dev(skb, dev); + skb->dev = dev; + skb_dst_drop(skb); skb->tstamp.tv64 = 0; skb->pkt_type = PACKET_HOST; skb->protocol = eth_type_trans(skb, dev); + skb->mark = 0; + secpath_reset(skb); + nf_reset(skb); return netif_rx(skb); } EXPORT_SYMBOL_GPL(dev_forward_skb); @@ -1869,36 +1873,6 @@ void netif_device_attach(struct net_device *dev) } EXPORT_SYMBOL(netif_device_attach); -/** - * skb_dev_set -- assign a new device to a buffer - * @skb: buffer for the new device - * @dev: network device - * - * If an skb is owned by a device already, we have to reset - * all data private to the namespace a device belongs to - * before assigning it a new device. - */ -#ifdef CONFIG_NET_NS -void skb_set_dev(struct sk_buff *skb, struct net_device *dev) -{ - skb_dst_drop(skb); - if (skb->dev && !net_eq(dev_net(skb->dev), dev_net(dev))) { - secpath_reset(skb); - nf_reset(skb); - skb_init_secmark(skb); - skb->mark = 0; - skb->priority = 0; - skb->nf_trace = 0; - skb->ipvs_property = 0; -#ifdef CONFIG_NET_SCHED - skb->tc_index = 0; -#endif - } - skb->dev = dev; -} -EXPORT_SYMBOL(skb_set_dev); -#endif /* CONFIG_NET_NS */ - static void skb_warn_bad_offload(const struct sk_buff *skb) { static const netdev_features_t null_features = 0; diff --git a/trunk/net/core/pktgen.c b/trunk/net/core/pktgen.c index 4d8ce93cd503..77a59980b579 100644 --- a/trunk/net/core/pktgen.c +++ b/trunk/net/core/pktgen.c @@ -1931,7 +1931,7 @@ static int pktgen_device_event(struct notifier_block *unused, { struct net_device *dev = ptr; - if (!net_eq(dev_net(dev), &init_net)) + if (!net_eq(dev_net(dev), &init_net) || pktgen_exiting) return NOTIFY_DONE; /* It is OK that we do not hold the group lock right now, @@ -3755,12 +3755,18 @@ static void __exit pg_cleanup(void) { struct pktgen_thread *t; struct list_head *q, *n; + struct list_head list; /* Stop all interfaces & threads */ pktgen_exiting = true; - list_for_each_safe(q, n, &pktgen_threads) { + mutex_lock(&pktgen_thread_lock); + list_splice(&list, &pktgen_threads); + mutex_unlock(&pktgen_thread_lock); + + list_for_each_safe(q, n, &list) { t = list_entry(q, struct pktgen_thread, th_list); + list_del(&t->th_list); kthread_stop(t->tsk); kfree(t); } diff --git a/trunk/net/ipv4/fib_trie.c b/trunk/net/ipv4/fib_trie.c index bce36f1a37b4..30b88d7b4bd6 100644 --- a/trunk/net/ipv4/fib_trie.c +++ b/trunk/net/ipv4/fib_trie.c @@ -1370,6 +1370,8 @@ static int check_leaf(struct fib_table *tb, struct trie *t, struct leaf *l, if (fa->fa_tos && fa->fa_tos != flp->flowi4_tos) continue; + if (fi->fib_dead) + continue; if (fa->fa_info->fib_scope < flp->flowi4_scope) continue; fib_alias_accessed(fa); diff --git a/trunk/net/ipv4/tcp.c b/trunk/net/ipv4/tcp.c index 1272a88c2a63..6589e11d57b6 100644 --- a/trunk/net/ipv4/tcp.c +++ b/trunk/net/ipv4/tcp.c @@ -851,8 +851,7 @@ static ssize_t do_tcp_sendpages(struct sock *sk, struct page **pages, int poffse wait_for_sndbuf: set_bit(SOCK_NOSPACE, &sk->sk_socket->flags); wait_for_memory: - if (copied) - tcp_push(sk, flags & ~MSG_MORE, mss_now, TCP_NAGLE_PUSH); + tcp_push(sk, flags & ~MSG_MORE, mss_now, TCP_NAGLE_PUSH); if ((err = sk_stream_wait_memory(sk, &timeo)) != 0) goto do_error; diff --git a/trunk/net/netfilter/ipset/ip_set_hash_ip.c b/trunk/net/netfilter/ipset/ip_set_hash_ip.c index 5139dea6019e..828ce46cb34b 100644 --- a/trunk/net/netfilter/ipset/ip_set_hash_ip.c +++ b/trunk/net/netfilter/ipset/ip_set_hash_ip.c @@ -364,6 +364,7 @@ hash_ip_create(struct ip_set *set, struct nlattr *tb[], u32 flags) { u32 hashsize = IPSET_DEFAULT_HASHSIZE, maxelem = IPSET_DEFAULT_MAXELEM; u8 netmask, hbits; + size_t hsize; struct ip_set_hash *h; if (!(set->family == NFPROTO_IPV4 || set->family == NFPROTO_IPV6)) @@ -405,9 +406,12 @@ hash_ip_create(struct ip_set *set, struct nlattr *tb[], u32 flags) h->timeout = IPSET_NO_TIMEOUT; hbits = htable_bits(hashsize); - h->table = ip_set_alloc( - sizeof(struct htable) - + jhash_size(hbits) * sizeof(struct hbucket)); + hsize = htable_size(hbits); + if (hsize == 0) { + kfree(h); + return -ENOMEM; + } + h->table = ip_set_alloc(hsize); if (!h->table) { kfree(h); return -ENOMEM; diff --git a/trunk/net/netfilter/ipset/ip_set_hash_ipport.c b/trunk/net/netfilter/ipset/ip_set_hash_ipport.c index 9c27e249c171..e8dbb498af8f 100644 --- a/trunk/net/netfilter/ipset/ip_set_hash_ipport.c +++ b/trunk/net/netfilter/ipset/ip_set_hash_ipport.c @@ -449,6 +449,7 @@ hash_ipport_create(struct ip_set *set, struct nlattr *tb[], u32 flags) struct ip_set_hash *h; u32 hashsize = IPSET_DEFAULT_HASHSIZE, maxelem = IPSET_DEFAULT_MAXELEM; u8 hbits; + size_t hsize; if (!(set->family == NFPROTO_IPV4 || set->family == NFPROTO_IPV6)) return -IPSET_ERR_INVALID_FAMILY; @@ -476,9 +477,12 @@ hash_ipport_create(struct ip_set *set, struct nlattr *tb[], u32 flags) h->timeout = IPSET_NO_TIMEOUT; hbits = htable_bits(hashsize); - h->table = ip_set_alloc( - sizeof(struct htable) - + jhash_size(hbits) * sizeof(struct hbucket)); + hsize = htable_size(hbits); + if (hsize == 0) { + kfree(h); + return -ENOMEM; + } + h->table = ip_set_alloc(hsize); if (!h->table) { kfree(h); return -ENOMEM; diff --git a/trunk/net/netfilter/ipset/ip_set_hash_ipportip.c b/trunk/net/netfilter/ipset/ip_set_hash_ipportip.c index 9134057c0728..52f79d8ef741 100644 --- a/trunk/net/netfilter/ipset/ip_set_hash_ipportip.c +++ b/trunk/net/netfilter/ipset/ip_set_hash_ipportip.c @@ -467,6 +467,7 @@ hash_ipportip_create(struct ip_set *set, struct nlattr *tb[], u32 flags) struct ip_set_hash *h; u32 hashsize = IPSET_DEFAULT_HASHSIZE, maxelem = IPSET_DEFAULT_MAXELEM; u8 hbits; + size_t hsize; if (!(set->family == NFPROTO_IPV4 || set->family == NFPROTO_IPV6)) return -IPSET_ERR_INVALID_FAMILY; @@ -494,9 +495,12 @@ hash_ipportip_create(struct ip_set *set, struct nlattr *tb[], u32 flags) h->timeout = IPSET_NO_TIMEOUT; hbits = htable_bits(hashsize); - h->table = ip_set_alloc( - sizeof(struct htable) - + jhash_size(hbits) * sizeof(struct hbucket)); + hsize = htable_size(hbits); + if (hsize == 0) { + kfree(h); + return -ENOMEM; + } + h->table = ip_set_alloc(hsize); if (!h->table) { kfree(h); return -ENOMEM; diff --git a/trunk/net/netfilter/ipset/ip_set_hash_ipportnet.c b/trunk/net/netfilter/ipset/ip_set_hash_ipportnet.c index 5d05e6969862..97583f5af745 100644 --- a/trunk/net/netfilter/ipset/ip_set_hash_ipportnet.c +++ b/trunk/net/netfilter/ipset/ip_set_hash_ipportnet.c @@ -616,6 +616,7 @@ hash_ipportnet_create(struct ip_set *set, struct nlattr *tb[], u32 flags) struct ip_set_hash *h; u32 hashsize = IPSET_DEFAULT_HASHSIZE, maxelem = IPSET_DEFAULT_MAXELEM; u8 hbits; + size_t hsize; if (!(set->family == NFPROTO_IPV4 || set->family == NFPROTO_IPV6)) return -IPSET_ERR_INVALID_FAMILY; @@ -645,9 +646,12 @@ hash_ipportnet_create(struct ip_set *set, struct nlattr *tb[], u32 flags) h->timeout = IPSET_NO_TIMEOUT; hbits = htable_bits(hashsize); - h->table = ip_set_alloc( - sizeof(struct htable) - + jhash_size(hbits) * sizeof(struct hbucket)); + hsize = htable_size(hbits); + if (hsize == 0) { + kfree(h); + return -ENOMEM; + } + h->table = ip_set_alloc(hsize); if (!h->table) { kfree(h); return -ENOMEM; diff --git a/trunk/net/netfilter/ipset/ip_set_hash_net.c b/trunk/net/netfilter/ipset/ip_set_hash_net.c index 7c3d945517cf..1721cdecc9f9 100644 --- a/trunk/net/netfilter/ipset/ip_set_hash_net.c +++ b/trunk/net/netfilter/ipset/ip_set_hash_net.c @@ -460,6 +460,7 @@ hash_net_create(struct ip_set *set, struct nlattr *tb[], u32 flags) u32 hashsize = IPSET_DEFAULT_HASHSIZE, maxelem = IPSET_DEFAULT_MAXELEM; struct ip_set_hash *h; u8 hbits; + size_t hsize; if (!(set->family == NFPROTO_IPV4 || set->family == NFPROTO_IPV6)) return -IPSET_ERR_INVALID_FAMILY; @@ -489,9 +490,12 @@ hash_net_create(struct ip_set *set, struct nlattr *tb[], u32 flags) h->timeout = IPSET_NO_TIMEOUT; hbits = htable_bits(hashsize); - h->table = ip_set_alloc( - sizeof(struct htable) - + jhash_size(hbits) * sizeof(struct hbucket)); + hsize = htable_size(hbits); + if (hsize == 0) { + kfree(h); + return -ENOMEM; + } + h->table = ip_set_alloc(hsize); if (!h->table) { kfree(h); return -ENOMEM; diff --git a/trunk/net/netfilter/ipset/ip_set_hash_netiface.c b/trunk/net/netfilter/ipset/ip_set_hash_netiface.c index f24037ff4322..33bafc97ca6d 100644 --- a/trunk/net/netfilter/ipset/ip_set_hash_netiface.c +++ b/trunk/net/netfilter/ipset/ip_set_hash_netiface.c @@ -722,6 +722,7 @@ hash_netiface_create(struct ip_set *set, struct nlattr *tb[], u32 flags) struct ip_set_hash *h; u32 hashsize = IPSET_DEFAULT_HASHSIZE, maxelem = IPSET_DEFAULT_MAXELEM; u8 hbits; + size_t hsize; if (!(set->family == NFPROTO_IPV4 || set->family == NFPROTO_IPV6)) return -IPSET_ERR_INVALID_FAMILY; @@ -752,9 +753,12 @@ hash_netiface_create(struct ip_set *set, struct nlattr *tb[], u32 flags) h->ahash_max = AHASH_MAX_SIZE; hbits = htable_bits(hashsize); - h->table = ip_set_alloc( - sizeof(struct htable) - + jhash_size(hbits) * sizeof(struct hbucket)); + hsize = htable_size(hbits); + if (hsize == 0) { + kfree(h); + return -ENOMEM; + } + h->table = ip_set_alloc(hsize); if (!h->table) { kfree(h); return -ENOMEM; diff --git a/trunk/net/netfilter/ipset/ip_set_hash_netport.c b/trunk/net/netfilter/ipset/ip_set_hash_netport.c index ce2e77100b64..3a5e198641d6 100644 --- a/trunk/net/netfilter/ipset/ip_set_hash_netport.c +++ b/trunk/net/netfilter/ipset/ip_set_hash_netport.c @@ -572,6 +572,7 @@ hash_netport_create(struct ip_set *set, struct nlattr *tb[], u32 flags) struct ip_set_hash *h; u32 hashsize = IPSET_DEFAULT_HASHSIZE, maxelem = IPSET_DEFAULT_MAXELEM; u8 hbits; + size_t hsize; if (!(set->family == NFPROTO_IPV4 || set->family == NFPROTO_IPV6)) return -IPSET_ERR_INVALID_FAMILY; @@ -601,9 +602,12 @@ hash_netport_create(struct ip_set *set, struct nlattr *tb[], u32 flags) h->timeout = IPSET_NO_TIMEOUT; hbits = htable_bits(hashsize); - h->table = ip_set_alloc( - sizeof(struct htable) - + jhash_size(hbits) * sizeof(struct hbucket)); + hsize = htable_size(hbits); + if (hsize == 0) { + kfree(h); + return -ENOMEM; + } + h->table = ip_set_alloc(hsize); if (!h->table) { kfree(h); return -ENOMEM; diff --git a/trunk/net/openvswitch/datapath.c b/trunk/net/openvswitch/datapath.c index e44e631ea952..e66341ec455c 100644 --- a/trunk/net/openvswitch/datapath.c +++ b/trunk/net/openvswitch/datapath.c @@ -321,7 +321,7 @@ static int queue_userspace_packet(int dp_ifindex, struct sk_buff *skb, return -ENOMEM; nskb = __vlan_put_tag(nskb, vlan_tx_tag_get(nskb)); - if (!skb) + if (!nskb) return -ENOMEM; nskb->vlan_tci = 0; @@ -421,6 +421,19 @@ static int validate_sample(const struct nlattr *attr, return validate_actions(actions, key, depth + 1); } +static int validate_tp_port(const struct sw_flow_key *flow_key) +{ + if (flow_key->eth.type == htons(ETH_P_IP)) { + if (flow_key->ipv4.tp.src && flow_key->ipv4.tp.dst) + return 0; + } else if (flow_key->eth.type == htons(ETH_P_IPV6)) { + if (flow_key->ipv6.tp.src && flow_key->ipv6.tp.dst) + return 0; + } + + return -EINVAL; +} + static int validate_set(const struct nlattr *a, const struct sw_flow_key *flow_key) { @@ -462,18 +475,13 @@ static int validate_set(const struct nlattr *a, if (flow_key->ip.proto != IPPROTO_TCP) return -EINVAL; - if (!flow_key->ipv4.tp.src || !flow_key->ipv4.tp.dst) - return -EINVAL; - - break; + return validate_tp_port(flow_key); case OVS_KEY_ATTR_UDP: if (flow_key->ip.proto != IPPROTO_UDP) return -EINVAL; - if (!flow_key->ipv4.tp.src || !flow_key->ipv4.tp.dst) - return -EINVAL; - break; + return validate_tp_port(flow_key); default: return -EINVAL; @@ -1641,10 +1649,9 @@ static int ovs_vport_cmd_set(struct sk_buff *skb, struct genl_info *info) reply = ovs_vport_cmd_build_info(vport, info->snd_pid, info->snd_seq, OVS_VPORT_CMD_NEW); if (IS_ERR(reply)) { - err = PTR_ERR(reply); netlink_set_err(init_net.genl_sock, 0, - ovs_dp_vport_multicast_group.id, err); - return 0; + ovs_dp_vport_multicast_group.id, PTR_ERR(reply)); + goto exit_unlock; } genl_notify(reply, genl_info_net(info), info->snd_pid, diff --git a/trunk/net/openvswitch/flow.c b/trunk/net/openvswitch/flow.c index 1252c3081ef1..2a11ec2383ee 100644 --- a/trunk/net/openvswitch/flow.c +++ b/trunk/net/openvswitch/flow.c @@ -183,7 +183,8 @@ void ovs_flow_used(struct sw_flow *flow, struct sk_buff *skb) u8 tcp_flags = 0; if (flow->key.eth.type == htons(ETH_P_IP) && - flow->key.ip.proto == IPPROTO_TCP) { + flow->key.ip.proto == IPPROTO_TCP && + likely(skb->len >= skb_transport_offset(skb) + sizeof(struct tcphdr))) { u8 *tcp = (u8 *)tcp_hdr(skb); tcp_flags = *(tcp + TCP_FLAGS_OFFSET) & TCP_FLAG_MASK; } diff --git a/trunk/net/sctp/output.c b/trunk/net/sctp/output.c index 817174eb5f41..8fc4dcd294ab 100644 --- a/trunk/net/sctp/output.c +++ b/trunk/net/sctp/output.c @@ -377,9 +377,7 @@ int sctp_packet_transmit(struct sctp_packet *packet) */ skb_set_owner_w(nskb, sk); - /* The 'obsolete' field of dst is set to 2 when a dst is freed. */ - if (!dst || (dst->obsolete > 1)) { - dst_release(dst); + if (!sctp_transport_dst_check(tp)) { sctp_transport_route(tp, NULL, sctp_sk(sk)); if (asoc && (asoc->param_flags & SPP_PMTUD_ENABLE)) { sctp_assoc_sync_pmtu(asoc); diff --git a/trunk/net/sctp/transport.c b/trunk/net/sctp/transport.c index 3889330b7b04..b026ba0c6992 100644 --- a/trunk/net/sctp/transport.c +++ b/trunk/net/sctp/transport.c @@ -226,23 +226,6 @@ void sctp_transport_pmtu(struct sctp_transport *transport, struct sock *sk) transport->pathmtu = SCTP_DEFAULT_MAXSEGMENT; } -/* this is a complete rip-off from __sk_dst_check - * the cookie is always 0 since this is how it's used in the - * pmtu code - */ -static struct dst_entry *sctp_transport_dst_check(struct sctp_transport *t) -{ - struct dst_entry *dst = t->dst; - - if (dst && dst->obsolete && dst->ops->check(dst, 0) == NULL) { - dst_release(t->dst); - t->dst = NULL; - return NULL; - } - - return dst; -} - void sctp_transport_update_pmtu(struct sctp_transport *t, u32 pmtu) { struct dst_entry *dst; diff --git a/trunk/net/sunrpc/auth_gss/gss_mech_switch.c b/trunk/net/sunrpc/auth_gss/gss_mech_switch.c index ca8cad8251c7..782bfe1b6465 100644 --- a/trunk/net/sunrpc/auth_gss/gss_mech_switch.c +++ b/trunk/net/sunrpc/auth_gss/gss_mech_switch.c @@ -242,12 +242,13 @@ EXPORT_SYMBOL_GPL(gss_mech_get_by_pseudoflavor); int gss_mech_list_pseudoflavors(rpc_authflavor_t *array_ptr) { struct gss_api_mech *pos = NULL; - int i = 0; + int j, i = 0; spin_lock(®istered_mechs_lock); list_for_each_entry(pos, ®istered_mechs, gm_list) { - array_ptr[i] = pos->gm_pfs->pseudoflavor; - i++; + for (j=0; j < pos->gm_pf_num; j++) { + array_ptr[i++] = pos->gm_pfs[j].pseudoflavor; + } } spin_unlock(®istered_mechs_lock); return i; diff --git a/trunk/sound/pci/echoaudio/echoaudio_dsp.c b/trunk/sound/pci/echoaudio/echoaudio_dsp.c index 64417a733220..d8c670c9d62c 100644 --- a/trunk/sound/pci/echoaudio/echoaudio_dsp.c +++ b/trunk/sound/pci/echoaudio/echoaudio_dsp.c @@ -475,7 +475,7 @@ static int load_firmware(struct echoaudio *chip) const struct firmware *fw; int box_type, err; - if (snd_BUG_ON(!chip->dsp_code_to_load || !chip->comm_page)) + if (snd_BUG_ON(!chip->comm_page)) return -EPERM; /* See if the ASIC is present and working - only if the DSP is already loaded */ diff --git a/trunk/sound/pci/hda/hda_codec.c b/trunk/sound/pci/hda/hda_codec.c index 7a8fcc4c15f8..841475cc13b6 100644 --- a/trunk/sound/pci/hda/hda_codec.c +++ b/trunk/sound/pci/hda/hda_codec.c @@ -5444,10 +5444,6 @@ int snd_hda_suspend(struct hda_bus *bus) list_for_each_entry(codec, &bus->codec_list, list) { if (hda_codec_is_power_on(codec)) hda_call_codec_suspend(codec); - else /* forcibly change the power to D3 even if not used */ - hda_set_power_state(codec, - codec->afg ? codec->afg : codec->mfg, - AC_PWRST_D3); if (codec->patch_ops.post_suspend) codec->patch_ops.post_suspend(codec); } diff --git a/trunk/sound/pci/hda/hda_intel.c b/trunk/sound/pci/hda/hda_intel.c index c19e71a94e1b..1f350522bed4 100644 --- a/trunk/sound/pci/hda/hda_intel.c +++ b/trunk/sound/pci/hda/hda_intel.c @@ -783,11 +783,13 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus, { struct azx *chip = bus->private_data; unsigned long timeout; + unsigned long loopcounter; int do_poll = 0; again: timeout = jiffies + msecs_to_jiffies(1000); - for (;;) { + + for (loopcounter = 0;; loopcounter++) { if (chip->polling_mode || do_poll) { spin_lock_irq(&chip->reg_lock); azx_update_rirb(chip); @@ -803,7 +805,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus, } if (time_after(jiffies, timeout)) break; - if (bus->needs_damn_long_delay) + if (bus->needs_damn_long_delay || loopcounter > 3000) msleep(2); /* temporary workaround */ else { udelay(10); @@ -2351,6 +2353,17 @@ static void azx_power_notify(struct hda_bus *bus) * power management */ +static int snd_hda_codecs_inuse(struct hda_bus *bus) +{ + struct hda_codec *codec; + + list_for_each_entry(codec, &bus->codec_list, list) { + if (snd_hda_codec_needs_resume(codec)) + return 1; + } + return 0; +} + static int azx_suspend(struct pci_dev *pci, pm_message_t state) { struct snd_card *card = pci_get_drvdata(pci); @@ -2397,7 +2410,8 @@ static int azx_resume(struct pci_dev *pci) return -EIO; azx_init_pci(chip); - azx_init_chip(chip, 1); + if (snd_hda_codecs_inuse(chip->bus)) + azx_init_chip(chip, 1); snd_hda_resume(chip->bus); snd_power_change_state(card, SNDRV_CTL_POWER_D0); diff --git a/trunk/sound/pci/hda/patch_realtek.c b/trunk/sound/pci/hda/patch_realtek.c index 818f90bc7d57..7810913d07a0 100644 --- a/trunk/sound/pci/hda/patch_realtek.c +++ b/trunk/sound/pci/hda/patch_realtek.c @@ -5405,6 +5405,8 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { SND_PCI_QUIRK(0x1025, 0x0142, "Acer Aspire 7730G", ALC882_FIXUP_ACER_ASPIRE_4930G), SND_PCI_QUIRK(0x1025, 0x0155, "Packard-Bell M5120", ALC882_FIXUP_PB_M5210), + SND_PCI_QUIRK(0x1025, 0x021e, "Acer Aspire 5739G", + ALC882_FIXUP_ACER_ASPIRE_4930G), SND_PCI_QUIRK(0x1025, 0x0259, "Acer Aspire 5935", ALC889_FIXUP_DAC_ROUTE), SND_PCI_QUIRK(0x1025, 0x026b, "Acer Aspire 8940G", ALC882_FIXUP_ACER_ASPIRE_8930G), SND_PCI_QUIRK(0x1025, 0x0296, "Acer Aspire 7736z", ALC882_FIXUP_ACER_ASPIRE_7736), @@ -5438,6 +5440,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { SND_PCI_QUIRK(0x106b, 0x4a00, "Macbook 5,2", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x1071, 0x8258, "Evesham Voyaeger", ALC882_FIXUP_EAPD), + SND_PCI_QUIRK(0x1462, 0x7350, "MSI-7350", ALC889_FIXUP_CD), SND_PCI_QUIRK_VENDOR(0x1462, "MSI", ALC882_FIXUP_GPIO3), SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3", ALC889_FIXUP_CD), SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", ALC882_FIXUP_ABIT_AW9D_MAX), @@ -5638,13 +5641,13 @@ static int patch_alc262(struct hda_codec *codec) snd_hda_codec_write(codec, 0x1a, 0, AC_VERB_SET_PROC_COEF, tmp | 0x80); } #endif - alc_auto_parse_customize_define(codec); - alc_fix_pll_init(codec, 0x20, 0x0a, 10); alc_pick_fixup(codec, NULL, alc262_fixup_tbl, alc262_fixups); alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + alc_auto_parse_customize_define(codec); + /* automatic parse from the BIOS config */ err = alc262_parse_auto_config(codec); if (err < 0) @@ -6249,8 +6252,6 @@ static int patch_alc269(struct hda_codec *codec) spec->mixer_nid = 0x0b; - alc_auto_parse_customize_define(codec); - err = alc_codec_rename_from_preset(codec); if (err < 0) goto error; @@ -6283,6 +6284,8 @@ static int patch_alc269(struct hda_codec *codec) alc269_fixup_tbl, alc269_fixups); alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + alc_auto_parse_customize_define(codec); + /* automatic parse from the BIOS config */ err = alc269_parse_auto_config(codec); if (err < 0) @@ -6859,8 +6862,6 @@ static int patch_alc662(struct hda_codec *codec) /* handle multiple HPs as is */ spec->parse_flags = HDA_PINCFG_NO_HP_FIXUP; - alc_auto_parse_customize_define(codec); - alc_fix_pll_init(codec, 0x20, 0x04, 15); err = alc_codec_rename_from_preset(codec); @@ -6877,6 +6878,9 @@ static int patch_alc662(struct hda_codec *codec) alc_pick_fixup(codec, alc662_fixup_models, alc662_fixup_tbl, alc662_fixups); alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + + alc_auto_parse_customize_define(codec); + /* automatic parse from the BIOS config */ err = alc662_parse_auto_config(codec); if (err < 0) diff --git a/trunk/sound/pci/hda/patch_sigmatel.c b/trunk/sound/pci/hda/patch_sigmatel.c index 4742cac26aa9..2cb1e08f962a 100644 --- a/trunk/sound/pci/hda/patch_sigmatel.c +++ b/trunk/sound/pci/hda/patch_sigmatel.c @@ -4415,9 +4415,9 @@ static int stac92xx_init(struct hda_codec *codec) def_conf = get_defcfg_connect(def_conf); /* skip any ports that don't have jacks since presence * detection is useless */ - if (def_conf != AC_JACK_PORT_COMPLEX) { - if (def_conf != AC_JACK_PORT_NONE) - stac_toggle_power_map(codec, nid, 1); + if (def_conf != AC_JACK_PORT_NONE && + !is_jack_detectable(codec, nid)) { + stac_toggle_power_map(codec, nid, 1); continue; } if (enable_pin_detect(codec, nid, STAC_PWR_EVENT)) { diff --git a/trunk/sound/pci/rme9652/hdsp.c b/trunk/sound/pci/rme9652/hdsp.c index b68cdec03b9e..0b2aea2ce172 100644 --- a/trunk/sound/pci/rme9652/hdsp.c +++ b/trunk/sound/pci/rme9652/hdsp.c @@ -5170,6 +5170,7 @@ static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp) strcpy(hw->name, "HDSP hwdep interface"); hw->ops.ioctl = snd_hdsp_hwdep_ioctl; + hw->ops.ioctl_compat = snd_hdsp_hwdep_ioctl; return 0; } diff --git a/trunk/sound/soc/codecs/cs42l73.c b/trunk/sound/soc/codecs/cs42l73.c index 07c44b71f096..3686417f5ea5 100644 --- a/trunk/sound/soc/codecs/cs42l73.c +++ b/trunk/sound/soc/codecs/cs42l73.c @@ -568,22 +568,22 @@ static const struct snd_kcontrol_new cs42l73_snd_controls[] = { attn_tlv), SOC_SINGLE_TLV("SPK-IP Mono Volume", - CS42L73_SPKMIPMA, 0, 0x3E, 1, attn_tlv), + CS42L73_SPKMIPMA, 0, 0x3F, 1, attn_tlv), SOC_SINGLE_TLV("SPK-XSP Mono Volume", - CS42L73_SPKMXSPA, 0, 0x3E, 1, attn_tlv), + CS42L73_SPKMXSPA, 0, 0x3F, 1, attn_tlv), SOC_SINGLE_TLV("SPK-ASP Mono Volume", - CS42L73_SPKMASPA, 0, 0x3E, 1, attn_tlv), + CS42L73_SPKMASPA, 0, 0x3F, 1, attn_tlv), SOC_SINGLE_TLV("SPK-VSP Mono Volume", - CS42L73_SPKMVSPMA, 0, 0x3E, 1, attn_tlv), + CS42L73_SPKMVSPMA, 0, 0x3F, 1, attn_tlv), SOC_SINGLE_TLV("ESL-IP Mono Volume", - CS42L73_ESLMIPMA, 0, 0x3E, 1, attn_tlv), + CS42L73_ESLMIPMA, 0, 0x3F, 1, attn_tlv), SOC_SINGLE_TLV("ESL-XSP Mono Volume", - CS42L73_ESLMXSPA, 0, 0x3E, 1, attn_tlv), + CS42L73_ESLMXSPA, 0, 0x3F, 1, attn_tlv), SOC_SINGLE_TLV("ESL-ASP Mono Volume", - CS42L73_ESLMASPA, 0, 0x3E, 1, attn_tlv), + CS42L73_ESLMASPA, 0, 0x3F, 1, attn_tlv), SOC_SINGLE_TLV("ESL-VSP Mono Volume", - CS42L73_ESLMVSPMA, 0, 0x3E, 1, attn_tlv), + CS42L73_ESLMVSPMA, 0, 0x3F, 1, attn_tlv), SOC_ENUM("IP Digital Swap/Mono Select", ip_swap_enum), diff --git a/trunk/sound/soc/codecs/wm8994.c b/trunk/sound/soc/codecs/wm8994.c index 6c1fe3afd4b5..2de12ebe43b5 100644 --- a/trunk/sound/soc/codecs/wm8994.c +++ b/trunk/sound/soc/codecs/wm8994.c @@ -1144,7 +1144,7 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w, snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA, 0); - snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, + snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_4, WM8994_AIF2ADCL_ENA | WM8994_AIF2ADCR_ENA, 0); diff --git a/trunk/sound/soc/sh/migor.c b/trunk/sound/soc/sh/migor.c index 9d9ad8d61c0a..8526e1edaf45 100644 --- a/trunk/sound/soc/sh/migor.c +++ b/trunk/sound/soc/sh/migor.c @@ -35,7 +35,7 @@ static unsigned long siumckb_recalc(struct clk *clk) return codec_freq; } -static struct clk_ops siumckb_clk_ops = { +static struct sh_clk_ops siumckb_clk_ops = { .recalc = siumckb_recalc, }; diff --git a/trunk/tools/perf/Makefile b/trunk/tools/perf/Makefile index 9bf3fc759344..92271d32bc30 100644 --- a/trunk/tools/perf/Makefile +++ b/trunk/tools/perf/Makefile @@ -774,10 +774,10 @@ $(OUTPUT)perf.o perf.spec \ # over the general rule for .o $(OUTPUT)util/%-flex.o: $(OUTPUT)util/%-flex.c $(OUTPUT)PERF-CFLAGS - $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) -Iutil/ -Wno-redundant-decls -Wno-switch-default -Wno-unused-function $< + $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) -Iutil/ -w $< $(OUTPUT)util/%-bison.o: $(OUTPUT)util/%-bison.c $(OUTPUT)PERF-CFLAGS - $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) -DYYENABLE_NLS=0 -DYYLTYPE_IS_TRIVIAL=0 -Iutil/ -Wno-redundant-decls -Wno-switch-default -Wno-unused-function $< + $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) -DYYENABLE_NLS=0 -DYYLTYPE_IS_TRIVIAL=0 -Iutil/ -w $< $(OUTPUT)%.o: %.c $(OUTPUT)PERF-CFLAGS $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $< diff --git a/trunk/tools/perf/builtin-stat.c b/trunk/tools/perf/builtin-stat.c index c941bb640f49..1e5e9b270f5e 100644 --- a/trunk/tools/perf/builtin-stat.c +++ b/trunk/tools/perf/builtin-stat.c @@ -283,6 +283,8 @@ static int create_perf_stat_counter(struct perf_evsel *evsel, { struct perf_event_attr *attr = &evsel->attr; struct xyarray *group_fd = NULL; + bool exclude_guest_missing = false; + int ret; if (group && evsel != first) group_fd = first->fd; @@ -293,16 +295,39 @@ static int create_perf_stat_counter(struct perf_evsel *evsel, attr->inherit = !no_inherit; - if (system_wide) - return perf_evsel__open_per_cpu(evsel, evsel_list->cpus, +retry: + if (exclude_guest_missing) + evsel->attr.exclude_guest = evsel->attr.exclude_host = 0; + + if (system_wide) { + ret = perf_evsel__open_per_cpu(evsel, evsel_list->cpus, group, group_fd); + if (ret) + goto check_ret; + return 0; + } + if (!target_pid && !target_tid && (!group || evsel == first)) { attr->disabled = 1; attr->enable_on_exec = 1; } - return perf_evsel__open_per_thread(evsel, evsel_list->threads, - group, group_fd); + ret = perf_evsel__open_per_thread(evsel, evsel_list->threads, + group, group_fd); + if (!ret) + return 0; + /* fall through */ +check_ret: + if (ret && errno == EINVAL) { + if (!exclude_guest_missing && + (evsel->attr.exclude_guest || evsel->attr.exclude_host)) { + pr_debug("Old kernel, cannot exclude " + "guest or host samples.\n"); + exclude_guest_missing = true; + goto retry; + } + } + return ret; } /* @@ -463,8 +488,13 @@ static int run_perf_stat(int argc __used, const char **argv) list_for_each_entry(counter, &evsel_list->entries, node) { if (create_perf_stat_counter(counter, first) < 0) { + /* + * PPC returns ENXIO for HW counters until 2.6.37 + * (behavior changed with commit b0a873e). + */ if (errno == EINVAL || errno == ENOSYS || - errno == ENOENT || errno == EOPNOTSUPP) { + errno == ENOENT || errno == EOPNOTSUPP || + errno == ENXIO) { if (verbose) ui__warning("%s event is not supported by the kernel.\n", event_name(counter)); diff --git a/trunk/tools/perf/util/header.c b/trunk/tools/perf/util/header.c index 4c7c2d73251f..c0b70c697a36 100644 --- a/trunk/tools/perf/util/header.c +++ b/trunk/tools/perf/util/header.c @@ -296,7 +296,7 @@ int build_id_cache__add_s(const char *sbuild_id, const char *debugdir, if (mkdir_p(filename, 0755)) goto out_free; - snprintf(filename + len, sizeof(filename) - len, "/%s", sbuild_id); + snprintf(filename + len, size - len, "/%s", sbuild_id); if (access(filename, F_OK)) { if (is_kallsyms) {