From d4c3d4b2b1ed34b9402093331259d8602a1db6d9 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 25 Jan 2013 22:44:17 +0000 Subject: [PATCH] --- yaml --- r: 374169 b: refs/heads/master c: f5fa4098c3fcc0e504fbc0682dccd331dbbcf197 h: refs/heads/master i: 374167: b4979eda9930cc166cc969e6bcffe73bbcd3d9f9 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-at91/cpuidle.c | 2 ++ trunk/arch/arm/mach-at91/pm.c | 2 ++ trunk/arch/arm/mach-at91/pm.h | 30 ++++++++++++++++++++++++------ 4 files changed, 29 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index 10cdec186db6..5af80a792839 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 13ab6aeb49663b0ca0f0eed3560fbaecacf4858f +refs/heads/master: f5fa4098c3fcc0e504fbc0682dccd331dbbcf197 diff --git a/trunk/arch/arm/mach-at91/cpuidle.c b/trunk/arch/arm/mach-at91/cpuidle.c index 0c6381516a5a..4c6794603780 100644 --- a/trunk/arch/arm/mach-at91/cpuidle.c +++ b/trunk/arch/arm/mach-at91/cpuidle.c @@ -38,6 +38,8 @@ static int at91_enter_idle(struct cpuidle_device *dev, at91rm9200_standby(); else if (cpu_is_at91sam9g45()) at91sam9g45_standby(); + else if (cpu_is_at91sam9263()) + at91sam9263_standby(); else at91sam9_standby(); diff --git a/trunk/arch/arm/mach-at91/pm.c b/trunk/arch/arm/mach-at91/pm.c index adb6db888a1f..b8017c1a864d 100644 --- a/trunk/arch/arm/mach-at91/pm.c +++ b/trunk/arch/arm/mach-at91/pm.c @@ -267,6 +267,8 @@ static int at91_pm_enter(suspend_state_t state) at91rm9200_standby(); else if (cpu_is_at91sam9g45()) at91sam9g45_standby(); + else if (cpu_is_at91sam9263()) + at91sam9263_standby(); else at91sam9_standby(); break; diff --git a/trunk/arch/arm/mach-at91/pm.h b/trunk/arch/arm/mach-at91/pm.h index 38f467c6b710..2f5908f0b8c5 100644 --- a/trunk/arch/arm/mach-at91/pm.h +++ b/trunk/arch/arm/mach-at91/pm.h @@ -70,13 +70,31 @@ static inline void at91sam9g45_standby(void) at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); } -#ifdef CONFIG_SOC_AT91SAM9263 -/* - * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; - * handle those cases both here and in the Suspend-To-RAM support. +/* We manage both DDRAM/SDRAM controllers, we need more than one value to + * remember. */ -#warning Assuming EB1 SDRAM controller is *NOT* used -#endif +static inline void at91sam9263_standby(void) +{ + u32 lpr0, lpr1; + u32 saved_lpr0, saved_lpr1; + + saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR); + lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB; + lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH; + + saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR); + lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB; + lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH; + + /* self-refresh mode now */ + at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0); + at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1); + + cpu_do_idle(); + + at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0); + at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1); +} static inline void at91sam9_standby(void) {