From d4c9da857381dca0c9f2d1b42c2724cc4e316923 Mon Sep 17 00:00:00 2001
From: Daniel Cotey <puff65537@bansheeslibrary.com>
Date: Sat, 15 Sep 2012 06:05:51 -0700
Subject: [PATCH] --- yaml --- r: 325335 b: refs/heads/master c:
 97ef0a461ba82cb641ae53314997ce44161b749a h: refs/heads/master i:   325333:
 ac0559c278c0564ce477e4a4e42b8418208699a7   325331:
 38a73fb19f519348d3695fdb9a6dc1ed8ce2fab9   325327:
 a3ea5716a47332ad798a25c243b8757a40056954 v: v3

---
 [refs]                                 |  2 +-
 trunk/drivers/staging/silicom/bp_mod.h | 32 +++++++++++++-------------
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/[refs] b/[refs]
index 814a2c4e5501..0a9080b18307 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: fab85699f34293f3914f561ff6e50a2f69717cab
+refs/heads/master: 97ef0a461ba82cb641ae53314997ce44161b749a
diff --git a/trunk/drivers/staging/silicom/bp_mod.h b/trunk/drivers/staging/silicom/bp_mod.h
index 3a97b2d483e9..2862c5790c28 100644
--- a/trunk/drivers/staging/silicom/bp_mod.h
+++ b/trunk/drivers/staging/silicom/bp_mod.h
@@ -445,22 +445,22 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j)
 	 (pid == SILICOM_PE2G4BPFi35ZX_SSID))
 
 #define PEGF80_IF_SERIES(pid) \
-((pid==SILICOM_PE2G4BPFi80_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80LX_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35ZX_SSID))
+	((pid == SILICOM_PE2G4BPFi80_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi80LX_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+	 (pid == SILICOM_M1E2G4BPFi80_SSID) || \
+	 (pid == SILICOM_M1E2G4BPFi80LX_SSID) || \
+	 (pid == SILICOM_M1E2G4BPFi80ZX_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi80_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi80LX_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi80ZX_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi35_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi35LX_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi35ZX_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi35_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi35LX_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi35ZX_SSID))
 
 #define BP10G9_IF_SERIES(pid) \
 ((pid==INTEL_PE210G2SPI9_SSID)|| \