From d54f6c226d7264524a7bd0fe09ac51210f2452b7 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Tue, 18 Nov 2008 18:04:31 +0800 Subject: [PATCH] --- yaml --- r: 127067 b: refs/heads/master c: a5f0717e51c5fe6cdaf885b7f621ba48ae745bfb h: refs/heads/master i: 127065: 9439b60192de4079e5af2a11cd05b0b173db5bcb 127063: f640b9308641a93bf84fddb595f85470b7be7208 v: v3 --- [refs] | 2 +- trunk/arch/blackfin/kernel/setup.c | 7 ++++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index b7670a8b5e84..6e8b1651826a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8eb3e3bfd5544c4549a52e3cfc3df2be0b224dbd +refs/heads/master: a5f0717e51c5fe6cdaf885b7f621ba48ae745bfb diff --git a/trunk/arch/blackfin/kernel/setup.c b/trunk/arch/blackfin/kernel/setup.c index c644d234a02e..0a5436737e97 100644 --- a/trunk/arch/blackfin/kernel/setup.c +++ b/trunk/arch/blackfin/kernel/setup.c @@ -1032,7 +1032,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) char *cpu, *mmu, *fpu, *vendor, *cache; uint32_t revid; - u_long sclk = 0; + u_long sclk, cclk; u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0; struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, *(unsigned int *)v); @@ -1042,6 +1042,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) revid = bfin_revid(); sclk = get_sclk(); + cclk = get_cclk(); switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) { case 0xca: @@ -1063,7 +1064,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n" "stepping\t: %d\n", - cpu, cpudata->cclk/1000000, sclk/1000000, + cpu, cclk/1000000, sclk/1000000, #ifdef CONFIG_MPU "mpu on", #else @@ -1072,7 +1073,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) revid); seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n", - cpudata->cclk/1000000, cpudata->cclk%1000000, + cclk/1000000, cclk%1000000, sclk/1000000, sclk%1000000); seq_printf(m, "bogomips\t: %lu.%02lu\n" "Calibration\t: %lu loops\n",