From d59e9a2a3713b48afd41afd10871e09d336c067f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 4 Feb 2010 11:42:24 +0100 Subject: [PATCH] --- yaml --- r: 188367 b: refs/heads/master c: 137d0795a72786fa33e6900cb2ac2eae81f4b6ee h: refs/heads/master i: 188365: 9fa8b33ba019e5afd309e7c88fd60669d9f81bc2 188363: 170b3c2e7715f32b782f59938ac71a967fe3321b 188359: 4c8513b66e33f23fd36574be26843c7ad893b1e2 188351: b265c99e1fe9e40caaffb0022da9531ead3f1b8d v: v3 --- [refs] | 2 +- trunk/arch/microblaze/kernel/head.S | 13 +++++++------ 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index 677cb0801f7a..579e101a20e3 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d79f3b06a9e40b382bd5d5ae8dea9b3210eda9ce +refs/heads/master: 137d0795a72786fa33e6900cb2ac2eae81f4b6ee diff --git a/trunk/arch/microblaze/kernel/head.S b/trunk/arch/microblaze/kernel/head.S index 30916193fcc7..cb7815cfe5ab 100644 --- a/trunk/arch/microblaze/kernel/head.S +++ b/trunk/arch/microblaze/kernel/head.S @@ -99,8 +99,8 @@ no_fdt_arg: tophys(r4,r4) /* convert to phys address */ ori r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */ _copy_command_line: - lbu r7, r5, r6 /* r7=r5+r6 - r5 contain pointer to command line */ - sb r7, r4, r6 /* addr[r4+r6]= r7*/ + lbu r2, r5, r6 /* r7=r5+r6 - r5 contain pointer to command line */ + sb r2, r4, r6 /* addr[r4+r6]= r7*/ addik r6, r6, 1 /* increment counting */ bgtid r3, _copy_command_line /* loop for all entries */ addik r3, r3, -1 /* descrement loop */ @@ -136,6 +136,11 @@ _invalidate: addik r3, r3, -1 /* sync */ + /* Setup the kernel PID */ + mts rpid,r0 /* Load the kernel PID */ + nop + bri 4 + /* * We should still be executing code at physical address area * RAM_BASEADDR at this point. However, kernel code is at @@ -146,10 +151,6 @@ _invalidate: addik r3,r0, CONFIG_KERNEL_START /* Load the kernel virtual address */ tophys(r4,r3) /* Load the kernel physical address */ - mts rpid,r0 /* Load the kernel PID */ - nop - bri 4 - /* * Configure and load two entries into TLB slots 0 and 1. * In case we are pinning TLBs, these are reserved in by the