From d683b168466c62cbf1f6d3c65adb2c2da01bb5de Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Tue, 31 Jul 2007 01:28:33 -0700 Subject: [PATCH] --- yaml --- r: 63382 b: refs/heads/master c: e5071b5493b1dcfa98a6e8a75f56997f6d4a0c25 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/include/asm-sparc64/dma-mapping.h | 7 +++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 95a540c42418..97e68a59de90 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 76fcdb30ae1cb28e438e5ffd4db5f49ea3d96cd7 +refs/heads/master: e5071b5493b1dcfa98a6e8a75f56997f6d4a0c25 diff --git a/trunk/include/asm-sparc64/dma-mapping.h b/trunk/include/asm-sparc64/dma-mapping.h index 0a1006692bb2..a72a5f271f31 100644 --- a/trunk/include/asm-sparc64/dma-mapping.h +++ b/trunk/include/asm-sparc64/dma-mapping.h @@ -127,6 +127,13 @@ static inline int dma_mapping_error(dma_addr_t dma_addr) return (dma_addr == DMA_ERROR_CODE); } +static inline int dma_get_cache_alignment(void) +{ + /* no easy way to get cache size on all processors, so return + * the maximum possible, to be safe */ + return (1 << INTERNODE_CACHE_SHIFT); +} + #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #define dma_is_consistent(d, h) (1)