From d695cdaeb4e7452247ba7995f9960026e8e18c2b Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 17 May 2011 10:39:22 +0000 Subject: [PATCH] --- yaml --- r: 251349 b: refs/heads/master c: 6776fba7e272ab236c789d58f290495d42684fe3 h: refs/heads/master i: 251347: c69255b45cd1f2dc74a1dff9b2bed07ad01f3544 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-shmobile/clock-sh7372.c | 12 ++++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 48a3a532ada0..6ba8a4e2b5f6 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a63666c146f85a5ddcc3b2443d7c5888490e66b2 +refs/heads/master: 6776fba7e272ab236c789d58f290495d42684fe3 diff --git a/trunk/arch/arm/mach-shmobile/clock-sh7372.c b/trunk/arch/arm/mach-shmobile/clock-sh7372.c index fbca92cc530a..95b814aac556 100644 --- a/trunk/arch/arm/mach-shmobile/clock-sh7372.c +++ b/trunk/arch/arm/mach-shmobile/clock-sh7372.c @@ -44,6 +44,11 @@ #define DSI1PCKCR 0xe6150098 #define PLLC01CR 0xe6150028 #define PLLC2CR 0xe615002c +#define RMSTPCR0 0xe6150110 +#define RMSTPCR1 0xe6150114 +#define RMSTPCR2 0xe6150118 +#define RMSTPCR3 0xe615011c +#define RMSTPCR4 0xe6150120 #define SMSTPCR0 0xe6150130 #define SMSTPCR1 0xe6150134 #define SMSTPCR2 0xe6150138 @@ -654,6 +659,13 @@ void __init sh7372_clock_init(void) { int k, ret = 0; + /* make sure MSTP bits on the RT/SH4AL-DSP side are off */ + __raw_writel(0xe4ef8087, RMSTPCR0); + __raw_writel(0xffffffff, RMSTPCR1); + __raw_writel(0x37c7f7ff, RMSTPCR2); + __raw_writel(0xffffffff, RMSTPCR3); + __raw_writel(0xffe0fffd, RMSTPCR4); + for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) ret = clk_register(main_clks[k]);