From d6c49a529e30e47da7480a7a8e731e35f3689ccd Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=
 <ukleinek@informatik.uni-freiburg.de>
Date: Wed, 28 Mar 2007 17:54:22 +0100
Subject: [PATCH] --- yaml --- r: 54017 b: refs/heads/master c:
 940089e007e8ed33295ef408b39a53e5ad518ebd h: refs/heads/master i:   54015:
 c905af7772ae3fbc1778e9c572dc01195c6c3a71 v: v3

---
 [refs]                                       | 2 +-
 trunk/include/asm-arm/arch-ns9xxx/regs-sys.h | 6 ++++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 20615eaad3e5..3902be91cf4d 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: fee64d1b55af57d7dba41f554769db83d7a32fde
+refs/heads/master: 940089e007e8ed33295ef408b39a53e5ad518ebd
diff --git a/trunk/include/asm-arm/arch-ns9xxx/regs-sys.h b/trunk/include/asm-arm/arch-ns9xxx/regs-sys.h
index 8162a50bb273..a42546aeb92a 100644
--- a/trunk/include/asm-arm/arch-ns9xxx/regs-sys.h
+++ b/trunk/include/asm-arm/arch-ns9xxx/regs-sys.h
@@ -48,6 +48,12 @@
 /* PLL Configuration register */
 #define SYS_PLL		__REG(0xa0900188)
 
+/* PLL FS status */
+#define SYS_PLL_FS		__REGBITS(24, 23)
+
+/* PLL ND status */
+#define SYS_PLL_ND		__REGBITS(20, 16)
+
 /* PLL Configuration register: PLL SW change */
 #define SYS_PLL_SWC		__REGBIT(15)
 #define SYS_PLL_SWC_NO			__REGVAL(SYS_PLL_SWC, 0)