diff --git a/[refs] b/[refs] index ab6e0b1971ae..31140e18e225 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 932323b74e2535dbb6a1b245dfa1aa8cd2bbd8e2 +refs/heads/master: 1004689cd9ece7f613b48d351c6f00b7aec1bae3 diff --git a/trunk/drivers/staging/Kconfig b/trunk/drivers/staging/Kconfig index e12f5a3684e3..08d279f8816e 100644 --- a/trunk/drivers/staging/Kconfig +++ b/trunk/drivers/staging/Kconfig @@ -136,4 +136,6 @@ source "drivers/staging/omap-thermal/Kconfig" source "drivers/staging/ramster/Kconfig" +source "drivers/staging/silicom/Kconfig" + endif # STAGING diff --git a/trunk/drivers/staging/Makefile b/trunk/drivers/staging/Makefile index ce4283205e85..0f04a28c8892 100644 --- a/trunk/drivers/staging/Makefile +++ b/trunk/drivers/staging/Makefile @@ -60,3 +60,4 @@ obj-$(CONFIG_WIMAX_GDM72XX) += gdm72xx/ obj-$(CONFIG_CSR_WIFI) += csr/ obj-$(CONFIG_OMAP_BANDGAP) += omap-thermal/ obj-$(CONFIG_ZCACHE2) += ramster/ +obj-$(CONFIG_NET_VENDOR_SILICOM) += silicom/ diff --git a/trunk/drivers/staging/ccg/Kconfig b/trunk/drivers/staging/ccg/Kconfig index 1f00d701da25..8598111eb0b1 100644 --- a/trunk/drivers/staging/ccg/Kconfig +++ b/trunk/drivers/staging/ccg/Kconfig @@ -2,7 +2,7 @@ if USB_GADGET config USB_G_CCG tristate "Configurable Composite Gadget (STAGING)" - depends on STAGING && BLOCK && !USB_ZERO && !USB_ZERO_HNPTEST && !USB_AUDIO && !GADGET_UAC1 && !USB_ETH && !USB_ETH_RNDIS && !USB_ETH_EEM && !USB_G_NCM && !USB_GADGETFS && !USB_FUNCTIONFS && !USB_FUNCTIONFS_ETH && !USB_FUNCTIONFS_RNDIS && !USB_FUNCTIONFS_GENERIC && !USB_FILE_STORAGE && !USB_FILE_STORAGE_TEST && !USB_MASS_STORAGE && !USB_G_SERIAL && !USB_MIDI_GADGET && !USB_G_PRINTER && !USB_CDC_COMPOSITE && !USB_G_NOKIA && !USB_G_ACM_MS && !USB_G_MULTI && !USB_G_MULTI_RNDIS && !USB_G_MULTI_CDC && !USB_G_HID && !USB_G_DBGP && !USB_G_WEBCAM + depends on STAGING && BLOCK && NET && !USB_ZERO && !USB_ZERO_HNPTEST && !USB_AUDIO && !GADGET_UAC1 && !USB_ETH && !USB_ETH_RNDIS && !USB_ETH_EEM && !USB_G_NCM && !USB_GADGETFS && !USB_FUNCTIONFS && !USB_FUNCTIONFS_ETH && !USB_FUNCTIONFS_RNDIS && !USB_FUNCTIONFS_GENERIC && !USB_FILE_STORAGE && !USB_FILE_STORAGE_TEST && !USB_MASS_STORAGE && !USB_G_SERIAL && !USB_MIDI_GADGET && !USB_G_PRINTER && !USB_CDC_COMPOSITE && !USB_G_NOKIA && !USB_G_ACM_MS && !USB_G_MULTI && !USB_G_MULTI_RNDIS && !USB_G_MULTI_CDC && !USB_G_HID && !USB_G_DBGP && !USB_G_WEBCAM help The Configurable Composite Gadget supports multiple USB functions: acm, mass storage, rndis and FunctionFS. diff --git a/trunk/drivers/staging/comedi/drivers/me4000.c b/trunk/drivers/staging/comedi/drivers/me4000.c index 050f0e416089..d7c5146b41e3 100644 --- a/trunk/drivers/staging/comedi/drivers/me4000.c +++ b/trunk/drivers/staging/comedi/drivers/me4000.c @@ -35,13 +35,7 @@ Status: broken (no support for loading firmware) - Digital I/O - Counter -Configuration Options: - - [0] - PCI bus number (optional) - [1] - PCI slot number (optional) - - If bus/slot is not specified, the first available PCI - device will be used. +Configuration Options: not applicable, uses PCI auto config The firmware required by these boards is available in the comedi_nonfree_firmware tarball available from @@ -58,51 +52,305 @@ broken. #include #include -#include "me4000.h" +#include "8253.h" + #if 0 /* file removed due to GPL incompatibility */ #include "me4000_fw.h" #endif -static const struct me4000_board me4000_boards[] = { - {"ME-4650", 0x4650, {0, 0}, {16, 0, 0, 0}, {4}, {0} }, - - {"ME-4660", 0x4660, {0, 0}, {32, 0, 16, 0}, {4}, {3} }, - {"ME-4660i", 0x4661, {0, 0}, {32, 0, 16, 0}, {4}, {3} }, - {"ME-4660s", 0x4662, {0, 0}, {32, 8, 16, 0}, {4}, {3} }, - {"ME-4660is", 0x4663, {0, 0}, {32, 8, 16, 0}, {4}, {3} }, +#define PCI_VENDOR_ID_MEILHAUS 0x1402 + +#define PCI_DEVICE_ID_MEILHAUS_ME4650 0x4650 +#define PCI_DEVICE_ID_MEILHAUS_ME4660 0x4660 +#define PCI_DEVICE_ID_MEILHAUS_ME4660I 0x4661 +#define PCI_DEVICE_ID_MEILHAUS_ME4660S 0x4662 +#define PCI_DEVICE_ID_MEILHAUS_ME4660IS 0x4663 +#define PCI_DEVICE_ID_MEILHAUS_ME4670 0x4670 +#define PCI_DEVICE_ID_MEILHAUS_ME4670I 0x4671 +#define PCI_DEVICE_ID_MEILHAUS_ME4670S 0x4672 +#define PCI_DEVICE_ID_MEILHAUS_ME4670IS 0x4673 +#define PCI_DEVICE_ID_MEILHAUS_ME4680 0x4680 +#define PCI_DEVICE_ID_MEILHAUS_ME4680I 0x4681 +#define PCI_DEVICE_ID_MEILHAUS_ME4680S 0x4682 +#define PCI_DEVICE_ID_MEILHAUS_ME4680IS 0x4683 - {"ME-4670", 0x4670, {4, 0}, {32, 0, 16, 1}, {4}, {3} }, - {"ME-4670i", 0x4671, {4, 0}, {32, 0, 16, 1}, {4}, {3} }, - {"ME-4670s", 0x4672, {4, 0}, {32, 8, 16, 1}, {4}, {3} }, - {"ME-4670is", 0x4673, {4, 0}, {32, 8, 16, 1}, {4}, {3} }, - - {"ME-4680", 0x4680, {4, 4}, {32, 0, 16, 1}, {4}, {3} }, - {"ME-4680i", 0x4681, {4, 4}, {32, 0, 16, 1}, {4}, {3} }, - {"ME-4680s", 0x4682, {4, 4}, {32, 8, 16, 1}, {4}, {3} }, - {"ME-4680is", 0x4683, {4, 4}, {32, 8, 16, 1}, {4}, {3} }, +/* + * ME4000 Register map and bit defines + */ +#define ME4000_AO_CHAN(x) ((x) * 0x18) + +#define ME4000_AO_CTRL_REG(x) (0x00 + ME4000_AO_CHAN(x)) +#define ME4000_AO_CTRL_BIT_MODE_0 (1 << 0) +#define ME4000_AO_CTRL_BIT_MODE_1 (1 << 1) +#define ME4000_AO_CTRL_MASK_MODE (3 << 0) +#define ME4000_AO_CTRL_BIT_STOP (1 << 2) +#define ME4000_AO_CTRL_BIT_ENABLE_FIFO (1 << 3) +#define ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG (1 << 4) +#define ME4000_AO_CTRL_BIT_EX_TRIG_EDGE (1 << 5) +#define ME4000_AO_CTRL_BIT_IMMEDIATE_STOP (1 << 7) +#define ME4000_AO_CTRL_BIT_ENABLE_DO (1 << 8) +#define ME4000_AO_CTRL_BIT_ENABLE_IRQ (1 << 9) +#define ME4000_AO_CTRL_BIT_RESET_IRQ (1 << 10) +#define ME4000_AO_STATUS_REG(x) (0x04 + ME4000_AO_CHAN(x)) +#define ME4000_AO_STATUS_BIT_FSM (1 << 0) +#define ME4000_AO_STATUS_BIT_FF (1 << 1) +#define ME4000_AO_STATUS_BIT_HF (1 << 2) +#define ME4000_AO_STATUS_BIT_EF (1 << 3) +#define ME4000_AO_FIFO_REG(x) (0x08 + ME4000_AO_CHAN(x)) +#define ME4000_AO_SINGLE_REG(x) (0x0c + ME4000_AO_CHAN(x)) +#define ME4000_AO_TIMER_REG(x) (0x10 + ME4000_AO_CHAN(x)) +#define ME4000_AI_CTRL_REG 0x74 +#define ME4000_AI_STATUS_REG 0x74 +#define ME4000_AI_CTRL_BIT_MODE_0 (1 << 0) +#define ME4000_AI_CTRL_BIT_MODE_1 (1 << 1) +#define ME4000_AI_CTRL_BIT_MODE_2 (1 << 2) +#define ME4000_AI_CTRL_BIT_SAMPLE_HOLD (1 << 3) +#define ME4000_AI_CTRL_BIT_IMMEDIATE_STOP (1 << 4) +#define ME4000_AI_CTRL_BIT_STOP (1 << 5) +#define ME4000_AI_CTRL_BIT_CHANNEL_FIFO (1 << 6) +#define ME4000_AI_CTRL_BIT_DATA_FIFO (1 << 7) +#define ME4000_AI_CTRL_BIT_FULLSCALE (1 << 8) +#define ME4000_AI_CTRL_BIT_OFFSET (1 << 9) +#define ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG (1 << 10) +#define ME4000_AI_CTRL_BIT_EX_TRIG (1 << 11) +#define ME4000_AI_CTRL_BIT_EX_TRIG_FALLING (1 << 12) +#define ME4000_AI_CTRL_BIT_EX_IRQ (1 << 13) +#define ME4000_AI_CTRL_BIT_EX_IRQ_RESET (1 << 14) +#define ME4000_AI_CTRL_BIT_LE_IRQ (1 << 15) +#define ME4000_AI_CTRL_BIT_LE_IRQ_RESET (1 << 16) +#define ME4000_AI_CTRL_BIT_HF_IRQ (1 << 17) +#define ME4000_AI_CTRL_BIT_HF_IRQ_RESET (1 << 18) +#define ME4000_AI_CTRL_BIT_SC_IRQ (1 << 19) +#define ME4000_AI_CTRL_BIT_SC_IRQ_RESET (1 << 20) +#define ME4000_AI_CTRL_BIT_SC_RELOAD (1 << 21) +#define ME4000_AI_STATUS_BIT_EF_CHANNEL (1 << 22) +#define ME4000_AI_STATUS_BIT_HF_CHANNEL (1 << 23) +#define ME4000_AI_STATUS_BIT_FF_CHANNEL (1 << 24) +#define ME4000_AI_STATUS_BIT_EF_DATA (1 << 25) +#define ME4000_AI_STATUS_BIT_HF_DATA (1 << 26) +#define ME4000_AI_STATUS_BIT_FF_DATA (1 << 27) +#define ME4000_AI_STATUS_BIT_LE (1 << 28) +#define ME4000_AI_STATUS_BIT_FSM (1 << 29) +#define ME4000_AI_CTRL_BIT_EX_TRIG_BOTH (1 << 31) +#define ME4000_AI_CHANNEL_LIST_REG 0x78 +#define ME4000_AI_LIST_INPUT_SINGLE_ENDED (0 << 5) +#define ME4000_AI_LIST_INPUT_DIFFERENTIAL (1 << 5) +#define ME4000_AI_LIST_RANGE_BIPOLAR_10 (0 << 6) +#define ME4000_AI_LIST_RANGE_BIPOLAR_2_5 (1 << 6) +#define ME4000_AI_LIST_RANGE_UNIPOLAR_10 (2 << 6) +#define ME4000_AI_LIST_RANGE_UNIPOLAR_2_5 (3 << 6) +#define ME4000_AI_LIST_LAST_ENTRY (1 << 8) +#define ME4000_AI_DATA_REG 0x7c +#define ME4000_AI_CHAN_TIMER_REG 0x80 +#define ME4000_AI_CHAN_PRE_TIMER_REG 0x84 +#define ME4000_AI_SCAN_TIMER_LOW_REG 0x88 +#define ME4000_AI_SCAN_TIMER_HIGH_REG 0x8c +#define ME4000_AI_SCAN_PRE_TIMER_LOW_REG 0x90 +#define ME4000_AI_SCAN_PRE_TIMER_HIGH_REG 0x94 +#define ME4000_AI_START_REG 0x98 +#define ME4000_IRQ_STATUS_REG 0x9c +#define ME4000_IRQ_STATUS_BIT_EX (1 << 0) +#define ME4000_IRQ_STATUS_BIT_LE (1 << 1) +#define ME4000_IRQ_STATUS_BIT_AI_HF (1 << 2) +#define ME4000_IRQ_STATUS_BIT_AO_0_HF (1 << 3) +#define ME4000_IRQ_STATUS_BIT_AO_1_HF (1 << 4) +#define ME4000_IRQ_STATUS_BIT_AO_2_HF (1 << 5) +#define ME4000_IRQ_STATUS_BIT_AO_3_HF (1 << 6) +#define ME4000_IRQ_STATUS_BIT_SC (1 << 7) +#define ME4000_DIO_PORT_0_REG 0xa0 +#define ME4000_DIO_PORT_1_REG 0xa4 +#define ME4000_DIO_PORT_2_REG 0xa8 +#define ME4000_DIO_PORT_3_REG 0xac +#define ME4000_DIO_DIR_REG 0xb0 +#define ME4000_AO_LOADSETREG_XX 0xb4 +#define ME4000_DIO_CTRL_REG 0xb8 +#define ME4000_DIO_CTRL_BIT_MODE_0 (1 << 0) +#define ME4000_DIO_CTRL_BIT_MODE_1 (1 << 1) +#define ME4000_DIO_CTRL_BIT_MODE_2 (1 << 2) +#define ME4000_DIO_CTRL_BIT_MODE_3 (1 << 3) +#define ME4000_DIO_CTRL_BIT_MODE_4 (1 << 4) +#define ME4000_DIO_CTRL_BIT_MODE_5 (1 << 5) +#define ME4000_DIO_CTRL_BIT_MODE_6 (1 << 6) +#define ME4000_DIO_CTRL_BIT_MODE_7 (1 << 7) +#define ME4000_DIO_CTRL_BIT_FUNCTION_0 (1 << 8) +#define ME4000_DIO_CTRL_BIT_FUNCTION_1 (1 << 9) +#define ME4000_DIO_CTRL_BIT_FIFO_HIGH_0 (1 << 10) +#define ME4000_DIO_CTRL_BIT_FIFO_HIGH_1 (1 << 11) +#define ME4000_DIO_CTRL_BIT_FIFO_HIGH_2 (1 << 12) +#define ME4000_DIO_CTRL_BIT_FIFO_HIGH_3 (1 << 13) +#define ME4000_AO_DEMUX_ADJUST_REG 0xbc +#define ME4000_AO_DEMUX_ADJUST_VALUE 0x4c +#define ME4000_AI_SAMPLE_COUNTER_REG 0xc0 - {0}, +/* + * PLX Register map and bit defines + */ +#define PLX_INTCSR 0x4c +#define PLX_INTCSR_LOCAL_INT1_EN (1 << 0) +#define PLX_INTCSR_LOCAL_INT1_POL (1 << 1) +#define PLX_INTCSR_LOCAL_INT1_STATE (1 << 2) +#define PLX_INTCSR_LOCAL_INT2_EN (1 << 3) +#define PLX_INTCSR_LOCAL_INT2_POL (1 << 4) +#define PLX_INTCSR_LOCAL_INT2_STATE (1 << 5) +#define PLX_INTCSR_PCI_INT_EN (1 << 6) +#define PLX_INTCSR_SOFT_INT (1 << 7) +#define PLX_ICR 0x50 +#define PLX_ICR_BIT_EEPROM_CLOCK_SET (1 << 24) +#define PLX_ICR_BIT_EEPROM_CHIP_SELECT (1 << 25) +#define PLX_ICR_BIT_EEPROM_WRITE (1 << 26) +#define PLX_ICR_BIT_EEPROM_READ (1 << 27) +#define PLX_ICR_BIT_EEPROM_VALID (1 << 28) +#define PLX_ICR_MASK_EEPROM (0x1f << 24) + +#define EEPROM_DELAY 1 + +#define ME4000_AI_FIFO_COUNT 2048 + +#define ME4000_AI_MIN_TICKS 66 +#define ME4000_AI_MIN_SAMPLE_TIME 2000 +#define ME4000_AI_BASE_FREQUENCY (unsigned int) 33E6 + +#define ME4000_AI_CHANNEL_LIST_COUNT 1024 + +struct me4000_info { + unsigned long plx_regbase; + unsigned long timer_regbase; + + unsigned int ao_readback[4]; }; -#define ME4000_BOARD_VERSIONS (ARRAY_SIZE(me4000_boards) - 1) - -/*----------------------------------------------------------------------------- - Meilhaus function prototypes - ---------------------------------------------------------------------------*/ -static int get_registers(struct comedi_device *dev, struct pci_dev *pci_dev_p); -static int init_board_info(struct comedi_device *dev, - struct pci_dev *pci_dev_p); -static int init_ao_context(struct comedi_device *dev); -static int init_ai_context(struct comedi_device *dev); -static int init_dio_context(struct comedi_device *dev); -static int init_cnt_context(struct comedi_device *dev); -static int xilinx_download(struct comedi_device *dev); -static int reset_board(struct comedi_device *dev); +struct me4000_board { + const char *name; + unsigned short device_id; + int ao_nchan; + int ao_fifo; + int ai_nchan; + int ai_diff_nchan; + int ai_sh_nchan; + int ex_trig_analog; + int dio_nchan; + int has_counter; +}; -static int ai_write_chanlist(struct comedi_device *dev, - struct comedi_subdevice *s, - struct comedi_cmd *cmd); +static const struct me4000_board me4000_boards[] = { + { + .name = "ME-4650", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4650, + .ai_nchan = 16, + .dio_nchan = 32, + }, { + .name = "ME-4660", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4660, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4660i", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4660I, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4660s", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4660S, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ai_sh_nchan = 8, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4660is", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4660IS, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ai_sh_nchan = 8, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4670", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4670, + .ao_nchan = 4, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ex_trig_analog = 1, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4670i", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4670I, + .ao_nchan = 4, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ex_trig_analog = 1, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4670s", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4670S, + .ao_nchan = 4, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ai_sh_nchan = 8, + .ex_trig_analog = 1, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4670is", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4670IS, + .ao_nchan = 4, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ai_sh_nchan = 8, + .ex_trig_analog = 1, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4680", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4680, + .ao_nchan = 4, + .ao_fifo = 4, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ex_trig_analog = 1, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4680i", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4680I, + .ao_nchan = 4, + .ao_fifo = 4, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ex_trig_analog = 1, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4680s", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4680S, + .ao_nchan = 4, + .ao_fifo = 4, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ai_sh_nchan = 8, + .ex_trig_analog = 1, + .dio_nchan = 32, + .has_counter = 1, + }, { + .name = "ME-4680is", + .device_id = PCI_DEVICE_ID_MEILHAUS_ME4680IS, + .ao_nchan = 4, + .ao_fifo = 4, + .ai_nchan = 32, + .ai_diff_nchan = 16, + .ai_sh_nchan = 8, + .ex_trig_analog = 1, + .dio_nchan = 32, + .has_counter = 1, + }, +}; static const struct comedi_lrange me4000_ai_range = { 4, @@ -114,380 +362,6 @@ static const struct comedi_lrange me4000_ai_range = { } }; -static const struct comedi_lrange me4000_ao_range = { - 1, - { - BIP_RANGE(10), - } -}; - -static int me4000_probe(struct comedi_device *dev, struct comedi_devconfig *it) -{ - struct pci_dev *pci_device = NULL; - int result, i; - struct me4000_board *board; - - /* Allocate private memory */ - if (alloc_private(dev, sizeof(struct me4000_info)) < 0) - return -ENOMEM; - - /* - * Probe the device to determine what device in the series it is. - */ - for_each_pci_dev(pci_device) { - if (pci_device->vendor == PCI_VENDOR_ID_MEILHAUS) { - for (i = 0; i < ME4000_BOARD_VERSIONS; i++) { - if (me4000_boards[i].device_id == - pci_device->device) { - /* - * Was a particular - * bus/slot requested? - */ - if ((it->options[0] != 0) - || (it->options[1] != 0)) { - /* - * Are we on the wrong - * bus/slot? - */ - if (pci_device->bus->number != - it->options[0] - || - PCI_SLOT(pci_device->devfn) - != it->options[1]) { - continue; - } - } - dev->board_ptr = me4000_boards + i; - board = - (struct me4000_board *) - dev->board_ptr; - info->pci_dev_p = pci_device; - goto found; - } - } - } - } - - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): " - "No supported board found (req. bus/slot : %d/%d)\n", - dev->minor, it->options[0], it->options[1]); - return -ENODEV; - -found: - - printk(KERN_INFO - "comedi%d: me4000: me4000_probe(): " - "Found %s at PCI bus %d, slot %d\n", - dev->minor, me4000_boards[i].name, pci_device->bus->number, - PCI_SLOT(pci_device->devfn)); - - /* Set data in device structure */ - dev->board_name = board->name; - - /* Enable PCI device and request regions */ - result = comedi_pci_enable(pci_device, dev->board_name); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): Cannot enable PCI " - "device and request I/O regions\n", dev->minor); - return result; - } - - /* Get the PCI base registers */ - result = get_registers(dev, pci_device); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): " - "Cannot get registers\n", dev->minor); - return result; - } - /* Initialize board info */ - result = init_board_info(dev, pci_device); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): " - "Cannot init baord info\n", dev->minor); - return result; - } - - /* Init analog output context */ - result = init_ao_context(dev); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): " - "Cannot init ao context\n", dev->minor); - return result; - } - - /* Init analog input context */ - result = init_ai_context(dev); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): " - "Cannot init ai context\n", dev->minor); - return result; - } - - /* Init digital I/O context */ - result = init_dio_context(dev); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): " - "Cannot init dio context\n", dev->minor); - return result; - } - - /* Init counter context */ - result = init_cnt_context(dev); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): " - "Cannot init cnt context\n", dev->minor); - return result; - } - - /* Download the xilinx firmware */ - result = xilinx_download(dev); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): " - "Can't download firmware\n", dev->minor); - return result; - } - - /* Make a hardware reset */ - result = reset_board(dev); - if (result) { - printk(KERN_ERR - "comedi%d: me4000: me4000_probe(): Can't reset board\n", - dev->minor); - return result; - } - - return 0; -} - -static int get_registers(struct comedi_device *dev, struct pci_dev *pci_dev_p) -{ - /*--------------------------- plx regbase -------------------------------*/ - - info->plx_regbase = pci_resource_start(pci_dev_p, 1); - if (info->plx_regbase == 0) { - printk(KERN_ERR - "comedi%d: me4000: get_registers(): " - "PCI base address 1 is not available\n", dev->minor); - return -ENODEV; - } - info->plx_regbase_size = pci_resource_len(pci_dev_p, 1); - - /*--------------------------- me4000 regbase ----------------------------*/ - - info->me4000_regbase = pci_resource_start(pci_dev_p, 2); - if (info->me4000_regbase == 0) { - printk(KERN_ERR - "comedi%d: me4000: get_registers(): " - "PCI base address 2 is not available\n", dev->minor); - return -ENODEV; - } - info->me4000_regbase_size = pci_resource_len(pci_dev_p, 2); - - /*--------------------------- timer regbase ------------------------------*/ - - info->timer_regbase = pci_resource_start(pci_dev_p, 3); - if (info->timer_regbase == 0) { - printk(KERN_ERR - "comedi%d: me4000: get_registers(): " - "PCI base address 3 is not available\n", dev->minor); - return -ENODEV; - } - info->timer_regbase_size = pci_resource_len(pci_dev_p, 3); - - /*--------------------------- program regbase ----------------------------*/ - - info->program_regbase = pci_resource_start(pci_dev_p, 5); - if (info->program_regbase == 0) { - printk(KERN_ERR - "comedi%d: me4000: get_registers(): " - "PCI base address 5 is not available\n", dev->minor); - return -ENODEV; - } - info->program_regbase_size = pci_resource_len(pci_dev_p, 5); - - return 0; -} - -static int init_board_info(struct comedi_device *dev, struct pci_dev *pci_dev_p) -{ - int result; - - /* Init spin locks */ - /* spin_lock_init(&info->preload_lock); */ - /* spin_lock_init(&info->ai_ctrl_lock); */ - - /* Get the serial number */ - result = pci_read_config_dword(pci_dev_p, 0x2C, &info->serial_no); - if (result != PCIBIOS_SUCCESSFUL) - return result; - - /* Get the hardware revision */ - result = pci_read_config_byte(pci_dev_p, 0x08, &info->hw_revision); - if (result != PCIBIOS_SUCCESSFUL) - return result; - - /* Get the vendor id */ - info->vendor_id = pci_dev_p->vendor; - - /* Get the device id */ - info->device_id = pci_dev_p->device; - - /* Get the irq assigned to the board */ - info->irq = pci_dev_p->irq; - - return 0; -} - -static int init_ao_context(struct comedi_device *dev) -{ - int i; - - for (i = 0; i < thisboard->ao.count; i++) { - /* spin_lock_init(&info->ao_context[i].use_lock); */ - info->ao_context[i].irq = info->irq; - - switch (i) { - case 0: - info->ao_context[i].ctrl_reg = - info->me4000_regbase + ME4000_AO_00_CTRL_REG; - info->ao_context[i].status_reg = - info->me4000_regbase + ME4000_AO_00_STATUS_REG; - info->ao_context[i].fifo_reg = - info->me4000_regbase + ME4000_AO_00_FIFO_REG; - info->ao_context[i].single_reg = - info->me4000_regbase + ME4000_AO_00_SINGLE_REG; - info->ao_context[i].timer_reg = - info->me4000_regbase + ME4000_AO_00_TIMER_REG; - info->ao_context[i].irq_status_reg = - info->me4000_regbase + ME4000_IRQ_STATUS_REG; - info->ao_context[i].preload_reg = - info->me4000_regbase + ME4000_AO_LOADSETREG_XX; - break; - case 1: - info->ao_context[i].ctrl_reg = - info->me4000_regbase + ME4000_AO_01_CTRL_REG; - info->ao_context[i].status_reg = - info->me4000_regbase + ME4000_AO_01_STATUS_REG; - info->ao_context[i].fifo_reg = - info->me4000_regbase + ME4000_AO_01_FIFO_REG; - info->ao_context[i].single_reg = - info->me4000_regbase + ME4000_AO_01_SINGLE_REG; - info->ao_context[i].timer_reg = - info->me4000_regbase + ME4000_AO_01_TIMER_REG; - info->ao_context[i].irq_status_reg = - info->me4000_regbase + ME4000_IRQ_STATUS_REG; - info->ao_context[i].preload_reg = - info->me4000_regbase + ME4000_AO_LOADSETREG_XX; - break; - case 2: - info->ao_context[i].ctrl_reg = - info->me4000_regbase + ME4000_AO_02_CTRL_REG; - info->ao_context[i].status_reg = - info->me4000_regbase + ME4000_AO_02_STATUS_REG; - info->ao_context[i].fifo_reg = - info->me4000_regbase + ME4000_AO_02_FIFO_REG; - info->ao_context[i].single_reg = - info->me4000_regbase + ME4000_AO_02_SINGLE_REG; - info->ao_context[i].timer_reg = - info->me4000_regbase + ME4000_AO_02_TIMER_REG; - info->ao_context[i].irq_status_reg = - info->me4000_regbase + ME4000_IRQ_STATUS_REG; - info->ao_context[i].preload_reg = - info->me4000_regbase + ME4000_AO_LOADSETREG_XX; - break; - case 3: - info->ao_context[i].ctrl_reg = - info->me4000_regbase + ME4000_AO_03_CTRL_REG; - info->ao_context[i].status_reg = - info->me4000_regbase + ME4000_AO_03_STATUS_REG; - info->ao_context[i].fifo_reg = - info->me4000_regbase + ME4000_AO_03_FIFO_REG; - info->ao_context[i].single_reg = - info->me4000_regbase + ME4000_AO_03_SINGLE_REG; - info->ao_context[i].timer_reg = - info->me4000_regbase + ME4000_AO_03_TIMER_REG; - info->ao_context[i].irq_status_reg = - info->me4000_regbase + ME4000_IRQ_STATUS_REG; - info->ao_context[i].preload_reg = - info->me4000_regbase + ME4000_AO_LOADSETREG_XX; - break; - default: - break; - } - } - - return 0; -} - -static int init_ai_context(struct comedi_device *dev) -{ - info->ai_context.irq = info->irq; - - info->ai_context.ctrl_reg = info->me4000_regbase + ME4000_AI_CTRL_REG; - info->ai_context.status_reg = - info->me4000_regbase + ME4000_AI_STATUS_REG; - info->ai_context.channel_list_reg = - info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG; - info->ai_context.data_reg = info->me4000_regbase + ME4000_AI_DATA_REG; - info->ai_context.chan_timer_reg = - info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG; - info->ai_context.chan_pre_timer_reg = - info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG; - info->ai_context.scan_timer_low_reg = - info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG; - info->ai_context.scan_timer_high_reg = - info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG; - info->ai_context.scan_pre_timer_low_reg = - info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG; - info->ai_context.scan_pre_timer_high_reg = - info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG; - info->ai_context.start_reg = info->me4000_regbase + ME4000_AI_START_REG; - info->ai_context.irq_status_reg = - info->me4000_regbase + ME4000_IRQ_STATUS_REG; - info->ai_context.sample_counter_reg = - info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG; - - return 0; -} - -static int init_dio_context(struct comedi_device *dev) -{ - info->dio_context.dir_reg = info->me4000_regbase + ME4000_DIO_DIR_REG; - info->dio_context.ctrl_reg = info->me4000_regbase + ME4000_DIO_CTRL_REG; - info->dio_context.port_0_reg = - info->me4000_regbase + ME4000_DIO_PORT_0_REG; - info->dio_context.port_1_reg = - info->me4000_regbase + ME4000_DIO_PORT_1_REG; - info->dio_context.port_2_reg = - info->me4000_regbase + ME4000_DIO_PORT_2_REG; - info->dio_context.port_3_reg = - info->me4000_regbase + ME4000_DIO_PORT_3_REG; - - return 0; -} - -static int init_cnt_context(struct comedi_device *dev) -{ - info->cnt_context.ctrl_reg = info->timer_regbase + ME4000_CNT_CTRL_REG; - info->cnt_context.counter_0_reg = - info->timer_regbase + ME4000_CNT_COUNTER_0_REG; - info->cnt_context.counter_1_reg = - info->timer_regbase + ME4000_CNT_COUNTER_1_REG; - info->cnt_context.counter_2_reg = - info->timer_regbase + ME4000_CNT_COUNTER_2_REG; - - return 0; -} - #define FIRMWARE_NOT_AVAILABLE 1 #if FIRMWARE_NOT_AVAILABLE extern unsigned char *xilinx_firm; @@ -495,11 +369,17 @@ extern unsigned char *xilinx_firm; static int xilinx_download(struct comedi_device *dev) { + struct pci_dev *pcidev = comedi_to_pci_dev(dev); + struct me4000_info *info = dev->private; + unsigned long xilinx_iobase = pci_resource_start(pcidev, 5); u32 value = 0; wait_queue_head_t queue; int idx = 0; int size = 0; + if (!xilinx_iobase) + return -ENODEV; + init_waitqueue_head(&queue); /* @@ -514,14 +394,12 @@ static int xilinx_download(struct comedi_device *dev) outl(value, info->plx_regbase + PLX_ICR); /* Init Xilinx with CS1 */ - inb(info->program_regbase + 0xC8); + inb(xilinx_iobase + 0xC8); /* Wait until /INIT pin is set */ udelay(20); if (!(inl(info->plx_regbase + PLX_INTCSR) & 0x20)) { - printk(KERN_ERR - "comedi%d: me4000: xilinx_download(): " - "Can't init Xilinx\n", dev->minor); + dev_err(dev->class_dev, "Can't init Xilinx\n"); return -EIO; } @@ -530,8 +408,8 @@ static int xilinx_download(struct comedi_device *dev) value &= ~0x100; outl(value, info->plx_regbase + PLX_ICR); if (FIRMWARE_NOT_AVAILABLE) { - comedi_error(dev, "xilinx firmware unavailable " - "due to licensing, aborting"); + dev_err(dev->class_dev, + "xilinx firmware unavailable due to licensing, aborting"); return -EIO; } else { /* Download Xilinx firmware */ @@ -540,15 +418,14 @@ static int xilinx_download(struct comedi_device *dev) udelay(10); for (idx = 0; idx < size; idx++) { - outb(xilinx_firm[16 + idx], info->program_regbase); + outb(xilinx_firm[16 + idx], xilinx_iobase); udelay(10); /* Check if BUSY flag is low */ if (inl(info->plx_regbase + PLX_ICR) & 0x20) { - printk(KERN_ERR - "comedi%d: me4000: xilinx_download(): " - "Xilinx is still busy (idx = %d)\n", - dev->minor, idx); + dev_err(dev->class_dev, + "Xilinx is still busy (idx = %d)\n", + idx); return -EIO; } } @@ -557,12 +434,8 @@ static int xilinx_download(struct comedi_device *dev) /* If done flag is high download was successful */ if (inl(info->plx_regbase + PLX_ICR) & 0x4) { } else { - printk(KERN_ERR - "comedi%d: me4000: xilinx_download(): " - "DONE flag is not set\n", dev->minor); - printk(KERN_ERR - "comedi%d: me4000: xilinx_download(): " - "Download not successful\n", dev->minor); + dev_err(dev->class_dev, "DONE flag is not set\n"); + dev_err(dev->class_dev, "Download not successful\n"); return -EIO; } @@ -574,52 +447,45 @@ static int xilinx_download(struct comedi_device *dev) return 0; } -static int reset_board(struct comedi_device *dev) +static void me4000_reset(struct comedi_device *dev) { - unsigned long icr; + struct me4000_info *info = dev->private; + unsigned long val; + int chan; /* Make a hardware reset */ - icr = inl(info->plx_regbase + PLX_ICR); - icr |= 0x40000000; - outl(icr, info->plx_regbase + PLX_ICR); - icr &= ~0x40000000; - outl(icr, info->plx_regbase + PLX_ICR); + val = inl(info->plx_regbase + PLX_ICR); + val |= 0x40000000; + outl(val, info->plx_regbase + PLX_ICR); + val &= ~0x40000000; + outl(val , info->plx_regbase + PLX_ICR); /* 0x8000 to the DACs means an output voltage of 0V */ - outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG); - outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG); - outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG); - outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG); + for (chan = 0; chan < 4; chan++) + outl(0x8000, dev->iobase + ME4000_AO_SINGLE_REG(chan)); /* Set both stop bits in the analog input control register */ outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP, - info->me4000_regbase + ME4000_AI_CTRL_REG); + dev->iobase + ME4000_AI_CTRL_REG); /* Set both stop bits in the analog output control register */ - outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP, - info->me4000_regbase + ME4000_AO_00_CTRL_REG); - outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP, - info->me4000_regbase + ME4000_AO_01_CTRL_REG); - outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP, - info->me4000_regbase + ME4000_AO_02_CTRL_REG); - outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP, - info->me4000_regbase + ME4000_AO_03_CTRL_REG); + val = ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP; + for (chan = 0; chan < 4; chan++) + outl(val, dev->iobase + ME4000_AO_CTRL_REG(chan)); /* Enable interrupts on the PLX */ outl(0x43, info->plx_regbase + PLX_INTCSR); /* Set the adustment register for AO demux */ outl(ME4000_AO_DEMUX_ADJUST_VALUE, - info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG); + dev->iobase + ME4000_AO_DEMUX_ADJUST_REG); /* * Set digital I/O direction for port 0 * to output on isolated versions */ - if (!(inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1)) - outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG); - - return 0; + if (!(inl(dev->iobase + ME4000_DIO_DIR_REG) & 0x1)) + outl(0x1, dev->iobase + ME4000_DIO_CTRL_REG); } /*============================================================================= @@ -630,7 +496,7 @@ static int me4000_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *subdevice, struct comedi_insn *insn, unsigned int *data) { - + const struct me4000_board *thisboard = comedi_board(dev); int chan = CR_CHAN(insn->chanspec); int rang = CR_RANGE(insn->chanspec); int aref = CR_AREF(insn->chanspec); @@ -642,9 +508,8 @@ static int me4000_ai_insn_read(struct comedi_device *dev, if (insn->n == 0) { return 0; } else if (insn->n > 1) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_insn_read(): " - "Invalid instruction length %d\n", dev->minor, insn->n); + dev_err(dev->class_dev, "Invalid instruction length %d\n", + insn->n); return -EINVAL; } @@ -662,19 +527,16 @@ static int me4000_ai_insn_read(struct comedi_device *dev, entry |= ME4000_AI_LIST_RANGE_BIPOLAR_10; break; default: - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_insn_read(): " - "Invalid range specified\n", dev->minor); + dev_err(dev->class_dev, "Invalid range specified\n"); return -EINVAL; } switch (aref) { case AREF_GROUND: case AREF_COMMON: - if (chan >= thisboard->ai.count) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_insn_read(): " - "Analog input is not available\n", dev->minor); + if (chan >= thisboard->ai_nchan) { + dev_err(dev->class_dev, + "Analog input is not available\n"); return -EINVAL; } entry |= ME4000_AI_LIST_INPUT_SINGLE_ENDED | chan; @@ -682,68 +544,61 @@ static int me4000_ai_insn_read(struct comedi_device *dev, case AREF_DIFF: if (rang == 0 || rang == 1) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_insn_read(): " - "Range must be bipolar when aref = diff\n", - dev->minor); + dev_err(dev->class_dev, + "Range must be bipolar when aref = diff\n"); return -EINVAL; } - if (chan >= thisboard->ai.diff_count) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_insn_read(): " - "Analog input is not available\n", dev->minor); + if (chan >= thisboard->ai_diff_nchan) { + dev_err(dev->class_dev, + "Analog input is not available\n"); return -EINVAL; } entry |= ME4000_AI_LIST_INPUT_DIFFERENTIAL | chan; break; default: - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_insn_read(): " - "Invalid aref specified\n", dev->minor); + dev_err(dev->class_dev, "Invalid aref specified\n"); return -EINVAL; } entry |= ME4000_AI_LIST_LAST_ENTRY; /* Clear channel list, data fifo and both stop bits */ - tmp = inl(info->ai_context.ctrl_reg); + tmp = inl(dev->iobase + ME4000_AI_CTRL_REG); tmp &= ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP); - outl(tmp, info->ai_context.ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); /* Set the acquisition mode to single */ tmp &= ~(ME4000_AI_CTRL_BIT_MODE_0 | ME4000_AI_CTRL_BIT_MODE_1 | ME4000_AI_CTRL_BIT_MODE_2); - outl(tmp, info->ai_context.ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); /* Enable channel list and data fifo */ tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO; - outl(tmp, info->ai_context.ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); /* Generate channel list entry */ - outl(entry, info->ai_context.channel_list_reg); + outl(entry, dev->iobase + ME4000_AI_CHANNEL_LIST_REG); /* Set the timer to maximum sample rate */ - outl(ME4000_AI_MIN_TICKS, info->ai_context.chan_timer_reg); - outl(ME4000_AI_MIN_TICKS, info->ai_context.chan_pre_timer_reg); + outl(ME4000_AI_MIN_TICKS, dev->iobase + ME4000_AI_CHAN_TIMER_REG); + outl(ME4000_AI_MIN_TICKS, dev->iobase + ME4000_AI_CHAN_PRE_TIMER_REG); /* Start conversion by dummy read */ - inl(info->ai_context.start_reg); + inl(dev->iobase + ME4000_AI_START_REG); /* Wait until ready */ udelay(10); - if (!(inl(info->ai_context.status_reg) & + if (!(inl(dev->iobase + ME4000_AI_STATUS_REG) & ME4000_AI_STATUS_BIT_EF_DATA)) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_insn_read(): " - "Value not available after wait\n", dev->minor); + dev_err(dev->class_dev, "Value not available after wait\n"); return -EIO; } /* Read value from data fifo */ - lval = inl(info->ai_context.data_reg) & 0xFFFF; + lval = inl(dev->iobase + ME4000_AI_DATA_REG) & 0xFFFF; data[0] = lval ^ 0x8000; return 1; @@ -755,12 +610,12 @@ static int me4000_ai_cancel(struct comedi_device *dev, unsigned long tmp; /* Stop any running conversion */ - tmp = inl(info->ai_context.ctrl_reg); + tmp = inl(dev->iobase + ME4000_AI_CTRL_REG); tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP); - outl(tmp, info->ai_context.ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); /* Clear the control register */ - outl(0x0, info->ai_context.ctrl_reg); + outl(0x0, dev->iobase + ME4000_AI_CTRL_REG); return 0; } @@ -768,30 +623,25 @@ static int me4000_ai_cancel(struct comedi_device *dev, static int ai_check_chanlist(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_cmd *cmd) { + const struct me4000_board *thisboard = comedi_board(dev); int aref; int i; /* Check whether a channel list is available */ if (!cmd->chanlist_len) { - printk(KERN_ERR - "comedi%d: me4000: ai_check_chanlist(): " - "No channel list available\n", dev->minor); + dev_err(dev->class_dev, "No channel list available\n"); return -EINVAL; } /* Check the channel list size */ if (cmd->chanlist_len > ME4000_AI_CHANNEL_LIST_COUNT) { - printk(KERN_ERR - "comedi%d: me4000: ai_check_chanlist(): " - "Channel list is to large\n", dev->minor); + dev_err(dev->class_dev, "Channel list is to large\n"); return -EINVAL; } /* Check the pointer */ if (!cmd->chanlist) { - printk(KERN_ERR - "comedi%d: me4000: ai_check_chanlist(): " - "NULL pointer to channel list\n", dev->minor); + dev_err(dev->class_dev, "NULL pointer to channel list\n"); return -EFAULT; } @@ -799,10 +649,8 @@ static int ai_check_chanlist(struct comedi_device *dev, aref = CR_AREF(cmd->chanlist[0]); for (i = 0; i < cmd->chanlist_len; i++) { if (CR_AREF(cmd->chanlist[i]) != aref) { - printk(KERN_ERR - "comedi%d: me4000: ai_check_chanlist(): " - "Mode is not equal for all entries\n", - dev->minor); + dev_err(dev->class_dev, + "Mode is not equal for all entries\n"); return -EINVAL; } } @@ -811,19 +659,17 @@ static int ai_check_chanlist(struct comedi_device *dev, if (aref == SDF_DIFF) { for (i = 0; i < cmd->chanlist_len; i++) { if (CR_CHAN(cmd->chanlist[i]) >= - thisboard->ai.diff_count) { - printk(KERN_ERR - "comedi%d: me4000: ai_check_chanlist():" - " Channel number to high\n", dev->minor); + thisboard->ai_diff_nchan) { + dev_err(dev->class_dev, + "Channel number to high\n"); return -EINVAL; } } } else { for (i = 0; i < cmd->chanlist_len; i++) { - if (CR_CHAN(cmd->chanlist[i]) >= thisboard->ai.count) { - printk(KERN_ERR - "comedi%d: me4000: ai_check_chanlist(): " - "Channel number to high\n", dev->minor); + if (CR_CHAN(cmd->chanlist[i]) >= thisboard->ai_nchan) { + dev_err(dev->class_dev, + "Channel number to high\n"); return -EINVAL; } } @@ -834,11 +680,8 @@ static int ai_check_chanlist(struct comedi_device *dev, for (i = 0; i < cmd->chanlist_len; i++) { if (CR_RANGE(cmd->chanlist[i]) != 1 && CR_RANGE(cmd->chanlist[i]) != 2) { - printk(KERN_ERR - "comedi%d: me4000: ai_check_chanlist(): " - "Bipolar is not selected in " - "differential mode\n", - dev->minor); + dev_err(dev->class_dev, + "Bipolar is not selected in differential mode\n"); return -EINVAL; } } @@ -906,16 +749,52 @@ static void ai_write_timer(struct comedi_device *dev, unsigned int init_ticks, unsigned int scan_ticks, unsigned int chan_ticks) { - outl(init_ticks - 1, info->ai_context.scan_pre_timer_low_reg); - outl(0x0, info->ai_context.scan_pre_timer_high_reg); + outl(init_ticks - 1, dev->iobase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG); + outl(0x0, dev->iobase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG); if (scan_ticks) { - outl(scan_ticks - 1, info->ai_context.scan_timer_low_reg); - outl(0x0, info->ai_context.scan_timer_high_reg); + outl(scan_ticks - 1, dev->iobase + ME4000_AI_SCAN_TIMER_LOW_REG); + outl(0x0, dev->iobase + ME4000_AI_SCAN_TIMER_HIGH_REG); + } + + outl(chan_ticks - 1, dev->iobase + ME4000_AI_CHAN_PRE_TIMER_REG); + outl(chan_ticks - 1, dev->iobase + ME4000_AI_CHAN_TIMER_REG); +} + +static int ai_write_chanlist(struct comedi_device *dev, + struct comedi_subdevice *s, struct comedi_cmd *cmd) +{ + unsigned int entry; + unsigned int chan; + unsigned int rang; + unsigned int aref; + int i; + + for (i = 0; i < cmd->chanlist_len; i++) { + chan = CR_CHAN(cmd->chanlist[i]); + rang = CR_RANGE(cmd->chanlist[i]); + aref = CR_AREF(cmd->chanlist[i]); + + entry = chan; + + if (rang == 0) + entry |= ME4000_AI_LIST_RANGE_UNIPOLAR_2_5; + else if (rang == 1) + entry |= ME4000_AI_LIST_RANGE_UNIPOLAR_10; + else if (rang == 2) + entry |= ME4000_AI_LIST_RANGE_BIPOLAR_2_5; + else + entry |= ME4000_AI_LIST_RANGE_BIPOLAR_10; + + if (aref == SDF_DIFF) + entry |= ME4000_AI_LIST_INPUT_DIFFERENTIAL; + else + entry |= ME4000_AI_LIST_INPUT_SINGLE_ENDED; + + outl(entry, dev->iobase + ME4000_AI_CHANNEL_LIST_REG); } - outl(chan_ticks - 1, info->ai_context.chan_pre_timer_reg); - outl(chan_ticks - 1, info->ai_context.chan_timer_reg); + return 0; } static int ai_prepare(struct comedi_device *dev, @@ -931,7 +810,7 @@ static int ai_prepare(struct comedi_device *dev, ai_write_timer(dev, init_ticks, scan_ticks, chan_ticks); /* Reset control register */ - outl(tmp, info->ai_context.ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); /* Start sources */ if ((cmd->start_src == TRIG_EXT && @@ -965,19 +844,19 @@ static int ai_prepare(struct comedi_device *dev, /* Stop triggers */ if (cmd->stop_src == TRIG_COUNT) { outl(cmd->chanlist_len * cmd->stop_arg, - info->ai_context.sample_counter_reg); + dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG); tmp |= ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ; } else if (cmd->stop_src == TRIG_NONE && cmd->scan_end_src == TRIG_COUNT) { outl(cmd->scan_end_arg, - info->ai_context.sample_counter_reg); + dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG); tmp |= ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ; } else { tmp |= ME4000_AI_CTRL_BIT_HF_IRQ; } /* Write the setup to the control register */ - outl(tmp, info->ai_context.ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); /* Write the channel list */ ai_write_chanlist(dev, s, cmd); @@ -985,42 +864,6 @@ static int ai_prepare(struct comedi_device *dev, return 0; } -static int ai_write_chanlist(struct comedi_device *dev, - struct comedi_subdevice *s, struct comedi_cmd *cmd) -{ - unsigned int entry; - unsigned int chan; - unsigned int rang; - unsigned int aref; - int i; - - for (i = 0; i < cmd->chanlist_len; i++) { - chan = CR_CHAN(cmd->chanlist[i]); - rang = CR_RANGE(cmd->chanlist[i]); - aref = CR_AREF(cmd->chanlist[i]); - - entry = chan; - - if (rang == 0) - entry |= ME4000_AI_LIST_RANGE_UNIPOLAR_2_5; - else if (rang == 1) - entry |= ME4000_AI_LIST_RANGE_UNIPOLAR_10; - else if (rang == 2) - entry |= ME4000_AI_LIST_RANGE_BIPOLAR_2_5; - else - entry |= ME4000_AI_LIST_RANGE_BIPOLAR_10; - - if (aref == SDF_DIFF) - entry |= ME4000_AI_LIST_INPUT_DIFFERENTIAL; - else - entry |= ME4000_AI_LIST_INPUT_SINGLE_ENDED; - - outl(entry, info->ai_context.channel_list_reg); - } - - return 0; -} - static int me4000_ai_do_cmd(struct comedi_device *dev, struct comedi_subdevice *s) { @@ -1047,7 +890,7 @@ static int me4000_ai_do_cmd(struct comedi_device *dev, return err; /* Start acquistion by dummy read */ - inl(info->ai_context.start_reg); + inl(dev->iobase + ME4000_AI_START_REG); return 0; } @@ -1092,9 +935,7 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, err++; break; default: - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid start source\n", dev->minor); + dev_err(dev->class_dev, "Invalid start source\n"); cmd->start_src = TRIG_NOW; err++; } @@ -1108,9 +949,7 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, err++; break; default: - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid scan begin source\n", dev->minor); + dev_err(dev->class_dev, "Invalid scan begin source\n"); cmd->scan_begin_src = TRIG_FOLLOW; err++; } @@ -1123,9 +962,7 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, err++; break; default: - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid convert source\n", dev->minor); + dev_err(dev->class_dev, "Invalid convert source\n"); cmd->convert_src = TRIG_TIMER; err++; } @@ -1138,9 +975,7 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, err++; break; default: - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid scan end source\n", dev->minor); + dev_err(dev->class_dev, "Invalid scan end source\n"); cmd->scan_end_src = TRIG_NONE; err++; } @@ -1153,9 +988,7 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, err++; break; default: - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid stop source\n", dev->minor); + dev_err(dev->class_dev, "Invalid stop source\n"); cmd->stop_src = TRIG_NONE; err++; } @@ -1184,9 +1017,7 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, cmd->scan_begin_src == TRIG_EXT && cmd->convert_src == TRIG_EXT) { } else { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid start trigger combination\n", dev->minor); + dev_err(dev->class_dev, "Invalid start trigger combination\n"); cmd->start_src = TRIG_NOW; cmd->scan_begin_src = TRIG_FOLLOW; cmd->convert_src = TRIG_TIMER; @@ -1201,9 +1032,7 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, } else if (cmd->stop_src == TRIG_COUNT && cmd->scan_end_src == TRIG_COUNT) { } else { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid stop trigger combination\n", dev->minor); + dev_err(dev->class_dev, "Invalid stop trigger combination\n"); cmd->stop_src = TRIG_NONE; cmd->scan_end_src = TRIG_NONE; err++; @@ -1215,30 +1044,22 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, * Stage 3. Check if arguments are generally valid. */ if (cmd->chanlist_len < 1) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "No channel list\n", dev->minor); + dev_err(dev->class_dev, "No channel list\n"); cmd->chanlist_len = 1; err++; } if (init_ticks < 66) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Start arg to low\n", dev->minor); + dev_err(dev->class_dev, "Start arg to low\n"); cmd->start_arg = 2000; err++; } if (scan_ticks && scan_ticks < 67) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Scan begin arg to low\n", dev->minor); + dev_err(dev->class_dev, "Scan begin arg to low\n"); cmd->scan_begin_arg = 2031; err++; } if (chan_ticks < 66) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Convert arg to low\n", dev->minor); + dev_err(dev->class_dev, "Convert arg to low\n"); cmd->convert_arg = 2000; err++; } @@ -1255,23 +1076,17 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, /* Check timer arguments */ if (init_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid start arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid start arg\n"); cmd->start_arg = 2000; /* 66 ticks at least */ err++; } if (chan_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid convert arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid convert arg\n"); cmd->convert_arg = 2000; /* 66 ticks at least */ err++; } if (scan_ticks <= cmd->chanlist_len * chan_ticks) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid scan end arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid scan end arg\n"); /* At least one tick more */ cmd->scan_end_arg = 2000 * cmd->chanlist_len + 31; @@ -1283,16 +1098,12 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, /* Check timer arguments */ if (init_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid start arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid start arg\n"); cmd->start_arg = 2000; /* 66 ticks at least */ err++; } if (chan_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid convert arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid convert arg\n"); cmd->convert_arg = 2000; /* 66 ticks at least */ err++; } @@ -1302,23 +1113,17 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, /* Check timer arguments */ if (init_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid start arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid start arg\n"); cmd->start_arg = 2000; /* 66 ticks at least */ err++; } if (chan_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid convert arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid convert arg\n"); cmd->convert_arg = 2000; /* 66 ticks at least */ err++; } if (scan_ticks <= cmd->chanlist_len * chan_ticks) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid scan end arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid scan end arg\n"); /* At least one tick more */ cmd->scan_end_arg = 2000 * cmd->chanlist_len + 31; @@ -1330,16 +1135,12 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, /* Check timer arguments */ if (init_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid start arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid start arg\n"); cmd->start_arg = 2000; /* 66 ticks at least */ err++; } if (chan_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid convert arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid convert arg\n"); cmd->convert_arg = 2000; /* 66 ticks at least */ err++; } @@ -1349,16 +1150,12 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, /* Check timer arguments */ if (init_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid start arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid start arg\n"); cmd->start_arg = 2000; /* 66 ticks at least */ err++; } if (chan_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid convert arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid convert arg\n"); cmd->convert_arg = 2000; /* 66 ticks at least */ err++; } @@ -1368,27 +1165,21 @@ static int me4000_ai_do_cmd_test(struct comedi_device *dev, /* Check timer arguments */ if (init_ticks < ME4000_AI_MIN_TICKS) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid start arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid start arg\n"); cmd->start_arg = 2000; /* 66 ticks at least */ err++; } } if (cmd->stop_src == TRIG_COUNT) { if (cmd->stop_arg == 0) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid stop arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid stop arg\n"); cmd->stop_arg = 1; err++; } } if (cmd->scan_end_src == TRIG_COUNT) { if (cmd->scan_end_arg == 0) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_do_cmd_test(): " - "Invalid scan end arg\n", dev->minor); + dev_err(dev->class_dev, "Invalid scan end arg\n"); cmd->scan_end_arg = 1; err++; } @@ -1411,7 +1202,6 @@ static irqreturn_t me4000_ai_isr(int irq, void *dev_id) unsigned int tmp; struct comedi_device *dev = dev_id; struct comedi_subdevice *s = &dev->subdevices[0]; - struct me4000_ai_context *ai_context = &info->ai_context; int i; int c = 0; long lval; @@ -1423,17 +1213,15 @@ static irqreturn_t me4000_ai_isr(int irq, void *dev_id) s->async->events = 0; /* Check if irq number is right */ - if (irq != ai_context->irq) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_isr(): " - "Incorrect interrupt num: %d\n", dev->minor, irq); + if (irq != dev->irq) { + dev_err(dev->class_dev, "Incorrect interrupt num: %d\n", irq); return IRQ_HANDLED; } - if (inl(ai_context->irq_status_reg) & + if (inl(dev->iobase + ME4000_IRQ_STATUS_REG) & ME4000_IRQ_STATUS_BIT_AI_HF) { /* Read status register to find out what happened */ - tmp = inl(ai_context->ctrl_reg); + tmp = inl(dev->iobase + ME4000_AI_CTRL_REG); if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) && !(tmp & ME4000_AI_STATUS_BIT_HF_DATA) && @@ -1447,13 +1235,11 @@ static irqreturn_t me4000_ai_isr(int irq, void *dev_id) tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP; tmp &= ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ); - outl(tmp, ai_context->ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_isr(): " - "FIFO overflow\n", dev->minor); + dev_err(dev->class_dev, "FIFO overflow\n"); } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) && !(tmp & ME4000_AI_STATUS_BIT_HF_DATA) && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) { @@ -1461,9 +1247,8 @@ static irqreturn_t me4000_ai_isr(int irq, void *dev_id) c = ME4000_AI_FIFO_COUNT / 2; } else { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_isr(): " - "Can't determine state of fifo\n", dev->minor); + dev_err(dev->class_dev, + "Can't determine state of fifo\n"); c = 0; /* @@ -1473,18 +1258,16 @@ static irqreturn_t me4000_ai_isr(int irq, void *dev_id) tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP; tmp &= ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ); - outl(tmp, ai_context->ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_isr(): " - "Undefined FIFO state\n", dev->minor); + dev_err(dev->class_dev, "Undefined FIFO state\n"); } for (i = 0; i < c; i++) { /* Read value from data fifo */ - lval = inl(ai_context->data_reg) & 0xFFFF; + lval = inl(dev->iobase + ME4000_AI_DATA_REG) & 0xFFFF; lval ^= 0x8000; if (!comedi_buf_put(s->async, lval)) { @@ -1495,13 +1278,11 @@ static irqreturn_t me4000_ai_isr(int irq, void *dev_id) tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP; tmp &= ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ); - outl(tmp, ai_context->ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); s->async->events |= COMEDI_CB_OVERFLOW; - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_isr(): " - "Buffer overflow\n", dev->minor); + dev_err(dev->class_dev, "Buffer overflow\n"); break; } @@ -1509,33 +1290,33 @@ static irqreturn_t me4000_ai_isr(int irq, void *dev_id) /* Work is done, so reset the interrupt */ tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET; - outl(tmp, ai_context->ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET; - outl(tmp, ai_context->ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); } - if (inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) { + if (inl(dev->iobase + ME4000_IRQ_STATUS_REG) & + ME4000_IRQ_STATUS_BIT_SC) { s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOA; /* * Acquisition is complete, so stop * conversion and disable all interrupts */ - tmp = inl(ai_context->ctrl_reg); + tmp = inl(dev->iobase + ME4000_AI_CTRL_REG); tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP; tmp &= ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ); - outl(tmp, ai_context->ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); /* Poll data until fifo empty */ - while (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_EF_DATA) { + while (inl(dev->iobase + ME4000_AI_CTRL_REG) & + ME4000_AI_STATUS_BIT_EF_DATA) { /* Read value from data fifo */ - lval = inl(ai_context->data_reg) & 0xFFFF; + lval = inl(dev->iobase + ME4000_AI_DATA_REG) & 0xFFFF; lval ^= 0x8000; if (!comedi_buf_put(s->async, lval)) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ai_isr(): " - "Buffer overflow\n", dev->minor); + dev_err(dev->class_dev, "Buffer overflow\n"); s->async->events |= COMEDI_CB_OVERFLOW; break; } @@ -1543,9 +1324,9 @@ static irqreturn_t me4000_ai_isr(int irq, void *dev_id) /* Work is done, so reset the interrupt */ tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET; - outl(tmp, ai_context->ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET; - outl(tmp, ai_context->ctrl_reg); + outl(tmp, dev->iobase + ME4000_AI_CTRL_REG); } if (s->async->events) @@ -1562,7 +1343,8 @@ static int me4000_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { - + const struct me4000_board *thisboard = comedi_board(dev); + struct me4000_info *info = dev->private; int chan = CR_CHAN(insn->chanspec); int rang = CR_RANGE(insn->chanspec); int aref = CR_AREF(insn->chanspec); @@ -1571,46 +1353,39 @@ static int me4000_ao_insn_write(struct comedi_device *dev, if (insn->n == 0) { return 0; } else if (insn->n > 1) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ao_insn_write(): " - "Invalid instruction length %d\n", dev->minor, insn->n); + dev_err(dev->class_dev, "Invalid instruction length %d\n", + insn->n); return -EINVAL; } - if (chan >= thisboard->ao.count) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ao_insn_write(): " - "Invalid channel %d\n", dev->minor, insn->n); + if (chan >= thisboard->ao_nchan) { + dev_err(dev->class_dev, "Invalid channel %d\n", insn->n); return -EINVAL; } if (rang != 0) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ao_insn_write(): " - "Invalid range %d\n", dev->minor, insn->n); + dev_err(dev->class_dev, "Invalid range %d\n", insn->n); return -EINVAL; } if (aref != AREF_GROUND && aref != AREF_COMMON) { - printk(KERN_ERR - "comedi%d: me4000: me4000_ao_insn_write(): " - "Invalid aref %d\n", dev->minor, insn->n); + dev_err(dev->class_dev, "Invalid aref %d\n", insn->n); return -EINVAL; } /* Stop any running conversion */ - tmp = inl(info->ao_context[chan].ctrl_reg); + tmp = inl(dev->iobase + ME4000_AO_CTRL_REG(chan)); tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP; - outl(tmp, info->ao_context[chan].ctrl_reg); + outl(tmp, dev->iobase + ME4000_AO_CTRL_REG(chan)); /* Clear control register and set to single mode */ - outl(0x0, info->ao_context[chan].ctrl_reg); + outl(0x0, dev->iobase + ME4000_AO_CTRL_REG(chan)); /* Write data value */ - outl(data[0], info->ao_context[chan].single_reg); + outl(data[0], dev->iobase + ME4000_AO_SINGLE_REG(chan)); /* Store in the mirror */ - info->ao_context[chan].mirror = data[0]; + info->ao_readback[chan] = data[0]; return 1; } @@ -1619,18 +1394,17 @@ static int me4000_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { + struct me4000_info *info = dev->private; int chan = CR_CHAN(insn->chanspec); if (insn->n == 0) { return 0; } else if (insn->n > 1) { - printk - ("comedi%d: me4000: me4000_ao_insn_read(): " - "Invalid instruction length\n", dev->minor); + dev_err(dev->class_dev, "Invalid instruction length\n"); return -EINVAL; } - data[0] = info->ao_context[chan].mirror; + data[0] = info->ao_readback[chan]; return 1; } @@ -1659,21 +1433,21 @@ static int me4000_dio_insn_bits(struct comedi_device *dev, /* Write out the new digital output lines */ outl((s->state >> 0) & 0xFF, - info->dio_context.port_0_reg); + dev->iobase + ME4000_DIO_PORT_0_REG); outl((s->state >> 8) & 0xFF, - info->dio_context.port_1_reg); + dev->iobase + ME4000_DIO_PORT_1_REG); outl((s->state >> 16) & 0xFF, - info->dio_context.port_2_reg); + dev->iobase + ME4000_DIO_PORT_2_REG); outl((s->state >> 24) & 0xFF, - info->dio_context.port_3_reg); + dev->iobase + ME4000_DIO_PORT_3_REG); } /* On return, data[1] contains the value of the digital input and output lines. */ - data[1] = ((inl(info->dio_context.port_0_reg) & 0xFF) << 0) | - ((inl(info->dio_context.port_1_reg) & 0xFF) << 8) | - ((inl(info->dio_context.port_2_reg) & 0xFF) << 16) | - ((inl(info->dio_context.port_3_reg) & 0xFF) << 24); + data[1] = ((inl(dev->iobase + ME4000_DIO_PORT_0_REG) & 0xFF) << 0) | + ((inl(dev->iobase + ME4000_DIO_PORT_1_REG) & 0xFF) << 8) | + ((inl(dev->iobase + ME4000_DIO_PORT_2_REG) & 0xFF) << 16) | + ((inl(dev->iobase + ME4000_DIO_PORT_3_REG) & 0xFF) << 24); return insn->n; } @@ -1705,7 +1479,7 @@ static int me4000_dio_insn_config(struct comedi_device *dev, * On the ME-4000 it is only possible to switch port wise (8 bit) */ - tmp = inl(info->dio_context.ctrl_reg); + tmp = inl(dev->iobase + ME4000_DIO_CTRL_REG); if (data[0] == INSN_CONFIG_DIO_OUTPUT) { if (chan < 8) { @@ -1719,7 +1493,7 @@ static int me4000_dio_insn_config(struct comedi_device *dev, * If one the first port is a fixed output * port and the second is a fixed input port. */ - if (!inl(info->dio_context.dir_reg)) + if (!inl(dev->iobase + ME4000_DIO_DIR_REG)) return -ENODEV; s->io_bits |= 0xFF00; @@ -1746,7 +1520,7 @@ static int me4000_dio_insn_config(struct comedi_device *dev, * If one the first port is a fixed output * port and the second is a fixed input port. */ - if (!inl(info->dio_context.dir_reg)) + if (!inl(dev->iobase + ME4000_DIO_DIR_REG)) return -ENODEV; s->io_bits &= ~0xFF; @@ -1769,7 +1543,7 @@ static int me4000_dio_insn_config(struct comedi_device *dev, } } - outl(tmp, info->dio_context.ctrl_reg); + outl(tmp, dev->iobase + ME4000_DIO_CTRL_REG); return 1; } @@ -1778,177 +1552,56 @@ static int me4000_dio_insn_config(struct comedi_device *dev, Counter section ===========================================================================*/ -static int cnt_reset(struct comedi_device *dev, unsigned int channel) -{ - switch (channel) { - case 0: - outb(0x30, info->cnt_context.ctrl_reg); - outb(0x00, info->cnt_context.counter_0_reg); - outb(0x00, info->cnt_context.counter_0_reg); - break; - case 1: - outb(0x70, info->cnt_context.ctrl_reg); - outb(0x00, info->cnt_context.counter_1_reg); - outb(0x00, info->cnt_context.counter_1_reg); - break; - case 2: - outb(0xB0, info->cnt_context.ctrl_reg); - outb(0x00, info->cnt_context.counter_2_reg); - outb(0x00, info->cnt_context.counter_2_reg); - break; - default: - printk(KERN_ERR - "comedi%d: me4000: cnt_reset(): Invalid channel\n", - dev->minor); - return -EINVAL; - } - - return 0; -} - -static int cnt_config(struct comedi_device *dev, unsigned int channel, - unsigned int mode) -{ - int tmp = 0; - - switch (channel) { - case 0: - tmp |= ME4000_CNT_COUNTER_0; - break; - case 1: - tmp |= ME4000_CNT_COUNTER_1; - break; - case 2: - tmp |= ME4000_CNT_COUNTER_2; - break; - default: - printk(KERN_ERR - "comedi%d: me4000: cnt_config(): Invalid channel\n", - dev->minor); - return -EINVAL; - } - - switch (mode) { - case 0: - tmp |= ME4000_CNT_MODE_0; - break; - case 1: - tmp |= ME4000_CNT_MODE_1; - break; - case 2: - tmp |= ME4000_CNT_MODE_2; - break; - case 3: - tmp |= ME4000_CNT_MODE_3; - break; - case 4: - tmp |= ME4000_CNT_MODE_4; - break; - case 5: - tmp |= ME4000_CNT_MODE_5; - break; - default: - printk(KERN_ERR - "comedi%d: me4000: cnt_config(): Invalid counter mode\n", - dev->minor); - return -EINVAL; - } - - /* Write the control word */ - tmp |= 0x30; - outb(tmp, info->cnt_context.ctrl_reg); - - return 0; -} - static int me4000_cnt_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, - struct comedi_insn *insn, unsigned int *data) + struct comedi_insn *insn, + unsigned int *data) { - + struct me4000_info *info = dev->private; int err; switch (data[0]) { case GPCT_RESET: - if (insn->n != 1) { - printk(KERN_ERR - "comedi%d: me4000: me4000_cnt_insn_config(): " - "Invalid instruction length%d\n", - dev->minor, insn->n); + if (insn->n != 1) return -EINVAL; - } - err = cnt_reset(dev, insn->chanspec); + err = i8254_load(info->timer_regbase, 0, insn->chanspec, 0, + I8254_MODE0 | I8254_BINARY); if (err) return err; break; case GPCT_SET_OPERATION: - if (insn->n != 2) { - printk(KERN_ERR - "comedi%d: me4000: me4000_cnt_insn_config(): " - "Invalid instruction length%d\n", - dev->minor, insn->n); + if (insn->n != 2) return -EINVAL; - } - err = cnt_config(dev, insn->chanspec, data[1]); + err = i8254_set_mode(info->timer_regbase, 0, insn->chanspec, + (data[1] << 1) | I8254_BINARY); if (err) return err; break; default: - printk(KERN_ERR - "comedi%d: me4000: me4000_cnt_insn_config(): " - "Invalid instruction\n", dev->minor); return -EINVAL; } - return 2; + return insn->n; } static int me4000_cnt_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { - - unsigned short tmp; + struct me4000_info *info = dev->private; if (insn->n == 0) return 0; if (insn->n > 1) { - printk(KERN_ERR - "comedi%d: me4000: me4000_cnt_insn_read(): " - "Invalid instruction length %d\n", - dev->minor, insn->n); + dev_err(dev->class_dev, "Invalid instruction length %d\n", + insn->n); return -EINVAL; } - switch (insn->chanspec) { - case 0: - tmp = inb(info->cnt_context.counter_0_reg); - data[0] = tmp; - tmp = inb(info->cnt_context.counter_0_reg); - data[0] |= tmp << 8; - break; - case 1: - tmp = inb(info->cnt_context.counter_1_reg); - data[0] = tmp; - tmp = inb(info->cnt_context.counter_1_reg); - data[0] |= tmp << 8; - break; - case 2: - tmp = inb(info->cnt_context.counter_2_reg); - data[0] = tmp; - tmp = inb(info->cnt_context.counter_2_reg); - data[0] |= tmp << 8; - break; - default: - printk(KERN_ERR - "comedi%d: me4000: me4000_cnt_insn_read(): " - "Invalid channel %d\n", - dev->minor, insn->chanspec); - return -EINVAL; - } + data[0] = i8254_read(info->timer_regbase, 0, insn->chanspec); return 1; } @@ -1957,58 +1610,72 @@ static int me4000_cnt_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { - - unsigned short tmp; + struct me4000_info *info = dev->private; if (insn->n == 0) { return 0; } else if (insn->n > 1) { - printk(KERN_ERR - "comedi%d: me4000: me4000_cnt_insn_write(): " - "Invalid instruction length %d\n", - dev->minor, insn->n); + dev_err(dev->class_dev, "Invalid instruction length %d\n", + insn->n); return -EINVAL; } - switch (insn->chanspec) { - case 0: - tmp = data[0] & 0xFF; - outb(tmp, info->cnt_context.counter_0_reg); - tmp = (data[0] >> 8) & 0xFF; - outb(tmp, info->cnt_context.counter_0_reg); - break; - case 1: - tmp = data[0] & 0xFF; - outb(tmp, info->cnt_context.counter_1_reg); - tmp = (data[0] >> 8) & 0xFF; - outb(tmp, info->cnt_context.counter_1_reg); - break; - case 2: - tmp = data[0] & 0xFF; - outb(tmp, info->cnt_context.counter_2_reg); - tmp = (data[0] >> 8) & 0xFF; - outb(tmp, info->cnt_context.counter_2_reg); - break; - default: - printk(KERN_ERR - "comedi%d: me4000: me4000_cnt_insn_write(): " - "Invalid channel %d\n", - dev->minor, insn->chanspec); - return -EINVAL; - } + i8254_write(info->timer_regbase, 0, insn->chanspec, data[0]); return 1; } -static int me4000_attach(struct comedi_device *dev, struct comedi_devconfig *it) +static const void *me4000_find_boardinfo(struct comedi_device *dev, + struct pci_dev *pcidev) { + const struct me4000_board *thisboard; + int i; + + for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) { + thisboard = &me4000_boards[i]; + if (thisboard->device_id == pcidev->device) + return thisboard; + } + return NULL; +} + +static int me4000_attach_pci(struct comedi_device *dev, + struct pci_dev *pcidev) +{ + const struct me4000_board *thisboard; + struct me4000_info *info; struct comedi_subdevice *s; int result; - result = me4000_probe(dev, it); + comedi_set_hw_dev(dev, &pcidev->dev); + + thisboard = me4000_find_boardinfo(dev, pcidev); + if (!thisboard) + return -ENODEV; + dev->board_ptr = thisboard; + dev->board_name = thisboard->name; + + result = alloc_private(dev, sizeof(*info)); + if (result) + return result; + info = dev->private; + + result = comedi_pci_enable(pcidev, dev->board_name); if (result) return result; + info->plx_regbase = pci_resource_start(pcidev, 1); + dev->iobase = pci_resource_start(pcidev, 2); + info->timer_regbase = pci_resource_start(pcidev, 3); + if (!info->plx_regbase || !dev->iobase || !info->timer_regbase) + return -ENODEV; + + result = xilinx_download(dev); + if (result) + return result; + + me4000_reset(dev); + result = comedi_alloc_subdevices(dev, 4); if (result) return result; @@ -2019,33 +1686,32 @@ static int me4000_attach(struct comedi_device *dev, struct comedi_devconfig *it) s = &dev->subdevices[0]; - if (thisboard->ai.count) { + if (thisboard->ai_nchan) { s->type = COMEDI_SUBD_AI; s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_GROUND | SDF_DIFF; - s->n_chan = thisboard->ai.count; + s->n_chan = thisboard->ai_nchan; s->maxdata = 0xFFFF; /* 16 bit ADC */ s->len_chanlist = ME4000_AI_CHANNEL_LIST_COUNT; s->range_table = &me4000_ai_range; s->insn_read = me4000_ai_insn_read; - if (info->irq > 0) { - if (request_irq(info->irq, me4000_ai_isr, - IRQF_SHARED, "ME-4000", dev)) { - printk - ("comedi%d: me4000: me4000_attach(): " - "Unable to allocate irq\n", dev->minor); + if (pcidev->irq > 0) { + if (request_irq(pcidev->irq, me4000_ai_isr, + IRQF_SHARED, dev->board_name, dev)) { + dev_warn(dev->class_dev, + "request_irq failed\n"); } else { dev->read_subdev = s; s->subdev_flags |= SDF_CMD_READ; s->cancel = me4000_ai_cancel; s->do_cmdtest = me4000_ai_do_cmd_test; s->do_cmd = me4000_ai_do_cmd; + + dev->irq = pcidev->irq; } } else { - printk(KERN_WARNING - "comedi%d: me4000: me4000_attach(): " - "No interrupt available\n", dev->minor); + dev_warn(dev->class_dev, "No interrupt available\n"); } } else { s->type = COMEDI_SUBD_UNUSED; @@ -2057,12 +1723,12 @@ static int me4000_attach(struct comedi_device *dev, struct comedi_devconfig *it) s = &dev->subdevices[1]; - if (thisboard->ao.count) { + if (thisboard->ao_nchan) { s->type = COMEDI_SUBD_AO; s->subdev_flags = SDF_WRITEABLE | SDF_COMMON | SDF_GROUND; - s->n_chan = thisboard->ao.count; + s->n_chan = thisboard->ao_nchan; s->maxdata = 0xFFFF; /* 16 bit DAC */ - s->range_table = &me4000_ao_range; + s->range_table = &range_bipolar10; s->insn_write = me4000_ao_insn_write; s->insn_read = me4000_ao_insn_read; } else { @@ -2075,10 +1741,10 @@ static int me4000_attach(struct comedi_device *dev, struct comedi_devconfig *it) s = &dev->subdevices[2]; - if (thisboard->dio.count) { + if (thisboard->dio_nchan) { s->type = COMEDI_SUBD_DIO; s->subdev_flags = SDF_READABLE | SDF_WRITABLE; - s->n_chan = thisboard->dio.count * 8; + s->n_chan = thisboard->dio_nchan; s->maxdata = 1; s->range_table = &range_digital; s->insn_bits = me4000_dio_insn_bits; @@ -2091,9 +1757,10 @@ static int me4000_attach(struct comedi_device *dev, struct comedi_devconfig *it) * Check for optoisolated ME-4000 version. If one the first * port is a fixed output port and the second is a fixed input port. */ - if (!inl(info->dio_context.dir_reg)) { + if (!inl(dev->iobase + ME4000_DIO_DIR_REG)) { s->io_bits |= 0xFF; - outl(ME4000_DIO_CTRL_BIT_MODE_0, info->dio_context.dir_reg); + outl(ME4000_DIO_CTRL_BIT_MODE_0, + dev->iobase + ME4000_DIO_DIR_REG); } /*========================================================================= @@ -2102,10 +1769,10 @@ static int me4000_attach(struct comedi_device *dev, struct comedi_devconfig *it) s = &dev->subdevices[3]; - if (thisboard->cnt.count) { + if (thisboard->has_counter) { s->type = COMEDI_SUBD_COUNTER; s->subdev_flags = SDF_READABLE | SDF_WRITABLE; - s->n_chan = thisboard->cnt.count; + s->n_chan = 3; s->maxdata = 0xFFFF; /* 16 bit counters */ s->insn_read = me4000_cnt_insn_read; s->insn_write = me4000_cnt_insn_write; @@ -2119,12 +1786,14 @@ static int me4000_attach(struct comedi_device *dev, struct comedi_devconfig *it) static void me4000_detach(struct comedi_device *dev) { - if (info) { - if (info->pci_dev_p) { - reset_board(dev); - if (info->plx_regbase) - comedi_pci_disable(info->pci_dev_p); - pci_dev_put(info->pci_dev_p); + struct pci_dev *pcidev = comedi_to_pci_dev(dev); + + if (dev->irq) + free_irq(dev->irq, dev); + if (pcidev) { + if (dev->iobase) { + me4000_reset(dev); + comedi_pci_disable(pcidev); } } } @@ -2132,7 +1801,7 @@ static void me4000_detach(struct comedi_device *dev) static struct comedi_driver me4000_driver = { .driver_name = "me4000", .module = THIS_MODULE, - .attach = me4000_attach, + .attach_pci = me4000_attach_pci, .detach = me4000_detach, }; @@ -2148,20 +1817,20 @@ static void __devexit me4000_pci_remove(struct pci_dev *dev) } static DEFINE_PCI_DEVICE_TABLE(me4000_pci_table) = { - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4650) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4660) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4661) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4662) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4663) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4670) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4671) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4672) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4673) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4680) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4681) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4682) }, - { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, 0x4683) }, - { 0 } + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4650)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4660)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4660I)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4660S)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4660IS)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4670)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4670I)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4670S)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4670IS)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4680)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4680I)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4680S)}, + {PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, PCI_DEVICE_ID_MEILHAUS_ME4680IS)}, + {0} }; MODULE_DEVICE_TABLE(pci, me4000_pci_table); diff --git a/trunk/drivers/staging/comedi/drivers/me4000.h b/trunk/drivers/staging/comedi/drivers/me4000.h deleted file mode 100644 index 5a4df4e4b236..000000000000 --- a/trunk/drivers/staging/comedi/drivers/me4000.h +++ /dev/null @@ -1,409 +0,0 @@ -/* - me4000.h - Register descriptions and defines for the ME-4000 board family - - COMEDI - Linux Control and Measurement Device Interface - Copyright (C) 1998-9 David A. Schleef - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - -*/ - -#ifndef _ME4000_H_ -#define _ME4000_H_ - -/*============================================================================= - PCI vendor and device IDs - ===========================================================================*/ - -#define PCI_VENDOR_ID_MEILHAUS 0x1402 - -#define PCI_DEVICE_ID_MEILHAUS_ME4650 0x4650 /* Low Cost version */ - -#define PCI_DEVICE_ID_MEILHAUS_ME4660 0x4660 /* Standard version */ -#define PCI_DEVICE_ID_MEILHAUS_ME4660I 0x4661 /* Isolated version */ -#define PCI_DEVICE_ID_MEILHAUS_ME4660S 0x4662 /* Standard version with Sample and Hold */ -#define PCI_DEVICE_ID_MEILHAUS_ME4660IS 0x4663 /* Isolated version with Sample and Hold */ - -#define PCI_DEVICE_ID_MEILHAUS_ME4670 0x4670 /* Standard version */ -#define PCI_DEVICE_ID_MEILHAUS_ME4670I 0x4671 /* Isolated version */ -#define PCI_DEVICE_ID_MEILHAUS_ME4670S 0x4672 /* Standard version with Sample and Hold */ -#define PCI_DEVICE_ID_MEILHAUS_ME4670IS 0x4673 /* Isolated version with Sample and Hold */ - -#define PCI_DEVICE_ID_MEILHAUS_ME4680 0x4680 /* Standard version */ -#define PCI_DEVICE_ID_MEILHAUS_ME4680I 0x4681 /* Isolated version */ -#define PCI_DEVICE_ID_MEILHAUS_ME4680S 0x4682 /* Standard version with Sample and Hold */ -#define PCI_DEVICE_ID_MEILHAUS_ME4680IS 0x4683 /* Isolated version with Sample and Hold */ - -/*============================================================================= - ME-4000 base register offsets - ===========================================================================*/ - -#define ME4000_AO_00_CTRL_REG 0x00 /* R/W */ -#define ME4000_AO_00_STATUS_REG 0x04 /* R/_ */ -#define ME4000_AO_00_FIFO_REG 0x08 /* _/W */ -#define ME4000_AO_00_SINGLE_REG 0x0C /* R/W */ -#define ME4000_AO_00_TIMER_REG 0x10 /* _/W */ - -#define ME4000_AO_01_CTRL_REG 0x18 /* R/W */ -#define ME4000_AO_01_STATUS_REG 0x1C /* R/_ */ -#define ME4000_AO_01_FIFO_REG 0x20 /* _/W */ -#define ME4000_AO_01_SINGLE_REG 0x24 /* R/W */ -#define ME4000_AO_01_TIMER_REG 0x28 /* _/W */ - -#define ME4000_AO_02_CTRL_REG 0x30 /* R/W */ -#define ME4000_AO_02_STATUS_REG 0x34 /* R/_ */ -#define ME4000_AO_02_FIFO_REG 0x38 /* _/W */ -#define ME4000_AO_02_SINGLE_REG 0x3C /* R/W */ -#define ME4000_AO_02_TIMER_REG 0x40 /* _/W */ - -#define ME4000_AO_03_CTRL_REG 0x48 /* R/W */ -#define ME4000_AO_03_STATUS_REG 0x4C /* R/_ */ -#define ME4000_AO_03_FIFO_REG 0x50 /* _/W */ -#define ME4000_AO_03_SINGLE_REG 0x54 /* R/W */ -#define ME4000_AO_03_TIMER_REG 0x58 /* _/W */ - -#define ME4000_AI_CTRL_REG 0x74 /* _/W */ -#define ME4000_AI_STATUS_REG 0x74 /* R/_ */ -#define ME4000_AI_CHANNEL_LIST_REG 0x78 /* _/W */ -#define ME4000_AI_DATA_REG 0x7C /* R/_ */ -#define ME4000_AI_CHAN_TIMER_REG 0x80 /* _/W */ -#define ME4000_AI_CHAN_PRE_TIMER_REG 0x84 /* _/W */ -#define ME4000_AI_SCAN_TIMER_LOW_REG 0x88 /* _/W */ -#define ME4000_AI_SCAN_TIMER_HIGH_REG 0x8C /* _/W */ -#define ME4000_AI_SCAN_PRE_TIMER_LOW_REG 0x90 /* _/W */ -#define ME4000_AI_SCAN_PRE_TIMER_HIGH_REG 0x94 /* _/W */ -#define ME4000_AI_START_REG 0x98 /* R/_ */ - -#define ME4000_IRQ_STATUS_REG 0x9C /* R/_ */ - -#define ME4000_DIO_PORT_0_REG 0xA0 /* R/W */ -#define ME4000_DIO_PORT_1_REG 0xA4 /* R/W */ -#define ME4000_DIO_PORT_2_REG 0xA8 /* R/W */ -#define ME4000_DIO_PORT_3_REG 0xAC /* R/W */ -#define ME4000_DIO_DIR_REG 0xB0 /* R/W */ - -#define ME4000_AO_LOADSETREG_XX 0xB4 /* R/W */ - -#define ME4000_DIO_CTRL_REG 0xB8 /* R/W */ - -#define ME4000_AO_DEMUX_ADJUST_REG 0xBC /* -/W */ - -#define ME4000_AI_SAMPLE_COUNTER_REG 0xC0 /* _/W */ - -/*============================================================================= - Value to adjust Demux - ===========================================================================*/ - -#define ME4000_AO_DEMUX_ADJUST_VALUE 0x4C - -/*============================================================================= - Counter base register offsets - ===========================================================================*/ - -#define ME4000_CNT_COUNTER_0_REG 0x00 -#define ME4000_CNT_COUNTER_1_REG 0x01 -#define ME4000_CNT_COUNTER_2_REG 0x02 -#define ME4000_CNT_CTRL_REG 0x03 - -/*============================================================================= - PLX base register offsets - ===========================================================================*/ - -#define PLX_INTCSR 0x4C /* Interrupt control and status register */ -#define PLX_ICR 0x50 /* Initialization control register */ - -/*============================================================================= - Bits for the PLX_ICSR register - ===========================================================================*/ - -#define PLX_INTCSR_LOCAL_INT1_EN 0x01 /* If set, local interrupt 1 is enabled (r/w) */ -#define PLX_INTCSR_LOCAL_INT1_POL 0x02 /* If set, local interrupt 1 polarity is active high (r/w) */ -#define PLX_INTCSR_LOCAL_INT1_STATE 0x04 /* If set, local interrupt 1 is active (r/_) */ -#define PLX_INTCSR_LOCAL_INT2_EN 0x08 /* If set, local interrupt 2 is enabled (r/w) */ -#define PLX_INTCSR_LOCAL_INT2_POL 0x10 /* If set, local interrupt 2 polarity is active high (r/w) */ -#define PLX_INTCSR_LOCAL_INT2_STATE 0x20 /* If set, local interrupt 2 is active (r/_) */ -#define PLX_INTCSR_PCI_INT_EN 0x40 /* If set, PCI interrupt is enabled (r/w) */ -#define PLX_INTCSR_SOFT_INT 0x80 /* If set, a software interrupt is generated (r/w) */ - -/*============================================================================= - Bits for the PLX_ICR register - ===========================================================================*/ - -#define PLX_ICR_BIT_EEPROM_CLOCK_SET 0x01000000 -#define PLX_ICR_BIT_EEPROM_CHIP_SELECT 0x02000000 -#define PLX_ICR_BIT_EEPROM_WRITE 0x04000000 -#define PLX_ICR_BIT_EEPROM_READ 0x08000000 -#define PLX_ICR_BIT_EEPROM_VALID 0x10000000 - -#define PLX_ICR_MASK_EEPROM 0x1F000000 - -#define EEPROM_DELAY 1 - -/*============================================================================= - Bits for the ME4000_AO_CTRL_REG register - ===========================================================================*/ - -#define ME4000_AO_CTRL_BIT_MODE_0 0x001 -#define ME4000_AO_CTRL_BIT_MODE_1 0x002 -#define ME4000_AO_CTRL_MASK_MODE 0x003 -#define ME4000_AO_CTRL_BIT_STOP 0x004 -#define ME4000_AO_CTRL_BIT_ENABLE_FIFO 0x008 -#define ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG 0x010 -#define ME4000_AO_CTRL_BIT_EX_TRIG_EDGE 0x020 -#define ME4000_AO_CTRL_BIT_IMMEDIATE_STOP 0x080 -#define ME4000_AO_CTRL_BIT_ENABLE_DO 0x100 -#define ME4000_AO_CTRL_BIT_ENABLE_IRQ 0x200 -#define ME4000_AO_CTRL_BIT_RESET_IRQ 0x400 - -/*============================================================================= - Bits for the ME4000_AO_STATUS_REG register - ===========================================================================*/ - -#define ME4000_AO_STATUS_BIT_FSM 0x01 -#define ME4000_AO_STATUS_BIT_FF 0x02 -#define ME4000_AO_STATUS_BIT_HF 0x04 -#define ME4000_AO_STATUS_BIT_EF 0x08 - -/*============================================================================= - Bits for the ME4000_AI_CTRL_REG register - ===========================================================================*/ - -#define ME4000_AI_CTRL_BIT_MODE_0 0x00000001 -#define ME4000_AI_CTRL_BIT_MODE_1 0x00000002 -#define ME4000_AI_CTRL_BIT_MODE_2 0x00000004 -#define ME4000_AI_CTRL_BIT_SAMPLE_HOLD 0x00000008 -#define ME4000_AI_CTRL_BIT_IMMEDIATE_STOP 0x00000010 -#define ME4000_AI_CTRL_BIT_STOP 0x00000020 -#define ME4000_AI_CTRL_BIT_CHANNEL_FIFO 0x00000040 -#define ME4000_AI_CTRL_BIT_DATA_FIFO 0x00000080 -#define ME4000_AI_CTRL_BIT_FULLSCALE 0x00000100 -#define ME4000_AI_CTRL_BIT_OFFSET 0x00000200 -#define ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG 0x00000400 -#define ME4000_AI_CTRL_BIT_EX_TRIG 0x00000800 -#define ME4000_AI_CTRL_BIT_EX_TRIG_FALLING 0x00001000 -#define ME4000_AI_CTRL_BIT_EX_IRQ 0x00002000 -#define ME4000_AI_CTRL_BIT_EX_IRQ_RESET 0x00004000 -#define ME4000_AI_CTRL_BIT_LE_IRQ 0x00008000 -#define ME4000_AI_CTRL_BIT_LE_IRQ_RESET 0x00010000 -#define ME4000_AI_CTRL_BIT_HF_IRQ 0x00020000 -#define ME4000_AI_CTRL_BIT_HF_IRQ_RESET 0x00040000 -#define ME4000_AI_CTRL_BIT_SC_IRQ 0x00080000 -#define ME4000_AI_CTRL_BIT_SC_IRQ_RESET 0x00100000 -#define ME4000_AI_CTRL_BIT_SC_RELOAD 0x00200000 -#define ME4000_AI_CTRL_BIT_EX_TRIG_BOTH 0x80000000 - -/*============================================================================= - Bits for the ME4000_AI_STATUS_REG register - ===========================================================================*/ - -#define ME4000_AI_STATUS_BIT_EF_CHANNEL 0x00400000 -#define ME4000_AI_STATUS_BIT_HF_CHANNEL 0x00800000 -#define ME4000_AI_STATUS_BIT_FF_CHANNEL 0x01000000 -#define ME4000_AI_STATUS_BIT_EF_DATA 0x02000000 -#define ME4000_AI_STATUS_BIT_HF_DATA 0x04000000 -#define ME4000_AI_STATUS_BIT_FF_DATA 0x08000000 -#define ME4000_AI_STATUS_BIT_LE 0x10000000 -#define ME4000_AI_STATUS_BIT_FSM 0x20000000 - -/*============================================================================= - Bits for the ME4000_IRQ_STATUS_REG register - ===========================================================================*/ - -#define ME4000_IRQ_STATUS_BIT_EX 0x01 -#define ME4000_IRQ_STATUS_BIT_LE 0x02 -#define ME4000_IRQ_STATUS_BIT_AI_HF 0x04 -#define ME4000_IRQ_STATUS_BIT_AO_0_HF 0x08 -#define ME4000_IRQ_STATUS_BIT_AO_1_HF 0x10 -#define ME4000_IRQ_STATUS_BIT_AO_2_HF 0x20 -#define ME4000_IRQ_STATUS_BIT_AO_3_HF 0x40 -#define ME4000_IRQ_STATUS_BIT_SC 0x80 - -/*============================================================================= - Bits for the ME4000_DIO_CTRL_REG register - ===========================================================================*/ - -#define ME4000_DIO_CTRL_BIT_MODE_0 0x0001 -#define ME4000_DIO_CTRL_BIT_MODE_1 0x0002 -#define ME4000_DIO_CTRL_BIT_MODE_2 0x0004 -#define ME4000_DIO_CTRL_BIT_MODE_3 0x0008 -#define ME4000_DIO_CTRL_BIT_MODE_4 0x0010 -#define ME4000_DIO_CTRL_BIT_MODE_5 0x0020 -#define ME4000_DIO_CTRL_BIT_MODE_6 0x0040 -#define ME4000_DIO_CTRL_BIT_MODE_7 0x0080 - -#define ME4000_DIO_CTRL_BIT_FUNCTION_0 0x0100 -#define ME4000_DIO_CTRL_BIT_FUNCTION_1 0x0200 - -#define ME4000_DIO_CTRL_BIT_FIFO_HIGH_0 0x0400 -#define ME4000_DIO_CTRL_BIT_FIFO_HIGH_1 0x0800 -#define ME4000_DIO_CTRL_BIT_FIFO_HIGH_2 0x1000 -#define ME4000_DIO_CTRL_BIT_FIFO_HIGH_3 0x2000 - -/*============================================================================= - Information about the hardware capabilities - ===========================================================================*/ - -struct me4000_ao_info { - int count; - int fifo_count; -}; - -struct me4000_ai_info { - int count; - int sh_count; - int diff_count; - int ex_trig_analog; -}; - -struct me4000_dio_info { - int count; -}; - -struct me4000_cnt_info { - int count; -}; - -struct me4000_board { - const char *name; - unsigned short device_id; - struct me4000_ao_info ao; - struct me4000_ai_info ai; - struct me4000_dio_info dio; - struct me4000_cnt_info cnt; -}; - -#define thisboard ((const struct me4000_board *)dev->board_ptr) - -/*============================================================================= - Global board and subdevice information structures - ===========================================================================*/ - -struct me4000_ao_context { - int irq; - - unsigned long mirror; /* Store the last written value */ - - unsigned long ctrl_reg; - unsigned long status_reg; - unsigned long fifo_reg; - unsigned long single_reg; - unsigned long timer_reg; - unsigned long irq_status_reg; - unsigned long preload_reg; -}; - -struct me4000_ai_context { - int irq; - - unsigned long ctrl_reg; - unsigned long status_reg; - unsigned long channel_list_reg; - unsigned long data_reg; - unsigned long chan_timer_reg; - unsigned long chan_pre_timer_reg; - unsigned long scan_timer_low_reg; - unsigned long scan_timer_high_reg; - unsigned long scan_pre_timer_low_reg; - unsigned long scan_pre_timer_high_reg; - unsigned long start_reg; - unsigned long irq_status_reg; - unsigned long sample_counter_reg; -}; - -struct me4000_dio_context { - unsigned long dir_reg; - unsigned long ctrl_reg; - unsigned long port_0_reg; - unsigned long port_1_reg; - unsigned long port_2_reg; - unsigned long port_3_reg; -}; - -struct me4000_cnt_context { - unsigned long ctrl_reg; - unsigned long counter_0_reg; - unsigned long counter_1_reg; - unsigned long counter_2_reg; -}; - -struct me4000_info { - unsigned long plx_regbase; /* PLX configuration space base address */ - unsigned long me4000_regbase; /* Base address of the ME4000 */ - unsigned long timer_regbase; /* Base address of the timer circuit */ - unsigned long program_regbase; /* Base address to set the program pin for the xilinx */ - - unsigned long plx_regbase_size; /* PLX register set space */ - unsigned long me4000_regbase_size; /* ME4000 register set space */ - unsigned long timer_regbase_size; /* Timer circuit register set space */ - unsigned long program_regbase_size; /* Size of program base address of the ME4000 */ - - unsigned int serial_no; /* Serial number of the board */ - unsigned char hw_revision; /* Hardware revision of the board */ - unsigned short vendor_id; /* Meilhaus vendor id */ - unsigned short device_id; /* Device id */ - - struct pci_dev *pci_dev_p; /* General PCI information */ - - unsigned int irq; /* IRQ assigned from the PCI BIOS */ - - struct me4000_ai_context ai_context; /* Analog input specific context */ - struct me4000_ao_context ao_context[4]; /* Vector with analog output specific context */ - struct me4000_dio_context dio_context; /* Digital I/O specific context */ - struct me4000_cnt_context cnt_context; /* Counter specific context */ -}; - -#define info ((struct me4000_info *)dev->private) - -/*----------------------------------------------------------------------------- - Defines for analog input - ----------------------------------------------------------------------------*/ - -/* General stuff */ -#define ME4000_AI_FIFO_COUNT 2048 - -#define ME4000_AI_MIN_TICKS 66 -#define ME4000_AI_MIN_SAMPLE_TIME 2000 /* Minimum sample time [ns] */ -#define ME4000_AI_BASE_FREQUENCY (unsigned int) 33E6 - -/* Channel list defines and masks */ -#define ME4000_AI_CHANNEL_LIST_COUNT 1024 - -#define ME4000_AI_LIST_INPUT_SINGLE_ENDED 0x000 -#define ME4000_AI_LIST_INPUT_DIFFERENTIAL 0x020 - -#define ME4000_AI_LIST_RANGE_BIPOLAR_10 0x000 -#define ME4000_AI_LIST_RANGE_BIPOLAR_2_5 0x040 -#define ME4000_AI_LIST_RANGE_UNIPOLAR_10 0x080 -#define ME4000_AI_LIST_RANGE_UNIPOLAR_2_5 0x0C0 - -#define ME4000_AI_LIST_LAST_ENTRY 0x100 - -/*----------------------------------------------------------------------------- - Defines for counters - ----------------------------------------------------------------------------*/ - -#define ME4000_CNT_COUNTER_0 0x00 -#define ME4000_CNT_COUNTER_1 0x40 -#define ME4000_CNT_COUNTER_2 0x80 - -#define ME4000_CNT_MODE_0 0x00 /* Change state if zero crossing */ -#define ME4000_CNT_MODE_1 0x02 /* Retriggerable One-Shot */ -#define ME4000_CNT_MODE_2 0x04 /* Asymmetrical divider */ -#define ME4000_CNT_MODE_3 0x06 /* Symmetrical divider */ -#define ME4000_CNT_MODE_4 0x08 /* Counter start by software trigger */ -#define ME4000_CNT_MODE_5 0x0A /* Counter start by hardware trigger */ - -#endif diff --git a/trunk/drivers/staging/comedi/drivers/vmk80xx.c b/trunk/drivers/staging/comedi/drivers/vmk80xx.c index f9fef26db3aa..df277aa591bb 100644 --- a/trunk/drivers/staging/comedi/drivers/vmk80xx.c +++ b/trunk/drivers/staging/comedi/drivers/vmk80xx.c @@ -546,6 +546,7 @@ static int vmk80xx_ai_rinsn(struct comedi_device *cdev, reg[0] = VMK8055_AI2_REG; break; case VMK8061_MODEL: + default: reg[0] = VMK8061_AI_REG1; reg[1] = VMK8061_AI_REG2; dev->usb_tx_buf[0] = VMK8061_CMD_RD_AI; @@ -904,6 +905,7 @@ static int vmk80xx_cnt_rinsn(struct comedi_device *cdev, reg[0] = VMK8055_CNT2_REG; break; case VMK8061_MODEL: + default: reg[0] = VMK8061_CNT_REG; reg[1] = VMK8061_CNT_REG; dev->usb_tx_buf[0] = VMK8061_CMD_RD_CNT; diff --git a/trunk/drivers/staging/ipack/Kconfig b/trunk/drivers/staging/ipack/Kconfig index af321789dddb..4cf47066140c 100644 --- a/trunk/drivers/staging/ipack/Kconfig +++ b/trunk/drivers/staging/ipack/Kconfig @@ -4,6 +4,7 @@ menuconfig IPACK_BUS tristate "IndustryPack bus support" + depends on HAS_IOMEM ---help--- If you say Y here you get support for the IndustryPack Framework for drivers for many types of boards that support this industrial diff --git a/trunk/drivers/staging/ipack/bridges/tpci200.c b/trunk/drivers/staging/ipack/bridges/tpci200.c index b81a8c9a2fa9..302fc21670d7 100644 --- a/trunk/drivers/staging/ipack/bridges/tpci200.c +++ b/trunk/drivers/staging/ipack/bridges/tpci200.c @@ -14,10 +14,8 @@ #include #include "tpci200.h" -static struct ipack_bus_ops tpci200_bus_ops; - /* TPCI200 controls registers */ -static int control_reg[] = { +static const int control_reg[] = { TPCI200_CONTROL_A_REG, TPCI200_CONTROL_B_REG, TPCI200_CONTROL_C_REG, @@ -532,7 +530,7 @@ static void tpci200_uninstall(struct tpci200_board *tpci200) kfree(tpci200->slots); } -static struct ipack_bus_ops tpci200_bus_ops = { +static const struct ipack_bus_ops tpci200_bus_ops = { .map_space = tpci200_slot_map_space, .unmap_space = tpci200_slot_unmap_space, .request_irq = tpci200_request_irq, @@ -560,8 +558,8 @@ static int tpci200_install(struct tpci200_board *tpci200) return 0; } -static int tpci200_pciprobe(struct pci_dev *pdev, - const struct pci_device_id *id) +static int tpci200_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *id) { int ret, i; struct tpci200_board *tpci200; @@ -684,7 +682,7 @@ MODULE_DEVICE_TABLE(pci, tpci200_idtable); static struct pci_driver tpci200_pci_drv = { .name = "tpci200", .id_table = tpci200_idtable, - .probe = tpci200_pciprobe, + .probe = tpci200_pci_probe, .remove = __devexit_p(tpci200_pci_remove), }; diff --git a/trunk/drivers/staging/ipack/ipack.c b/trunk/drivers/staging/ipack/ipack.c index b3736c0a1086..af47772da515 100644 --- a/trunk/drivers/staging/ipack/ipack.c +++ b/trunk/drivers/staging/ipack/ipack.c @@ -31,7 +31,8 @@ static inline const struct ipack_device_id * ipack_match_one_device(const struct ipack_device_id *id, const struct ipack_device *device) { - if ((id->format == IPACK_ANY_ID || id->format == device->id_format) && + if ((id->format == IPACK_ANY_FORMAT || + id->format == device->id_format) && (id->vendor == IPACK_ANY_ID || id->vendor == device->id_vendor) && (id->device == IPACK_ANY_ID || id->device == device->id_device)) return id; @@ -208,7 +209,7 @@ static struct bus_type ipack_bus_type = { }; struct ipack_bus_device *ipack_bus_register(struct device *parent, int slots, - struct ipack_bus_ops *ops) + const struct ipack_bus_ops *ops) { int bus_nr; struct ipack_bus_device *bus; @@ -240,7 +241,7 @@ int ipack_bus_unregister(struct ipack_bus_device *bus) EXPORT_SYMBOL_GPL(ipack_bus_unregister); int ipack_driver_register(struct ipack_driver *edrv, struct module *owner, - char *name) + const char *name) { edrv->driver.owner = owner; edrv->driver.name = name; diff --git a/trunk/drivers/staging/ipack/ipack.h b/trunk/drivers/staging/ipack/ipack.h index 0f482fd205d9..4d73f75c26d2 100644 --- a/trunk/drivers/staging/ipack/ipack.h +++ b/trunk/drivers/staging/ipack/ipack.h @@ -134,7 +134,7 @@ struct ipack_bus_device { struct device *parent; int slots; int bus_nr; - struct ipack_bus_ops *ops; + const struct ipack_bus_ops *ops; }; /** @@ -148,7 +148,7 @@ struct ipack_bus_device { * available bus device in ipack. */ struct ipack_bus_device *ipack_bus_register(struct device *parent, int slots, - struct ipack_bus_ops *ops); + const struct ipack_bus_ops *ops); /** * ipack_bus_unregister -- unregister an ipack bus @@ -161,7 +161,8 @@ int ipack_bus_unregister(struct ipack_bus_device *bus); * Called by a ipack driver to register itself as a driver * that can manage ipack devices. */ -int ipack_driver_register(struct ipack_driver *edrv, struct module *owner, char *name); +int ipack_driver_register(struct ipack_driver *edrv, struct module *owner, + const char *name); void ipack_driver_unregister(struct ipack_driver *edrv); /** @@ -174,7 +175,8 @@ void ipack_driver_unregister(struct ipack_driver *edrv); * Register a new ipack device (mezzanine device). The call is done by * the carrier device driver. */ -struct ipack_device *ipack_device_register(struct ipack_bus_device *bus, int slot, int irqv); +struct ipack_device *ipack_device_register(struct ipack_bus_device *bus, + int slot, int irqv); void ipack_device_unregister(struct ipack_device *dev); /** diff --git a/trunk/drivers/staging/panel/panel.c b/trunk/drivers/staging/panel/panel.c index d9fec5b3faac..f7426b44ee08 100644 --- a/trunk/drivers/staging/panel/panel.c +++ b/trunk/drivers/staging/panel/panel.c @@ -757,38 +757,38 @@ static void lcd_backlight(int on) return; /* The backlight is activated by setting the AUTOFEED line to +5V */ - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); bits.bl = on; panel_set_bits(); - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); } /* send a command to the LCD panel in serial mode */ static void lcd_write_cmd_s(int cmd) { - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); lcd_send_serial(0x1F); /* R/W=W, RS=0 */ lcd_send_serial(cmd & 0x0F); lcd_send_serial((cmd >> 4) & 0x0F); udelay(40); /* the shortest command takes at least 40 us */ - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); } /* send data to the LCD panel in serial mode */ static void lcd_write_data_s(int data) { - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); lcd_send_serial(0x5F); /* R/W=W, RS=1 */ lcd_send_serial(data & 0x0F); lcd_send_serial((data >> 4) & 0x0F); udelay(40); /* the shortest data takes at least 40 us */ - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); } /* send a command to the LCD panel in 8 bits parallel mode */ static void lcd_write_cmd_p8(int cmd) { - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); /* present the data to the data port */ w_dtr(pprt, cmd); udelay(20); /* maintain the data during 20 us before the strobe */ @@ -804,13 +804,13 @@ static void lcd_write_cmd_p8(int cmd) set_ctrl_bits(); udelay(120); /* the shortest command takes at least 120 us */ - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); } /* send data to the LCD panel in 8 bits parallel mode */ static void lcd_write_data_p8(int data) { - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); /* present the data to the data port */ w_dtr(pprt, data); udelay(20); /* maintain the data during 20 us before the strobe */ @@ -826,27 +826,27 @@ static void lcd_write_data_p8(int data) set_ctrl_bits(); udelay(45); /* the shortest data takes at least 45 us */ - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); } /* send a command to the TI LCD panel */ static void lcd_write_cmd_tilcd(int cmd) { - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); /* present the data to the control port */ w_ctr(pprt, cmd); udelay(60); - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); } /* send data to the TI LCD panel */ static void lcd_write_data_tilcd(int data) { - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); /* present the data to the data port */ w_dtr(pprt, data); udelay(60); - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); } static void lcd_gotoxy(void) @@ -879,14 +879,14 @@ static void lcd_clear_fast_s(void) lcd_addr_x = lcd_addr_y = 0; lcd_gotoxy(); - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); for (pos = 0; pos < lcd_height * lcd_hwidth; pos++) { lcd_send_serial(0x5F); /* R/W=W, RS=1 */ lcd_send_serial(' ' & 0x0F); lcd_send_serial((' ' >> 4) & 0x0F); udelay(40); /* the shortest data takes at least 40 us */ } - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); lcd_addr_x = lcd_addr_y = 0; lcd_gotoxy(); @@ -899,7 +899,7 @@ static void lcd_clear_fast_p8(void) lcd_addr_x = lcd_addr_y = 0; lcd_gotoxy(); - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); for (pos = 0; pos < lcd_height * lcd_hwidth; pos++) { /* present the data to the data port */ w_dtr(pprt, ' '); @@ -921,7 +921,7 @@ static void lcd_clear_fast_p8(void) /* the shortest data takes at least 45 us */ udelay(45); } - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); lcd_addr_x = lcd_addr_y = 0; lcd_gotoxy(); @@ -934,14 +934,14 @@ static void lcd_clear_fast_tilcd(void) lcd_addr_x = lcd_addr_y = 0; lcd_gotoxy(); - spin_lock(&pprt_lock); + spin_lock_irq(&pprt_lock); for (pos = 0; pos < lcd_height * lcd_hwidth; pos++) { /* present the data to the data port */ w_dtr(pprt, ' '); udelay(60); } - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); lcd_addr_x = lcd_addr_y = 0; lcd_gotoxy(); @@ -1886,11 +1886,11 @@ static void panel_process_inputs(void) static void panel_scan_timer(void) { if (keypad_enabled && keypad_initialized) { - if (spin_trylock(&pprt_lock)) { + if (spin_trylock_irq(&pprt_lock)) { phys_scan_contacts(); /* no need for the parport anymore */ - spin_unlock(&pprt_lock); + spin_unlock_irq(&pprt_lock); } if (!inputs_stable || phys_curr != phys_prev) diff --git a/trunk/drivers/staging/ramster/zcache-main.c b/trunk/drivers/staging/ramster/zcache-main.c index 86e19d6d3b89..a09dd5cc1cea 100644 --- a/trunk/drivers/staging/ramster/zcache-main.c +++ b/trunk/drivers/staging/ramster/zcache-main.c @@ -449,16 +449,18 @@ static struct page *zcache_alloc_page(void) return page; } +#ifdef FRONTSWAP_HAS_UNUSE static void zcache_unacct_page(void) { zcache_pageframes_freed = atomic_inc_return(&zcache_pageframes_freed_atomic); } +#endif static void zcache_free_page(struct page *page) { long curr_pageframes; - static long max_pageframes, min_pageframes, total_freed; + static long max_pageframes, min_pageframes; if (page == NULL) BUG(); @@ -965,9 +967,10 @@ static struct page *zcache_evict_eph_pageframe(void) return page; } +#ifdef FRONTSWAP_HAS_UNUSE static void unswiz(struct tmem_oid oid, u32 index, unsigned *type, pgoff_t *offset); -#ifdef FRONTSWAP_HAS_UNUSE + /* * Choose an LRU persistent pageframe and attempt to "unuse" it by * calling frontswap_unuse on both zpages. @@ -1060,7 +1063,9 @@ static int shrink_zcache_memory(struct shrinker *shrink, int nr_evict = 0; int nr_unuse = 0; struct page *page; +#ifdef FRONTSWAP_HAS_UNUSE int unuse_ret; +#endif if (nr <= 0) goto skip_evict; @@ -1519,6 +1524,7 @@ static inline struct tmem_oid oswiz(unsigned type, u32 ind) return oid; } +#ifdef FRONTSWAP_HAS_UNUSE static void unswiz(struct tmem_oid oid, u32 index, unsigned *type, pgoff_t *offset) { @@ -1526,6 +1532,7 @@ static void unswiz(struct tmem_oid oid, u32 index, *offset = (pgoff_t)((index << SWIZ_BITS) | (oid.oid[0] & SWIZ_MASK)); } +#endif static int zcache_frontswap_put_page(unsigned type, pgoff_t offset, struct page *page) @@ -1535,7 +1542,6 @@ static int zcache_frontswap_put_page(unsigned type, pgoff_t offset, struct tmem_oid oid = oswiz(type, ind); int ret = -1; unsigned long flags; - int unuse_ret; BUG_ON(!PageLocked(page)); if (!disable_frontswap_ignore_nonactive && !PageWasActive(page)) { diff --git a/trunk/drivers/staging/rts_pstor/ms.c b/trunk/drivers/staging/rts_pstor/ms.c index 7cc2b53f20d0..16a5c16fb6ab 100644 --- a/trunk/drivers/staging/rts_pstor/ms.c +++ b/trunk/drivers/staging/rts_pstor/ms.c @@ -109,9 +109,8 @@ static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u16 s u8 val, err_code = 0; enum dma_data_direction dir; - if (!buf || !buf_len) { + if (!buf || !buf_len) TRACE_RET(chip, STATUS_FAIL); - } if (trans_mode == MS_TM_AUTO_READ) { dir = DMA_FROM_DEVICE; @@ -151,18 +150,17 @@ static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, u8 tpc, u16 s use_sg, dir, chip->mspro_timeout); if (retval < 0) { ms_set_err_code(chip, err_code); - if (retval == -ETIMEDOUT) { + if (retval == -ETIMEDOUT) retval = STATUS_TIMEDOUT; - } else { + else retval = STATUS_FAIL; - } + TRACE_RET(chip, retval); } RTSX_READ_REG(chip, MS_TRANS_CFG, &val); - if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) { + if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -173,9 +171,8 @@ static int ms_write_bytes(struct rtsx_chip *chip, struct ms_info *ms_card = &(chip->ms_card); int retval, i; - if (!data || (data_len < cnt)) { + if (!data || (data_len < cnt)) TRACE_RET(chip, STATUS_ERROR); - } rtsx_init_cmd(chip); @@ -183,9 +180,8 @@ static int ms_write_bytes(struct rtsx_chip *chip, rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, data[i]); } - if (cnt % 2) { + if (cnt % 2) rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF); - } rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); @@ -238,9 +234,8 @@ static int ms_read_bytes(struct rtsx_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *dat int retval, i; u8 *ptr; - if (!data) { + if (!data) TRACE_RET(chip, STATUS_ERROR); - } rtsx_init_cmd(chip); @@ -252,14 +247,13 @@ static int ms_read_bytes(struct rtsx_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *dat rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_READ_BYTES); rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END); - for (i = 0; i < data_len - 1; i++) { + for (i = 0; i < data_len - 1; i++) rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0); - } - if (data_len % 2) { + + if (data_len % 2) rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0); - } else { + else rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1, 0, 0); - } retval = rtsx_send_cmd(chip, MS_CARD, 5000); if (retval < 0) { @@ -293,9 +287,8 @@ static int ms_read_bytes(struct rtsx_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *dat ptr = rtsx_get_cmd_data(chip) + 1; - for (i = 0; i < data_len; i++) { + for (i = 0; i < data_len; i++) data[i] = ptr[i]; - } if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) { RTSX_DEBUGP("Read format progress:\n"); @@ -343,34 +336,31 @@ static int ms_set_init_para(struct rtsx_chip *chip) int retval; if (CHK_HG8BIT(ms_card)) { - if (chip->asic_code) { + if (chip->asic_code) ms_card->ms_clock = chip->asic_ms_hg_clk; - } else { + else ms_card->ms_clock = chip->fpga_ms_hg_clk; - } + } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) { - if (chip->asic_code) { + if (chip->asic_code) ms_card->ms_clock = chip->asic_ms_4bit_clk; - } else { + else ms_card->ms_clock = chip->fpga_ms_4bit_clk; - } + } else { - if (chip->asic_code) { + if (chip->asic_code) ms_card->ms_clock = chip->asic_ms_1bit_clk; - } else { + else ms_card->ms_clock = chip->fpga_ms_1bit_clk; - } } retval = switch_clock(chip, ms_card->ms_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = select_card(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -381,14 +371,12 @@ static int ms_switch_clock(struct rtsx_chip *chip) int retval; retval = select_card(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = switch_clock(chip, ms_card->ms_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -461,9 +449,8 @@ static int ms_pull_ctl_enable(struct rtsx_chip *chip) } retval = rtsx_send_cmd(chip, MS_CARD, 100); - if (retval < 0) { + if (retval < 0) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -482,40 +469,37 @@ static int ms_prepare_reset(struct rtsx_chip *chip) ms_card->pro_under_formatting = 0; retval = ms_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (!chip->ft2_fast_mode) wait_timeout(250); retval = enable_card_clock(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (chip->asic_code) { retval = ms_pull_ctl_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_MS_PULL_CTL_BIT | 0x20, 0); } if (!chip->ft2_fast_mode) { retval = card_power_on(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + wait_timeout(150); #ifdef SUPPORT_OCP - if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { + if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) oc_mask = MS_OC_NOW | MS_OC_EVER; - } else { + else oc_mask = SD_OC_NOW | SD_OC_EVER; - } + if (chip->ocp_stat & oc_mask) { RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n", chip->ocp_stat); @@ -539,9 +523,8 @@ static int ms_prepare_reset(struct rtsx_chip *chip) RTSX_WRITE_REG(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR); retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -553,26 +536,23 @@ static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) u8 val; retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG, 6, NO_WAIT_INT); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) break; - } } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val); RTSX_DEBUGP("Type register: 0x%x\n", val); if (val != 0x01) { - if (val != 0x02) { + if (val != 0x02) ms_card->check_ms_flow = 1; - } + TRACE_RET(chip, STATUS_FAIL); } @@ -587,11 +567,11 @@ static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) RTSX_DEBUGP("Class register: 0x%x\n", val); if (val == 0) { RTSX_READ_REG(chip, PPBUF_BASE2, &val); - if (val & WRT_PRTCT) { + if (val & WRT_PRTCT) chip->card_wp |= MS_CARD; - } else { + else chip->card_wp &= ~MS_CARD; - } + } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) { chip->card_wp |= MS_CARD; } else { @@ -606,11 +586,11 @@ static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) if (val == 0) { ms_card->ms_type &= 0x0F; } else if (val == 7) { - if (switch_8bit_bus) { + if (switch_8bit_bus) ms_card->ms_type |= MS_HG; - } else { + else ms_card->ms_type &= 0x0F; - } + } else { TRACE_RET(chip, STATUS_FAIL); } @@ -633,17 +613,15 @@ static int ms_confirm_cpu_startup(struct rtsx_chip *chip) for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) break; - } } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } - if (k > 100) { + if (k > 100) TRACE_RET(chip, STATUS_FAIL); - } + k++; wait_timeout(100); } while (!(val & INT_REG_CED)); @@ -653,16 +631,14 @@ static int ms_confirm_cpu_startup(struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } if (val & INT_REG_ERR) { - if (val & INT_REG_CMDNK) { + if (val & INT_REG_CMDNK) chip->card_wp |= (MS_CARD); - } else { + else TRACE_RET(chip, STATUS_FAIL); - } } /* -- end confirm CPU startup */ @@ -681,9 +657,8 @@ static int ms_switch_parallel_bus(struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -698,26 +673,22 @@ static int ms_switch_8bit_bus(struct rtsx_chip *chip) data[1] = 0; for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT, data, 2); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) break; - } } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_WRITE_REG(chip, MS_CFG, 0x98, MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING); ms_card->ms_type |= MS_8BIT; retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -730,19 +701,16 @@ static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus) for (i = 0; i < 3; i++) { retval = ms_prepare_reset(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_identify_media_type(chip, switch_8bit_bus); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_confirm_cpu_startup(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_switch_parallel_bus(chip); if (retval != STATUS_SUCCESS) { @@ -756,18 +724,16 @@ static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus) } } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } /* Switch MS-PRO into Parallel mode */ RTSX_WRITE_REG(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4); RTSX_WRITE_REG(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD); retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } /* If MSPro HG Card, We shall try to switch to 8-bit bus */ if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) { @@ -790,9 +756,8 @@ static int msxc_change_power(struct rtsx_chip *chip, u8 mode) ms_cleanup_work(chip); retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } buf[0] = 0; buf[1] = mode; @@ -802,19 +767,16 @@ static int msxc_change_power(struct rtsx_chip *chip, u8 mode) buf[5] = 0; retval = ms_write_bytes(chip, PRO_WRITE_REG , 6, NO_WAIT_INT, buf, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_READ_REG(chip, MS_TRANS_CFG, buf); - if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) { + if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -836,15 +798,14 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) #endif retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (CHK_MS8BIT(ms_card)) { + if (CHK_MS8BIT(ms_card)) data[0] = PARALLEL_8BIT_IF; - } else { + else data[0] = PARALLEL_4BIT_IF; - } + data[1] = 0; data[2] = 0x40; @@ -856,24 +817,21 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT, data, 8); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) break; - } } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } buf = kmalloc(64 * 512, GFP_KERNEL); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, STATUS_ERROR); - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) continue; - } + retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); if (retval != STATUS_SUCCESS) { kfree(buf); @@ -885,11 +843,10 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) } retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA, 0x40, WAIT_INT, 0, 0, buf, 64 * 512); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) break; - } else { + else rtsx_clear_ms_error(chip); - } } if (retval != STATUS_SUCCESS) { kfree(buf); @@ -963,9 +920,8 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) } #ifdef SUPPORT_MSXC - if (buf[cur_addr_off + 8] == 0x13) { + if (buf[cur_addr_off + 8] == 0x13) ms_card->ms_type |= MS_XC; - } #endif #ifdef SUPPORT_PCGL_1P18 found_sys_info = 1; @@ -1046,18 +1002,15 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) #ifdef SUPPORT_MSXC if (CHK_MSXC(ms_card)) { - if (class_code != 0x03) { + if (class_code != 0x03) TRACE_RET(chip, STATUS_FAIL); - } } else { - if (class_code != 0x02) { + if (class_code != 0x02) TRACE_RET(chip, STATUS_FAIL); - } } #else - if (class_code != 0x02) { + if (class_code != 0x02) TRACE_RET(chip, STATUS_FAIL); - } #endif if (device_type != 0x00) { @@ -1069,9 +1022,8 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) } } - if (sub_class & 0xC0) { + if (sub_class & 0xC0) TRACE_RET(chip, STATUS_FAIL); - } RTSX_DEBUGP("class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n", class_code, device_type, sub_class); @@ -1117,23 +1069,20 @@ static int reset_ms_pro(struct rtsx_chip *chip) if (retval != STATUS_SUCCESS) { if (ms_card->switch_8bit_fail) { retval = ms_pro_reset_flow(chip, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { TRACE_RET(chip, STATUS_FAIL); } } retval = ms_read_attribute_info(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } #ifdef XC_POWERCLASS - if (CHK_HG8BIT(ms_card)) { + if (CHK_HG8BIT(ms_card)) change_power_class = 0; - } if (change_power_class && CHK_MSXC(ms_card)) { u8 power_class_en = chip->ms_power_class_en; @@ -1141,11 +1090,10 @@ static int reset_ms_pro(struct rtsx_chip *chip) RTSX_DEBUGP("power_class_en = 0x%x\n", power_class_en); RTSX_DEBUGP("change_power_class = %d\n", change_power_class); - if (change_power_class) { + if (change_power_class) power_class_en &= (1 << (change_power_class - 1)); - } else { + else power_class_en = 0; - } if (power_class_en) { u8 power_class_mode = (ms_card->raw_sys_info[46] & 0x18) >> 3; @@ -1165,16 +1113,14 @@ static int reset_ms_pro(struct rtsx_chip *chip) #ifdef SUPPORT_MAGIC_GATE retval = mg_set_tpc_para_sub(chip, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } #endif - if (CHK_HG8BIT(ms_card)) { + if (CHK_HG8BIT(ms_card)) chip->card_bus_width[chip->card2lun[MS_CARD]] = 8; - } else { + else chip->card_bus_width[chip->card2lun[MS_CARD]] = 4; - } return STATUS_SUCCESS; } @@ -1185,14 +1131,12 @@ static int ms_read_status_reg(struct rtsx_chip *chip) u8 val[2]; retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) { ms_set_err_code(chip, MS_FLASH_READ_ERROR); @@ -1211,9 +1155,8 @@ static int ms_read_extra_data(struct rtsx_chip *chip, u8 val, data[10]; retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (CHK_MS4BIT(ms_card)) { /* Parallel interface */ @@ -1233,9 +1176,8 @@ static int ms_read_extra_data(struct rtsx_chip *chip, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); @@ -1244,15 +1186,14 @@ static int ms_read_extra_data(struct rtsx_chip *chip, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); TRACE_RET(chip, STATUS_FAIL); @@ -1260,20 +1201,18 @@ static int ms_read_extra_data(struct rtsx_chip *chip, if (val & INT_REG_CED) { if (val & INT_REG_ERR) { retval = ms_read_status_reg(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } } retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT, data, MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (buf && buf_len) { if (buf_len > MS_EXTRA_SIZE) @@ -1291,45 +1230,40 @@ static int ms_write_extra_data(struct rtsx_chip *chip, int retval, i; u8 val, data[16]; - if (!buf || (buf_len < MS_EXTRA_SIZE)) { + if (!buf || (buf_len < MS_EXTRA_SIZE)) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6 + MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(block_addr >> 8); data[3] = (u8)block_addr; data[4] = 0x40; data[5] = page_num; - for (i = 6; i < MS_EXTRA_SIZE + 6; i++) { + for (i = 6; i < MS_EXTRA_SIZE + 6; i++) data[i] = buf[i - 6]; - } retval = ms_write_bytes(chip, WRITE_REG , (6+MS_EXTRA_SIZE), NO_WAIT_INT, data, 16); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); TRACE_RET(chip, STATUS_FAIL); @@ -1352,15 +1286,14 @@ static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) u8 val, data[6]; retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(block_addr >> 8); data[3] = (u8)block_addr; @@ -1368,20 +1301,18 @@ static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) data[5] = page_num; retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); TRACE_RET(chip, STATUS_FAIL); @@ -1394,9 +1325,9 @@ static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) TRACE_RET(chip, STATUS_FAIL); } retval = ms_read_status_reg(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); - } + } else { if (!(val & INT_REG_BREQ)) { ms_set_err_code(chip, MS_BREQ_ERROR); @@ -1406,13 +1337,11 @@ static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) } retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) { + if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -1425,22 +1354,20 @@ static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk) u8 val, data[8], extra[MS_EXTRA_SIZE]; retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(phy_blk >> 8); data[3] = (u8)phy_blk; @@ -1450,20 +1377,17 @@ static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk) data[7] = 0xFF; retval = ms_write_bytes(chip, WRITE_REG , 7, NO_WAIT_INT, data, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1488,17 +1412,16 @@ static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk) u8 val, data[6]; retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(phy_blk >> 8); data[3] = (u8)phy_blk; @@ -1506,21 +1429,18 @@ static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk) data[5] = 0; retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ERASE_RTY: retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (val & INT_REG_CMDNK) { if (i < 3) { @@ -1546,9 +1466,8 @@ static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk) static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len) { - if (!extra || (extra_len < MS_EXTRA_SIZE)) { + if (!extra || (extra_len < MS_EXTRA_SIZE)) return; - } memset(extra, 0xFF, MS_EXTRA_SIZE); @@ -1583,9 +1502,8 @@ static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk, u8 sta } retval = ms_write_extra_data(chip, phy_blk, i, extra, MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -1603,27 +1521,23 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, RTSX_DEBUGP("start_page = %d, end_page = %d\n", start_page, end_page); retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_read_status_reg(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_READ_REG(chip, PPBUF_BASE2, &val); if (val & BUF_FULL) { retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (!(val & INT_REG_CED)) { ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); @@ -1640,17 +1554,16 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE); retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(old_blk >> 8); data[3] = (u8)old_blk; @@ -1658,20 +1571,17 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, data[5] = i; retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1689,15 +1599,14 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, } retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (uncorrect_flag) { ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE); - if (i == 0) { + if (i == 0) extra[0] &= 0xEF; - } + ms_write_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE); RTSX_DEBUGP("page %d : extra[0] = 0x%x\n", i, extra[0]); MS_SET_BAD_BLOCK_FLG(ms_card); @@ -1710,13 +1619,11 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT; rty_cnt++) { retval = ms_transfer_tpc(chip, MS_TM_NORMAL_WRITE, WRITE_PAGE_DATA, 0, NO_WAIT_INT); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) break; - } } - if (rty_cnt == MS_MAX_RETRY_COUNT) { + if (rty_cnt == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } } if (!(val & INT_REG_BREQ)) { @@ -1730,45 +1637,41 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, ms_set_err_code(chip, MS_NO_ERROR); - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(new_blk >> 8); data[3] = (u8)new_blk; data[4] = 0x20; data[5] = i; - if ((extra[0] & 0x60) != 0x60) { + if ((extra[0] & 0x60) != 0x60) data[6] = extra[0]; - } else { + else data[6] = 0xF8; - } + data[6 + 1] = 0xFF; data[6 + 2] = (u8)(log_blk >> 8); data[6 + 3] = (u8)log_blk; - for (j = 4; j <= MS_EXTRA_SIZE; j++) { + for (j = 4; j <= MS_EXTRA_SIZE; j++) data[6 + j] = 0xFF; - } retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), NO_WAIT_INT, data, 16); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1784,17 +1687,16 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, if (i == 0) { retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(old_blk >> 8); data[3] = (u8)old_blk; @@ -1804,20 +1706,17 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, data[7] = 0xFF; retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1848,28 +1747,24 @@ static int reset_ms(struct rtsx_chip *chip) #endif retval = ms_prepare_reset(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_card->ms_type |= TYPE_MS; retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_read_status_reg(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_READ_REG(chip, PPBUF_BASE2, &val); - if (val & WRT_PRTCT) { + if (val & WRT_PRTCT) chip->card_wp |= MS_CARD; - } else { + else chip->card_wp &= ~MS_CARD; - } i = 0; @@ -1913,21 +1808,18 @@ static int reset_ms(struct rtsx_chip *chip) } retval = ms_read_page(chip, ms_card->boot_block, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } /* Read MS system information as sys_info */ rtsx_init_cmd(chip); - for (i = 0; i < 96; i++) { + for (i = 0; i < 96; i++) rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0); - } retval = rtsx_send_cmd(chip, MS_CARD, 100); - if (retval < 0) { + if (retval < 0) TRACE_RET(chip, STATUS_FAIL); - } ptr = rtsx_get_cmd_data(chip); memcpy(ms_card->raw_sys_info, ptr, 96); @@ -1938,21 +1830,18 @@ static int reset_ms(struct rtsx_chip *chip) rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0); rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0); - for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3; reg_addr++) { + for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3; reg_addr++) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); - } - for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++) { + for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); - } rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0); rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0); retval = rtsx_send_cmd(chip, MS_CARD, 100); - if (retval < 0) { + if (retval < 0) TRACE_RET(chip, STATUS_FAIL); - } ptr = rtsx_get_cmd_data(chip); @@ -1975,9 +1864,8 @@ static int reset_ms(struct rtsx_chip *chip) goto RE_SEARCH; } - if ((ptr[14] == 1) || (ptr[14] == 3)) { + if ((ptr[14] == 1) || (ptr[14] == 3)) chip->card_wp |= MS_CARD; - } /* BLOCK_SIZE_0, BLOCK_SIZE_1 */ block_size = ((u16)ptr[6] << 8) | ptr[7]; @@ -2026,17 +1914,15 @@ static int reset_ms(struct rtsx_chip *chip) /* Switch I/F Mode */ if (ptr[15]) { retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_WRITE_REG(chip, PPBUF_BASE2, 0xFF, 0x88); RTSX_WRITE_REG(chip, PPBUF_BASE2 + 1, 0xFF, 0); retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG , 1, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_WRITE_REG(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT, MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT); @@ -2044,11 +1930,10 @@ static int reset_ms(struct rtsx_chip *chip) ms_card->ms_type |= MS_4BIT; } - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) chip->card_bus_width[chip->card2lun[MS_CARD]] = 4; - } else { + else chip->card_bus_width[chip->card2lun[MS_CARD]] = 1; - } return STATUS_SUCCESS; } @@ -2065,30 +1950,27 @@ static int ms_init_l2p_tbl(struct rtsx_chip *chip) size = ms_card->segment_cnt * sizeof(struct zone_entry); ms_card->segment = vzalloc(size); - if (ms_card->segment == NULL) { + if (ms_card->segment == NULL) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_read_page(chip, ms_card->boot_block, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, INIT_FAIL); - } reg_addr = PPBUF_BASE2; for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) { retval = rtsx_read_register(chip, reg_addr++, &val1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, INIT_FAIL); - } + retval = rtsx_read_register(chip, reg_addr++, &val2); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, INIT_FAIL); - } defect_block = ((u16)val1 << 8) | val2; - if (defect_block == 0xFFFF) { + if (defect_block == 0xFFFF) break; - } + seg_no = defect_block / 512; ms_card->segment[seg_no].defect_list[ms_card->segment[seg_no].disable_count++] = defect_block; } @@ -2141,9 +2023,8 @@ static void ms_set_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off, u16 return; segment = &(ms_card->segment[seg_no]); - if (segment->l2p_table) { + if (segment->l2p_table) segment->l2p_table[log_off] = phy_blk; - } } static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk) @@ -2156,9 +2037,9 @@ static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk) segment = &(ms_card->segment[seg_no]); segment->free_table[segment->set_index++] = phy_blk; - if (segment->set_index >= MS_FREE_TABLE_CNT) { + if (segment->set_index >= MS_FREE_TABLE_CNT) segment->set_index = 0; - } + segment->unused_blk_cnt++; } @@ -2175,9 +2056,9 @@ static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no) phy_blk = segment->free_table[segment->get_index]; segment->free_table[segment->get_index++] = 0xFFFF; - if (segment->get_index >= MS_FREE_TABLE_CNT) { + if (segment->get_index >= MS_FREE_TABLE_CNT) segment->get_index = 0; - } + segment->unused_blk_cnt--; return phy_blk; @@ -2199,27 +2080,27 @@ static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk, u16 log_off, u8 if (us1 != us2) { if (us1 == 0) { - if (!(chip->card_wp & MS_CARD)) { + if (!(chip->card_wp & MS_CARD)) ms_erase_block(chip, tmp_blk); - } + ms_set_unused_block(chip, tmp_blk); segment->l2p_table[log_off] = phy_blk; } else { - if (!(chip->card_wp & MS_CARD)) { + if (!(chip->card_wp & MS_CARD)) ms_erase_block(chip, phy_blk); - } + ms_set_unused_block(chip, phy_blk); } } else { if (phy_blk < tmp_blk) { - if (!(chip->card_wp & MS_CARD)) { + if (!(chip->card_wp & MS_CARD)) ms_erase_block(chip, phy_blk); - } + ms_set_unused_block(chip, phy_blk); } else { - if (!(chip->card_wp & MS_CARD)) { + if (!(chip->card_wp & MS_CARD)) ms_erase_block(chip, tmp_blk); - } + ms_set_unused_block(chip, tmp_blk); segment->l2p_table[log_off] = phy_blk; } @@ -2240,9 +2121,8 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) if (ms_card->segment == NULL) { retval = ms_init_l2p_tbl(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, retval); - } } if (ms_card->segment[seg_no].build_flag) { @@ -2250,27 +2130,24 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) return STATUS_SUCCESS; } - if (seg_no == 0) { + if (seg_no == 0) table_size = 494; - } else { + else table_size = 496; - } segment = &(ms_card->segment[seg_no]); if (segment->l2p_table == NULL) { segment->l2p_table = (u16 *)vmalloc(table_size * 2); - if (segment->l2p_table == NULL) { + if (segment->l2p_table == NULL) TRACE_GOTO(chip, BUILD_FAIL); - } } memset((u8 *)(segment->l2p_table), 0xff, table_size * 2); if (segment->free_table == NULL) { segment->free_table = (u16 *)vmalloc(MS_FREE_TABLE_CNT * 2); - if (segment->free_table == NULL) { + if (segment->free_table == NULL) TRACE_GOTO(chip, BUILD_FAIL); - } } memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2); @@ -2368,13 +2245,11 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) /* Logical Address Confirmation Process */ if (seg_no == ms_card->segment_cnt - 1) { - if (segment->unused_blk_cnt < 2) { + if (segment->unused_blk_cnt < 2) chip->card_wp |= MS_CARD; - } } else { - if (segment->unused_blk_cnt < 1) { + if (segment->unused_blk_cnt < 1) chip->card_wp |= MS_CARD; - } } if (chip->card_wp & MS_CARD) @@ -2388,9 +2263,9 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) return STATUS_SUCCESS; } retval = ms_init_page(chip, phy_blk, log_blk, 0, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, BUILD_FAIL); - } + segment->l2p_table[log_blk-ms_start_idx[seg_no]] = phy_blk; if (seg_no == ms_card->segment_cnt - 1) { if (segment->unused_blk_cnt < 2) { @@ -2419,16 +2294,14 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) phy_blk = ms_get_unused_block(chip, 0); retval = ms_copy_page(chip, tmp_blk, phy_blk, log_blk, 0, ms_card->page_off + 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } segment->l2p_table[log_blk] = phy_blk; retval = ms_set_bad_block(chip, tmp_blk); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } } } @@ -2458,14 +2331,12 @@ int reset_ms_card(struct rtsx_chip *chip) memset(ms_card, 0, sizeof(struct ms_info)); retval = enable_card_clock(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = select_card(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_card->ms_type = 0; @@ -2473,27 +2344,24 @@ int reset_ms_card(struct rtsx_chip *chip) if (retval != STATUS_SUCCESS) { if (ms_card->check_ms_flow) { retval = reset_ms(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { TRACE_RET(chip, STATUS_FAIL); } } retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (!CHK_MSPRO(ms_card)) { /* Build table for the last segment, * to check if L2P table block exists, erasing it */ retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } RTSX_DEBUGP("ms_card->ms_type = 0x%x\n", ms_card->ms_type); @@ -2520,9 +2388,8 @@ static int mspro_set_rw_cmd(struct rtsx_chip *chip, u32 start_sec, u16 sec_cnt, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -2556,21 +2423,18 @@ static inline int ms_auto_tune_clock(struct rtsx_chip *chip) RTSX_DEBUGP("--%s--\n", __func__); if (chip->asic_code) { - if (ms_card->ms_clock > 30) { + if (ms_card->ms_clock > 30) ms_card->ms_clock -= 20; - } } else { - if (ms_card->ms_clock == CLK_80) { + if (ms_card->ms_clock == CLK_80) ms_card->ms_clock = CLK_60; - } else if (ms_card->ms_clock == CLK_60) { + else if (ms_card->ms_clock == CLK_60) ms_card->ms_clock = CLK_40; - } } retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -2616,15 +2480,13 @@ static int mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, } retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (srb->sc_data_direction == DMA_FROM_DEVICE) { + if (srb->sc_data_direction == DMA_FROM_DEVICE) trans_mode = MS_TM_AUTO_READ; - } else { + else trans_mode = MS_TM_AUTO_WRITE; - } RTSX_READ_REG(chip, MS_TRANS_CFG, &val); @@ -2639,9 +2501,8 @@ static int mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, ms_card->total_sec_cnt = 0; if (val & MS_INT_BREQ) { retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); } @@ -2651,17 +2512,16 @@ static int mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, if (!ms_card->seq_mode) { ms_card->total_sec_cnt = 0; if (sector_cnt >= SEQ_START_CRITERIA) { - if ((ms_card->capacity - start_sector) > 0xFE00) { + if ((ms_card->capacity - start_sector) > 0xFE00) count = 0xFE00; - } else { + else count = (u16)(ms_card->capacity - start_sector); - } + if (count > sector_cnt) { - if (mode_2k) { + if (mode_2k) ms_card->seq_mode |= MODE_2K_SEQ; - } else { + else ms_card->seq_mode |= MODE_512_SEQ; - } } } else { count = sector_cnt; @@ -2686,9 +2546,9 @@ static int mspro_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, TRACE_RET(chip, STATUS_FAIL); } - if (val & MS_INT_BREQ) { + if (val & MS_INT_BREQ) ms_send_cmd(chip, PRO_STOP, WAIT_INT); - } + if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) { RTSX_DEBUGP("MSPro CRC error, tune clock!\n"); chip->rw_need_retry = 1; @@ -2739,11 +2599,10 @@ static int mspro_read_format_progress(struct rtsx_chip *chip, const int short_da TRACE_RET(chip, STATUS_FAIL); } - if (short_data_len >= 256) { + if (short_data_len >= 256) cnt = 0; - } else { + else cnt = (u8)short_data_len; - } retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, MS_NO_CHECK_INT); if (retval != STATUS_SUCCESS) { @@ -2778,9 +2637,8 @@ static int mspro_read_format_progress(struct rtsx_chip *chip, const int short_da ms_card->format_status = FORMAT_FAIL; TRACE_RET(chip, STATUS_FAIL); } - if (tmp & (MS_INT_CED | MS_INT_CMDNK | MS_INT_BREQ | MS_INT_ERR)) { + if (tmp & (MS_INT_CED | MS_INT_CMDNK | MS_INT_BREQ | MS_INT_ERR)) break; - } wait_timeout(1); } @@ -2843,14 +2701,12 @@ int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, int short_data_l RTSX_DEBUGP("--%s--\n", __func__); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } memset(buf, 0, 2); switch (short_data_len) { @@ -2874,25 +2730,22 @@ int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, int short_data_l if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } - if (quick_format) { + if (quick_format) para = 0x0000; - } else { + else para = 0x0001; - } + retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_READ_REG(chip, MS_TRANS_CFG, &tmp); - if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) { + if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) TRACE_RET(chip, STATUS_FAIL); - } if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) { ms_card->pro_under_formatting = 1; @@ -2930,15 +2783,14 @@ static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, u16 log_b } retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(phy_blk >> 8); data[3] = (u8)phy_blk; @@ -2950,16 +2802,14 @@ static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, u16 log_b if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ptr = buf; @@ -2972,9 +2822,9 @@ static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, u16 log_b } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); TRACE_RET(chip, STATUS_FAIL); @@ -3006,15 +2856,14 @@ static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, u16 log_b if (page_addr == (end_page - 1)) { if (!(val & INT_REG_CED)) { retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + if (!(val & INT_REG_CED)) { ms_set_err_code(chip, MS_FLASH_READ_ERROR); TRACE_RET(chip, STATUS_FAIL); @@ -3079,15 +2928,14 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, u16 new_ if (!start_page) { retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(old_blk >> 8); data[3] = (u8)old_blk; @@ -3097,74 +2945,66 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, u16 new_ data[7] = 0xFF; retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE)); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ms_set_err_code(chip, MS_NO_ERROR); - if (CHK_MS4BIT(ms_card)) { + if (CHK_MS4BIT(ms_card)) data[0] = 0x88; - } else { + else data[0] = 0x80; - } + data[1] = 0; data[2] = (u8)(new_blk >> 8); data[3] = (u8)new_blk; - if ((end_page - start_page) == 1) { + if ((end_page - start_page) == 1) data[4] = 0x20; - } else { + else data[4] = 0; - } + data[5] = start_page; data[6] = 0xF8; data[7] = 0xFF; data[8] = (u8)(log_blk >> 8); data[9] = (u8)log_blk; - for (i = 0x0A; i < 0x10; i++) { + for (i = 0x0A; i < 0x10; i++) data[i] = 0xFF; - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE, NO_WAIT_INT, data, 16); if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } ptr = buf; for (page_addr = start_page; page_addr < end_page; page_addr++) { @@ -3210,17 +3050,15 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, u16 new_ ms_set_err_code(chip, MS_TO_ERROR); rtsx_clear_ms_error(chip); - if (retval == -ETIMEDOUT) { + if (retval == -ETIMEDOUT) TRACE_RET(chip, STATUS_TIMEDOUT); - } else { + else TRACE_RET(chip, STATUS_FAIL); - } } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if ((end_page - start_page) == 1) { if (!(val & INT_REG_CED)) { @@ -3231,15 +3069,13 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, u16 new_ if (page_addr == (end_page - 1)) { if (!(val & INT_REG_CED)) { retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } if ((page_addr == (end_page - 1)) || (page_addr == ms_card->page_off)) { @@ -3266,9 +3102,8 @@ static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, retval = ms_copy_page(chip, old_blk, new_blk, log_blk, page_off, ms_card->page_off + 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } seg_no = old_blk >> 9; @@ -3277,9 +3112,8 @@ static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, ms_set_bad_block(chip, old_blk); } else { retval = ms_erase_block(chip, old_blk); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) ms_set_unused_block(chip, old_blk); - } } ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk); @@ -3294,9 +3128,8 @@ static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, if (start_page) { retval = ms_copy_page(chip, old_blk, new_blk, log_blk, 0, start_page); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -3311,17 +3144,15 @@ int ms_delay_write(struct rtsx_chip *chip) if (delay_write->delay_write_flag) { retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } delay_write->delay_write_flag = 0; retval = ms_finish_write(chip, delay_write->old_phyblock, delay_write->new_phyblock, delay_write->logblock, delay_write->pageoff); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -3330,11 +3161,10 @@ int ms_delay_write(struct rtsx_chip *chip) static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip) { - if (srb->sc_data_direction == DMA_FROM_DEVICE) { + if (srb->sc_data_direction == DMA_FROM_DEVICE) set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); - } else { + else set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR); - } } static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 sector_cnt) @@ -3449,11 +3279,11 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n", seg_no, old_blk, new_blk); while (total_sec_cnt) { - if ((start_page + total_sec_cnt) > (ms_card->page_off + 1)) { + if ((start_page + total_sec_cnt) > (ms_card->page_off + 1)) end_page = ms_card->page_off + 1; - } else { + else end_page = start_page + (u8)total_sec_cnt; - } + page_cnt = end_page - start_page; RTSX_DEBUGP("start_page = %d, end_page = %d, page_cnt = %d\n", @@ -3482,9 +3312,9 @@ static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 if (srb->sc_data_direction == DMA_TO_DEVICE) { if (end_page == (ms_card->page_off + 1)) { retval = ms_erase_block(chip, old_blk); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) ms_set_unused_block(chip, old_blk); - } + ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk); } } @@ -3565,11 +3395,10 @@ int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 s struct ms_info *ms_card = &(chip->ms_card); int retval; - if (CHK_MSPRO(ms_card)) { + if (CHK_MSPRO(ms_card)) retval = mspro_rw_multi_sector(srb, chip, start_sector, sector_cnt); - } else { + else retval = ms_rw_multi_sector(srb, chip, start_sector, sector_cnt); - } return retval; } @@ -3609,14 +3438,12 @@ static int ms_poll_int(struct rtsx_chip *chip) rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED); retval = rtsx_send_cmd(chip, MS_CARD, 5000); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } val = *rtsx_get_cmd_data(chip); - if (val & MS_INT_ERR) { + if (val & MS_INT_ERR) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -3678,9 +3505,8 @@ static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num) if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) TRACE_RET(chip, STATUS_FAIL); - } if (check_ms_err(chip)) { rtsx_clear_ms_error(chip); @@ -3697,14 +3523,13 @@ static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num RTSX_DEBUGP("--%s--\n", __func__); - if (type == 0) { + if (type == 0) retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1); - } else { + else retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); - } - if (retval != STATUS_SUCCESS) { + + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } buf[0] = 0; buf[1] = 0; @@ -3715,9 +3540,8 @@ static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, u8 mg_entry_num buf[5] = mg_entry_num; } retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6, NO_WAIT_INT, buf, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -3739,9 +3563,8 @@ int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = mg_send_ex_cmd(chip, MG_SET_LID, 0); if (retval != STATUS_SUCCESS) { @@ -3751,9 +3574,9 @@ int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip) memset(buf1, 0, 32); rtsx_stor_get_xfer_buf(buf2, min(12, (int)scsi_bufflen(srb)), srb); - for (i = 0; i < 8; i++) { + for (i = 0; i < 8; i++) buf1[8+i] = buf2[4+i]; - } + retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf1, 32); if (retval != STATUS_SUCCESS) { set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); @@ -3780,14 +3603,12 @@ int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } buf = kmalloc(1540, GFP_KERNEL); - if (!buf) { + if (!buf) TRACE_RET(chip, STATUS_ERROR); - } buf[0] = 0x04; buf[1] = 0x1A; @@ -3835,9 +3656,8 @@ int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = mg_send_ex_cmd(chip, MG_GET_ID, 0); if (retval != STATUS_SUCCESS) { @@ -3875,12 +3695,12 @@ int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) bufflen = min(12, (int)scsi_bufflen(srb)); rtsx_stor_get_xfer_buf(buf, bufflen, srb); - for (i = 0; i < 8; i++) { + for (i = 0; i < 8; i++) buf[i] = buf[4+i]; - } - for (i = 0; i < 24; i++) { + + for (i = 0; i < 24; i++) buf[8+i] = 0; - } + retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32); if (retval != STATUS_SUCCESS) { @@ -3911,9 +3731,8 @@ int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0); if (retval != STATUS_SUCCESS) { @@ -3968,9 +3787,8 @@ int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0); if (retval != STATUS_SUCCESS) { @@ -3981,12 +3799,12 @@ int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip) bufflen = min(12, (int)scsi_bufflen(srb)); rtsx_stor_get_xfer_buf(buf, bufflen, srb); - for (i = 0; i < 8; i++) { + for (i = 0; i < 8; i++) buf[i] = buf[4+i]; - } - for (i = 0; i < 24; i++) { + + for (i = 0; i < 24; i++) buf[8+i] = 0; - } + retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT, buf, 32); if (retval != STATUS_SUCCESS) { set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN); @@ -4016,14 +3834,12 @@ int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } buf = kmalloc(1028, GFP_KERNEL); - if (!buf) { + if (!buf) TRACE_RET(chip, STATUS_ERROR); - } buf[0] = 0x04; buf[1] = 0x02; @@ -4073,14 +3889,12 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } buf = kmalloc(1028, GFP_KERNEL); - if (!buf) { + if (!buf) TRACE_RET(chip, STATUS_ERROR); - } bufflen = min(1028, (int)scsi_bufflen(srb)); rtsx_stor_get_xfer_buf(buf, bufflen, srb); @@ -4088,11 +3902,10 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num); if (retval != STATUS_SUCCESS) { if (ms_card->mg_auth == 0) { - if ((buf[5] & 0xC0) != 0) { + if ((buf[5] & 0xC0) != 0) set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); - } else { + else set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); - } } else { set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); } @@ -4121,11 +3934,10 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) if ((retval < 0) || check_ms_err(chip)) { rtsx_clear_ms_error(chip); if (ms_card->mg_auth == 0) { - if ((buf[5] & 0xC0) != 0) { + if ((buf[5] & 0xC0) != 0) set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); - } else { + else set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); - } } else { set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); } @@ -4139,11 +3951,10 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) { rtsx_clear_ms_error(chip); if (ms_card->mg_auth == 0) { - if ((buf[5] & 0xC0) != 0) { + if ((buf[5] & 0xC0) != 0) set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB); - } else { + else set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); - } } else { set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR); } @@ -4187,14 +3998,13 @@ int ms_power_off_card3v3(struct rtsx_chip *chip) int retval; retval = disable_card_clock(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + if (chip->asic_code) { retval = ms_pull_ctl_disable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT); @@ -4202,9 +4012,8 @@ int ms_power_off_card3v3(struct rtsx_chip *chip) RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, 0); if (!chip->ft2_fast_mode) { retval = card_power_off(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -4234,9 +4043,8 @@ int release_ms_card(struct rtsx_chip *chip) #endif retval = ms_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } diff --git a/trunk/drivers/staging/rts_pstor/rtsx_scsi.c b/trunk/drivers/staging/rts_pstor/rtsx_scsi.c index 936b82ddd4e2..86c41b3a42a3 100644 --- a/trunk/drivers/staging/rts_pstor/rtsx_scsi.c +++ b/trunk/drivers/staging/rts_pstor/rtsx_scsi.c @@ -135,9 +135,9 @@ void scsi_show_command(struct scsi_cmnd *srb) default: what = "(unknown command)"; unknown_cmd = 1; break; } - if (srb->cmnd[0] != TEST_UNIT_READY) { + if (srb->cmnd[0] != TEST_UNIT_READY) RTSX_DEBUGP("Command %s (%d bytes)\n", what, srb->cmd_len); - } + if (unknown_cmd) { RTSX_DEBUGP(""); for (i = 0; i < srb->cmd_len && i < 16; i++) @@ -317,11 +317,11 @@ static int inquiry(struct scsi_cmnd *srb, struct rtsx_chip *chip) }; if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { - if (chip->lun2card[lun] == SD_CARD) { + if (chip->lun2card[lun] == SD_CARD) inquiry_string = inquiry_sd; - } else { + else inquiry_string = inquiry_ms; - } + } else if (CHECK_LUN_MODE(chip, SD_MS_1LUN)) { inquiry_string = inquiry_sdms; } else { @@ -329,9 +329,8 @@ static int inquiry(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = vmalloc(scsi_bufflen(srb)); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } #ifdef SUPPORT_MAGIC_GATE if ((chip->mspro_formatter_enable) && @@ -340,23 +339,21 @@ static int inquiry(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (chip->mspro_formatter_enable) #endif { - if (!card || (card == MS_CARD)) { + if (!card || (card == MS_CARD)) pro_formatter_flag = 1; - } } if (pro_formatter_flag) { - if (scsi_bufflen(srb) < 56) { + if (scsi_bufflen(srb) < 56) sendbytes = (unsigned char)(scsi_bufflen(srb)); - } else { + else sendbytes = 56; - } + } else { - if (scsi_bufflen(srb) < 36) { + if (scsi_bufflen(srb) < 36) sendbytes = (unsigned char)(scsi_bufflen(srb)); - } else { + else sendbytes = 36; - } } if (sendbytes > 8) { @@ -371,9 +368,8 @@ static int inquiry(struct scsi_cmnd *srb, struct rtsx_chip *chip) } if (pro_formatter_flag) { - if (sendbytes > 36) { + if (sendbytes > 36) memcpy(buf + 36, formatter_inquiry_str, sendbytes - 36); - } } scsi_set_resid(srb, 0); @@ -467,9 +463,8 @@ static int request_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = vmalloc(scsi_bufflen(srb)); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } tmp = (unsigned char *)sense; memcpy(buf, tmp, scsi_bufflen(srb)); @@ -494,15 +489,15 @@ static void ms_mode_sense(struct rtsx_chip *chip, u8 cmd, if (cmd == MODE_SENSE) { sys_info_offset = 8; - if (data_size > 0x68) { + if (data_size > 0x68) data_size = 0x68; - } + buf[i++] = 0x67; /* Mode Data Length */ } else { sys_info_offset = 12; - if (data_size > 0x6C) { + if (data_size > 0x6C) data_size = 0x6C; - } + buf[i++] = 0x00; /* Mode Data Length (MSB) */ buf[i++] = 0x6A; /* Mode Data Length (LSB) */ } @@ -520,11 +515,11 @@ static void ms_mode_sense(struct rtsx_chip *chip, u8 cmd, } /* WP */ - if (check_card_wp(chip, lun)) { + if (check_card_wp(chip, lun)) buf[i++] = 0x80; - } else { + else buf[i++] = 0x00; - } + } else { buf[i++] = 0x00; /* MediaType */ buf[i++] = 0x00; /* WP */ @@ -545,11 +540,10 @@ static void ms_mode_sense(struct rtsx_chip *chip, u8 cmd, if (data_size >= 11) buf[i++] = 0x00; /* No Access Control */ if (data_size >= 12) { - if (support_format) { + if (support_format) buf[i++] = 0xC0; /* SF, SGM */ - } else { + else buf[i++] = 0x00; - } } } else { /* The Following Data is the content of "Page 0x20" */ @@ -560,11 +554,10 @@ static void ms_mode_sense(struct rtsx_chip *chip, u8 cmd, if (data_size >= 7) buf[i++] = 0x00; /* No Access Control */ if (data_size >= 8) { - if (support_format) { + if (support_format) buf[i++] = 0xC0; /* SF, SGM */ - } else { + else buf[i++] = 0x00; - } } } @@ -600,9 +593,8 @@ static int mode_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) if ((chip->lun2card[lun] & MS_CARD)) { if (!card || (card == MS_CARD)) { dataSize = 108; - if (chip->mspro_formatter_enable) { + if (chip->mspro_formatter_enable) pro_formatter_flag = 1; - } } } #else @@ -615,9 +607,8 @@ static int mode_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) #endif buf = kmalloc(dataSize, GFP_KERNEL); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } pageCode = srb->cmnd[2] & 0x3f; @@ -632,11 +623,11 @@ static int mode_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) dataSize = 4; buf[0] = 0x03; buf[1] = 0x00; - if (check_card_wp(chip, lun)) { + if (check_card_wp(chip, lun)) buf[2] = 0x80; - } else { + else buf[2] = 0x00; - } + buf[3] = 0x00; } } else { @@ -648,11 +639,10 @@ static int mode_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) buf[0] = 0x00; buf[1] = 0x06; buf[2] = 0x00; - if (check_card_wp(chip, lun)) { + if (check_card_wp(chip, lun)) buf[3] = 0x80; - } else { + else buf[3] = 0x00; - } buf[4] = 0x00; buf[5] = 0x00; buf[6] = 0x00; @@ -759,11 +749,11 @@ static int read_write(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (chip->rw_fail_cnt[lun] == 3) { RTSX_DEBUGP("read/write fail three times in succession\n"); - if (srb->sc_data_direction == DMA_FROM_DEVICE) { + if (srb->sc_data_direction == DMA_FROM_DEVICE) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); - } else { + else set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); - } + TRACE_RET(chip, TRANSPORT_FAILED); } @@ -776,9 +766,8 @@ static int read_write(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (CHECK_PID(chip, 0x5209) && chip->max_payload) { u8 val = 0x10 | (chip->max_payload << 5); retval = rtsx_write_cfg_dw(chip, 0, 0x78, 0xFF, val); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_ERROR); - } } } @@ -789,11 +778,10 @@ static int read_write(struct scsi_cmnd *srb, struct rtsx_chip *chip) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); } else { chip->rw_fail_cnt[lun]++; - if (srb->sc_data_direction == DMA_FROM_DEVICE) { + if (srb->sc_data_direction == DMA_FROM_DEVICE) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); - } else { + else set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); - } } retval = TRANSPORT_FAILED; TRACE_GOTO(chip, Exit); @@ -808,9 +796,8 @@ static int read_write(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (srb->sc_data_direction == DMA_TO_DEVICE) { if (CHECK_PID(chip, 0x5209) && chip->max_payload) { retval = rtsx_write_cfg_dw(chip, 0, 0x78, 0xFF, 0x10); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_ERROR); - } } } @@ -837,9 +824,8 @@ static int read_format_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip) buf_len = (scsi_bufflen(srb) > 12) ? 0x14 : 12; buf = kmalloc(buf_len, GFP_KERNEL); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } buf[i++] = 0; buf[i++] = 0; @@ -864,22 +850,20 @@ static int read_format_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip) buf[i++] = (unsigned char)(card_size >> 8); buf[i++] = (unsigned char)card_size; - if (desc_cnt == 2) { + if (desc_cnt == 2) buf[i++] = 2; - } else { + else buf[i++] = 0; - } } else { buf[i++] = 0xFF; buf[i++] = 0xFF; buf[i++] = 0xFF; buf[i++] = 0xFF; - if (desc_cnt == 2) { + if (desc_cnt == 2) buf[i++] = 3; - } else { + else buf[i++] = 0; - } } buf[i++] = 0x00; @@ -916,9 +900,8 @@ static int read_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = kmalloc(8, GFP_KERNEL); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } card_size = get_card_size(chip, lun); buf[0] = (unsigned char)((card_size - 1) >> 24); @@ -956,9 +939,8 @@ static int read_eeprom(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5]; buf = (u8 *)vmalloc(len); - if (!buf) { + if (!buf) TRACE_RET(chip, TRANSPORT_ERROR); - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -1016,9 +998,8 @@ static int write_eeprom(struct scsi_cmnd *srb, struct rtsx_chip *chip) } else { len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len); buf = (u8 *)vmalloc(len); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -1061,9 +1042,8 @@ static int read_mem(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = (u8 *)vmalloc(len); - if (!buf) { + if (!buf) TRACE_RET(chip, TRANSPORT_ERROR); - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -1114,9 +1094,8 @@ static int write_mem(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len); buf = (u8 *)vmalloc(len); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -1200,16 +1179,15 @@ static int trace_msg_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) clear = srb->cmnd[2]; buf = (unsigned char *)vmalloc(scsi_bufflen(srb)); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } ptr = buf; - if (chip->trace_msg[chip->msg_idx].valid) { + if (chip->trace_msg[chip->msg_idx].valid) msg_cnt = TRACE_ITEM_CNT; - } else { + else msg_cnt = chip->msg_idx; - } + *(ptr++) = (u8)(msg_cnt >> 24); *(ptr++) = (u8)(msg_cnt >> 16); *(ptr++) = (u8)(msg_cnt >> 8); @@ -1225,15 +1203,14 @@ static int trace_msg_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) *(ptr++) = (u8)(chip->trace_msg[idx].line >> 8); *(ptr++) = (u8)(chip->trace_msg[idx].line); - for (j = 0; j < MSG_FUNC_LEN; j++) { + for (j = 0; j < MSG_FUNC_LEN; j++) *(ptr++) = chip->trace_msg[idx].func[j]; - } - for (j = 0; j < MSG_FILE_LEN; j++) { + + for (j = 0; j < MSG_FILE_LEN; j++) *(ptr++) = chip->trace_msg[idx].file[j]; - } - for (j = 0; j < TIME_VAL_LEN; j++) { + + for (j = 0; j < TIME_VAL_LEN; j++) *(ptr++) = chip->trace_msg[idx].timeval_buf[j]; - } } rtsx_stor_set_xfer_buf(buf, scsi_bufflen(srb), srb); @@ -1424,20 +1401,19 @@ static int dma_access_ring_buffer(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5]; len = min(len, (u16)scsi_bufflen(srb)); - if (srb->sc_data_direction == DMA_FROM_DEVICE) { + if (srb->sc_data_direction == DMA_FROM_DEVICE) RTSX_DEBUGP("Read from device\n"); - } else { + else RTSX_DEBUGP("Write to device\n"); - } retval = rtsx_transfer_data(chip, 0, scsi_sglist(srb), len, scsi_sg_count(srb), srb->sc_data_direction, 1000); if (retval < 0) { - if (srb->sc_data_direction == DMA_FROM_DEVICE) { + if (srb->sc_data_direction == DMA_FROM_DEVICE) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); - } else { + else set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); - } + TRACE_RET(chip, TRANSPORT_FAILED); } scsi_set_resid(srb, 0); @@ -1462,22 +1438,20 @@ static int get_dev_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) status[0] = (u8)(chip->product_id); status[1] = chip->ic_version; - if (chip->auto_delink_en) { + if (chip->auto_delink_en) status[2] = 0x10; - } else { + else status[2] = 0x00; - } status[3] = 20; status[4] = 10; status[5] = 05; status[6] = 21; - if (chip->card_wp) { + if (chip->card_wp) status[7] = 0x20; - } else { + else status[7] = 0x00; - } #ifdef SUPPORT_OCP status[8] = 0; @@ -1489,67 +1463,60 @@ static int get_dev_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) oc_ever_mask = SD_OC_EVER; } - if (chip->ocp_stat & oc_now_mask) { + if (chip->ocp_stat & oc_now_mask) status[8] |= 0x02; - } - if (chip->ocp_stat & oc_ever_mask) { + + if (chip->ocp_stat & oc_ever_mask) status[8] |= 0x01; - } #endif if (card == SD_CARD) { if (CHK_SD(sd_card)) { if (CHK_SD_HCXC(sd_card)) { - if (sd_card->capacity > 0x4000000) { + if (sd_card->capacity > 0x4000000) status[0x0E] = 0x02; - } else { + else status[0x0E] = 0x01; - } } else { status[0x0E] = 0x00; } - if (CHK_SD_SDR104(sd_card)) { + if (CHK_SD_SDR104(sd_card)) status[0x0F] = 0x03; - } else if (CHK_SD_DDR50(sd_card)) { + else if (CHK_SD_DDR50(sd_card)) status[0x0F] = 0x04; - } else if (CHK_SD_SDR50(sd_card)) { + else if (CHK_SD_SDR50(sd_card)) status[0x0F] = 0x02; - } else if (CHK_SD_HS(sd_card)) { + else if (CHK_SD_HS(sd_card)) status[0x0F] = 0x01; - } else { + else status[0x0F] = 0x00; - } } else { - if (CHK_MMC_SECTOR_MODE(sd_card)) { + if (CHK_MMC_SECTOR_MODE(sd_card)) status[0x0E] = 0x01; - } else { + else status[0x0E] = 0x00; - } - if (CHK_MMC_DDR52(sd_card)) { + if (CHK_MMC_DDR52(sd_card)) status[0x0F] = 0x03; - } else if (CHK_MMC_52M(sd_card)) { + else if (CHK_MMC_52M(sd_card)) status[0x0F] = 0x02; - } else if (CHK_MMC_26M(sd_card)) { + else if (CHK_MMC_26M(sd_card)) status[0x0F] = 0x01; - } else { + else status[0x0F] = 0x00; - } } } else if (card == MS_CARD) { if (CHK_MSPRO(ms_card)) { - if (CHK_MSXC(ms_card)) { + if (CHK_MSXC(ms_card)) status[0x0E] = 0x01; - } else { + else status[0x0E] = 0x00; - } - if (CHK_HG8BIT(ms_card)) { + if (CHK_HG8BIT(ms_card)) status[0x0F] = 0x01; - } else { + else status[0x0F] = 0x00; - } } } @@ -1600,37 +1567,35 @@ static int set_chip_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (phy_debug_mode) { chip->phy_debug_mode = 1; retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + rtsx_disable_bus_int(chip); retval = rtsx_read_phy_register(chip, 0x1C, ®); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + reg |= 0x0001; retval = rtsx_write_phy_register(chip, 0x1C, reg); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } } else { chip->phy_debug_mode = 0; retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0x77); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + rtsx_enable_bus_int(chip); retval = rtsx_read_phy_register(chip, 0x1C, ®); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + reg &= 0xFFFE; retval = rtsx_write_phy_register(chip, 0x1C, reg); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } } return TRANSPORT_GOOD; @@ -1737,9 +1702,8 @@ static int read_phy_register(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (len) { buf = (u8 *)vmalloc(len); - if (!buf) { + if (!buf) TRACE_RET(chip, TRANSPORT_ERROR); - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -1795,9 +1759,8 @@ static int write_phy_register(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len); buf = (u8 *)vmalloc(len); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -1886,9 +1849,8 @@ static int read_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = ((u16)srb->cmnd[6] << 8) | srb->cmnd[7]; buf = (u8 *)vmalloc(len); - if (!buf) { + if (!buf) TRACE_RET(chip, TRANSPORT_ERROR); - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -1934,9 +1896,8 @@ static int write_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len); buf = (u8 *)vmalloc(len); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -1980,9 +1941,8 @@ static int read_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = srb->cmnd[5]; buf = (u8 *)vmalloc(len); - if (!buf) { + if (!buf) TRACE_RET(chip, TRANSPORT_ERROR); - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -2029,9 +1989,8 @@ static int write_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (u8)min(scsi_bufflen(srb), (unsigned int)len); buf = (u8 *)vmalloc(len); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -2093,27 +2052,23 @@ static int write_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip) vfree(buf); retval = card_power_off(chip, SPI_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_ERROR); - } if (chip->asic_code) { retval = rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_OFF); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_ERROR); - } wait_timeout(600); retval = rtsx_write_phy_register(chip, 0x08, val); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_ERROR); - } retval = rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_ERROR); - } } return result; @@ -2140,11 +2095,10 @@ static int read_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip) RTSX_DEBUGP("%s: func = %d, addr = 0x%x, len = %d\n", __func__, func, addr, len); - if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) { + if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) func_max = 1; - } else { + else func_max = 0; - } if (func > func_max) { set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); @@ -2152,9 +2106,8 @@ static int read_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = (u8 *)vmalloc(len); - if (!buf) { + if (!buf) TRACE_RET(chip, TRANSPORT_ERROR); - } retval = rtsx_read_cfg_seq(chip, func, addr, buf, len); if (retval != STATUS_SUCCESS) { @@ -2193,11 +2146,10 @@ static int write_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip) RTSX_DEBUGP("%s: func = %d, addr = 0x%x\n", __func__, func, addr); - if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) { + if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) func_max = 1; - } else { + else func_max = 0; - } if (func > func_max) { set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); @@ -2206,9 +2158,8 @@ static int write_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (unsigned short)min(scsi_bufflen(srb), (unsigned int)len); buf = (u8 *)vmalloc(len); - if (!buf) { + if (!buf) TRACE_RET(chip, TRANSPORT_ERROR); - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -2328,63 +2279,56 @@ static int read_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) rtsx_status[4] = (u8)lun; if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { - if (chip->lun2card[lun] == SD_CARD) { + if (chip->lun2card[lun] == SD_CARD) rtsx_status[5] = 2; - } else { + else rtsx_status[5] = 3; - } } else { if (chip->card_exist) { - if (chip->card_exist & XD_CARD) { + if (chip->card_exist & XD_CARD) rtsx_status[5] = 4; - } else if (chip->card_exist & SD_CARD) { + else if (chip->card_exist & SD_CARD) rtsx_status[5] = 2; - } else if (chip->card_exist & MS_CARD) { + else if (chip->card_exist & MS_CARD) rtsx_status[5] = 3; - } else { + else rtsx_status[5] = 7; - } } else { rtsx_status[5] = 7; } } - if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { + if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) rtsx_status[6] = 2; - } else { + else rtsx_status[6] = 1; - } rtsx_status[7] = (u8)(chip->product_id); rtsx_status[8] = chip->ic_version; - if (check_card_exist(chip, lun)) { + if (check_card_exist(chip, lun)) rtsx_status[9] = 1; - } else { + else rtsx_status[9] = 0; - } - if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { + if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) rtsx_status[10] = 0; - } else { + else rtsx_status[10] = 1; - } if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { - if (chip->lun2card[lun] == SD_CARD) { + if (chip->lun2card[lun] == SD_CARD) rtsx_status[11] = SD_CARD; - } else { + else rtsx_status[11] = MS_CARD; - } } else { rtsx_status[11] = XD_CARD | SD_CARD | MS_CARD; } - if (check_card_ready(chip, lun)) { + if (check_card_ready(chip, lun)) rtsx_status[12] = 1; - } else { + else rtsx_status[12] = 0; - } if (get_lun_card(chip, lun) == XD_CARD) { rtsx_status[13] = 0x40; @@ -2421,29 +2365,26 @@ static int read_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) } else { if (CHECK_LUN_MODE(chip, DEFAULT_SINGLE)) { #ifdef SUPPORT_SDIO - if (chip->sd_io && chip->sd_int) { + if (chip->sd_io && chip->sd_int) rtsx_status[13] = 0x60; - } else { + else rtsx_status[13] = 0x70; - } #else rtsx_status[13] = 0x70; #endif } else { - if (chip->lun2card[lun] == SD_CARD) { + if (chip->lun2card[lun] == SD_CARD) rtsx_status[13] = 0x20; - } else { + else rtsx_status[13] = 0x30; - } } } rtsx_status[14] = 0x78; - if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) { + if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) rtsx_status[15] = 0x83; - } else { + else rtsx_status[15] = 0x82; - } buf_len = min(scsi_bufflen(srb), (unsigned int)sizeof(rtsx_status)); rtsx_stor_set_xfer_buf(rtsx_status, buf_len, srb); @@ -2538,9 +2479,8 @@ static int spi_vendor_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir); - if (result != STATUS_SUCCESS) { + if (result != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } return TRANSPORT_GOOD; } @@ -2610,13 +2550,12 @@ void led_shine(struct scsi_cmnd *srb, struct rtsx_chip *chip) unsigned int lun = SCSI_LUN(srb); u16 sec_cnt; - if ((srb->cmnd[0] == READ_10) || (srb->cmnd[0] == WRITE_10)) { + if ((srb->cmnd[0] == READ_10) || (srb->cmnd[0] == WRITE_10)) sec_cnt = ((u16)(srb->cmnd[7]) << 8) | srb->cmnd[8]; - } else if ((srb->cmnd[0] == READ_6) || (srb->cmnd[0] == WRITE_6)) { + else if ((srb->cmnd[0] == READ_6) || (srb->cmnd[0] == WRITE_6)) sec_cnt = srb->cmnd[4]; - } else { + else return; - } if (chip->rw_cap[lun] >= GPIO_TOGGLE_THRESHOLD) { toggle_gpio(chip, LED_GPIO); @@ -2659,11 +2598,10 @@ static int ms_format_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip) } rtsx_set_stat(chip, RTSX_STAT_RUN); - if (srb->cmnd[8] & 0x01) { + if (srb->cmnd[8] & 0x01) quick_format = 0; - } else { + else quick_format = 1; - } if (!(chip->card_ready & MS_CARD)) { set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); @@ -2724,27 +2662,25 @@ static int get_ms_information(struct scsi_cmnd *srb, struct rtsx_chip *chip) TRACE_RET(chip, TRANSPORT_FAILED); } - if (dev_info_id == 0x15) { + if (dev_info_id == 0x15) buf_len = data_len = 0x3A; - } else { + else buf_len = data_len = 0x6A; - } buf = kmalloc(buf_len, GFP_KERNEL); - if (!buf) { + if (!buf) TRACE_RET(chip, TRANSPORT_ERROR); - } i = 0; /* GET Memory Stick Media Information Response Header */ buf[i++] = 0x00; /* Data length MSB */ buf[i++] = data_len; /* Data length LSB */ /* Device Information Type Code */ - if (CHK_MSXC(ms_card)) { + if (CHK_MSXC(ms_card)) buf[i++] = 0x03; - } else { + else buf[i++] = 0x02; - } + /* SGM bit */ buf[i++] = 0x01; /* Reserved */ @@ -2759,11 +2695,11 @@ static int get_ms_information(struct scsi_cmnd *srb, struct rtsx_chip *chip) /* Device Information ID Number */ buf[i++] = dev_info_id; /* Device Information Length */ - if (dev_info_id == 0x15) { + if (dev_info_id == 0x15) data_len = 0x31; - } else { + else data_len = 0x61; - } + buf[i++] = 0x00; /* Data length MSB */ buf[i++] = data_len; /* Data length LSB */ /* Valid Bit */ @@ -2778,11 +2714,10 @@ static int get_ms_information(struct scsi_cmnd *srb, struct rtsx_chip *chip) rtsx_stor_set_xfer_buf(buf, buf_len, srb); - if (dev_info_id == 0x15) { + if (dev_info_id == 0x15) scsi_set_resid(srb, scsi_bufflen(srb)-0x3C); - } else { + else scsi_set_resid(srb, scsi_bufflen(srb)-0x6C); - } kfree(buf); return STATUS_SUCCESS; @@ -2793,13 +2728,11 @@ static int ms_sp_cmnd(struct scsi_cmnd *srb, struct rtsx_chip *chip) { int retval = TRANSPORT_ERROR; - if (srb->cmnd[2] == MS_FORMAT) { + if (srb->cmnd[2] == MS_FORMAT) retval = ms_format_cmnd(srb, chip); - } #ifdef SUPPORT_PCGL_1P18 - else if (srb->cmnd[2] == GET_MS_INFORMATION) { + else if (srb->cmnd[2] == GET_MS_INFORMATION) retval = get_ms_information(srb, chip); - } #endif return retval; @@ -2912,9 +2845,9 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x04) && (srb->cmnd[9] == 0x1C)) { retval = mg_get_local_EKB(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else { set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); TRACE_RET(chip, TRANSPORT_FAILED); @@ -2926,9 +2859,9 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x24)) { retval = mg_get_rsp_chg(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else { set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); TRACE_RET(chip, TRANSPORT_FAILED); @@ -2945,9 +2878,9 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[4] == 0x00) && (srb->cmnd[5] < 32)) { retval = mg_get_ICV(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else { set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); TRACE_RET(chip, TRANSPORT_FAILED); @@ -3014,9 +2947,9 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { retval = mg_set_leaf_id(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else { set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); TRACE_RET(chip, TRANSPORT_FAILED); @@ -3028,9 +2961,9 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { retval = mg_chg(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else { set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); TRACE_RET(chip, TRANSPORT_FAILED); @@ -3042,9 +2975,9 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { retval = mg_rsp(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else { set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); TRACE_RET(chip, TRANSPORT_FAILED); @@ -3061,9 +2994,9 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[4] == 0x00) && (srb->cmnd[5] < 32)) { retval = mg_set_ICV(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else { set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD); TRACE_RET(chip, TRANSPORT_FAILED); diff --git a/trunk/drivers/staging/rts_pstor/sd.c b/trunk/drivers/staging/rts_pstor/sd.c index 3cc9a489e4e8..c6a581c47cbc 100644 --- a/trunk/drivers/staging/rts_pstor/sd.c +++ b/trunk/drivers/staging/rts_pstor/sd.c @@ -192,9 +192,9 @@ static int sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, stat_idx = 16; } else if (rsp_type != SD_RSP_TYPE_R0) { - for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++) { + for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); - } + stat_idx = 5; } @@ -273,9 +273,8 @@ static int sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, if ((rsp_type == SD_RSP_TYPE_R1) || (rsp_type == SD_RSP_TYPE_R1b)) { if ((cmd_idx != SEND_RELATIVE_ADDR) && (cmd_idx != SEND_IF_COND)) { if (cmd_idx != STOP_TRANSMISSION) { - if (ptr[1] & 0x80) { + if (ptr[1] & 0x80) TRACE_RET(chip, STATUS_FAIL); - } } #ifdef SUPPORT_SD_LOCK if (ptr[1] & 0x7D) @@ -294,11 +293,10 @@ static int sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, RTSX_DEBUGP("ptr[3]: 0x%02x\n", ptr[3]); TRACE_RET(chip, STATUS_FAIL); } - if (ptr[3] & 0x01) { + if (ptr[3] & 0x01) sd_card->sd_data_buf_ready = 1; - } else { + else sd_card->sd_data_buf_ready = 0; - } } } @@ -322,17 +320,15 @@ static int sd_read_data(struct rtsx_chip *chip, if (!buf) buf_len = 0; - if (buf_len > 512) { + if (buf_len > 512) TRACE_RET(chip, STATUS_FAIL); - } rtsx_init_cmd(chip); if (cmd_len) { RTSX_DEBUGP("SD/MMC CMD %d\n", cmd[0] - 0x40); - for (i = 0; i < (cmd_len < 6 ? cmd_len : 6); i++) { + for (i = 0; i < (cmd_len < 6 ? cmd_len : 6); i++) rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0 + i, 0xFF, cmd[i]); - } } rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt); rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, (u8)(byte_cnt >> 8)); @@ -344,9 +340,9 @@ static int sd_read_data(struct rtsx_chip *chip, rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6); - if (trans_mode != SD_TM_AUTO_TUNING) { + if (trans_mode != SD_TM_AUTO_TUNING) rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); - } + rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF, trans_mode | SD_TRANSFER_START); rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END); @@ -362,9 +358,8 @@ static int sd_read_data(struct rtsx_chip *chip, if (buf && buf_len) { retval = rtsx_read_ppbuf(chip, buf, buf_len); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -390,9 +385,8 @@ static int sd_write_data(struct rtsx_chip *chip, u8 trans_mode, if (buf && buf_len) { retval = rtsx_write_ppbuf(chip, buf, buf_len); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } rtsx_init_cmd(chip); @@ -450,15 +444,13 @@ static int sd_check_csd(struct rtsx_chip *chip, char check_wp) break; } - if (i == 6) { + if (i == 6) TRACE_RET(chip, STATUS_FAIL); - } memcpy(sd_card->raw_csd, rsp + 1, 15); - if (CHECK_PID(chip, 0x5209)) { + if (CHECK_PID(chip, 0x5209)) RTSX_READ_REG(chip, REG_SD_CMD5, sd_card->raw_csd + 15); - } RTSX_DEBUGP("CSD Response:\n"); RTSX_DUMP(sd_card->raw_csd, 16); @@ -469,35 +461,34 @@ static int sd_check_csd(struct rtsx_chip *chip, char check_wp) trans_speed = rsp[4]; if ((trans_speed & 0x07) == 0x02) { if ((trans_speed & 0xf8) >= 0x30) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = 47; - } else { + else sd_card->sd_clock = CLK_50; - } + } else if ((trans_speed & 0xf8) == 0x28) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = 39; - } else { + else sd_card->sd_clock = CLK_40; - } + } else if ((trans_speed & 0xf8) == 0x20) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = 29; - } else { + else sd_card->sd_clock = CLK_30; - } + } else if ((trans_speed & 0xf8) >= 0x10) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = 23; - } else { + else sd_card->sd_clock = CLK_20; - } + } else if ((trans_speed & 0x08) >= 0x08) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = 19; - } else { + else sd_card->sd_clock = CLK_20; - } } else { TRACE_RET(chip, STATUS_FAIL); } @@ -527,9 +518,9 @@ static int sd_check_csd(struct rtsx_chip *chip, char check_wp) } if (check_wp) { - if (rsp[15] & 0x30) { + if (rsp[15] & 0x30) chip->card_wp |= SD_CARD; - } + RTSX_DEBUGP("CSD WP Status: 0x%x\n", rsp[15]); } @@ -568,22 +559,21 @@ static int sd_set_sample_push_timing(struct rtsx_chip *chip) CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1); RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0); - if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_AUTO) { + if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_AUTO) val = SD20_TX_NEG_EDGE; - } else if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY) { + else if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY) val = SD20_TX_14_AHEAD; - } else { + else val = SD20_TX_NEG_EDGE; - } + RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, SD20_TX_SEL_MASK, val); if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) { if (chip->asic_code) { - if (CHK_SD_HS(sd_card) || CHK_MMC_52M(sd_card)) { + if (CHK_SD_HS(sd_card) || CHK_MMC_52M(sd_card)) val = SD20_RX_14_DELAY; - } else { + else val = SD20_RX_POS_EDGE; - } } else { val = SD20_RX_14_DELAY; } @@ -597,32 +587,28 @@ static int sd_set_sample_push_timing(struct rtsx_chip *chip) } else { u8 val = 0; - if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY) { + if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY) val |= 0x10; - } if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) { if (chip->asic_code) { if (CHK_SD_HS(sd_card) || CHK_MMC_52M(sd_card)) { - if (val & 0x10) { + if (val & 0x10) val |= 0x04; - } else { + else val |= 0x08; - } } } else { - if (val & 0x10) { + if (val & 0x10) val |= 0x04; - } else { + else val |= 0x08; - } } } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_DELAY) { - if (val & 0x10) { + if (val & 0x10) val |= 0x04; - } else { + else val |= 0x08; - } } RTSX_WRITE_REG(chip, REG_SD_CFG1, 0x1C, val); @@ -636,41 +622,40 @@ static void sd_choose_proper_clock(struct rtsx_chip *chip) struct sd_info *sd_card = &(chip->sd_card); if (CHK_SD_SDR104(sd_card)) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = chip->asic_sd_sdr104_clk; - } else { + else sd_card->sd_clock = chip->fpga_sd_sdr104_clk; - } + } else if (CHK_SD_DDR50(sd_card)) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = chip->asic_sd_ddr50_clk; - } else { + else sd_card->sd_clock = chip->fpga_sd_ddr50_clk; - } + } else if (CHK_SD_SDR50(sd_card)) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = chip->asic_sd_sdr50_clk; - } else { + else sd_card->sd_clock = chip->fpga_sd_sdr50_clk; - } + } else if (CHK_SD_HS(sd_card)) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = chip->asic_sd_hs_clk; - } else { + else sd_card->sd_clock = chip->fpga_sd_hs_clk; - } + } else if (CHK_MMC_52M(sd_card) || CHK_MMC_DDR52(sd_card)) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = chip->asic_mmc_52m_clk; - } else { + else sd_card->sd_clock = chip->fpga_mmc_52m_clk; - } + } else if (CHK_MMC_26M(sd_card)) { - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = 48; - } else { + else sd_card->sd_clock = CLK_50; - } } } @@ -683,13 +668,12 @@ static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div) val = clk_div; } else { mask = 0x60; - if (clk_div == SD_CLK_DIVIDE_0) { + if (clk_div == SD_CLK_DIVIDE_0) val = 0x00; - } else if (clk_div == SD_CLK_DIVIDE_128) { + else if (clk_div == SD_CLK_DIVIDE_128) val = 0x40; - } else if (clk_div == SD_CLK_DIVIDE_256) { + else if (clk_div == SD_CLK_DIVIDE_256) val = 0x20; - } } RTSX_WRITE_REG(chip, REG_SD_CFG1, mask, val); @@ -703,16 +687,14 @@ static int sd_set_init_para(struct rtsx_chip *chip) int retval; retval = sd_set_sample_push_timing(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } sd_choose_proper_clock(chip); retval = switch_clock(chip, sd_card->sd_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -735,9 +717,8 @@ int sd_select_card(struct rtsx_chip *chip, int select) } retval = sd_send_cmd_get_rsp(chip, cmd_idx, addr, cmd_type, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -750,21 +731,18 @@ static int sd_update_lock_status(struct rtsx_chip *chip) u8 rsp[5]; retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, rsp, 5); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (rsp[1] & 0x02) { + if (rsp[1] & 0x02) sd_card->sd_lock_status |= SD_LOCKED; - } else { + else sd_card->sd_lock_status &= ~SD_LOCKED; - } RTSX_DEBUGP("sd_card->sd_lock_status = 0x%x\n", sd_card->sd_lock_status); - if (rsp[1] & 0x01) { + if (rsp[1] & 0x01) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -779,13 +757,11 @@ static int sd_wait_state_data_ready(struct rtsx_chip *chip, u8 state, u8 data_re for (i = 0; i < polling_cnt; i++) { retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, rsp, 5); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (((rsp[3] & 0x1E) == state) && ((rsp[3] & 0x01) == data_ready)) { + if (((rsp[3] & 0x1E) == state) && ((rsp[3] & 0x01) == data_ready)) return STATUS_SUCCESS; - } } TRACE_RET(chip, STATUS_FAIL); @@ -798,18 +774,16 @@ static int sd_change_bank_voltage(struct rtsx_chip *chip, u8 voltage) if (voltage == SD_IO_3V3) { if (chip->asic_code) { retval = rtsx_write_phy_register(chip, 0x08, 0x4FC0 | chip->phy_voltage); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { RTSX_WRITE_REG(chip, SD_PAD_CTL, SD_IO_USING_1V8, 0); } } else if (voltage == SD_IO_1V8) { if (chip->asic_code) { retval = rtsx_write_phy_register(chip, 0x08, 0x4C40 | chip->phy_voltage); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { RTSX_WRITE_REG(chip, SD_PAD_CTL, SD_IO_USING_1V8, SD_IO_USING_1V8); } @@ -828,9 +802,8 @@ static int sd_voltage_switch(struct rtsx_chip *chip) RTSX_WRITE_REG(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, SD_CLK_TOGGLE_EN); retval = sd_send_cmd_get_rsp(chip, VOLTAGE_SWITCH, 0, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } udelay(chip->sd_voltage_switch_delay); @@ -842,9 +815,9 @@ static int sd_voltage_switch(struct rtsx_chip *chip) RTSX_WRITE_REG(chip, SD_BUS_STAT, 0xFF, SD_CLK_FORCE_STOP); retval = sd_change_bank_voltage(chip, SD_IO_1V8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + wait_timeout(50); RTSX_WRITE_REG(chip, SD_BUS_STAT, 0xFF, SD_CLK_TOGGLE_EN); @@ -893,9 +866,8 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir) if (tune_dir == TUNE_RX) { SD_VP_CTL = SD_VPRX_CTL; SD_DCMPS_CTL = SD_DCMPS_RX_CTL; - if (CHK_SD_DDR50(sd_card)) { + if (CHK_SD_DDR50(sd_card)) ddr_rx = 1; - } } else { SD_VP_CTL = SD_VPTX_CTL; SD_DCMPS_CTL = SD_DCMPS_TX_CTL; @@ -932,23 +904,22 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir) rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE, DCMPS_CHANGE); rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE_DONE, DCMPS_CHANGE_DONE); retval = rtsx_send_cmd(chip, SD_CARD, 100); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, Fail); - } val = *rtsx_get_cmd_data(chip); - if (val & DCMPS_ERROR) { + if (val & DCMPS_ERROR) TRACE_GOTO(chip, Fail); - } - if ((val & DCMPS_CURRENT_PHASE) != sample_point) { + + if ((val & DCMPS_CURRENT_PHASE) != sample_point) TRACE_GOTO(chip, Fail); - } + RTSX_WRITE_REG(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0); - if (ddr_rx) { + if (ddr_rx) RTSX_WRITE_REG(chip, SD_VP_CTL, PHASE_CHANGE, 0); - } else { + else RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, 0); - } + udelay(50); } @@ -978,9 +949,8 @@ static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width) u8 cmd[5], buf[8]; retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } cmd[0] = 0x40 | SEND_SCR; cmd[1] = 0; @@ -996,9 +966,8 @@ static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width) memcpy(sd_card->raw_scr, buf, 8); - if ((buf[0] & 0x0F) == 0) { + if ((buf[0] & 0x0F) == 0) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -1172,13 +1141,12 @@ static int sd_check_switch_mode(struct rtsx_chip *chip, u8 mode, */ u16 cc = ((u16)buf[0] << 8) | buf[1]; RTSX_DEBUGP("Maximum current consumption: %dmA\n", cc); - if ((cc == 0) || (cc > 800)) { + if ((cc == 0) || (cc > 800)) TRACE_RET(chip, STATUS_FAIL); - } + retval = sd_query_switch_result(chip, func_group, func_to_switch, buf, 64); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if ((cc > 400) || (func_to_switch > CURRENT_LIMIT_400)) { RTSX_WRITE_REG(chip, OCPPARA2, SD_OCP_THD_MASK, chip->sd_800mA_ocp_thd); @@ -1192,13 +1160,12 @@ static int sd_check_switch_mode(struct rtsx_chip *chip, u8 mode, static u8 downgrade_switch_mode(u8 func_group, u8 func_to_switch) { if (func_group == SD_FUNC_GROUP_1) { - if (func_to_switch > HS_SUPPORT) { + if (func_to_switch > HS_SUPPORT) func_to_switch--; - } + } else if (func_group == SD_FUNC_GROUP_4) { - if (func_to_switch > CURRENT_LIMIT_200) { + if (func_to_switch > CURRENT_LIMIT_200) func_to_switch--; - } } return func_to_switch; @@ -1241,9 +1208,8 @@ static int sd_check_switch(struct rtsx_chip *chip, wait_timeout(20); } - if (!switch_good) { + if (!switch_good) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -1258,9 +1224,8 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) /* Get supported functions */ retval = sd_check_switch_mode(chip, SD_CHECK_MODE, NO_ARGUMENT, NO_ARGUMENT, bus_width); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } sd_card->func_group1_mask &= ~(sd_card->sd_switch_fail); @@ -1289,9 +1254,9 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) break; case HS_SUPPORT: - if (sd_card->func_group1_mask & HS_SUPPORT_MASK) { + if (sd_card->func_group1_mask & HS_SUPPORT_MASK) func_to_switch = HS_SUPPORT; - } + break; default: @@ -1299,9 +1264,9 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) } - if (func_to_switch) { + if (func_to_switch) break; - } + } RTSX_DEBUGP("SD_FUNC_GROUP_1: func_to_switch = 0x%02x", func_to_switch); @@ -1330,23 +1295,21 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) TRACE_RET(chip, STATUS_FAIL); } - if (func_to_switch == SDR104_SUPPORT) { + if (func_to_switch == SDR104_SUPPORT) SET_SD_SDR104(sd_card); - } else if (func_to_switch == DDR50_SUPPORT) { + else if (func_to_switch == DDR50_SUPPORT) SET_SD_DDR50(sd_card); - } else if (func_to_switch == SDR50_SUPPORT) { + else if (func_to_switch == SDR50_SUPPORT) SET_SD_SDR50(sd_card); - } else { + else SET_SD_HS(sd_card); - } } if (CHK_SD_DDR50(sd_card)) { RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, 0x06, 0x04); retval = sd_set_sample_push_timing(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } if (!func_to_switch || (func_to_switch == HS_SUPPORT)) { @@ -1362,36 +1325,35 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) for (i = 0; i < 4; i++) { switch ((u8)(chip->sd_current_prior >> (i*8))) { case CURRENT_LIMIT_800: - if (sd_card->func_group4_mask & CURRENT_LIMIT_800_MASK) { + if (sd_card->func_group4_mask & CURRENT_LIMIT_800_MASK) func_to_switch = CURRENT_LIMIT_800; - } + break; case CURRENT_LIMIT_600: - if (sd_card->func_group4_mask & CURRENT_LIMIT_600_MASK) { + if (sd_card->func_group4_mask & CURRENT_LIMIT_600_MASK) func_to_switch = CURRENT_LIMIT_600; - } + break; case CURRENT_LIMIT_400: - if (sd_card->func_group4_mask & CURRENT_LIMIT_400_MASK) { + if (sd_card->func_group4_mask & CURRENT_LIMIT_400_MASK) func_to_switch = CURRENT_LIMIT_400; - } + break; case CURRENT_LIMIT_200: - if (sd_card->func_group4_mask & CURRENT_LIMIT_200_MASK) { + if (sd_card->func_group4_mask & CURRENT_LIMIT_200_MASK) func_to_switch = CURRENT_LIMIT_200; - } + break; default: continue; } - if (func_to_switch != 0xFF) { + if (func_to_switch != 0xFF) break; - } } RTSX_DEBUGP("SD_FUNC_GROUP_4: func_to_switch = 0x%02x", func_to_switch); @@ -1399,16 +1361,14 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) if (func_to_switch <= CURRENT_LIMIT_800) { retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch, bus_width); if (retval != STATUS_SUCCESS) { - if (sd_check_err_code(chip, SD_NO_CARD)) { + if (sd_check_err_code(chip, SD_NO_CARD)) TRACE_RET(chip, STATUS_FAIL); - } } RTSX_DEBUGP("Switch current limit finished! (%d)\n", retval); } - if (CHK_SD_DDR50(sd_card)) { + if (CHK_SD_DDR50(sd_card)) RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, 0x06, 0); - } return STATUS_SUCCESS; } @@ -1438,9 +1398,8 @@ static int sd_sdr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) u8 cmd[5]; retval = sd_change_phase(chip, sample_point, TUNE_RX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } cmd[0] = 0x40 | SEND_TUNING_PATTERN; cmd[1] = 0; @@ -1467,16 +1426,14 @@ static int sd_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) u8 cmd[5]; retval = sd_change_phase(chip, sample_point, TUNE_RX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_DEBUGP("sd ddr tuning rx\n"); retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } cmd[0] = 0x40 | SD_STATUS; cmd[1] = 0; @@ -1502,18 +1459,16 @@ static int mmc_ddr_tunning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) int retval; u8 cmd[5], bus_width; - if (CHK_MMC_8BIT(sd_card)) { + if (CHK_MMC_8BIT(sd_card)) bus_width = SD_BUS_WIDTH_8; - } else if (CHK_MMC_4BIT(sd_card)) { + else if (CHK_MMC_4BIT(sd_card)) bus_width = SD_BUS_WIDTH_4; - } else { + else bus_width = SD_BUS_WIDTH_1; - } retval = sd_change_phase(chip, sample_point, TUNE_RX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_DEBUGP("mmc ddr tuning rx\n"); @@ -1541,9 +1496,8 @@ static int sd_sdr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) int retval; retval = sd_change_phase(chip, sample_point, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, SD_RSP_80CLK_TIMEOUT_EN); @@ -1568,26 +1522,23 @@ static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) u8 cmd[5], bus_width; retval = sd_change_phase(chip, sample_point, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (CHK_SD(sd_card)) { bus_width = SD_BUS_WIDTH_4; } else { - if (CHK_MMC_8BIT(sd_card)) { + if (CHK_MMC_8BIT(sd_card)) bus_width = SD_BUS_WIDTH_8; - } else if (CHK_MMC_4BIT(sd_card)) { + else if (CHK_MMC_4BIT(sd_card)) bus_width = SD_BUS_WIDTH_4; - } else { + else bus_width = SD_BUS_WIDTH_1; - } } retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, SD_RSP_80CLK_TIMEOUT_EN); @@ -1621,11 +1572,10 @@ static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map, u8 tune_d u8 final_phase = 0xFF; if (phase_map == 0xFFFFFFFF) { - if (tune_dir == TUNE_RX) { + if (tune_dir == TUNE_RX) final_phase = (u8)chip->sd_default_rx_phase; - } else { + else final_phase = (u8)chip->sd_default_tx_phase; - } goto Search_Finish; } @@ -1666,9 +1616,9 @@ static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map, u8 tune_d path[0].start = path[cont_path_cnt - 1].start - MAX_PHASE - 1; path[0].len += path[cont_path_cnt - 1].len; path[0].mid = path[0].start + path[0].len / 2; - if (path[0].mid < 0) { + if (path[0].mid < 0) path[0].mid += MAX_PHASE + 1; - } + cont_path_cnt--; } @@ -1696,11 +1646,10 @@ static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map, u8 tune_d int temp_final_phase = path[final_path_idx].end - (max_len - (6 + temp_mid)); - if (temp_final_phase < 0) { + if (temp_final_phase < 0) final_phase = (u8)(temp_final_phase + MAX_PHASE + 1); - } else { + else final_phase = (u8)temp_final_phase; - } } } else if (CHK_SD_SDR50(sd_card)) { if (max_len > 12) { @@ -1708,11 +1657,10 @@ static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map, u8 tune_d int temp_final_phase = path[final_path_idx].end - (max_len - (3 + temp_mid)); - if (temp_final_phase < 0) { + if (temp_final_phase < 0) final_phase = (u8)(temp_final_phase + MAX_PHASE + 1); - } else { + else final_phase = (u8)temp_final_phase; - } } } } @@ -1732,17 +1680,16 @@ static int sd_tuning_rx(struct rtsx_chip *chip) int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point); if (CHK_SD(sd_card)) { - if (CHK_SD_DDR50(sd_card)) { + if (CHK_SD_DDR50(sd_card)) tuning_cmd = sd_ddr_tuning_rx_cmd; - } else { + else tuning_cmd = sd_sdr_tuning_rx_cmd; - } + } else { - if (CHK_MMC_DDR52(sd_card)) { + if (CHK_MMC_DDR52(sd_card)) tuning_cmd = mmc_ddr_tunning_rx_cmd; - } else { + else TRACE_RET(chip, STATUS_FAIL); - } } for (i = 0; i < 3; i++) { @@ -1754,27 +1701,24 @@ static int sd_tuning_rx(struct rtsx_chip *chip) } retval = tuning_cmd(chip, (u8)j); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) raw_phase_map[i] |= 1 << j; - } } } phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2]; - for (i = 0; i < 3; i++) { + for (i = 0; i < 3; i++) RTSX_DEBUGP("RX raw_phase_map[%d] = 0x%08x\n", i, raw_phase_map[i]); - } + RTSX_DEBUGP("RX phase_map = 0x%08x\n", phase_map); final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX); - if (final_phase == 0xFF) { + if (final_phase == 0xFF) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_change_phase(chip, final_phase, TUNE_RX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -1799,15 +1743,13 @@ static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip) } retval = sd_change_phase(chip, (u8)i, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) continue; - } retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if ((retval == STATUS_SUCCESS) || !sd_check_err_code(chip, SD_RSP_TIMEOUT)) { + if ((retval == STATUS_SUCCESS) || !sd_check_err_code(chip, SD_RSP_TIMEOUT)) phase_map |= 1 << i; - } } RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0); @@ -1815,14 +1757,12 @@ static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip) RTSX_DEBUGP("DDR TX pre tune phase_map = 0x%08x\n", phase_map); final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX); - if (final_phase == 0xFF) { + if (final_phase == 0xFF) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_change_phase(chip, final_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_DEBUGP("DDR TX pre tune phase: %d\n", (int)final_phase); @@ -1839,17 +1779,16 @@ static int sd_tuning_tx(struct rtsx_chip *chip) int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point); if (CHK_SD(sd_card)) { - if (CHK_SD_DDR50(sd_card)) { + if (CHK_SD_DDR50(sd_card)) tuning_cmd = sd_ddr_tuning_tx_cmd; - } else { + else tuning_cmd = sd_sdr_tuning_tx_cmd; - } + } else { - if (CHK_MMC_DDR52(sd_card)) { + if (CHK_MMC_DDR52(sd_card)) tuning_cmd = sd_ddr_tuning_tx_cmd; - } else { + else TRACE_RET(chip, STATUS_FAIL); - } } for (i = 0; i < 3; i++) { @@ -1863,27 +1802,24 @@ static int sd_tuning_tx(struct rtsx_chip *chip) } retval = tuning_cmd(chip, (u8)j); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) raw_phase_map[i] |= 1 << j; - } } } phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2]; - for (i = 0; i < 3; i++) { + for (i = 0; i < 3; i++) RTSX_DEBUGP("TX raw_phase_map[%d] = 0x%08x\n", i, raw_phase_map[i]); - } + RTSX_DEBUGP("TX phase_map = 0x%08x\n", phase_map); final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX); - if (final_phase == 0xFF) { + if (final_phase == 0xFF) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_change_phase(chip, final_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -1893,14 +1829,12 @@ static int sd_sdr_tuning(struct rtsx_chip *chip) int retval; retval = sd_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_tuning_rx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -1911,26 +1845,22 @@ static int sd_ddr_tuning(struct rtsx_chip *chip) if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) { retval = sd_ddr_pre_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { retval = sd_change_phase(chip, (u8)chip->sd_ddr_tx_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } retval = sd_tuning_rx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) { retval = sd_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -1942,26 +1872,22 @@ static int mmc_ddr_tuning(struct rtsx_chip *chip) if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) { retval = sd_ddr_pre_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { retval = sd_change_phase(chip, (u8)chip->mmc_ddr_tx_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } retval = sd_tuning_rx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) { retval = sd_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -1974,9 +1900,8 @@ int sd_switch_clock(struct rtsx_chip *chip) int re_tuning = 0; retval = select_card(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (CHECK_PID(chip, 0x5209) && (CHK_SD30_SPEED(sd_card) || CHK_MMC_DDR52(sd_card))) { @@ -1987,26 +1912,22 @@ int sd_switch_clock(struct rtsx_chip *chip) } retval = switch_clock(chip, sd_card->sd_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (re_tuning) { if (CHK_SD(sd_card)) { - if (CHK_SD_DDR50(sd_card)) { + if (CHK_SD_DDR50(sd_card)) retval = sd_ddr_tuning(chip); - } else { + else retval = sd_sdr_tuning(chip); - } } else { - if (CHK_MMC_DDR52(sd_card)) { + if (CHK_MMC_DDR52(sd_card)) retval = mmc_ddr_tuning(chip); - } } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } return STATUS_SUCCESS; @@ -2017,11 +1938,10 @@ static int sd_prepare_reset(struct rtsx_chip *chip) struct sd_info *sd_card = &(chip->sd_card); int retval; - if (chip->asic_code) { + if (chip->asic_code) sd_card->sd_clock = 29; - } else { + else sd_card->sd_clock = CLK_30; - } sd_card->sd_type = 0; sd_card->seq_mode = 0; @@ -2037,9 +1957,8 @@ static int sd_prepare_reset(struct rtsx_chip *chip) chip->sd_io = 0; retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, retval); - } if (CHECK_PID(chip, 0x5209)) { RTSX_WRITE_REG(chip, REG_SD_CFG1, 0xFF, @@ -2053,9 +1972,8 @@ static int sd_prepare_reset(struct rtsx_chip *chip) RTSX_WRITE_REG(chip, CARD_STOP, SD_STOP | SD_CLR_ERR, SD_STOP | SD_CLR_ERR); retval = select_card(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -2122,9 +2040,8 @@ int sd_pull_ctl_enable(struct rtsx_chip *chip) } retval = rtsx_send_cmd(chip, SD_CARD, 100); - if (retval < 0) { + if (retval < 0) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -2133,42 +2050,37 @@ static int sd_init_power(struct rtsx_chip *chip) { int retval; - if (CHECK_PID(chip, 0x5209)) { + if (CHECK_PID(chip, 0x5209)) RTSX_WRITE_REG(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_OFF); - } retval = sd_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (!chip->ft2_fast_mode) { + if (!chip->ft2_fast_mode) wait_timeout(250); - } retval = enable_card_clock(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (chip->asic_code) { retval = sd_pull_ctl_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, 0); } if (chip->ft2_fast_mode) { - if (CHECK_PID(chip, 0x5209)) { + if (CHECK_PID(chip, 0x5209)) RTSX_WRITE_REG(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON); - } + } else { retval = card_power_on(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + wait_timeout(260); #ifdef SUPPORT_OCP @@ -2214,13 +2126,12 @@ static int sd_read_lba0(struct rtsx_chip *chip) if (CHK_SD(sd_card)) { bus_width = SD_BUS_WIDTH_4; } else { - if (CHK_MMC_8BIT(sd_card)) { + if (CHK_MMC_8BIT(sd_card)) bus_width = SD_BUS_WIDTH_8; - } else if (CHK_MMC_4BIT(sd_card)) { + else if (CHK_MMC_4BIT(sd_card)) bus_width = SD_BUS_WIDTH_4; - } else { + else bus_width = SD_BUS_WIDTH_1; - } } retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, @@ -2243,9 +2154,8 @@ static int sd_check_wp_state(struct rtsx_chip *chip) retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } cmd[0] = 0x40 | SD_STATUS; cmd[1] = 0; @@ -2273,9 +2183,8 @@ static int sd_check_wp_state(struct rtsx_chip *chip) /* Check SD Machanical Write-Protect Switch */ val = rtsx_readl(chip, RTSX_BIPR); - if (val & SD_WRITE_PROTECT) { + if (val & SD_WRITE_PROTECT) chip->card_wp |= SD_CARD; - } return STATUS_SUCCESS; } @@ -2307,14 +2216,12 @@ static int reset_sd(struct rtsx_chip *chip) #endif retval = sd_prepare_reset(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_dummy_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) && try_sdio) { int rty_cnt = 0; @@ -2348,9 +2255,8 @@ static int reset_sd(struct rtsx_chip *chip) /* Start Initialization Process of SD Card */ RTY_SD_RST: retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } wait_timeout(20); @@ -2377,9 +2283,8 @@ static int reset_sd(struct rtsx_chip *chip) voltage = SUPPORT_VOLTAGE; retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } wait_timeout(20); } @@ -2393,42 +2298,38 @@ static int reset_sd(struct rtsx_chip *chip) } j++; - if (j < 3) { + if (j < 3) goto RTY_SD_RST; - } else { + else TRACE_RET(chip, STATUS_FAIL); - } } retval = sd_send_cmd_get_rsp(chip, SD_APP_OP_COND, voltage, SD_RSP_TYPE_R3, rsp, 5); if (retval != STATUS_SUCCESS) { k++; - if (k < 3) { + if (k < 3) goto RTY_SD_RST; - } else { + else TRACE_RET(chip, STATUS_FAIL); - } } i++; wait_timeout(20); } while (!(rsp[1] & 0x80) && (i < 255)); - if (i == 255) { + if (i == 255) TRACE_RET(chip, STATUS_FAIL); - } if (hi_cap_flow) { - if (rsp[1] & 0x40) { + if (rsp[1] & 0x40) SET_SD_HCXC(sd_card); - } else { + else CLR_SD_HCXC(sd_card); - } - if (CHECK_PID(chip, 0x5209) && CHK_SD_HCXC(sd_card) && !sd20_mode) { + + if (CHECK_PID(chip, 0x5209) && CHK_SD_HCXC(sd_card) && !sd20_mode) support_1v8 = (rsp[1] & 0x01) ? 1 : 0; - } else { + else support_1v8 = 0; - } } else { CLR_SD_HCXC(sd_card); support_1v8 = 0; @@ -2437,46 +2338,39 @@ static int reset_sd(struct rtsx_chip *chip) if (support_1v8) { retval = sd_voltage_switch(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } for (i = 0; i < 3; i++) { retval = sd_send_cmd_get_rsp(chip, SEND_RELATIVE_ADDR, 0, SD_RSP_TYPE_R6, rsp, 5); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } sd_card->sd_addr = (u32)rsp[1] << 24; sd_card->sd_addr += (u32)rsp[2] << 16; - if (sd_card->sd_addr) { + if (sd_card->sd_addr) break; - } } retval = sd_check_csd(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } #ifdef SUPPORT_SD_LOCK SD_UNLOCK_ENTRY: retval = sd_update_lock_status(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (sd_card->sd_lock_status & SD_LOCKED) { sd_card->sd_lock_status |= (SD_LOCK_1BIT_MODE | SD_PWD_EXIST); @@ -2487,23 +2381,21 @@ static int reset_sd(struct rtsx_chip *chip) #endif retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + retval = sd_send_cmd_get_rsp(chip, SET_CLR_CARD_DETECT, 0, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (support_1v8) { retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } switch_bus_width = SD_BUS_WIDTH_4; } else { @@ -2511,14 +2403,12 @@ static int reset_sd(struct rtsx_chip *chip) } retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (!(sd_card->raw_csd[4] & 0x40)) sd_dont_switch = 1; @@ -2537,9 +2427,9 @@ static int reset_sd(struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) { retval = sd_switch_function(chip, switch_bus_width); if (retval != STATUS_SUCCESS) { - if (CHECK_PID(chip, 0x5209)) { + if (CHECK_PID(chip, 0x5209)) sd_change_bank_voltage(chip, SD_IO_3V3); - } + sd_init_power(chip); sd_dont_switch = 1; try_sdio = 0; @@ -2548,9 +2438,9 @@ static int reset_sd(struct rtsx_chip *chip) } } else { if (support_1v8) { - if (CHECK_PID(chip, 0x5209)) { + if (CHECK_PID(chip, 0x5209)) sd_change_bank_voltage(chip, SD_IO_3V3); - } + sd_init_power(chip); sd_dont_switch = 1; try_sdio = 0; @@ -2562,13 +2452,12 @@ static int reset_sd(struct rtsx_chip *chip) if (!support_1v8) { retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } #ifdef SUPPORT_SD_LOCK @@ -2581,24 +2470,22 @@ static int reset_sd(struct rtsx_chip *chip) RTSX_WRITE_REG(chip, SD30_DRIVE_SEL, 0x07, chip->sd30_drive_sel_1v8); retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (CHK_SD_DDR50(sd_card)) { + if (CHK_SD_DDR50(sd_card)) retval = sd_ddr_tuning(chip); - } else { + else retval = sd_sdr_tuning(chip); - } if (retval != STATUS_SUCCESS) { if (sd20_mode) { TRACE_RET(chip, STATUS_FAIL); } else { retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + try_sdio = 0; sd20_mode = 1; goto Switch_Fail; @@ -2609,9 +2496,8 @@ static int reset_sd(struct rtsx_chip *chip) if (CHK_SD_DDR50(sd_card)) { retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) read_lba0 = 0; - } } if (read_lba0) { @@ -2621,9 +2507,9 @@ static int reset_sd(struct rtsx_chip *chip) TRACE_RET(chip, STATUS_FAIL); } else { retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + try_sdio = 0; sd20_mode = 1; goto Switch_Fail; @@ -2633,9 +2519,8 @@ static int reset_sd(struct rtsx_chip *chip) } retval = sd_check_wp_state(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } chip->card_bus_width[chip->card2lun[SD_CARD]] = 4; @@ -2659,9 +2544,8 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) int len; retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, SWITCH_FAIL); - } if (width == MMC_8BIT_BUS) { buf[0] = 0x55; @@ -2690,9 +2574,8 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) rtsx_read_register(chip, REG_SD_STAT1, &val1); rtsx_read_register(chip, REG_SD_STAT2, &val2); rtsx_clear_sd_error(chip); - if ((val1 & 0xE0) || val2) { + if ((val1 & 0xE0) || val2) TRACE_RET(chip, SWITCH_ERR); - } } else { rtsx_clear_sd_error(chip); rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0); @@ -2712,11 +2595,10 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | BUSTEST_R); - if (width == MMC_8BIT_BUS) { + if (width == MMC_8BIT_BUS) rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x08); - } else { + else rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x04); - } rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1); rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0); @@ -2729,9 +2611,8 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END); rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2, 0, 0); - if (width == MMC_8BIT_BUS) { + if (width == MMC_8BIT_BUS) rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 1, 0, 0); - } retval = rtsx_send_cmd(chip, SD_CARD, 100); if (retval < 0) { @@ -2747,15 +2628,14 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) u8 rsp[5]; u32 arg; - if (CHK_MMC_DDR52(sd_card)) { + if (CHK_MMC_DDR52(sd_card)) arg = 0x03B70600; - } else { + else arg = 0x03B70200; - } + retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, SD_RSP_TYPE_R1b, rsp, 5); - if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR)) { + if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR)) return SWITCH_SUCCESS; - } } } else { RTSX_DEBUGP("BUSTEST_R [4bits]: 0x%02x\n", ptr[0]); @@ -2763,15 +2643,14 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) u8 rsp[5]; u32 arg; - if (CHK_MMC_DDR52(sd_card)) { + if (CHK_MMC_DDR52(sd_card)) arg = 0x03B70500; - } else { + else arg = 0x03B70100; - } + retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, SD_RSP_TYPE_R1b, rsp, 5); - if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR)) { + if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR)) return SWITCH_SUCCESS; - } } } @@ -2845,11 +2724,10 @@ static int mmc_switch_timing_bus(struct rtsx_chip *chip, int switch_ddr) card_type_mask = 0x03; } #else - if (chip->sd_ctl & SUPPORT_MMC_DDR_MODE) { + if (chip->sd_ctl & SUPPORT_MMC_DDR_MODE) card_type_mask = 0x07; - } else { + else card_type_mask = 0x03; - } #endif } else { card_type_mask = 0x03; @@ -2859,11 +2737,10 @@ static int mmc_switch_timing_bus(struct rtsx_chip *chip, int switch_ddr) u8 rsp[5]; if (card_type & 0x04) { - if (switch_ddr) { + if (switch_ddr) SET_MMC_DDR52(sd_card); - } else { + else SET_MMC_52M(sd_card); - } } else if (card_type & 0x02) { SET_MMC_52M(sd_card); } else { @@ -2872,16 +2749,14 @@ static int mmc_switch_timing_bus(struct rtsx_chip *chip, int switch_ddr) retval = sd_send_cmd_get_rsp(chip, SWITCH, 0x03B90100, SD_RSP_TYPE_R1b, rsp, 5); - if ((retval != STATUS_SUCCESS) || (rsp[4] & MMC_SWITCH_ERR)) { + if ((retval != STATUS_SUCCESS) || (rsp[4] & MMC_SWITCH_ERR)) CLR_MMC_HS(sd_card); - } } sd_choose_proper_clock(chip); retval = switch_clock(chip, sd_card->sd_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } /* Test Bus Procedure */ retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS); @@ -2929,17 +2804,15 @@ static int reset_mmc(struct rtsx_chip *chip) Switch_Fail: retval = sd_prepare_reset(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, retval); - } SET_MMC(sd_card); RTY_MMC_RST: retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } do { if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { @@ -2973,56 +2846,47 @@ static int reset_mmc(struct rtsx_chip *chip) i++; } while (!(rsp[1] & 0x80) && (i < 255)); - if (i == 255) { + if (i == 255) TRACE_RET(chip, STATUS_FAIL); - } - if ((rsp[1] & 0x60) == 0x40) { + if ((rsp[1] & 0x60) == 0x40) SET_MMC_SECTOR_MODE(sd_card); - } else { + else CLR_MMC_SECTOR_MODE(sd_card); - } retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } sd_card->sd_addr = 0x00100000; retval = sd_send_cmd_get_rsp(chip, SET_RELATIVE_ADDR, sd_card->sd_addr, SD_RSP_TYPE_R6, rsp, 5); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_check_csd(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2; retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } #ifdef SUPPORT_SD_LOCK MMC_UNLOCK_ENTRY: retval = sd_update_lock_status(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } #endif retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } chip->card_bus_width[chip->card2lun[SD_CARD]] = 1; @@ -3039,22 +2903,20 @@ static int reset_mmc(struct rtsx_chip *chip) } } - if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) { + if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) TRACE_RET(chip, STATUS_FAIL); - } if (switch_ddr && CHK_MMC_DDR52(sd_card)) { retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = mmc_ddr_tuning(chip); if (retval != STATUS_SUCCESS) { retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + switch_ddr = 0; TRACE_GOTO(chip, Switch_Fail); } @@ -3064,9 +2926,9 @@ static int reset_mmc(struct rtsx_chip *chip) retval = sd_read_lba0(chip); if (retval != STATUS_SUCCESS) { retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + switch_ddr = 0; TRACE_GOTO(chip, Switch_Fail); } @@ -3082,9 +2944,8 @@ static int reset_mmc(struct rtsx_chip *chip) #endif temp = rtsx_readl(chip, RTSX_BIPR); - if (temp & SD_WRITE_PROTECT) { + if (temp & SD_WRITE_PROTECT) chip->card_wp |= SD_CARD; - } return STATUS_SUCCESS; } @@ -3100,36 +2961,31 @@ int reset_sd_card(struct rtsx_chip *chip) chip->capacity[chip->card2lun[SD_CARD]] = 0; retval = enable_card_clock(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (chip->ignore_sd && CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) { if (chip->asic_code) { retval = sd_pull_ctl_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { retval = rtsx_write_register(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } retval = card_share_mode(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } chip->sd_io = 1; TRACE_RET(chip, STATUS_FAIL); } retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (chip->sd_ctl & RESET_MMC_FIRST) { retval = reset_mmc(chip); @@ -3168,18 +3024,17 @@ int reset_sd_card(struct rtsx_chip *chip) } retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_L, 0xFF, 0); RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_H, 0xFF, 2); chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity; retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_DEBUGP("sd_card->sd_type = 0x%x\n", sd_card->sd_type); @@ -3205,33 +3060,29 @@ static int reset_mmc_only(struct rtsx_chip *chip) chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity = 0; retval = enable_card_clock(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = reset_mmc(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } + RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_L, 0xFF, 0); RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_H, 0xFF, 2); chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity; retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_DEBUGP("In reset_mmc_only, sd_card->sd_type = 0x%x\n", sd_card->sd_type); @@ -3255,9 +3106,8 @@ static int wait_data_buf_ready(struct rtsx_chip *chip) retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (sd_card->sd_data_buf_ready) { return sd_send_cmd_get_rsp(chip, SEND_STATUS, @@ -3277,19 +3127,18 @@ void sd_stop_seq_mode(struct rtsx_chip *chip) if (sd_card->seq_mode) { retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return; - } retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0, SD_RSP_TYPE_R1b, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) sd_set_err_code(chip, SD_STS_ERR); - } + retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) sd_set_err_code(chip, SD_STS_ERR); - } + sd_card->seq_mode = 0; rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); @@ -3302,9 +3151,8 @@ static inline int sd_auto_tune_clock(struct rtsx_chip *chip) int retval; if (chip->asic_code) { - if (sd_card->sd_clock > 30) { + if (sd_card->sd_clock > 30) sd_card->sd_clock -= 20; - } } else { switch (sd_card->sd_clock) { case CLK_200: @@ -3337,9 +3185,8 @@ static inline int sd_auto_tune_clock(struct rtsx_chip *chip) } retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } return STATUS_SUCCESS; } @@ -3377,11 +3224,10 @@ int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 s } } - if (!CHK_SD_HCXC(sd_card) && !CHK_MMC_SECTOR_MODE(sd_card)) { + if (!CHK_SD_HCXC(sd_card) && !CHK_MMC_SECTOR_MODE(sd_card)) data_addr = start_sector << 9; - } else { + else data_addr = start_sector; - } sd_clr_err_code(chip); @@ -3436,21 +3282,19 @@ int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 s rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER); - if (CHK_MMC_8BIT(sd_card)) { + if (CHK_MMC_8BIT(sd_card)) rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_8); - } else if (CHK_MMC_4BIT(sd_card) || CHK_SD(sd_card)) { + else if (CHK_MMC_4BIT(sd_card) || CHK_SD(sd_card)) rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - } else { + else rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_1); - } if (sd_card->seq_mode) { cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0; if (CHECK_PID(chip, 0x5209)) { - if (!CHK_SD30_SPEED(sd_card)) { + if (!CHK_SD30_SPEED(sd_card)) cfg2 |= SD_NO_CHECK_WAIT_CRC_TO; - } } rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2); @@ -3480,9 +3324,8 @@ int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 s cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6; if (CHECK_PID(chip, 0x5209)) { - if (!CHK_SD30_SPEED(sd_card)) { + if (!CHK_SD30_SPEED(sd_card)) cfg2 |= SD_NO_CHECK_WAIT_CRC_TO; - } } rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2); @@ -3523,9 +3366,8 @@ int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 s cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0; if (CHECK_PID(chip, 0x5209)) { - if (!CHK_SD30_SPEED(sd_card)) { + if (!CHK_SD30_SPEED(sd_card)) cfg2 |= SD_NO_CHECK_WAIT_CRC_TO; - } } rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2); @@ -3550,11 +3392,10 @@ int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector, u16 s sd_card->seq_mode = 0; - if (retval == -ETIMEDOUT) { + if (retval == -ETIMEDOUT) err = STATUS_TIMEDOUT; - } else { + else err = STATUS_FAIL; - } rtsx_read_register(chip, REG_SD_STAT1, &stat); rtsx_clear_sd_error(chip); @@ -3640,9 +3481,8 @@ int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, RTSX_DEBUGP("EXT SD/MMC CMD %d\n", cmd_idx); - if (rsp_type == SD_RSP_TYPE_R1b) { + if (rsp_type == SD_RSP_TYPE_R1b) timeout = 3000; - } RTY_SEND_CMD: @@ -3662,14 +3502,14 @@ int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END, SD_TRANSFER_END); if (rsp_type == SD_RSP_TYPE_R2) { - for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr++) { + for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr++) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); - } + stat_idx = 17; } else if (rsp_type != SD_RSP_TYPE_R0) { - for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++) { + for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0); - } + stat_idx = 6; } rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0, 0); @@ -3683,9 +3523,8 @@ int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, if (rsp_type & SD_WAIT_BUSY_END) { retval = sd_check_data0_status(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, retval); - } } else { sd_set_err_code(chip, SD_TO_ERR); } @@ -3693,9 +3532,8 @@ int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, TRACE_RET(chip, STATUS_FAIL); } - if (rsp_type == SD_RSP_TYPE_R0) { + if (rsp_type == SD_RSP_TYPE_R0) return STATUS_SUCCESS; - } ptr = rtsx_get_cmd_data(chip) + 1; @@ -3724,9 +3562,8 @@ int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, if ((cmd_idx == SELECT_CARD) || (cmd_idx == APP_CMD) || (cmd_idx == SEND_STATUS) || (cmd_idx == STOP_TRANSMISSION)) { if ((cmd_idx != STOP_TRANSMISSION) && (special_check == 0)) { - if (ptr[1] & 0x80) { + if (ptr[1] & 0x80) TRACE_RET(chip, STATUS_FAIL); - } } #ifdef SUPPORT_SD_LOCK if (ptr[1] & 0x7D) @@ -3736,26 +3573,23 @@ int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, { TRACE_RET(chip, STATUS_FAIL); } - if (ptr[2] & 0xF8) { + if (ptr[2] & 0xF8) TRACE_RET(chip, STATUS_FAIL); - } if (cmd_idx == SELECT_CARD) { if (rsp_type == SD_RSP_TYPE_R2) { - if ((ptr[3] & 0x1E) != 0x04) { + if ((ptr[3] & 0x1E) != 0x04) TRACE_RET(chip, STATUS_FAIL); - } + } else if (rsp_type == SD_RSP_TYPE_R0) { - if ((ptr[3] & 0x1E) != 0x03) { + if ((ptr[3] & 0x1E) != 0x03) TRACE_RET(chip, STATUS_FAIL); - } } } } - if (rsp && rsp_len) { + if (rsp && rsp_len) memcpy(rsp, ptr, rsp_len); - } return STATUS_SUCCESS; } @@ -3765,29 +3599,27 @@ int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type) int retval, rsp_len; u16 reg_addr; - if (rsp_type == SD_RSP_TYPE_R0) { + if (rsp_type == SD_RSP_TYPE_R0) return STATUS_SUCCESS; - } rtsx_init_cmd(chip); if (rsp_type == SD_RSP_TYPE_R2) { - for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr++) { + for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16; reg_addr++) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0); - } + rsp_len = 17; } else if (rsp_type != SD_RSP_TYPE_R0) { - for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++) { + for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4; reg_addr++) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0); - } + rsp_len = 6; } rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0xFF, 0); retval = rtsx_send_cmd(chip, SD_CARD, 100); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (rsp) { int min_len = (rsp_len < len) ? rsp_len : len; @@ -3858,9 +3690,8 @@ int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf[5] = (1 == CHK_SD(sd_card)) ? 0x01 : 0x02; - if (chip->card_wp & SD_CARD) { + if (chip->card_wp & SD_CARD) buf[5] |= 0x80; - } buf[6] = (u8)(sd_card->sd_addr >> 16); buf[7] = (u8)(sd_card->sd_addr >> 24); @@ -3875,9 +3706,8 @@ int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip) static inline int get_rsp_type(struct scsi_cmnd *srb, u8 *rsp_type, int *rsp_len) { - if (!rsp_type || !rsp_len) { + if (!rsp_type || !rsp_len) return STATUS_FAIL; - } switch (srb->cmnd[10]) { case 0x03: @@ -3927,9 +3757,8 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } if (sd_card->pre_cmd_err) { sd_card->pre_cmd_err = 0; @@ -3938,12 +3767,11 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } cmd_idx = srb->cmnd[2] & 0x3F; - if (srb->cmnd[1] & 0x02) { + if (srb->cmnd[1] & 0x02) standby = 1; - } - if (srb->cmnd[1] & 0x01) { + + if (srb->cmnd[1] & 0x01) acmd = 1; - } arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) | ((u32)srb->cmnd[5] << 8) | srb->cmnd[6]; @@ -3956,64 +3784,56 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->last_rsp_type = rsp_type; retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } #ifdef SUPPORT_SD_LOCK if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) { if (CHK_MMC_8BIT(sd_card)) { retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) { retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } } } #else retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } #endif if (standby) { retval = sd_select_card(chip, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Cmd_Failed); - } } if (acmd) { retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Cmd_Failed); - } } retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type, sd_card->rsp, rsp_len, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Cmd_Failed); - } if (standby) { retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Cmd_Failed); - } } #ifdef SUPPORT_SD_LOCK retval = sd_update_lock_status(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Cmd_Failed); - } #endif scsi_set_resid(srb, 0); @@ -4024,9 +3844,8 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); release_sd_card(chip); do_reset_sd_card(chip); - if (!(chip->card_ready & SD_CARD)) { + if (!(chip->card_ready & SD_CARD)) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); - } TRACE_RET(chip, TRANSPORT_FAILED); } @@ -4053,20 +3872,18 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } cmd_idx = srb->cmnd[2] & 0x3F; - if (srb->cmnd[1] & 0x04) { + if (srb->cmnd[1] & 0x04) send_cmd12 = 1; - } - if (srb->cmnd[1] & 0x02) { + + if (srb->cmnd[1] & 0x02) standby = 1; - } - if (srb->cmnd[1] & 0x01) { + + if (srb->cmnd[1] & 0x01) acmd = 1; - } data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8] << 8) | srb->cmnd[9]; @@ -4078,19 +3895,17 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->last_rsp_type = rsp_type; retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } #ifdef SUPPORT_SD_LOCK if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) { - if (CHK_MMC_8BIT(sd_card)) { + if (CHK_MMC_8BIT(sd_card)) bus_width = SD_BUS_WIDTH_8; - } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) { + else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) bus_width = SD_BUS_WIDTH_4; - } else { + else bus_width = SD_BUS_WIDTH_1; - } } else { bus_width = SD_BUS_WIDTH_4; } @@ -4102,24 +3917,21 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (data_len < 512) { retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len, SD_RSP_TYPE_R1, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } } if (standby) { retval = sd_select_card(chip, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } } if (acmd) { retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } } if (data_len <= 512) { @@ -4138,9 +3950,8 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) cmd[4] = srb->cmnd[6]; buf = kmalloc(data_len, GFP_KERNEL); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt, blk_cnt, bus_width, buf, data_len, 2000); @@ -4195,56 +4006,48 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = ext_sd_get_rsp(chip, rsp_len, sd_card->rsp, rsp_type); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } if (standby) { retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } } if (send_cmd12) { retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0, SD_RSP_TYPE_R1b, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } } if (data_len < 512) { retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } + retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } } - if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04)) { + if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04)) cmd13_checkbit = 1; - } for (i = 0; i < 3; i++) { retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0, cmd13_checkbit); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) break; - } } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed); - } scsi_set_resid(srb, 0); return TRANSPORT_GOOD; @@ -4252,14 +4055,13 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) SD_Execute_Read_Cmd_Failed: sd_card->pre_cmd_err = 1; set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); - if (read_err) { + if (read_err) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR); - } + release_sd_card(chip); do_reset_sd_card(chip); - if (!(chip->card_ready & SD_CARD)) { + if (!(chip->card_ready & SD_CARD)) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); - } TRACE_RET(chip, TRANSPORT_FAILED); } @@ -4291,20 +4093,18 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } cmd_idx = srb->cmnd[2] & 0x3F; - if (srb->cmnd[1] & 0x04) { + if (srb->cmnd[1] & 0x04) send_cmd12 = 1; - } - if (srb->cmnd[1] & 0x02) { + + if (srb->cmnd[1] & 0x02) standby = 1; - } - if (srb->cmnd[1] & 0x01) { + + if (srb->cmnd[1] & 0x01) acmd = 1; - } data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8] << 8) | srb->cmnd[9]; arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) | @@ -4325,75 +4125,66 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->last_rsp_type = rsp_type; retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } #ifdef SUPPORT_SD_LOCK if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) { if (CHK_MMC_8BIT(sd_card)) { retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } + } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) { retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } } } #else retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, TRANSPORT_FAILED); - } #endif if (data_len < 512) { retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len, SD_RSP_TYPE_R1, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } } if (standby) { retval = sd_select_card(chip, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } } if (acmd) { retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } } retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type, sd_card->rsp, rsp_len, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } if (data_len <= 512) { u16 i; u8 *buf; buf = kmalloc(data_len, GFP_KERNEL); - if (buf == NULL) { + if (buf == NULL) TRACE_RET(chip, TRANSPORT_ERROR); - } rtsx_stor_get_xfer_buf(buf, data_len, srb); #ifdef SUPPORT_SD_LOCK - if (cmd_idx == LOCK_UNLOCK) { + if (cmd_idx == LOCK_UNLOCK) lock_cmd_type = buf[0] & 0x0F; - } #endif if (data_len > 256) { @@ -4485,11 +4276,11 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } rtsx_init_cmd(chip); - if (CHECK_PID(chip, 0x5209)) { + if (CHECK_PID(chip, 0x5209)) rtsx_add_cmd(chip, CHECK_REG_CMD, SD_BUS_STAT, SD_DAT0_STATUS, SD_DAT0_STATUS); - } else { + else rtsx_add_cmd(chip, CHECK_REG_CMD, 0xFD30, 0x02, 0x02); - } + rtsx_send_cmd(chip, SD_CARD, 250); retval = sd_update_lock_status(chip); @@ -4502,61 +4293,53 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (standby) { retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } } if (send_cmd12) { retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0, SD_RSP_TYPE_R1b, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } } if (data_len < 512) { retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } + rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } } - if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04)) { + if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04)) cmd13_checkbit = 1; - } for (i = 0; i < 3; i++) { retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0, cmd13_checkbit); - if (retval == STATUS_SUCCESS) { + if (retval == STATUS_SUCCESS) break; - } } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed); - } #ifdef SUPPORT_SD_LOCK if (cmd_idx == LOCK_UNLOCK) { if (!lock_cmd_fail) { RTSX_DEBUGP("lock_cmd_type = 0x%x\n", lock_cmd_type); - if (lock_cmd_type & SD_CLR_PWD) { + if (lock_cmd_type & SD_CLR_PWD) sd_card->sd_lock_status &= ~SD_PWD_EXIST; - } - if (lock_cmd_type & SD_SET_PWD) { + + if (lock_cmd_type & SD_SET_PWD) sd_card->sd_lock_status |= SD_PWD_EXIST; - } } RTSX_DEBUGP("sd_lock_state = 0x%x, sd_card->sd_lock_status = 0x%x\n", @@ -4593,14 +4376,13 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) SD_Execute_Write_Cmd_Failed: sd_card->pre_cmd_err = 1; set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE); - if (write_err) { + if (write_err) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR); - } + release_sd_card(chip); do_reset_sd_card(chip); - if (!(chip->card_ready & SD_CARD)) { + if (!(chip->card_ready & SD_CARD)) set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT); - } TRACE_RET(chip, TRANSPORT_FAILED); } @@ -4670,9 +4452,8 @@ int sd_hw_rst(struct scsi_cmnd *srb, struct rtsx_chip *chip) switch (srb->cmnd[1] & 0x0F) { case 0: #ifdef SUPPORT_SD_LOCK - if (0x64 == srb->cmnd[9]) { + if (0x64 == srb->cmnd[9]) sd_card->sd_lock_status |= SD_SDR_RST; - } #endif retval = reset_sd_card(chip); if (retval != STATUS_SUCCESS) { @@ -4723,26 +4504,23 @@ int sd_power_off_card3v3(struct rtsx_chip *chip) int retval; retval = disable_card_clock(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_WRITE_REG(chip, CARD_OE, SD_OUTPUT_EN, 0); if (!chip->ft2_fast_mode) { retval = card_power_off(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } wait_timeout(50); } if (chip->asic_code) { retval = sd_pull_ctl_disable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } } else { RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, FPGA_SD_PULL_CTL_BIT); @@ -4774,19 +4552,16 @@ int release_sd_card(struct rtsx_chip *chip) memset(sd_card->raw_scr, 0, 8); retval = sd_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } if (CHECK_PID(chip, 0x5209)) { retval = sd_change_bank_voltage(chip, SD_IO_3V3); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } - if (CHK_SD30_SPEED(sd_card)) { + if (CHK_SD30_SPEED(sd_card)) RTSX_WRITE_REG(chip, SD30_DRIVE_SEL, 0x07, chip->sd30_drive_sel_3v3); - } RTSX_WRITE_REG(chip, OCPPARA2, SD_OCP_THD_MASK, chip->sd_400mA_ocp_thd); } diff --git a/trunk/drivers/staging/silicom/Kconfig b/trunk/drivers/staging/silicom/Kconfig new file mode 100644 index 000000000000..cb07a0da0f63 --- /dev/null +++ b/trunk/drivers/staging/silicom/Kconfig @@ -0,0 +1,46 @@ +# +# Silicom device configuration +# + +config NET_VENDOR_SILICOM + bool "Silicom devices" + default y + depends on PCI + ---help--- + If you have a network card (Ethernet) belonging to this class, + say Y. + + Note that the answer to this question does not directly affect + the kernel: saying N will just case the configurator to skip all + the questions regarding Silicom chipsets. If you say Y, you will be asked + for your specific chipset/driver in the following questions. + +if NET_VENDOR_SILICOM + +config SBYPASS + tristate "Silicom BypassCTL library support" + depends on PCI + depends on m + ---help--- + If you have a network (Ethernet) controller of this type, say Y + + To compile this driver as a module, choose M here. The module + will be called bypass. + +config BPCTL + tristate "Silicom BypassCTL net support" + depends on PCI + depends on m + select SBYPASS + select NET_CORE + select MII + ---help--- + If you have a network (Ethernet) controller of this type, say Y + or M and read the Ethernet-HOWTO, available from + . + + To compile this driver as a module, choose M here. The module + will be called bpctl_mod. + + +endif # NET_VENDOR_SILICOM diff --git a/trunk/drivers/staging/silicom/Makefile b/trunk/drivers/staging/silicom/Makefile new file mode 100644 index 000000000000..80e6d12d156b --- /dev/null +++ b/trunk/drivers/staging/silicom/Makefile @@ -0,0 +1,9 @@ +# +# Makefile for the Bypass network device drivers. +# + +obj-$(CONFIG_BPCTL) += bpctl_mod.o +obj-$(CONFIG_SBYPASS) += bypasslib/ + + +bpctl_mod-objs := bp_mod.o bp_proc.o diff --git a/trunk/drivers/staging/silicom/README b/trunk/drivers/staging/silicom/README new file mode 100644 index 000000000000..ae970b37fdc6 --- /dev/null +++ b/trunk/drivers/staging/silicom/README @@ -0,0 +1,14 @@ + +Theory of Operation: + +The Silicom Bypass Network Interface Cards (NICs) are network cards with paired ports (2 or 4). +The pairs either act as a "wire" allowing the network packets to pass or insert the device in +between the two ports. When paired with the on-board hardware watchdog or other failsafe, +they provide high availability for the network in the face of software outages or maintenance. + +The software requirements are for a kernel level driver that interfaces with the bypass and watchdog, +as well as for control software. User control can be either the provided standalone executable +(/bin/bpctl) or the API exposed by the Silicom library. + + + diff --git a/trunk/drivers/staging/silicom/TODO b/trunk/drivers/staging/silicom/TODO new file mode 100644 index 000000000000..09d07b0ea9c0 --- /dev/null +++ b/trunk/drivers/staging/silicom/TODO @@ -0,0 +1,8 @@ +TODO: + - checkpatch.pl cleanups + - locking audit + - single module with all functionality + - userland + - fix monolithic build. + + diff --git a/trunk/drivers/staging/silicom/bits.h b/trunk/drivers/staging/silicom/bits.h new file mode 100644 index 000000000000..8c411d0d4ecd --- /dev/null +++ b/trunk/drivers/staging/silicom/bits.h @@ -0,0 +1,56 @@ +/******************************************************************************/ +/* */ +/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ +/* Corporation. */ +/* All rights reserved. */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* History: */ +/* 02/25/00 Hav Khauv Initial version. */ +/******************************************************************************/ + +#ifndef BITS_H +#define BITS_H + +/******************************************************************************/ +/* Bit Mask definitions */ +/******************************************************************************/ + +#define BIT_NONE 0x00 +#define BIT_0 0x01 +#define BIT_1 0x02 +#define BIT_2 0x04 +#define BIT_3 0x08 +#define BIT_4 0x10 +#define BIT_5 0x20 +#define BIT_6 0x40 +#define BIT_7 0x80 +#define BIT_8 0x0100 +#define BIT_9 0x0200 +#define BIT_10 0x0400 +#define BIT_11 0x0800 +#define BIT_12 0x1000 +#define BIT_13 0x2000 +#define BIT_14 0x4000 +#define BIT_15 0x8000 +#define BIT_16 0x010000 +#define BIT_17 0x020000 +#define BIT_18 0x040000 +#define BIT_19 0x080000 +#define BIT_20 0x100000 +#define BIT_21 0x200000 +#define BIT_22 0x400000 +#define BIT_23 0x800000 +#define BIT_24 0x01000000 +#define BIT_25 0x02000000 +#define BIT_26 0x04000000 +#define BIT_27 0x08000000 +#define BIT_28 0x10000000 +#define BIT_29 0x20000000 +#define BIT_30 0x40000000 +#define BIT_31 0x80000000 + +#endif /* BITS_H */ diff --git a/trunk/drivers/staging/silicom/bp_ioctl.h b/trunk/drivers/staging/silicom/bp_ioctl.h new file mode 100644 index 000000000000..7d468a0ee79a --- /dev/null +++ b/trunk/drivers/staging/silicom/bp_ioctl.h @@ -0,0 +1,141 @@ +/******************************************************************************/ +/* */ +/* Silicom Bypass Control Utility, Copyright (c) 2005-2007 Silicom */ +/* All rights reserved. */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* */ +/******************************************************************************/ + +#ifndef BP_IOCTL_H +#define BP_IOCTL_H + +#define BP_CAP 0x01 /* BIT_0 */ +#define BP_STATUS_CAP 0x02 +#define BP_STATUS_CHANGE_CAP 0x04 +#define SW_CTL_CAP 0x08 +#define BP_DIS_CAP 0x10 +#define BP_DIS_STATUS_CAP 0x20 +#define STD_NIC_CAP 0x40 +#define BP_PWOFF_ON_CAP 0x80 +#define BP_PWOFF_OFF_CAP 0x0100 +#define BP_PWOFF_CTL_CAP 0x0200 +#define BP_PWUP_ON_CAP 0x0400 +#define BP_PWUP_OFF_CAP 0x0800 +#define BP_PWUP_CTL_CAP 0x1000 +#define WD_CTL_CAP 0x2000 +#define WD_STATUS_CAP 0x4000 +#define WD_TIMEOUT_CAP 0x8000 +#define TX_CTL_CAP 0x10000 +#define TX_STATUS_CAP 0x20000 +#define TAP_CAP 0x40000 +#define TAP_STATUS_CAP 0x80000 +#define TAP_STATUS_CHANGE_CAP 0x100000 +#define TAP_DIS_CAP 0x200000 +#define TAP_DIS_STATUS_CAP 0x400000 +#define TAP_PWUP_ON_CAP 0x800000 +#define TAP_PWUP_OFF_CAP 0x1000000 +#define TAP_PWUP_CTL_CAP 0x2000000 +#define NIC_CAP_NEG 0x4000000 +#define TPL_CAP 0x8000000 +#define DISC_CAP 0x10000000 +#define DISC_DIS_CAP 0x20000000 +#define DISC_PWUP_CTL_CAP 0x40000000 + +#define TPL2_CAP_EX 0x01 +#define DISC_PORT_CAP_EX 0x02 + +#define WD_MIN_TIME_MASK(val) (val & 0xf) +#define WD_STEP_COUNT_MASK(val) ((val & 0xf) << 5) +#define WDT_STEP_TIME 0x10 /* BIT_4 */ + +#define WD_MIN_TIME_GET(desc) (desc & 0xf) +#define WD_STEP_COUNT_GET(desc) ((desc>>5) & 0xf) + +typedef enum { + IF_SCAN, + GET_DEV_NUM, + IS_BYPASS, + GET_BYPASS_SLAVE, + GET_BYPASS_CAPS, + GET_WD_SET_CAPS, + SET_BYPASS, + GET_BYPASS, + GET_BYPASS_CHANGE, + SET_BYPASS_WD, + GET_BYPASS_WD, + GET_WD_EXPIRE_TIME, + RESET_BYPASS_WD_TIMER, + SET_DIS_BYPASS, + GET_DIS_BYPASS, + SET_BYPASS_PWOFF, + GET_BYPASS_PWOFF, + SET_BYPASS_PWUP, + GET_BYPASS_PWUP, + SET_STD_NIC, + GET_STD_NIC, + SET_TX, + GET_TX, + SET_TAP, + GET_TAP, + GET_TAP_CHANGE, + SET_DIS_TAP, + GET_DIS_TAP, + SET_TAP_PWUP, + GET_TAP_PWUP, + SET_WD_EXP_MODE, + GET_WD_EXP_MODE, + SET_WD_AUTORESET, + GET_WD_AUTORESET, + SET_TPL, + GET_TPL, + SET_DISC, + GET_DISC, + GET_DISC_CHANGE, + SET_DIS_DISC, + GET_DIS_DISC, + SET_DISC_PWUP, + GET_DISC_PWUP, + GET_BYPASS_INFO = 100, + GET_BP_WAIT_AT_PWUP, + SET_BP_WAIT_AT_PWUP, + GET_BP_HW_RESET, + SET_BP_HW_RESET, + SET_DISC_PORT, + GET_DISC_PORT, + SET_DISC_PORT_PWUP, + GET_DISC_PORT_PWUP, + SET_BP_FORCE_LINK, + GET_BP_FORCE_LINK, +#ifdef BP_SELF_TEST + SET_BP_SELF_TEST = 200, + GET_BP_SELF_TEST, +#endif + +} CMND_TYPE_SD; + +/* +* The major device number. We can't rely on dynamic +* registration any more, because ioctls need to know +* it. +*/ + +#define MAGIC_NUM 'J' + +/* for passing single values */ +struct bpctl_cmd { + int status; + int data[8]; + int in_param[8]; + int out_param[8]; +}; + +#define IOCTL_TX_MSG(cmd) _IOWR(MAGIC_NUM, cmd, struct bpctl_cmd) + +#define DEVICE_NODE "/dev/bpctl0" +#define DEVICE_NAME "bpctl" + +#endif diff --git a/trunk/drivers/staging/silicom/bp_mod.c b/trunk/drivers/staging/silicom/bp_mod.c new file mode 100644 index 000000000000..0d961960fc60 --- /dev/null +++ b/trunk/drivers/staging/silicom/bp_mod.c @@ -0,0 +1,9012 @@ +/******************************************************************************/ +/* */ +/* Bypass Control utility, Copyright (c) 2005-20011 Silicom */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. */ +/* */ +/* */ +/******************************************************************************/ +#include +#if defined(CONFIG_SMP) && ! defined(__SMP__) +#define __SMP__ +#endif + +#include /* We're doing kernel work */ +#include /* Specifically, a module */ +#include +#include +#include +#include +#include +#include +#include + +#include /* for get_user and put_user */ +#include +#include +#include + +#include "bp_ioctl.h" +#include "bp_mod.h" +#include "bypass.h" +#include "libbp_sd.h" + +#define SUCCESS 0 +#define BP_MOD_VER "9.0.4" +#define BP_MOD_DESCR "Silicom Bypass-SD Control driver" +#define BP_SYNC_FLAG 1 + +static int Device_Open = 0; +static int major_num = 0; + +MODULE_AUTHOR("Anna Lukin, annal@silicom.co.il"); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION(BP_MOD_DESCR); +MODULE_VERSION(BP_MOD_VER); +spinlock_t bpvm_lock; + +#define lock_bpctl() \ +if (down_interruptible(&bpctl_sema)) { \ + return -ERESTARTSYS; \ +} \ + +#define unlock_bpctl() \ + up(&bpctl_sema); + +/* Media Types */ +typedef enum { + bp_copper = 0, + bp_fiber, + bp_cx4, + bp_none, +} bp_media_type; + +struct pfs_unit_sd { + struct proc_dir_entry *proc_entry; + char proc_name[32]; +}; + +struct bypass_pfs_sd { + char dir_name[32]; + struct proc_dir_entry *bypass_entry; + struct pfs_unit_sd bypass_info; + struct pfs_unit_sd bypass_slave; + struct pfs_unit_sd bypass_caps; + struct pfs_unit_sd wd_set_caps; + struct pfs_unit_sd bypass; + struct pfs_unit_sd bypass_change; + struct pfs_unit_sd bypass_wd; + struct pfs_unit_sd wd_expire_time; + struct pfs_unit_sd reset_bypass_wd; + struct pfs_unit_sd dis_bypass; + struct pfs_unit_sd bypass_pwup; + struct pfs_unit_sd bypass_pwoff; + struct pfs_unit_sd std_nic; + struct pfs_unit_sd tap; + struct pfs_unit_sd dis_tap; + struct pfs_unit_sd tap_pwup; + struct pfs_unit_sd tap_change; + struct pfs_unit_sd wd_exp_mode; + struct pfs_unit_sd wd_autoreset; + struct pfs_unit_sd tpl; + +}; + +typedef struct _bpctl_dev { + char *name; + char *desc; + struct pci_dev *pdev; /* PCI device */ + struct net_device *ndev; /* net device */ + unsigned long mem_map; + uint8_t bus; + uint8_t slot; + uint8_t func; + u_int32_t device; + u_int32_t vendor; + u_int32_t subvendor; + u_int32_t subdevice; + int ifindex; + uint32_t bp_caps; + uint32_t bp_caps_ex; + uint8_t bp_fw_ver; + int bp_ext_ver; + int wdt_status; + unsigned long bypass_wdt_on_time; + uint32_t bypass_timer_interval; + struct timer_list bp_timer; + uint32_t reset_time; + uint8_t bp_status_un; + atomic_t wdt_busy; + bp_media_type media_type; + int bp_tpl_flag; + struct timer_list bp_tpl_timer; + spinlock_t bypass_wr_lock; + int bp_10g; + int bp_10gb; + int bp_fiber5; + int bp_10g9; + int bp_i80; + int bp_540; + +// selftest stanza + int (*hard_start_xmit_save) (struct sk_buff * skb, + struct net_device * dev); + const struct net_device_ops *old_ops; + struct net_device_ops new_ops; + int bp_self_test_flag; + char *bp_tx_data; +// end selftest stanza +// + struct bypass_pfs_sd bypass_pfs_set; + +} bpctl_dev_t; + +static bpctl_dev_t *bpctl_dev_arr; + +static struct semaphore bpctl_sema; +static int device_num = 0; + +static int get_dev_idx(int ifindex); +static bpctl_dev_t *get_master_port_fn(bpctl_dev_t * pbpctl_dev); +static int disc_status(bpctl_dev_t * pbpctl_dev); +static int bypass_status(bpctl_dev_t * pbpctl_dev); +static int wdt_timer(bpctl_dev_t * pbpctl_dev, int *time_left); +static bpctl_dev_t *get_status_port_fn(bpctl_dev_t * pbpctl_dev); +static void if_scan_init(void); + +int bypass_proc_create_dev_sd(bpctl_dev_t * pbp_device_block); +int bypass_proc_remove_dev_sd(bpctl_dev_t * pbp_device_block); +int bp_proc_create(void); + +int is_bypass_fn(bpctl_dev_t * pbpctl_dev); +int get_dev_idx_bsf(int bus, int slot, int func); + +static unsigned long str_to_hex(char *p); +static int bp_device_event(struct notifier_block *unused, + unsigned long event, void *ptr) +{ + struct net_device *dev = ptr; + static bpctl_dev_t *pbpctl_dev = NULL, *pbpctl_dev_m = NULL; + int dev_num = 0, ret = 0, ret_d = 0, time_left = 0; + //printk("BP_PROC_SUPPORT event =%d %s %d\n", event,dev->name, dev->ifindex ); + //return NOTIFY_DONE; + if (!dev) + return NOTIFY_DONE; + if (event == NETDEV_REGISTER) { + { + struct ethtool_drvinfo drvinfo; + // char *str=NULL; + char cbuf[32]; + char *buf = NULL; + char res[10]; + int i = 0, ifindex, idx_dev = 0; + int bus = 0, slot = 0, func = 0; + ifindex = dev->ifindex; + + memset(res, 0, 10); + memset(&drvinfo, 0, sizeof(struct ethtool_drvinfo)); + + if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) { + memset(&drvinfo, 0, sizeof(drvinfo)); + dev->ethtool_ops->get_drvinfo(dev, &drvinfo); + } else + return NOTIFY_DONE; + if (!drvinfo.bus_info) + return NOTIFY_DONE; + if (!strcmp(drvinfo.bus_info, "N/A")) + return NOTIFY_DONE; + memcpy(&cbuf, drvinfo.bus_info, 32); + buf = &cbuf[0]; + + // while(*buf++){ + + /*if(*buf==':'){ + buf++; + break; + } */ + //} + while (*buf++ != ':') ; + for (i = 0; i < 10; i++, buf++) { + if (*buf == ':') + break; + res[i] = *buf; + + } + buf++; + bus = str_to_hex(res); + memset(res, 0, 10); + + for (i = 0; i < 10; i++, buf++) { + if (*buf == '.') + break; + res[i] = *buf; + + } + buf++; + slot = str_to_hex(res); + func = str_to_hex(buf); + idx_dev = get_dev_idx_bsf(bus, slot, func); + + if (idx_dev != -1) { + + bpctl_dev_arr[idx_dev].ifindex = ifindex; + bpctl_dev_arr[idx_dev].ndev = dev; + + bypass_proc_remove_dev_sd(&bpctl_dev_arr + [idx_dev]); + bypass_proc_create_dev_sd(&bpctl_dev_arr + [idx_dev]); + + } + + } + return NOTIFY_DONE; + + } + if (event == NETDEV_UNREGISTER) { + int idx_dev = 0; + //if_scan(); + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) + && (idx_dev < device_num)); idx_dev++) { + if (bpctl_dev_arr[idx_dev].ndev == dev) { + bypass_proc_remove_dev_sd(&bpctl_dev_arr + [idx_dev]); + bpctl_dev_arr[idx_dev].ndev = NULL; + + return NOTIFY_DONE; + + } + + } + return NOTIFY_DONE; + } + if (event == NETDEV_CHANGENAME) { + int idx_dev = 0; + //if_scan(); + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) + && (idx_dev < device_num)); idx_dev++) { + if (bpctl_dev_arr[idx_dev].ndev == dev) { + bypass_proc_remove_dev_sd(&bpctl_dev_arr + [idx_dev]); + bypass_proc_create_dev_sd(&bpctl_dev_arr + [idx_dev]); + + return NOTIFY_DONE; + + } + + } + return NOTIFY_DONE; + + } + //return NOTIFY_DONE; + + switch (event) { + + case NETDEV_CHANGE:{ + if (netif_carrier_ok(dev)) + return NOTIFY_DONE; + + //if_scan(); + if (((dev_num = get_dev_idx(dev->ifindex)) == -1) || + (!(pbpctl_dev = &bpctl_dev_arr[dev_num]))) + return NOTIFY_DONE; + + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (!pbpctl_dev_m) + return NOTIFY_DONE; + ret = bypass_status(pbpctl_dev_m); + if (ret == 1) + printk("bpmod: %s is in the Bypass mode now", + dev->name); + ret_d = disc_status(pbpctl_dev_m); + if (ret_d == 1) + printk + ("bpmod: %s is in the Disconnect mode now", + dev->name); + if (ret || ret_d) { + wdt_timer(pbpctl_dev_m, &time_left); + if (time_left == -1) + printk("; WDT has expired"); + printk(".\n"); + + } + return NOTIFY_DONE; + + } + + default: + return NOTIFY_DONE; + + } + return NOTIFY_DONE; + +} + +static struct notifier_block bp_notifier_block = { + .notifier_call = bp_device_event, +}; + +static int device_open(struct inode *inode, struct file *file) +{ +#ifdef DEBUG + printk("device_open(%p)\n", file); +#endif + Device_Open++; +/* +* Initialize the message +*/ + return SUCCESS; +} + +static int device_release(struct inode *inode, struct file *file) +{ +#ifdef DEBUG + printk("device_release(%p,%p)\n", inode, file); +#endif + Device_Open--; + return SUCCESS; +} + +int is_bypass_fn(bpctl_dev_t * pbpctl_dev); +int wdt_time_left(bpctl_dev_t * pbpctl_dev); + +static void write_pulse(bpctl_dev_t * pbpctl_dev, + unsigned int ctrl_ext, + unsigned char value, unsigned char len) +{ + unsigned char ctrl_val = 0; + unsigned int i = len; + unsigned int ctrl = 0; + bpctl_dev_t *pbpctl_dev_c = NULL; + + if (pbpctl_dev->bp_i80) + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + if (pbpctl_dev->bp_540) + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + + if (pbpctl_dev->bp_10g9) { + if (!(pbpctl_dev_c = get_status_port_fn(pbpctl_dev))) + return; + ctrl = BP10G_READ_REG(pbpctl_dev_c, ESDP); + } + + while (i--) { + ctrl_val = (value >> i) & 0x1; + if (ctrl_val) { + if (pbpctl_dev->bp_10g9) { + + /* To start management : MCLK 1, MDIO 1, output */ + /* DATA 1 CLK 1 */ + /*BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext|BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9)); */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + ctrl_ext | + BP10G_MDIO_DATA_OUT9); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + (ctrl | BP10G_MCLK_DATA_OUT9 | + BP10G_MCLK_DIR_OUT9)); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, (ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DATA5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5)); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, (ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80 + | + BPCTLI_CTRL_EXT_MDIO_DATA80)); + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, (ctrl | + BPCTLI_CTRL_EXT_MCLK_DIR80 + | + BPCTLI_CTRL_EXT_MCLK_DATA80)); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, (ctrl | + BP540_MDIO_DIR + | + BP540_MDIO_DATA + | + BP540_MCLK_DIR + | + BP540_MCLK_DATA)); + + } else if (pbpctl_dev->bp_10gb) { + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_SET | + BP10GB_MCLK_SET) & + ~(BP10GB_MCLK_DIR | + BP10GB_MDIO_DIR | + BP10GB_MDIO_CLR | + BP10GB_MCLK_CLR)); + + } else if (!pbpctl_dev->bp_10g) + /* To start management : MCLK 1, MDIO 1, output */ + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + (ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR | + BPCTLI_CTRL_EXT_MDIO_DIR | + BPCTLI_CTRL_EXT_MDIO_DATA | + BPCTLI_CTRL_EXT_MCLK_DATA)); + else { + +/* To start management : MCLK 1, MDIO 1, output*/ + //writel((0x2|0x8), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext | BP10G_MCLK_DATA_OUT + | BP10G_MDIO_DATA_OUT)); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, (ctrl | BP10G_MDIO_DATA | BP10G_MDIO_DIR)); + + } + + usec_delay(PULSE_TIME); + if (pbpctl_dev->bp_10g9) { + + /*BP10G_WRITE_REG(pbpctl_dev, I2CCTL, ((ctrl_ext|BP10G_MDIO_DATA_OUT9)&~(BP10G_MCLK_DATA_OUT9))); */ + /* DATA 1 CLK 0 */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + ctrl_ext | + BP10G_MDIO_DATA_OUT9); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + (ctrl | BP10G_MCLK_DIR_OUT9) & + ~BP10G_MCLK_DATA_OUT9); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 | + BPCTLI_CTRL_EXT_MDIO_DIR5 | + BPCTLI_CTRL_EXT_MDIO_DATA5) + & + ~ + (BPCTLI_CTRL_EXT_MCLK_DATA5))); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, (ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80 + | + BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | + BPCTLI_CTRL_EXT_MCLK_DIR80) + & + ~ + (BPCTLI_CTRL_EXT_MCLK_DATA80))); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, + (ctrl | BP540_MDIO_DIR | + BP540_MDIO_DATA | + BP540_MCLK_DIR) & + ~(BP540_MCLK_DATA)); + + } else if (pbpctl_dev->bp_10gb) { + + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_SET | + BP10GB_MCLK_CLR) & + ~(BP10GB_MCLK_DIR | + BP10GB_MDIO_DIR | + BP10GB_MDIO_CLR | + BP10GB_MCLK_SET)); + + } else if (!pbpctl_dev->bp_10g) + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR | + BPCTLI_CTRL_EXT_MDIO_DIR | + BPCTLI_CTRL_EXT_MDIO_DATA) + & + ~ + (BPCTLI_CTRL_EXT_MCLK_DATA))); + else { + + //writel((0x2), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + ((ctrl_ext | + BP10G_MDIO_DATA_OUT) & + ~(BP10G_MCLK_DATA_OUT))); + // BP10G_WRITE_REG(pbpctl_dev, ESDP, (ctrl |BP10G_MDIO_DIR|BP10G_MDIO_DATA)); + } + + usec_delay(PULSE_TIME); + + } else { + if (pbpctl_dev->bp_10g9) { + /* DATA 0 CLK 1 */ + /*BP10G_WRITE_REG(pbpctl_dev, I2CCTL, ((ctrl_ext|BP10G_MCLK_DATA_OUT9)&~BP10G_MDIO_DATA_OUT9)); */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & + ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + (ctrl | BP10G_MCLK_DATA_OUT9 | + BP10G_MCLK_DIR_OUT9)); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 | + BPCTLI_CTRL_EXT_MDIO_DIR5 | + BPCTLI_CTRL_EXT_MCLK_DATA5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA5))); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA80))); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + (ctrl | + BPCTLI_CTRL_EXT_MCLK_DIR80 | + BPCTLI_CTRL_EXT_MCLK_DATA80)); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP540_MCLK_DIR | + BP540_MCLK_DATA | + BP540_MDIO_DIR) & + ~(BP540_MDIO_DATA))); + + } else if (pbpctl_dev->bp_10gb) { + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | + BP10GB_MCLK_SET) & + ~(BP10GB_MCLK_DIR | + BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | + BP10GB_MCLK_CLR)); + + } else if (!pbpctl_dev->bp_10g) + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR | + BPCTLI_CTRL_EXT_MDIO_DIR | + BPCTLI_CTRL_EXT_MCLK_DATA) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA))); + else { + + // writel((0x8), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + ((ctrl_ext | + BP10G_MCLK_DATA_OUT) & + ~BP10G_MDIO_DATA_OUT)); + // BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + + } + usec_delay(PULSE_TIME); + if (pbpctl_dev->bp_10g9) { + /* DATA 0 CLK 0 */ + /*BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext&~(BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9))); */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & + ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + ((ctrl | BP10G_MCLK_DIR_OUT9) & + ~(BP10G_MCLK_DATA_OUT9))); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 | + BPCTLI_CTRL_EXT_MDIO_DIR5) + & + ~(BPCTLI_CTRL_EXT_MCLK_DATA5 + | + BPCTLI_CTRL_EXT_MDIO_DATA5))); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | + BPCTLI_CTRL_EXT_MCLK_DIR80) + & + ~ + (BPCTLI_CTRL_EXT_MCLK_DATA80))); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP540_MCLK_DIR | + BP540_MDIO_DIR) & + ~(BP540_MDIO_DATA | + BP540_MCLK_DATA))); + } else if (pbpctl_dev->bp_10gb) { + + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | + BP10GB_MCLK_CLR) & + ~(BP10GB_MCLK_DIR | + BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | + BP10GB_MCLK_SET)); + + } else if (!pbpctl_dev->bp_10g) + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR | + BPCTLI_CTRL_EXT_MDIO_DIR) & + ~(BPCTLI_CTRL_EXT_MCLK_DATA + | + BPCTLI_CTRL_EXT_MDIO_DATA))); + else { + + //writel((0x0), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext & + ~(BP10G_MCLK_DATA_OUT | + BP10G_MDIO_DATA_OUT))); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + } + + usec_delay(PULSE_TIME); + } + + } +} + +static int read_pulse(bpctl_dev_t * pbpctl_dev, unsigned int ctrl_ext, + unsigned char len) +{ + unsigned char ctrl_val = 0; + unsigned int i = len; + unsigned int ctrl = 0; + bpctl_dev_t *pbpctl_dev_c = NULL; + + if (pbpctl_dev->bp_i80) + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + if (pbpctl_dev->bp_540) + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + if (pbpctl_dev->bp_10g9) { + if (!(pbpctl_dev_c = get_status_port_fn(pbpctl_dev))) + return -1; + ctrl = BP10G_READ_REG(pbpctl_dev_c, ESDP); + } + + //ctrl_ext=BP10G_READ_REG(pbpctl_dev,EODSDP); + + while (i--) { + if (pbpctl_dev->bp_10g9) { + /*BP10G_WRITE_REG(pbpctl_dev, I2CCTL, ((ctrl_ext|BP10G_MDIO_DATA_OUT9)&~BP10G_MCLK_DATA_OUT9)); */ + /* DATA ? CLK 0 */ + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + ((ctrl | BP10G_MCLK_DIR_OUT9) & + ~(BP10G_MCLK_DATA_OUT9))); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DIR5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5))); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + (ctrl_ext & + ~BPCTLI_CTRL_EXT_MDIO_DIR80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80) + & ~(BPCTLI_CTRL_EXT_MCLK_DATA80))); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP540_MCLK_DIR) & + ~(BP540_MDIO_DIR | BP540_MCLK_DATA))); + + } else if (pbpctl_dev->bp_10gb) { + + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_DIR | + BP10GB_MCLK_CLR) & ~(BP10GB_MCLK_DIR | + BP10GB_MDIO_CLR | + BP10GB_MDIO_SET | + BP10GB_MCLK_SET)); + + } else if (!pbpctl_dev->bp_10g) + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DIR + | + BPCTLI_CTRL_EXT_MCLK_DATA))); + else { + + // writel(( 0/*0x1*/), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, ((ctrl_ext | BP10G_MDIO_DATA_OUT) & ~BP10G_MCLK_DATA_OUT)); /* ? */ + // printk("0x28=0x%x\n",BP10G_READ_REG(pbpctl_dev,EODSDP);); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, (ctrl &~BP10G_MDIO_DIR)); + + } + + usec_delay(PULSE_TIME); + if (pbpctl_dev->bp_10g9) { + /*BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext|BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9)); */ + /* DATA ? CLK 1 */ + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + (ctrl | BP10G_MCLK_DATA_OUT9 | + BP10G_MCLK_DIR_OUT9)); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DIR5))); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + (ctrl_ext & + ~(BPCTLI_CTRL_EXT_MDIO_DIR80))); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + (ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80 | + BPCTLI_CTRL_EXT_MCLK_DATA80)); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP540_MCLK_DIR | + BP540_MCLK_DATA) & + ~(BP540_MDIO_DIR))); + + } else if (pbpctl_dev->bp_10gb) { + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_DIR | + BP10GB_MCLK_SET) & ~(BP10GB_MCLK_DIR | + BP10GB_MDIO_CLR | + BP10GB_MDIO_SET | + BP10GB_MCLK_CLR)); + + } else if (!pbpctl_dev->bp_10g) + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MCLK_DATA) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DIR))); + else { + + // writel((0x8 /*|0x1*/ ), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext | BP10G_MCLK_DATA_OUT | + BP10G_MDIO_DATA_OUT)); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, (ctrl &~BP10G_MDIO_DIR)); + + } + if (pbpctl_dev->bp_10g9) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev, I2CCTL); + + } else if ((pbpctl_dev->bp_fiber5) || (pbpctl_dev->bp_i80)) { + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL); + } else if (pbpctl_dev->bp_540) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev, ESDP); + } else if (pbpctl_dev->bp_10gb) + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + + else if (!pbpctl_dev->bp_10g) + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + else + ctrl_ext = BP10G_READ_REG(pbpctl_dev, EODSDP); + //ctrl_ext =readl((void *)((pbpctl_dev)->mem_map) + 0x28); + + usec_delay(PULSE_TIME); + if (pbpctl_dev->bp_10g9) { + if (ctrl_ext & BP10G_MDIO_DATA_IN9) + ctrl_val |= 1 << i; + + } else if (pbpctl_dev->bp_fiber5) { + if (ctrl_ext & BPCTLI_CTRL_EXT_MDIO_DATA5) + ctrl_val |= 1 << i; + } else if (pbpctl_dev->bp_i80) { + if (ctrl_ext & BPCTLI_CTRL_EXT_MDIO_DATA80) + ctrl_val |= 1 << i; + } else if (pbpctl_dev->bp_540) { + if (ctrl_ext & BP540_MDIO_DATA) + ctrl_val |= 1 << i; + } else if (pbpctl_dev->bp_10gb) { + if (ctrl_ext & BP10GB_MDIO_DATA) + ctrl_val |= 1 << i; + + } else if (!pbpctl_dev->bp_10g) { + + if (ctrl_ext & BPCTLI_CTRL_EXT_MDIO_DATA) + ctrl_val |= 1 << i; + } else { + + if (ctrl_ext & BP10G_MDIO_DATA_IN) + ctrl_val |= 1 << i; + } + + } + + return ctrl_val; +} + +static void write_reg(bpctl_dev_t * pbpctl_dev, unsigned char value, + unsigned char addr) +{ + uint32_t ctrl_ext = 0, ctrl = 0; + bpctl_dev_t *pbpctl_dev_c = NULL; + unsigned long flags; + if (pbpctl_dev->bp_10g9) { + if (!(pbpctl_dev_c = get_status_port_fn(pbpctl_dev))) + return; + } + if ((pbpctl_dev->wdt_status == WDT_STATUS_EN) && + (pbpctl_dev->bp_ext_ver < PXG4BPFI_VER)) + wdt_time_left(pbpctl_dev); + +#ifdef BP_SYNC_FLAG + spin_lock_irqsave(&pbpctl_dev->bypass_wr_lock, flags); +#else + atomic_set(&pbpctl_dev->wdt_busy, 1); +#endif + if (pbpctl_dev->bp_10g9) { + + ctrl_ext = BP10G_READ_REG(pbpctl_dev, I2CCTL); + ctrl = BP10G_READ_REG(pbpctl_dev_c, ESDP); + /* DATA 0 CLK 0 */ + /* BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext&~(BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9))); */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + ((ctrl | BP10G_MCLK_DIR_OUT9) & + ~(BP10G_MCLK_DATA_OUT9))); + + } else if (pbpctl_dev->bp_fiber5) { + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DIR5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5))); + } else if (pbpctl_dev->bp_i80) { + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL); + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80) & + ~BPCTLI_CTRL_EXT_MCLK_DATA80)); + + } else if (pbpctl_dev->bp_540) { + ctrl = ctrl_ext = BP10G_READ_REG(pbpctl_dev, ESDP); + BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl | + BP540_MDIO_DIR | + BP540_MCLK_DIR) & + ~(BP540_MDIO_DATA | + BP540_MCLK_DATA))); + + } else if (pbpctl_dev->bp_10gb) { + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | BP10GB_MCLK_CLR) + & ~(BP10GB_MCLK_DIR | BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | BP10GB_MCLK_SET)); + + } else if (!pbpctl_dev->bp_10g) { + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MDIO_DIR) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA + | + BPCTLI_CTRL_EXT_MCLK_DATA))); + } else { + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + ctrl_ext = BP10G_READ_REG(pbpctl_dev, EODSDP); + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext & + ~(BP10G_MCLK_DATA_OUT | BP10G_MDIO_DATA_OUT))); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + //writel((0x0), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + } + usec_delay(CMND_INTERVAL); + + /*send sync cmd */ + write_pulse(pbpctl_dev, ctrl_ext, SYNC_CMD_VAL, SYNC_CMD_LEN); + /*send wr cmd */ + write_pulse(pbpctl_dev, ctrl_ext, WR_CMD_VAL, WR_CMD_LEN); + write_pulse(pbpctl_dev, ctrl_ext, addr, ADDR_CMD_LEN); + + /*write data */ + write_pulse(pbpctl_dev, ctrl_ext, value, WR_DATA_LEN); + if (pbpctl_dev->bp_10g9) { + /*BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext&~(BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9))); */ + /* DATA 0 CLK 0 */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + ((ctrl | BP10G_MCLK_DIR_OUT9) & + ~(BP10G_MCLK_DATA_OUT9))); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DIR5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5))); + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80) & + ~BPCTLI_CTRL_EXT_MCLK_DATA80)); + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl | + BP540_MDIO_DIR | + BP540_MCLK_DIR) & + ~(BP540_MDIO_DATA | + BP540_MCLK_DATA))); + } else if (pbpctl_dev->bp_10gb) { + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | BP10GB_MCLK_CLR) + & ~(BP10GB_MCLK_DIR | BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | BP10GB_MCLK_SET)); + + } else if (!pbpctl_dev->bp_10g) + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MDIO_DIR) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA + | + BPCTLI_CTRL_EXT_MCLK_DATA))); + else { + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext & + ~(BP10G_MCLK_DATA_OUT | BP10G_MDIO_DATA_OUT))); + // BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + + // writel((0x0), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + } + + usec_delay(CMND_INTERVAL * 4); + + if ((pbpctl_dev->wdt_status == WDT_STATUS_EN) && + (pbpctl_dev->bp_ext_ver < PXG4BPFI_VER) && (addr == CMND_REG_ADDR)) + pbpctl_dev->bypass_wdt_on_time = jiffies; +#ifdef BP_SYNC_FLAG + spin_unlock_irqrestore(&pbpctl_dev->bypass_wr_lock, flags); +#else + atomic_set(&pbpctl_dev->wdt_busy, 0); +#endif + +} + +static void write_data(bpctl_dev_t * pbpctl_dev, unsigned char value) +{ + write_reg(pbpctl_dev, value, CMND_REG_ADDR); +} + +static int read_reg(bpctl_dev_t * pbpctl_dev, unsigned char addr) +{ + uint32_t ctrl_ext = 0, ctrl = 0, ctrl_value = 0; + bpctl_dev_t *pbpctl_dev_c = NULL; + +#ifdef BP_SYNC_FLAG + unsigned long flags; + spin_lock_irqsave(&pbpctl_dev->bypass_wr_lock, flags); +#else + atomic_set(&pbpctl_dev->wdt_busy, 1); +#endif + if (pbpctl_dev->bp_10g9) { + if (!(pbpctl_dev_c = get_status_port_fn(pbpctl_dev))) + return -1; + } + + if (pbpctl_dev->bp_10g9) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev, I2CCTL); + ctrl = BP10G_READ_REG(pbpctl_dev_c, ESDP); + + /* BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext&~(BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9))); */ + /* DATA 0 CLK 0 */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + ((ctrl | BP10G_MCLK_DIR_OUT9) & + ~(BP10G_MCLK_DATA_OUT9))); + + } else if (pbpctl_dev->bp_fiber5) { + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL); + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DIR5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5))); + } else if (pbpctl_dev->bp_i80) { + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL); + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80) & + ~BPCTLI_CTRL_EXT_MCLK_DATA80)); + } else if (pbpctl_dev->bp_540) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev, ESDP); + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + + BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl | BP540_MCLK_DIR | + BP540_MDIO_DIR) & + ~(BP540_MDIO_DATA | + BP540_MCLK_DATA))); + } else if (pbpctl_dev->bp_10gb) { + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | BP10GB_MCLK_CLR) + & ~(BP10GB_MCLK_DIR | BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | BP10GB_MCLK_SET)); +#if 0 + + /*BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, (ctrl_ext | BP10GB_MCLK_DIR | BP10GB_MDIO_DIR| + BP10GB_MCLK_CLR|BP10GB_MDIO_CLR)); + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + printk("1reg=%x\n", ctrl_ext); */ + + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, ((ctrl_ext | + BP10GB_MCLK_SET | + BP10GB_MDIO_CLR)) + & ~(BP10GB_MCLK_CLR | BP10GB_MDIO_SET | + BP10GB_MCLK_DIR | BP10GB_MDIO_DIR)); + + /* bnx2x_set_spio(pbpctl_dev, 5, MISC_REGISTERS_SPIO_OUTPUT_LOW); + bnx2x_set_spio(pbpctl_dev, 4, MISC_REGISTERS_SPIO_OUTPUT_LOW); + bnx2x_set_spio(pbpctl_dev, 4, MISC_REGISTERS_SPIO_INPUT_HI_Z); */ + + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + + //printk("2reg=%x\n", ctrl_ext); + +#ifdef BP_SYNC_FLAG + spin_unlock_irqrestore(&pbpctl_dev->bypass_wr_lock, flags); +#else + atomic_set(&pbpctl_dev->wdt_busy, 0); +#endif + + return 0; + +#endif + + } else if (!pbpctl_dev->bp_10g) { + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MDIO_DIR) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA + | + BPCTLI_CTRL_EXT_MCLK_DATA))); + } else { + + // writel((0x0), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + ctrl_ext = BP10G_READ_REG(pbpctl_dev, EODSDP); + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext & + ~(BP10G_MCLK_DATA_OUT | BP10G_MDIO_DATA_OUT))); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + + } + + usec_delay(CMND_INTERVAL); + + /*send sync cmd */ + write_pulse(pbpctl_dev, ctrl_ext, SYNC_CMD_VAL, SYNC_CMD_LEN); + /*send rd cmd */ + write_pulse(pbpctl_dev, ctrl_ext, RD_CMD_VAL, RD_CMD_LEN); + /*send addr */ + write_pulse(pbpctl_dev, ctrl_ext, addr, ADDR_CMD_LEN); + /*read data */ + /* zero */ + if (pbpctl_dev->bp_10g9) { + /* DATA 0 CLK 1 */ + /*BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext|BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9)); */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext | BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + (ctrl | BP10G_MCLK_DATA_OUT9 | + BP10G_MCLK_DIR_OUT9)); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DATA5))); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + (ctrl_ext & + ~(BPCTLI_CTRL_EXT_MDIO_DATA80 | + BPCTLI_CTRL_EXT_MDIO_DIR80))); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + (ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80 | + BPCTLI_CTRL_EXT_MCLK_DATA80)); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, + (((ctrl | BP540_MDIO_DIR | BP540_MCLK_DIR | + BP540_MCLK_DATA) & ~BP540_MDIO_DATA))); + + } else if (pbpctl_dev->bp_10gb) { + + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_DIR | BP10GB_MCLK_SET) + & ~(BP10GB_MCLK_DIR | BP10GB_MDIO_SET | + BP10GB_MDIO_CLR | BP10GB_MCLK_CLR)); + + } else if (!pbpctl_dev->bp_10g) + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MCLK_DATA) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DIR + | + BPCTLI_CTRL_EXT_MDIO_DATA))); + else { + + // writel((0x8), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext | BP10G_MCLK_DATA_OUT | + BP10G_MDIO_DATA_OUT)); + + // BP10G_WRITE_REG(pbpctl_dev, ESDP, (ctrl &~(BP10G_MDIO_DATA|BP10G_MDIO_DIR))); + + } + usec_delay(PULSE_TIME); + + ctrl_value = read_pulse(pbpctl_dev, ctrl_ext, RD_DATA_LEN); + + if (pbpctl_dev->bp_10g9) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev, I2CCTL); + ctrl = BP10G_READ_REG(pbpctl_dev_c, ESDP); + + /* BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext&~(BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9))); */ + /* DATA 0 CLK 0 */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + ((ctrl | BP10G_MCLK_DIR_OUT9) & + ~(BP10G_MCLK_DATA_OUT9))); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DIR5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5))); + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80) & + ~BPCTLI_CTRL_EXT_MCLK_DATA80)); + + } else if (pbpctl_dev->bp_540) { + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl | BP540_MCLK_DIR | + BP540_MDIO_DIR) & + ~(BP540_MDIO_DATA | + BP540_MCLK_DATA))); + + } else if (pbpctl_dev->bp_10gb) { + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | BP10GB_MCLK_CLR) + & ~(BP10GB_MCLK_DIR | BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | BP10GB_MCLK_SET)); + + } else if (!pbpctl_dev->bp_10g) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MDIO_DIR) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA + | + BPCTLI_CTRL_EXT_MCLK_DATA))); + } else { + + //writel((0x0), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + ctrl_ext = BP10G_READ_REG(pbpctl_dev, EODSDP); + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext & + ~(BP10G_MCLK_DATA_OUT | BP10G_MDIO_DATA_OUT))); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + + } + + usec_delay(CMND_INTERVAL * 4); +#ifdef BP_SYNC_FLAG + spin_unlock_irqrestore(&pbpctl_dev->bypass_wr_lock, flags); +#else + atomic_set(&pbpctl_dev->wdt_busy, 0); +#endif + + return ctrl_value; +} + +static int wdt_pulse(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0, ctrl = 0; + bpctl_dev_t *pbpctl_dev_c = NULL; + +#ifdef BP_SYNC_FLAG + unsigned long flags; + + spin_lock_irqsave(&pbpctl_dev->bypass_wr_lock, flags); +#else + + if ((atomic_read(&pbpctl_dev->wdt_busy)) == 1) + return -1; +#endif + if (pbpctl_dev->bp_10g9) { + if (!(pbpctl_dev_c = get_status_port_fn(pbpctl_dev))) + return -1; + } + + if (pbpctl_dev->bp_10g9) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev, I2CCTL); + ctrl = BP10G_READ_REG(pbpctl_dev_c, ESDP); + + /* BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext&~(BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9))); */ + /* DATA 0 CLK 0 */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + ((ctrl | BP10G_MCLK_DIR_OUT9) & + ~(BP10G_MCLK_DATA_OUT9))); + + } else if (pbpctl_dev->bp_fiber5) { + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DIR5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5))); + } else if (pbpctl_dev->bp_i80) { + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL); + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80) & + ~BPCTLI_CTRL_EXT_MCLK_DATA80)); + } else if (pbpctl_dev->bp_540) { + ctrl_ext = ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl | BP540_MCLK_DIR | + BP540_MDIO_DIR) & + ~(BP540_MDIO_DATA | + BP540_MCLK_DATA))); + } else if (pbpctl_dev->bp_10gb) { + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | BP10GB_MCLK_CLR) + & ~(BP10GB_MCLK_DIR | BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | BP10GB_MCLK_SET)); + + } else if (!pbpctl_dev->bp_10g) { + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MDIO_DIR) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA + | + BPCTLI_CTRL_EXT_MCLK_DATA))); + } else { + + // writel((0x0), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + ctrl_ext = BP10G_READ_REG(pbpctl_dev, EODSDP); + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext & + ~(BP10G_MCLK_DATA_OUT | BP10G_MDIO_DATA_OUT))); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + + } + if (pbpctl_dev->bp_10g9) { + /* BP10G_WRITE_REG(pbpctl_dev, I2CCTL, ((ctrl_ext|BP10G_MCLK_DATA_OUT9)&~BP10G_MDIO_DATA_OUT9)); */ + /* DATA 0 CLK 1 */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + (ctrl | BP10G_MCLK_DATA_OUT9 | + BP10G_MCLK_DIR_OUT9)); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DIR5 + | + BPCTLI_CTRL_EXT_MCLK_DATA5) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA5))); + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + (ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80 | + BPCTLI_CTRL_EXT_MCLK_DATA80)); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl | + BP540_MDIO_DIR | + BP540_MCLK_DIR | + BP540_MCLK_DATA) & + ~BP540_MDIO_DATA)); + + } else if (pbpctl_dev->bp_10gb) { + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | BP10GB_MCLK_SET) + & ~(BP10GB_MCLK_DIR | BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | BP10GB_MCLK_CLR)); + + } else if (!pbpctl_dev->bp_10g) + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MDIO_DIR + | + BPCTLI_CTRL_EXT_MCLK_DATA) + & + ~ + (BPCTLI_CTRL_EXT_MDIO_DATA))); + else { + + //writel((0x8), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + ((ctrl_ext | BP10G_MCLK_DATA_OUT) & + ~BP10G_MDIO_DATA_OUT)); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + + } + + usec_delay(WDT_INTERVAL); + if (pbpctl_dev->bp_10g9) { + /* BP10G_WRITE_REG(pbpctl_dev, I2CCTL, (ctrl_ext&~(BP10G_MCLK_DATA_OUT9|BP10G_MDIO_DATA_OUT9))); */ + /* DATA 0 CLK 0 */ + BP10G_WRITE_REG(pbpctl_dev, I2CCTL, + (ctrl_ext & ~BP10G_MDIO_DATA_OUT9)); + BP10G_WRITE_REG(pbpctl_dev_c, ESDP, + ((ctrl | BP10G_MCLK_DIR_OUT9) & + ~(BP10G_MCLK_DATA_OUT9))); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR5 + | + BPCTLI_CTRL_EXT_MDIO_DIR5) + & + ~ + (BPCTLI_CTRL_EXT_MCLK_DATA5 + | + BPCTLI_CTRL_EXT_MDIO_DATA5))); + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, ((ctrl_ext | + BPCTLI_CTRL_EXT_MDIO_DIR80) + & + ~BPCTLI_CTRL_EXT_MDIO_DATA80)); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | BPCTLI_CTRL_EXT_MCLK_DIR80) & + ~BPCTLI_CTRL_EXT_MCLK_DATA80)); + + } else if (pbpctl_dev->bp_540) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl | BP540_MCLK_DIR | + BP540_MDIO_DIR) & + ~(BP540_MDIO_DATA | + BP540_MCLK_DATA))); + + } else if (pbpctl_dev->bp_10gb) { + ctrl_ext = BP10GB_READ_REG(pbpctl_dev, MISC_REG_SPIO); + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_SPIO, + (ctrl_ext | BP10GB_MDIO_CLR | BP10GB_MCLK_CLR) + & ~(BP10GB_MCLK_DIR | BP10GB_MDIO_DIR | + BP10GB_MDIO_SET | BP10GB_MCLK_SET)); + + } else if (!pbpctl_dev->bp_10g) + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR + | + BPCTLI_CTRL_EXT_MDIO_DIR) + & + ~ + (BPCTLI_CTRL_EXT_MCLK_DATA + | + BPCTLI_CTRL_EXT_MDIO_DATA))); + else { + + //writel((0x0), (void *)(((pbpctl_dev)->mem_map) + 0x28)) ; + BP10G_WRITE_REG(pbpctl_dev, EODSDP, + (ctrl_ext & + ~(BP10G_MCLK_DATA_OUT | BP10G_MDIO_DATA_OUT))); + //BP10G_WRITE_REG(pbpctl_dev, ESDP, ((ctrl |BP10G_MDIO_DIR)&~BP10G_MDIO_DATA)); + } + if ((pbpctl_dev->wdt_status == WDT_STATUS_EN) /*&& + (pbpctl_dev->bp_ext_verbypass_wdt_on_time = jiffies; +#ifdef BP_SYNC_FLAG + spin_unlock_irqrestore(&pbpctl_dev->bypass_wr_lock, flags); +#endif + usec_delay(CMND_INTERVAL * 4); + return 0; +} + +static void data_pulse(bpctl_dev_t * pbpctl_dev, unsigned char value) +{ + + uint32_t ctrl_ext = 0; +#ifdef BP_SYNC_FLAG + unsigned long flags; +#endif + wdt_time_left(pbpctl_dev); +#ifdef BP_SYNC_FLAG + spin_lock_irqsave(&pbpctl_dev->bypass_wr_lock, flags); +#else + atomic_set(&pbpctl_dev->wdt_busy, 1); +#endif + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_SDP6_DIR | + BPCTLI_CTRL_EXT_SDP7_DIR) & + ~(BPCTLI_CTRL_EXT_SDP6_DATA | + BPCTLI_CTRL_EXT_SDP7_DATA))); + + usec_delay(INIT_CMND_INTERVAL); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_SDP6_DIR | + BPCTLI_CTRL_EXT_SDP7_DIR | + BPCTLI_CTRL_EXT_SDP6_DATA) & + ~ + (BPCTLI_CTRL_EXT_SDP7_DATA))); + usec_delay(INIT_CMND_INTERVAL); + + while (value) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ctrl_ext | + BPCTLI_CTRL_EXT_SDP6_DIR | + BPCTLI_CTRL_EXT_SDP7_DIR | + BPCTLI_CTRL_EXT_SDP6_DATA | + BPCTLI_CTRL_EXT_SDP7_DATA); + usec_delay(PULSE_INTERVAL); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_SDP6_DIR + | + BPCTLI_CTRL_EXT_SDP7_DIR + | + BPCTLI_CTRL_EXT_SDP6_DATA) + & + ~BPCTLI_CTRL_EXT_SDP7_DATA)); + usec_delay(PULSE_INTERVAL); + value--; + + } + usec_delay(INIT_CMND_INTERVAL - PULSE_INTERVAL); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_SDP6_DIR | + BPCTLI_CTRL_EXT_SDP7_DIR) & + ~(BPCTLI_CTRL_EXT_SDP6_DATA | + BPCTLI_CTRL_EXT_SDP7_DATA))); + usec_delay(WDT_TIME_CNT); + if (pbpctl_dev->wdt_status == WDT_STATUS_EN) + pbpctl_dev->bypass_wdt_on_time = jiffies; +#ifdef BP_SYNC_FLAG + spin_unlock_irqrestore(&pbpctl_dev->bypass_wr_lock, flags); +#else + atomic_set(&pbpctl_dev->wdt_busy, 0); +#endif + +} + +static int send_wdt_pulse(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0; + +#ifdef BP_SYNC_FLAG + unsigned long flags; + + spin_lock_irqsave(&pbpctl_dev->bypass_wr_lock, flags); +#else + + if ((atomic_read(&pbpctl_dev->wdt_busy)) == 1) + return -1; +#endif + wdt_time_left(pbpctl_dev); + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ctrl_ext | /* 1 */ + BPCTLI_CTRL_EXT_SDP7_DIR | + BPCTLI_CTRL_EXT_SDP7_DATA); + usec_delay(PULSE_INTERVAL); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | /* 0 */ + BPCTLI_CTRL_EXT_SDP7_DIR) & + ~BPCTLI_CTRL_EXT_SDP7_DATA)); + + usec_delay(PULSE_INTERVAL); + if (pbpctl_dev->wdt_status == WDT_STATUS_EN) + pbpctl_dev->bypass_wdt_on_time = jiffies; +#ifdef BP_SYNC_FLAG + spin_unlock_irqrestore(&pbpctl_dev->bypass_wr_lock, flags); +#endif + + return 0; +} + +void send_bypass_clear_pulse(bpctl_dev_t * pbpctl_dev, unsigned int value) +{ + uint32_t ctrl_ext = 0; + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | /* 0 */ + BPCTLI_CTRL_EXT_SDP6_DIR) & + ~BPCTLI_CTRL_EXT_SDP6_DATA)); + + usec_delay(PULSE_INTERVAL); + while (value) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ctrl_ext | /* 1 */ + BPCTLI_CTRL_EXT_SDP6_DIR | + BPCTLI_CTRL_EXT_SDP6_DATA); + usec_delay(PULSE_INTERVAL); + value--; + } + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | /* 0 */ + BPCTLI_CTRL_EXT_SDP6_DIR) & + ~BPCTLI_CTRL_EXT_SDP6_DATA)); + usec_delay(PULSE_INTERVAL); +} + +/* #endif OLD_FW */ +#ifdef BYPASS_DEBUG + +int pulse_set_fn(bpctl_dev_t * pbpctl_dev, unsigned int counter) +{ + uint32_t ctrl_ext = 0; + + if (!pbpctl_dev) + return -1; + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + write_pulse_1(pbpctl_dev, ctrl_ext, counter, counter); + + pbpctl_dev->bypass_wdt_status = 0; + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + write_pulse_1(pbpctl_dev, ctrl_ext, counter, counter); + } else { + wdt_time_left(pbpctl_dev); + if (pbpctl_dev->wdt_status == WDT_STATUS_EN) { + pbpctl_dev->wdt_status = 0; + data_pulse(pbpctl_dev, counter); + pbpctl_dev->wdt_status = WDT_STATUS_EN; + pbpctl_dev->bypass_wdt_on_time = jiffies; + + } else + data_pulse(pbpctl_dev, counter); + } + + return 0; +} + +int zero_set_fn(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0, ctrl_value = 0; + if (!pbpctl_dev) + return -1; + + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + printk("zero_set"); + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_MCLK_DIR) + & + ~ + (BPCTLI_CTRL_EXT_MCLK_DATA + | + BPCTLI_CTRL_EXT_MDIO_DIR + | + BPCTLI_CTRL_EXT_MDIO_DATA))); + + } + return ctrl_value; +} + +int pulse_get2_fn(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0, ctrl_value = 0; + if (!pbpctl_dev) + return -1; + + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + printk("pulse_get_fn\n"); + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + ctrl_value = read_pulse_2(pbpctl_dev, ctrl_ext); + printk("read:%d\n", ctrl_value); + } + return ctrl_value; +} + +int pulse_get1_fn(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0, ctrl_value = 0; + if (!pbpctl_dev) + return -1; + + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + + printk("pulse_get_fn\n"); + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + ctrl_value = read_pulse_1(pbpctl_dev, ctrl_ext); + printk("read:%d\n", ctrl_value); + } + return ctrl_value; +} + +int gpio6_set_fn(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0; + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ctrl_ext | + BPCTLI_CTRL_EXT_SDP6_DIR | + BPCTLI_CTRL_EXT_SDP6_DATA); + return 0; +} + +int gpio7_set_fn(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0; + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ctrl_ext | + BPCTLI_CTRL_EXT_SDP7_DIR | + BPCTLI_CTRL_EXT_SDP7_DATA); + return 0; +} + +int gpio7_clear_fn(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0; + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_SDP7_DIR) & + ~BPCTLI_CTRL_EXT_SDP7_DATA)); + return 0; +} + +int gpio6_clear_fn(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0; + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, ((ctrl_ext | + BPCTLI_CTRL_EXT_SDP6_DIR) & + ~BPCTLI_CTRL_EXT_SDP6_DATA)); + return 0; +} +#endif /*BYPASS_DEBUG */ + +static bpctl_dev_t *get_status_port_fn(bpctl_dev_t * pbpctl_dev) +{ + int idx_dev = 0; + + if (pbpctl_dev == NULL) + return NULL; + + if ((pbpctl_dev->func == 0) || (pbpctl_dev->func == 2)) { + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) + && (idx_dev < device_num)); idx_dev++) { + if ((bpctl_dev_arr[idx_dev].bus == pbpctl_dev->bus) + && (bpctl_dev_arr[idx_dev].slot == pbpctl_dev->slot) + && ((bpctl_dev_arr[idx_dev].func == 1) + && (pbpctl_dev->func == 0))) { + + return (&(bpctl_dev_arr[idx_dev])); + } + if ((bpctl_dev_arr[idx_dev].bus == pbpctl_dev->bus) && + (bpctl_dev_arr[idx_dev].slot == pbpctl_dev->slot) && + ((bpctl_dev_arr[idx_dev].func == 3) + && (pbpctl_dev->func == 2))) { + + return (&(bpctl_dev_arr[idx_dev])); + } + } + } + return NULL; +} + +static bpctl_dev_t *get_master_port_fn(bpctl_dev_t * pbpctl_dev) +{ + int idx_dev = 0; + + if (pbpctl_dev == NULL) + return NULL; + + if ((pbpctl_dev->func == 1) || (pbpctl_dev->func == 3)) { + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) + && (idx_dev < device_num)); idx_dev++) { + if ((bpctl_dev_arr[idx_dev].bus == pbpctl_dev->bus) + && (bpctl_dev_arr[idx_dev].slot == pbpctl_dev->slot) + && ((bpctl_dev_arr[idx_dev].func == 0) + && (pbpctl_dev->func == 1))) { + + return (&(bpctl_dev_arr[idx_dev])); + } + if ((bpctl_dev_arr[idx_dev].bus == pbpctl_dev->bus) && + (bpctl_dev_arr[idx_dev].slot == pbpctl_dev->slot) && + ((bpctl_dev_arr[idx_dev].func == 2) + && (pbpctl_dev->func == 3))) { + + return (&(bpctl_dev_arr[idx_dev])); + } + } + } + return NULL; +} + +/**************************************/ +/**************INTEL API***************/ +/**************************************/ + +static void write_data_port_int(bpctl_dev_t * pbpctl_dev, + unsigned char ctrl_value) +{ + uint32_t value; + + value = BPCTL_READ_REG(pbpctl_dev, CTRL); +/* Make SDP0 Pin Directonality to Output */ + value |= BPCTLI_CTRL_SDP0_DIR; + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, value); + + value &= ~BPCTLI_CTRL_SDP0_DATA; + value |= ((ctrl_value & 0x1) << BPCTLI_CTRL_SDP0_SHIFT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, value); + + value = (BPCTL_READ_REG(pbpctl_dev, CTRL_EXT)); +/* Make SDP2 Pin Directonality to Output */ + value |= BPCTLI_CTRL_EXT_SDP6_DIR; + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, value); + + value &= ~BPCTLI_CTRL_EXT_SDP6_DATA; + value |= (((ctrl_value & 0x2) >> 1) << BPCTLI_CTRL_EXT_SDP6_SHIFT); + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, value); + +} + +static int write_data_int(bpctl_dev_t * pbpctl_dev, unsigned char value) +{ + bpctl_dev_t *pbpctl_dev_b = NULL; + + if (!(pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + return -1; + atomic_set(&pbpctl_dev->wdt_busy, 1); + write_data_port_int(pbpctl_dev, value & 0x3); + write_data_port_int(pbpctl_dev_b, ((value & 0xc) >> 2)); + atomic_set(&pbpctl_dev->wdt_busy, 0); + + return 0; +} + +static int wdt_pulse_int(bpctl_dev_t * pbpctl_dev) +{ + + if ((atomic_read(&pbpctl_dev->wdt_busy)) == 1) + return -1; + + if ((write_data_int(pbpctl_dev, RESET_WDT_INT)) < 0) + return -1; + msec_delay_bp(CMND_INTERVAL_INT); + if ((write_data_int(pbpctl_dev, CMND_OFF_INT)) < 0) + return -1; + msec_delay_bp(CMND_INTERVAL_INT); + + if (pbpctl_dev->wdt_status == WDT_STATUS_EN) + pbpctl_dev->bypass_wdt_on_time = jiffies; + + return 0; +} + +/*************************************/ +/************* COMMANDS **************/ +/*************************************/ + +/* CMND_ON 0x4 (100)*/ +int cmnd_on(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) + return 0; + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) + write_data(pbpctl_dev, CMND_ON); + else + data_pulse(pbpctl_dev, CMND_ON); + ret = 0; + } + return ret; +} + +/* CMND_OFF 0x2 (10)*/ +int cmnd_off(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + write_data_int(pbpctl_dev, CMND_OFF_INT); + msec_delay_bp(CMND_INTERVAL_INT); + } else if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) + write_data(pbpctl_dev, CMND_OFF); + else + data_pulse(pbpctl_dev, CMND_OFF); + ret = 0; + }; + return ret; +} + +/* BYPASS_ON (0xa)*/ +int bypass_on(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + + if (pbpctl_dev->bp_caps & BP_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + write_data_int(pbpctl_dev, BYPASS_ON_INT); + msec_delay_bp(BYPASS_DELAY_INT); + pbpctl_dev->bp_status_un = 0; + } else if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + write_data(pbpctl_dev, BYPASS_ON); + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) + msec_delay_bp(LATCH_DELAY); + } else + data_pulse(pbpctl_dev, BYPASS_ON); + ret = 0; + }; + return ret; +} + +/* BYPASS_OFF (0x8 111)*/ +int bypass_off(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + + if (pbpctl_dev->bp_caps & BP_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + write_data_int(pbpctl_dev, DIS_BYPASS_CAP_INT); + msec_delay_bp(BYPASS_DELAY_INT); + write_data_int(pbpctl_dev, PWROFF_BYPASS_ON_INT); + msec_delay_bp(BYPASS_DELAY_INT); + pbpctl_dev->bp_status_un = 0; + } else if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + write_data(pbpctl_dev, BYPASS_OFF); + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) + msec_delay_bp(LATCH_DELAY); + } else + data_pulse(pbpctl_dev, BYPASS_OFF); + ret = 0; + } + return ret; +} + +/* TAP_OFF (0x9)*/ +int tap_off(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + if ((pbpctl_dev->bp_caps & TAP_CAP) + && (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER)) { + write_data(pbpctl_dev, TAP_OFF); + msec_delay_bp(LATCH_DELAY); + ret = 0; + }; + return ret; +} + +/* TAP_ON (0xb)*/ +int tap_on(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + if ((pbpctl_dev->bp_caps & TAP_CAP) + && (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER)) { + write_data(pbpctl_dev, TAP_ON); + msec_delay_bp(LATCH_DELAY); + ret = 0; + }; + return ret; +} + +/* DISC_OFF (0x9)*/ +int disc_off(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if ((pbpctl_dev->bp_caps & DISC_CAP) && (pbpctl_dev->bp_ext_ver >= 0x8)) { + write_data(pbpctl_dev, DISC_OFF); + msec_delay_bp(LATCH_DELAY); + } else + ret = BP_NOT_CAP; + return ret; +} + +/* DISC_ON (0xb)*/ +int disc_on(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if ((pbpctl_dev->bp_caps & DISC_CAP) && (pbpctl_dev->bp_ext_ver >= 0x8)) { + write_data(pbpctl_dev, /*DISC_ON */ 0x85); + msec_delay_bp(LATCH_DELAY); + } else + ret = BP_NOT_CAP; + return ret; +} + +/* DISC_PORT_ON */ +int disc_port_on(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + bpctl_dev_t *pbpctl_dev_m; + + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m == NULL) + return BP_NOT_CAP; + + if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { + if (is_bypass_fn(pbpctl_dev) == 1) { + + write_data(pbpctl_dev_m, TX_DISA); + } else { + + write_data(pbpctl_dev_m, TX_DISB); + } + + msec_delay_bp(LATCH_DELAY); + + } + return ret; +} + +/* DISC_PORT_OFF */ +int disc_port_off(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + bpctl_dev_t *pbpctl_dev_m; + + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m == NULL) + return BP_NOT_CAP; + + if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { + if (is_bypass_fn(pbpctl_dev) == 1) + write_data(pbpctl_dev_m, TX_ENA); + else + write_data(pbpctl_dev_m, TX_ENB); + + msec_delay_bp(LATCH_DELAY); + + } + return ret; +} + +/*TWO_PORT_LINK_HW_EN (0xe)*/ +int tpl_hw_on(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0, ctrl = 0; + bpctl_dev_t *pbpctl_dev_b = NULL; + + if (!(pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + return BP_NOT_CAP; + + if (pbpctl_dev->bp_caps_ex & TPL2_CAP_EX) { + cmnd_on(pbpctl_dev); + write_data(pbpctl_dev, TPL2_ON); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + cmnd_off(pbpctl_dev); + return ret; + } + + if (TPL_IF_SERIES(pbpctl_dev->subdevice)) { + ctrl = BPCTL_READ_REG(pbpctl_dev_b, CTRL); + BPCTL_BP_WRITE_REG(pbpctl_dev_b, CTRL, + ((ctrl | BPCTLI_CTRL_SWDPIO0) & + ~BPCTLI_CTRL_SWDPIN0)); + } else + ret = BP_NOT_CAP; + return ret; +} + +/*TWO_PORT_LINK_HW_DIS (0xc)*/ +int tpl_hw_off(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0, ctrl = 0; + bpctl_dev_t *pbpctl_dev_b = NULL; + + if (!(pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + return BP_NOT_CAP; + if (pbpctl_dev->bp_caps_ex & TPL2_CAP_EX) { + cmnd_on(pbpctl_dev); + write_data(pbpctl_dev, TPL2_OFF); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + cmnd_off(pbpctl_dev); + return ret; + } + if (TPL_IF_SERIES(pbpctl_dev->subdevice)) { + ctrl = BPCTL_READ_REG(pbpctl_dev_b, CTRL); + BPCTL_BP_WRITE_REG(pbpctl_dev_b, CTRL, + (ctrl | BPCTLI_CTRL_SWDPIO0 | + BPCTLI_CTRL_SWDPIN0)); + } else + ret = BP_NOT_CAP; + return ret; +} + +/* WDT_OFF (0x6 110)*/ +int wdt_off(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + bypass_off(pbpctl_dev); + } else if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) + write_data(pbpctl_dev, WDT_OFF); + else + data_pulse(pbpctl_dev, WDT_OFF); + pbpctl_dev->wdt_status = WDT_STATUS_DIS; + ret = 0; + }; + return ret; +} + +/* WDT_ON (0x10)*/ + +/***Global***/ +static unsigned int + wdt_val_array[] = { 1000, 1500, 2000, 3000, 4000, 8000, 16000, 32000, 0 }; + +int wdt_on(bpctl_dev_t * pbpctl_dev, unsigned int timeout) +{ + + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + unsigned int pulse = 0, temp_value = 0, temp_cnt = 0; + pbpctl_dev->wdt_status = 0; + + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + for (; wdt_val_array[temp_cnt]; temp_cnt++) + if (timeout <= wdt_val_array[temp_cnt]) + break; + + if (!wdt_val_array[temp_cnt]) + temp_cnt--; + + timeout = wdt_val_array[temp_cnt]; + temp_cnt += 0x7; + + write_data_int(pbpctl_dev, DIS_BYPASS_CAP_INT); + msec_delay_bp(BYPASS_DELAY_INT); + pbpctl_dev->bp_status_un = 0; + write_data_int(pbpctl_dev, temp_cnt); + pbpctl_dev->bypass_wdt_on_time = jiffies; + msec_delay_bp(CMND_INTERVAL_INT); + pbpctl_dev->bypass_timer_interval = timeout; + } else { + timeout = + (timeout < + TIMEOUT_UNIT ? TIMEOUT_UNIT : (timeout > + WDT_TIMEOUT_MAX ? + WDT_TIMEOUT_MAX : + timeout)); + temp_value = timeout / 100; + while ((temp_value >>= 1)) + temp_cnt++; + if (timeout > ((1 << temp_cnt) * 100)) + temp_cnt++; + pbpctl_dev->bypass_wdt_on_time = jiffies; + pulse = (WDT_ON | temp_cnt); + if (pbpctl_dev->bp_ext_ver == OLD_IF_VER) + data_pulse(pbpctl_dev, pulse); + else + write_data(pbpctl_dev, pulse); + pbpctl_dev->bypass_timer_interval = + (1 << temp_cnt) * 100; + } + pbpctl_dev->wdt_status = WDT_STATUS_EN; + return 0; + } + return BP_NOT_CAP; +} + +void bp75_put_hw_semaphore_generic(bpctl_dev_t * pbpctl_dev) +{ + u32 swsm; + + swsm = BPCTL_READ_REG(pbpctl_dev, SWSM); + + swsm &= ~(BPCTLI_SWSM_SMBI | BPCTLI_SWSM_SWESMBI); + + BPCTL_WRITE_REG(pbpctl_dev, SWSM, swsm); +} + +s32 bp75_get_hw_semaphore_generic(bpctl_dev_t * pbpctl_dev) +{ + u32 swsm; + s32 ret_val = 0; + s32 timeout = 8192 + 1; + s32 i = 0; + + /* Get the SW semaphore */ + while (i < timeout) { + swsm = BPCTL_READ_REG(pbpctl_dev, SWSM); + if (!(swsm & BPCTLI_SWSM_SMBI)) + break; + + usec_delay(50); + i++; + } + + if (i == timeout) { + printk + ("bpctl_mod: Driver can't access device - SMBI bit is set.\n"); + ret_val = -1; + goto out; + } + + /* Get the FW semaphore. */ + for (i = 0; i < timeout; i++) { + swsm = BPCTL_READ_REG(pbpctl_dev, SWSM); + BPCTL_WRITE_REG(pbpctl_dev, SWSM, swsm | BPCTLI_SWSM_SWESMBI); + + /* Semaphore acquired if bit latched */ + if (BPCTL_READ_REG(pbpctl_dev, SWSM) & BPCTLI_SWSM_SWESMBI) + break; + + usec_delay(50); + } + + if (i == timeout) { + /* Release semaphores */ + bp75_put_hw_semaphore_generic(pbpctl_dev); + printk("bpctl_mod: Driver can't access the NVM\n"); + ret_val = -1; + goto out; + } + + out: + return ret_val; +} + +static void bp75_release_phy(bpctl_dev_t * pbpctl_dev) +{ + u16 mask = BPCTLI_SWFW_PHY0_SM; + u32 swfw_sync; + + if ((pbpctl_dev->func == 1) || (pbpctl_dev->func == 3)) + mask = BPCTLI_SWFW_PHY1_SM; + + while (bp75_get_hw_semaphore_generic(pbpctl_dev) != 0) ; + /* Empty */ + + swfw_sync = BPCTL_READ_REG(pbpctl_dev, SW_FW_SYNC); + swfw_sync &= ~mask; + BPCTL_WRITE_REG(pbpctl_dev, SW_FW_SYNC, swfw_sync); + + bp75_put_hw_semaphore_generic(pbpctl_dev); +} + +static s32 bp75_acquire_phy(bpctl_dev_t * pbpctl_dev) +{ + u16 mask = BPCTLI_SWFW_PHY0_SM; + u32 swfw_sync; + u32 swmask; + u32 fwmask; + s32 ret_val = 0; + s32 i = 0, timeout = 200; + + if ((pbpctl_dev->func == 1) || (pbpctl_dev->func == 3)) + mask = BPCTLI_SWFW_PHY1_SM; + + swmask = mask; + fwmask = mask << 16; + + while (i < timeout) { + if (bp75_get_hw_semaphore_generic(pbpctl_dev)) { + ret_val = -1; + goto out; + } + + swfw_sync = BPCTL_READ_REG(pbpctl_dev, SW_FW_SYNC); + if (!(swfw_sync & (fwmask | swmask))) + break; + + bp75_put_hw_semaphore_generic(pbpctl_dev); + mdelay(5); + i++; + } + + if (i == timeout) { + printk + ("bpctl_mod: Driver can't access resource, SW_FW_SYNC timeout.\n"); + ret_val = -1; + goto out; + } + + swfw_sync |= swmask; + BPCTL_WRITE_REG(pbpctl_dev, SW_FW_SYNC, swfw_sync); + + bp75_put_hw_semaphore_generic(pbpctl_dev); + + out: + return ret_val; +} + +s32 bp75_read_phy_reg_mdic(bpctl_dev_t * pbpctl_dev, u32 offset, u16 * data) +{ + u32 i, mdic = 0; + s32 ret_val = 0; + u32 phy_addr = 1; + + mdic = ((offset << BPCTLI_MDIC_REG_SHIFT) | + (phy_addr << BPCTLI_MDIC_PHY_SHIFT) | (BPCTLI_MDIC_OP_READ)); + + BPCTL_WRITE_REG(pbpctl_dev, MDIC, mdic); + + for (i = 0; i < (BPCTLI_GEN_POLL_TIMEOUT * 3); i++) { + usec_delay(50); + mdic = BPCTL_READ_REG(pbpctl_dev, MDIC); + if (mdic & BPCTLI_MDIC_READY) + break; + } + if (!(mdic & BPCTLI_MDIC_READY)) { + printk("bpctl_mod: MDI Read did not complete\n"); + ret_val = -1; + goto out; + } + if (mdic & BPCTLI_MDIC_ERROR) { + printk("bpctl_mod: MDI Error\n"); + ret_val = -1; + goto out; + } + *data = (u16) mdic; + + out: + return ret_val; +} + +s32 bp75_write_phy_reg_mdic(bpctl_dev_t * pbpctl_dev, u32 offset, u16 data) +{ + u32 i, mdic = 0; + s32 ret_val = 0; + u32 phy_addr = 1; + + mdic = (((u32) data) | + (offset << BPCTLI_MDIC_REG_SHIFT) | + (phy_addr << BPCTLI_MDIC_PHY_SHIFT) | (BPCTLI_MDIC_OP_WRITE)); + + BPCTL_WRITE_REG(pbpctl_dev, MDIC, mdic); + + for (i = 0; i < (BPCTLI_GEN_POLL_TIMEOUT * 3); i++) { + usec_delay(50); + mdic = BPCTL_READ_REG(pbpctl_dev, MDIC); + if (mdic & BPCTLI_MDIC_READY) + break; + } + if (!(mdic & BPCTLI_MDIC_READY)) { + printk("bpctl_mod: MDI Write did not complete\n"); + ret_val = -1; + goto out; + } + if (mdic & BPCTLI_MDIC_ERROR) { + printk("bpctl_mod: MDI Error\n"); + ret_val = -1; + goto out; + } + + out: + return ret_val; +} + +static s32 bp75_read_phy_reg(bpctl_dev_t * pbpctl_dev, u32 offset, u16 * data) +{ + s32 ret_val = 0; + + ret_val = bp75_acquire_phy(pbpctl_dev); + if (ret_val) + goto out; + + if (offset > BPCTLI_MAX_PHY_MULTI_PAGE_REG) { + ret_val = bp75_write_phy_reg_mdic(pbpctl_dev, + BPCTLI_IGP01E1000_PHY_PAGE_SELECT, + (u16) offset); + if (ret_val) + goto release; + } + + ret_val = + bp75_read_phy_reg_mdic(pbpctl_dev, + BPCTLI_MAX_PHY_REG_ADDRESS & offset, data); + + release: + bp75_release_phy(pbpctl_dev); + out: + return ret_val; +} + +static s32 bp75_write_phy_reg(bpctl_dev_t * pbpctl_dev, u32 offset, u16 data) +{ + s32 ret_val = 0; + + ret_val = bp75_acquire_phy(pbpctl_dev); + if (ret_val) + goto out; + + if (offset > BPCTLI_MAX_PHY_MULTI_PAGE_REG) { + ret_val = bp75_write_phy_reg_mdic(pbpctl_dev, + BPCTLI_IGP01E1000_PHY_PAGE_SELECT, + (u16) offset); + if (ret_val) + goto release; + } + + ret_val = + bp75_write_phy_reg_mdic(pbpctl_dev, + BPCTLI_MAX_PHY_REG_ADDRESS & offset, data); + + release: + bp75_release_phy(pbpctl_dev); + + out: + return ret_val; +} + +/* SET_TX (non-Bypass command :)) */ +static int set_tx(bpctl_dev_t * pbpctl_dev, int tx_state) +{ + int ret = 0, ctrl = 0; + bpctl_dev_t *pbpctl_dev_m; + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m == NULL) + return BP_NOT_CAP; + if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL); + if (!tx_state) { + if (pbpctl_dev->bp_540) { + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + BP10G_WRITE_REG(pbpctl_dev, ESDP, + (ctrl | BP10G_SDP1_DIR | + BP10G_SDP1_DATA)); + + } else { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + (ctrl | BPCTLI_CTRL_SDP1_DIR + | BPCTLI_CTRL_SWDPIN1)); + } + } else { + if (pbpctl_dev->bp_540) { + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP10G_SDP1_DIR) & + ~BP10G_SDP1_DATA)); + } else { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + ((ctrl | + BPCTLI_CTRL_SDP1_DIR) & + ~BPCTLI_CTRL_SWDPIN1)); + } + return ret; + + } + } else if (pbpctl_dev->bp_caps & TX_CTL_CAP) { + if (PEG5_IF_SERIES(pbpctl_dev->subdevice)) { + if (tx_state) { + uint16_t mii_reg; + if (! + (ret = + bp75_read_phy_reg(pbpctl_dev, + BPCTLI_PHY_CONTROL, + &mii_reg))) { + if (mii_reg & BPCTLI_MII_CR_POWER_DOWN) { + ret = + bp75_write_phy_reg + (pbpctl_dev, + BPCTLI_PHY_CONTROL, + mii_reg & + ~BPCTLI_MII_CR_POWER_DOWN); + } + } + } else { + uint16_t mii_reg; + if (! + (ret = + bp75_read_phy_reg(pbpctl_dev, + BPCTLI_PHY_CONTROL, + &mii_reg))) { + + mii_reg |= BPCTLI_MII_CR_POWER_DOWN; + ret = + bp75_write_phy_reg(pbpctl_dev, + BPCTLI_PHY_CONTROL, + mii_reg); + } + } + + } + if (pbpctl_dev->bp_fiber5) { + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + + } else if (pbpctl_dev->bp_10gb) + ctrl = BP10GB_READ_REG(pbpctl_dev, MISC_REG_GPIO); + + else if (!pbpctl_dev->bp_10g) + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL); + else + //ctrl =readl((void *)((pbpctl_dev)->mem_map) + 0x20); + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + + if (!tx_state) + if (pbpctl_dev->bp_10g9) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, + (ctrl | BP10G_SDP3_DATA | + BP10G_SDP3_DIR)); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + (ctrl | + BPCTLI_CTRL_EXT_SDP6_DIR | + BPCTLI_CTRL_EXT_SDP6_DATA)); + + } else if (pbpctl_dev->bp_10gb) { + if ((pbpctl_dev->func == 1) + || (pbpctl_dev->func == 3)) + BP10GB_WRITE_REG(pbpctl_dev, + MISC_REG_GPIO, + (ctrl | + BP10GB_GPIO0_SET_P1) & + ~(BP10GB_GPIO0_CLR_P1 | + BP10GB_GPIO0_OE_P1)); + else + BP10GB_WRITE_REG(pbpctl_dev, + MISC_REG_GPIO, + (ctrl | + BP10GB_GPIO0_OE_P0 | + BP10GB_GPIO0_SET_P0)); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + (ctrl | BPCTLI_CTRL_SDP1_DIR + | BPCTLI_CTRL_SWDPIN1)); + + } else if (pbpctl_dev->bp_540) { + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + BP10G_WRITE_REG(pbpctl_dev, ESDP, + (ctrl | BP10G_SDP1_DIR | + BP10G_SDP1_DATA)); + + } + + else if (!pbpctl_dev->bp_10g) + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + (ctrl | BPCTLI_CTRL_SWDPIO0 | + BPCTLI_CTRL_SWDPIN0)); + + else + //writel((ctrl|(0x1|0x100)), (void *)(((pbpctl_dev)->mem_map) + 0x20)) ; + BP10G_WRITE_REG(pbpctl_dev, ESDP, + (ctrl | BP10G_SDP0_DATA | + BP10G_SDP0_DIR)); + + else { + if (pbpctl_dev->bp_10g9) { + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP10G_SDP3_DIR) & + ~BP10G_SDP3_DATA)); + + } else if (pbpctl_dev->bp_fiber5) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, + ((ctrl | + BPCTLI_CTRL_EXT_SDP6_DIR) & + ~BPCTLI_CTRL_EXT_SDP6_DATA)); + + } else if (pbpctl_dev->bp_10gb) { + if ((bpctl_dev_arr->func == 1) + || (bpctl_dev_arr->func == 3)) + BP10GB_WRITE_REG(pbpctl_dev, + MISC_REG_GPIO, + (ctrl | + BP10GB_GPIO0_CLR_P1) & + ~(BP10GB_GPIO0_SET_P1 | + BP10GB_GPIO0_OE_P1)); + else + BP10GB_WRITE_REG(pbpctl_dev, + MISC_REG_GPIO, + (ctrl | + BP10GB_GPIO0_OE_P0 | + BP10GB_GPIO0_CLR_P0)); + + } else if (pbpctl_dev->bp_i80) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + ((ctrl | + BPCTLI_CTRL_SDP1_DIR) & + ~BPCTLI_CTRL_SWDPIN1)); + } else if (pbpctl_dev->bp_540) { + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP10G_SDP1_DIR) & + ~BP10G_SDP1_DATA)); + } + + else if (!pbpctl_dev->bp_10g) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + ((ctrl | BPCTLI_CTRL_SWDPIO0) + & ~BPCTLI_CTRL_SWDPIN0)); + if (!PEGF_IF_SERIES(pbpctl_dev->subdevice)) { + BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL, + (ctrl & + ~ + (BPCTLI_CTRL_SDP0_DATA + | + BPCTLI_CTRL_SDP0_DIR))); + } + } else + //writel(((ctrl|0x100)&~0x1), (void *)(((pbpctl_dev)->mem_map) + 0x20)) ; + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP10G_SDP0_DIR) & + ~BP10G_SDP0_DATA)); + + } + + } else + ret = BP_NOT_CAP; + return ret; + +} + +/* SET_FORCE_LINK (non-Bypass command :)) */ +static int set_bp_force_link(bpctl_dev_t * pbpctl_dev, int tx_state) +{ + int ret = 0, ctrl = 0; + + if (DBI_IF_SERIES(pbpctl_dev->subdevice)) { + + if ((pbpctl_dev->bp_10g) || (pbpctl_dev->bp_10g9)) { + + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL); + if (!tx_state) + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ctrl & ~BP10G_SDP1_DIR); + else + BP10G_WRITE_REG(pbpctl_dev, ESDP, + ((ctrl | BP10G_SDP1_DIR) & + ~BP10G_SDP1_DATA)); + return ret; + } + + } + return BP_NOT_CAP; +} + +/*RESET_CONT 0x20 */ +int reset_cont(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) + return BP_NOT_CAP; + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) + write_data(pbpctl_dev, RESET_CONT); + else + data_pulse(pbpctl_dev, RESET_CONT); + ret = 0; + }; + return ret; +} + +/*DIS_BYPASS_CAP 0x22 */ +int dis_bypass_cap(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & BP_DIS_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + write_data_int(pbpctl_dev, DIS_BYPASS_CAP_INT); + msec_delay_bp(BYPASS_DELAY_INT); + } else { + write_data(pbpctl_dev, BYPASS_OFF); + msec_delay_bp(LATCH_DELAY); + write_data(pbpctl_dev, DIS_BYPASS_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + } + return 0; + } + return BP_NOT_CAP; +} + +/*EN_BYPASS_CAP 0x24 */ +int en_bypass_cap(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & BP_DIS_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + write_data_int(pbpctl_dev, PWROFF_BYPASS_ON_INT); + msec_delay_bp(BYPASS_DELAY_INT); + } else { + write_data(pbpctl_dev, EN_BYPASS_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + } + return 0; + } + return BP_NOT_CAP; +} + +/* BYPASS_STATE_PWRON 0x26*/ +int bypass_state_pwron(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & BP_PWUP_CTL_CAP) { + write_data(pbpctl_dev, BYPASS_STATE_PWRON); + if (pbpctl_dev->bp_ext_ver == PXG2BPI_VER) + msec_delay_bp(DFLT_PWRON_DELAY); + else + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + return 0; + } + return BP_NOT_CAP; +} + +/* NORMAL_STATE_PWRON 0x28*/ +int normal_state_pwron(bpctl_dev_t * pbpctl_dev) +{ + if ((pbpctl_dev->bp_caps & BP_PWUP_CTL_CAP) + || (pbpctl_dev->bp_caps & TAP_PWUP_CTL_CAP)) { + write_data(pbpctl_dev, NORMAL_STATE_PWRON); + if (pbpctl_dev->bp_ext_ver == PXG2BPI_VER) + msec_delay_bp(DFLT_PWRON_DELAY); + else + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + return 0; + } + return BP_NOT_CAP; +} + +/* BYPASS_STATE_PWROFF 0x27*/ +int bypass_state_pwroff(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & BP_PWOFF_CTL_CAP) { + write_data(pbpctl_dev, BYPASS_STATE_PWROFF); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + return 0; + } + return BP_NOT_CAP; +} + +/* NORMAL_STATE_PWROFF 0x29*/ +int normal_state_pwroff(bpctl_dev_t * pbpctl_dev) +{ + if ((pbpctl_dev->bp_caps & BP_PWOFF_CTL_CAP)) { + write_data(pbpctl_dev, NORMAL_STATE_PWROFF); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + return 0; + } + return BP_NOT_CAP; +} + +/*TAP_STATE_PWRON 0x2a*/ +int tap_state_pwron(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & TAP_PWUP_CTL_CAP) { + write_data(pbpctl_dev, TAP_STATE_PWRON); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + return 0; + } + return BP_NOT_CAP; +} + +/*DIS_TAP_CAP 0x2c*/ +int dis_tap_cap(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & TAP_DIS_CAP) { + write_data(pbpctl_dev, DIS_TAP_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + return 0; + } + return BP_NOT_CAP; +} + +/*EN_TAP_CAP 0x2e*/ +int en_tap_cap(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & TAP_DIS_CAP) { + write_data(pbpctl_dev, EN_TAP_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + return 0; + } + return BP_NOT_CAP; +} + +/*DISC_STATE_PWRON 0x2a*/ +int disc_state_pwron(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & DISC_PWUP_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) { + write_data(pbpctl_dev, DISC_STATE_PWRON); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + return BP_OK; + } + } + return BP_NOT_CAP; +} + +/*DIS_DISC_CAP 0x2c*/ +int dis_disc_cap(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & DISC_DIS_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) { + write_data(pbpctl_dev, DIS_DISC_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + return BP_OK; + } + } + return BP_NOT_CAP; +} + +/*DISC_STATE_PWRON 0x2a*/ +int disc_port_state_pwron(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + bpctl_dev_t *pbpctl_dev_m; + + return BP_NOT_CAP; + + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m == NULL) + return BP_NOT_CAP; + + if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { + if (is_bypass_fn(pbpctl_dev) == 1) + write_data(pbpctl_dev_m, TX_DISA_PWRUP); + else + write_data(pbpctl_dev_m, TX_DISB_PWRUP); + + msec_delay_bp(LATCH_DELAY); + + } + return ret; +} + +int normal_port_state_pwron(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + bpctl_dev_t *pbpctl_dev_m; + return BP_NOT_CAP; + + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m == NULL) + return BP_NOT_CAP; + + if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { + if (is_bypass_fn(pbpctl_dev) == 1) + write_data(pbpctl_dev_m, TX_ENA_PWRUP); + else + write_data(pbpctl_dev_m, TX_ENB_PWRUP); + + msec_delay_bp(LATCH_DELAY); + + } + return ret; +} + +/*EN_TAP_CAP 0x2e*/ +int en_disc_cap(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & DISC_DIS_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) { + write_data(pbpctl_dev, EN_DISC_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + return BP_OK; + } + } + return BP_NOT_CAP; +} + +int std_nic_on(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & STD_NIC_CAP) { + + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + write_data_int(pbpctl_dev, DIS_BYPASS_CAP_INT); + msec_delay_bp(BYPASS_DELAY_INT); + pbpctl_dev->bp_status_un = 0; + return BP_OK; + } + + if (pbpctl_dev->bp_ext_ver >= 0x8) { + write_data(pbpctl_dev, STD_NIC_ON); + msec_delay_bp(BYPASS_CAP_DELAY); + return BP_OK; + + } + + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + wdt_off(pbpctl_dev); + + if (pbpctl_dev->bp_caps & BP_CAP) { + write_data(pbpctl_dev, BYPASS_OFF); + msec_delay_bp(LATCH_DELAY); + } + + if (pbpctl_dev->bp_caps & TAP_CAP) { + write_data(pbpctl_dev, TAP_OFF); + msec_delay_bp(LATCH_DELAY); + } + + write_data(pbpctl_dev, NORMAL_STATE_PWRON); + if (pbpctl_dev->bp_ext_ver == PXG2BPI_VER) + msec_delay_bp(DFLT_PWRON_DELAY); + else + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + + if (pbpctl_dev->bp_caps & BP_DIS_CAP) { + write_data(pbpctl_dev, DIS_BYPASS_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + } + + if (pbpctl_dev->bp_caps & TAP_DIS_CAP) { + write_data(pbpctl_dev, DIS_TAP_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + + } + return 0; + } + } + return BP_NOT_CAP; +} + +int std_nic_off(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & STD_NIC_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + write_data_int(pbpctl_dev, PWROFF_BYPASS_ON_INT); + msec_delay_bp(BYPASS_DELAY_INT); + return BP_OK; + } + if (pbpctl_dev->bp_ext_ver >= 0x8) { + write_data(pbpctl_dev, STD_NIC_OFF); + msec_delay_bp(BYPASS_CAP_DELAY); + return BP_OK; + + } + + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + + if (pbpctl_dev->bp_caps & TAP_PWUP_CTL_CAP) { + write_data(pbpctl_dev, TAP_STATE_PWRON); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + } + + if (pbpctl_dev->bp_caps & BP_PWUP_CTL_CAP) { + write_data(pbpctl_dev, BYPASS_STATE_PWRON); + if (pbpctl_dev->bp_ext_ver > PXG2BPI_VER) + msec_delay_bp(LATCH_DELAY + + EEPROM_WR_DELAY); + else + msec_delay_bp(DFLT_PWRON_DELAY); + } + + if (pbpctl_dev->bp_caps & TAP_DIS_CAP) { + write_data(pbpctl_dev, EN_TAP_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + } + if (pbpctl_dev->bp_caps & DISC_DIS_CAP) { + write_data(pbpctl_dev, EN_DISC_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + } + + if (pbpctl_dev->bp_caps & BP_DIS_CAP) { + write_data(pbpctl_dev, EN_BYPASS_CAP); + msec_delay_bp(BYPASS_CAP_DELAY); + } + + return 0; + } + } + return BP_NOT_CAP; +} + +int wdt_time_left(bpctl_dev_t * pbpctl_dev) +{ + + //unsigned long curr_time=((long long)(jiffies*1000))/HZ, delta_time=0,wdt_on_time=((long long)(pbpctl_dev->bypass_wdt_on_time*1000))/HZ; + unsigned long curr_time = jiffies, delta_time = 0, wdt_on_time = + pbpctl_dev->bypass_wdt_on_time, delta_time_msec = 0; + int time_left = 0; + + switch (pbpctl_dev->wdt_status) { + case WDT_STATUS_DIS: + time_left = 0; + break; + case WDT_STATUS_EN: + delta_time = + (curr_time >= + wdt_on_time) ? (curr_time - wdt_on_time) : (~wdt_on_time + + curr_time); + delta_time_msec = jiffies_to_msecs(delta_time); + time_left = pbpctl_dev->bypass_timer_interval - delta_time_msec; + if (time_left < 0) { + time_left = -1; + pbpctl_dev->wdt_status = WDT_STATUS_EXP; + } + break; + case WDT_STATUS_EXP: + time_left = -1; + break; + } + + return time_left; +} + +static int wdt_timer(bpctl_dev_t * pbpctl_dev, int *time_left) +{ + int ret = 0; + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + { + if (pbpctl_dev->wdt_status == WDT_STATUS_UNKNOWN) + ret = BP_NOT_CAP; + else + *time_left = wdt_time_left(pbpctl_dev); + } + + } else + ret = BP_NOT_CAP; + return ret; +} + +static int wdt_timer_reload(bpctl_dev_t * pbpctl_dev) +{ + + int ret = 0; + + if ((pbpctl_dev->bp_caps & WD_CTL_CAP) && + (pbpctl_dev->wdt_status != WDT_STATUS_UNKNOWN)) { + if (pbpctl_dev->wdt_status == WDT_STATUS_DIS) + return 0; + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) + ret = wdt_pulse(pbpctl_dev); + else if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) + ret = wdt_pulse_int(pbpctl_dev); + else + ret = send_wdt_pulse(pbpctl_dev); + //if (ret==-1) + // mod_timer(&pbpctl_dev->bp_timer, jiffies+1); + return 1; + } + return BP_NOT_CAP; +} + +static void wd_reset_timer(unsigned long param) +{ + bpctl_dev_t *pbpctl_dev = (bpctl_dev_t *) param; +#ifdef BP_SELF_TEST + struct sk_buff *skb_tmp; +#endif + + if ((pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) && + ((atomic_read(&pbpctl_dev->wdt_busy)) == 1)) { + mod_timer(&pbpctl_dev->bp_timer, jiffies + 1); + return; + } +#ifdef BP_SELF_TEST + + if (pbpctl_dev->bp_self_test_flag == 1) { + skb_tmp = dev_alloc_skb(BPTEST_DATA_LEN + 2); + if ((skb_tmp) && (pbpctl_dev->ndev) && (pbpctl_dev->bp_tx_data)) { + memcpy(skb_put(skb_tmp, BPTEST_DATA_LEN), + pbpctl_dev->bp_tx_data, BPTEST_DATA_LEN); + skb_tmp->dev = pbpctl_dev->ndev; + skb_tmp->protocol = + eth_type_trans(skb_tmp, pbpctl_dev->ndev); + skb_tmp->ip_summed = CHECKSUM_UNNECESSARY; + netif_receive_skb(skb_tmp); + goto bp_timer_reload; + return; + } + } +#endif + + wdt_timer_reload(pbpctl_dev); +#ifdef BP_SELF_TEST + bp_timer_reload: +#endif + if (pbpctl_dev->reset_time) { + mod_timer(&pbpctl_dev->bp_timer, + jiffies + (HZ * pbpctl_dev->reset_time) / 1000); + } +} + +//#ifdef PMC_FIX_FLAG +/*WAIT_AT_PWRUP 0x80 */ +int bp_wait_at_pwup_en(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= BP_FW_EXT_VER8) { + write_data(pbpctl_dev, BP_WAIT_AT_PWUP_EN); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + + return BP_OK; + } + } + return BP_NOT_CAP; +} + +/*DIS_WAIT_AT_PWRUP 0x81 */ +int bp_wait_at_pwup_dis(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + + if (pbpctl_dev->bp_ext_ver >= BP_FW_EXT_VER8) { + write_data(pbpctl_dev, BP_WAIT_AT_PWUP_DIS); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + + return BP_OK; + } + } + return BP_NOT_CAP; +} + +/*EN_HW_RESET 0x82 */ + +int bp_hw_reset_en(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= BP_FW_EXT_VER8) { + write_data(pbpctl_dev, BP_HW_RESET_EN); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + + return BP_OK; + } + } + return BP_NOT_CAP; +} + +/*DIS_HW_RESET 0x83 */ + +int bp_hw_reset_dis(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= BP_FW_EXT_VER8) { + write_data(pbpctl_dev, BP_HW_RESET_DIS); + msec_delay_bp(LATCH_DELAY + EEPROM_WR_DELAY); + + return BP_OK; + } + } + return BP_NOT_CAP; +} + +//#endif /*PMC_FIX_FLAG*/ + +int wdt_exp_mode(bpctl_dev_t * pbpctl_dev, int mode) +{ + uint32_t status_reg = 0, status_reg1 = 0; + + if ((pbpctl_dev->bp_caps & (TAP_STATUS_CAP | DISC_CAP)) && + (pbpctl_dev->bp_caps & BP_CAP)) { + if (pbpctl_dev->bp_ext_ver >= PXE2TBPI_VER) { + + if ((pbpctl_dev->bp_ext_ver >= 0x8) && + (mode == 2) && (pbpctl_dev->bp_caps & DISC_CAP)) { + status_reg1 = + read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR); + if (!(status_reg1 & WDTE_DISC_BPN_MASK)) + write_reg(pbpctl_dev, + status_reg1 | + WDTE_DISC_BPN_MASK, + STATUS_DISC_REG_ADDR); + return BP_OK; + } + } + status_reg = read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR); + + if ((mode == 0) && (pbpctl_dev->bp_caps & BP_CAP)) { + if (pbpctl_dev->bp_ext_ver >= 0x8) { + status_reg1 = + read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR); + if (status_reg1 & WDTE_DISC_BPN_MASK) + write_reg(pbpctl_dev, + status_reg1 & + ~WDTE_DISC_BPN_MASK, + STATUS_DISC_REG_ADDR); + } + if (status_reg & WDTE_TAP_BPN_MASK) + write_reg(pbpctl_dev, + status_reg & ~WDTE_TAP_BPN_MASK, + STATUS_TAP_REG_ADDR); + return BP_OK; + + } else if ((mode == 1) && (pbpctl_dev->bp_caps & TAP_CAP)) { + if (!(status_reg & WDTE_TAP_BPN_MASK)) + write_reg(pbpctl_dev, + status_reg | WDTE_TAP_BPN_MASK, + STATUS_TAP_REG_ADDR); + /*else return BP_NOT_CAP; */ + return BP_OK; + } + + } + return BP_NOT_CAP; +} + +int bypass_fw_ver(bpctl_dev_t * pbpctl_dev) +{ + if (is_bypass_fn(pbpctl_dev)) + return ((read_reg(pbpctl_dev, VER_REG_ADDR))); + else + return BP_NOT_CAP; +} + +int bypass_sign_check(bpctl_dev_t * pbpctl_dev) +{ + + if (is_bypass_fn(pbpctl_dev)) + return (((read_reg(pbpctl_dev, PIC_SIGN_REG_ADDR)) == + PIC_SIGN_VALUE) ? 1 : 0); + else + return BP_NOT_CAP; +} + +static int tx_status(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl = 0; + bpctl_dev_t *pbpctl_dev_m; + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m == NULL) + return BP_NOT_CAP; + if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { + + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL); + if (pbpctl_dev->bp_i80) + return ((ctrl & BPCTLI_CTRL_SWDPIN1) != 0 ? 0 : 1); + if (pbpctl_dev->bp_540) { + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + + return ((ctrl & BP10G_SDP1_DATA) != 0 ? 0 : 1); + } + + } + + if (pbpctl_dev->bp_caps & TX_CTL_CAP) { + if (PEG5_IF_SERIES(pbpctl_dev->subdevice)) { + uint16_t mii_reg; + if (! + (bp75_read_phy_reg + (pbpctl_dev, BPCTLI_PHY_CONTROL, &mii_reg))) { + if (mii_reg & BPCTLI_MII_CR_POWER_DOWN) + return 0; + + else + return 1; + } + return -1; + } + + if (pbpctl_dev->bp_10g9) { + return ((BP10G_READ_REG(pbpctl_dev, ESDP) & + BP10G_SDP3_DATA) != 0 ? 0 : 1); + + } else if (pbpctl_dev->bp_fiber5) { + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + if (ctrl & BPCTLI_CTRL_EXT_SDP6_DATA) + return 0; + return 1; + } else if (pbpctl_dev->bp_10gb) { + ctrl = BP10GB_READ_REG(pbpctl_dev, MISC_REG_GPIO); + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_GPIO, + (ctrl | BP10GB_GPIO0_OE_P1) & + ~(BP10GB_GPIO0_SET_P1 | + BP10GB_GPIO0_CLR_P1)); + + if ((pbpctl_dev->func == 1) || (pbpctl_dev->func == 3)) + return (((BP10GB_READ_REG + (pbpctl_dev, + MISC_REG_GPIO)) & BP10GB_GPIO0_P1) != + 0 ? 0 : 1); + else + return (((BP10GB_READ_REG + (pbpctl_dev, + MISC_REG_GPIO)) & BP10GB_GPIO0_P0) != + 0 ? 0 : 1); + } + + if (!pbpctl_dev->bp_10g) { + + ctrl = BPCTL_READ_REG(pbpctl_dev, CTRL); + if (pbpctl_dev->bp_i80) + return ((ctrl & BPCTLI_CTRL_SWDPIN1) != + 0 ? 0 : 1); + if (pbpctl_dev->bp_540) { + ctrl = BP10G_READ_REG(pbpctl_dev, ESDP); + + return ((ctrl & BP10G_SDP1_DATA) != 0 ? 0 : 1); + } + + return ((ctrl & BPCTLI_CTRL_SWDPIN0) != 0 ? 0 : 1); + } else + return ((BP10G_READ_REG(pbpctl_dev, ESDP) & + BP10G_SDP0_DATA) != 0 ? 0 : 1); + + } + return BP_NOT_CAP; +} + +static int bp_force_link_status(bpctl_dev_t * pbpctl_dev) +{ + + if (DBI_IF_SERIES(pbpctl_dev->subdevice)) { + + if ((pbpctl_dev->bp_10g) || (pbpctl_dev->bp_10g9)) { + return ((BP10G_READ_REG(pbpctl_dev, ESDP) & + BP10G_SDP1_DIR) != 0 ? 1 : 0); + + } + } + return BP_NOT_CAP; +} + +int bypass_from_last_read(bpctl_dev_t * pbpctl_dev) +{ + uint32_t ctrl_ext = 0; + bpctl_dev_t *pbpctl_dev_b = NULL; + + if ((pbpctl_dev->bp_caps & SW_CTL_CAP) + && (pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) { + ctrl_ext = BPCTL_READ_REG(pbpctl_dev_b, CTRL_EXT); + BPCTL_BP_WRITE_REG(pbpctl_dev_b, CTRL_EXT, + (ctrl_ext & ~BPCTLI_CTRL_EXT_SDP7_DIR)); + ctrl_ext = BPCTL_READ_REG(pbpctl_dev_b, CTRL_EXT); + if (ctrl_ext & BPCTLI_CTRL_EXT_SDP7_DATA) + return 0; + return 1; + } else + return BP_NOT_CAP; +} + +int bypass_status_clear(bpctl_dev_t * pbpctl_dev) +{ + bpctl_dev_t *pbpctl_dev_b = NULL; + + if ((pbpctl_dev->bp_caps & SW_CTL_CAP) + && (pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) { + + send_bypass_clear_pulse(pbpctl_dev_b, 1); + return 0; + } else + return BP_NOT_CAP; +} + +int bypass_flag_status(bpctl_dev_t * pbpctl_dev) +{ + + if ((pbpctl_dev->bp_caps & BP_CAP)) { + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + return ((((read_reg(pbpctl_dev, STATUS_REG_ADDR)) & + BYPASS_FLAG_MASK) == + BYPASS_FLAG_MASK) ? 1 : 0); + } + } + return BP_NOT_CAP; +} + +int bypass_flag_status_clear(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & BP_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + uint32_t status_reg = 0; + status_reg = read_reg(pbpctl_dev, STATUS_REG_ADDR); + write_reg(pbpctl_dev, status_reg & ~BYPASS_FLAG_MASK, + STATUS_REG_ADDR); + return 0; + } + } + return BP_NOT_CAP; +} + +int bypass_change_status(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + + if (pbpctl_dev->bp_caps & BP_STATUS_CHANGE_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) { + ret = bypass_flag_status(pbpctl_dev); + bypass_flag_status_clear(pbpctl_dev); + } else if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + ret = bypass_flag_status(pbpctl_dev); + bypass_flag_status_clear(pbpctl_dev); + } else { + ret = bypass_from_last_read(pbpctl_dev); + bypass_status_clear(pbpctl_dev); + } + } + return ret; +} + +int bypass_off_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & BP_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + return ((((read_reg(pbpctl_dev, STATUS_REG_ADDR)) & + BYPASS_OFF_MASK) == BYPASS_OFF_MASK) ? 1 : 0); + } + } + return BP_NOT_CAP; +} + +static int bypass_status(bpctl_dev_t * pbpctl_dev) +{ + u32 ctrl_ext = 0; + if (pbpctl_dev->bp_caps & BP_CAP) { + + bpctl_dev_t *pbpctl_dev_b = NULL; + + if (!(pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + return BP_NOT_CAP; + + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + + if (!pbpctl_dev->bp_status_un) + return (((BPCTL_READ_REG + (pbpctl_dev_b, + CTRL_EXT)) & + BPCTLI_CTRL_EXT_SDP7_DATA) != + 0 ? 1 : 0); + else + return BP_NOT_CAP; + } + if (pbpctl_dev->bp_ext_ver >= 0x8) { + + //BPCTL_BP_WRITE_REG(pbpctl_dev, CTRL_EXT, (BPCTL_READ_REG(pbpctl_dev_b, CTRL_EXT))&~BPCTLI_CTRL_EXT_SDP7_DIR); + if (pbpctl_dev->bp_10g9) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev_b, I2CCTL); + BP10G_WRITE_REG(pbpctl_dev_b, I2CCTL, + (ctrl_ext | BP10G_I2C_CLK_OUT)); + //return(((readl((void *)((pbpctl_dev)->mem_map) + 0x28))&0x4)!=0?0:1); + return ((BP10G_READ_REG(pbpctl_dev_b, I2CCTL) & + BP10G_I2C_CLK_IN) != 0 ? 0 : 1); + + } else if (pbpctl_dev->bp_540) { + return (((BP10G_READ_REG(pbpctl_dev_b, ESDP)) & + BP10G_SDP0_DATA) != 0 ? 0 : 1); + } + + else if ((pbpctl_dev->bp_fiber5) + || (pbpctl_dev->bp_i80)) { + return (((BPCTL_READ_REG(pbpctl_dev_b, CTRL)) & + BPCTLI_CTRL_SWDPIN0) != 0 ? 0 : 1); + } else if (pbpctl_dev->bp_10gb) { + ctrl_ext = + BP10GB_READ_REG(pbpctl_dev, MISC_REG_GPIO); + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_GPIO, + (ctrl_ext | BP10GB_GPIO3_OE_P0) + & ~(BP10GB_GPIO3_SET_P0 | + BP10GB_GPIO3_CLR_P0)); + + return (((BP10GB_READ_REG + (pbpctl_dev, + MISC_REG_GPIO)) & BP10GB_GPIO3_P0) != + 0 ? 0 : 1); + } + + else if (!pbpctl_dev->bp_10g) + return (((BPCTL_READ_REG + (pbpctl_dev_b, + CTRL_EXT)) & + BPCTLI_CTRL_EXT_SDP7_DATA) != + 0 ? 0 : 1); + + else { + ctrl_ext = BP10G_READ_REG(pbpctl_dev_b, EODSDP); + BP10G_WRITE_REG(pbpctl_dev_b, EODSDP, + (ctrl_ext | + BP10G_SDP7_DATA_OUT)); + //return(((readl((void *)((pbpctl_dev)->mem_map) + 0x28))&0x4)!=0?0:1); + return ((BP10G_READ_REG(pbpctl_dev_b, EODSDP) & + BP10G_SDP7_DATA_IN) != 0 ? 0 : 1); + } + + } else if (pbpctl_dev->media_type == bp_copper) { + + return (((BPCTL_READ_REG(pbpctl_dev_b, CTRL)) & + BPCTLI_CTRL_SWDPIN1) != 0 ? 1 : 0); + } else { + if ((bypass_status_clear(pbpctl_dev)) >= 0) + return (bypass_from_last_read(pbpctl_dev)); + } + + } + return BP_NOT_CAP; +} + +int default_pwron_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_caps & BP_PWUP_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + return ((((read_reg + (pbpctl_dev, + STATUS_REG_ADDR)) & DFLT_PWRON_MASK) + == DFLT_PWRON_MASK) ? 0 : 1); + } + } /*else if ((!pbpctl_dev->bp_caps&BP_DIS_CAP)&& + (pbpctl_dev->bp_caps&BP_PWUP_ON_CAP)) + return 1; */ + } + return BP_NOT_CAP; +} + +static int default_pwroff_status(bpctl_dev_t * pbpctl_dev) +{ + + /*if ((!pbpctl_dev->bp_caps&BP_DIS_CAP)&& + (pbpctl_dev->bp_caps&BP_PWOFF_ON_CAP)) + return 1; */ + if ((pbpctl_dev->bp_caps & SW_CTL_CAP) + && (pbpctl_dev->bp_caps & BP_PWOFF_CTL_CAP)) { + return ((((read_reg(pbpctl_dev, STATUS_REG_ADDR)) & + DFLT_PWROFF_MASK) == DFLT_PWROFF_MASK) ? 0 : 1); + } + return BP_NOT_CAP; +} + +int dis_bypass_cap_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & BP_DIS_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + return ((((read_reg(pbpctl_dev, STATUS_REG_ADDR)) & + DIS_BYPASS_CAP_MASK) == + DIS_BYPASS_CAP_MASK) ? 1 : 0); + } + } + return BP_NOT_CAP; +} + +int cmd_en_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + return ((((read_reg(pbpctl_dev, STATUS_REG_ADDR)) & + CMND_EN_MASK) == CMND_EN_MASK) ? 1 : 0); + } + } + return BP_NOT_CAP; +} + +int wdt_en_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + return ((((read_reg(pbpctl_dev, STATUS_REG_ADDR)) & + WDT_EN_MASK) == WDT_EN_MASK) ? 1 : 0); + } + } + return BP_NOT_CAP; +} + +int wdt_programmed(bpctl_dev_t * pbpctl_dev, int *timeout) +{ + int ret = 0; + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + if ((read_reg(pbpctl_dev, STATUS_REG_ADDR)) & + WDT_EN_MASK) { + u8 wdt_val; + wdt_val = read_reg(pbpctl_dev, WDT_REG_ADDR); + *timeout = (1 << wdt_val) * 100; + } else + *timeout = 0; + } else { + int curr_wdt_status = pbpctl_dev->wdt_status; + if (curr_wdt_status == WDT_STATUS_UNKNOWN) + *timeout = -1; + else + *timeout = + curr_wdt_status == + 0 ? 0 : pbpctl_dev->bypass_timer_interval; + }; + } else + ret = BP_NOT_CAP; + return ret; +} + +int bypass_support(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) { + ret = + ((((read_reg(pbpctl_dev, PRODUCT_CAP_REG_ADDR)) & + BYPASS_SUPPORT_MASK) == + BYPASS_SUPPORT_MASK) ? 1 : 0); + } else if (pbpctl_dev->bp_ext_ver == PXG2BPI_VER) + ret = 1; + } else + ret = BP_NOT_CAP; + return ret; +} + +int tap_support(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) { + ret = + ((((read_reg(pbpctl_dev, PRODUCT_CAP_REG_ADDR)) & + TAP_SUPPORT_MASK) == TAP_SUPPORT_MASK) ? 1 : 0); + } else if (pbpctl_dev->bp_ext_ver == PXG2BPI_VER) + ret = 0; + } else + ret = BP_NOT_CAP; + return ret; +} + +int normal_support(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) { + ret = + ((((read_reg(pbpctl_dev, PRODUCT_CAP_REG_ADDR)) & + NORMAL_UNSUPPORT_MASK) == + NORMAL_UNSUPPORT_MASK) ? 0 : 1); + } else + ret = 1; + }; + return ret; +} + +int get_bp_prod_caps(bpctl_dev_t * pbpctl_dev) +{ + if ((pbpctl_dev->bp_caps & SW_CTL_CAP) && + (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER)) + return (read_reg(pbpctl_dev, PRODUCT_CAP_REG_ADDR)); + return BP_NOT_CAP; + +} + +int tap_flag_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & TAP_STATUS_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) + return ((((read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR)) & + TAP_FLAG_MASK) == TAP_FLAG_MASK) ? 1 : 0); + + } + return BP_NOT_CAP; +} + +int tap_flag_status_clear(bpctl_dev_t * pbpctl_dev) +{ + uint32_t status_reg = 0; + if (pbpctl_dev->bp_caps & TAP_STATUS_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) { + status_reg = read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR); + write_reg(pbpctl_dev, status_reg & ~TAP_FLAG_MASK, + STATUS_TAP_REG_ADDR); + return 0; + } + } + return BP_NOT_CAP; +} + +int tap_change_status(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) { + if (pbpctl_dev->bp_caps & TAP_CAP) { + if (pbpctl_dev->bp_caps & BP_CAP) { + ret = tap_flag_status(pbpctl_dev); + tap_flag_status_clear(pbpctl_dev); + } else { + ret = bypass_from_last_read(pbpctl_dev); + bypass_status_clear(pbpctl_dev); + } + } + } + return ret; +} + +int tap_off_status(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & TAP_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) + return ((((read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR)) & + TAP_OFF_MASK) == TAP_OFF_MASK) ? 1 : 0); + } + return BP_NOT_CAP; +} + +int tap_status(bpctl_dev_t * pbpctl_dev) +{ + u32 ctrl_ext = 0; + + if (pbpctl_dev->bp_caps & TAP_CAP) { + bpctl_dev_t *pbpctl_dev_b = NULL; + + if (!(pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + return BP_NOT_CAP; + + if (pbpctl_dev->bp_ext_ver >= 0x8) { + if (!pbpctl_dev->bp_10g) + return (((BPCTL_READ_REG + (pbpctl_dev_b, + CTRL_EXT)) & + BPCTLI_CTRL_EXT_SDP6_DATA) != + 0 ? 0 : 1); + else { + ctrl_ext = BP10G_READ_REG(pbpctl_dev_b, EODSDP); + BP10G_WRITE_REG(pbpctl_dev_b, EODSDP, + (ctrl_ext | + BP10G_SDP6_DATA_OUT)); + // return(((readl((void *)((pbpctl_dev)->mem_map) + 0x28))&0x1)!=0?0:1); + return ((BP10G_READ_REG(pbpctl_dev_b, EODSDP) & + BP10G_SDP6_DATA_IN) != 0 ? 0 : 1); + } + + } else if (pbpctl_dev->media_type == bp_copper) + return (((BPCTL_READ_REG(pbpctl_dev, CTRL)) & + BPCTLI_CTRL_SWDPIN0) != 0 ? 1 : 0); + else { + if ((bypass_status_clear(pbpctl_dev)) >= 0) + return (bypass_from_last_read(pbpctl_dev)); + } + + } + return BP_NOT_CAP; +} + +int default_pwron_tap_status(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & TAP_PWUP_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) + return ((((read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR)) & + DFLT_PWRON_TAP_MASK) == + DFLT_PWRON_TAP_MASK) ? 1 : 0); + } + return BP_NOT_CAP; +} + +int dis_tap_cap_status(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & TAP_PWUP_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) + return ((((read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR)) & + DIS_TAP_CAP_MASK) == + DIS_TAP_CAP_MASK) ? 1 : 0); + } + return BP_NOT_CAP; +} + +int disc_flag_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & DISC_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) + return ((((read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR)) & + DISC_FLAG_MASK) == DISC_FLAG_MASK) ? 1 : 0); + + } + return BP_NOT_CAP; +} + +int disc_flag_status_clear(bpctl_dev_t * pbpctl_dev) +{ + uint32_t status_reg = 0; + if (pbpctl_dev->bp_caps & DISC_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) { + status_reg = read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR); + write_reg(pbpctl_dev, status_reg & ~DISC_FLAG_MASK, + STATUS_DISC_REG_ADDR); + return BP_OK; + } + } + return BP_NOT_CAP; +} + +int disc_change_status(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + if (pbpctl_dev->bp_caps & DISC_CAP) { + ret = disc_flag_status(pbpctl_dev); + disc_flag_status_clear(pbpctl_dev); + return ret; + } + return BP_NOT_CAP; +} + +int disc_off_status(bpctl_dev_t * pbpctl_dev) +{ + bpctl_dev_t *pbpctl_dev_b = NULL; + u32 ctrl_ext = 0; + + if (pbpctl_dev->bp_caps & DISC_CAP) { + if (!(pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + return BP_NOT_CAP; + if (DISCF_IF_SERIES(pbpctl_dev->subdevice)) + return ((((read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR)) & + DISC_OFF_MASK) == DISC_OFF_MASK) ? 1 : 0); + + if (pbpctl_dev->bp_i80) { + // return((((read_reg(pbpctl_dev,STATUS_DISC_REG_ADDR)) & DISC_OFF_MASK)==DISC_OFF_MASK)?1:0); + return (((BPCTL_READ_REG(pbpctl_dev_b, CTRL_EXT)) & + BPCTLI_CTRL_EXT_SDP6_DATA) != 0 ? 1 : 0); + + } + if (pbpctl_dev->bp_540) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev_b, ESDP); + //return(((readl((void *)((pbpctl_dev)->mem_map) + 0x28))&0x4)!=0?0:1); + return ((BP10G_READ_REG(pbpctl_dev_b, ESDP) & + BP10G_SDP2_DATA) != 0 ? 1 : 0); + + } + //if (pbpctl_dev->device==SILICOM_PXG2TBI_SSID) { + if (pbpctl_dev->media_type == bp_copper) { + +#if 0 + return ((((read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR)) & + DISC_OFF_MASK) == DISC_OFF_MASK) ? 1 : 0); +#endif + if (!pbpctl_dev->bp_10g) + return (((BPCTL_READ_REG(pbpctl_dev_b, CTRL)) & + BPCTLI_CTRL_SWDPIN1) != 0 ? 1 : 0); + else + // return(((readl((void *)((pbpctl_dev)->mem_map) + 0x20)) & 0x2)!=0?1:0); + return ((BP10G_READ_REG(pbpctl_dev_b, ESDP) & + BP10G_SDP1_DATA) != 0 ? 1 : 0); + + } else { + + if (pbpctl_dev->bp_10g9) { + ctrl_ext = BP10G_READ_REG(pbpctl_dev_b, I2CCTL); + BP10G_WRITE_REG(pbpctl_dev_b, I2CCTL, + (ctrl_ext | + BP10G_I2C_DATA_OUT)); + //return(((readl((void *)((pbpctl_dev)->mem_map) + 0x28))&0x4)!=0?0:1); + return ((BP10G_READ_REG(pbpctl_dev_b, I2CCTL) & + BP10G_I2C_DATA_IN) != 0 ? 1 : 0); + + } else if (pbpctl_dev->bp_fiber5) { + return (((BPCTL_READ_REG(pbpctl_dev_b, CTRL)) & + BPCTLI_CTRL_SWDPIN1) != 0 ? 1 : 0); + } else if (pbpctl_dev->bp_10gb) { + ctrl_ext = + BP10GB_READ_REG(pbpctl_dev, MISC_REG_GPIO); + BP10GB_WRITE_REG(pbpctl_dev, MISC_REG_GPIO, + (ctrl_ext | BP10GB_GPIO3_OE_P1) + & ~(BP10GB_GPIO3_SET_P1 | + BP10GB_GPIO3_CLR_P1)); + + return (((BP10GB_READ_REG + (pbpctl_dev, + MISC_REG_GPIO)) & BP10GB_GPIO3_P1) != + 0 ? 1 : 0); + } + if (!pbpctl_dev->bp_10g) { + + return (((BPCTL_READ_REG + (pbpctl_dev_b, + CTRL_EXT)) & + BPCTLI_CTRL_EXT_SDP6_DATA) != + 0 ? 1 : 0); + } else { + ctrl_ext = BP10G_READ_REG(pbpctl_dev_b, EODSDP); + BP10G_WRITE_REG(pbpctl_dev_b, EODSDP, + (ctrl_ext | + BP10G_SDP6_DATA_OUT)); + // temp= (((BP10G_READ_REG(pbpctl_dev_b,EODSDP))&BP10G_SDP6_DATA_IN)!=0?1:0); + //return(((readl((void *)((pbpctl_dev)->mem_map) + 0x28)) & 0x1)!=0?1:0); + return (((BP10G_READ_REG(pbpctl_dev_b, EODSDP)) + & BP10G_SDP6_DATA_IN) != 0 ? 1 : 0); + } + + } + } + return BP_NOT_CAP; +} + +static int disc_status(bpctl_dev_t * pbpctl_dev) +{ + int ctrl = 0; + if (pbpctl_dev->bp_caps & DISC_CAP) { + + if ((ctrl = disc_off_status(pbpctl_dev)) < 0) + return ctrl; + return ((ctrl == 0) ? 1 : 0); + + } + return BP_NOT_CAP; +} + +int default_pwron_disc_status(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & DISC_PWUP_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) + return ((((read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR)) & + DFLT_PWRON_DISC_MASK) == + DFLT_PWRON_DISC_MASK) ? 1 : 0); + } + return BP_NOT_CAP; +} + +int dis_disc_cap_status(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & DIS_DISC_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) + return ((((read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR)) & + DIS_DISC_CAP_MASK) == + DIS_DISC_CAP_MASK) ? 1 : 0); + } + return BP_NOT_CAP; +} + +int disc_port_status(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + bpctl_dev_t *pbpctl_dev_m; + + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m == NULL) + return BP_NOT_CAP; + + if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { + if (is_bypass_fn(pbpctl_dev) == 1) { + return ((((read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR)) & + TX_DISA_MASK) == TX_DISA_MASK) ? 1 : 0); + } else + return ((((read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR)) & + TX_DISB_MASK) == TX_DISB_MASK) ? 1 : 0); + + } + return ret; +} + +int default_pwron_disc_port_status(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + bpctl_dev_t *pbpctl_dev_m; + + if ((is_bypass_fn(pbpctl_dev)) == 1) + pbpctl_dev_m = pbpctl_dev; + else + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m == NULL) + return BP_NOT_CAP; + + if (pbpctl_dev_m->bp_caps_ex & DISC_PORT_CAP_EX) { + if (is_bypass_fn(pbpctl_dev) == 1) + return ret; + // return((((read_reg(pbpctl_dev,STATUS_TAP_REG_ADDR)) & TX_DISA_MASK)==TX_DISA_MASK)?1:0); + else + return ret; + // return((((read_reg(pbpctl_dev,STATUS_TAP_REG_ADDR)) & TX_DISA_MASK)==TX_DISA_MASK)?1:0); + + } + return ret; +} + +int wdt_exp_mode_status(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver <= PXG2BPI_VER) + return 0; /* bypass mode */ + else if (pbpctl_dev->bp_ext_ver == PXG2TBPI_VER) + return 1; /* tap mode */ + else if (pbpctl_dev->bp_ext_ver >= PXE2TBPI_VER) { + if (pbpctl_dev->bp_ext_ver >= 0x8) { + if (((read_reg + (pbpctl_dev, + STATUS_DISC_REG_ADDR)) & + WDTE_DISC_BPN_MASK) == WDTE_DISC_BPN_MASK) + return 2; + } + return ((((read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR)) & + WDTE_TAP_BPN_MASK) == + WDTE_TAP_BPN_MASK) ? 1 : 0); + } + } + return BP_NOT_CAP; +} + +int tpl2_flag_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps_ex & TPL2_CAP_EX) { + return ((((read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR)) & + TPL2_FLAG_MASK) == TPL2_FLAG_MASK) ? 1 : 0); + + } + return BP_NOT_CAP; +} + +int tpl_hw_status(bpctl_dev_t * pbpctl_dev) +{ + bpctl_dev_t *pbpctl_dev_b = NULL; + + if (!(pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + return BP_NOT_CAP; + + if (TPL_IF_SERIES(pbpctl_dev->subdevice)) + return (((BPCTL_READ_REG(pbpctl_dev, CTRL)) & + BPCTLI_CTRL_SWDPIN0) != 0 ? 1 : 0); + return BP_NOT_CAP; +} + +//#ifdef PMC_FIX_FLAG + +int bp_wait_at_pwup_status(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + if (pbpctl_dev->bp_ext_ver >= 0x8) + return ((((read_reg(pbpctl_dev, CONT_CONFIG_REG_ADDR)) & + WAIT_AT_PWUP_MASK) == + WAIT_AT_PWUP_MASK) ? 1 : 0); + } + return BP_NOT_CAP; +} + +int bp_hw_reset_status(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + + if (pbpctl_dev->bp_ext_ver >= 0x8) + return ((((read_reg(pbpctl_dev, CONT_CONFIG_REG_ADDR)) & + EN_HW_RESET_MASK) == + EN_HW_RESET_MASK) ? 1 : 0); + } + return BP_NOT_CAP; +} + +//#endif /*PMC_FIX_FLAG*/ + +int std_nic_status(bpctl_dev_t * pbpctl_dev) +{ + int status_val = 0; + + if (pbpctl_dev->bp_caps & STD_NIC_CAP) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) + return BP_NOT_CAP; + if (pbpctl_dev->bp_ext_ver >= BP_FW_EXT_VER8) { + return ((((read_reg(pbpctl_dev, STATUS_DISC_REG_ADDR)) & + STD_NIC_ON_MASK) == STD_NIC_ON_MASK) ? 1 : 0); + } + + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + if (pbpctl_dev->bp_caps & BP_CAP) { + status_val = + read_reg(pbpctl_dev, STATUS_REG_ADDR); + if (((!(status_val & WDT_EN_MASK)) + && ((status_val & STD_NIC_MASK) == + STD_NIC_MASK))) + status_val = 1; + else + return 0; + } + if (pbpctl_dev->bp_caps & TAP_CAP) { + status_val = + read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR); + if ((status_val & STD_NIC_TAP_MASK) == + STD_NIC_TAP_MASK) + status_val = 1; + else + return 0; + } + if (pbpctl_dev->bp_caps & TAP_CAP) { + if ((disc_off_status(pbpctl_dev))) + status_val = 1; + else + return 0; + } + + return status_val; + } + } + return BP_NOT_CAP; +} + +/******************************************************/ +/**************SW_INIT*********************************/ +/******************************************************/ +void bypass_caps_init(bpctl_dev_t * pbpctl_dev) +{ + u_int32_t ctrl_ext = 0; + bpctl_dev_t *pbpctl_dev_m = NULL; + +#ifdef BYPASS_DEBUG + int ret = 0; + if (!(INTEL_IF_SERIES(adapter->bp_device_block.subdevice))) { + ret = read_reg(pbpctl_dev, VER_REG_ADDR); + printk("VER_REG reg1=%x\n", ret); + ret = read_reg(pbpctl_dev, PRODUCT_CAP_REG_ADDR); + printk("PRODUCT_CAP reg=%x\n", ret); + ret = read_reg(pbpctl_dev, STATUS_TAP_REG_ADDR); + printk("STATUS_TAP reg1=%x\n", ret); + ret = read_reg(pbpctl_dev, 0x7); + printk("SIG_REG reg1=%x\n", ret); + ret = read_reg(pbpctl_dev, STATUS_REG_ADDR); + printk("STATUS_REG_ADDR=%x\n", ret); + ret = read_reg(pbpctl_dev, WDT_REG_ADDR); + printk("WDT_REG_ADDR=%x\n", ret); + ret = read_reg(pbpctl_dev, TMRL_REG_ADDR); + printk("TMRL_REG_ADDR=%x\n", ret); + ret = read_reg(pbpctl_dev, TMRH_REG_ADDR); + printk("TMRH_REG_ADDR=%x\n", ret); + } +#endif + if ((pbpctl_dev->bp_fiber5) || (pbpctl_dev->bp_10g9)) { + pbpctl_dev->media_type = bp_fiber; + } else if (pbpctl_dev->bp_10gb) { + if (BP10GB_CX4_SERIES(pbpctl_dev->subdevice)) + pbpctl_dev->media_type = bp_cx4; + else + pbpctl_dev->media_type = bp_fiber; + + } + + else if (pbpctl_dev->bp_540) + pbpctl_dev->media_type = bp_none; + else if (!pbpctl_dev->bp_10g) { + + ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT); + if ((ctrl_ext & BPCTLI_CTRL_EXT_LINK_MODE_MASK) == 0x0) + pbpctl_dev->media_type = bp_copper; + else + pbpctl_dev->media_type = bp_fiber; + + } + //if (!pbpctl_dev->bp_10g) + // pbpctl_dev->media_type=((BPCTL_READ_REG(pbpctl_dev, STATUS))&BPCTLI_STATUS_TBIMODE)?bp_fiber:bp_copper; + else { + if (BP10G_CX4_SERIES(pbpctl_dev->subdevice)) + pbpctl_dev->media_type = bp_cx4; + else + pbpctl_dev->media_type = bp_fiber; + } + + //pbpctl_dev->bp_fw_ver=0xa8; + if (is_bypass_fn(pbpctl_dev)) { + + pbpctl_dev->bp_caps |= BP_PWOFF_ON_CAP; + if (pbpctl_dev->media_type == bp_fiber) + pbpctl_dev->bp_caps |= + (TX_CTL_CAP | TX_STATUS_CAP | TPL_CAP); + + if (TPL_IF_SERIES(pbpctl_dev->subdevice)) { + pbpctl_dev->bp_caps |= TPL_CAP; + } + + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) { + pbpctl_dev->bp_caps |= + (BP_CAP | BP_STATUS_CAP | SW_CTL_CAP | + BP_PWUP_ON_CAP | BP_PWUP_OFF_CAP | BP_PWOFF_OFF_CAP + | WD_CTL_CAP | WD_STATUS_CAP | STD_NIC_CAP | + WD_TIMEOUT_CAP); + + pbpctl_dev->bp_ext_ver = OLD_IF_VER; + return; + } + + if ((pbpctl_dev->bp_fw_ver == 0xff) && + OLD_IF_SERIES(pbpctl_dev->subdevice)) { + + pbpctl_dev->bp_caps |= + (BP_CAP | BP_STATUS_CAP | BP_STATUS_CHANGE_CAP | + SW_CTL_CAP | BP_PWUP_ON_CAP | WD_CTL_CAP | + WD_STATUS_CAP | WD_TIMEOUT_CAP); + + pbpctl_dev->bp_ext_ver = OLD_IF_VER; + return; + } + + else { + switch (pbpctl_dev->bp_fw_ver) { + case BP_FW_VER_A0: + case BP_FW_VER_A1:{ + pbpctl_dev->bp_ext_ver = + (pbpctl_dev-> + bp_fw_ver & EXT_VER_MASK); + break; + } + default:{ + if ((bypass_sign_check(pbpctl_dev)) != + 1) { + pbpctl_dev->bp_caps = 0; + return; + } + pbpctl_dev->bp_ext_ver = + (pbpctl_dev-> + bp_fw_ver & EXT_VER_MASK); + } + } + } + + if (pbpctl_dev->bp_ext_ver == PXG2BPI_VER) + pbpctl_dev->bp_caps |= + (BP_CAP | BP_STATUS_CAP | BP_STATUS_CHANGE_CAP | + SW_CTL_CAP | BP_DIS_CAP | BP_DIS_STATUS_CAP | + BP_PWUP_ON_CAP | BP_PWUP_OFF_CAP | BP_PWUP_CTL_CAP + | WD_CTL_CAP | STD_NIC_CAP | WD_STATUS_CAP | + WD_TIMEOUT_CAP); + else if (pbpctl_dev->bp_ext_ver >= PXG2TBPI_VER) { + int cap_reg; + + pbpctl_dev->bp_caps |= + (SW_CTL_CAP | WD_CTL_CAP | WD_STATUS_CAP | + WD_TIMEOUT_CAP); + cap_reg = get_bp_prod_caps(pbpctl_dev); + + if ((cap_reg & NORMAL_UNSUPPORT_MASK) == + NORMAL_UNSUPPORT_MASK) + pbpctl_dev->bp_caps |= NIC_CAP_NEG; + else + pbpctl_dev->bp_caps |= STD_NIC_CAP; + + if ((normal_support(pbpctl_dev)) == 1) + + pbpctl_dev->bp_caps |= STD_NIC_CAP; + + else + pbpctl_dev->bp_caps |= NIC_CAP_NEG; + if ((cap_reg & BYPASS_SUPPORT_MASK) == + BYPASS_SUPPORT_MASK) { + pbpctl_dev->bp_caps |= + (BP_CAP | BP_STATUS_CAP | + BP_STATUS_CHANGE_CAP | BP_DIS_CAP | + BP_DIS_STATUS_CAP | BP_PWUP_ON_CAP | + BP_PWUP_OFF_CAP | BP_PWUP_CTL_CAP); + if (pbpctl_dev->bp_ext_ver >= BP_FW_EXT_VER7) + pbpctl_dev->bp_caps |= + BP_PWOFF_ON_CAP | BP_PWOFF_OFF_CAP | + BP_PWOFF_CTL_CAP; + } + if ((cap_reg & TAP_SUPPORT_MASK) == TAP_SUPPORT_MASK) { + pbpctl_dev->bp_caps |= + (TAP_CAP | TAP_STATUS_CAP | + TAP_STATUS_CHANGE_CAP | TAP_DIS_CAP | + TAP_DIS_STATUS_CAP | TAP_PWUP_ON_CAP | + TAP_PWUP_OFF_CAP | TAP_PWUP_CTL_CAP); + } + if (pbpctl_dev->bp_ext_ver >= BP_FW_EXT_VER8) { + if ((cap_reg & DISC_SUPPORT_MASK) == + DISC_SUPPORT_MASK) + pbpctl_dev->bp_caps |= + (DISC_CAP | DISC_DIS_CAP | + DISC_PWUP_CTL_CAP); + if ((cap_reg & TPL2_SUPPORT_MASK) == + TPL2_SUPPORT_MASK) { + pbpctl_dev->bp_caps_ex |= TPL2_CAP_EX; + pbpctl_dev->bp_caps |= TPL_CAP; + pbpctl_dev->bp_tpl_flag = + tpl2_flag_status(pbpctl_dev); + } + + } + + if (pbpctl_dev->bp_ext_ver >= BP_FW_EXT_VER9) { + if ((cap_reg & DISC_PORT_SUPPORT_MASK) == + DISC_PORT_SUPPORT_MASK) { + pbpctl_dev->bp_caps_ex |= + DISC_PORT_CAP_EX; + pbpctl_dev->bp_caps |= + (TX_CTL_CAP | TX_STATUS_CAP); + } + + } + + } + if (pbpctl_dev->bp_ext_ver >= PXG2BPI_VER) { + if ((read_reg(pbpctl_dev, STATUS_REG_ADDR)) & + WDT_EN_MASK) + pbpctl_dev->wdt_status = WDT_STATUS_EN; + else + pbpctl_dev->wdt_status = WDT_STATUS_DIS; + } + + } else if ((P2BPFI_IF_SERIES(pbpctl_dev->subdevice)) || + (PEGF5_IF_SERIES(pbpctl_dev->subdevice)) || + (PEGF80_IF_SERIES(pbpctl_dev->subdevice)) || + (BP10G9_IF_SERIES(pbpctl_dev->subdevice))) { + pbpctl_dev->bp_caps |= (TX_CTL_CAP | TX_STATUS_CAP); + } + if ((pbpctl_dev->subdevice & 0xa00) == 0xa00) + pbpctl_dev->bp_caps |= (TX_CTL_CAP | TX_STATUS_CAP); + if (PEG5_IF_SERIES(pbpctl_dev->subdevice)) + pbpctl_dev->bp_caps |= (TX_CTL_CAP | TX_STATUS_CAP); + + if (BP10GB_IF_SERIES(pbpctl_dev->subdevice)) { + pbpctl_dev->bp_caps &= ~(TX_CTL_CAP | TX_STATUS_CAP); + } + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m != NULL) { + int cap_reg = 0; + if (pbpctl_dev_m->bp_ext_ver >= 0x9) { + cap_reg = get_bp_prod_caps(pbpctl_dev_m); + if ((cap_reg & DISC_PORT_SUPPORT_MASK) == + DISC_PORT_SUPPORT_MASK) + pbpctl_dev->bp_caps |= + (TX_CTL_CAP | TX_STATUS_CAP); + pbpctl_dev->bp_caps_ex |= DISC_PORT_CAP_EX; + } + } +} + +int bypass_off_init(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + + if ((ret = cmnd_on(pbpctl_dev)) < 0) + return ret; + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) + return (dis_bypass_cap(pbpctl_dev)); + wdt_off(pbpctl_dev); + if (pbpctl_dev->bp_caps & BP_CAP) + bypass_off(pbpctl_dev); + if (pbpctl_dev->bp_caps & TAP_CAP) + tap_off(pbpctl_dev); + cmnd_off(pbpctl_dev); + return 0; +} + +void remove_bypass_wd_auto(bpctl_dev_t * pbpctl_dev) +{ +#ifdef BP_SELF_TEST + bpctl_dev_t *pbpctl_dev_sl = NULL; +#endif + + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + + del_timer_sync(&pbpctl_dev->bp_timer); +#ifdef BP_SELF_TEST + pbpctl_dev_sl = get_status_port_fn(pbpctl_dev); +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31)) + if (pbpctl_dev_sl && (pbpctl_dev_sl->ndev) + && (pbpctl_dev_sl->ndev->hard_start_xmit) + && (pbpctl_dev_sl->hard_start_xmit_save)) { + rtnl_lock(); + pbpctl_dev_sl->ndev->hard_start_xmit = + pbpctl_dev_sl->hard_start_xmit_save; + rtnl_unlock(); + } +#else + if (pbpctl_dev_sl && (pbpctl_dev_sl->ndev)) { + if ((pbpctl_dev_sl->ndev->netdev_ops) + && (pbpctl_dev_sl->old_ops)) { + rtnl_lock(); + pbpctl_dev_sl->ndev->netdev_ops = + pbpctl_dev_sl->old_ops; + pbpctl_dev_sl->old_ops = NULL; + + rtnl_unlock(); + + } + + } + +#endif +#endif + } + +} + +int init_bypass_wd_auto(bpctl_dev_t * pbpctl_dev) +{ + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + init_timer(&pbpctl_dev->bp_timer); + pbpctl_dev->bp_timer.function = &wd_reset_timer; + pbpctl_dev->bp_timer.data = (unsigned long)pbpctl_dev; + return 1; + } + return BP_NOT_CAP; +} + +#ifdef BP_SELF_TEST +int bp_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) +{ + bpctl_dev_t *pbpctl_dev = NULL, *pbpctl_dev_m = NULL; + int idx_dev = 0; + struct ethhdr *eth = (struct ethhdr *)skb->data; + + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].ndev != NULL) && (idx_dev < device_num)); + idx_dev++) { + if (bpctl_dev_arr[idx_dev].ndev == dev) { + pbpctl_dev = &bpctl_dev_arr[idx_dev]; + break; + } + } + if (!pbpctl_dev) + return 1; + if ((htons(ETH_P_BPTEST) == eth->h_proto)) { + + pbpctl_dev_m = get_master_port_fn(pbpctl_dev); + if (pbpctl_dev_m) { + + if (bypass_status(pbpctl_dev_m)) { + cmnd_on(pbpctl_dev_m); + bypass_off(pbpctl_dev_m); + cmnd_off(pbpctl_dev_m); + } + wdt_timer_reload(pbpctl_dev_m); + } + dev_kfree_skb_irq(skb); + return 0; + } + return (pbpctl_dev->hard_start_xmit_save(skb, dev)); +} +#endif + +int set_bypass_wd_auto(bpctl_dev_t * pbpctl_dev, unsigned int param) +{ + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + if (pbpctl_dev->reset_time != param) { + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) + pbpctl_dev->reset_time = + (param < + WDT_AUTO_MIN_INT) ? WDT_AUTO_MIN_INT : + param; + else + pbpctl_dev->reset_time = param; + if (param) + mod_timer(&pbpctl_dev->bp_timer, jiffies); + } + return 0; + } + return BP_NOT_CAP; +} + +int get_bypass_wd_auto(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + return pbpctl_dev->reset_time; + } + return BP_NOT_CAP; +} + +#ifdef BP_SELF_TEST + +int set_bp_self_test(bpctl_dev_t * pbpctl_dev, unsigned int param) +{ + bpctl_dev_t *pbpctl_dev_sl = NULL; + + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + pbpctl_dev->bp_self_test_flag = param == 0 ? 0 : 1; + pbpctl_dev_sl = get_status_port_fn(pbpctl_dev); +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31)) + if ((pbpctl_dev_sl->ndev) && + (pbpctl_dev_sl->ndev->hard_start_xmit)) { + rtnl_lock(); + if (pbpctl_dev->bp_self_test_flag == 1) { + + pbpctl_dev_sl->hard_start_xmit_save = + pbpctl_dev_sl->ndev->hard_start_xmit; + pbpctl_dev_sl->ndev->hard_start_xmit = + bp_hard_start_xmit; + } else if (pbpctl_dev_sl->hard_start_xmit_save) { + pbpctl_dev_sl->ndev->hard_start_xmit = + pbpctl_dev_sl->hard_start_xmit_save; + } + rtnl_unlock(); + } +#else + if ((pbpctl_dev_sl->ndev) && (pbpctl_dev_sl->ndev->netdev_ops)) { + rtnl_lock(); + if (pbpctl_dev->bp_self_test_flag == 1) { + + pbpctl_dev_sl->old_ops = + pbpctl_dev_sl->ndev->netdev_ops; + pbpctl_dev_sl->new_ops = + *pbpctl_dev_sl->old_ops; + pbpctl_dev_sl->new_ops.ndo_start_xmit = + bp_hard_start_xmit; + pbpctl_dev_sl->ndev->netdev_ops = + &pbpctl_dev_sl->new_ops; + + } else if (pbpctl_dev_sl->old_ops) { + pbpctl_dev_sl->ndev->netdev_ops = + pbpctl_dev_sl->old_ops; + pbpctl_dev_sl->old_ops = NULL; + } + rtnl_unlock(); + } +#endif + + set_bypass_wd_auto(pbpctl_dev, param); + return 0; + } + return BP_NOT_CAP; +} + +int get_bp_self_test(bpctl_dev_t * pbpctl_dev) +{ + + if (pbpctl_dev->bp_caps & WD_CTL_CAP) { + if (pbpctl_dev->bp_self_test_flag == 1) + return pbpctl_dev->reset_time; + else + return 0; + } + return BP_NOT_CAP; +} + +#endif + +/**************************************************************/ +/************************* API ********************************/ +/**************************************************************/ + +int is_bypass_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (((pbpctl_dev->func == 0) || (pbpctl_dev->func == 2)) ? 1 : 0); +} + +int set_bypass_fn(bpctl_dev_t * pbpctl_dev, int bypass_mode) +{ + int ret = 0; + + if (!(pbpctl_dev->bp_caps & BP_CAP)) + return BP_NOT_CAP; + if ((ret = cmnd_on(pbpctl_dev)) < 0) + return ret; + if (!bypass_mode) + ret = bypass_off(pbpctl_dev); + else + ret = bypass_on(pbpctl_dev); + cmnd_off(pbpctl_dev); + + return ret; +} + +int get_bypass_fn(bpctl_dev_t * pbpctl_dev) +{ + return (bypass_status(pbpctl_dev)); +} + +int get_bypass_change_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (bypass_change_status(pbpctl_dev)); +} + +int set_dis_bypass_fn(bpctl_dev_t * pbpctl_dev, int dis_param) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if (!(pbpctl_dev->bp_caps & BP_DIS_CAP)) + return BP_NOT_CAP; + if ((ret = cmnd_on(pbpctl_dev)) < 0) + return ret; + if (dis_param) + ret = dis_bypass_cap(pbpctl_dev); + else + ret = en_bypass_cap(pbpctl_dev); + cmnd_off(pbpctl_dev); + return ret; +} + +int get_dis_bypass_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (dis_bypass_cap_status(pbpctl_dev)); +} + +int set_bypass_pwoff_fn(bpctl_dev_t * pbpctl_dev, int bypass_mode) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if (!(pbpctl_dev->bp_caps & BP_PWOFF_CTL_CAP)) + return BP_NOT_CAP; + if ((ret = cmnd_on(pbpctl_dev)) < 0) + return ret; + if (bypass_mode) + ret = bypass_state_pwroff(pbpctl_dev); + else + ret = normal_state_pwroff(pbpctl_dev); + cmnd_off(pbpctl_dev); + return ret; +} + +int get_bypass_pwoff_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (default_pwroff_status(pbpctl_dev)); +} + +int set_bypass_pwup_fn(bpctl_dev_t * pbpctl_dev, int bypass_mode) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if (!(pbpctl_dev->bp_caps & BP_PWUP_CTL_CAP)) + return BP_NOT_CAP; + if ((ret = cmnd_on(pbpctl_dev)) < 0) + return ret; + if (bypass_mode) + ret = bypass_state_pwron(pbpctl_dev); + else + ret = normal_state_pwron(pbpctl_dev); + cmnd_off(pbpctl_dev); + return ret; +} + +int get_bypass_pwup_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (default_pwron_status(pbpctl_dev)); +} + +int set_bypass_wd_fn(bpctl_dev_t * pbpctl_dev, int timeout) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if (!(pbpctl_dev->bp_caps & WD_CTL_CAP)) + return BP_NOT_CAP; + + if ((ret = cmnd_on(pbpctl_dev)) < 0) + return ret; + if (!timeout) + ret = wdt_off(pbpctl_dev); + else { + wdt_on(pbpctl_dev, timeout); + ret = pbpctl_dev->bypass_timer_interval; + } + cmnd_off(pbpctl_dev); + return ret; +} + +int get_bypass_wd_fn(bpctl_dev_t * pbpctl_dev, int *timeout) +{ + if (!pbpctl_dev) + return -1; + + return wdt_programmed(pbpctl_dev, timeout); +} + +int get_wd_expire_time_fn(bpctl_dev_t * pbpctl_dev, int *time_left) +{ + if (!pbpctl_dev) + return -1; + + return (wdt_timer(pbpctl_dev, time_left)); +} + +int reset_bypass_wd_timer_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (wdt_timer_reload(pbpctl_dev)); +} + +int get_wd_set_caps_fn(bpctl_dev_t * pbpctl_dev) +{ + int bp_status = 0; + + unsigned int step_value = TIMEOUT_MAX_STEP + 1, bit_cnt = 0; + if (!pbpctl_dev) + return -1; + + if (INTEL_IF_SERIES(pbpctl_dev->subdevice)) + return BP_NOT_CAP; + + while ((step_value >>= 1)) + bit_cnt++; + + if (is_bypass_fn(pbpctl_dev)) { + bp_status = + WD_STEP_COUNT_MASK(bit_cnt) | WDT_STEP_TIME | + WD_MIN_TIME_MASK(TIMEOUT_UNIT / 100); + } else + return -1; + + return bp_status; +} + +int set_std_nic_fn(bpctl_dev_t * pbpctl_dev, int nic_mode) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if (!(pbpctl_dev->bp_caps & STD_NIC_CAP)) + return BP_NOT_CAP; + + if ((ret = cmnd_on(pbpctl_dev)) < 0) + return ret; + if (nic_mode) + ret = std_nic_on(pbpctl_dev); + else + ret = std_nic_off(pbpctl_dev); + cmnd_off(pbpctl_dev); + return ret; +} + +int get_std_nic_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (std_nic_status(pbpctl_dev)); +} + +int set_tap_fn(bpctl_dev_t * pbpctl_dev, int tap_mode) +{ + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->bp_caps & TAP_CAP) && ((cmnd_on(pbpctl_dev)) >= 0)) { + if (!tap_mode) + tap_off(pbpctl_dev); + else + tap_on(pbpctl_dev); + cmnd_off(pbpctl_dev); + return 0; + } + return BP_NOT_CAP; +} + +int get_tap_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (tap_status(pbpctl_dev)); +} + +int set_tap_pwup_fn(bpctl_dev_t * pbpctl_dev, int tap_mode) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->bp_caps & TAP_PWUP_CTL_CAP) + && ((cmnd_on(pbpctl_dev)) >= 0)) { + if (tap_mode) + ret = tap_state_pwron(pbpctl_dev); + else + ret = normal_state_pwron(pbpctl_dev); + cmnd_off(pbpctl_dev); + } else + ret = BP_NOT_CAP; + return ret; +} + +int get_tap_pwup_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if ((ret = default_pwron_tap_status(pbpctl_dev)) < 0) + return ret; + return ((ret == 0) ? 1 : 0); +} + +int get_tap_change_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (tap_change_status(pbpctl_dev)); +} + +int set_dis_tap_fn(bpctl_dev_t * pbpctl_dev, int dis_param) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->bp_caps & TAP_DIS_CAP) && ((cmnd_on(pbpctl_dev)) >= 0)) { + if (dis_param) + ret = dis_tap_cap(pbpctl_dev); + else + ret = en_tap_cap(pbpctl_dev); + cmnd_off(pbpctl_dev); + return ret; + } else + return BP_NOT_CAP; +} + +int get_dis_tap_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (dis_tap_cap_status(pbpctl_dev)); +} + +int set_disc_fn(bpctl_dev_t * pbpctl_dev, int disc_mode) +{ + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->bp_caps & DISC_CAP) && ((cmnd_on(pbpctl_dev)) >= 0)) { + if (!disc_mode) + disc_off(pbpctl_dev); + else + disc_on(pbpctl_dev); + cmnd_off(pbpctl_dev); + + return BP_OK; + } + return BP_NOT_CAP; +} + +int get_disc_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + ret = disc_status(pbpctl_dev); + + return ret; +} + +int set_disc_pwup_fn(bpctl_dev_t * pbpctl_dev, int disc_mode) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->bp_caps & DISC_PWUP_CTL_CAP) + && ((cmnd_on(pbpctl_dev)) >= 0)) { + if (disc_mode) + ret = disc_state_pwron(pbpctl_dev); + else + ret = normal_state_pwron(pbpctl_dev); + cmnd_off(pbpctl_dev); + } else + ret = BP_NOT_CAP; + return ret; +} + +int get_disc_pwup_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + ret = default_pwron_disc_status(pbpctl_dev); + return (ret == 0 ? 1 : (ret < 0 ? BP_NOT_CAP : 0)); +} + +int get_disc_change_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + ret = disc_change_status(pbpctl_dev); + return ret; +} + +int set_dis_disc_fn(bpctl_dev_t * pbpctl_dev, int dis_param) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->bp_caps & DISC_DIS_CAP) + && ((cmnd_on(pbpctl_dev)) >= 0)) { + if (dis_param) + ret = dis_disc_cap(pbpctl_dev); + else + ret = en_disc_cap(pbpctl_dev); + cmnd_off(pbpctl_dev); + return ret; + } else + return BP_NOT_CAP; +} + +int get_dis_disc_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + ret = dis_disc_cap_status(pbpctl_dev); + + return ret; +} + +int set_disc_port_fn(bpctl_dev_t * pbpctl_dev, int disc_mode) +{ + int ret = BP_NOT_CAP; + if (!pbpctl_dev) + return -1; + + if (!disc_mode) + ret = disc_port_off(pbpctl_dev); + else + ret = disc_port_on(pbpctl_dev); + + return ret; +} + +int get_disc_port_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (disc_port_status(pbpctl_dev)); +} + +int set_disc_port_pwup_fn(bpctl_dev_t * pbpctl_dev, int disc_mode) +{ + int ret = BP_NOT_CAP; + if (!pbpctl_dev) + return -1; + + if (!disc_mode) + ret = normal_port_state_pwron(pbpctl_dev); + else + ret = disc_port_state_pwron(pbpctl_dev); + + return ret; +} + +int get_disc_port_pwup_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if ((ret = default_pwron_disc_port_status(pbpctl_dev)) < 0) + return ret; + return ((ret == 0) ? 1 : 0); +} + +int get_wd_exp_mode_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (wdt_exp_mode_status(pbpctl_dev)); +} + +int set_wd_exp_mode_fn(bpctl_dev_t * pbpctl_dev, int param) +{ + if (!pbpctl_dev) + return -1; + + return (wdt_exp_mode(pbpctl_dev, param)); +} + +int reset_cont_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + if ((ret = cmnd_on(pbpctl_dev)) < 0) + return ret; + return (reset_cont(pbpctl_dev)); +} + +int set_tx_fn(bpctl_dev_t * pbpctl_dev, int tx_state) +{ + + bpctl_dev_t *pbpctl_dev_b = NULL; + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->bp_caps & TPL_CAP) && + (pbpctl_dev->bp_caps & SW_CTL_CAP)) { + if ((pbpctl_dev->bp_tpl_flag)) + return BP_NOT_CAP; + } else if ((pbpctl_dev_b = get_master_port_fn(pbpctl_dev))) { + if ((pbpctl_dev_b->bp_caps & TPL_CAP) && + (pbpctl_dev_b->bp_tpl_flag)) + return BP_NOT_CAP; + } + return (set_tx(pbpctl_dev, tx_state)); +} + +int set_bp_force_link_fn(int dev_num, int tx_state) +{ + static bpctl_dev_t *bpctl_dev_curr; + + if ((dev_num < 0) || (dev_num > device_num) + || (bpctl_dev_arr[dev_num].pdev == NULL)) + return -1; + bpctl_dev_curr = &bpctl_dev_arr[dev_num]; + + return (set_bp_force_link(bpctl_dev_curr, tx_state)); +} + +int set_wd_autoreset_fn(bpctl_dev_t * pbpctl_dev, int param) +{ + if (!pbpctl_dev) + return -1; + + return (set_bypass_wd_auto(pbpctl_dev, param)); +} + +int get_wd_autoreset_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (get_bypass_wd_auto(pbpctl_dev)); +} + +#ifdef BP_SELF_TEST +int set_bp_self_test_fn(bpctl_dev_t * pbpctl_dev, int param) +{ + if (!pbpctl_dev) + return -1; + + return (set_bp_self_test(pbpctl_dev, param)); +} + +int get_bp_self_test_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (get_bp_self_test(pbpctl_dev)); +} + +#endif + +int get_bypass_caps_fn(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + return (pbpctl_dev->bp_caps); + +} + +int get_bypass_slave_fn(bpctl_dev_t * pbpctl_dev, bpctl_dev_t ** pbpctl_dev_out) +{ + int idx_dev = 0; + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->func == 0) || (pbpctl_dev->func == 2)) { + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) + && (idx_dev < device_num)); idx_dev++) { + if ((bpctl_dev_arr[idx_dev].bus == pbpctl_dev->bus) + && (bpctl_dev_arr[idx_dev].slot == + pbpctl_dev->slot)) { + if ((pbpctl_dev->func == 0) + && (bpctl_dev_arr[idx_dev].func == 1)) { + *pbpctl_dev_out = + &bpctl_dev_arr[idx_dev]; + return 1; + } + if ((pbpctl_dev->func == 2) && + (bpctl_dev_arr[idx_dev].func == 3)) { + *pbpctl_dev_out = + &bpctl_dev_arr[idx_dev]; + return 1; + } + } + } + return -1; + } else + return 0; +} + +int is_bypass(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->func == 0) || (pbpctl_dev->func == 2)) + return 1; + else + return 0; +} + +int get_tx_fn(bpctl_dev_t * pbpctl_dev) +{ + bpctl_dev_t *pbpctl_dev_b = NULL; + if (!pbpctl_dev) + return -1; + + if ((pbpctl_dev->bp_caps & TPL_CAP) && + (pbpctl_dev->bp_caps & SW_CTL_CAP)) { + if ((pbpctl_dev->bp_tpl_flag)) + return BP_NOT_CAP; + } else if ((pbpctl_dev_b = get_master_port_fn(pbpctl_dev))) { + if ((pbpctl_dev_b->bp_caps & TPL_CAP) && + (pbpctl_dev_b->bp_tpl_flag)) + return BP_NOT_CAP; + } + return (tx_status(pbpctl_dev)); +} + +int get_bp_force_link_fn(int dev_num) +{ + static bpctl_dev_t *bpctl_dev_curr; + + if ((dev_num < 0) || (dev_num > device_num) + || (bpctl_dev_arr[dev_num].pdev == NULL)) + return -1; + bpctl_dev_curr = &bpctl_dev_arr[dev_num]; + + return (bp_force_link_status(bpctl_dev_curr)); +} + +static int get_bypass_link_status(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + + if (pbpctl_dev->media_type == bp_fiber) + return ((BPCTL_READ_REG(pbpctl_dev, CTRL) & + BPCTLI_CTRL_SWDPIN1)); + else + return ((BPCTL_READ_REG(pbpctl_dev, STATUS) & + BPCTLI_STATUS_LU)); + +} + +static void bp_tpl_timer_fn(unsigned long param) +{ + bpctl_dev_t *pbpctl_dev = (bpctl_dev_t *) param; + uint32_t link1, link2; + bpctl_dev_t *pbpctl_dev_b = NULL; + + if (!(pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + return; + + if (!pbpctl_dev->bp_tpl_flag) { + set_tx(pbpctl_dev_b, 1); + set_tx(pbpctl_dev, 1); + return; + } + link1 = get_bypass_link_status(pbpctl_dev); + + link2 = get_bypass_link_status(pbpctl_dev_b); + if ((link1) && (tx_status(pbpctl_dev))) { + if ((!link2) && (tx_status(pbpctl_dev_b))) { + set_tx(pbpctl_dev, 0); + } else if (!tx_status(pbpctl_dev_b)) { + set_tx(pbpctl_dev_b, 1); + } + } else if ((!link1) && (tx_status(pbpctl_dev))) { + if ((link2) && (tx_status(pbpctl_dev_b))) { + set_tx(pbpctl_dev_b, 0); + } + } else if ((link1) && (!tx_status(pbpctl_dev))) { + if ((link2) && (tx_status(pbpctl_dev_b))) { + set_tx(pbpctl_dev, 1); + } + } else if ((!link1) && (!tx_status(pbpctl_dev))) { + if ((link2) && (tx_status(pbpctl_dev_b))) { + set_tx(pbpctl_dev, 1); + } + } + + mod_timer(&pbpctl_dev->bp_tpl_timer, jiffies + BP_LINK_MON_DELAY * HZ); +} + +void remove_bypass_tpl_auto(bpctl_dev_t * pbpctl_dev) +{ + bpctl_dev_t *pbpctl_dev_b = NULL; + if (!pbpctl_dev) + return; + pbpctl_dev_b = get_status_port_fn(pbpctl_dev); + + if (pbpctl_dev->bp_caps & TPL_CAP) { + del_timer_sync(&pbpctl_dev->bp_tpl_timer); + pbpctl_dev->bp_tpl_flag = 0; + pbpctl_dev_b = get_status_port_fn(pbpctl_dev); + if (pbpctl_dev_b) + set_tx(pbpctl_dev_b, 1); + set_tx(pbpctl_dev, 1); + } + return; +} + +int init_bypass_tpl_auto(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + if (pbpctl_dev->bp_caps & TPL_CAP) { + init_timer(&pbpctl_dev->bp_tpl_timer); + pbpctl_dev->bp_tpl_timer.function = &bp_tpl_timer_fn; + pbpctl_dev->bp_tpl_timer.data = (unsigned long)pbpctl_dev; + return BP_OK; + } + return BP_NOT_CAP; +} + +int set_bypass_tpl_auto(bpctl_dev_t * pbpctl_dev, unsigned int param) +{ + if (!pbpctl_dev) + return -1; + if (pbpctl_dev->bp_caps & TPL_CAP) { + if ((param) && (!pbpctl_dev->bp_tpl_flag)) { + pbpctl_dev->bp_tpl_flag = param; + mod_timer(&pbpctl_dev->bp_tpl_timer, jiffies + 1); + return BP_OK; + }; + if ((!param) && (pbpctl_dev->bp_tpl_flag)) + remove_bypass_tpl_auto(pbpctl_dev); + + return BP_OK; + } + return BP_NOT_CAP; +} + +int get_bypass_tpl_auto(bpctl_dev_t * pbpctl_dev) +{ + if (!pbpctl_dev) + return -1; + if (pbpctl_dev->bp_caps & TPL_CAP) { + return pbpctl_dev->bp_tpl_flag; + } + return BP_NOT_CAP; +} + +int set_tpl_fn(bpctl_dev_t * pbpctl_dev, int tpl_mode) +{ + + bpctl_dev_t *pbpctl_dev_b = NULL; + if (!pbpctl_dev) + return -1; + + pbpctl_dev_b = get_status_port_fn(pbpctl_dev); + + if (pbpctl_dev->bp_caps & TPL_CAP) { + if (tpl_mode) { + if ((pbpctl_dev_b = get_status_port_fn(pbpctl_dev))) + set_tx(pbpctl_dev_b, 1); + set_tx(pbpctl_dev, 1); + } + if ((TPL_IF_SERIES(pbpctl_dev->subdevice)) || + (pbpctl_dev->bp_caps_ex & TPL2_CAP_EX)) { + pbpctl_dev->bp_tpl_flag = tpl_mode; + if (!tpl_mode) + tpl_hw_off(pbpctl_dev); + else + tpl_hw_on(pbpctl_dev); + } else + set_bypass_tpl_auto(pbpctl_dev, tpl_mode); + return 0; + } + return BP_NOT_CAP; +} + +int get_tpl_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = BP_NOT_CAP; + if (!pbpctl_dev) + return -1; + + if (pbpctl_dev->bp_caps & TPL_CAP) { + if (pbpctl_dev->bp_caps_ex & TPL2_CAP_EX) + return (tpl2_flag_status(pbpctl_dev)); + ret = pbpctl_dev->bp_tpl_flag; + } + return ret; +} + +//#ifdef PMC_FIX_FLAG +int set_bp_wait_at_pwup_fn(bpctl_dev_t * pbpctl_dev, int tap_mode) +{ + if (!pbpctl_dev) + return -1; + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + //bp_lock(pbp_device_block); + cmnd_on(pbpctl_dev); + if (!tap_mode) + bp_wait_at_pwup_dis(pbpctl_dev); + else + bp_wait_at_pwup_en(pbpctl_dev); + cmnd_off(pbpctl_dev); + + // bp_unlock(pbp_device_block); + return BP_OK; + } + return BP_NOT_CAP; +} + +int get_bp_wait_at_pwup_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + // bp_lock(pbp_device_block); + ret = bp_wait_at_pwup_status(pbpctl_dev); + // bp_unlock(pbp_device_block); + + return ret; +} + +int set_bp_hw_reset_fn(bpctl_dev_t * pbpctl_dev, int tap_mode) +{ + if (!pbpctl_dev) + return -1; + + if (pbpctl_dev->bp_caps & SW_CTL_CAP) { + // bp_lock(pbp_device_block); + cmnd_on(pbpctl_dev); + + if (!tap_mode) + bp_hw_reset_dis(pbpctl_dev); + else + bp_hw_reset_en(pbpctl_dev); + cmnd_off(pbpctl_dev); + // bp_unlock(pbp_device_block); + return BP_OK; + } + return BP_NOT_CAP; +} + +int get_bp_hw_reset_fn(bpctl_dev_t * pbpctl_dev) +{ + int ret = 0; + if (!pbpctl_dev) + return -1; + + //bp_lock(pbp_device_block); + ret = bp_hw_reset_status(pbpctl_dev); + + //bp_unlock(pbp_device_block); + + return ret; +} + +//#endif /*PMC_FIX_FLAG*/ + +int get_bypass_info_fn(bpctl_dev_t * pbpctl_dev, char *dev_name, + char *add_param) +{ + if (!pbpctl_dev) + return -1; + if (!is_bypass_fn(pbpctl_dev)) + return -1; + strcpy(dev_name, pbpctl_dev->name); + *add_param = pbpctl_dev->bp_fw_ver; + return 0; +} + +int get_dev_idx_bsf(int bus, int slot, int func) +{ + int idx_dev = 0; + //if_scan(); + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) && (idx_dev < device_num)); + idx_dev++) { + if ((bus == bpctl_dev_arr[idx_dev].bus) + && (slot == bpctl_dev_arr[idx_dev].slot) + && (func == bpctl_dev_arr[idx_dev].func)) + + return idx_dev; + } + return -1; +} + +static void str_low(char *str) +{ + int i; + + for (i = 0; i < strlen(str); i++) + if ((str[i] >= 65) && (str[i] <= 90)) + str[i] += 32; +} + +static unsigned long str_to_hex(char *p) +{ + unsigned long hex = 0; + unsigned long length = strlen(p), shift = 0; + unsigned char dig = 0; + + str_low(p); + length = strlen(p); + + if (length == 0) + return 0; + + do { + dig = p[--length]; + dig = dig < 'a' ? (dig - '0') : (dig - 'a' + 0xa); + hex |= (dig << shift); + shift += 4; + } while (length); + return hex; +} + +static int get_dev_idx(int ifindex) +{ + int idx_dev = 0; + + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) && (idx_dev < device_num)); + idx_dev++) { + if (ifindex == bpctl_dev_arr[idx_dev].ifindex) + return idx_dev; + } + + return -1; +} + +static bpctl_dev_t *get_dev_idx_p(int ifindex) +{ + int idx_dev = 0; + + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) && (idx_dev < device_num)); + idx_dev++) { + if (ifindex == bpctl_dev_arr[idx_dev].ifindex) + return &bpctl_dev_arr[idx_dev]; + } + + return NULL; +} + +static void if_scan_init(void) +{ + int idx_dev = 0; + struct net_device *dev; + int ifindex; + //rcu_read_lock(); + //rtnl_lock(); + //rcu_read_lock(); +#if 1 +#if (LINUX_VERSION_CODE >= 0x020618) + for_each_netdev(&init_net, dev) +#elif (LINUX_VERSION_CODE >= 0x20616) + for_each_netdev(dev) +#else + for (dev = dev_base; dev; dev = dev->next) +#endif + { + + struct ethtool_drvinfo drvinfo; + // char *str=NULL; + char cbuf[32]; + char *buf = NULL; + char res[10]; + int i = 0; + int bus = 0, slot = 0, func = 0; + ifindex = dev->ifindex; + + memset(res, 0, 10); + memset(&drvinfo, 0, sizeof(struct ethtool_drvinfo)); + + if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) { + memset(&drvinfo, 0, sizeof(drvinfo)); + dev->ethtool_ops->get_drvinfo(dev, &drvinfo); + } else + continue; + if (!drvinfo.bus_info) + continue; + if (!strcmp(drvinfo.bus_info, "N/A")) + continue; + memcpy(&cbuf, drvinfo.bus_info, 32); + buf = &cbuf[0]; + + // while(*buf++){ + + /*if(*buf==':'){ + buf++; + break; + } */ + //} + while (*buf++ != ':') ; + for (i = 0; i < 10; i++, buf++) { + if (*buf == ':') + break; + res[i] = *buf; + + } + buf++; + bus = str_to_hex(res); + memset(res, 0, 10); + + for (i = 0; i < 10; i++, buf++) { + if (*buf == '.') + break; + res[i] = *buf; + + } + buf++; + slot = str_to_hex(res); + func = str_to_hex(buf); + idx_dev = get_dev_idx_bsf(bus, slot, func); + + if (idx_dev != -1) { + + bpctl_dev_arr[idx_dev].ifindex = ifindex; + bpctl_dev_arr[idx_dev].ndev = dev; + + } + + } +#endif + //rtnl_unlock(); + //rcu_read_unlock(); + +} + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)) +static int device_ioctl(struct inode *inode, /* see include/linux/fs.h */ + struct file *file, /* ditto */ + unsigned int ioctl_num, /* number and param for ioctl */ + unsigned long ioctl_param) +#else +static long device_ioctl(struct file *file, /* ditto */ + unsigned int ioctl_num, /* number and param for ioctl */ + unsigned long ioctl_param) +#endif +{ + struct bpctl_cmd bpctl_cmd; + int dev_idx = 0; + bpctl_dev_t *pbpctl_dev_out; + void __user *argp = (void __user *)ioctl_param; + int ret = 0; + unsigned long flags; + + static bpctl_dev_t *pbpctl_dev; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)) + //lock_kernel(); +#endif + lock_bpctl(); + //local_irq_save(flags); + /*if(!spin_trylock_irqsave(&bpvm_lock)){ + local_irq_restore(flags); + //unlock_bpctl(); + //unlock_kernel(); + return -1; + } */ + //spin_lock_irqsave(&bpvm_lock, flags); + +/* +* Switch according to the ioctl called +*/ + if (ioctl_num == IOCTL_TX_MSG(IF_SCAN)) { + if_scan_init(); + ret = SUCCESS; + goto bp_exit; + } + if (copy_from_user(&bpctl_cmd, argp, sizeof(struct bpctl_cmd))) { + + ret = -EFAULT; + goto bp_exit; + } + + if (ioctl_num == IOCTL_TX_MSG(GET_DEV_NUM)) { + bpctl_cmd.out_param[0] = device_num; + if (copy_to_user + (argp, (void *)&bpctl_cmd, sizeof(struct bpctl_cmd))) { + ret = -EFAULT; + goto bp_exit; + } + ret = SUCCESS; + goto bp_exit; + + } + //lock_bpctl(); + //preempt_disable(); + local_irq_save(flags); + if (!spin_trylock(&bpvm_lock)) { + local_irq_restore(flags); + unlock_bpctl(); + //unlock_kernel(); + return -1; + } +// preempt_disable(); + //rcu_read_lock(); +// spin_lock_irqsave(&bpvm_lock, flags); + if ((bpctl_cmd.in_param[5]) || + (bpctl_cmd.in_param[6]) || (bpctl_cmd.in_param[7])) + dev_idx = get_dev_idx_bsf(bpctl_cmd.in_param[5], + bpctl_cmd.in_param[6], + bpctl_cmd.in_param[7]); + else if (bpctl_cmd.in_param[1] == 0) + dev_idx = bpctl_cmd.in_param[0]; + else + dev_idx = get_dev_idx(bpctl_cmd.in_param[1]); + + if (dev_idx < 0 || dev_idx > device_num) { + //unlock_bpctl(); + //preempt_enable(); + ret = -EOPNOTSUPP; + //preempt_enable(); + //rcu_read_unlock(); + spin_unlock_irqrestore(&bpvm_lock, flags); + goto bp_exit; + } + + bpctl_cmd.out_param[0] = bpctl_dev_arr[dev_idx].bus; + bpctl_cmd.out_param[1] = bpctl_dev_arr[dev_idx].slot; + bpctl_cmd.out_param[2] = bpctl_dev_arr[dev_idx].func; + bpctl_cmd.out_param[3] = bpctl_dev_arr[dev_idx].ifindex; + + if ((bpctl_dev_arr[dev_idx].bp_10gb) + && (!(bpctl_dev_arr[dev_idx].ifindex))) { + printk("Please load network driver for %s adapter!\n", + bpctl_dev_arr[dev_idx].name); + bpctl_cmd.status = -1; + ret = SUCCESS; + /*preempt_enable(); */ + //rcu_read_unlock(); + spin_unlock_irqrestore(&bpvm_lock, flags); + goto bp_exit; + + } + if ((bpctl_dev_arr[dev_idx].bp_10gb) && (bpctl_dev_arr[dev_idx].ndev)) { + if (!(bpctl_dev_arr[dev_idx].ndev->flags & IFF_UP)) { + if (!(bpctl_dev_arr[dev_idx].ndev->flags & IFF_UP)) { + printk + ("Please bring up network interfaces for %s adapter!\n", + bpctl_dev_arr[dev_idx].name); + bpctl_cmd.status = -1; + ret = SUCCESS; + /*preempt_enable(); */ + //rcu_read_unlock(); + spin_unlock_irqrestore(&bpvm_lock, flags); + goto bp_exit; + } + + } + } + + if ((dev_idx < 0) || (dev_idx > device_num) + || (bpctl_dev_arr[dev_idx].pdev == NULL)) { + bpctl_cmd.status = -1; + goto bpcmd_exit; + } + + pbpctl_dev = &bpctl_dev_arr[dev_idx]; + + switch (ioctl_num) { + case IOCTL_TX_MSG(SET_BYPASS_PWOFF): + bpctl_cmd.status = + set_bypass_pwoff_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_BYPASS_PWOFF): + bpctl_cmd.status = get_bypass_pwoff_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_BYPASS_PWUP): + bpctl_cmd.status = + set_bypass_pwup_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_BYPASS_PWUP): + bpctl_cmd.status = get_bypass_pwup_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_BYPASS_WD): + bpctl_cmd.status = + set_bypass_wd_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_BYPASS_WD): + bpctl_cmd.status = + get_bypass_wd_fn(pbpctl_dev, (int *)&(bpctl_cmd.data[0])); + break; + + case IOCTL_TX_MSG(GET_WD_EXPIRE_TIME): + bpctl_cmd.status = + get_wd_expire_time_fn(pbpctl_dev, + (int *)&(bpctl_cmd.data[0])); + break; + + case IOCTL_TX_MSG(RESET_BYPASS_WD_TIMER): + bpctl_cmd.status = reset_bypass_wd_timer_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(GET_WD_SET_CAPS): + bpctl_cmd.status = get_wd_set_caps_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_STD_NIC): + bpctl_cmd.status = + set_std_nic_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_STD_NIC): + bpctl_cmd.status = get_std_nic_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_TAP): + bpctl_cmd.status = + set_tap_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_TAP): + bpctl_cmd.status = get_tap_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(GET_TAP_CHANGE): + bpctl_cmd.status = get_tap_change_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_DIS_TAP): + bpctl_cmd.status = + set_dis_tap_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_DIS_TAP): + bpctl_cmd.status = get_dis_tap_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_TAP_PWUP): + bpctl_cmd.status = + set_tap_pwup_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_TAP_PWUP): + bpctl_cmd.status = get_tap_pwup_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_WD_EXP_MODE): + bpctl_cmd.status = + set_wd_exp_mode_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_WD_EXP_MODE): + bpctl_cmd.status = get_wd_exp_mode_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(GET_DIS_BYPASS): + bpctl_cmd.status = get_dis_bypass_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_DIS_BYPASS): + bpctl_cmd.status = + set_dis_bypass_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_BYPASS_CHANGE): + bpctl_cmd.status = get_bypass_change_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(GET_BYPASS): + bpctl_cmd.status = get_bypass_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_BYPASS): + bpctl_cmd.status = + set_bypass_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_BYPASS_CAPS): + bpctl_cmd.status = get_bypass_caps_fn(pbpctl_dev); + /*preempt_enable(); */ + //rcu_read_unlock(); + spin_unlock_irqrestore(&bpvm_lock, flags); + if (copy_to_user + (argp, (void *)&bpctl_cmd, sizeof(struct bpctl_cmd))) { + //unlock_bpctl(); + //preempt_enable(); + ret = -EFAULT; + goto bp_exit; + } + goto bp_exit; + + case IOCTL_TX_MSG(GET_BYPASS_SLAVE): + bpctl_cmd.status = + get_bypass_slave_fn(pbpctl_dev, &pbpctl_dev_out); + if (bpctl_cmd.status == 1) { + bpctl_cmd.out_param[4] = pbpctl_dev_out->bus; + bpctl_cmd.out_param[5] = pbpctl_dev_out->slot; + bpctl_cmd.out_param[6] = pbpctl_dev_out->func; + bpctl_cmd.out_param[7] = pbpctl_dev_out->ifindex; + } + break; + + case IOCTL_TX_MSG(IS_BYPASS): + bpctl_cmd.status = is_bypass(pbpctl_dev); + break; + case IOCTL_TX_MSG(SET_TX): + bpctl_cmd.status = set_tx_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + case IOCTL_TX_MSG(GET_TX): + bpctl_cmd.status = get_tx_fn(pbpctl_dev); + break; + case IOCTL_TX_MSG(SET_WD_AUTORESET): + bpctl_cmd.status = + set_wd_autoreset_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + + break; + case IOCTL_TX_MSG(GET_WD_AUTORESET): + + bpctl_cmd.status = get_wd_autoreset_fn(pbpctl_dev); + break; + case IOCTL_TX_MSG(SET_DISC): + bpctl_cmd.status = + set_disc_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + case IOCTL_TX_MSG(GET_DISC): + bpctl_cmd.status = get_disc_fn(pbpctl_dev); + break; + case IOCTL_TX_MSG(GET_DISC_CHANGE): + bpctl_cmd.status = get_disc_change_fn(pbpctl_dev); + break; + case IOCTL_TX_MSG(SET_DIS_DISC): + bpctl_cmd.status = + set_dis_disc_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + case IOCTL_TX_MSG(GET_DIS_DISC): + bpctl_cmd.status = get_dis_disc_fn(pbpctl_dev); + break; + case IOCTL_TX_MSG(SET_DISC_PWUP): + bpctl_cmd.status = + set_disc_pwup_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + case IOCTL_TX_MSG(GET_DISC_PWUP): + bpctl_cmd.status = get_disc_pwup_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(GET_BYPASS_INFO): + + bpctl_cmd.status = + get_bypass_info_fn(pbpctl_dev, (char *)&bpctl_cmd.data, + (char *)&bpctl_cmd.out_param[4]); + break; + + case IOCTL_TX_MSG(SET_TPL): + bpctl_cmd.status = + set_tpl_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_TPL): + bpctl_cmd.status = get_tpl_fn(pbpctl_dev); + break; +//#ifdef PMC_FIX_FLAG + case IOCTL_TX_MSG(SET_BP_WAIT_AT_PWUP): + bpctl_cmd.status = + set_bp_wait_at_pwup_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_BP_WAIT_AT_PWUP): + bpctl_cmd.status = get_bp_wait_at_pwup_fn(pbpctl_dev); + break; + case IOCTL_TX_MSG(SET_BP_HW_RESET): + bpctl_cmd.status = + set_bp_hw_reset_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_BP_HW_RESET): + bpctl_cmd.status = get_bp_hw_reset_fn(pbpctl_dev); + break; +//#endif +#ifdef BP_SELF_TEST + case IOCTL_TX_MSG(SET_BP_SELF_TEST): + bpctl_cmd.status = + set_bp_self_test_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + + break; + case IOCTL_TX_MSG(GET_BP_SELF_TEST): + bpctl_cmd.status = get_bp_self_test_fn(pbpctl_dev); + break; + +#endif +#if 0 + case IOCTL_TX_MSG(SET_DISC_PORT): + bpctl_cmd.status = + set_disc_port_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_DISC_PORT): + bpctl_cmd.status = get_disc_port_fn(pbpctl_dev); + break; + + case IOCTL_TX_MSG(SET_DISC_PORT_PWUP): + bpctl_cmd.status = + set_disc_port_pwup_fn(pbpctl_dev, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_DISC_PORT_PWUP): + bpctl_cmd.status = get_disc_port_pwup_fn(pbpctl_dev); + break; +#endif + case IOCTL_TX_MSG(SET_BP_FORCE_LINK): + bpctl_cmd.status = + set_bp_force_link_fn(dev_idx, bpctl_cmd.in_param[2]); + break; + + case IOCTL_TX_MSG(GET_BP_FORCE_LINK): + bpctl_cmd.status = get_bp_force_link_fn(dev_idx); + break; + + default: + // unlock_bpctl(); + + ret = -EOPNOTSUPP; + /*preempt_enable(); */ + //rcu_read_unlock(); + spin_unlock_irqrestore(&bpvm_lock, flags); + goto bp_exit; + } + //unlock_bpctl(); + /*preempt_enable(); */ + bpcmd_exit: + //rcu_read_unlock(); + spin_unlock_irqrestore(&bpvm_lock, flags); + if (copy_to_user(argp, (void *)&bpctl_cmd, sizeof(struct bpctl_cmd))) + ret = -EFAULT; + ret = SUCCESS; + bp_exit: +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)) + //unlock_kernel(); +#endif + //spin_unlock_irqrestore(&bpvm_lock, flags); + unlock_bpctl(); + //unlock_kernel(); + return ret; +} + +struct file_operations Fops = { + .owner = THIS_MODULE, +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)) + .ioctl = device_ioctl, +#else + .unlocked_ioctl = device_ioctl, +#endif + + .open = device_open, + .release = device_release, /* a.k.a. close */ +}; + +#ifndef PCI_DEVICE +#define PCI_DEVICE(vend,dev) \ + .vendor = (vend), .device = (dev), \ + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID +#endif + +#define SILICOM_E1000BP_ETHERNET_DEVICE(device_id) {\ + PCI_DEVICE(SILICOM_VID, device_id)} + +typedef enum { + PXG2BPFI, + PXG2BPFIL, + PXG2BPFILX, + PXG2BPFILLX, + PXGBPI, + PXGBPIG, + PXG2TBFI, + PXG4BPI, + PXG4BPFI, + PEG4BPI, + PEG2BPI, + PEG4BPIN, + PEG2BPFI, + PEG2BPFILX, + PMCXG2BPFI, + PMCXG2BPFIN, + PEG4BPII, + PEG4BPFII, + PXG4BPFILX, + PMCXG2BPIN, + PMCXG4BPIN, + PXG2BISC1, + PEG2TBFI, + PXG2TBI, + PXG4BPFID, + PEG4BPFI, + PEG4BPIPT, + PXG6BPI, + PEG4BPIL, + PMCXG2BPIN2, + PMCXG4BPIN2, + PMCX2BPI, + PEG2BPFID, + PEG2BPFIDLX, + PMCX4BPI, + MEG2BPFILN, + MEG2BPFINX, + PEG4BPFILX, + PE10G2BPISR, + PE10G2BPILR, + MHIO8AD, + PE10G2BPICX4, + PEG2BPI5, + PEG6BPI, + PEG4BPFI5, + PEG4BPFI5LX, + MEG2BPFILXLN, + PEG2BPIX1, + MEG2BPFILXNX, + XE10G2BPIT, + XE10G2BPICX4, + XE10G2BPISR, + XE10G2BPILR, + PEG4BPIIO, + XE10G2BPIXR, + PE10GDBISR, + PE10GDBILR, + PEG2BISC6, + PEG6BPIFC, + PE10G2BPTCX4, + PE10G2BPTSR, + PE10G2BPTLR, + PE10G2BPTT, + PEG4BPI6, + PEG4BPFI6, + PEG4BPFI6LX, + PEG4BPFI6ZX, + PEG2BPI6, + PEG2BPFI6, + PEG2BPFI6LX, + PEG2BPFI6ZX, + PEG2BPFI6FLXM, + PEG4BPI6FC, + PEG4BPFI6FC, + PEG4BPFI6FCLX, + PEG4BPFI6FCZX, + PEG6BPI6, + PEG2BPI6SC6, + MEG2BPI6, + XEG2BPI6, + MEG4BPI6, + PEG2BPFI5, + PEG2BPFI5LX, + PXEG4BPFI, + M1EG2BPI6, + M1EG2BPFI6, + M1EG2BPFI6LX, + M1EG2BPFI6ZX, + M1EG4BPI6, + M1EG4BPFI6, + M1EG4BPFI6LX, + M1EG4BPFI6ZX, + M1EG6BPI6, + M1E2G4BPi80, + M1E2G4BPFi80, + M1E2G4BPFi80LX, + M1E2G4BPFi80ZX, + PE210G2SPI9, + M1E10G2BPI9CX4, + M1E10G2BPI9SR, + M1E10G2BPI9LR, + M1E10G2BPI9T, + PE210G2BPI9CX4, + PE210G2BPI9SR, + PE210G2BPI9LR, + PE210G2BPI9T, + M2EG2BPFI6, + M2EG2BPFI6LX, + M2EG2BPFI6ZX, + M2EG4BPI6, + M2EG4BPFI6, + M2EG4BPFI6LX, + M2EG4BPFI6ZX, + M2EG6BPI6, + PEG2DBI6, + PEG2DBFI6, + PEG2DBFI6LX, + PEG2DBFI6ZX, + PE2G4BPi80, + PE2G4BPFi80, + PE2G4BPFi80LX, + PE2G4BPFi80ZX, + PE2G4BPi80L, + M6E2G8BPi80A, + + PE2G2BPi35, + PAC1200BPi35, + PE2G2BPFi35, + PE2G2BPFi35LX, + PE2G2BPFi35ZX, + PE2G4BPi35, + PE2G4BPi35L, + PE2G4BPFi35, + PE2G4BPFi35LX, + PE2G4BPFi35ZX, + + PE2G6BPi35, + PE2G6BPi35CX, + + PE2G2BPi80, + PE2G2BPFi80, + PE2G2BPFi80LX, + PE2G2BPFi80ZX, + M2E10G2BPI9CX4, + M2E10G2BPI9SR, + M2E10G2BPI9LR, + M2E10G2BPI9T, + M6E2G8BPi80, + PE210G2DBi9SR, + PE210G2DBi9SRRB, + PE210G2DBi9LR, + PE210G2DBi9LRRB, + PE310G4DBi940SR, + PE310G4BPi9T, + PE310G4BPi9SR, + PE310G4BPi9LR, + PE210G2BPi40, +} board_t; + +typedef struct _bpmod_info_t { + unsigned int vendor; + unsigned int device; + unsigned int subvendor; + unsigned int subdevice; + unsigned int index; + char *bp_name; + +} bpmod_info_t; + +typedef struct _dev_desc { + char *name; +} dev_desc_t; + +dev_desc_t dev_desc[] = { + {"Silicom Bypass PXG2BPFI-SD series adapter"}, + {"Silicom Bypass PXG2BPFIL-SD series adapter"}, + {"Silicom Bypass PXG2BPFILX-SD series adapter"}, + {"Silicom Bypass PXG2BPFILLX-SD series adapter"}, + {"Silicom Bypass PXG2BPI-SD series adapter"}, + {"Silicom Bypass PXG2BPIG-SD series adapter"}, + {"Silicom Bypass PXG2TBFI-SD series adapter"}, + {"Silicom Bypass PXG4BPI-SD series adapter"}, + {"Silicom Bypass PXG4BPFI-SD series adapter"}, + {"Silicom Bypass PEG4BPI-SD series adapter"}, + {"Silicom Bypass PEG2BPI-SD series adapter"}, + {"Silicom Bypass PEG4BPIN-SD series adapter"}, + {"Silicom Bypass PEG2BPFI-SD series adapter"}, + {"Silicom Bypass PEG2BPFI-LX-SD series adapter"}, + {"Silicom Bypass PMCX2BPFI-SD series adapter"}, + {"Silicom Bypass PMCX2BPFI-N series adapter"}, + {"Intel Bypass PEG2BPII series adapter"}, + {"Intel Bypass PEG2BPFII series adapter"}, + {"Silicom Bypass PXG4BPFILX-SD series adapter"}, + {"Silicom Bypass PMCX2BPI-N series adapter"}, + {"Silicom Bypass PMCX4BPI-N series adapter"}, + {"Silicom Bypass PXG2BISC1-SD series adapter"}, + {"Silicom Bypass PEG2TBFI-SD series adapter"}, + {"Silicom Bypass PXG2TBI-SD series adapter"}, + {"Silicom Bypass PXG4BPFID-SD series adapter"}, + {"Silicom Bypass PEG4BPFI-SD series adapter"}, + {"Silicom Bypass PEG4BPIPT-SD series adapter"}, + {"Silicom Bypass PXG6BPI-SD series adapter"}, + {"Silicom Bypass PEG4BPIL-SD series adapter"}, + {"Silicom Bypass PMCX2BPI-N2 series adapter"}, + {"Silicom Bypass PMCX4BPI-N2 series adapter"}, + {"Silicom Bypass PMCX2BPI-SD series adapter"}, + {"Silicom Bypass PEG2BPFID-SD series adapter"}, + {"Silicom Bypass PEG2BPFIDLX-SD series adapter"}, + {"Silicom Bypass PMCX4BPI-SD series adapter"}, + {"Silicom Bypass MEG2BPFILN-SD series adapter"}, + {"Silicom Bypass MEG2BPFINX-SD series adapter"}, + {"Silicom Bypass PEG4BPFILX-SD series adapter"}, + {"Silicom Bypass PE10G2BPISR-SD series adapter"}, + {"Silicom Bypass PE10G2BPILR-SD series adapter"}, + {"Silicom Bypass MHIO8AD-SD series adapter"}, + {"Silicom Bypass PE10G2BPICX4-SD series adapter"}, + {"Silicom Bypass PEG2BPI5-SD series adapter"}, + {"Silicom Bypass PEG6BPI5-SD series adapter"}, + {"Silicom Bypass PEG4BPFI5-SD series adapter"}, + {"Silicom Bypass PEG4BPFI5LX-SD series adapter"}, + {"Silicom Bypass MEG2BPFILXLN-SD series adapter"}, + {"Silicom Bypass PEG2BPIX1-SD series adapter"}, + {"Silicom Bypass MEG2BPFILXNX-SD series adapter"}, + {"Silicom Bypass XE10G2BPIT-SD series adapter"}, + {"Silicom Bypass XE10G2BPICX4-SD series adapter"}, + {"Silicom Bypass XE10G2BPISR-SD series adapter"}, + {"Silicom Bypass XE10G2BPILR-SD series adapter"}, + {"Intel Bypass PEG2BPFII0 series adapter"}, + {"Silicom Bypass XE10G2BPIXR series adapter"}, + {"Silicom Bypass PE10G2DBISR series adapter"}, + {"Silicom Bypass PEG2BI5SC6 series adapter"}, + {"Silicom Bypass PEG6BPI5FC series adapter"}, + + {"Silicom Bypass PE10G2BPTCX4 series adapter"}, + {"Silicom Bypass PE10G2BPTSR series adapter"}, + {"Silicom Bypass PE10G2BPTLR series adapter"}, + {"Silicom Bypass PE10G2BPTT series adapter"}, + {"Silicom Bypass PEG4BPI6 series adapter"}, + {"Silicom Bypass PEG4BPFI6 series adapter"}, + {"Silicom Bypass PEG4BPFI6LX series adapter"}, + {"Silicom Bypass PEG4BPFI6ZX series adapter"}, + {"Silicom Bypass PEG2BPI6 series adapter"}, + {"Silicom Bypass PEG2BPFI6 series adapter"}, + {"Silicom Bypass PEG2BPFI6LX series adapter"}, + {"Silicom Bypass PEG2BPFI6ZX series adapter"}, + {"Silicom Bypass PEG2BPFI6FLXM series adapter"}, + {"Silicom Bypass PEG4BPI6FC series adapter"}, + {"Silicom Bypass PEG4BPFI6FC series adapter"}, + {"Silicom Bypass PEG4BPFI6FCLX series adapter"}, + {"Silicom Bypass PEG4BPFI6FCZX series adapter"}, + {"Silicom Bypass PEG6BPI6 series adapter"}, + {"Silicom Bypass PEG2BPI6SC6 series adapter"}, + {"Silicom Bypass MEG2BPI6 series adapter"}, + {"Silicom Bypass XEG2BPI6 series adapter"}, + {"Silicom Bypass MEG4BPI6 series adapter"}, + {"Silicom Bypass PEG2BPFI5-SD series adapter"}, + {"Silicom Bypass PEG2BPFI5LX-SD series adapter"}, + {"Silicom Bypass PXEG4BPFI-SD series adapter"}, + {"Silicom Bypass MxEG2BPI6 series adapter"}, + {"Silicom Bypass MxEG2BPFI6 series adapter"}, + {"Silicom Bypass MxEG2BPFI6LX series adapter"}, + {"Silicom Bypass MxEG2BPFI6ZX series adapter"}, + {"Silicom Bypass MxEG4BPI6 series adapter"}, + {"Silicom Bypass MxEG4BPFI6 series adapter"}, + {"Silicom Bypass MxEG4BPFI6LX series adapter"}, + {"Silicom Bypass MxEG4BPFI6ZX series adapter"}, + {"Silicom Bypass MxEG6BPI6 series adapter"}, + {"Silicom Bypass MxE2G4BPi80 series adapter"}, + {"Silicom Bypass MxE2G4BPFi80 series adapter"}, + {"Silicom Bypass MxE2G4BPFi80LX series adapter"}, + {"Silicom Bypass MxE2G4BPFi80ZX series adapter"}, + + {"Silicom Bypass PE210G2SPI9 series adapter"}, + + {"Silicom Bypass MxE210G2BPI9CX4 series adapter"}, + {"Silicom Bypass MxE210G2BPI9SR series adapter"}, + {"Silicom Bypass MxE210G2BPI9LR series adapter"}, + {"Silicom Bypass MxE210G2BPI9T series adapter"}, + + {"Silicom Bypass PE210G2BPI9CX4 series adapter"}, + {"Silicom Bypass PE210G2BPI9SR series adapter"}, + {"Silicom Bypass PE210G2BPI9LR series adapter"}, + {"Silicom Bypass PE210G2BPI9T series adapter"}, + + {"Silicom Bypass M2EG2BPFI6 series adapter"}, + {"Silicom Bypass M2EG2BPFI6LX series adapter"}, + {"Silicom Bypass M2EG2BPFI6ZX series adapter"}, + {"Silicom Bypass M2EG4BPI6 series adapter"}, + {"Silicom Bypass M2EG4BPFI6 series adapter"}, + {"Silicom Bypass M2EG4BPFI6LX series adapter"}, + {"Silicom Bypass M2EG4BPFI6ZX series adapter"}, + {"Silicom Bypass M2EG6BPI6 series adapter"}, + + {"Silicom Bypass PEG2DBI6 series adapter"}, + {"Silicom Bypass PEG2DBFI6 series adapter"}, + {"Silicom Bypass PEG2DBFI6LX series adapter"}, + {"Silicom Bypass PEG2DBFI6ZX series adapter"}, + + {"Silicom Bypass PE2G4BPi80 series adapter"}, + {"Silicom Bypass PE2G4BPFi80 series adapter"}, + {"Silicom Bypass PE2G4BPFi80LX series adapter"}, + {"Silicom Bypass PE2G4BPFi80ZX series adapter"}, + + {"Silicom Bypass PE2G4BPi80L series adapter"}, + {"Silicom Bypass MxE2G8BPi80A series adapter"}, + + {"Silicom Bypass PE2G2BPi35 series adapter"}, + {"Silicom Bypass PAC1200BPi35 series adapter"}, + {"Silicom Bypass PE2G2BPFi35 series adapter"}, + {"Silicom Bypass PE2G2BPFi35LX series adapter"}, + {"Silicom Bypass PE2G2BPFi35ZX series adapter"}, + + {"Silicom Bypass PE2G4BPi35 series adapter"}, + {"Silicom Bypass PE2G4BPi35L series adapter"}, + {"Silicom Bypass PE2G4BPFi35 series adapter"}, + {"Silicom Bypass PE2G4BPFi35LX series adapter"}, + {"Silicom Bypass PE2G4BPFi35ZX series adapter"}, + + {"Silicom Bypass PE2G6BPi35 series adapter"}, + {"Silicom Bypass PE2G6BPi35CX series adapter"}, + + {"Silicom Bypass PE2G2BPi80 series adapter"}, + {"Silicom Bypass PE2G2BPFi80 series adapter"}, + {"Silicom Bypass PE2G2BPFi80LX series adapter"}, + {"Silicom Bypass PE2G2BPFi80ZX series adapter"}, + + {"Silicom Bypass M2E10G2BPI9CX4 series adapter"}, + {"Silicom Bypass M2E10G2BPI9SR series adapter"}, + {"Silicom Bypass M2E10G2BPI9LR series adapter"}, + {"Silicom Bypass M2E10G2BPI9T series adapter"}, + {"Silicom Bypass MxE2G8BPi80 series adapter"}, + {"Silicom Bypass PE210G2DBi9SR series adapter"}, + {"Silicom Bypass PE210G2DBi9SRRB series adapter"}, + {"Silicom Bypass PE210G2DBi9LR series adapter"}, + {"Silicom Bypass PE210G2DBi9LRRB series adapter"}, + {"Silicom Bypass PE310G4DBi9-SR series adapter"}, + {"Silicom Bypass PE310G4BPi9T series adapter"}, + {"Silicom Bypass PE310G4BPi9SR series adapter"}, + {"Silicom Bypass PE310G4BPi9LR series adapter"}, + {"Silicom Bypass PE210G2BPi40T series adapter"}, + {0}, +}; + +static bpmod_info_t tx_ctl_pci_tbl[] = { + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PXG2BPFI_SSID, PXG2BPFI, + "PXG2BPFI-SD"}, + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PXG2BPFIL_SSID, PXG2BPFIL, + "PXG2BPFIL-SD"}, + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PXG2BPFILX_SSID, PXG2BPFILX, + "PXG2BPFILX-SD"}, + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PXG2BPFILLX_SSID, PXG2BPFILLX, + "PXG2BPFILLXSD"}, + {0x8086, 0x1010, SILICOM_SVID, SILICOM_PXGBPI_SSID, PXGBPI, + "PXG2BPI-SD"}, + {0x8086, 0x1079, SILICOM_SVID, SILICOM_PXGBPIG_SSID, PXGBPIG, + "PXG2BPIG-SD"}, + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PXG2TBFI_SSID, PXG2TBFI, + "PXG2TBFI-SD"}, + {0x8086, 0x1079, SILICOM_SVID, SILICOM_PXG4BPI_SSID, PXG4BPI, + "PXG4BPI-SD"}, + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PXG4BPFI_SSID, PXG4BPFI, + "PXG4BPFI-SD"}, + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PXG4BPFILX_SSID, PXG4BPFILX, + "PXG4BPFILX-SD"}, + {0x8086, 0x1079, SILICOM_SVID, SILICOM_PEG4BPI_SSID, PEG4BPI, + "PEXG4BPI-SD"}, + {0x8086, 0x105e, SILICOM_SVID, SILICOM_PEG2BPI_SSID, PEG2BPI, + "PEG2BPI-SD"}, + {0x8086, 0x105e, SILICOM_SVID, SILICOM_PEG4BPIN_SSID, PEG4BPIN, + "PEG4BPI-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_PEG2BPFI_SSID, PEG2BPFI, + "PEG2BPFI-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_PEG2BPFILX_SSID, PEG2BPFILX, + "PEG2BPFILX-SD"}, + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PMCXG2BPFI_SSID, PMCXG2BPFI, + "PMCX2BPFI-SD"}, + {0x8086, 0x107a, NOKIA_PMCXG2BPFIN_SVID, NOKIA_PMCXG2BPFIN_SSID, + PMCXG2BPFIN, "PMCX2BPFI-N"}, + {0x8086, INTEL_PEG4BPII_PID, 0x8086, INTEL_PEG4BPII_SSID, PEG4BPII, + "PEG4BPII"}, + {0x8086, INTEL_PEG4BPIIO_PID, 0x8086, INTEL_PEG4BPIIO_SSID, PEG4BPIIO, + "PEG4BPII0"}, + {0x8086, INTEL_PEG4BPFII_PID, 0x8086, INTEL_PEG4BPFII_SSID, PEG4BPFII, + "PEG4BPFII"}, + {0x8086, 0x1079, NOKIA_PMCXG2BPFIN_SVID, NOKIA_PMCXG2BPIN_SSID, + PMCXG2BPIN, "PMCX2BPI-N"}, + {0x8086, 0x1079, NOKIA_PMCXG2BPFIN_SVID, NOKIA_PMCXG4BPIN_SSID, + PMCXG4BPIN, "PMCX4BPI-N"}, + {0x8086, 0x1079, SILICOM_SVID, SILICOM_PXG2BISC1_SSID, PXG2BISC1, + "PXG2BISC1-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_PEG2TBFI_SSID, PEG2TBFI, + "PEG2TBFI-SD"}, + {0x8086, 0x1079, SILICOM_SVID, SILICOM_PXG2TBI_SSID, PXG2TBI, + "PXG2TBI-SD"}, + {0x8086, 0x107a, SILICOM_SVID, SILICOM_PXG4BPFID_SSID, PXG4BPFID, + "PXG4BPFID-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_PEG4BPFI_SSID, PEG4BPFI, + "PEG4BPFI-SD"}, + {0x8086, 0x105e, SILICOM_SVID, SILICOM_PEG4BPIPT_SSID, PEG4BPIPT, + "PEG4BPIPT-SD"}, + {0x8086, 0x1079, SILICOM_SVID, SILICOM_PXG6BPI_SSID, PXG6BPI, + "PXG6BPI-SD"}, + {0x8086, 0x10a7, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPIL_SSID /*PCI_ANY_ID */ , PEG4BPIL, "PEG4BPIL-SD"}, + {0x8086, 0x1079, NOKIA_PMCXG2BPFIN_SVID, NOKIA_PMCXG2BPIN2_SSID, + PMCXG2BPIN2, "PMCX2BPI-N2"}, + {0x8086, 0x1079, NOKIA_PMCXG2BPFIN_SVID, NOKIA_PMCXG4BPIN2_SSID, + PMCXG4BPIN2, "PMCX4BPI-N2"}, + {0x8086, 0x1079, SILICOM_SVID, SILICOM_PMCX2BPI_SSID, PMCX2BPI, + "PMCX2BPI-SD"}, + {0x8086, 0x1079, SILICOM_SVID, SILICOM_PMCX4BPI_SSID, PMCX4BPI, + "PMCX4BPI-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_PEG2BPFID_SSID, PEG2BPFID, + "PEG2BPFID-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_PEG2BPFIDLX_SSID, PEG2BPFIDLX, + "PEG2BPFIDLXSD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_MEG2BPFILN_SSID, MEG2BPFILN, + "MEG2BPFILN-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_MEG2BPFINX_SSID, MEG2BPFINX, + "MEG2BPFINX-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_PEG4BPFILX_SSID, PEG4BPFILX, + "PEG4BPFILX-SD"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID, SILICOM_PE10G2BPISR_SSID, + PE10G2BPISR, "PE10G2BPISR"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID, SILICOM_PE10G2BPILR_SSID, + PE10G2BPILR, "PE10G2BPILR"}, + {0x8086, 0x10a9, SILICOM_SVID, SILICOM_MHIO8AD_SSID, MHIO8AD, + "MHIO8AD-SD"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID, SILICOM_PE10G2BPICX4_SSID, + PE10G2BPISR, "PE10G2BPICX4"}, + {0x8086, 0x10a7, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BPI5_SSID /*PCI_ANY_ID */ , PEG2BPI5, "PEG2BPI5-SD"}, + {0x8086, 0x10a7, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG6BPI_SSID /*PCI_ANY_ID */ , PEG6BPI, "PEG6BPI5"}, + {0x8086, 0x10a9, SILICOM_SVID /*PCI_ANY_ID */ , SILICOM_PEG4BPFI5_SSID, + PEG4BPFI5, "PEG4BPFI5"}, + {0x8086, 0x10a9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPFI5LX_SSID, PEG4BPFI5LX, "PEG4BPFI5LX"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_MEG2BPFILXLN_SSID, MEG2BPFILXLN, + "MEG2BPFILXLN"}, + {0x8086, 0x105e, SILICOM_SVID, SILICOM_PEG2BPIX1_SSID, PEG2BPIX1, + "PEG2BPIX1-SD"}, + {0x8086, 0x105f, SILICOM_SVID, SILICOM_MEG2BPFILXNX_SSID, MEG2BPFILXNX, + "MEG2BPFILXNX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID, SILICOM_XE10G2BPIT_SSID, XE10G2BPIT, + "XE10G2BPIT"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID, SILICOM_XE10G2BPICX4_SSID, + XE10G2BPICX4, "XE10G2BPICX4"}, + {0x8086, 0x10C6, SILICOM_SVID, SILICOM_XE10G2BPISR_SSID, XE10G2BPISR, + "XE10G2BPISR"}, + {0x8086, 0x10C6, SILICOM_SVID, SILICOM_XE10G2BPILR_SSID, XE10G2BPILR, + "XE10G2BPILR"}, + {0x8086, 0x10C6, NOKIA_XE10G2BPIXR_SVID, NOKIA_XE10G2BPIXR_SSID, + XE10G2BPIXR, "XE10G2BPIXR"}, + {0x8086, 0x10C6, SILICOM_SVID, SILICOM_PE10GDBISR_SSID, PE10GDBISR, + "PE10G2DBISR"}, + {0x8086, 0x10C6, SILICOM_SVID, SILICOM_PE10GDBILR_SSID, PE10GDBILR, + "PE10G2DBILR"}, + {0x8086, 0x10a7, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BISC6_SSID /*PCI_ANY_ID */ , PEG2BISC6, "PEG2BI5SC6"}, + {0x8086, 0x10a7, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG6BPIFC_SSID /*PCI_ANY_ID */ , PEG6BPIFC, "PEG6BPI5FC"}, + + {BROADCOM_VID, BROADCOM_PE10G2_PID, SILICOM_SVID, + SILICOM_PE10G2BPTCX4_SSID, PE10G2BPTCX4, "PE10G2BPTCX4"}, + {BROADCOM_VID, BROADCOM_PE10G2_PID, SILICOM_SVID, + SILICOM_PE10G2BPTSR_SSID, PE10G2BPTSR, "PE10G2BPTSR"}, + {BROADCOM_VID, BROADCOM_PE10G2_PID, SILICOM_SVID, + SILICOM_PE10G2BPTLR_SSID, PE10G2BPTLR, "PE10G2BPTLR"}, + {BROADCOM_VID, BROADCOM_PE10G2_PID, SILICOM_SVID, + SILICOM_PE10G2BPTT_SSID, PE10G2BPTT, "PE10G2BPTT"}, + + //{BROADCOM_VID, BROADCOM_PE10G2_PID, PCI_ANY_ID, PCI_ANY_ID, PE10G2BPTCX4, "PE10G2BPTCX4"}, + + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPI6_SSID /*PCI_ANY_ID */ , PEG4BPI6, "PEG4BPI6"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPFI6_SSID /*PCI_ANY_ID */ , PEG4BPFI6, "PEG4BPFI6"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPFI6LX_SSID /*PCI_ANY_ID */ , PEG4BPFI6LX, "PEG4BPFI6LX"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPFI6ZX_SSID /*PCI_ANY_ID */ , PEG4BPFI6ZX, "PEG4BPFI6ZX"}, + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BPI6_SSID /*PCI_ANY_ID */ , PEG2BPI6, "PEG2BPI6"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BPFI6_SSID /*PCI_ANY_ID */ , PEG2BPFI6, "PEG2BPFI6"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BPFI6LX_SSID /*PCI_ANY_ID */ , PEG2BPFI6LX, "PEG2BPFI6LX"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BPFI6ZX_SSID /*PCI_ANY_ID */ , PEG2BPFI6ZX, "PEG2BPFI6ZX"}, + {0x8086, 0x10e7, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BPFI6FLXM_SSID /*PCI_ANY_ID */ , PEG2BPFI6FLXM, + "PEG2BPFI6FLXM"}, + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPI6FC_SSID /*PCI_ANY_ID */ , PEG4BPI6FC, "PEG4BPI6FC"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPFI6FC_SSID /*PCI_ANY_ID */ , PEG4BPFI6FC, "PEG4BPFI6FC"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPFI6FCLX_SSID /*PCI_ANY_ID */ , PEG4BPFI6FCLX, + "PEG4BPFI6FCLX"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG4BPFI6FCZX_SSID /*PCI_ANY_ID */ , PEG4BPFI6FCZX, + "PEG4BPFI6FCZX"}, + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG6BPI6_SSID /*PCI_ANY_ID */ , PEG6BPI6, "PEG6BPI6"}, + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BPI6SC6_SSID /*PCI_ANY_ID */ , PEG2BPI6SC6, + "PEG6BPI62SC6"}, + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_MEG2BPI6_SSID /*PCI_ANY_ID */ , MEG2BPI6, "MEG2BPI6"}, + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_XEG2BPI6_SSID /*PCI_ANY_ID */ , XEG2BPI6, "XEG2BPI6"}, + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_MEG4BPI6_SSID /*PCI_ANY_ID */ , MEG4BPI6, "MEG4BPI6"}, + + {0x8086, 0x10a9, SILICOM_SVID /*PCI_ANY_ID */ , SILICOM_PEG2BPFI5_SSID, + PEG2BPFI5, "PEG2BPFI5"}, + {0x8086, 0x10a9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2BPFI5LX_SSID, PEG2BPFI5LX, "PEG2BPFI5LX"}, + + {0x8086, 0x105f, SILICOM_SVID, SILICOM_PXEG4BPFI_SSID, PXEG4BPFI, + "PXEG4BPFI-SD"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG2BPI6_SSID /*PCI_ANY_ID */ , M1EG2BPI6, "MxEG2BPI6"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG2BPFI6_SSID /*PCI_ANY_ID */ , M1EG2BPFI6, "MxEG2BPFI6"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG2BPFI6LX_SSID /*PCI_ANY_ID */ , M1EG2BPFI6LX, + "MxEG2BPFI6LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG2BPFI6ZX_SSID /*PCI_ANY_ID */ , M1EG2BPFI6ZX, + "MxEG2BPFI6ZX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG4BPI6_SSID /*PCI_ANY_ID */ , M1EG4BPI6, "MxEG4BPI6"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG4BPFI6_SSID /*PCI_ANY_ID */ , M1EG4BPFI6, "MxEG4BPFI6"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG4BPFI6LX_SSID /*PCI_ANY_ID */ , M1EG4BPFI6LX, + "MxEG4BPFI6LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG4BPFI6ZX_SSID /*PCI_ANY_ID */ , M1EG4BPFI6ZX, + "MxEG4BPFI6ZX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1EG6BPI6_SSID /*PCI_ANY_ID */ , M1EG6BPI6, "MxEG6BPI6"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1E2G4BPi80_SSID /*PCI_ANY_ID */ , M1E2G4BPi80, "MxE2G4BPi80"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1E2G4BPFi80_SSID /*PCI_ANY_ID */ , M1E2G4BPFi80, + "MxE2G4BPFi80"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1E2G4BPFi80LX_SSID /*PCI_ANY_ID */ , M1E2G4BPFi80LX, + "MxE2G4BPFi80LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1E2G4BPFi80ZX_SSID /*PCI_ANY_ID */ , M1E2G4BPFi80ZX, + "MxE2G4BPFi80ZX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2EG2BPFI6_SSID /*PCI_ANY_ID */ , M2EG2BPFI6, "M2EG2BPFI6"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2EG2BPFI6LX_SSID /*PCI_ANY_ID */ , M2EG2BPFI6LX, + "M2EG2BPFI6LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2EG2BPFI6ZX_SSID /*PCI_ANY_ID */ , M2EG2BPFI6ZX, + "M2EG2BPFI6ZX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2EG4BPI6_SSID /*PCI_ANY_ID */ , M2EG4BPI6, "M2EG4BPI6"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2EG4BPFI6_SSID /*PCI_ANY_ID */ , M2EG4BPFI6, "M2EG4BPFI6"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2EG4BPFI6LX_SSID /*PCI_ANY_ID */ , M2EG4BPFI6LX, + "M2EG4BPFI6LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2EG4BPFI6ZX_SSID /*PCI_ANY_ID */ , M2EG4BPFI6ZX, + "M2EG4BPFI6ZX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2EG6BPI6_SSID /*PCI_ANY_ID */ , M2EG6BPI6, "M2EG6BPI6"}, + + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2DBI6_SSID /*PCI_ANY_ID */ , PEG2DBI6, "PEG2DBI6"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2DBFI6_SSID /*PCI_ANY_ID */ , PEG2DBFI6, "PEG2DBFI6"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2DBFI6LX_SSID /*PCI_ANY_ID */ , PEG2DBFI6LX, "PEG2DBFI6LX"}, + {0x8086, 0x10e6, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PEG2DBFI6ZX_SSID /*PCI_ANY_ID */ , PEG2DBFI6ZX, "PEG2DBFI6ZX"}, + + {0x8086, 0x10F9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE210G2DBi9SR_SSID, PE210G2DBi9SR, "PE210G2DBi9SR"}, + //{0x8086, 0x10F9, SILICOM_SVID /*PCI_ANY_ID*/, SILICOM_PE210G2DBi9SRRB_SSID , PE210G2DBi9SRRB, "PE210G2DBi9SRRB"}, + {0x8086, 0x10F9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE210G2DBi9LR_SSID, PE210G2DBi9LR, "PE210G2DBi9LR"}, + // {0x8086, 0x10F9, SILICOM_SVID /*PCI_ANY_ID*/, SILICOM_PE210G2DBi9LRRB_SSID , PE210G2DBi9LRRB, "PE210G2DBi9LRRB"}, + {0x8086, 0x10F9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE310G4DBi940SR_SSID, PE310G4DBi940SR, "PE310G4DBi9SR"}, + + {0x8086, 0x10Fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE310G4BPi9T_SSID, PE310G4BPi9T, "PE310G4BPi9T"}, + {0x8086, 0x10Fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE310G4BPi9SR_SSID, PE310G4BPi9SR, "PE310G4BPi9SR"}, + {0x8086, 0x10Fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE310G4BPi9LR_SSID, PE310G4BPi9LR, "PE310G4BPi9LR"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPi80_SSID /*PCI_ANY_ID */ , PE2G4BPi80, "PE2G4BPi80"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPFi80_SSID /*PCI_ANY_ID */ , PE2G4BPFi80, "PE2G4BPFi80"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPFi80LX_SSID /*PCI_ANY_ID */ , PE2G4BPFi80LX, + "PE2G4BPFi80LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPFi80ZX_SSID /*PCI_ANY_ID */ , PE2G4BPFi80ZX, + "PE2G4BPFi80ZX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPi80L_SSID /*PCI_ANY_ID */ , PE2G4BPi80L, "PE2G4BPi80L"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M6E2G8BPi80A_SSID /*PCI_ANY_ID */ , M6E2G8BPi80A, + "MxE2G8BPi80A"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G2BPi35_SSID /*PCI_ANY_ID */ , PE2G2BPi35, "PE2G2BPi35"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PAC1200BPi35_SSID /*PCI_ANY_ID */ , PAC1200BPi35, + "PAC1200BPi35"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G2BPFi35_SSID /*PCI_ANY_ID */ , PE2G2BPFi35, "PE2G2BPFi35"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G2BPFi35LX_SSID /*PCI_ANY_ID */ , PE2G2BPFi35LX, + "PE2G2BPFi35LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G2BPFi35ZX_SSID /*PCI_ANY_ID */ , PE2G2BPFi35ZX, + "PE2G2BPFi35ZX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPi35_SSID /*PCI_ANY_ID */ , PE2G4BPi35, "PE2G4BPi35"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPi35L_SSID /*PCI_ANY_ID */ , PE2G4BPi35L, "PE2G4BPi35L"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPFi35_SSID /*PCI_ANY_ID */ , PE2G4BPFi35, "PE2G4BPFi35"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPFi35LX_SSID /*PCI_ANY_ID */ , PE2G4BPFi35LX, + "PE2G4BPFi35LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G4BPFi35ZX_SSID /*PCI_ANY_ID */ , PE2G4BPFi35ZX, + "PE2G4BPFi35ZX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G6BPi35_SSID /*PCI_ANY_ID */ , PE2G6BPi35, "PE2G6BPi35"}, + + // {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID*/,0xaa0,PE2G6BPi35CX,"PE2G6BPi35CX"}, + // {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID*/,0xaa1,PE2G6BPi35CX,"PE2G6BPi35CX"}, + // {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID*/,0xaa2,PE2G6BPi35CX,"PE2G6BPi35CX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa0, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa1, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa2, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa3, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa4, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa5, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa6, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa7, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa8, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaa9, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaaa, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaab, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaac, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaad, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaae, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaaf, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab0, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab1, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab2, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab3, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab4, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab5, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab6, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab7, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab8, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xab9, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xaba, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xabb, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xabc, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xabd, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xabe, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , 0xabf, PE2G6BPi35CX, + "PE2G6BPi35CX"}, + + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G2BPi80_SSID /*PCI_ANY_ID */ , PE2G2BPi80, "PE2G2BPi80"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G2BPFi80_SSID /*PCI_ANY_ID */ , PE2G2BPFi80, "PE2G2BPFi80"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G2BPFi80LX_SSID /*PCI_ANY_ID */ , PE2G2BPFi80LX, + "PE2G2BPFi80LX"}, + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE2G2BPFi80ZX_SSID /*PCI_ANY_ID */ , PE2G2BPFi80ZX, + "PE2G2BPFi80ZX"}, + + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_MEG2BPI6_SSID /*PCI_ANY_ID */ , MEG2BPI6, "MEG2BPI6"}, + {0x8086, 0x10c9, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_XEG2BPI6_SSID /*PCI_ANY_ID */ , XEG2BPI6, "XEG2BPI6"}, + +#if 0 + {0x8086, 0x10fb, 0x8086, INTEL_PE210G2SPI9_SSID, PE210G2SPI9, + "PE210G2SPI9"}, +#endif + {0x8086, 0x10fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1E10G2BPI9CX4_SSID /*PCI_ANY_ID */ , M1E10G2BPI9CX4, + "MxE210G2BPI9CX4"}, + {0x8086, 0x10fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1E10G2BPI9SR_SSID /*PCI_ANY_ID */ , M1E10G2BPI9SR, + "MxE210G2BPI9SR"}, + {0x8086, 0x10fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1E10G2BPI9LR_SSID /*PCI_ANY_ID */ , M1E10G2BPI9LR, + "MxE210G2BPI9LR"}, + {0x8086, 0x10fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M1E10G2BPI9T_SSID /*PCI_ANY_ID */ , M1E10G2BPI9T, + "MxE210G2BPI9T"}, + + {0x8086, 0x10fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2E10G2BPI9CX4_SSID /*PCI_ANY_ID */ , M2E10G2BPI9CX4, + "M2E10G2BPI9CX4"}, + {0x8086, 0x10fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2E10G2BPI9SR_SSID /*PCI_ANY_ID */ , M2E10G2BPI9SR, + "M2E10G2BPI9SR"}, + {0x8086, 0x10fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2E10G2BPI9LR_SSID /*PCI_ANY_ID */ , M2E10G2BPI9LR, + "M2E10G2BPI9LR"}, + {0x8086, 0x10fb, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M2E10G2BPI9T_SSID /*PCI_ANY_ID */ , M2E10G2BPI9T, + "M2E10G2BPI9T"}, + + {0x8086, 0x10fb, SILICOM_SVID, SILICOM_PE210G2BPI9CX4_SSID, + PE210G2BPI9CX4, "PE210G2BPI9CX4"}, + {0x8086, 0x10fb, SILICOM_SVID, SILICOM_PE210G2BPI9SR_SSID, + PE210G2BPI9SR, "PE210G2BPI9SR"}, + {0x8086, 0x10fb, SILICOM_SVID, SILICOM_PE210G2BPI9LR_SSID, + PE210G2BPI9LR, "PE210G2BPI9LR"}, + {0x8086, 0x10fb, SILICOM_SVID, SILICOM_PE210G2BPI9T_SSID, PE210G2BPI9T, + "PE210G2BPI9T"}, + +#if 0 + {0x1374, 0x2c, SILICOM_SVID, SILICOM_PXG4BPI_SSID, PXG4BPI, + "PXG4BPI-SD"}, + + {0x1374, 0x2d, SILICOM_SVID, SILICOM_PXG4BPFI_SSID, PXG4BPFI, + "PXG4BPFI-SD"}, + + {0x1374, 0x3f, SILICOM_SVID, SILICOM_PXG2TBI_SSID, PXG2TBI, + "PXG2TBI-SD"}, + + {0x1374, 0x3d, SILICOM_SVID, SILICOM_PXG2BISC1_SSID, PXG2BISC1, + "PXG2BISC1-SD"}, + + {0x1374, 0x40, SILICOM_SVID, SILICOM_PEG4BPFI_SSID, PEG4BPFI, + "PEG4BPFI-SD"}, + +#ifdef BP_SELF_TEST + {0x1374, 0x28, SILICOM_SVID, 0x28, PXGBPI, "PXG2BPI-SD"}, +#endif +#endif + {0x8086, PCI_ANY_ID, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_M6E2G8BPi80_SSID /*PCI_ANY_ID */ , M6E2G8BPi80, "MxE2G8BPi80"}, + {0x8086, 0x1528, SILICOM_SVID /*PCI_ANY_ID */ , + SILICOM_PE210G2BPi40_SSID /*PCI_ANY_ID */ , PE210G2BPi40, + "PE210G2BPi40T"}, + + /* required last entry */ + {0,} +}; + +/* +* Initialize the module - Register the character device +*/ + +static int __init bypass_init_module(void) +{ + int ret_val, idx, idx_dev = 0; + struct pci_dev *pdev1 = NULL; + unsigned long mmio_start, mmio_len; + + printk(BP_MOD_DESCR " v" BP_MOD_VER "\n"); + ret_val = register_chrdev(major_num, DEVICE_NAME, &Fops); + if (ret_val < 0) { + printk("%s failed with %d\n", DEVICE_NAME, ret_val); + return ret_val; + } + major_num = ret_val; /* dynamic */ + for (idx = 0; tx_ctl_pci_tbl[idx].vendor; idx++) { + while ((pdev1 = pci_get_subsys(tx_ctl_pci_tbl[idx].vendor, + tx_ctl_pci_tbl[idx].device, + tx_ctl_pci_tbl[idx].subvendor, + tx_ctl_pci_tbl[idx].subdevice, + pdev1))) { + + device_num++; + } + } + if (!device_num) { + printk("No such device\n"); + unregister_chrdev(major_num, DEVICE_NAME); + return -1; + } + + bpctl_dev_arr = kmalloc((device_num) * sizeof(bpctl_dev_t), GFP_KERNEL); + + if (!bpctl_dev_arr) { + printk("Allocation error\n"); + unregister_chrdev(major_num, DEVICE_NAME); + return -1; + } + memset(bpctl_dev_arr, 0, ((device_num) * sizeof(bpctl_dev_t))); + + pdev1 = NULL; + for (idx = 0; tx_ctl_pci_tbl[idx].vendor; idx++) { + while ((pdev1 = pci_get_subsys(tx_ctl_pci_tbl[idx].vendor, + tx_ctl_pci_tbl[idx].device, + tx_ctl_pci_tbl[idx].subvendor, + tx_ctl_pci_tbl[idx].subdevice, + pdev1))) { + bpctl_dev_arr[idx_dev].pdev = pdev1; + + mmio_start = pci_resource_start(pdev1, 0); + mmio_len = pci_resource_len(pdev1, 0); + + bpctl_dev_arr[idx_dev].desc = + dev_desc[tx_ctl_pci_tbl[idx].index].name; + bpctl_dev_arr[idx_dev].name = + tx_ctl_pci_tbl[idx].bp_name; + bpctl_dev_arr[idx_dev].device = + tx_ctl_pci_tbl[idx].device; + bpctl_dev_arr[idx_dev].vendor = + tx_ctl_pci_tbl[idx].vendor; + bpctl_dev_arr[idx_dev].subdevice = + tx_ctl_pci_tbl[idx].subdevice; + bpctl_dev_arr[idx_dev].subvendor = + tx_ctl_pci_tbl[idx].subvendor; + //bpctl_dev_arr[idx_dev].pdev=pdev1; + bpctl_dev_arr[idx_dev].func = PCI_FUNC(pdev1->devfn); + bpctl_dev_arr[idx_dev].slot = PCI_SLOT(pdev1->devfn); + bpctl_dev_arr[idx_dev].bus = pdev1->bus->number; + bpctl_dev_arr[idx_dev].mem_map = + (unsigned long)ioremap(mmio_start, mmio_len); +#ifdef BP_SYNC_FLAG + spin_lock_init(&bpctl_dev_arr[idx_dev].bypass_wr_lock); +#endif + if (BP10G9_IF_SERIES(bpctl_dev_arr[idx_dev].subdevice)) + bpctl_dev_arr[idx_dev].bp_10g9 = 1; + if (BP10G_IF_SERIES(bpctl_dev_arr[idx_dev].subdevice)) + bpctl_dev_arr[idx_dev].bp_10g = 1; + if (PEG540_IF_SERIES(bpctl_dev_arr[idx_dev].subdevice)) { + + bpctl_dev_arr[idx_dev].bp_540 = 1; + } + if (PEGF5_IF_SERIES(bpctl_dev_arr[idx_dev].subdevice)) + bpctl_dev_arr[idx_dev].bp_fiber5 = 1; + if (PEG80_IF_SERIES(bpctl_dev_arr[idx_dev].subdevice)) + bpctl_dev_arr[idx_dev].bp_i80 = 1; + if (PEGF80_IF_SERIES(bpctl_dev_arr[idx_dev].subdevice)) + bpctl_dev_arr[idx_dev].bp_i80 = 1; + if ((bpctl_dev_arr[idx_dev].subdevice & 0xa00) == 0xa00) + bpctl_dev_arr[idx_dev].bp_i80 = 1; + if (BP10GB_IF_SERIES(bpctl_dev_arr[idx_dev].subdevice)) { + if (bpctl_dev_arr[idx_dev].ifindex == 0) { + unregister_chrdev(major_num, + DEVICE_NAME); + printk + ("Please load network driver for %s adapter!\n", + bpctl_dev_arr[idx_dev].name); + return -1; + } + + if (bpctl_dev_arr[idx_dev].ndev) { + if (! + (bpctl_dev_arr[idx_dev].ndev-> + flags & IFF_UP)) { + if (! + (bpctl_dev_arr[idx_dev]. + ndev->flags & IFF_UP)) { + unregister_chrdev + (major_num, + DEVICE_NAME); + printk + ("Please bring up network interfaces for %s adapter!\n", + bpctl_dev_arr + [idx_dev].name); + return -1; + } + + } + } + bpctl_dev_arr[idx_dev].bp_10gb = 1; + } + + if (!bpctl_dev_arr[idx_dev].bp_10g9) { + + if (is_bypass_fn(&bpctl_dev_arr[idx_dev])) { + printk(KERN_INFO "%s found, ", + bpctl_dev_arr[idx_dev].name); + if ((OLD_IF_SERIES + (bpctl_dev_arr[idx_dev].subdevice)) + || + (INTEL_IF_SERIES + (bpctl_dev_arr[idx_dev]. + subdevice))) + bpctl_dev_arr[idx_dev]. + bp_fw_ver = 0xff; + else + bpctl_dev_arr[idx_dev]. + bp_fw_ver = + bypass_fw_ver(&bpctl_dev_arr + [idx_dev]); + if ((bpctl_dev_arr[idx_dev].bp_10gb == + 1) + && (bpctl_dev_arr[idx_dev]. + bp_fw_ver == 0xff)) { + int cnt = 100; + while (cnt--) { + iounmap((void + *) + (bpctl_dev_arr + [idx_dev]. + mem_map)); + mmio_start = + pci_resource_start + (pdev1, 0); + mmio_len = + pci_resource_len + (pdev1, 0); + + bpctl_dev_arr[idx_dev]. + mem_map = + (unsigned long) + ioremap(mmio_start, + mmio_len); + + bpctl_dev_arr[idx_dev]. + bp_fw_ver = + bypass_fw_ver + (&bpctl_dev_arr + [idx_dev]); + if (bpctl_dev_arr + [idx_dev]. + bp_fw_ver == 0xa8) + break; + + } + } + //bpctl_dev_arr[idx_dev].bp_fw_ver=0xa8; + printk("firmware version: 0x%x\n", + bpctl_dev_arr[idx_dev]. + bp_fw_ver); + } + bpctl_dev_arr[idx_dev].wdt_status = + WDT_STATUS_UNKNOWN; + bpctl_dev_arr[idx_dev].reset_time = 0; + atomic_set(&bpctl_dev_arr[idx_dev].wdt_busy, 0); + bpctl_dev_arr[idx_dev].bp_status_un = 1; + + bypass_caps_init(&bpctl_dev_arr[idx_dev]); + + init_bypass_wd_auto(&bpctl_dev_arr[idx_dev]); + init_bypass_tpl_auto(&bpctl_dev_arr[idx_dev]); + if (NOKIA_SERIES + (bpctl_dev_arr[idx_dev].subdevice)) + reset_cont(&bpctl_dev_arr[idx_dev]); + } +#ifdef BP_SELF_TEST + if ((bpctl_dev_arr[idx_dev].bp_tx_data = + kmalloc(BPTEST_DATA_LEN, GFP_KERNEL))) { + + memset(bpctl_dev_arr[idx_dev].bp_tx_data, 0x0, + BPTEST_DATA_LEN); + + memset(bpctl_dev_arr[idx_dev].bp_tx_data, 0xff, + 6); + memset(bpctl_dev_arr[idx_dev].bp_tx_data + 6, + 0x0, 1); + memset(bpctl_dev_arr[idx_dev].bp_tx_data + 7, + 0xaa, 5); + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)) + bpctl_dev_arr[idx_dev].bp_tx_data[12] = + (ETH_P_BPTEST >> 8) & 0xff; + bpctl_dev_arr[idx_dev].bp_tx_data[13] = + ETH_P_BPTEST & 0xff; +#else + *(__be16 *) (bpctl_dev_arr[idx_dev].bp_tx_data + + 12) = htons(ETH_P_BPTEST); +#endif + + } else + printk("bp_ctl: Memory allocation error!\n"); +#endif + idx_dev++; + + } + } + if_scan_init(); + + sema_init(&bpctl_sema, 1); + spin_lock_init(&bpvm_lock); + { + + bpctl_dev_t *pbpctl_dev_c = NULL; + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) + && (idx_dev < device_num)); idx_dev++) { + if (bpctl_dev_arr[idx_dev].bp_10g9) { + pbpctl_dev_c = + get_status_port_fn(&bpctl_dev_arr[idx_dev]); + if (is_bypass_fn(&bpctl_dev_arr[idx_dev])) { + printk(KERN_INFO "%s found, ", + bpctl_dev_arr[idx_dev].name); + bpctl_dev_arr[idx_dev].bp_fw_ver = + bypass_fw_ver(&bpctl_dev_arr + [idx_dev]); + printk("firmware version: 0x%x\n", + bpctl_dev_arr[idx_dev]. + bp_fw_ver); + + } + bpctl_dev_arr[idx_dev].wdt_status = + WDT_STATUS_UNKNOWN; + bpctl_dev_arr[idx_dev].reset_time = 0; + atomic_set(&bpctl_dev_arr[idx_dev].wdt_busy, 0); + bpctl_dev_arr[idx_dev].bp_status_un = 1; + + bypass_caps_init(&bpctl_dev_arr[idx_dev]); + + init_bypass_wd_auto(&bpctl_dev_arr[idx_dev]); + init_bypass_tpl_auto(&bpctl_dev_arr[idx_dev]); + + } + + } + } + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) + inter_module_register("is_bypass_sd", THIS_MODULE, &is_bypass_sd); + inter_module_register("get_bypass_slave_sd", THIS_MODULE, + &get_bypass_slave_sd); + inter_module_register("get_bypass_caps_sd", THIS_MODULE, + &get_bypass_caps_sd); + inter_module_register("get_wd_set_caps_sd", THIS_MODULE, + &get_wd_set_caps_sd); + inter_module_register("set_bypass_sd", THIS_MODULE, &set_bypass_sd); + inter_module_register("get_bypass_sd", THIS_MODULE, &get_bypass_sd); + inter_module_register("get_bypass_change_sd", THIS_MODULE, + &get_bypass_change_sd); + inter_module_register("set_dis_bypass_sd", THIS_MODULE, + &set_dis_bypass_sd); + inter_module_register("get_dis_bypass_sd", THIS_MODULE, + &get_dis_bypass_sd); + inter_module_register("set_bypass_pwoff_sd", THIS_MODULE, + &set_bypass_pwoff_sd); + inter_module_register("get_bypass_pwoff_sd", THIS_MODULE, + &get_bypass_pwoff_sd); + inter_module_register("set_bypass_pwup_sd", THIS_MODULE, + &set_bypass_pwup_sd); + inter_module_register("get_bypass_pwup_sd", THIS_MODULE, + &get_bypass_pwup_sd); + inter_module_register("get_bypass_wd_sd", THIS_MODULE, + &get_bypass_wd_sd); + inter_module_register("set_bypass_wd_sd", THIS_MODULE, + &set_bypass_wd_sd); + inter_module_register("get_wd_expire_time_sd", THIS_MODULE, + &get_wd_expire_time_sd); + inter_module_register("reset_bypass_wd_timer_sd", THIS_MODULE, + &reset_bypass_wd_timer_sd); + inter_module_register("set_std_nic_sd", THIS_MODULE, &set_std_nic_sd); + inter_module_register("get_std_nic_sd", THIS_MODULE, &get_std_nic_sd); + inter_module_register("set_tx_sd", THIS_MODULE, &set_tx_sd); + inter_module_register("get_tx_sd", THIS_MODULE, &get_tx_sd); + inter_module_register("set_tpl_sd", THIS_MODULE, &set_tpl_sd); + inter_module_register("get_tpl_sd", THIS_MODULE, &get_tpl_sd); + + inter_module_register("set_bp_hw_reset_sd", THIS_MODULE, + &set_bp_hw_reset_sd); + inter_module_register("get_bp_hw_reset_sd", THIS_MODULE, + &get_bp_hw_reset_sd); + + inter_module_register("set_tap_sd", THIS_MODULE, &set_tap_sd); + inter_module_register("get_tap_sd", THIS_MODULE, &get_tap_sd); + inter_module_register("get_tap_change_sd", THIS_MODULE, + &get_tap_change_sd); + inter_module_register("set_dis_tap_sd", THIS_MODULE, &set_dis_tap_sd); + inter_module_register("get_dis_tap_sd", THIS_MODULE, &get_dis_tap_sd); + inter_module_register("set_tap_pwup_sd", THIS_MODULE, &set_tap_pwup_sd); + inter_module_register("get_tap_pwup_sd", THIS_MODULE, &get_tap_pwup_sd); + inter_module_register("set_bp_disc_sd", THIS_MODULE, &set_bp_disc_sd); + inter_module_register("get_bp_disc_sd", THIS_MODULE, &get_bp_disc_sd); + inter_module_register("get_bp_disc_change_sd", THIS_MODULE, + &get_bp_disc_change_sd); + inter_module_register("set_bp_dis_disc_sd", THIS_MODULE, + &set_bp_dis_disc_sd); + inter_module_register("get_bp_dis_disc_sd", THIS_MODULE, + &get_bp_dis_disc_sd); + inter_module_register("set_bp_disc_pwup_sd", THIS_MODULE, + &set_bp_disc_pwup_sd); + inter_module_register("get_bp_disc_pwup_sd", THIS_MODULE, + &get_bp_disc_pwup_sd); + inter_module_register("set_wd_exp_mode_sd", THIS_MODULE, + &set_wd_exp_mode_sd); + inter_module_register("get_wd_exp_mode_sd", THIS_MODULE, + &get_wd_exp_mode_sd); + inter_module_register("set_wd_autoreset_sd", THIS_MODULE, + &set_wd_autoreset_sd); + inter_module_register("get_wd_autoreset_sd", THIS_MODULE, + &get_wd_autoreset_sd); + inter_module_register("get_bypass_info_sd", THIS_MODULE, + &get_bypass_info_sd); + inter_module_register("bp_if_scan_sd", THIS_MODULE, &bp_if_scan_sd); + +#endif + register_netdevice_notifier(&bp_notifier_block); +#ifdef BP_PROC_SUPPORT + { + int i = 0; + //unsigned long flags; + //rcu_read_lock(); + bp_proc_create(); + for (i = 0; i < device_num; i++) { + if (bpctl_dev_arr[i].ifindex) { + //spin_lock_irqsave(&bpvm_lock, flags); + bypass_proc_remove_dev_sd(&bpctl_dev_arr[i]); + bypass_proc_create_dev_sd(&bpctl_dev_arr[i]); + //spin_unlock_irqrestore(&bpvm_lock, flags); + } + + } + //rcu_read_unlock(); + } +#endif + + //register_netdevice_notifier(&bp_notifier_block); + return 0; +} + +/* +* Cleanup - unregister the appropriate file from /proc +*/ +static void __exit bypass_cleanup_module(void) +{ + int i; +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)) + int ret; +#endif + unregister_netdevice_notifier(&bp_notifier_block); + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) + inter_module_unregister("is_bypass_sd"); + inter_module_unregister("get_bypass_slave_sd"); + inter_module_unregister("get_bypass_caps_sd"); + inter_module_unregister("get_wd_set_caps_sd"); + inter_module_unregister("set_bypass_sd"); + inter_module_unregister("get_bypass_sd"); + inter_module_unregister("get_bypass_change_sd"); + inter_module_unregister("set_dis_bypass_sd"); + inter_module_unregister("get_dis_bypass_sd"); + inter_module_unregister("set_bypass_pwoff_sd"); + inter_module_unregister("get_bypass_pwoff_sd"); + inter_module_unregister("set_bypass_pwup_sd"); + inter_module_unregister("get_bypass_pwup_sd"); + inter_module_unregister("set_bypass_wd_sd"); + inter_module_unregister("get_bypass_wd_sd"); + inter_module_unregister("get_wd_expire_time_sd"); + inter_module_unregister("reset_bypass_wd_timer_sd"); + inter_module_unregister("set_std_nic_sd"); + inter_module_unregister("get_std_nic_sd"); + inter_module_unregister("set_tx_sd"); + inter_module_unregister("get_tx_sd"); + inter_module_unregister("set_tpl_sd"); + inter_module_unregister("get_tpl_sd"); + inter_module_unregister("set_tap_sd"); + inter_module_unregister("get_tap_sd"); + inter_module_unregister("get_tap_change_sd"); + inter_module_unregister("set_dis_tap_sd"); + inter_module_unregister("get_dis_tap_sd"); + inter_module_unregister("set_tap_pwup_sd"); + inter_module_unregister("get_tap_pwup_sd"); + inter_module_unregister("set_bp_disc_sd"); + inter_module_unregister("get_bp_disc_sd"); + inter_module_unregister("get_bp_disc_change_sd"); + inter_module_unregister("set_bp_dis_disc_sd"); + inter_module_unregister("get_bp_dis_disc_sd"); + inter_module_unregister("set_bp_disc_pwup_sd"); + inter_module_unregister("get_bp_disc_pwup_sd"); + inter_module_unregister("set_wd_exp_mode_sd"); + inter_module_unregister("get_wd_exp_mode_sd"); + inter_module_unregister("set_wd_autoreset_sd"); + inter_module_unregister("get_wd_autoreset_sd"); + inter_module_unregister("get_bypass_info_sd"); + inter_module_unregister("bp_if_scan_sd"); + +#endif + + for (i = 0; i < device_num; i++) { + //unsigned long flags; +#ifdef BP_PROC_SUPPORT +//spin_lock_irqsave(&bpvm_lock, flags); +//rcu_read_lock(); + bypass_proc_remove_dev_sd(&bpctl_dev_arr[i]); +//spin_unlock_irqrestore(&bpvm_lock, flags); +//rcu_read_unlock(); +#endif + remove_bypass_wd_auto(&bpctl_dev_arr[i]); + bpctl_dev_arr[i].reset_time = 0; + + remove_bypass_tpl_auto(&bpctl_dev_arr[i]); + } + + /* unmap all devices */ + for (i = 0; i < device_num; i++) { +#ifdef BP_SELF_TEST + if (bpctl_dev_arr[i].bp_tx_data) + kfree(bpctl_dev_arr[i].bp_tx_data); +#endif + iounmap((void *)(bpctl_dev_arr[i].mem_map)); + } + + /* free all devices space */ + if (bpctl_dev_arr) + kfree(bpctl_dev_arr); + +/* +* Unregister the device +*/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)) + ret = unregister_chrdev(major_num, DEVICE_NAME); +/* +* If there's an error, report it +*/ + if (ret < 0) + printk("Error in module_unregister_chrdev: %d\n", ret); +#else + unregister_chrdev(major_num, DEVICE_NAME); + +#endif +} + +module_init(bypass_init_module); +module_exit(bypass_cleanup_module); + +int is_bypass_sd(int ifindex) +{ + return (is_bypass(get_dev_idx_p(ifindex))); +} + +int set_bypass_sd(int ifindex, int bypass_mode) +{ + + return (set_bypass_fn(get_dev_idx_p(ifindex), bypass_mode)); +} + +int get_bypass_sd(int ifindex) +{ + + return (get_bypass_fn(get_dev_idx_p(ifindex))); +} + +int get_bypass_change_sd(int ifindex) +{ + + return (get_bypass_change_fn(get_dev_idx_p(ifindex))); +} + +int set_dis_bypass_sd(int ifindex, int dis_param) +{ + return (set_dis_bypass_fn(get_dev_idx_p(ifindex), dis_param)); +} + +int get_dis_bypass_sd(int ifindex) +{ + + return (get_dis_bypass_fn(get_dev_idx_p(ifindex))); +} + +int set_bypass_pwoff_sd(int ifindex, int bypass_mode) +{ + return (set_bypass_pwoff_fn(get_dev_idx_p(ifindex), bypass_mode)); + +} + +int get_bypass_pwoff_sd(int ifindex) +{ + return (get_bypass_pwoff_fn(get_dev_idx_p(ifindex))); + +} + +int set_bypass_pwup_sd(int ifindex, int bypass_mode) +{ + return (set_bypass_pwup_fn(get_dev_idx_p(ifindex), bypass_mode)); + +} + +int get_bypass_pwup_sd(int ifindex) +{ + return (get_bypass_pwup_fn(get_dev_idx_p(ifindex))); + +} + +int set_bypass_wd_sd(int if_index, int ms_timeout, int *ms_timeout_set) +{ + if ((is_bypass(get_dev_idx_p(if_index))) <= 0) + return BP_NOT_CAP; + *ms_timeout_set = set_bypass_wd_fn(get_dev_idx_p(if_index), ms_timeout); + return 0; +} + +int get_bypass_wd_sd(int ifindex, int *timeout) +{ + return (get_bypass_wd_fn(get_dev_idx_p(ifindex), timeout)); + +} + +int get_wd_expire_time_sd(int ifindex, int *time_left) +{ + return (get_wd_expire_time_fn(get_dev_idx_p(ifindex), time_left)); +} + +int reset_bypass_wd_timer_sd(int ifindex) +{ + return (reset_bypass_wd_timer_fn(get_dev_idx_p(ifindex))); + +} + +int get_wd_set_caps_sd(int ifindex) +{ + return (get_wd_set_caps_fn(get_dev_idx_p(ifindex))); + +} + +int set_std_nic_sd(int ifindex, int nic_mode) +{ + return (set_std_nic_fn(get_dev_idx_p(ifindex), nic_mode)); + +} + +int get_std_nic_sd(int ifindex) +{ + return (get_std_nic_fn(get_dev_idx_p(ifindex))); + +} + +int set_tap_sd(int ifindex, int tap_mode) +{ + return (set_tap_fn(get_dev_idx_p(ifindex), tap_mode)); + +} + +int get_tap_sd(int ifindex) +{ + return (get_tap_fn(get_dev_idx_p(ifindex))); + +} + +int set_tap_pwup_sd(int ifindex, int tap_mode) +{ + return (set_tap_pwup_fn(get_dev_idx_p(ifindex), tap_mode)); + +} + +int get_tap_pwup_sd(int ifindex) +{ + return (get_tap_pwup_fn(get_dev_idx_p(ifindex))); + +} + +int get_tap_change_sd(int ifindex) +{ + return (get_tap_change_fn(get_dev_idx_p(ifindex))); + +} + +int set_dis_tap_sd(int ifindex, int dis_param) +{ + return (set_dis_tap_fn(get_dev_idx_p(ifindex), dis_param)); + +} + +int get_dis_tap_sd(int ifindex) +{ + return (get_dis_tap_fn(get_dev_idx_p(ifindex))); + +} + +int set_bp_disc_sd(int ifindex, int disc_mode) +{ + return (set_disc_fn(get_dev_idx_p(ifindex), disc_mode)); + +} + +int get_bp_disc_sd(int ifindex) +{ + return (get_disc_fn(get_dev_idx_p(ifindex))); + +} + +int set_bp_disc_pwup_sd(int ifindex, int disc_mode) +{ + return (set_disc_pwup_fn(get_dev_idx_p(ifindex), disc_mode)); + +} + +int get_bp_disc_pwup_sd(int ifindex) +{ + return (get_disc_pwup_fn(get_dev_idx_p(ifindex))); + +} + +int get_bp_disc_change_sd(int ifindex) +{ + return (get_disc_change_fn(get_dev_idx_p(ifindex))); + +} + +int set_bp_dis_disc_sd(int ifindex, int dis_param) +{ + return (set_dis_disc_fn(get_dev_idx_p(ifindex), dis_param)); + +} + +int get_bp_dis_disc_sd(int ifindex) +{ + return (get_dis_disc_fn(get_dev_idx_p(ifindex))); + +} + +int get_wd_exp_mode_sd(int ifindex) +{ + return (get_wd_exp_mode_fn(get_dev_idx_p(ifindex))); +} + +int set_wd_exp_mode_sd(int ifindex, int param) +{ + return (set_wd_exp_mode_fn(get_dev_idx_p(ifindex), param)); + +} + +int reset_cont_sd(int ifindex) +{ + return (reset_cont_fn(get_dev_idx_p(ifindex))); + +} + +int set_tx_sd(int ifindex, int tx_state) +{ + return (set_tx_fn(get_dev_idx_p(ifindex), tx_state)); + +} + +int set_tpl_sd(int ifindex, int tpl_state) +{ + return (set_tpl_fn(get_dev_idx_p(ifindex), tpl_state)); + +} + +int set_bp_hw_reset_sd(int ifindex, int status) +{ + return (set_bp_hw_reset_fn(get_dev_idx_p(ifindex), status)); + +} + +int set_wd_autoreset_sd(int ifindex, int param) +{ + return (set_wd_autoreset_fn(get_dev_idx_p(ifindex), param)); + +} + +int get_wd_autoreset_sd(int ifindex) +{ + return (get_wd_autoreset_fn(get_dev_idx_p(ifindex))); + +} + +int get_bypass_caps_sd(int ifindex) +{ + return (get_bypass_caps_fn(get_dev_idx_p(ifindex))); +} + +int get_bypass_slave_sd(int ifindex) +{ + bpctl_dev_t *pbpctl_dev_out; + int ret = get_bypass_slave_fn(get_dev_idx_p(ifindex), &pbpctl_dev_out); + if (ret == 1) + return (pbpctl_dev_out->ifindex); + return -1; + +} + +int get_tx_sd(int ifindex) +{ + return (get_tx_fn(get_dev_idx_p(ifindex))); + +} + +int get_tpl_sd(int ifindex) +{ + return (get_tpl_fn(get_dev_idx_p(ifindex))); + +} + +int get_bp_hw_reset_sd(int ifindex) +{ + return (get_bp_hw_reset_fn(get_dev_idx_p(ifindex))); + +} + +int get_bypass_info_sd(int ifindex, struct bp_info *bp_info) +{ + return (get_bypass_info_fn + (get_dev_idx_p(ifindex), bp_info->prod_name, &bp_info->fw_ver)); +} + +int bp_if_scan_sd(void) +{ + if_scan_init(); + return 0; +} + +EXPORT_SYMBOL_NOVERS(is_bypass_sd); +EXPORT_SYMBOL_NOVERS(get_bypass_slave_sd); +EXPORT_SYMBOL_NOVERS(get_bypass_caps_sd); +EXPORT_SYMBOL_NOVERS(get_wd_set_caps_sd); +EXPORT_SYMBOL_NOVERS(set_bypass_sd); +EXPORT_SYMBOL_NOVERS(get_bypass_sd); +EXPORT_SYMBOL_NOVERS(get_bypass_change_sd); +EXPORT_SYMBOL_NOVERS(set_dis_bypass_sd); +EXPORT_SYMBOL_NOVERS(get_dis_bypass_sd); +EXPORT_SYMBOL_NOVERS(set_bypass_pwoff_sd); +EXPORT_SYMBOL_NOVERS(get_bypass_pwoff_sd); +EXPORT_SYMBOL_NOVERS(set_bypass_pwup_sd); +EXPORT_SYMBOL_NOVERS(get_bypass_pwup_sd); +EXPORT_SYMBOL_NOVERS(set_bypass_wd_sd); +EXPORT_SYMBOL_NOVERS(get_bypass_wd_sd); +EXPORT_SYMBOL_NOVERS(get_wd_expire_time_sd); +EXPORT_SYMBOL_NOVERS(reset_bypass_wd_timer_sd); +EXPORT_SYMBOL_NOVERS(set_std_nic_sd); +EXPORT_SYMBOL_NOVERS(get_std_nic_sd); +EXPORT_SYMBOL_NOVERS(set_tx_sd); +EXPORT_SYMBOL_NOVERS(get_tx_sd); +EXPORT_SYMBOL_NOVERS(set_tpl_sd); +EXPORT_SYMBOL_NOVERS(get_tpl_sd); +EXPORT_SYMBOL_NOVERS(set_bp_hw_reset_sd); +EXPORT_SYMBOL_NOVERS(get_bp_hw_reset_sd); +EXPORT_SYMBOL_NOVERS(set_tap_sd); +EXPORT_SYMBOL_NOVERS(get_tap_sd); +EXPORT_SYMBOL_NOVERS(get_tap_change_sd); +EXPORT_SYMBOL_NOVERS(set_dis_tap_sd); +EXPORT_SYMBOL_NOVERS(get_dis_tap_sd); +EXPORT_SYMBOL_NOVERS(set_tap_pwup_sd); +EXPORT_SYMBOL_NOVERS(get_tap_pwup_sd); +EXPORT_SYMBOL_NOVERS(set_wd_exp_mode_sd); +EXPORT_SYMBOL_NOVERS(get_wd_exp_mode_sd); +EXPORT_SYMBOL_NOVERS(set_wd_autoreset_sd); +EXPORT_SYMBOL_NOVERS(get_wd_autoreset_sd); +EXPORT_SYMBOL_NOVERS(set_bp_disc_sd); +EXPORT_SYMBOL_NOVERS(get_bp_disc_sd); +EXPORT_SYMBOL_NOVERS(get_bp_disc_change_sd); +EXPORT_SYMBOL_NOVERS(set_bp_dis_disc_sd); +EXPORT_SYMBOL_NOVERS(get_bp_dis_disc_sd); +EXPORT_SYMBOL_NOVERS(set_bp_disc_pwup_sd); +EXPORT_SYMBOL_NOVERS(get_bp_disc_pwup_sd); +EXPORT_SYMBOL_NOVERS(get_bypass_info_sd); +EXPORT_SYMBOL_NOVERS(bp_if_scan_sd); + +#define BP_PROC_DIR "bypass" + +#define GPIO6_SET_ENTRY_SD "gpio6_set" +#define GPIO6_CLEAR_ENTRY_SD "gpio6_clear" + +#define GPIO7_SET_ENTRY_SD "gpio7_set" +#define GPIO7_CLEAR_ENTRY_SD "gpio7_clear" + +#define PULSE_SET_ENTRY_SD "pulse_set" +#define ZERO_SET_ENTRY_SD "zero_set" +#define PULSE_GET1_ENTRY_SD "pulse_get1" +#define PULSE_GET2_ENTRY_SD "pulse_get2" + +#define CMND_ON_ENTRY_SD "cmnd_on" +#define CMND_OFF_ENTRY_SD "cmnd_off" +#define RESET_CONT_ENTRY_SD "reset_cont" + + /*COMMANDS*/ +#define BYPASS_INFO_ENTRY_SD "bypass_info" +#define BYPASS_SLAVE_ENTRY_SD "bypass_slave" +#define BYPASS_CAPS_ENTRY_SD "bypass_caps" +#define WD_SET_CAPS_ENTRY_SD "wd_set_caps" +#define BYPASS_ENTRY_SD "bypass" +#define BYPASS_CHANGE_ENTRY_SD "bypass_change" +#define BYPASS_WD_ENTRY_SD "bypass_wd" +#define WD_EXPIRE_TIME_ENTRY_SD "wd_expire_time" +#define RESET_BYPASS_WD_ENTRY_SD "reset_bypass_wd" +#define DIS_BYPASS_ENTRY_SD "dis_bypass" +#define BYPASS_PWUP_ENTRY_SD "bypass_pwup" +#define BYPASS_PWOFF_ENTRY_SD "bypass_pwoff" +#define STD_NIC_ENTRY_SD "std_nic" +#define STD_NIC_ENTRY_SD "std_nic" +#define TAP_ENTRY_SD "tap" +#define TAP_CHANGE_ENTRY_SD "tap_change" +#define DIS_TAP_ENTRY_SD "dis_tap" +#define TAP_PWUP_ENTRY_SD "tap_pwup" +#define TWO_PORT_LINK_ENTRY_SD "two_port_link" +#define WD_EXP_MODE_ENTRY_SD "wd_exp_mode" +#define WD_AUTORESET_ENTRY_SD "wd_autoreset" +#define TPL_ENTRY_SD "tpl" +#define WAIT_AT_PWUP_ENTRY_SD "wait_at_pwup" +#define HW_RESET_ENTRY_SD "hw_reset" +#define DISC_ENTRY_SD "disc" +#define DISC_CHANGE_ENTRY_SD "disc_change" +#define DIS_DISC_ENTRY_SD "dis_disc" +#define DISC_PWUP_ENTRY_SD "disc_pwup" +static struct proc_dir_entry *bp_procfs_dir; + +static struct proc_dir_entry *proc_getdir(char *name, + struct proc_dir_entry *proc_dir) +{ + struct proc_dir_entry *pde = proc_dir; + + for (pde = pde->subdir; pde; pde = pde->next) { + if (pde->namelen && (strcmp(name, pde->name) == 0)) { + /* directory exists */ + break; + } + } + if (pde == (struct proc_dir_entry *)0) { + /* create the directory */ +#if (LINUX_VERSION_CODE > 0x20300) + pde = proc_mkdir(name, proc_dir); +#else + pde = create_proc_entry(name, S_IFDIR, proc_dir); +#endif + if (pde == (struct proc_dir_entry *)0) { + + return (pde); + } + } + + return (pde); +} + +int bp_proc_create(void) +{ + bp_procfs_dir = proc_getdir(BP_PROC_DIR, init_net.proc_net); + if (bp_procfs_dir == (struct proc_dir_entry *)0) { + printk(KERN_DEBUG + "Could not create procfs nicinfo directory %s\n", + BP_PROC_DIR); + return -1; + } + return 0; +} + +int +bypass_proc_create_entry_sd(struct pfs_unit_sd *pfs_unit_curr, + char *proc_name, + write_proc_t * write_proc, + read_proc_t * read_proc, + struct proc_dir_entry *parent_pfs, void *data) +{ + strcpy(pfs_unit_curr->proc_name, proc_name); + pfs_unit_curr->proc_entry = create_proc_entry(pfs_unit_curr->proc_name, + S_IFREG | S_IRUSR | + S_IWUSR | S_IRGRP | + S_IWGRP | S_IROTH | + S_IWOTH, parent_pfs); + if (pfs_unit_curr->proc_entry == 0) { + + return -1; + } + + pfs_unit_curr->proc_entry->read_proc = read_proc; + pfs_unit_curr->proc_entry->write_proc = write_proc; + pfs_unit_curr->proc_entry->data = data; + + return 0; + +} + +int +get_bypass_info_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + int len = 0; + + len += sprintf(page, "Name\t\t\t%s\n", pbp_device_block->name); + len += + sprintf(page + len, "Firmware version\t0x%x\n", + pbp_device_block->bp_fw_ver); + + *eof = 1; + return len; +} + +int +get_bypass_slave_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0; + bpctl_dev_t *pbp_device_block_slave = NULL; + int idx_dev = 0; + struct net_device *net_slave_dev = NULL; + + if ((pbp_device_block->func == 0) || (pbp_device_block->func == 2)) { + for (idx_dev = 0; + ((bpctl_dev_arr[idx_dev].pdev != NULL) + && (idx_dev < device_num)); idx_dev++) { + if ((bpctl_dev_arr[idx_dev].bus == + pbp_device_block->bus) + && (bpctl_dev_arr[idx_dev].slot == + pbp_device_block->slot)) { + if ((pbp_device_block->func == 0) + && (bpctl_dev_arr[idx_dev].func == 1)) { + pbp_device_block_slave = + &bpctl_dev_arr[idx_dev]; + break; + } + if ((pbp_device_block->func == 2) && + (bpctl_dev_arr[idx_dev].func == 3)) { + pbp_device_block_slave = + &bpctl_dev_arr[idx_dev]; + break; + } + } + } + } else + pbp_device_block_slave = pbp_device_block; + if (!pbp_device_block_slave) { + len = sprintf(page, "fail\n"); + *eof = 1; + return len; + } + net_slave_dev = pbp_device_block_slave->ndev; + if (net_slave_dev) { + if (net_slave_dev) + len = sprintf(page, "%s\n", net_slave_dev->name); + else + len = sprintf(page, "fail\n"); + + } + + *eof = 1; + return len; +} + +int +get_bypass_caps_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_caps_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "-1\n"); + else + len = sprintf(page, "0x%x\n", ret); + *eof = 1; + return len; + +} + +int +get_wd_set_caps_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_wd_set_caps_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "-1\n"); + else + len = sprintf(page, "0x%x\n", ret); + *eof = 1; + return len; +} + +int +set_bypass_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_bypass_fn(pbp_device_block, bypass_param); + + return count; +} + +int +set_tap_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_tap_fn(pbp_device_block, tap_param); + + return count; +} + +int +set_disc_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_disc_fn(pbp_device_block, tap_param); + + return count; +} + +int +get_bypass_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +int +get_tap_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_tap_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +int +get_disc_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_disc_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +int +get_bypass_change_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_change_fn(pbp_device_block); + if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +get_tap_change_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_tap_change_fn(pbp_device_block); + if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +get_disc_change_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_disc_change_fn(pbp_device_block); + if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +#define isdigit(c) (c >= '0' && c <= '9') +__inline static int atoi(char **s) +{ + int i = 0; + while (isdigit(**s)) + i = i * 10 + *((*s)++) - '0'; + return i; +} + +int +set_bypass_wd_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + unsigned int timeout = 0; + char *timeout_ptr = kbuf; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + timeout_ptr = kbuf; + timeout = atoi(&timeout_ptr); + + set_bypass_wd_fn(pbp_device_block, timeout); + + return count; +} + +int +get_bypass_wd_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0, timeout = 0; + + ret = get_bypass_wd_fn(pbp_device_block, &timeout); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (timeout == -1) + len = sprintf(page, "unknown\n"); + else if (timeout == 0) + len = sprintf(page, "disable\n"); + else + len = sprintf(page, "%d\n", timeout); + + *eof = 1; + return len; +} + +int +get_wd_expire_time_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0, timeout = 0; + + ret = get_wd_expire_time_fn(pbp_device_block, &timeout); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (timeout == -1) + len = sprintf(page, "expire\n"); + else if (timeout == 0) + len = sprintf(page, "disable\n"); + + else + len = sprintf(page, "%d\n", timeout); + *eof = 1; + return len; +} + +int +get_tpl_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_tpl_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +#ifdef PMC_FIX_FLAG +int +get_wait_at_pwup_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bp_wait_at_pwup_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +int +get_hw_reset_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bp_hw_reset_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +#endif /*PMC_WAIT_FLAG */ + +int +reset_bypass_wd_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = reset_bypass_wd_timer_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "disable\n"); + else if (ret == 1) + len = sprintf(page, "success\n"); + + *eof = 1; + return len; +} + +int +set_dis_bypass_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_dis_bypass_fn(pbp_device_block, bypass_param); + + return count; +} + +int +set_dis_tap_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_dis_tap_fn(pbp_device_block, tap_param); + + return count; +} + +int +set_dis_disc_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_dis_disc_fn(pbp_device_block, tap_param); + + return count; +} + +int +get_dis_bypass_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_dis_bypass_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_dis_tap_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_dis_tap_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_dis_disc_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_dis_disc_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +set_bypass_pwup_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_bypass_pwup_fn(pbp_device_block, bypass_param); + + return count; +} + +int +set_bypass_pwoff_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_bypass_pwoff_fn(pbp_device_block, bypass_param); + + return count; +} + +int +set_tap_pwup_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_tap_pwup_fn(pbp_device_block, tap_param); + + return count; +} + +int +set_disc_pwup_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_disc_pwup_fn(pbp_device_block, tap_param); + + return count; +} + +int +get_bypass_pwup_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_pwup_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_bypass_pwoff_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_pwoff_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_tap_pwup_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_tap_pwup_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_disc_pwup_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_disc_pwup_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +set_std_nic_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_std_nic_fn(pbp_device_block, bypass_param); + + return count; +} + +int +get_std_nic_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_std_nic_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_wd_exp_mode_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_wd_exp_mode_fn(pbp_device_block); + if (ret == 1) + len = sprintf(page, "tap\n"); + else if (ret == 0) + len = sprintf(page, "bypass\n"); + else if (ret == 2) + len = sprintf(page, "disc\n"); + + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +set_wd_exp_mode_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "tap") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "bypass") == 0) + bypass_param = 0; + else if (strcmp(kbuf, "disc") == 0) + bypass_param = 2; + + set_wd_exp_mode_fn(pbp_device_block, bypass_param); + + return count; +} + +int +get_wd_autoreset_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_wd_autoreset_fn(pbp_device_block); + if (ret >= 0) + len = sprintf(page, "%d\n", ret); + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +set_wd_autoreset_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + u32 timeout = 0; + char *timeout_ptr = kbuf; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + timeout_ptr = kbuf; + timeout = atoi(&timeout_ptr); + + set_wd_autoreset_fn(pbp_device_block, timeout); + + return count; +} + +int +set_tpl_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tpl_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tpl_param = 1; + else if (strcmp(kbuf, "off") == 0) + tpl_param = 0; + + set_tpl_fn(pbp_device_block, tpl_param); + + return count; +} + +#ifdef PMC_FIX_FLAG +int +set_wait_at_pwup_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tpl_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tpl_param = 1; + else if (strcmp(kbuf, "off") == 0) + tpl_param = 0; + + set_bp_wait_at_pwup_fn(pbp_device_block, tpl_param); + + return count; +} + +int +set_hw_reset_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tpl_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tpl_param = 1; + else if (strcmp(kbuf, "off") == 0) + tpl_param = 0; + + set_bp_hw_reset_fn(pbp_device_block, tpl_param); + + return count; +} + +#endif /*PMC_FIX_FLAG */ + +int bypass_proc_create_dev_sd(bpctl_dev_t * pbp_device_block) +{ + struct bypass_pfs_sd *current_pfs = &(pbp_device_block->bypass_pfs_set); + static struct proc_dir_entry *procfs_dir = NULL; + int ret = 0; + + if (!pbp_device_block->ndev) + return -1; + sprintf(current_pfs->dir_name, "bypass_%s", + pbp_device_block->ndev->name); + + if (!bp_procfs_dir) + return -1; + + /* create device proc dir */ + procfs_dir = proc_getdir(current_pfs->dir_name, bp_procfs_dir); + if (procfs_dir == 0) { + printk(KERN_DEBUG "Could not create procfs directory %s\n", + current_pfs->dir_name); + return -1; + } + current_pfs->bypass_entry = procfs_dir; + + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_info), BYPASS_INFO_ENTRY_SD, NULL, /* write */ + get_bypass_info_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (pbp_device_block->bp_caps & SW_CTL_CAP) { + + /* Create set param proc's */ + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_slave), BYPASS_SLAVE_ENTRY_SD, NULL, /* write */ + get_bypass_slave_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_caps), BYPASS_CAPS_ENTRY_SD, NULL, /* write */ + get_bypass_caps_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->wd_set_caps), WD_SET_CAPS_ENTRY_SD, NULL, /* write */ + get_wd_set_caps_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_wd), BYPASS_WD_ENTRY_SD, set_bypass_wd_pfs, /* write */ + get_bypass_wd_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->wd_expire_time), WD_EXPIRE_TIME_ENTRY_SD, NULL, /* write */ + get_wd_expire_time_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->reset_bypass_wd), RESET_BYPASS_WD_ENTRY_SD, NULL, /* write */ + reset_bypass_wd_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->std_nic), STD_NIC_ENTRY_SD, set_std_nic_pfs, /* write */ + get_std_nic_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (pbp_device_block->bp_caps & BP_CAP) { + if (bypass_proc_create_entry_sd(&(current_pfs->bypass), BYPASS_ENTRY_SD, set_bypass_pfs, /* write */ + get_bypass_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->dis_bypass), DIS_BYPASS_ENTRY_SD, set_dis_bypass_pfs, /* write */ + get_dis_bypass_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_pwup), BYPASS_PWUP_ENTRY_SD, set_bypass_pwup_pfs, /* write */ + get_bypass_pwup_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_pwoff), BYPASS_PWOFF_ENTRY_SD, set_bypass_pwoff_pfs, /* write */ + get_bypass_pwoff_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_change), BYPASS_CHANGE_ENTRY_SD, NULL, /* write */ + get_bypass_change_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + } + + if (pbp_device_block->bp_caps & TAP_CAP) { + + if (bypass_proc_create_entry_sd(&(current_pfs->tap), TAP_ENTRY_SD, set_tap_pfs, /* write */ + get_tap_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->dis_tap), DIS_TAP_ENTRY_SD, set_dis_tap_pfs, /* write */ + get_dis_tap_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->tap_pwup), TAP_PWUP_ENTRY_SD, set_tap_pwup_pfs, /* write */ + get_tap_pwup_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->tap_change), TAP_CHANGE_ENTRY_SD, NULL, /* write */ + get_tap_change_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + } + if (pbp_device_block->bp_caps & DISC_CAP) { + + if (bypass_proc_create_entry_sd(&(current_pfs->tap), DISC_ENTRY_SD, set_disc_pfs, /* write */ + get_disc_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; +#if 1 + + if (bypass_proc_create_entry_sd(&(current_pfs->dis_tap), DIS_DISC_ENTRY_SD, set_dis_disc_pfs, /* write */ + get_dis_disc_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; +#endif + + if (bypass_proc_create_entry_sd(&(current_pfs->tap_pwup), DISC_PWUP_ENTRY_SD, set_disc_pwup_pfs, /* write */ + get_disc_pwup_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->tap_change), DISC_CHANGE_ENTRY_SD, NULL, /* write */ + get_disc_change_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + } + + if (bypass_proc_create_entry_sd(&(current_pfs->wd_exp_mode), WD_EXP_MODE_ENTRY_SD, set_wd_exp_mode_pfs, /* write */ + get_wd_exp_mode_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->wd_autoreset), WD_AUTORESET_ENTRY_SD, set_wd_autoreset_pfs, /* write */ + get_wd_autoreset_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + if (bypass_proc_create_entry_sd(&(current_pfs->tpl), TPL_ENTRY_SD, set_tpl_pfs, /* write */ + get_tpl_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; +#ifdef PMC_FIX_FLAG + if (bypass_proc_create_entry_sd(&(current_pfs->tpl), WAIT_AT_PWUP_ENTRY_SD, set_wait_at_pwup_pfs, /* write */ + get_wait_at_pwup_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + if (bypass_proc_create_entry_sd(&(current_pfs->tpl), HW_RESET_ENTRY_SD, set_hw_reset_pfs, /* write */ + get_hw_reset_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + +#endif + + } + if (ret < 0) + printk(KERN_DEBUG "Create proc entry failed\n"); + + return ret; +} + +int bypass_proc_remove_dev_sd(bpctl_dev_t * pbp_device_block) +{ + + struct bypass_pfs_sd *current_pfs = &pbp_device_block->bypass_pfs_set; + struct proc_dir_entry *pde = current_pfs->bypass_entry, *pde_curr = + NULL; + char name[256]; + + if (!pde) + return 0; + for (pde = pde->subdir; pde;) { + strcpy(name, pde->name); + pde_curr = pde; + pde = pde->next; + remove_proc_entry(name, current_pfs->bypass_entry); + } + if (!pde) + remove_proc_entry(current_pfs->dir_name, bp_procfs_dir); + current_pfs->bypass_entry = NULL; + + return 0; +} diff --git a/trunk/drivers/staging/silicom/bp_mod.h b/trunk/drivers/staging/silicom/bp_mod.h new file mode 100644 index 000000000000..9e488c0910b6 --- /dev/null +++ b/trunk/drivers/staging/silicom/bp_mod.h @@ -0,0 +1,703 @@ +/******************************************************************************/ +/* */ +/* Bypass Control utility, Copyright (c) 2005 Silicom */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* */ +/* bp_mod.h */ +/* */ +/******************************************************************************/ + +#ifndef BP_MOD_H +#define BP_MOD_H +#include "bits.h" + +#define EXPORT_SYMBOL_NOVERS EXPORT_SYMBOL + +#define usec_delay(x) udelay(x) +#ifndef msec_delay_bp +#define msec_delay_bp(x) do { \ + int i; \ + if(1) { \ + for(i = 0; i < 1000; i++) \ + { \ + udelay(x) ; \ + } \ + } else { \ + msleep(x); \ + } } while(0) + +#endif + +#include + +#ifndef jiffies_to_msecs +#define jiffies_to_msecs(x) _kc_jiffies_to_msecs(x) +static inline unsigned int jiffies_to_msecs(const unsigned long j) +{ +#if HZ <= 1000 && !(1000 % HZ) + return (1000 / HZ) * j; +#elif HZ > 1000 && !(HZ % 1000) + return (j + (HZ / 1000) - 1) / (HZ / 1000); +#else + return (j * 1000) / HZ; +#endif +} +#endif + +#define SILICOM_VID 0x1374 +#define SILICOM_SVID 0x1374 + +#define SILICOM_PXG2BPFI_SSID 0x0026 +#define SILICOM_PXG2BPFILX_SSID 0x0027 +#define SILICOM_PXGBPI_SSID 0x0028 +#define SILICOM_PXGBPIG_SSID 0x0029 +#define SILICOM_PXG2TBFI_SSID 0x002a +#define SILICOM_PXG4BPI_SSID 0x002c +#define SILICOM_PXG4BPFI_SSID 0x002d +#define SILICOM_PXG4BPFILX_SSID 0x002e +#define SILICOM_PXG2BPFIL_SSID 0x002F +#define SILICOM_PXG2BPFILLX_SSID 0x0030 +#define SILICOM_PEG4BPI_SSID 0x0031 +#define SILICOM_PEG2BPI_SSID 0x0037 +#define SILICOM_PEG4BPIN_SSID 0x0038 +#define SILICOM_PEG2BPFI_SSID 0x0039 +#define SILICOM_PEG2BPFILX_SSID 0x003A +#define SILICOM_PMCXG2BPFI_SSID 0x003B +#define NOKIA_PMCXG2BPFIN_SSID 0x0510 +#define NOKIA_PMCXG2BPIN_SSID 0x0513 +#define NOKIA_PMCXG4BPIN_SSID 0x0514 +#define NOKIA_PMCXG2BPFIN_SVID 0x13B8 +#define NOKIA_PMCXG2BPIN2_SSID 0x0515 +#define NOKIA_PMCXG4BPIN2_SSID 0x0516 +#define SILICOM_PMCX2BPI_SSID 0x041 +#define SILICOM_PMCX4BPI_SSID 0x042 +#define SILICOM_PXG2BISC1_SSID 0x003d +#define SILICOM_PEG2TBFI_SSID 0x003E +#define SILICOM_PXG2TBI_SSID 0x003f +#define SILICOM_PXG4BPFID_SSID 0x0043 +#define SILICOM_PEG4BPFI_SSID 0x0040 +#define SILICOM_PEG4BPIPT_SSID 0x0044 +#define SILICOM_PXG6BPI_SSID 0x0045 +#define SILICOM_PEG4BPIL_SSID 0x0046 +#define SILICOM_PEG2BPI5_SSID 0x0052 +#define SILICOM_PEG6BPI_SSID 0x0053 +#define SILICOM_PEG4BPFI5_SSID 0x0050 +#define SILICOM_PEG4BPFI5LX_SSID 0x0051 +#define SILICOM_PEG2BISC6_SSID 0x54 + +#define SILICOM_PEG6BPIFC_SSID 0x55 + +#define SILICOM_PEG2BPFI5_SSID 0x0056 +#define SILICOM_PEG2BPFI5LX_SSID 0x0057 + +#define SILICOM_PXEG4BPFI_SSID 0x0058 + +#define SILICOM_PEG2BPFID_SSID 0x0047 +#define SILICOM_PEG2BPFIDLX_SSID 0x004C +#define SILICOM_MEG2BPFILN_SSID 0x0048 +#define SILICOM_MEG2BPFINX_SSID 0x0049 +#define SILICOM_PEG4BPFILX_SSID 0x004A +#define SILICOM_MHIO8AD_SSID 0x004F + +#define SILICOM_MEG2BPFILXLN_SSID 0x004b +#define SILICOM_PEG2BPIX1_SSID 0x004d +#define SILICOM_MEG2BPFILXNX_SSID 0x004e + +#define SILICOM_PE10G2BPISR_SSID 0x0102 +#define SILICOM_PE10G2BPILR_SSID 0x0103 +#define SILICOM_PE10G2BPICX4_SSID 0x0101 + +#define SILICOM_XE10G2BPILR_SSID 0x0163 +#define SILICOM_XE10G2BPISR_SSID 0x0162 +#define SILICOM_XE10G2BPICX4_SSID 0x0161 +#define SILICOM_XE10G2BPIT_SSID 0x0160 + +#define SILICOM_PE10GDBISR_SSID 0x0181 +#define SILICOM_PE10GDBILR_SSID 0x0182 + +#define SILICOM_PE210G2DBi9SR_SSID 0x0188 +#define SILICOM_PE210G2DBi9SRRB_SSID 0x0188 +#define SILICOM_PE210G2DBi9LR_SSID 0x0189 +#define SILICOM_PE210G2DBi9LRRB_SSID 0x0189 +#define SILICOM_PE310G4DBi940SR_SSID 0x018C + +#define SILICOM_PE310G4BPi9T_SSID 0x130 +#define SILICOM_PE310G4BPi9SR_SSID 0x132 +#define SILICOM_PE310G4BPi9LR_SSID 0x133 + +#define NOKIA_XE10G2BPIXR_SVID 0x13B8 +#define NOKIA_XE10G2BPIXR_SSID 0x051C + +#define INTEL_PEG4BPII_PID 0x10A0 +#define INTEL_PEG4BPFII_PID 0x10A1 +#define INTEL_PEG4BPII_SSID 0x11A0 +#define INTEL_PEG4BPFII_SSID 0x11A1 + +#define INTEL_PEG4BPIIO_SSID 0x10A0 +#define INTEL_PEG4BPIIO_PID 0x105e + +#define BROADCOM_VID 0x14e4 +#define BROADCOM_PE10G2_PID 0x164e + +#define SILICOM_PE10G2BPTCX4_SSID 0x0141 +#define SILICOM_PE10G2BPTSR_SSID 0x0142 +#define SILICOM_PE10G2BPTLR_SSID 0x0143 +#define SILICOM_PE10G2BPTT_SSID 0x0140 + +#define SILICOM_PEG4BPI6_SSID 0x0320 +#define SILICOM_PEG4BPFI6_SSID 0x0321 +#define SILICOM_PEG4BPFI6LX_SSID 0x0322 +#define SILICOM_PEG4BPFI6ZX_SSID 0x0323 + +#define SILICOM_PEG2BPI6_SSID 0x0300 +#define SILICOM_PEG2BPFI6_SSID 0x0301 +#define SILICOM_PEG2BPFI6LX_SSID 0x0302 +#define SILICOM_PEG2BPFI6ZX_SSID 0x0303 +#define SILICOM_PEG2BPFI6FLXM_SSID 0x0304 + +#define SILICOM_PEG2DBI6_SSID 0x0308 +#define SILICOM_PEG2DBFI6_SSID 0x0309 +#define SILICOM_PEG2DBFI6LX_SSID 0x030A +#define SILICOM_PEG2DBFI6ZX_SSID 0x030B + +#define SILICOM_MEG2BPI6_SSID 0x0310 +#define SILICOM_XEG2BPI6_SSID 0x0318 +#define SILICOM_PEG4BPI6FC_SSID 0x0328 +#define SILICOM_PEG4BPFI6FC_SSID 0x0329 +#define SILICOM_PEG4BPFI6FCLX_SSID 0x032A +#define SILICOM_PEG4BPFI6FCZX_SSID 0x032B + +#define SILICOM_PEG6BPI6_SSID 0x0340 + +#define SILICOM_PEG2BPI6SC6_SSID 0x0360 + +#define SILICOM_MEG2BPI6_SSID 0x0310 +#define SILICOM_XEG2BPI6_SSID 0x0318 +#define SILICOM_MEG4BPI6_SSID 0x0330 + +#define SILICOM_PE2G4BPi80L_SSID 0x0380 + +#define SILICOM_M6E2G8BPi80A_SSID 0x0474 + +#define SILICOM_PE2G4BPi35_SSID 0x03d8 + +#define SILICOM_PE2G4BPFi80_SSID 0x0381 +#define SILICOM_PE2G4BPFi80LX_SSID 0x0382 +#define SILICOM_PE2G4BPFi80ZX_SSID 0x0383 + +#define SILICOM_PE2G4BPi80_SSID 0x0388 + +#define SILICOM_PE2G2BPi80_SSID 0x0390 +#define SILICOM_PE2G2BPFi80_SSID 0x0391 +#define SILICOM_PE2G2BPFi80LX_SSID 0x0392 +#define SILICOM_PE2G2BPFi80ZX_SSID 0x0393 + +#define SILICOM_PE2G4BPi35L_SSID 0x03D0 +#define SILICOM_PE2G4BPFi35_SSID 0x03D1 +#define SILICOM_PE2G4BPFi35LX_SSID 0x03D2 +#define SILICOM_PE2G4BPFi35ZX_SSID 0x03D3 + +#define SILICOM_PE2G2BPi35_SSID 0x03c0 +#define SILICOM_PAC1200BPi35_SSID 0x03cc +#define SILICOM_PE2G2BPFi35_SSID 0x03C1 +#define SILICOM_PE2G2BPFi35LX_SSID 0x03C2 +#define SILICOM_PE2G2BPFi35ZX_SSID 0x03C3 + +#define SILICOM_PE2G6BPi35_SSID 0x03E0 +#define SILICOM_PE2G6BPi35CX_SSID 0x0AA0 + +#define INTEL_PE210G2SPI9_SSID 0x00C + +#define SILICOM_M1EG2BPI6_SSID 0x400 + +#define SILICOM_M1EG2BPFI6_SSID 0x0401 +#define SILICOM_M1EG2BPFI6LX_SSID 0x0402 +#define SILICOM_M1EG2BPFI6ZX_SSID 0x0403 + +#define SILICOM_M1EG4BPI6_SSID 0x0420 + +#define SILICOM_M1EG4BPFI6_SSID 0x0421 +#define SILICOM_M1EG4BPFI6LX_SSID 0x0422 +#define SILICOM_M1EG4BPFI6ZX_SSID 0x0423 + +#define SILICOM_M1EG6BPI6_SSID 0x0440 + +#define SILICOM_M1E2G4BPi80_SSID 0x0460 +#define SILICOM_M1E2G4BPFi80_SSID 0x0461 +#define SILICOM_M1E2G4BPFi80LX_SSID 0x0462 +#define SILICOM_M1E2G4BPFi80ZX_SSID 0x0463 + +#define SILICOM_M6E2G8BPi80_SSID 0x0470 +#define SILICOM_PE210G2BPi40_SSID 0x01a0 + +#define PEG540_IF_SERIES(pid) \ + ((pid==SILICOM_PE210G2BPi40_SSID)) + +#define OLD_IF_SERIES(pid) \ + ((pid==SILICOM_PXG2BPFI_SSID)|| \ + (pid==SILICOM_PXG2BPFILX_SSID)) + +#define P2BPFI_IF_SERIES(pid) \ + ((pid==SILICOM_PXG2BPFI_SSID)|| \ + (pid==SILICOM_PXG2BPFILX_SSID)|| \ + (pid==SILICOM_PEG2BPFI_SSID)|| \ + (pid==SILICOM_PEG2BPFID_SSID)|| \ + (pid==SILICOM_PEG2BPFIDLX_SSID)|| \ + (pid==SILICOM_MEG2BPFILN_SSID)|| \ + (pid==SILICOM_MEG2BPFINX_SSID)|| \ + (pid==SILICOM_PEG4BPFILX_SSID)|| \ + (pid==SILICOM_PEG4BPFI_SSID)|| \ + (pid==SILICOM_PXEG4BPFI_SSID)|| \ + (pid==SILICOM_PXG4BPFID_SSID)|| \ + (pid==SILICOM_PEG2TBFI_SSID)|| \ + (pid==SILICOM_PE10G2BPISR_SSID)|| \ + (pid==SILICOM_PE10G2BPILR_SSID)|| \ + (pid==SILICOM_PEG2BPFILX_SSID)|| \ + (pid==SILICOM_PMCXG2BPFI_SSID) || \ + (pid==SILICOM_MHIO8AD_SSID) || \ + (pid==SILICOM_PEG4BPFI5LX_SSID) || \ + (pid==SILICOM_PEG4BPFI5_SSID) || \ + (pid==SILICOM_PEG4BPFI6FC_SSID) || \ + (pid==SILICOM_PEG4BPFI6FCLX_SSID) || \ + (pid==SILICOM_PEG4BPFI6FCZX_SSID) || \ + (pid==NOKIA_PMCXG2BPFIN_SSID)|| \ + (pid==SILICOM_MEG2BPFILXLN_SSID)|| \ + (pid==SILICOM_MEG2BPFILXNX_SSID)|| \ + (pid==SILICOM_XE10G2BPIT_SSID)|| \ + (pid==SILICOM_XE10G2BPICX4_SSID)|| \ + (pid==SILICOM_XE10G2BPISR_SSID)|| \ + (pid==NOKIA_XE10G2BPIXR_SSID)|| \ + (pid==SILICOM_PE10GDBISR_SSID)|| \ + (pid==SILICOM_PE10GDBILR_SSID)|| \ + (pid==SILICOM_XE10G2BPILR_SSID)) + +#define INTEL_IF_SERIES(pid) \ + ((pid==INTEL_PEG4BPII_SSID)|| \ + (pid==INTEL_PEG4BPIIO_SSID)|| \ + (pid==INTEL_PEG4BPFII_SSID)) + +#define NOKIA_SERIES(pid) \ + ((pid==NOKIA_PMCXG2BPIN_SSID)|| \ + (pid==NOKIA_PMCXG4BPIN_SSID)|| \ + (pid==SILICOM_PMCX4BPI_SSID)|| \ + (pid==NOKIA_PMCXG2BPFIN_SSID)|| \ + (pid==SILICOM_PMCXG2BPFI_SSID)|| \ + (pid==NOKIA_PMCXG2BPIN2_SSID)|| \ + (pid==NOKIA_PMCXG4BPIN2_SSID)|| \ + (pid==SILICOM_PMCX2BPI_SSID)) + +#define DISCF_IF_SERIES(pid) \ + (pid==SILICOM_PEG2TBFI_SSID) + +#define PEGF_IF_SERIES(pid) \ + ((pid==SILICOM_PEG2BPFI_SSID)|| \ + (pid==SILICOM_PEG2BPFID_SSID)|| \ + (pid==SILICOM_PEG2BPFIDLX_SSID)|| \ + (pid==SILICOM_PEG2BPFILX_SSID)|| \ + (pid==SILICOM_PEG4BPFI_SSID)|| \ + (pid==SILICOM_PXEG4BPFI_SSID)|| \ + (pid==SILICOM_MEG2BPFILN_SSID)|| \ + (pid==SILICOM_MEG2BPFINX_SSID)|| \ + (pid==SILICOM_PEG4BPFILX_SSID)|| \ + (pid==SILICOM_PEG2TBFI_SSID)|| \ + (pid==SILICOM_MEG2BPFILXLN_SSID)|| \ + (pid==SILICOM_MEG2BPFILXNX_SSID)) + +#define TPL_IF_SERIES(pid) \ + ((pid==SILICOM_PXG2BPFIL_SSID)|| \ + (pid==SILICOM_PXG2BPFILLX_SSID)|| \ + (pid==SILICOM_PXG2TBFI_SSID)|| \ + (pid==SILICOM_PXG4BPFID_SSID)|| \ + (pid==SILICOM_PXG4BPFI_SSID)) + +#define BP10G_IF_SERIES(pid) \ + ((pid==SILICOM_PE10G2BPISR_SSID)|| \ + (pid==SILICOM_PE10G2BPICX4_SSID)|| \ + (pid==SILICOM_PE10G2BPILR_SSID)|| \ + (pid==SILICOM_XE10G2BPIT_SSID)|| \ + (pid==SILICOM_XE10G2BPICX4_SSID)|| \ + (pid==SILICOM_XE10G2BPISR_SSID)|| \ + (pid==NOKIA_XE10G2BPIXR_SSID)|| \ + (pid==SILICOM_PE10GDBISR_SSID)|| \ + (pid==SILICOM_PE10GDBILR_SSID)|| \ + (pid==SILICOM_XE10G2BPILR_SSID)) + +#define BP10GB_IF_SERIES(pid) \ + ((pid==SILICOM_PE10G2BPTCX4_SSID)|| \ + (pid==SILICOM_PE10G2BPTSR_SSID)|| \ + (pid==SILICOM_PE10G2BPTLR_SSID)|| \ + (pid==SILICOM_PE10G2BPTT_SSID)) + +#define BP10G_CX4_SERIES(pid) \ + (pid==SILICOM_PE10G2BPICX4_SSID) + +#define BP10GB_CX4_SERIES(pid) \ + (pid==SILICOM_PE10G2BPTCX4_SSID) + +#define SILICOM_M2EG2BPFI6_SSID 0x0501 +#define SILICOM_M2EG2BPFI6LX_SSID 0x0502 +#define SILICOM_M2EG2BPFI6ZX_SSID 0x0503 +#define SILICOM_M2EG4BPI6_SSID 0x0520 + +#define SILICOM_M2EG4BPFI6_SSID 0x0521 +#define SILICOM_M2EG4BPFI6LX_SSID 0x0522 +#define SILICOM_M2EG4BPFI6ZX_SSID 0x0523 + +#define SILICOM_M2EG6BPI6_SSID 0x0540 + +#define SILICOM_M1E10G2BPI9CX4_SSID 0x481 +#define SILICOM_M1E10G2BPI9SR_SSID 0x482 +#define SILICOM_M1E10G2BPI9LR_SSID 0x483 +#define SILICOM_M1E10G2BPI9T_SSID 0x480 + +#define SILICOM_M2E10G2BPI9CX4_SSID 0x581 +#define SILICOM_M2E10G2BPI9SR_SSID 0x582 +#define SILICOM_M2E10G2BPI9LR_SSID 0x583 +#define SILICOM_M2E10G2BPI9T_SSID 0x580 + +#define SILICOM_PE210G2BPI9CX4_SSID 0x121 +#define SILICOM_PE210G2BPI9SR_SSID 0x122 +#define SILICOM_PE210G2BPI9LR_SSID 0x123 +#define SILICOM_PE210G2BPI9T_SSID 0x120 + +#define DBI_IF_SERIES(pid) \ +((pid==SILICOM_PE10GDBISR_SSID)|| \ + (pid==SILICOM_PE10GDBILR_SSID)|| \ + (pid==SILICOM_XE10G2BPILR_SSID)|| \ + (pid==SILICOM_PE210G2DBi9LR_SSID)) + +#define PEGF5_IF_SERIES(pid) \ +((pid==SILICOM_PEG2BPFI5_SSID)|| \ + (pid==SILICOM_PEG2BPFI5LX_SSID)|| \ + (pid==SILICOM_PEG4BPFI6_SSID)|| \ + (pid==SILICOM_PEG4BPFI6LX_SSID)|| \ + (pid==SILICOM_PEG4BPFI6ZX_SSID)|| \ + (pid==SILICOM_PEG2BPFI6_SSID)|| \ + (pid==SILICOM_PEG2BPFI6LX_SSID)|| \ + (pid==SILICOM_PEG2BPFI6ZX_SSID)|| \ + (pid==SILICOM_PEG2BPFI6FLXM_SSID)|| \ + (pid==SILICOM_PEG2DBFI6_SSID)|| \ + (pid==SILICOM_PEG2DBFI6LX_SSID)|| \ + (pid==SILICOM_PEG2DBFI6ZX_SSID)|| \ + (pid==SILICOM_PEG4BPI6FC_SSID)|| \ + (pid==SILICOM_PEG4BPFI6FCLX_SSID)|| \ + (pid==SILICOM_PEG4BPI6FC_SSID)|| \ + (pid==SILICOM_M1EG2BPFI6_SSID)|| \ + (pid==SILICOM_M1EG2BPFI6LX_SSID)|| \ + (pid==SILICOM_M1EG2BPFI6ZX_SSID)|| \ + (pid==SILICOM_M1EG4BPFI6_SSID)|| \ + (pid==SILICOM_M1EG4BPFI6LX_SSID)|| \ + (pid==SILICOM_M1EG4BPFI6ZX_SSID)|| \ + (pid==SILICOM_M2EG2BPFI6_SSID)|| \ + (pid==SILICOM_M2EG2BPFI6LX_SSID)|| \ + (pid==SILICOM_M2EG2BPFI6ZX_SSID)|| \ + (pid==SILICOM_M2EG4BPFI6_SSID)|| \ + (pid==SILICOM_M2EG4BPFI6LX_SSID)|| \ + (pid==SILICOM_M2EG4BPFI6ZX_SSID)|| \ + (pid==SILICOM_PEG4BPFI6FCZX_SSID)) + +#define PEG5_IF_SERIES(pid) \ +((pid==SILICOM_PEG4BPI6_SSID)|| \ +(pid==SILICOM_PEG2BPI6_SSID)|| \ +(pid==SILICOM_PEG4BPI6FC_SSID)|| \ +(pid==SILICOM_PEG6BPI6_SSID)|| \ +(pid==SILICOM_PEG2BPI6SC6_SSID)|| \ +(pid==SILICOM_MEG2BPI6_SSID)|| \ +(pid==SILICOM_XEG2BPI6_SSID)|| \ +(pid==SILICOM_MEG4BPI6_SSID)|| \ +(pid==SILICOM_M1EG2BPI6_SSID)|| \ +(pid==SILICOM_M1EG4BPI6_SSID)|| \ +(pid==SILICOM_M1EG6BPI6_SSID)|| \ +(pid==SILICOM_PEG6BPI_SSID)|| \ +(pid==SILICOM_PEG4BPIL_SSID)|| \ +(pid==SILICOM_PEG2BISC6_SSID)|| \ +(pid==SILICOM_PEG2BPI5_SSID)) + +#define PEG80_IF_SERIES(pid) \ +((pid==SILICOM_M1E2G4BPi80_SSID)|| \ +(pid==SILICOM_M6E2G8BPi80_SSID)|| \ +(pid==SILICOM_PE2G4BPi80L_SSID)|| \ +(pid==SILICOM_M6E2G8BPi80A_SSID)|| \ +(pid==SILICOM_PE2G2BPi35_SSID)|| \ +(pid==SILICOM_PAC1200BPi35_SSID)|| \ +(pid==SILICOM_PE2G4BPi35_SSID)|| \ +(pid==SILICOM_PE2G4BPi35L_SSID)|| \ +(pid==SILICOM_PE2G6BPi35_SSID)|| \ +(pid==SILICOM_PE2G2BPi80_SSID)|| \ +(pid==SILICOM_PE2G4BPi80_SSID)|| \ +(pid==SILICOM_PE2G4BPFi80_SSID)|| \ +(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \ +(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \ +(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \ +(pid==SILICOM_PE2G2BPFi80_SSID)|| \ +(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \ +(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \ +(pid==SILICOM_PE2G2BPFi35_SSID)|| \ +(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \ +(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \ +(pid==SILICOM_PE2G4BPFi35_SSID)|| \ +(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \ +(pid==SILICOM_PE2G4BPFi35ZX_SSID)) + +#define PEGF80_IF_SERIES(pid) \ +((pid==SILICOM_PE2G4BPFi80_SSID)|| \ +(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \ +(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \ +(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \ +(pid==SILICOM_M1E2G4BPFi80_SSID)|| \ +(pid==SILICOM_M1E2G4BPFi80LX_SSID)|| \ +(pid==SILICOM_M1E2G4BPFi80ZX_SSID)|| \ +(pid==SILICOM_PE2G2BPFi80_SSID)|| \ +(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \ +(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \ +(pid==SILICOM_PE2G2BPFi35_SSID)|| \ +(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \ +(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \ +(pid==SILICOM_PE2G4BPFi35_SSID)|| \ +(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \ +(pid==SILICOM_PE2G4BPFi35ZX_SSID)) + +#define BP10G9_IF_SERIES(pid) \ +((pid==INTEL_PE210G2SPI9_SSID)|| \ +(pid==SILICOM_M1E10G2BPI9CX4_SSID)|| \ +(pid==SILICOM_M1E10G2BPI9SR_SSID)|| \ +(pid==SILICOM_M1E10G2BPI9LR_SSID)|| \ +(pid==SILICOM_M1E10G2BPI9T_SSID)|| \ +(pid==SILICOM_M2E10G2BPI9CX4_SSID)|| \ +(pid==SILICOM_M2E10G2BPI9SR_SSID)|| \ +(pid==SILICOM_M2E10G2BPI9LR_SSID)|| \ +(pid==SILICOM_M2E10G2BPI9T_SSID)|| \ +(pid==SILICOM_PE210G2BPI9CX4_SSID)|| \ +(pid==SILICOM_PE210G2BPI9SR_SSID)|| \ +(pid==SILICOM_PE210G2BPI9LR_SSID)|| \ +(pid==SILICOM_PE210G2DBi9SR_SSID)|| \ +(pid==SILICOM_PE210G2DBi9SRRB_SSID)|| \ +(pid==SILICOM_PE210G2DBi9LR_SSID)|| \ +(pid==SILICOM_PE210G2DBi9LRRB_SSID)|| \ +(pid==SILICOM_PE310G4DBi940SR_SSID)|| \ +(pid==SILICOM_PEG2BISC6_SSID)|| \ +(pid==SILICOM_PE310G4BPi9T_SSID)|| \ +(pid==SILICOM_PE310G4BPi9SR_SSID)|| \ +(pid==SILICOM_PE310G4BPi9LR_SSID)|| \ +(pid==SILICOM_PE210G2BPI9T_SSID)) + +/*******************************************************/ +/* 1G INTERFACE ****************************************/ +/*******************************************************/ + +/* Intel Registers */ +#define BPCTLI_CTRL 0x00000 +#define BPCTLI_CTRL_SWDPIO0 0x00400000 +#define BPCTLI_CTRL_SWDPIN0 0x00040000 + +#define BPCTLI_CTRL_EXT 0x00018 /* Extended Device Control - RW */ +#define BPCTLI_STATUS 0x00008 /* Device Status - RO */ + +/* HW related */ +#define BPCTLI_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW Defineable Pin 6 */ +#define BPCTLI_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */ +#define BPCTLI_CTRL_SDP0_DATA 0x00040000 /* SWDPIN 0 value */ +#define BPCTLI_CTRL_EXT_SDP6_DIR 0x00000400 /* Direction of SDP6 0=in 1=out */ +#define BPCTLI_CTRL_EXT_SDP7_DIR 0x00000800 /* Direction of SDP7 0=in 1=out */ +#define BPCTLI_CTRL_SDP0_DIR 0x00400000 /* SDP0 Input or output */ +#define BPCTLI_CTRL_SWDPIN1 0x00080000 +#define BPCTLI_CTRL_SDP1_DIR 0x00800000 + +#define BPCTLI_STATUS_LU 0x00000002 /* Link up.0=no,1=link */ + +#define BPCTLI_CTRL_SDP0_SHIFT 18 +#define BPCTLI_CTRL_EXT_SDP6_SHIFT 6 + +#define BPCTLI_STATUS_TBIMODE 0x00000020 +#define BPCTLI_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000 +#define BPCTLI_CTRL_EXT_LINK_MODE_MASK 0x00C00000 + +#define BPCTLI_CTRL_EXT_MCLK_DIR BPCTLI_CTRL_EXT_SDP7_DIR +#define BPCTLI_CTRL_EXT_MCLK_DATA BPCTLI_CTRL_EXT_SDP7_DATA +#define BPCTLI_CTRL_EXT_MDIO_DIR BPCTLI_CTRL_EXT_SDP6_DIR +#define BPCTLI_CTRL_EXT_MDIO_DATA BPCTLI_CTRL_EXT_SDP6_DATA + +#define BPCTLI_CTRL_EXT_MCLK_DIR5 BPCTLI_CTRL_SDP1_DIR +#define BPCTLI_CTRL_EXT_MCLK_DATA5 BPCTLI_CTRL_SWDPIN1 +#define BPCTLI_CTRL_EXT_MCLK_DIR80 BPCTLI_CTRL_EXT_SDP6_DIR +#define BPCTLI_CTRL_EXT_MCLK_DATA80 BPCTLI_CTRL_EXT_SDP6_DATA +#define BPCTLI_CTRL_EXT_MDIO_DIR5 BPCTLI_CTRL_SWDPIO0 +#define BPCTLI_CTRL_EXT_MDIO_DATA5 BPCTLI_CTRL_SWDPIN0 +#define BPCTLI_CTRL_EXT_MDIO_DIR80 BPCTLI_CTRL_SWDPIO0 +#define BPCTLI_CTRL_EXT_MDIO_DATA80 BPCTLI_CTRL_SWDPIN0 + +#define BPCTL_WRITE_REG(a, reg, value) \ + (writel((value), (void *)(((a)->mem_map) + BPCTLI_##reg))) + +#define BPCTL_READ_REG(a, reg) ( \ + readl((void *)((a)->mem_map) + BPCTLI_##reg)) + +#define BPCTL_WRITE_FLUSH(a) BPCTL_READ_REG(a, STATUS) + +#define BPCTL_BP_WRITE_REG(a, reg, value) ({ \ + BPCTL_WRITE_REG(a, reg, value); \ + BPCTL_WRITE_FLUSH(a);}) + +/**************************************************************/ +/************** 82575 Interface********************************/ +/**************************************************************/ + +#define BPCTLI_MII_CR_POWER_DOWN 0x0800 +#define BPCTLI_PHY_CONTROL 0x00 /* Control Register */ +#define BPCTLI_MDIC 0x00020 /* MDI Control - RW */ +#define BPCTLI_IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */ +#define BPCTLI_MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ + +#define BPCTLI_MDIC_DATA_MASK 0x0000FFFF +#define BPCTLI_MDIC_REG_MASK 0x001F0000 +#define BPCTLI_MDIC_REG_SHIFT 16 +#define BPCTLI_MDIC_PHY_MASK 0x03E00000 +#define BPCTLI_MDIC_PHY_SHIFT 21 +#define BPCTLI_MDIC_OP_WRITE 0x04000000 +#define BPCTLI_MDIC_OP_READ 0x08000000 +#define BPCTLI_MDIC_READY 0x10000000 +#define BPCTLI_MDIC_INT_EN 0x20000000 +#define BPCTLI_MDIC_ERROR 0x40000000 + +#define BPCTLI_SWFW_PHY0_SM 0x02 +#define BPCTLI_SWFW_PHY1_SM 0x04 + +#define BPCTLI_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */ + +#define BPCTLI_SWSM 0x05B50 /* SW Semaphore */ +#define BPCTLI_FWSM 0x05B54 /* FW Semaphore */ + +#define BPCTLI_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */ +#define BPCTLI_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */ +#define BPCTLI_MAX_PHY_MULTI_PAGE_REG 0xF +#define BPCTLI_GEN_POLL_TIMEOUT 640 + +/********************************************************/ + +/********************************************************/ +/* 10G INTERFACE ****************************************/ +/********************************************************/ + +#define BP10G_I2CCTL 0x28 + +/* I2CCTL Bit Masks */ +#define BP10G_I2C_CLK_IN 0x00000001 +#define BP10G_I2C_CLK_OUT 0x00000002 +#define BP10G_I2C_DATA_IN 0x00000004 +#define BP10G_I2C_DATA_OUT 0x00000008 + +#define BP10G_ESDP 0x20 + +#define BP10G_SDP0_DIR 0x100 +#define BP10G_SDP1_DIR 0x200 +#define BP10G_SDP3_DIR 0x800 +#define BP10G_SDP4_DIR BIT_12 +#define BP10G_SDP5_DIR 0x2000 +#define BP10G_SDP0_DATA 0x001 +#define BP10G_SDP1_DATA 0x002 +#define BP10G_SDP3_DATA 0x008 +#define BP10G_SDP4_DATA 0x010 +#define BP10G_SDP5_DATA 0x020 + +#define BP10G_SDP2_DIR 0x400 +#define BP10G_SDP2_DATA 0x4 + +#define BP10G_EODSDP 0x28 + +#define BP10G_SDP6_DATA_IN 0x001 +#define BP10G_SDP6_DATA_OUT 0x002 + +#define BP10G_SDP7_DATA_IN 0x004 +#define BP10G_SDP7_DATA_OUT 0x008 + +#define BP10G_MCLK_DATA_OUT BP10G_SDP7_DATA_OUT +#define BP10G_MDIO_DATA_OUT BP10G_SDP6_DATA_OUT +#define BP10G_MDIO_DATA_IN BP10G_SDP6_DATA_IN + +#define BP10G_MDIO_DATA /*BP10G_SDP5_DATA*/ BP10G_SDP3_DATA +#define BP10G_MDIO_DIR /*BP10G_SDP5_DIR*/ BP10G_SDP3_DATA + +/*#define BP10G_MCLK_DATA_OUT9 BP10G_I2C_CLK_OUT +#define BP10G_MDIO_DATA_OUT9 BP10G_I2C_DATA_OUT*/ + + /*#define BP10G_MCLK_DATA_OUT9*//*BP10G_I2C_DATA_OUT */ +#define BP10G_MDIO_DATA_OUT9 BP10G_I2C_DATA_OUT /*BP10G_I2C_CLK_OUT */ + +/* VIA EOSDP ! */ +#define BP10G_MCLK_DATA_OUT9 BP10G_SDP4_DATA +#define BP10G_MCLK_DIR_OUT9 BP10G_SDP4_DIR + +/*#define BP10G_MDIO_DATA_IN9 BP10G_I2C_DATA_IN*/ + +#define BP10G_MDIO_DATA_IN9 BP10G_I2C_DATA_IN /*BP10G_I2C_CLK_IN */ + +#define BP540_MDIO_DATA /*BP10G_SDP5_DATA*/ BP10G_SDP0_DATA +#define BP540_MDIO_DIR /*BP10G_SDP5_DIR*/ BP10G_SDP0_DIR +#define BP540_MCLK_DATA BP10G_SDP2_DATA +#define BP540_MCLK_DIR BP10G_SDP2_DIR + +#define BP10G_WRITE_REG(a, reg, value) \ + (writel((value), (void *)(((a)->mem_map) + BP10G_##reg))) + +#define BP10G_READ_REG(a, reg) ( \ + readl((void *)((a)->mem_map) + BP10G_##reg)) + +/*****BROADCOM*******************************************/ + +#define BP10GB_MISC_REG_GPIO 0xa490 +#define BP10GB_GPIO3_P0 BIT_3 +#define BP10GB_GPIO3_P1 BIT_7 + +#define BP10GB_GPIO3_SET_P0 BIT_11 +#define BP10GB_GPIO3_CLR_P0 BIT_19 +#define BP10GB_GPIO3_OE_P0 BIT_27 + +#define BP10GB_GPIO3_SET_P1 BIT_15 +#define BP10GB_GPIO3_CLR_P1 BIT_23 +#define BP10GB_GPIO3_OE_P1 BIT_31 + +#define BP10GB_GPIO0_P1 0x10 +#define BP10GB_GPIO0_P0 0x1 +#define BP10GB_GPIO0_CLR_P0 0x10000 +#define BP10GB_GPIO0_CLR_P1 0x100000 +#define BP10GB_GPIO0_SET_P0 0x100 +#define BP10GB_GPIO0_SET_P1 0x1000 + +#define BP10GB_GPIO0_OE_P1 0x10000000 +#define BP10GB_GPIO0_OE_P0 0x1000000 + +#define BP10GB_MISC_REG_SPIO 0xa4fc +#define BP10GB_GPIO4_OE BIT_28 +#define BP10GB_GPIO5_OE BIT_29 +#define BP10GB_GPIO4_CLR BIT_20 +#define BP10GB_GPIO5_CLR BIT_21 +#define BP10GB_GPIO4_SET BIT_12 +#define BP10GB_GPIO5_SET BIT_13 +#define BP10GB_GPIO4 BIT_4 +#define BP10GB_GPIO5 BIT_5 + +#define BP10GB_MCLK_DIR BP10GB_GPIO5_OE +#define BP10GB_MDIO_DIR BP10GB_GPIO4_OE + +#define BP10GB_MCLK_DATA BP10GB_GPIO5 +#define BP10GB_MDIO_DATA BP10GB_GPIO4 + +#define BP10GB_MCLK_SET BP10GB_GPIO5_SET +#define BP10GB_MDIO_SET BP10GB_GPIO4_SET + +#define BP10GB_MCLK_CLR BP10GB_GPIO5_CLR +#define BP10GB_MDIO_CLR BP10GB_GPIO4_CLR + +#define BP10GB_WRITE_REG(a, reg, value) \ + (writel((value), (void *)(((a)->mem_map) + BP10GB_##reg))) + +#define BP10GB_READ_REG(a, reg) ( \ + readl((void *)((a)->mem_map) + BP10GB_##reg)) + +#endif + +int bp_proc_create(void); diff --git a/trunk/drivers/staging/silicom/bp_proc.c b/trunk/drivers/staging/silicom/bp_proc.c new file mode 100644 index 000000000000..4fe862da759a --- /dev/null +++ b/trunk/drivers/staging/silicom/bp_proc.c @@ -0,0 +1,1351 @@ +/******************************************************************************/ +/* */ +/* Copyright (c) 2004-2006 Silicom, Ltd */ +/* All rights reserved. */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* */ +/******************************************************************************/ + +#include +#if defined(CONFIG_SMP) && ! defined(__SMP__) +#define __SMP__ +#endif + +#include +#include +#include +//#include +#include "bp_mod.h" + +#define BP_PROC_DIR "bypass" +//#define BYPASS_SUPPORT "bypass" + +#ifdef BYPASS_SUPPORT + +#define GPIO6_SET_ENTRY_SD "gpio6_set" +#define GPIO6_CLEAR_ENTRY_SD "gpio6_clear" + +#define GPIO7_SET_ENTRY_SD "gpio7_set" +#define GPIO7_CLEAR_ENTRY_SD "gpio7_clear" + +#define PULSE_SET_ENTRY_SD "pulse_set" +#define ZERO_SET_ENTRY_SD "zero_set" +#define PULSE_GET1_ENTRY_SD "pulse_get1" +#define PULSE_GET2_ENTRY_SD "pulse_get2" + +#define CMND_ON_ENTRY_SD "cmnd_on" +#define CMND_OFF_ENTRY_SD "cmnd_off" +#define RESET_CONT_ENTRY_SD "reset_cont" + + /*COMMANDS*/ +#define BYPASS_INFO_ENTRY_SD "bypass_info" +#define BYPASS_SLAVE_ENTRY_SD "bypass_slave" +#define BYPASS_CAPS_ENTRY_SD "bypass_caps" +#define WD_SET_CAPS_ENTRY_SD "wd_set_caps" +#define BYPASS_ENTRY_SD "bypass" +#define BYPASS_CHANGE_ENTRY_SD "bypass_change" +#define BYPASS_WD_ENTRY_SD "bypass_wd" +#define WD_EXPIRE_TIME_ENTRY_SD "wd_expire_time" +#define RESET_BYPASS_WD_ENTRY_SD "reset_bypass_wd" +#define DIS_BYPASS_ENTRY_SD "dis_bypass" +#define BYPASS_PWUP_ENTRY_SD "bypass_pwup" +#define BYPASS_PWOFF_ENTRY_SD "bypass_pwoff" +#define STD_NIC_ENTRY_SD "std_nic" +#define STD_NIC_ENTRY_SD "std_nic" +#define TAP_ENTRY_SD "tap" +#define TAP_CHANGE_ENTRY_SD "tap_change" +#define DIS_TAP_ENTRY_SD "dis_tap" +#define TAP_PWUP_ENTRY_SD "tap_pwup" +#define TWO_PORT_LINK_ENTRY_SD "two_port_link" +#define WD_EXP_MODE_ENTRY_SD "wd_exp_mode" +#define WD_AUTORESET_ENTRY_SD "wd_autoreset" +#define TPL_ENTRY_SD "tpl" +#define WAIT_AT_PWUP_ENTRY_SD "wait_at_pwup" +#define HW_RESET_ENTRY_SD "hw_reset" +#define DISC_ENTRY_SD "disc" +#define DISC_CHANGE_ENTRY_SD "disc_change" +#define DIS_DISC_ENTRY_SD "dis_disc" +#define DISC_PWUP_ENTRY_SD "disc_pwup" +#endif //bypass_support +static struct proc_dir_entry *bp_procfs_dir; + +static struct proc_dir_entry *proc_getdir(char *name, + struct proc_dir_entry *proc_dir) +{ + struct proc_dir_entry *pde = proc_dir; + for (pde = pde->subdir; pde; pde = pde->next) { + if (pde->namelen && (strcmp(name, pde->name) == 0)) { + /* directory exists */ + break; + } + } + if (pde == (struct proc_dir_entry *)0) { + /* create the directory */ + pde = create_proc_entry(name, S_IFDIR, proc_dir); + if (pde == (struct proc_dir_entry *)0) { + return (pde); + } + } + return (pde); +} + +#ifdef BYPASS_SUPPORT + +int +bypass_proc_create_entry_sd(struct pfs_unit *pfs_unit_curr, + char *proc_name, + write_proc_t * write_proc, + read_proc_t * read_proc, + struct proc_dir_entry *parent_pfs, void *data) +{ + strcpy(pfs_unit_curr->proc_name, proc_name); + pfs_unit_curr->proc_entry = create_proc_entry(pfs_unit_curr->proc_name, + S_IFREG | S_IRUSR | + S_IWUSR | S_IRGRP | + S_IWGRP | S_IROTH | + S_IWOTH, parent_pfs); + if (pfs_unit_curr->proc_entry == 0) { + + return -1; + } + + pfs_unit_curr->proc_entry->read_proc = read_proc; + pfs_unit_curr->proc_entry->write_proc = write_proc; + pfs_unit_curr->proc_entry->data = data; + + return 0; + +} + +int +get_bypass_info_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + int len = 0; + + len += sprintf(page, "Name\t\t\t%s\n", pbp_device_block->bp_name); + len += + sprintf(page + len, "Firmware version\t0x%x\n", + pbp_device_block->bp_fw_ver); + + *eof = 1; + return len; +} + +int +get_bypass_slave_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + struct pci_dev *pci_slave_dev = pbp_device_block->bp_slave; + struct net_device *net_slave_dev; + int len = 0; + + if (is_bypass_fn(pbp_device_block)) { + net_slave_dev = pci_get_drvdata(pci_slave_dev); + if (net_slave_dev) + len = sprintf(page, "%s\n", net_slave_dev->name); + else + len = sprintf(page, "fail\n"); + } else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +get_bypass_caps_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_caps_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "-1\n"); + else + len = sprintf(page, "0x%x\n", ret); + *eof = 1; + return len; + +} + +int +get_wd_set_caps_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_wd_set_caps_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "-1\n"); + else + len = sprintf(page, "0x%x\n", ret); + *eof = 1; + return len; +} + +int +set_bypass_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_bypass_fn(pbp_device_block, bypass_param); + + return count; +} + +int +set_tap_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_tap_fn(pbp_device_block, tap_param); + + return count; +} + +int +set_disc_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_disc_fn(pbp_device_block, tap_param); + + return count; +} + +int +get_bypass_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +int +get_tap_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_tap_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +int +get_disc_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_disc_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +int +get_bypass_change_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_change_fn(pbp_device_block); + if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +get_tap_change_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_tap_change_fn(pbp_device_block); + if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +get_disc_change_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_disc_change_fn(pbp_device_block); + if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +set_bypass_wd_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + unsigned int timeout = 0; + char *timeout_ptr = kbuf; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + timeout_ptr = kbuf; + timeout = atoi(&timeout_ptr); + + set_bypass_wd_fn(pbp_device_block, timeout); + + return count; +} + +int +get_bypass_wd_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0, timeout = 0; + + ret = get_bypass_wd_fn(pbp_device_block, &timeout); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (timeout == -1) + len = sprintf(page, "unknown\n"); + else if (timeout == 0) + len = sprintf(page, "disable\n"); + else + len = sprintf(page, "%d\n", timeout); + + *eof = 1; + return len; +} + +int +get_wd_expire_time_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0, timeout = 0; + + ret = get_wd_expire_time_fn(pbp_device_block, &timeout); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (timeout == -1) + len = sprintf(page, "expire\n"); + else if (timeout == 0) + len = sprintf(page, "disable\n"); + + else + len = sprintf(page, "%d\n", timeout); + *eof = 1; + return len; +} + +int +get_tpl_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_tpl_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +#ifdef PMC_FIX_FLAG +int +get_wait_at_pwup_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bp_wait_at_pwup_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +int +get_hw_reset_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bp_hw_reset_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 1) + len = sprintf(page, "on\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + + *eof = 1; + return len; +} + +#endif /*PMC_WAIT_FLAG */ + +int +reset_bypass_wd_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = reset_bypass_wd_timer_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "disable\n"); + else if (ret == 1) + len = sprintf(page, "success\n"); + + *eof = 1; + return len; +} + +int +set_dis_bypass_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_dis_bypass_fn(pbp_device_block, bypass_param); + + return count; +} + +int +set_dis_tap_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_dis_tap_fn(pbp_device_block, tap_param); + + return count; +} + +int +set_dis_disc_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_dis_disc_fn(pbp_device_block, tap_param); + + return count; +} + +int +get_dis_bypass_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_dis_bypass_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_dis_tap_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_dis_tap_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_dis_disc_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_dis_disc_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +set_bypass_pwup_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_bypass_pwup_fn(pbp_device_block, bypass_param); + + return count; +} + +int +set_bypass_pwoff_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_bypass_pwoff_fn(pbp_device_block, bypass_param); + + return count; +} + +int +set_tap_pwup_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_tap_pwup_fn(pbp_device_block, tap_param); + + return count; +} + +int +set_disc_pwup_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tap_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tap_param = 1; + else if (strcmp(kbuf, "off") == 0) + tap_param = 0; + + set_disc_pwup_fn(pbp_device_block, tap_param); + + return count; +} + +int +get_bypass_pwup_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_pwup_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_bypass_pwoff_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_bypass_pwoff_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_tap_pwup_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_tap_pwup_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_disc_pwup_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_disc_pwup_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +set_std_nic_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "off") == 0) + bypass_param = 0; + + set_std_nic_fn(pbp_device_block, bypass_param); + + return count; +} + +int +get_std_nic_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_std_nic_fn(pbp_device_block); + if (ret == BP_NOT_CAP) + len = sprintf(page, "fail\n"); + else if (ret == 0) + len = sprintf(page, "off\n"); + else + len = sprintf(page, "on\n"); + + *eof = 1; + return len; +} + +int +get_wd_exp_mode_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_wd_exp_mode_fn(pbp_device_block); + if (ret == 1) + len = sprintf(page, "tap\n"); + else if (ret == 0) + len = sprintf(page, "bypass\n"); + else if (ret == 2) + len = sprintf(page, "disc\n"); + + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +set_wd_exp_mode_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int bypass_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "tap") == 0) + bypass_param = 1; + else if (strcmp(kbuf, "bypass") == 0) + bypass_param = 0; + else if (strcmp(kbuf, "disc") == 0) + bypass_param = 2; + + set_wd_exp_mode_fn(pbp_device_block, bypass_param); + + return count; +} + +int +get_wd_autoreset_pfs(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int len = 0, ret = 0; + + ret = get_wd_autoreset_fn(pbp_device_block); + if (ret >= 0) + len = sprintf(page, "%d\n", ret); + else + len = sprintf(page, "fail\n"); + + *eof = 1; + return len; +} + +int +set_wd_autoreset_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + u32 timeout = 0; + char *timeout_ptr = kbuf; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + timeout_ptr = kbuf; + timeout = atoi(&timeout_ptr); + + set_wd_autoreset_fn(pbp_device_block, timeout); + + return count; +} + +int +set_tpl_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tpl_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tpl_param = 1; + else if (strcmp(kbuf, "off") == 0) + tpl_param = 0; + + set_tpl_fn(pbp_device_block, tpl_param); + + return count; +} + +#ifdef PMC_FIX_FLAG +int +set_wait_at_pwup_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tpl_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tpl_param = 1; + else if (strcmp(kbuf, "off") == 0) + tpl_param = 0; + + set_bp_wait_at_pwup_fn(pbp_device_block, tpl_param); + + return count; +} + +int +set_hw_reset_pfs(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + + char kbuf[256]; + bpctl_dev_t *pbp_device_block = (bpctl_dev_t *) data; + + int tpl_param = 0, length = 0; + + if (count > (sizeof(kbuf) - 1)) + return -1; + + if (copy_from_user(&kbuf, buffer, count)) { + return -1; + } + + kbuf[count] = '\0'; + length = strlen(kbuf); + if (kbuf[length - 1] == '\n') + kbuf[--length] = '\0'; + + if (strcmp(kbuf, "on") == 0) + tpl_param = 1; + else if (strcmp(kbuf, "off") == 0) + tpl_param = 0; + + set_bp_hw_reset_fn(pbp_device_block, tpl_param); + + return count; +} + +#endif /*PMC_FIX_FLAG */ + +int bypass_proc_create_dev_sd(bpctl_dev_t * pbp_device_block) +{ + struct bypass_pfs_sd *current_pfs = &(pbp_device_block->bypass_pfs_set); + static struct proc_dir_entry *procfs_dir = NULL; + int ret = 0; + + sprintf(current_pfs->dir_name, "bypass_%s", dev->name); + + if (!bp_procfs_dir) + return -1; + + /* create device proc dir */ + procfs_dir = proc_getdir(current_pfs->dir_name, bp_procfs_dir); + if (procfs_dir == 0) { + printk(KERN_DEBUG "Could not create procfs directory %s\n", + current_pfs->dir_name); + return -1; + } + current_pfs->bypass_entry = procfs_dir; + + if (bypass_proc_create_entry(&(current_pfs->bypass_info), BYPASS_INFO_ENTRY_SD, NULL, /* write */ + get_bypass_info_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (pbp_device_block->bp_caps & SW_CTL_CAP) { + + /* Create set param proc's */ + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_slave), BYPASS_SLAVE_ENTRY_SD, NULL, /* write */ + get_bypass_slave_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_caps), BYPASS_CAPS_ENTRY_SD, NULL, /* write */ + get_bypass_caps_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->wd_set_caps), WD_SET_CAPS_ENTRY_SD, NULL, /* write */ + get_wd_set_caps_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_wd), BYPASS_WD_ENTRY_SD, set_bypass_wd_pfs, /* write */ + get_bypass_wd_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->wd_expire_time), WD_EXPIRE_TIME_ENTRY_SD, NULL, /* write */ + get_wd_expire_time_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->reset_bypass_wd), RESET_BYPASS_WD_ENTRY_SD, NULL, /* write */ + reset_bypass_wd_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->std_nic), STD_NIC_ENTRY_SD, set_std_nic_pfs, /* write */ + get_std_nic_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (pbp_device_block->bp_caps & BP_CAP) { + if (bypass_proc_create_entry_sd(&(current_pfs->bypass), BYPASS_ENTRY_SD, set_bypass_pfs, /* write */ + get_bypass_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->dis_bypass), DIS_BYPASS_ENTRY_SD, set_dis_bypass_pfs, /* write */ + get_dis_bypass_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_pwup), BYPASS_PWUP_ENTRY_SD, set_bypass_pwup_pfs, /* write */ + get_bypass_pwup_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_pwoff), BYPASS_PWOFF_ENTRY_SD, set_bypass_pwoff_pfs, /* write */ + get_bypass_pwoff_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->bypass_change), BYPASS_CHANGE_ENTRY_SD, NULL, /* write */ + get_bypass_change_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + } + + if (pbp_device_block->bp_caps & TAP_CAP) { + + if (bypass_proc_create_entry_sd(&(current_pfs->tap), TAP_ENTRY_SD, set_tap_pfs, /* write */ + get_tap_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->dis_tap), DIS_TAP_ENTRY_SD, set_dis_tap_pfs, /* write */ + get_dis_tap_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->tap_pwup), TAP_PWUP_ENTRY_SD, set_tap_pwup_pfs, /* write */ + get_tap_pwup_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->tap_change), TAP_CHANGE_ENTRY_SD, NULL, /* write */ + get_tap_change_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + } + if (pbp_device_block->bp_caps & DISC_CAP) { + + if (bypass_proc_create_entry_sd(&(current_pfs->tap), DISC_ENTRY_SD, set_disc_pfs, /* write */ + get_disc_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; +#if 1 + + if (bypass_proc_create_entry_sd(&(current_pfs->dis_tap), DIS_DISC_ENTRY_SD, set_dis_disc_pfs, /* write */ + get_dis_disc_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; +#endif + + if (bypass_proc_create_entry_sd(&(current_pfs->tap_pwup), DISC_PWUP_ENTRY_SD, set_disc_pwup_pfs, /* write */ + get_disc_pwup_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->tap_change), DISC_CHANGE_ENTRY_SD, NULL, /* write */ + get_disc_change_pfs, /* read */ + procfs_dir, + pbp_device_block)) + ret = -1; + } + + if (bypass_proc_create_entry_sd(&(current_pfs->wd_exp_mode), WD_EXP_MODE_ENTRY_SD, set_wd_exp_mode_pfs, /* write */ + get_wd_exp_mode_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + + if (bypass_proc_create_entry_sd(&(current_pfs->wd_autoreset), WD_AUTORESET_ENTRY_SD, set_wd_autoreset_pfs, /* write */ + get_wd_autoreset_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + if (bypass_proc_create_entry_sd(&(current_pfs->tpl), TPL_ENTRY_SD, set_tpl_pfs, /* write */ + get_tpl_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; +#ifdef PMC_FIX_FLAG + if (bypass_proc_create_entry_sd(&(current_pfs->tpl), WAIT_AT_PWUP_ENTRY_SD, set_wait_at_pwup_pfs, /* write */ + get_wait_at_pwup_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + if (bypass_proc_create_entry_sd(&(current_pfs->tpl), HW_RESET_ENTRY_SD, set_hw_reset_pfs, /* write */ + get_hw_reset_pfs, /* read */ + procfs_dir, pbp_device_block)) + ret = -1; + +#endif + + } + if (ret < 0) + printk(KERN_DEBUG "Create proc entry failed\n"); + + return ret; +} + +int bypass_proc_remove_dev_sd(bpctl_dev_t * pbp_device_block) +{ + + struct bypass_pfs_sd *current_pfs = &pbp_device_block->bypass_pfs_set; + struct proc_dir_entry *pde = current_pfs->bypass_entry, *pde_curr = + NULL; + char name[256]; + + for (pde = pde->subdir; pde;) { + strcpy(name, pde->name); + pde_curr = pde; + pde = pde->next; + remove_proc_entry(name, current_pfs->bypass_entry); + } + if (!pde) + remove_proc_entry(current_pfs->dir_name, bp_procfs_dir); + + return 0; +} + +#endif /* BYPASS_SUPPORT */ diff --git a/trunk/drivers/staging/silicom/bypass.h b/trunk/drivers/staging/silicom/bypass.h new file mode 100644 index 000000000000..28765f79b45e --- /dev/null +++ b/trunk/drivers/staging/silicom/bypass.h @@ -0,0 +1,202 @@ +/******************************************************************************/ +/* */ +/* Bypass Control utility, Copyright (c) 2005 Silicom */ +/* All rights reserved. */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* */ +/******************************************************************************/ + +#ifndef BYPASS_H +#define BYPASS_H + +/* Bypass related */ + +#define SYNC_CMD_VAL 2 /* 10b */ +#define SYNC_CMD_LEN 2 + +#define WR_CMD_VAL 2 /* 10b */ +#define WR_CMD_LEN 2 + +#define RD_CMD_VAL 1 /* 10b */ +#define RD_CMD_LEN 2 + +#define ADDR_CMD_LEN 4 + +#define WR_DATA_LEN 8 +#define RD_DATA_LEN 8 + +#define PIC_SIGN_REG_ADDR 0x7 +#define PIC_SIGN_VALUE 0xcd + +#define STATUS_REG_ADDR 0 +#define WDT_EN_MASK 0x01 /* BIT_0 */ +#define CMND_EN_MASK 0x02 /* BIT_1 */ +#define DIS_BYPASS_CAP_MASK 0x04 /* BIT_2 Bypass Cap is disable*/ +#define DFLT_PWRON_MASK 0x08 /* BIT_3 */ +#define BYPASS_OFF_MASK 0x10 /* BIT_4 */ +#define BYPASS_FLAG_MASK 0x20 /* BIT_5 */ +#define STD_NIC_MASK (DIS_BYPASS_CAP_MASK | BYPASS_OFF_MASK | DFLT_PWRON_MASK) +#define WD_EXP_FLAG_MASK 0x40 /* BIT_6 */ +#define DFLT_PWROFF_MASK 0x80 /* BIT_7 */ +#define STD_NIC_PWOFF_MASK (DIS_BYPASS_CAP_MASK | BYPASS_OFF_MASK | DFLT_PWRON_MASK | DFLT_PWROFF_MASK) + +#define PRODUCT_CAP_REG_ADDR 0x5 +#define BYPASS_SUPPORT_MASK 0x01 /* BIT_0 */ +#define TAP_SUPPORT_MASK 0x02 /* BIT_1 */ +#define NORMAL_UNSUPPORT_MASK 0x04 /* BIT_2 */ +#define DISC_SUPPORT_MASK 0x08 /* BIT_3 */ +#define TPL2_SUPPORT_MASK 0x10 /* BIT_4 */ +#define DISC_PORT_SUPPORT_MASK 0x20 /* BIT_5 */ + +#define STATUS_TAP_REG_ADDR 0x6 +#define WDTE_TAP_BPN_MASK 0x01 /* BIT_1 1 when wdt expired -> TAP, 0 - Bypass */ +#define DIS_TAP_CAP_MASK 0x04 /* BIT_2 TAP Cap is disable*/ +#define DFLT_PWRON_TAP_MASK 0x08 /* BIT_3 */ +#define TAP_OFF_MASK 0x10 /* BIT_4 */ +#define TAP_FLAG_MASK 0x20 /* BIT_5 */ +#define TX_DISA_MASK 0x40 +#define TX_DISB_MASK 0x80 + +#define STD_NIC_TAP_MASK (DIS_TAP_CAP_MASK | TAP_OFF_MASK | DFLT_PWRON_TAP_MASK) + +#define STATUS_DISC_REG_ADDR 13 +#define WDTE_DISC_BPN_MASK 0x01 /* BIT_0 1 when wdt expired -> TAP, 0 - Bypass */ +#define STD_NIC_ON_MASK 0x02 /* BIT_1 */ +#define DIS_DISC_CAP_MASK 0x04 /* BIT_2 TAP Cap is disable*/ +#define DFLT_PWRON_DISC_MASK 0x08 /* BIT_3 */ +#define DISC_OFF_MASK 0x10 /* BIT_4 */ +#define DISC_FLAG_MASK 0x20 /* BIT_5 */ +#define TPL2_FLAG_MASK 0x40 /* BIT_6 */ +#define STD_NIC_DISC_MASK DIS_DISC_CAP_MASK + +#define CONT_CONFIG_REG_ADDR 12 +#define EN_HW_RESET_MASK 0x2 /* BIT_1 */ +#define WAIT_AT_PWUP_MASK 0x1 /* BIT_0 */ + +#define VER_REG_ADDR 0x1 +#define BP_FW_VER_A0 0xa0 +#define BP_FW_VER_A1 0xa1 + +#define INT_VER_MASK 0xf0 +#define EXT_VER_MASK 0xf +/* */ +#define PXG2BPI_VER 0x0 +#define PXG2TBPI_VER 0x1 +#define PXE2TBPI_VER 0x2 +#define PXG4BPFI_VER 0x4 +#define BP_FW_EXT_VER7 0x6 +#define BP_FW_EXT_VER8 0x8 +#define BP_FW_EXT_VER9 0x9 + +#define OLD_IF_VER -1 + +#define CMND_REG_ADDR 10 /* 1010b */ +#define WDT_REG_ADDR 4 +#define TMRL_REG_ADDR 2 +#define TMRH_REG_ADDR 3 + +/* NEW_FW */ +#define WDT_INTERVAL 1 /* 5 //8 */ +#define WDT_CMND_INTERVAL 200 /* 50 */ +#define CMND_INTERVAL 200 /* 100 usec */ +#define PULSE_TIME 100 + +/* OLD_FW */ +#define INIT_CMND_INTERVAL 40 +#define PULSE_INTERVAL 5 +#define WDT_TIME_CNT 3 + +/* Intel Commands */ + +#define CMND_OFF_INT 0xf +#define PWROFF_BYPASS_ON_INT 0x5 +#define BYPASS_ON_INT 0x6 +#define DIS_BYPASS_CAP_INT 0x4 +#define RESET_WDT_INT 0x1 + +/* Intel timing */ + +#define BYPASS_DELAY_INT 4 /* msec */ +#define CMND_INTERVAL_INT 2 /* msec */ + +/* Silicom Commands */ +#define CMND_ON 0x4 +#define CMND_OFF 0x2 +#define BYPASS_ON 0xa +#define BYPASS_OFF 0x8 +#define PORT_LINK_EN 0xe +#define PORT_LINK_DIS 0xc +#define WDT_ON 0x10 /* 0x1f (11111) - max */ +#define TIMEOUT_UNIT 100 +#define TIMEOUT_MAX_STEP 15 +#define WDT_TIMEOUT_MIN 100 /* msec */ +#define WDT_TIMEOUT_MAX 3276800 /* msec */ +#define WDT_AUTO_MIN_INT 500 +#define WDT_TIMEOUT_DEF WDT_TIMEOUT_MIN +#define WDT_OFF 0x6 +#define WDT_RELOAD 0x9 +#define RESET_CONT 0x20 +#define DIS_BYPASS_CAP 0x22 +#define EN_BYPASS_CAP 0x24 +#define BYPASS_STATE_PWRON 0x26 +#define NORMAL_STATE_PWRON 0x28 +#define BYPASS_STATE_PWROFF 0x27 +#define NORMAL_STATE_PWROFF 0x29 +#define TAP_ON 0xb +#define TAP_OFF 0x9 +#define TAP_STATE_PWRON 0x2a +#define DIS_TAP_CAP 0x2c +#define EN_TAP_CAP 0x2e +#define STD_NIC_OFF 0x86 +#define STD_NIC_ON 0x84 +#define DISC_ON 0x85 +#define DISC_OFF 0x8a +#define DISC_STATE_PWRON 0x87 +#define DIS_DISC_CAP 0x88 +#define EN_DISC_CAP 0x89 +#define TPL2_ON 0x8c +#define TPL2_OFF 0x8b +#define BP_WAIT_AT_PWUP_EN 0x80 +#define BP_WAIT_AT_PWUP_DIS 0x81 +#define BP_HW_RESET_EN 0x82 +#define BP_HW_RESET_DIS 0x83 + +#define TX_DISA 0x8d +#define TX_DISB 0x8e +#define TX_ENA 0xA0 +#define TX_ENB 0xA1 + +#define TX_DISA_PWRUP 0xA2 +#define TX_DISB_PWRUP 0xA3 +#define TX_ENA_PWRUP 0xA4 +#define TX_ENB_PWRUP 0xA5 + +#define BYPASS_CAP_DELAY 21 /* msec */ +#define DFLT_PWRON_DELAY 10 /* msec */ +#define LATCH_DELAY 13 /* msec */ +#define EEPROM_WR_DELAY 8 /* msec */ + +#define BP_LINK_MON_DELAY 4 /* sec */ + +#define BP_FW_EXT_VER0 0xa0 +#define BP_FW_EXT_VER1 0xa1 +#define BP_FW_EXT_VER2 0xb1 + +#define BP_OK 0 +#define BP_NOT_CAP -1 +#define WDT_STATUS_EXP -2 +#define WDT_STATUS_UNKNOWN -1 +#define WDT_STATUS_EN 1 +#define WDT_STATUS_DIS 0 + +#ifdef BP_SELF_TEST +#define ETH_P_BPTEST 0xabba + +#define BPTEST_DATA_LEN 60 +#endif + +#endif /* BYPASS_H */ diff --git a/trunk/drivers/staging/silicom/bypasslib/Makefile b/trunk/drivers/staging/silicom/bypasslib/Makefile new file mode 100644 index 000000000000..80e8b9bc9357 --- /dev/null +++ b/trunk/drivers/staging/silicom/bypasslib/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for the Bypass network device drivers. +# + +obj-$(CONFIG_SBYPASS) += bypass.o + diff --git a/trunk/drivers/staging/silicom/bypasslib/bp_ioctl.h b/trunk/drivers/staging/silicom/bypasslib/bp_ioctl.h new file mode 100644 index 000000000000..9e736a417c02 --- /dev/null +++ b/trunk/drivers/staging/silicom/bypasslib/bp_ioctl.h @@ -0,0 +1,199 @@ +/******************************************************************************/ +/* */ +/* bypass library, Copyright (c) 2004-2006 Silicom, Ltd */ +/* Corporation. */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* */ +/* */ +/******************************************************************************/ + +#ifndef BP_IOCTL_H +#define BP_IOCTL_H + +#define BP_CAP 0x01 //BIT_0 +#define BP_STATUS_CAP 0x02 //BIT_1 +#define BP_STATUS_CHANGE_CAP 0x04 //BIT_2 +#define SW_CTL_CAP 0x08 //BIT_3 +#define BP_DIS_CAP 0x10 //BIT_4 +#define BP_DIS_STATUS_CAP 0x20 //BIT_5 +#define STD_NIC_CAP 0x40 //BIT_6 +#define BP_PWOFF_ON_CAP 0x80 //BIT_7 +#define BP_PWOFF_OFF_CAP 0x0100 //BIT_8 +#define BP_PWOFF_CTL_CAP 0x0200 //BIT_9 +#define BP_PWUP_ON_CAP 0x0400 //BIT_10 +#define BP_PWUP_OFF_CAP 0x0800 //BIT_11 +#define BP_PWUP_CTL_CAP 0x1000 //BIT_12 +#define WD_CTL_CAP 0x2000 //BIT_13 +#define WD_STATUS_CAP 0x4000 //BIT_14 +#define WD_TIMEOUT_CAP 0x8000 //BIT_15 +#define TX_CTL_CAP 0x10000 //BIT_16 +#define TX_STATUS_CAP 0x20000 //BIT_17 +#define TAP_CAP 0x40000 //BIT_18 +#define TAP_STATUS_CAP 0x80000 //BIT_19 +#define TAP_STATUS_CHANGE_CAP 0x100000 //BIT_20 +#define TAP_DIS_CAP 0x200000 //BIT_21 +#define TAP_DIS_STATUS_CAP 0x400000 //BIT_22 +#define TAP_PWUP_ON_CAP 0x800000 //BIT_23 +#define TAP_PWUP_OFF_CAP 0x1000000 //BIT 24 +#define TAP_PWUP_CTL_CAP 0x2000000 //BIT 25 +#define NIC_CAP_NEG 0x4000000 //BIT 26 +#define TPL_CAP 0x8000000 //BIT 27 +#define DISC_CAP 0x10000000 //BIT 28 +#define DISC_DIS_CAP 0x20000000 //BIT 29 +#define DISC_PWUP_CTL_CAP 0x40000000 //BIT 30 + +#define WD_MIN_TIME_MASK(val) (val & 0xf) +#define WD_STEP_COUNT_MASK(val) ((val & 0xf) << 5) +#define WDT_STEP_TIME 0x10 //BIT_4 + +#define WD_MIN_TIME_GET(desc) (desc & 0xf) +#define WD_STEP_COUNT_GET(desc) (desc>>5) & 0xf + +typedef enum { + IS_BYPASS = 1, + GET_BYPASS_SLAVE, + GET_BYPASS_CAPS, + GET_WD_SET_CAPS, + SET_BYPASS, + GET_BYPASS, + GET_BYPASS_CHANGE, + SET_BYPASS_WD, + GET_BYPASS_WD, + GET_WD_EXPIRE_TIME, + RESET_BYPASS_WD_TIMER, + SET_DIS_BYPASS, + GET_DIS_BYPASS, + SET_BYPASS_PWOFF, + GET_BYPASS_PWOFF, + SET_BYPASS_PWUP, + GET_BYPASS_PWUP, + SET_STD_NIC, + GET_STD_NIC, + SET_TX, + GET_TX, + SET_TAP, + GET_TAP, + GET_TAP_CHANGE, + SET_DIS_TAP, + GET_DIS_TAP, + SET_TAP_PWUP, + GET_TAP_PWUP, + SET_WD_EXP_MODE, + GET_WD_EXP_MODE, + SET_WD_AUTORESET, + GET_WD_AUTORESET, + SET_TPL, + GET_TPL, + SET_DISC, + GET_DISC, + GET_DISC_CHANGE, + SET_DIS_DISC, + GET_DIS_DISC, + SET_DISC_PWUP, + GET_DISC_PWUP, + + GET_BYPASS_INFO = 100, + GET_BP_WAIT_AT_PWUP, + SET_BP_WAIT_AT_PWUP, + GET_BP_HW_RESET, + SET_BP_HW_RESET, +} CMND_TYPE; + +typedef enum { + IF_SCAN_SD, + GET_DEV_NUM_SD, + IS_BYPASS_SD, + GET_BYPASS_SLAVE_SD, + GET_BYPASS_CAPS_SD, + GET_WD_SET_CAPS_SD, + SET_BYPASS_SD, + GET_BYPASS_SD, + GET_BYPASS_CHANGE_SD, + SET_BYPASS_WD_SD, + GET_BYPASS_WD_SD, + GET_WD_EXPIRE_TIME_SD, + RESET_BYPASS_WD_TIMER_SD, + SET_DIS_BYPASS_SD, + GET_DIS_BYPASS_SD, + SET_BYPASS_PWOFF_SD, + GET_BYPASS_PWOFF_SD, + SET_BYPASS_PWUP_SD, + GET_BYPASS_PWUP_SD, + SET_STD_NIC_SD, + GET_STD_NIC_SD, + SET_TX_SD, + GET_TX_SD, + SET_TAP_SD, + GET_TAP_SD, + GET_TAP_CHANGE_SD, + SET_DIS_TAP_SD, + GET_DIS_TAP_SD, + SET_TAP_PWUP_SD, + GET_TAP_PWUP_SD, + SET_WD_EXP_MODE_SD, + GET_WD_EXP_MODE_SD, + SET_WD_AUTORESET_SD, + GET_WD_AUTORESET_SD, + SET_TPL_SD, + GET_TPL_SD, + SET_DISC_SD, + GET_DISC_SD, + GET_DISC_CHANGE_SD, + SET_DIS_DISC_SD, + GET_DIS_DISC_SD, + SET_DISC_PWUP_SD, + GET_DISC_PWUP_SD, + + GET_BYPASS_INFO_SD = 100, + GET_BP_WAIT_AT_PWUP_SD, + SET_BP_WAIT_AT_PWUP_SD, + GET_BP_HW_RESET_SD, + SET_BP_HW_RESET_SD, + +} CMND_TYPE_SD; + +#define SIOCGIFBYPASS SIOCDEVPRIVATE+10 + +struct bp_info { + char prod_name[14]; + unsigned char fw_ver; +}; + +/* for passing single values */ +struct if_bypass { + char if_name[IFNAMSIZ]; + int cmd; + int data; +}; +struct if_bypass_info { + char if_name[IFNAMSIZ]; + char cmd; + struct bp_info bp_info; +}; + +/* +* The major device number. We can't rely on dynamic +* registration any more, because ioctls need to know +* it. +*/ + +#define MAGIC_NUM 'J' + +/* for passing single values */ +struct bpctl_cmd { + int status; + int data[8]; + int in_param[8]; + int out_param[8]; +}; + +#define IOCTL_TX_MSG(cmd) _IOWR(MAGIC_NUM, cmd, struct bpctl_cmd) + +#define DEVICE_NODE "/dev/bpctl0" +#define DEVICE_NAME "bpctl" + +#endif diff --git a/trunk/drivers/staging/silicom/bypasslib/bplibk.h b/trunk/drivers/staging/silicom/bypasslib/bplibk.h new file mode 100644 index 000000000000..a1c85eec02f0 --- /dev/null +++ b/trunk/drivers/staging/silicom/bypasslib/bplibk.h @@ -0,0 +1,47 @@ +/******************************************************************************/ +/* */ +/* bypass library, Copyright (c) 2004 Silicom, Ltd */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* */ +/* bplib.h */ +/* */ +/******************************************************************************/ +#ifndef BYPASS_H +#define BYPASS_H + +#include "bp_ioctl.h" +#include "libbp_sd.h" + +#define IF_NAME "eth" +#define SILICOM_VID 0x1374 +#define SILICOM_BP_PID_MIN 0x24 +#define SILICOM_BP_PID_MAX 0x5f +#define INTEL_PEG4BPII_PID 0x10a0 +#define INTEL_PEG4BPFII_PID 0x10a1 + +#define PEGII_IF_SERIES(vid, pid) \ + ((vid==0x8086)&& \ + ((pid==INTEL_PEG4BPII_PID)|| \ + (pid==INTEL_PEG4BPFII_PID))) + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)) +#define pci_get_class pci_find_class + +#define pci_get_device pci_find_device + +#endif + +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10)) +#define EXPORT_SYMBOL_NOVERS EXPORT_SYMBOL +#endif + +#ifdef BP_VENDOR_SUPPORT +char *bp_desc_array[] = + { "e1000bp", "e1000bpe", "slcm5700", "bnx2xbp", "ixgbp", "ixgbpe", NULL }; +#endif + +#endif diff --git a/trunk/drivers/staging/silicom/bypasslib/bypass.c b/trunk/drivers/staging/silicom/bypasslib/bypass.c new file mode 100644 index 000000000000..527829d58133 --- /dev/null +++ b/trunk/drivers/staging/silicom/bypasslib/bypass.c @@ -0,0 +1,529 @@ +/******************************************************************************/ +/* */ +/* bypass library, Copyright (c) 2004-2007 Silicom, Ltd */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* */ +/* bypass.c */ +/* */ +/******************************************************************************/ + +#include +#if defined(CONFIG_SMP) && ! defined(__SMP__) +#define __SMP__ +#endif + +#include +#include +#include + +#include +#include + +#include // struct device, and other headers +#include +#include +#include +#include + +#include + +#include "bplibk.h" + +#define MOD_NAME "bypass" + +#define VERSION "\n"MOD_NAME" version 9.0.4\n" + +MODULE_AUTHOR("www.silicom.co.il"); + +MODULE_LICENSE("GPL"); + +int init_lib_module(void); +void cleanup_lib_module(void); + +static int do_cmd(struct net_device *dev, struct ifreq *ifr, int cmd, int *data) +{ + int ret = -1; + struct if_bypass *bypass_cb; + static int (*ioctl) (struct net_device *, struct ifreq *, int); + + bypass_cb = (struct if_bypass *)ifr; + bypass_cb->cmd = cmd; + bypass_cb->data = *data; + if ((dev->netdev_ops) && (ioctl = dev->netdev_ops->ndo_do_ioctl)) { + ret = ioctl(dev, ifr, SIOCGIFBYPASS); + *data = bypass_cb->data; + } + + return ret; +} + +static int doit(int cmd, int if_index, int *data) +{ + struct ifreq ifr; + int ret = -1; + struct net_device *dev; + struct net_device *n; + for_each_netdev_safe(&init_net, dev, n) { + + if (dev->ifindex == if_index) { + ret = do_cmd(dev, &ifr, cmd, data); + if (ret < 0) + ret = -1; + + } + } + + return ret; +} + +#define bp_symbol_get(fn_name) symbol_get(fn_name) +#define bp_symbol_put(fn_name) symbol_put(fn_name) + +#define SET_BPLIB_INT_FN(fn_name, arg_type, arg, ret) \ + ({ int (* fn_ex)(arg_type)=NULL; \ + fn_ex=bp_symbol_get(fn_name##_sd); \ + if(fn_ex) { \ + ret= fn_ex(arg); \ + bp_symbol_put(fn_name##_sd); \ + } else ret=-1; \ + }) + +#define SET_BPLIB_INT_FN2(fn_name, arg_type, arg, arg_type1, arg1, ret) \ + ({ int (* fn_ex)(arg_type,arg_type1)=NULL; \ + fn_ex=bp_symbol_get(fn_name##_sd); \ + if(fn_ex) { \ + ret= fn_ex(arg,arg1); \ + bp_symbol_put(fn_name##_sd); \ + } else ret=-1; \ + }) +#define SET_BPLIB_INT_FN3(fn_name, arg_type, arg, arg_type1, arg1,arg_type2, arg2, ret) \ + ({ int (* fn_ex)(arg_type,arg_type1, arg_type2)=NULL; \ + fn_ex=bp_symbol_get(fn_name##_sd); \ + if(fn_ex) { \ + ret= fn_ex(arg,arg1,arg2); \ + bp_symbol_put(fn_name##_sd); \ + } else ret=-1; \ + }) + +#define DO_BPLIB_GET_ARG_FN(fn_name,ioctl_val, if_index) \ + ({ int data, ret=0; \ + if(is_dev_sd(if_index)){ \ + SET_BPLIB_INT_FN(fn_name, int, if_index, ret); \ + return ret; \ + } \ + return doit(ioctl_val,if_index, &data); \ + }) + +#define DO_BPLIB_SET_ARG_FN(fn_name,ioctl_val,if_index,arg) \ + ({ int data, ret=0; \ + if(is_dev_sd(if_index)){ \ + SET_BPLIB_INT_FN2(fn_name, int, if_index, int, arg, ret); \ + return ret; \ + } \ + data=arg; \ + return doit(ioctl_val,if_index, &data); \ + }) + +static int is_dev_sd(int if_index) +{ + int ret = 0; + SET_BPLIB_INT_FN(is_bypass, int, if_index, ret); + return (ret >= 0 ? 1 : 0); +} + +int is_bypass_dev(int if_index) +{ + struct pci_dev *pdev = NULL; + struct net_device *dev = NULL; + struct ifreq ifr; + int ret = 0, data = 0; + + while ((pdev = pci_get_class(PCI_CLASS_NETWORK_ETHERNET << 8, pdev))) { + if ((dev = pci_get_drvdata(pdev)) != NULL) + if (((dev = pci_get_drvdata(pdev)) != NULL) && + (dev->ifindex == if_index)) { + if ((pdev->vendor == SILICOM_VID) && + (pdev->device >= SILICOM_BP_PID_MIN) && + (pdev->device <= SILICOM_BP_PID_MAX)) + goto send_cmd; +#if defined(BP_VENDOR_SUPPORT) && defined(ETHTOOL_GDRVINFO) + else { + struct ethtool_drvinfo info; + const struct ethtool_ops *ops = + dev->ethtool_ops; + int k = 0; + + if (ops->get_drvinfo) { + memset(&info, 0, sizeof(info)); + info.cmd = ETHTOOL_GDRVINFO; + ops->get_drvinfo(dev, &info); + for (; bp_desc_array[k]; k++) + if (! + (strcmp + (bp_desc_array[k], + info.driver))) + goto send_cmd; + + } + + } +#endif + return -1; + } + } + send_cmd: + ret = do_cmd(dev, &ifr, IS_BYPASS, &data); + return (ret < 0 ? -1 : ret); +} + +int is_bypass(int if_index) +{ + int ret = 0; + SET_BPLIB_INT_FN(is_bypass, int, if_index, ret); + + if (ret < 0) + return is_bypass_dev(if_index); + return ret; +} + +int get_bypass_slave(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bypass_slave, GET_BYPASS_SLAVE, if_index); +} + +int get_bypass_caps(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bypass_caps, GET_BYPASS_CAPS, if_index); +} + +int get_wd_set_caps(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_wd_set_caps, GET_WD_SET_CAPS, if_index); +} + +int set_bypass(int if_index, int bypass_mode) +{ + DO_BPLIB_SET_ARG_FN(set_bypass, SET_BYPASS, if_index, bypass_mode); +} + +int get_bypass(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bypass, GET_BYPASS, if_index); +} + +int get_bypass_change(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bypass_change, GET_BYPASS_CHANGE, if_index); +} + +int set_dis_bypass(int if_index, int dis_bypass) +{ + DO_BPLIB_SET_ARG_FN(set_dis_bypass, SET_DIS_BYPASS, if_index, + dis_bypass); +} + +int get_dis_bypass(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_dis_bypass, GET_DIS_BYPASS, if_index); +} + +int set_bypass_pwoff(int if_index, int bypass_mode) +{ + DO_BPLIB_SET_ARG_FN(set_bypass_pwoff, SET_BYPASS_PWOFF, if_index, + bypass_mode); +} + +int get_bypass_pwoff(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bypass_pwoff, GET_BYPASS_PWOFF, if_index); +} + +int set_bypass_pwup(int if_index, int bypass_mode) +{ + DO_BPLIB_SET_ARG_FN(set_bypass_pwup, SET_BYPASS_PWUP, if_index, + bypass_mode); +} + +int get_bypass_pwup(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bypass_pwup, GET_BYPASS_PWUP, if_index); +} + +int set_bypass_wd(int if_index, int ms_timeout, int *ms_timeout_set) +{ + int data = ms_timeout, ret = 0; + if (is_dev_sd(if_index)) + SET_BPLIB_INT_FN3(set_bypass_wd, int, if_index, int, ms_timeout, + int *, ms_timeout_set, ret); + else { + ret = doit(SET_BYPASS_WD, if_index, &data); + if (ret > 0) { + *ms_timeout_set = ret; + ret = 0; + } + } + return ret; +} + +int get_bypass_wd(int if_index, int *ms_timeout_set) +{ + int *data = ms_timeout_set, ret = 0; + if (is_dev_sd(if_index)) + SET_BPLIB_INT_FN2(get_bypass_wd, int, if_index, int *, + ms_timeout_set, ret); + else + ret = doit(GET_BYPASS_WD, if_index, data); + return ret; +} + +int get_wd_expire_time(int if_index, int *ms_time_left) +{ + int *data = ms_time_left, ret = 0; + if (is_dev_sd(if_index)) + SET_BPLIB_INT_FN2(get_wd_expire_time, int, if_index, int *, + ms_time_left, ret); + else { + ret = doit(GET_WD_EXPIRE_TIME, if_index, data); + if ((ret == 0) && (*data != 0)) + ret = 1; + } + return ret; +} + +int reset_bypass_wd_timer(int if_index) +{ + DO_BPLIB_GET_ARG_FN(reset_bypass_wd_timer, RESET_BYPASS_WD_TIMER, + if_index); +} + +int set_std_nic(int if_index, int bypass_mode) +{ + DO_BPLIB_SET_ARG_FN(set_std_nic, SET_STD_NIC, if_index, bypass_mode); +} + +int get_std_nic(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_std_nic, GET_STD_NIC, if_index); +} + +int set_tx(int if_index, int tx_state) +{ + DO_BPLIB_SET_ARG_FN(set_tx, SET_TX, if_index, tx_state); +} + +int get_tx(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_tx, GET_TX, if_index); +} + +int set_tap(int if_index, int tap_mode) +{ + DO_BPLIB_SET_ARG_FN(set_tap, SET_TAP, if_index, tap_mode); +} + +int get_tap(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_tap, GET_TAP, if_index); +} + +int get_tap_change(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_tap_change, GET_TAP_CHANGE, if_index); +} + +int set_dis_tap(int if_index, int dis_tap) +{ + DO_BPLIB_SET_ARG_FN(set_dis_tap, SET_DIS_TAP, if_index, dis_tap); +} + +int get_dis_tap(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_dis_tap, GET_DIS_TAP, if_index); +} + +int set_tap_pwup(int if_index, int tap_mode) +{ + DO_BPLIB_SET_ARG_FN(set_tap_pwup, SET_TAP_PWUP, if_index, tap_mode); +} + +int get_tap_pwup(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_tap_pwup, GET_TAP_PWUP, if_index); +} + +int set_bp_disc(int if_index, int disc_mode) +{ + DO_BPLIB_SET_ARG_FN(set_bp_disc, SET_DISC, if_index, disc_mode); +} + +int get_bp_disc(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bp_disc, GET_DISC, if_index); +} + +int get_bp_disc_change(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bp_disc_change, GET_DISC_CHANGE, if_index); +} + +int set_bp_dis_disc(int if_index, int dis_disc) +{ + DO_BPLIB_SET_ARG_FN(set_bp_dis_disc, SET_DIS_DISC, if_index, dis_disc); +} + +int get_bp_dis_disc(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bp_dis_disc, GET_DIS_DISC, if_index); +} + +int set_bp_disc_pwup(int if_index, int disc_mode) +{ + DO_BPLIB_SET_ARG_FN(set_bp_disc_pwup, SET_DISC_PWUP, if_index, + disc_mode); +} + +int get_bp_disc_pwup(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_bp_disc_pwup, GET_DISC_PWUP, if_index); +} + +int set_wd_exp_mode(int if_index, int mode) +{ + DO_BPLIB_SET_ARG_FN(set_wd_exp_mode, SET_WD_EXP_MODE, if_index, mode); +} + +int get_wd_exp_mode(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_wd_exp_mode, GET_WD_EXP_MODE, if_index); +} + +int set_wd_autoreset(int if_index, int time) +{ + DO_BPLIB_SET_ARG_FN(set_wd_autoreset, SET_WD_AUTORESET, if_index, time); +} + +int get_wd_autoreset(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_wd_autoreset, GET_WD_AUTORESET, if_index); +} + +int set_tpl(int if_index, int tpl_mode) +{ + DO_BPLIB_SET_ARG_FN(set_tpl, SET_TPL, if_index, tpl_mode); +} + +int get_tpl(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_tpl, GET_TPL, if_index); +} + +int set_bp_hw_reset(int if_index, int mode) +{ + DO_BPLIB_SET_ARG_FN(set_tpl, SET_BP_HW_RESET, if_index, mode); +} + +int get_bp_hw_reset(int if_index) +{ + DO_BPLIB_GET_ARG_FN(get_tpl, GET_BP_HW_RESET, if_index); +} + +int get_bypass_info(int if_index, struct bp_info *bp_info) +{ + int ret = 0; + if (is_dev_sd(if_index)) { + SET_BPLIB_INT_FN2(get_bypass_info, int, if_index, + struct bp_info *, bp_info, ret); + } else { + static int (*ioctl) (struct net_device *, struct ifreq *, int); + struct net_device *dev; + + struct net_device *n; + for_each_netdev_safe(&init_net, dev, n) { + if (dev->ifindex == if_index) { + struct if_bypass_info *bypass_cb; + struct ifreq ifr; + + memset(&ifr, 0, sizeof(ifr)); + bypass_cb = (struct if_bypass_info *)𝔦 + bypass_cb->cmd = GET_BYPASS_INFO; + + if ((dev->netdev_ops) && + (ioctl = dev->netdev_ops->ndo_do_ioctl)) { + ret = ioctl(dev, &ifr, SIOCGIFBYPASS); + } + + else + ret = -1; + if (ret == 0) + memcpy(bp_info, &bypass_cb->bp_info, + sizeof(struct bp_info)); + ret = (ret < 0 ? -1 : 0); + break; + } + } + } + return ret; +} + +int init_lib_module() +{ + + printk(VERSION); + return 0; +} + +void cleanup_lib_module() +{ +} + +EXPORT_SYMBOL_NOVERS(is_bypass); +EXPORT_SYMBOL_NOVERS(get_bypass_slave); +EXPORT_SYMBOL_NOVERS(get_bypass_caps); +EXPORT_SYMBOL_NOVERS(get_wd_set_caps); +EXPORT_SYMBOL_NOVERS(set_bypass); +EXPORT_SYMBOL_NOVERS(get_bypass); +EXPORT_SYMBOL_NOVERS(get_bypass_change); +EXPORT_SYMBOL_NOVERS(set_dis_bypass); +EXPORT_SYMBOL_NOVERS(get_dis_bypass); +EXPORT_SYMBOL_NOVERS(set_bypass_pwoff); +EXPORT_SYMBOL_NOVERS(get_bypass_pwoff); +EXPORT_SYMBOL_NOVERS(set_bypass_pwup); +EXPORT_SYMBOL_NOVERS(get_bypass_pwup); +EXPORT_SYMBOL_NOVERS(set_bypass_wd); +EXPORT_SYMBOL_NOVERS(get_bypass_wd); +EXPORT_SYMBOL_NOVERS(get_wd_expire_time); +EXPORT_SYMBOL_NOVERS(reset_bypass_wd_timer); +EXPORT_SYMBOL_NOVERS(set_std_nic); +EXPORT_SYMBOL_NOVERS(get_std_nic); +EXPORT_SYMBOL_NOVERS(set_tx); +EXPORT_SYMBOL_NOVERS(get_tx); +EXPORT_SYMBOL_NOVERS(set_tap); +EXPORT_SYMBOL_NOVERS(get_tap); +EXPORT_SYMBOL_NOVERS(get_tap_change); +EXPORT_SYMBOL_NOVERS(set_dis_tap); +EXPORT_SYMBOL_NOVERS(get_dis_tap); +EXPORT_SYMBOL_NOVERS(set_tap_pwup); +EXPORT_SYMBOL_NOVERS(get_tap_pwup); +EXPORT_SYMBOL_NOVERS(set_bp_disc); +EXPORT_SYMBOL_NOVERS(get_bp_disc); +EXPORT_SYMBOL_NOVERS(get_bp_disc_change); +EXPORT_SYMBOL_NOVERS(set_bp_dis_disc); +EXPORT_SYMBOL_NOVERS(get_bp_dis_disc); +EXPORT_SYMBOL_NOVERS(set_bp_disc_pwup); +EXPORT_SYMBOL_NOVERS(get_bp_disc_pwup); +EXPORT_SYMBOL_NOVERS(set_wd_exp_mode); +EXPORT_SYMBOL_NOVERS(get_wd_exp_mode); +EXPORT_SYMBOL_NOVERS(set_wd_autoreset); +EXPORT_SYMBOL_NOVERS(get_wd_autoreset); +EXPORT_SYMBOL_NOVERS(set_tpl); +EXPORT_SYMBOL_NOVERS(get_tpl); +EXPORT_SYMBOL_NOVERS(set_bp_hw_reset); +EXPORT_SYMBOL_NOVERS(get_bp_hw_reset); +EXPORT_SYMBOL_NOVERS(get_bypass_info); + +module_init(init_lib_module); +module_exit(cleanup_lib_module); diff --git a/trunk/drivers/staging/silicom/bypasslib/libbp_sd.h b/trunk/drivers/staging/silicom/bypasslib/libbp_sd.h new file mode 100644 index 000000000000..3b4f8364ed18 --- /dev/null +++ b/trunk/drivers/staging/silicom/bypasslib/libbp_sd.h @@ -0,0 +1,509 @@ +/******************************************************************************/ +/* */ +/* bypass library, Copyright (c) 2004 Silicom, Ltd */ +/* Corporation. */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* Ver 1.0.0 */ +/* */ +/* libbypass.h */ +/* */ +/******************************************************************************/ + +/** + * is_bypass - check if device is a Bypass controlling device + * @if_index: network device index + * + * Output: + * 1 - if device is bypass controlling device, + * 0 - if device is bypass slave device + * -1 - device not support Bypass + **/ +int is_bypass_sd(int if_index); + +/** + * get_bypass_slave - get second port participate in the Bypass pair + * @if_index: network device index + * + * Output: + * network device index of the slave device + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int get_bypass_slave_sd(int if_index); + +/** + * get_bypass_caps - get second port participate in the Bypass pair + * @if_index: network device index + * + * Output: + * flags word on success;flag word is a 32-bit mask word with each bit defines different + * capability as described bellow. + * Value of 1 for supporting this feature. 0 for not supporting this feature. + * -1 - on failure (if the device is not capable of the operation or not a Bypass device) + * Bit feature description + * + * 0 BP_CAP The interface is Bypass capable in general + * + * 1 BP_STATUS_CAP The interface can report of the current Bypass mode + * + * 2 BP_STATUS_CHANGE_CAP The interface can report on a change to bypass mode from + * the last time the mode was defined + * + * 3 SW_CTL_CAP The interface is Software controlled capable for bypass/non bypass modes. + * + * 4 BP_DIS_CAP The interface is capable of disabling the Bypass mode at all times. + * This mode will retain its mode even during power loss and also after + * power recovery. This will overcome on any bypass operation due to + * watchdog timeout or set bypass command. + * + * 5 BP_DIS_STATUS_CAP The interface can report of the current DIS_BP_CAP + * + * 6 STD_NIC_CAP The interface is capable to be configured to operate as standard, non Bypass, + * NIC interface (have direct connection to interfaces at all power modes) + * + * 7 BP_PWOFF_NO_CAP The interface can be in Bypass mode at power off state + * + * 8 BP_PWOFF_OFF_CAP The interface can disconnect the Bypass mode at power off state without + * effecting all the other states of operation + * + * 9 BP_PWOFF_CTL_CAP The behavior of the Bypass mode at Power-off state can be controlled by + * software without effecting any other state + * + *10 BP_PWUP_ON_CAP The interface can be in Bypass mode when power is turned on + * (until the system take control of the bypass functionality) + * + *11 BP_PWUP_OFF_CAP The interface can disconnect from Bypass mode when power is turned on + * (until the system take control of the bypass functionality) + * + *12 BP_PWUP_CTL_CAP The behavior of the Bypass mode at Power-up can be controlled by software + * + *13 WD_CTL_CAP The interface has watchdog capabilities to turn to Bypass mode when not reset + * for defined period of time. + * + *14 WD_STATUS_CAP The interface can report on the watchdog status (Active/inactive) + * + *15 WD_TIMEOUT_CAP The interface can report the time left till watchdog triggers to Bypass mode. + * + *16-31 RESERVED + * + * **/ +int get_bypass_caps_sd(int if_index); + +/** + * get_wd_set_caps - Obtain watchdog timer setting capabilities + * @if_index: network device index + * + * Output: + * + * Set of numbers defining the various parameters of the watchdog capable + * to be set to as described bellow. + * -1 - on failure (device not support Bypass or it's a slave device) + * + * Bit feature description + * + * 0-3 WD_MIN_TIME The interface WD minimal time period in 100mS units + * + * 4 WD_STEP_TIME The steps of the WD timer in + * 0 - for linear steps (WD_MIN_TIME * X) + * 1 - for multiply by 2 from previous step (WD_MIN_TIME * 2^X) + * + * 5-8 WD_STEP_COUNT Number of steps the WD timer supports in 2^X + * (X bit available for defining the value) + * + * + * + **/ +int get_wd_set_caps_sd(int if_index); + +/** + * set_bypass - set Bypass state + * @if_index: network device index of the controlling device + * @bypass_mode: bypass mode (1=on, 0=off) + * Output: + * 0 - on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int set_bypass_sd(int if_index, int bypass_mode); + +/** + * get_bypass - Get Bypass mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int get_bypass_sd(int if_index); + +/** + * get_bypass_change - Get change of Bypass mode state from last status check + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int get_bypass_change_sd(int if_index); + +/** + * set_dis_bypass - Set Disable Bypass mode + * @if_index: network device index of the controlling device + * @dis_bypass: disable bypass(1=dis, 0=en) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_dis_bypass_sd(int if_index, int dis_bypass); + +/** + * get_dis_bypass - Get Disable Bypass mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (normal Bypass mode/ Disable bypass) + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_dis_bypass_sd(int if_index); + +/** + * set_bypass_pwoff - Set Bypass mode at power-off state + * @if_index: network device index of the controlling device + * @bypass_mode: bypass mode setting at power off state (1=BP en, 0=BP Dis) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_bypass_pwoff_sd(int if_index, int bypass_mode); + +/** + * get_bypass_pwoff - Get Bypass mode state at power-off state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (Disable bypass at power off state / normal Bypass mode) + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_bypass_pwoff_sd(int if_index); + +/** + * set_bypass_pwup - Set Bypass mode at power-up state + * @if_index: network device index of the controlling device + * @bypass_mode: bypass mode setting at power up state (1=BP en, 0=BP Dis) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_bypass_pwup_sd(int if_index, int bypass_mode); + +/** + * get_bypass_pwup - Get Bypass mode state at power-up state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (Disable bypass at power up state / normal Bypass mode) + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_bypass_pwup_sd(int if_index); + +/** + * set_bypass_wd - Set watchdog state + * @if_index: network device index of the controlling device + * @ms_timeout: requested timeout (in ms units), 0 for disabling the watchdog timer + * @ms_timeout_set(output): requested timeout (in ms units), + * that the adapter supports and will be used by the watchdog + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_bypass_wd_sd(int if_index, int ms_timeout, int *ms_timeout_set); + +/** + * get_bypass_wd - Get watchdog state + * @if_index: network device index of the controlling device + * @ms_timeout (output): WDT timeout (in ms units), + * -1 for unknown wdt status + * 0 if WDT is disabled + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_bypass_wd_sd(int if_index, int *ms_timeout_set); + +/** + * get_wd_expire_time - Get watchdog expire + * @if_index: network device index of the controlling device + * @ms_time_left (output): time left till watchdog time expire, + * -1 if WDT has expired + * 0 if WDT is disabled + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device or unknown wdt status) + **/ +int get_wd_expire_time_sd(int if_index, int *ms_time_left); + +/** + * reset_bypass_wd_timer - Reset watchdog timer + * @if_index: network device index of the controlling device + * + * Output: + * 1 - on success + * 0 - watchdog is not configured + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device or unknown wdt status) + **/ +int reset_bypass_wd_timer_sd(int if_index); + +/** + * set_std_nic - Standard NIC mode of operation + * @if_index: network device index of the controlling device + * @nic_mode: 0/1 (Default Bypass mode / Standard NIC mode) + * + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_std_nic_sd(int if_index, int nic_mode); + +/** + * get_std_nic - Get Standard NIC mode setting + * @if_index: network device index of the controlling device + * + * Output: + * 0/1 (Default Bypass mode / Standard NIC mode) on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_std_nic_sd(int if_index); + +/** + * set_tx - set transmitter enable/disable + * @if_index: network device index of the controlling device + * @tx_state: 0/1 (Transmit Disable / Transmit Enable) + * + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ) + **/ +int set_tx_sd(int if_index, int tx_state); + +/** + * get_std_nic - get transmitter state (disable / enable) + * @if_index: network device index of the controlling device + * + * Output: + * 0/1 (ransmit Disable / Transmit Enable) on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass) + **/ +int get_tx_sd(int if_index); + +/** + * set_tap - set TAP state + * @if_index: network device index of the controlling device + * @tap_mode: 1 tap mode , 0 normal nic mode + * Output: + * 0 - on success + * -1 - on failure (device not support TAP or it's a slave device) + **/ +int set_tap_sd(int if_index, int tap_mode); + +/** + * get_tap - Get TAP mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support TAP or it's a slave device) + **/ +int get_tap_sd(int if_index); + +/** + * get_tap_change - Get change of TAP mode state from last status check + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support TAP or it's a slave device) + **/ +int get_tap_change_sd(int if_index); + +/** + * set_dis_tap - Set Disable TAP mode + * @if_index: network device index of the controlling device + * @dis_tap: disable tap(1=dis, 0=en) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int set_dis_tap_sd(int if_index, int dis_tap); + +/** + * get_dis_tap - Get Disable TAP mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (normal TAP mode/ Disable TAP) + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int get_dis_tap_sd(int if_index); + +/** + * set_tap_pwup - Set TAP mode at power-up state + * @if_index: network device index of the controlling device + * @bypass_mode: tap mode setting at power up state (1=TAP en, 0=TAP Dis) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int set_tap_pwup_sd(int if_index, int tap_mode); + +/** + * get_tap_pwup - Get TAP mode state at power-up state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (Disable TAP at power up state / normal TAP mode) + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int get_tap_pwup_sd(int if_index); + +/** + * set_bp_disc - set Disconnect state + * @if_index: network device index of the controlling device + * @tap_mode: 1 disc mode , 0 non-disc mode + * Output: + * 0 - on success + * -1 - on failure (device not support Disconnect or it's a slave device) + **/ +int set_bp_disc_sd(int if_index, int disc_mode); + +/** + * get_bp_disc - Get Disconnect mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support Disconnect or it's a slave device) + **/ +int get_bp_disc_sd(int if_index); + +/** + * get_bp_disc_change - Get change of Disconnect mode state from last status check + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support Disconnect or it's a slave device) + **/ +int get_bp_disc_change_sd(int if_index); + +/** + * set_bp_dis_disc - Set Disable Disconnect mode + * @if_index: network device index of the controlling device + * @dis_tap: disable tap(1=dis, 0=en) + * Output: + * 0 - on success + * -1 - on failure (device is not capable ofthe operation ordevice not support Disconnect + * or it's a slave device) + **/ +int set_bp_dis_disc_sd(int if_index, int dis_disc); + +/** + * get_dis_tap - Get Disable Disconnect mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (normal Disconnect mode/ Disable Disconnect) + * -1 - on failure (device is not capable of the operation ordevice not support Disconnect + * or it's a slave device) + **/ +int get_bp_dis_disc_sd(int if_index); + +/** + * set_bp_disc_pwup - Set Disconnect mode at power-up state + * @if_index: network device index of the controlling device + * @disc_mode: tap mode setting at power up state (1=Disc en, 0=Disc Dis) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Disconnect + * or it's a slave device) + **/ +int set_bp_disc_pwup_sd(int if_index, int disc_mode); + +/** + * get_bp_disc_pwup - Get Disconnect mode state at power-up state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (Disable Disconnect at power up state / normal Disconnect mode) + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int get_bp_disc_pwup_sd(int if_index); + +/** + * set_wd_exp_mode - Set adapter state when WDT expired. + * @if_index: network device index of the controlling device + * @bypass_mode: adapter mode (1=tap mode, 0=bypass mode) + * Output: + * 0 - on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int set_wd_exp_mode_sd(int if_index, int bypass_mode); + +/** + * get_wd_exp_mode - Get adapter state when WDT expired. + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (bypass/tap) on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int get_wd_exp_mode_sd(int if_index); + +/** + * set_wd_autoreset - reset WDT periodically. + * @if_index: network device index of the controlling device + * @bypass_mode: adapter mode (1=tap mode, 0=bypass mode) + * Output: + * 1 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device or unknown wdt status) + **/ +int set_wd_autoreset_sd(int if_index, int time); + +/** + * set_wd_autoreset - reset WDT periodically. + * @if_index: network device index of the controlling device + * @bypass_mode: adapter mode (1=tap mode, 0=bypass mode) + * Output: + * 1 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device or unknown wdt status) + **/ +int get_wd_autoreset_sd(int if_index); + +/** + * set_tpl - set TPL state + * @if_index: network device index of the controlling device + * @tpl_mode: 1 tpl mode , 0 normal nic mode + * Output: + * 0 - on success + * -1 - on failure (device not support TPL) + **/ +int set_tpl_sd(int if_index, int tpl_mode); + +/** + * get_tpl - Get TPL mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support TPL or it's a slave device) + **/ +int get_tpl_sd(int if_index); + +int get_bypass_info_sd(int if_index, struct bp_info *bp_info); +int bp_if_scan_sd(void); +/*int get_dev_num_sd(void);*/ diff --git a/trunk/drivers/staging/silicom/libbp_sd.h b/trunk/drivers/staging/silicom/libbp_sd.h new file mode 100644 index 000000000000..d223a6cfca27 --- /dev/null +++ b/trunk/drivers/staging/silicom/libbp_sd.h @@ -0,0 +1,550 @@ +/******************************************************************************/ +/* */ +/* bypass library, Copyright (c) 2004 Silicom, Ltd */ +/* Corporation. */ +/* */ +/* This program is free software; you can redistribute it and/or modify */ +/* it under the terms of the GNU General Public License as published by */ +/* the Free Software Foundation, located in the file LICENSE. */ +/* */ +/* Ver 1.0.0 */ +/* */ +/* libbypass.h */ +/* */ +/******************************************************************************/ + +#define BP_CAP 0x01 /* BIT_0 */ +#define BP_STATUS_CAP 0x02 +#define BP_STATUS_CHANGE_CAP 0x04 +#define SW_CTL_CAP 0x08 +#define BP_DIS_CAP 0x10 +#define BP_DIS_STATUS_CAP 0x20 +#define STD_NIC_CAP 0x40 +#define BP_PWOFF_ON_CAP 0x80 +#define BP_PWOFF_OFF_CAP 0x0100 +#define BP_PWOFF_CTL_CAP 0x0200 +#define BP_PWUP_ON_CAP 0x0400 +#define BP_PWUP_OFF_CAP 0x0800 +#define BP_PWUP_CTL_CAP 0x1000 +#define WD_CTL_CAP 0x2000 +#define WD_STATUS_CAP 0x4000 +#define WD_TIMEOUT_CAP 0x8000 +#define TX_CTL_CAP 0x10000 +#define TX_STATUS_CAP 0x20000 +#define TAP_CAP 0x40000 +#define TAP_STATUS_CAP 0x80000 +#define TAP_STATUS_CHANGE_CAP 0x100000 +#define TAP_DIS_CAP 0x200000 +#define TAP_DIS_STATUS_CAP 0x400000 +#define TAP_PWUP_ON_CAP 0x800000 +#define TAP_PWUP_OFF_CAP 0x1000000 +#define TAP_PWUP_CTL_CAP 0x2000000 +#define NIC_CAP_NEG 0x4000000 /* BIT 26 */ + +#define WD_MIN_TIME_GET(desc) (desc & 0xf) +#define WDT_STEP_TIME 0x10 + +struct bp_info { + char prod_name[14]; + unsigned char fw_ver; +}; + +/** + * is_bypass - check if device is a Bypass controlling device + * @if_index: network device index + * + * Output: + * 1 - if device is bypass controlling device, + * 0 - if device is bypass slave device + * -1 - device not support Bypass + **/ +int is_bypass_sd(int if_index); + +/** + * get_bypass_slave - get second port participate in the Bypass pair + * @if_index: network device index + * + * Output: + * network device index of the slave device + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int get_bypass_slave_sd(int if_index); + +/** + * get_bypass_caps - get second port participate in the Bypass pair + * @if_index: network device index + * + * Output: + * flags word on success;flag word is a 32-bit mask word with each bit defines different + * capability as described bellow. + * Value of 1 for supporting this feature. 0 for not supporting this feature. + * -1 - on failure (if the device is not capable of the operation or not a Bypass device) + * Bit feature description + * + * 0 BP_CAP The interface is Bypass capable in general + * + * 1 BP_STATUS_CAP The interface can report of the current Bypass mode + * + * 2 BP_STATUS_CHANGE_CAP The interface can report on a change to bypass mode from + * the last time the mode was defined + * + * 3 SW_CTL_CAP The interface is Software controlled capable for bypass/non bypass modes. + * + * 4 BP_DIS_CAP The interface is capable of disabling the Bypass mode at all times. + * This mode will retain its mode even during power loss and also after + * power recovery. This will overcome on any bypass operation due to + * watchdog timeout or set bypass command. + * + * 5 BP_DIS_STATUS_CAP The interface can report of the current DIS_BP_CAP + * + * 6 STD_NIC_CAP The interface is capable to be configured to operate as standard, non Bypass, + * NIC interface (have direct connection to interfaces at all power modes) + * + * 7 BP_PWOFF_NO_CAP The interface can be in Bypass mode at power off state + * + * 8 BP_PWOFF_OFF_CAP The interface can disconnect the Bypass mode at power off state without + * effecting all the other states of operation + * + * 9 BP_PWOFF_CTL_CAP The behavior of the Bypass mode at Power-off state can be controlled by + * software without effecting any other state + * + *10 BP_PWUP_ON_CAP The interface can be in Bypass mode when power is turned on + * (until the system take control of the bypass functionality) + * + *11 BP_PWUP_OFF_CAP The interface can disconnect from Bypass mode when power is turned on + * (until the system take control of the bypass functionality) + * + *12 BP_PWUP_CTL_CAP The behavior of the Bypass mode at Power-up can be controlled by software + * + *13 WD_CTL_CAP The interface has watchdog capabilities to turn to Bypass mode when not reset + * for defined period of time. + * + *14 WD_STATUS_CAP The interface can report on the watchdog status (Active/inactive) + * + *15 WD_TIMEOUT_CAP The interface can report the time left till watchdog triggers to Bypass mode. + * + *16-31 RESERVED + * + * **/ +int get_bypass_caps_sd(int if_index); + +/** + * get_wd_set_caps - Obtain watchdog timer setting capabilities + * @if_index: network device index + * + * Output: + * + * Set of numbers defining the various parameters of the watchdog capable + * to be set to as described bellow. + * -1 - on failure (device not support Bypass or it's a slave device) + * + * Bit feature description + * + * 0-3 WD_MIN_TIME The interface WD minimal time period in 100mS units + * + * 4 WD_STEP_TIME The steps of the WD timer in + * 0 - for linear steps (WD_MIN_TIME * X) + * 1 - for multiply by 2 from previous step (WD_MIN_TIME * 2^X) + * + * 5-8 WD_STEP_COUNT Number of steps the WD timer supports in 2^X + * (X bit available for defining the value) + * + * + * + **/ +int get_wd_set_caps_sd(int if_index); + +/** + * set_bypass - set Bypass state + * @if_index: network device index of the controlling device + * @bypass_mode: bypass mode (1=on, 0=off) + * Output: + * 0 - on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int set_bypass_sd(int if_index, int bypass_mode); + +/** + * get_bypass - Get Bypass mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int get_bypass_sd(int if_index); + +/** + * get_bypass_change - Get change of Bypass mode state from last status check + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int get_bypass_change_sd(int if_index); + +/** + * set_dis_bypass - Set Disable Bypass mode + * @if_index: network device index of the controlling device + * @dis_bypass: disable bypass(1=dis, 0=en) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_dis_bypass_sd(int if_index, int dis_bypass); + +/** + * get_dis_bypass - Get Disable Bypass mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (normal Bypass mode/ Disable bypass) + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_dis_bypass_sd(int if_index); + +/** + * set_bypass_pwoff - Set Bypass mode at power-off state + * @if_index: network device index of the controlling device + * @bypass_mode: bypass mode setting at power off state (1=BP en, 0=BP Dis) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_bypass_pwoff_sd(int if_index, int bypass_mode); + +/** + * get_bypass_pwoff - Get Bypass mode state at power-off state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (Disable bypass at power off state / normal Bypass mode) + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_bypass_pwoff_sd(int if_index); + +/** + * set_bypass_pwup - Set Bypass mode at power-up state + * @if_index: network device index of the controlling device + * @bypass_mode: bypass mode setting at power up state (1=BP en, 0=BP Dis) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_bypass_pwup_sd(int if_index, int bypass_mode); + +/** + * get_bypass_pwup - Get Bypass mode state at power-up state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (Disable bypass at power up state / normal Bypass mode) + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_bypass_pwup_sd(int if_index); + +/** + * set_bypass_wd - Set watchdog state + * @if_index: network device index of the controlling device + * @ms_timeout: requested timeout (in ms units), 0 for disabling the watchdog timer + * @ms_timeout_set(output): requested timeout (in ms units), + * that the adapter supports and will be used by the watchdog + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_bypass_wd_sd(int if_index, int ms_timeout, int *ms_timeout_set); + +/** + * get_bypass_wd - Get watchdog state + * @if_index: network device index of the controlling device + * @ms_timeout (output): WDT timeout (in ms units), + * -1 for unknown wdt status + * 0 if WDT is disabled + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_bypass_wd_sd(int if_index, int *ms_timeout_set); + +/** + * get_wd_expire_time - Get watchdog expire + * @if_index: network device index of the controlling device + * @ms_time_left (output): time left till watchdog time expire, + * -1 if WDT has expired + * 0 if WDT is disabled + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device or unknown wdt status) + **/ +int get_wd_expire_time_sd(int if_index, int *ms_time_left); + +/** + * reset_bypass_wd_timer - Reset watchdog timer + * @if_index: network device index of the controlling device + * + * Output: + * 1 - on success + * 0 - watchdog is not configured + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device or unknown wdt status) + **/ +int reset_bypass_wd_timer_sd(int if_index); + +/** + * set_std_nic - Standard NIC mode of operation + * @if_index: network device index of the controlling device + * @nic_mode: 0/1 (Default Bypass mode / Standard NIC mode) + * + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int set_std_nic_sd(int if_index, int nic_mode); + +/** + * get_std_nic - Get Standard NIC mode setting + * @if_index: network device index of the controlling device + * + * Output: + * 0/1 (Default Bypass mode / Standard NIC mode) on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device) + **/ +int get_std_nic_sd(int if_index); + +/** + * set_tx - set transmitter enable/disable + * @if_index: network device index of the controlling device + * @tx_state: 0/1 (Transmit Disable / Transmit Enable) + * + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ) + **/ +int set_tx_sd(int if_index, int tx_state); + +/** + * get_tx - get transmitter state (disable / enable) + * @if_index: network device index of the controlling device + * + * Output: + * 0/1 (ransmit Disable / Transmit Enable) on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass) + **/ +int get_tx_sd(int if_index); + +/** + * set_tpl - set TPL enable/disable + * @if_index: network device index of the controlling device + * @tx_state: 0/1 (TPL Disable / TPL Enable) + * + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ) + **/ +int set_tpl_sd(int if_index, int tpl_state); + +/** + * get_tpl - get TPL state (disable / enable) + * @if_index: network device index of the controlling device + * + * Output: + * 0/1 (TPL Disable / TPL Enable) on success + * -1 - on failure (device is not capable of the operation) + **/ +int get_tpl_sd(int if_index); + +int get_bp_hw_reset_sd(int if_index); + +int set_bp_hw_reset_sd(int if_index, int status); + +/** + * set_tap - set TAP state + * @if_index: network device index of the controlling device + * @tap_mode: 1 tap mode , 0 normal nic mode + * Output: + * 0 - on success + * -1 - on failure (device not support TAP or it's a slave device) + **/ +int set_tap_sd(int if_index, int tap_mode); + +/** + * get_tap - Get TAP mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support TAP or it's a slave device) + **/ +int get_tap_sd(int if_index); + +/** + * get_tap_change - Get change of TAP mode state from last status check + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support TAP or it's a slave device) + **/ +int get_tap_change_sd(int if_index); + +/** + * set_dis_tap - Set Disable TAP mode + * @if_index: network device index of the controlling device + * @dis_tap: disable tap(1=dis, 0=en) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int set_dis_tap_sd(int if_index, int dis_tap); + +/** + * get_dis_tap - Get Disable TAP mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (normal TAP mode/ Disable TAP) + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int get_dis_tap_sd(int if_index); + +/** + * set_tap_pwup - Set TAP mode at power-up state + * @if_index: network device index of the controlling device + * @bypass_mode: tap mode setting at power up state (1=TAP en, 0=TAP Dis) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int set_tap_pwup_sd(int if_index, int tap_mode); + +/** + * get_tap_pwup - Get TAP mode state at power-up state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (Disable TAP at power up state / normal TAP mode) + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int get_tap_pwup_sd(int if_index); + +/** + * set_wd_exp_mode - Set adapter state when WDT expired. + * @if_index: network device index of the controlling device + * @bypass_mode: adapter mode (1=tap mode, 0=bypass mode) + * Output: + * 0 - on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int set_wd_exp_mode_sd(int if_index, int bypass_mode); + +/** + * get_wd_exp_mode - Get adapter state when WDT expired. + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (bypass/tap) on success + * -1 - on failure (device not support Bypass or it's a slave device) + **/ +int get_wd_exp_mode_sd(int if_index); + +/** + * set_wd_autoreset - reset WDT periodically. + * @if_index: network device index of the controlling device + * @bypass_mode: adapter mode (1=tap mode, 0=bypass mode) + * Output: + * 1 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device or unknown wdt status) + **/ +int set_wd_autoreset_sd(int if_index, int time); + +/** + * set_wd_autoreset - reset WDT periodically. + * @if_index: network device index of the controlling device + * @bypass_mode: adapter mode (1=tap mode, 0=bypass mode) + * Output: + * 1 - on success + * -1 - on failure (device is not capable of the operation ordevice not support Bypass + * or it's a slave device or unknown wdt status) + **/ +int get_wd_autoreset_sd(int if_index); +/** + * set_disc - set DISC state + * @if_index: network device index of the controlling device + * @tap_mode: 1 DISC mode , 0 normal nic mode + * Output: + * 0 - on success + * -1 - on failure (device not support disconnect or it's a slave device) + **/ +int set_bp_disc_sd(int if_index, int disc_mode); + +/** + * get_disc - Get disc mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support disconnect or it's a slave device) + **/ +int get_bp_disc_sd(int if_index); + +/** + * get_disc_change - Get change of DISC mode state from last status check + * @if_index: network device index of the controlling device + * Output: + * 0/1 - (off/on) on success + * -1 - on failure (device not support disconnect or it's a slave device) + **/ +int get_bp_disc_change_sd(int if_index); + +/** + * set_dis_disc - Set Disable DISC mode + * @if_index: network device index of the controlling device + * @dis_disc: disable disconnect(1=dis, 0=en) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support DISC + * or it's a slave device) + **/ +int set_bp_dis_disc_sd(int if_index, int dis_disc); + +/** + * get_dis_disc - Get Disable DISC mode state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (normal DISC mode/ Disable DISC) + * -1 - on failure (device is not capable of the operation ordevice not support TAP + * or it's a slave device) + **/ +int get_bp_dis_disc_sd(int if_index); + +/** + * set_disc_pwup - Set DISC mode at power-up state + * @if_index: network device index of the controlling device + * @disc_mode: DISC mode setting at power up state (1= en, 0= Dis) + * Output: + * 0 - on success + * -1 - on failure (device is not capable of the operation ordevice not support DISC + * or it's a slave device) + **/ +int set_bp_disc_pwup_sd(int if_index, int disc_mode); + +/** + * get_disc_pwup - Get DISC mode state at power-up state + * @if_index: network device index of the controlling device + * Output: + * 0/1 - on success (Disable DISC at power up state / normal DISC mode) + * -1 - on failure (device is not capable of the operation ordevice not support DISC + * or it's a slave device) + **/ +int get_bp_disc_pwup_sd(int if_index); + +int get_bypass_info_sd(int if_index, struct bp_info *bp_info); +int bp_if_scan_sd(void); +/*int get_dev_num_sd(void);*/ diff --git a/trunk/drivers/staging/tidspbridge/core/chnl_sm.c b/trunk/drivers/staging/tidspbridge/core/chnl_sm.c index f38950ea2728..16fa3462fbbe 100644 --- a/trunk/drivers/staging/tidspbridge/core/chnl_sm.c +++ b/trunk/drivers/staging/tidspbridge/core/chnl_sm.c @@ -94,7 +94,7 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf, struct dev_object *dev_obj; u8 dw_state; bool is_eos; - struct chnl_mgr *chnl_mgr_obj = pchnl->chnl_mgr_obj; + struct chnl_mgr *chnl_mgr_obj; u8 *host_sys_buf = NULL; bool sched_dpc = false; u16 mb_val = 0; @@ -153,6 +153,7 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf, * If DPC is scheduled in process context (iosm_schedule) and any * non-mailbox interrupt occurs, that DPC will run and break CS. Hence * we disable ALL DPCs. We will try to disable ONLY IO DPC later. */ + chnl_mgr_obj = pchnl->chnl_mgr_obj; spin_lock_bh(&chnl_mgr_obj->chnl_mgr_lock); omap_mbox_disable_irq(dev_ctxt->mbox, IRQ_RX); if (pchnl->chnl_type == CHNL_PCPY) { diff --git a/trunk/drivers/staging/vt6655/device_main.c b/trunk/drivers/staging/vt6655/device_main.c index 697617fdb57b..9e3b3f2bbe53 100644 --- a/trunk/drivers/staging/vt6655/device_main.c +++ b/trunk/drivers/staging/vt6655/device_main.c @@ -290,7 +290,7 @@ DEFINE_PCI_DEVICE_TABLE(vt6655_pci_id_table) = { static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent); -static bool vt6655_init_info(struct pci_dev* pcid, PSDevice* ppDevice, PCHIP_INFO); +static void vt6655_init_info(struct pci_dev* pcid, PSDevice* ppDevice, PCHIP_INFO); static void device_free_info(PSDevice pDevice); static bool device_get_pci_info(PSDevice, struct pci_dev* pcid); static void device_print_info(PSDevice pDevice); @@ -347,21 +347,22 @@ static int Config_FileGetParameter(unsigned char *string, -static char* get_chip_name(int chip_id) { - int i; - for (i=0;chip_info_table[i].name!=NULL;i++) - if (chip_info_table[i].chip_id==chip_id) - break; - return chip_info_table[i].name; +static char* get_chip_name(int chip_id) +{ + int i; + for (i = 0; chip_info_table[i].name != NULL; i++) + if (chip_info_table[i].chip_id == chip_id) + break; + return chip_info_table[i].name; } static void __devexit vt6655_remove(struct pci_dev *pcid) { - PSDevice pDevice=pci_get_drvdata(pcid); + PSDevice pDevice = pci_get_drvdata(pcid); - if (pDevice==NULL) - return; - device_free_info(pDevice); + if (pDevice == NULL) + return; + device_free_info(pDevice); } @@ -397,31 +398,29 @@ device_set_bool_opt(unsigned int *opt, int val,bool def,u32 flag, char* name,cha } } */ -static void -device_get_options(PSDevice pDevice, int index, char* devname) { - - POPTIONS pOpts = &(pDevice->sOpts); - pOpts->nRxDescs0=RX_DESC_DEF0; - pOpts->nRxDescs1=RX_DESC_DEF1; - pOpts->nTxDescs[0]=TX_DESC_DEF0; - pOpts->nTxDescs[1]=TX_DESC_DEF1; -pOpts->flags|=DEVICE_FLAGS_IP_ALIGN; - pOpts->int_works=INT_WORKS_DEF; - pOpts->rts_thresh=RTS_THRESH_DEF; - pOpts->frag_thresh=FRAG_THRESH_DEF; - pOpts->data_rate=DATA_RATE_DEF; - pOpts->channel_num=CHANNEL_DEF; - -pOpts->flags|=DEVICE_FLAGS_PREAMBLE_TYPE; -pOpts->flags|=DEVICE_FLAGS_OP_MODE; -//pOpts->flags|=DEVICE_FLAGS_PS_MODE; - pOpts->short_retry=SHORT_RETRY_DEF; - pOpts->long_retry=LONG_RETRY_DEF; - pOpts->bbp_type=BBP_TYPE_DEF; -pOpts->flags|=DEVICE_FLAGS_80211h_MODE; -pOpts->flags|=DEVICE_FLAGS_DiversityANT; - - +static void device_get_options(PSDevice pDevice, int index, char* devname) +{ + POPTIONS pOpts = &(pDevice->sOpts); + + pOpts->nRxDescs0 = RX_DESC_DEF0; + pOpts->nRxDescs1 = RX_DESC_DEF1; + pOpts->nTxDescs[0] = TX_DESC_DEF0; + pOpts->nTxDescs[1] = TX_DESC_DEF1; + pOpts->flags |= DEVICE_FLAGS_IP_ALIGN; + pOpts->int_works = INT_WORKS_DEF; + pOpts->rts_thresh = RTS_THRESH_DEF; + pOpts->frag_thresh = FRAG_THRESH_DEF; + pOpts->data_rate = DATA_RATE_DEF; + pOpts->channel_num = CHANNEL_DEF; + + pOpts->flags |= DEVICE_FLAGS_PREAMBLE_TYPE; + pOpts->flags |= DEVICE_FLAGS_OP_MODE; + //pOpts->flags|=DEVICE_FLAGS_PS_MODE; + pOpts->short_retry = SHORT_RETRY_DEF; + pOpts->long_retry = LONG_RETRY_DEF; + pOpts->bbp_type = BBP_TYPE_DEF; + pOpts->flags |= DEVICE_FLAGS_80211h_MODE; + pOpts->flags |= DEVICE_FLAGS_DiversityANT; } static void @@ -894,18 +893,15 @@ static bool device_release_WPADEV(PSDevice pDevice) return true; } - static const struct net_device_ops device_netdev_ops = { - .ndo_open = device_open, - .ndo_stop = device_close, - .ndo_do_ioctl = device_ioctl, - .ndo_get_stats = device_get_stats, - .ndo_start_xmit = device_xmit, - .ndo_set_rx_mode = device_set_multi, + .ndo_open = device_open, + .ndo_stop = device_close, + .ndo_do_ioctl = device_ioctl, + .ndo_get_stats = device_get_stats, + .ndo_start_xmit = device_xmit, + .ndo_set_rx_mode = device_set_multi, }; - - static int __devinit vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent) { @@ -926,7 +922,7 @@ vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent) if (dev == NULL) { printk(KERN_ERR DEVICE_NAME ": allocate net device failed \n"); - return -ENODEV; + return -ENOMEM; } // Chain it all together @@ -939,9 +935,7 @@ vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent) bFirst=false; } - if (!vt6655_init_info(pcid, &pDevice, pChip_info)) { - return -ENOMEM; - } + vt6655_init_info(pcid, &pDevice, pChip_info); pDevice->dev = dev; pDevice->next_module = root_device_dev; root_device_dev = dev; @@ -1105,7 +1099,7 @@ static void device_print_info(PSDevice pDevice) } -static bool __devinit vt6655_init_info(struct pci_dev* pcid, PSDevice* ppDevice, +static void __devinit vt6655_init_info(struct pci_dev* pcid, PSDevice* ppDevice, PCHIP_INFO pChip_info) { PSDevice p; @@ -1129,8 +1123,6 @@ static bool __devinit vt6655_init_info(struct pci_dev* pcid, PSDevice* ppDevice, (*ppDevice)->multicast_limit =32; spin_lock_init(&((*ppDevice)->lock)); - - return true; } static bool device_get_pci_info(PSDevice pDevice, struct pci_dev* pcid) { diff --git a/trunk/drivers/staging/wlan-ng/hfa384x_usb.c b/trunk/drivers/staging/wlan-ng/hfa384x_usb.c index 7843dfdaa3cf..bdc63a61c663 100644 --- a/trunk/drivers/staging/wlan-ng/hfa384x_usb.c +++ b/trunk/drivers/staging/wlan-ng/hfa384x_usb.c @@ -2140,11 +2140,7 @@ int hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len) ----------------------------------------------------------------*/ int hfa384x_drvr_getconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len) { - int result; - - result = hfa384x_dorrid_wait(hw, rid, buf, len); - - return result; + return hfa384x_dorrid_wait(hw, rid, buf, len); } /*---------------------------------------------------------------- @@ -3790,7 +3786,7 @@ static void hfa384x_ctlxout_callback(struct urb *urb) #endif if ((urb->status == -ESHUTDOWN) || (urb->status == -ENODEV) || (hw == NULL)) - goto done; + return; retry: spin_lock_irqsave(&hw->ctlxq.lock, flags); @@ -3803,7 +3799,7 @@ static void hfa384x_ctlxout_callback(struct urb *urb) */ if (list_empty(&hw->ctlxq.active)) { spin_unlock_irqrestore(&hw->ctlxq.lock, flags); - goto done; + return; } /* @@ -3886,9 +3882,6 @@ static void hfa384x_ctlxout_callback(struct urb *urb) if (run_queue) hfa384x_usbctlxq_run(hw); - -done: - ; } /*---------------------------------------------------------------- @@ -3985,15 +3978,10 @@ static void hfa384x_usbctlx_resptimerfn(unsigned long data) if (unlocked_usbctlx_cancel_async(hw, ctlx) == 0) { spin_unlock_irqrestore(&hw->ctlxq.lock, flags); hfa384x_usbctlxq_run(hw); - goto done; + return; } } - spin_unlock_irqrestore(&hw->ctlxq.lock, flags); - -done: - ; - } /*---------------------------------------------------------------- diff --git a/trunk/drivers/staging/wlan-ng/p80211conv.c b/trunk/drivers/staging/wlan-ng/p80211conv.c index f53a27a2e3fe..3df753b51e89 100644 --- a/trunk/drivers/staging/wlan-ng/p80211conv.c +++ b/trunk/drivers/staging/wlan-ng/p80211conv.c @@ -559,17 +559,17 @@ void p80211skb_rxmeta_detach(struct sk_buff *skb) /* Sanity checks */ if (skb == NULL) { /* bad skb */ pr_debug("Called w/ null skb.\n"); - goto exit; + return; } frmmeta = P80211SKB_FRMMETA(skb); if (frmmeta == NULL) { /* no magic */ pr_debug("Called w/ bad frmmeta magic.\n"); - goto exit; + return; } rxmeta = frmmeta->rx; if (rxmeta == NULL) { /* bad meta ptr */ pr_debug("Called w/ bad rxmeta ptr.\n"); - goto exit; + return; } /* Free rxmeta */ @@ -577,8 +577,6 @@ void p80211skb_rxmeta_detach(struct sk_buff *skb) /* Clear skb->cb */ memset(skb->cb, 0, sizeof(skb->cb)); -exit: - return; } /*---------------------------------------------------------------- @@ -660,5 +658,4 @@ void p80211skb_free(struct wlandevice *wlandev, struct sk_buff *skb) else printk(KERN_ERR "Freeing an skb (%p) w/ no frmmeta.\n", skb); dev_kfree_skb(skb); - return; } diff --git a/trunk/drivers/staging/wlan-ng/p80211netdev.c b/trunk/drivers/staging/wlan-ng/p80211netdev.c index 0f51b4ab3631..8afb1935e3fb 100644 --- a/trunk/drivers/staging/wlan-ng/p80211netdev.c +++ b/trunk/drivers/staging/wlan-ng/p80211netdev.c @@ -240,10 +240,7 @@ void p80211netdev_rx(wlandevice_t *wlandev, struct sk_buff *skb) { /* Enqueue for post-irq processing */ skb_queue_tail(&wlandev->nsd_rxq, skb); - tasklet_schedule(&wlandev->rx_bh); - - return; } /*---------------------------------------------------------------- @@ -644,7 +641,7 @@ static int p80211knetdev_set_mac_address(netdevice_t *dev, void *addr) p80211item_unk392_t *mibattr; p80211item_pstr6_t *macaddr; p80211item_uint32_t *resultcode; - int result = 0; + int result; /* If we're running, we don't allow MAC address changes */ if (netif_running(dev)) @@ -852,13 +849,7 @@ int wlan_unsetup(wlandevice_t *wlandev) ----------------------------------------------------------------*/ int register_wlandev(wlandevice_t *wlandev) { - int i = 0; - - i = register_netdev(wlandev->netdev); - if (i) - return i; - - return 0; + return register_netdev(wlandev->netdev); } /*---------------------------------------------------------------- diff --git a/trunk/drivers/staging/wlan-ng/p80211req.c b/trunk/drivers/staging/wlan-ng/p80211req.c index 179194e7d2aa..cdfd808d6854 100644 --- a/trunk/drivers/staging/wlan-ng/p80211req.c +++ b/trunk/drivers/staging/wlan-ng/p80211req.c @@ -73,7 +73,7 @@ #include "p80211req.h" static void p80211req_handlemsg(wlandevice_t *wlandev, struct p80211msg *msg); -static int p80211req_mibset_mibget(wlandevice_t *wlandev, +static void p80211req_mibset_mibget(wlandevice_t *wlandev, struct p80211msg_dot11req_mibget *mib_msg, int isget); @@ -155,32 +155,29 @@ static void p80211req_handlemsg(wlandevice_t *wlandev, struct p80211msg *msg) switch (msg->msgcode) { case DIDmsg_lnxreq_hostwep:{ - struct p80211msg_lnxreq_hostwep *req = - (struct p80211msg_lnxreq_hostwep *) msg; - wlandev->hostwep &= - ~(HOSTWEP_DECRYPT | HOSTWEP_ENCRYPT); - if (req->decrypt.data == P80211ENUM_truth_true) - wlandev->hostwep |= HOSTWEP_DECRYPT; - if (req->encrypt.data == P80211ENUM_truth_true) - wlandev->hostwep |= HOSTWEP_ENCRYPT; - - break; - } + struct p80211msg_lnxreq_hostwep *req = + (struct p80211msg_lnxreq_hostwep *) msg; + wlandev->hostwep &= + ~(HOSTWEP_DECRYPT | HOSTWEP_ENCRYPT); + if (req->decrypt.data == P80211ENUM_truth_true) + wlandev->hostwep |= HOSTWEP_DECRYPT; + if (req->encrypt.data == P80211ENUM_truth_true) + wlandev->hostwep |= HOSTWEP_ENCRYPT; + + break; + } case DIDmsg_dot11req_mibget: case DIDmsg_dot11req_mibset:{ - int isget = (msg->msgcode == DIDmsg_dot11req_mibget); - struct p80211msg_dot11req_mibget *mib_msg = - (struct p80211msg_dot11req_mibget *) msg; - p80211req_mibset_mibget(wlandev, mib_msg, isget); - } - default: - ; + int isget = (msg->msgcode == DIDmsg_dot11req_mibget); + struct p80211msg_dot11req_mibget *mib_msg = + (struct p80211msg_dot11req_mibget *) msg; + p80211req_mibset_mibget(wlandev, mib_msg, isget); + break; + } } /* switch msg->msgcode */ - - return; } -static int p80211req_mibset_mibget(wlandevice_t *wlandev, +static void p80211req_mibset_mibget(wlandevice_t *wlandev, struct p80211msg_dot11req_mibget *mib_msg, int isget) { @@ -190,76 +187,65 @@ static int p80211req_mibset_mibget(wlandevice_t *wlandev, switch (mibitem->did) { case DIDmib_dot11smt_dot11WEPDefaultKeysTable_dot11WEPDefaultKey0:{ - if (!isget) - wep_change_key(wlandev, 0, key, pstr->len); - break; - } + if (!isget) + wep_change_key(wlandev, 0, key, pstr->len); + break; + } case DIDmib_dot11smt_dot11WEPDefaultKeysTable_dot11WEPDefaultKey1:{ - if (!isget) - wep_change_key(wlandev, 1, key, pstr->len); - break; - } + if (!isget) + wep_change_key(wlandev, 1, key, pstr->len); + break; + } case DIDmib_dot11smt_dot11WEPDefaultKeysTable_dot11WEPDefaultKey2:{ - if (!isget) - wep_change_key(wlandev, 2, key, pstr->len); - break; - } + if (!isget) + wep_change_key(wlandev, 2, key, pstr->len); + break; + } case DIDmib_dot11smt_dot11WEPDefaultKeysTable_dot11WEPDefaultKey3:{ - if (!isget) - wep_change_key(wlandev, 3, key, pstr->len); - break; - } + if (!isget) + wep_change_key(wlandev, 3, key, pstr->len); + break; + } case DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID:{ - u32 *data = (u32 *) mibitem->data; + u32 *data = (u32 *) mibitem->data; - if (isget) { - *data = - wlandev->hostwep & HOSTWEP_DEFAULTKEY_MASK; - } else { - wlandev->hostwep &= ~(HOSTWEP_DEFAULTKEY_MASK); - - wlandev->hostwep |= - (*data & HOSTWEP_DEFAULTKEY_MASK); - } - break; + if (isget) { + *data = wlandev->hostwep & HOSTWEP_DEFAULTKEY_MASK; + } else { + wlandev->hostwep &= ~(HOSTWEP_DEFAULTKEY_MASK); + wlandev->hostwep |= (*data & HOSTWEP_DEFAULTKEY_MASK); } + break; + } case DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked:{ - u32 *data = (u32 *) mibitem->data; - - if (isget) { - if (wlandev->hostwep & HOSTWEP_PRIVACYINVOKED) - *data = P80211ENUM_truth_true; - else - *data = P80211ENUM_truth_false; - } else { - wlandev->hostwep &= ~(HOSTWEP_PRIVACYINVOKED); - if (*data == P80211ENUM_truth_true) - wlandev->hostwep |= - HOSTWEP_PRIVACYINVOKED; - } - break; + u32 *data = (u32 *) mibitem->data; + + if (isget) { + if (wlandev->hostwep & HOSTWEP_PRIVACYINVOKED) + *data = P80211ENUM_truth_true; + else + *data = P80211ENUM_truth_false; + } else { + wlandev->hostwep &= ~(HOSTWEP_PRIVACYINVOKED); + if (*data == P80211ENUM_truth_true) + wlandev->hostwep |= HOSTWEP_PRIVACYINVOKED; } + break; + } case DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted:{ - u32 *data = (u32 *) mibitem->data; - - if (isget) { - if (wlandev->hostwep & - HOSTWEP_EXCLUDEUNENCRYPTED) - *data = P80211ENUM_truth_true; - else - *data = P80211ENUM_truth_false; - } else { - wlandev->hostwep &= - ~(HOSTWEP_EXCLUDEUNENCRYPTED); - if (*data == P80211ENUM_truth_true) - wlandev->hostwep |= - HOSTWEP_EXCLUDEUNENCRYPTED; - } - break; + u32 *data = (u32 *) mibitem->data; + + if (isget) { + if (wlandev->hostwep & HOSTWEP_EXCLUDEUNENCRYPTED) + *data = P80211ENUM_truth_true; + else + *data = P80211ENUM_truth_false; + } else { + wlandev->hostwep &= ~(HOSTWEP_EXCLUDEUNENCRYPTED); + if (*data == P80211ENUM_truth_true) + wlandev->hostwep |= HOSTWEP_EXCLUDEUNENCRYPTED; } - default: - ; + break; + } } - - return 0; } diff --git a/trunk/drivers/staging/wlan-ng/prism2fw.c b/trunk/drivers/staging/wlan-ng/prism2fw.c index 66c9aa972310..e22784e74efe 100644 --- a/trunk/drivers/staging/wlan-ng/prism2fw.c +++ b/trunk/drivers/staging/wlan-ng/prism2fw.c @@ -123,27 +123,27 @@ struct imgchunk { /* s-record image processing */ /* Data records */ -unsigned int ns3data; -struct s3datarec s3data[S3DATA_MAX]; +static unsigned int ns3data; +static struct s3datarec s3data[S3DATA_MAX]; /* Plug records */ -unsigned int ns3plug; -struct s3plugrec s3plug[S3PLUG_MAX]; +static unsigned int ns3plug; +static struct s3plugrec s3plug[S3PLUG_MAX]; /* CRC records */ -unsigned int ns3crc; -struct s3crcrec s3crc[S3CRC_MAX]; +static unsigned int ns3crc; +static struct s3crcrec s3crc[S3CRC_MAX]; /* Info records */ -unsigned int ns3info; -struct s3inforec s3info[S3INFO_MAX]; +static unsigned int ns3info; +static struct s3inforec s3info[S3INFO_MAX]; /* S7 record (there _better_ be only one) */ -u32 startaddr; +static u32 startaddr; /* Load image chunks */ -unsigned int nfchunks; -struct imgchunk fchunk[CHUNKS_MAX]; +static unsigned int nfchunks; +static struct imgchunk fchunk[CHUNKS_MAX]; /* Note that for the following pdrec_t arrays, the len and code */ /* fields are stored in HOST byte order. The mkpdrlist() function */ @@ -151,11 +151,11 @@ struct imgchunk fchunk[CHUNKS_MAX]; /*----------------------------------------------------------------*/ /* PDA, built from [card|newfile]+[addfile1+addfile2...] */ -struct pda pda; -hfa384x_compident_t nicid; -hfa384x_caplevel_t rfid; -hfa384x_caplevel_t macid; -hfa384x_caplevel_t priid; +static struct pda pda; +static hfa384x_compident_t nicid; +static hfa384x_caplevel_t rfid; +static hfa384x_caplevel_t macid; +static hfa384x_caplevel_t priid; /*================================================================*/ /* Local Function Declarations */ @@ -237,7 +237,7 @@ int prism2_fwtry(struct usb_device *udev, wlandevice_t *wlandev) * 0 - success * ~0 - failure ----------------------------------------------------------------*/ -int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev) +static int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev) { signed int result = 0; struct p80211msg_dot11req_mibget getmsg; @@ -376,7 +376,7 @@ int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev) * 0 success * ~0 failure ----------------------------------------------------------------*/ -int crcimage(struct imgchunk *fchunk, unsigned int nfchunks, +static int crcimage(struct imgchunk *fchunk, unsigned int nfchunks, struct s3crcrec *s3crc, unsigned int ns3crc) { int result = 0; @@ -440,7 +440,7 @@ int crcimage(struct imgchunk *fchunk, unsigned int nfchunks, * Returns: * nothing ----------------------------------------------------------------*/ -void free_chunks(struct imgchunk *fchunk, unsigned int *nfchunks) +static void free_chunks(struct imgchunk *fchunk, unsigned int *nfchunks) { int i; for (i = 0; i < *nfchunks; i++) @@ -462,7 +462,7 @@ void free_chunks(struct imgchunk *fchunk, unsigned int *nfchunks) * Returns: * nothing ----------------------------------------------------------------*/ -void free_srecs(void) +static void free_srecs(void) { ns3data = 0; memset(s3data, 0, sizeof(s3data)); @@ -489,7 +489,7 @@ void free_srecs(void) * 0 - success * ~0 - failure (probably an errno) ----------------------------------------------------------------*/ -int mkimage(struct imgchunk *clist, unsigned int *ccnt) +static int mkimage(struct imgchunk *clist, unsigned int *ccnt) { int result = 0; int i; @@ -582,7 +582,7 @@ int mkimage(struct imgchunk *clist, unsigned int *ccnt) * 0 - success * ~0 - failure (probably an errno) ----------------------------------------------------------------*/ -int mkpdrlist(struct pda *pda) +static int mkpdrlist(struct pda *pda) { int result = 0; u16 *pda16 = (u16 *) pda->buf; @@ -656,7 +656,7 @@ int mkpdrlist(struct pda *pda) * 0 success * ~0 failure ----------------------------------------------------------------*/ -int plugimage(struct imgchunk *fchunk, unsigned int nfchunks, +static int plugimage(struct imgchunk *fchunk, unsigned int nfchunks, struct s3plugrec *s3plug, unsigned int ns3plug, struct pda *pda) { int result = 0; @@ -764,7 +764,7 @@ int plugimage(struct imgchunk *fchunk, unsigned int nfchunks, * 0 - success * ~0 - failure (probably an errno) ----------------------------------------------------------------*/ -int read_cardpda(struct pda *pda, wlandevice_t *wlandev) +static int read_cardpda(struct pda *pda, wlandevice_t *wlandev) { int result = 0; struct p80211msg_p2req_readpda msg; @@ -854,7 +854,7 @@ int read_cardpda(struct pda *pda, wlandevice_t *wlandev) * 0 - success * ~0 - failure (probably an errno) ----------------------------------------------------------------*/ -int read_fwfile(const struct ihex_binrec *record) +static int read_fwfile(const struct ihex_binrec *record) { int i; int rcnt = 0; @@ -978,7 +978,7 @@ int read_fwfile(const struct ihex_binrec *record) * 0 success * ~0 failure ----------------------------------------------------------------*/ -int writeimage(wlandevice_t *wlandev, struct imgchunk *fchunk, +static int writeimage(wlandevice_t *wlandev, struct imgchunk *fchunk, unsigned int nfchunks) { int result = 0; @@ -1130,7 +1130,7 @@ int writeimage(wlandevice_t *wlandev, struct imgchunk *fchunk, return result; } -int validate_identity(void) +static int validate_identity(void) { int i; int result = 1; diff --git a/trunk/drivers/staging/wlan-ng/prism2sta.c b/trunk/drivers/staging/wlan-ng/prism2sta.c index 1dfd9aa5e9fe..32a2f66aab44 100644 --- a/trunk/drivers/staging/wlan-ng/prism2sta.c +++ b/trunk/drivers/staging/wlan-ng/prism2sta.c @@ -1988,12 +1988,12 @@ void prism2sta_commsqual_defer(struct work_struct *data) int result = 0; if (hw->wlandev->hwremoved) - goto done; + return; /* we don't care if we're in AP mode */ if ((wlandev->macmode == WLAN_MACMODE_NONE) || (wlandev->macmode == WLAN_MACMODE_ESS_AP)) { - goto done; + return; } /* It only makes sense to poll these in non-IBSS */ @@ -2004,7 +2004,7 @@ void prism2sta_commsqual_defer(struct work_struct *data) if (result) { printk(KERN_ERR "error fetching commsqual\n"); - goto done; + return; } pr_debug("commsqual %d %d %d\n", @@ -2021,7 +2021,7 @@ void prism2sta_commsqual_defer(struct work_struct *data) if (result) { pr_debug("get signal rate failed, result = %d\n", result); - goto done; + return; } switch (mibitem->data) { @@ -2048,7 +2048,7 @@ void prism2sta_commsqual_defer(struct work_struct *data) if (result) { pr_debug("getconfig(0x%02x) failed, result = %d\n", HFA384x_RID_CURRENTBSSID, result); - goto done; + return; } result = hfa384x_drvr_getconfig(hw, @@ -2057,16 +2057,13 @@ void prism2sta_commsqual_defer(struct work_struct *data) if (result) { pr_debug("getconfig(0x%02x) failed, result = %d\n", HFA384x_RID_CURRENTSSID, result); - goto done; + return; } prism2mgmt_bytestr2pstr((hfa384x_bytestr_t *) &ssid, (p80211pstrd_t *) &wlandev->ssid); /* Reschedule timer */ mod_timer(&hw->commsqual_timer, jiffies + HZ); - -done: - ; } void prism2sta_commsqual_timer(unsigned long data) diff --git a/trunk/drivers/staging/xgifb/XGI_main_26.c b/trunk/drivers/staging/xgifb/XGI_main_26.c index 0c859aecc225..7fc3049a709c 100644 --- a/trunk/drivers/staging/xgifb/XGI_main_26.c +++ b/trunk/drivers/staging/xgifb/XGI_main_26.c @@ -1397,11 +1397,10 @@ static int XGIfb_pan_display(struct fb_var_screeninfo *var, if (var->yoffset < 0 || var->yoffset >= info->var.yres_virtual || var->xoffset) return -EINVAL; - } else { - if (var->xoffset + info->var.xres > info->var.xres_virtual + } else if (var->xoffset + info->var.xres > info->var.xres_virtual || var->yoffset + info->var.yres - > info->var.yres_virtual) - return -EINVAL; + > info->var.yres_virtual) { + return -EINVAL; } err = XGIfb_pan_var(var, info); if (err < 0) diff --git a/trunk/drivers/staging/xgifb/vb_def.h b/trunk/drivers/staging/xgifb/vb_def.h index 69078d933a47..77137e4452a0 100644 --- a/trunk/drivers/staging/xgifb/vb_def.h +++ b/trunk/drivers/staging/xgifb/vb_def.h @@ -3,9 +3,7 @@ #include "../../video/sis/initdef.h" #define VB_XGI301C 0x0020 /* for 301C */ -#define VB_YPbPr1080i 0x03 -#define LVDSCRT1Len 15 #define SupportCRT2in301C 0x0100 /* for 301C */ #define SetCHTVOverScan 0x8000 @@ -22,15 +20,6 @@ #define XGI_CRT2_PORT_00 (0x00 - 0x030) -/* ============================================================= - for 310 -============================================================== */ -#define ModeSoftSetting 0x04 - -/* ---------------- SetMode Stack */ -#define CRT1Len 15 -#define VCLKLen 4 - #define SupportAllCRT2 0x0078 #define NoSupportTV 0x0070 #define NoSupportHiVisionTV 0x0060 @@ -115,16 +104,6 @@ #define ActiveHiTV 0x08 #define ActiveYPbPr 0x10 -/* --------------------------------------------------------- */ -/* translated from asm code 301def.h */ -/* */ -/* --------------------------------------------------------- */ -#define LVDSCRT1Len_H 8 -#define LVDSCRT1Len_V 7 -#define LCDDesDataLen 6 -#define LVDSDesDataLen2 8 -#define LCDDesDataLen2 8 - #define NTSC1024x768HT 1908 #define YPbPrTV525iHT 1716 /* YPbPr */ diff --git a/trunk/drivers/staging/xgifb/vb_init.c b/trunk/drivers/staging/xgifb/vb_init.c index fdb7d1a78b3b..0f6a52954c01 100644 --- a/trunk/drivers/staging/xgifb/vb_init.c +++ b/trunk/drivers/staging/xgifb/vb_init.c @@ -1299,8 +1299,6 @@ unsigned char XGIInitNew(struct pci_dev *pdev) outb(0x67, (pVBInfo->BaseAddr + 0x12)); /* 3c2 <- 67 ,ynlai */ - pVBInfo->ISXPDOS = 0; - pVBInfo->P3c4 = pVBInfo->BaseAddr + 0x14; pVBInfo->P3d4 = pVBInfo->BaseAddr + 0x24; pVBInfo->P3c0 = pVBInfo->BaseAddr + 0x10; diff --git a/trunk/drivers/staging/xgifb/vb_setmode.c b/trunk/drivers/staging/xgifb/vb_setmode.c index e81149fc66e3..e95a1655a6ce 100644 --- a/trunk/drivers/staging/xgifb/vb_setmode.c +++ b/trunk/drivers/staging/xgifb/vb_setmode.c @@ -23,20 +23,18 @@ static const unsigned short XGINew_VGA_DAC[] = { void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo) { - pVBInfo->StandTable = (struct SiS_StandTable_S *) &XGI330_StandTable; - pVBInfo->EModeIDTable = (struct XGI_ExtStruct *) XGI330_EModeIDTable; - pVBInfo->RefIndex = (struct XGI_Ext2Struct *) XGI330_RefIndex; - pVBInfo->XGINEWUB_CRT1Table - = (struct XGI_CRT1TableStruct *) XGI_CRT1Table; - - pVBInfo->MCLKData = (struct SiS_MCLKData *) XGI340New_MCLKData; - pVBInfo->ECLKData = (struct XGI_ECLKDataStruct *) XGI340_ECLKData; - pVBInfo->VCLKData = (struct SiS_VCLKData *) XGI_VCLKData; - pVBInfo->VBVCLKData = (struct SiS_VBVCLKData *) XGI_VBVCLKData; + pVBInfo->StandTable = &XGI330_StandTable; + pVBInfo->EModeIDTable = XGI330_EModeIDTable; + pVBInfo->RefIndex = XGI330_RefIndex; + pVBInfo->XGINEWUB_CRT1Table = XGI_CRT1Table; + + pVBInfo->MCLKData = XGI340New_MCLKData; + pVBInfo->ECLKData = XGI340_ECLKData; + pVBInfo->VCLKData = XGI_VCLKData; + pVBInfo->VBVCLKData = XGI_VBVCLKData; pVBInfo->ScreenOffset = XGI330_ScreenOffset; - pVBInfo->StResInfo = (struct SiS_StResInfo_S *) XGI330_StResInfo; - pVBInfo->ModeResInfo - = (struct SiS_ModeResInfo_S *) XGI330_ModeResInfo; + pVBInfo->StResInfo = XGI330_StResInfo; + pVBInfo->ModeResInfo = XGI330_ModeResInfo; pVBInfo->LCDResInfo = 0; pVBInfo->LCDTypeInfo = 0; @@ -56,24 +54,9 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo) pVBInfo->SR21 = 0xa3; pVBInfo->SR22 = 0xfb; - pVBInfo->NTSCTiming = XGI330_NTSCTiming; - pVBInfo->PALTiming = XGI330_PALTiming; - pVBInfo->HiTVExtTiming = XGI330_HiTVExtTiming; - pVBInfo->HiTVSt1Timing = XGI330_HiTVSt1Timing; - pVBInfo->HiTVSt2Timing = XGI330_HiTVSt2Timing; - pVBInfo->HiTVTextTiming = XGI330_HiTVTextTiming; - pVBInfo->YPbPr750pTiming = XGI330_YPbPr750pTiming; - pVBInfo->YPbPr525pTiming = XGI330_YPbPr525pTiming; - pVBInfo->YPbPr525iTiming = XGI330_YPbPr525iTiming; - pVBInfo->HiTVGroup3Data = XGI330_HiTVGroup3Data; - pVBInfo->HiTVGroup3Simu = XGI330_HiTVGroup3Simu; - pVBInfo->HiTVGroup3Text = XGI330_HiTVGroup3Text; - pVBInfo->Ren525pGroup3 = XGI330_Ren525pGroup3; - pVBInfo->Ren750pGroup3 = XGI330_Ren750pGroup3; - - pVBInfo->TimingH = (struct XGI_TimingHStruct *) XGI_TimingH; - pVBInfo->TimingV = (struct XGI_TimingVStruct *) XGI_TimingV; - pVBInfo->UpdateCRT1 = (struct XGI_XG21CRT1Struct *) XGI_UpdateCRT1Table; + pVBInfo->TimingH = XGI_TimingH; + pVBInfo->TimingV = XGI_TimingV; + pVBInfo->UpdateCRT1 = XGI_UpdateCRT1Table; /* 310 customization related */ if ((pVBInfo->VBType & VB_SIS301LV) || (pVBInfo->VBType & VB_SIS302LV)) @@ -86,8 +69,7 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo) if (ChipType == XG27) { unsigned char temp; - pVBInfo->MCLKData - = (struct SiS_MCLKData *) XGI27New_MCLKData; + pVBInfo->MCLKData = XGI27New_MCLKData; pVBInfo->CR40 = XGI27_cr41; pVBInfo->XGINew_CR97 = 0xc1; pVBInfo->SR15 = XG27_SR13; @@ -116,11 +98,9 @@ static void XGI_SetSeqRegs(unsigned short ModeNo, i = XGI_SetCRT2ToLCDA; if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { tempah |= 0x01; - } else { - if (pVBInfo->VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) { - if (pVBInfo->VBInfo & SetInSlaveMode) - tempah |= 0x01; - } + } else if (pVBInfo->VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) { + if (pVBInfo->VBInfo & SetInSlaveMode) + tempah |= 0x01; } tempah |= 0x20; /* screen off */ @@ -165,10 +145,9 @@ static void XGI_SetATTRegs(unsigned short ModeNo, if ((modeflag & Charx8Dot) && i == 0x13) { /* ifndef Dot9 */ if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { ARdata = 0; - } else { - if ((pVBInfo->VBInfo & + } else if ((pVBInfo->VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) && - (pVBInfo->VBInfo & SetInSlaveMode)) + (pVBInfo->VBInfo & SetInSlaveMode)) { ARdata = 0; } } @@ -258,59 +237,45 @@ static unsigned char XGI_AjustCRT2Rate(unsigned short ModeNo, } if (pVBInfo->VBInfo & SetCRT2ToHiVision) { /* for HiTV */ - if ((pVBInfo->VBType & VB_SIS301LV) && - (pVBInfo->VBExtInfo == VB_YPbPr1080i)) { - tempax |= SupportYPbPr750p; - if ((pVBInfo->VBInfo & SetInSlaveMode) && - ((resinfo == 3) || - (resinfo == 4) || - (resinfo > 7))) + tempax |= SupportHiVision; + if ((pVBInfo->VBInfo & SetInSlaveMode) && + ((resinfo == 4) || + (resinfo == 3 && + (pVBInfo->SetFlag & TVSimuMode)) || + (resinfo > 7))) return 0; - } else { - tempax |= SupportHiVision; - if ((pVBInfo->VBInfo & SetInSlaveMode) && - ((resinfo == 4) || - (resinfo == 3 && - (pVBInfo->SetFlag & TVSimuMode)) || - (resinfo > 7))) - return 0; - } - } else { - if (pVBInfo->VBInfo & (SetCRT2ToAVIDEO | + } else if (pVBInfo->VBInfo & (SetCRT2ToAVIDEO | SetCRT2ToSVIDEO | SetCRT2ToSCART | SetCRT2ToYPbPr525750 | SetCRT2ToHiVision)) { - tempax |= SupportTV; - - if (pVBInfo->VBType & (VB_SIS301B | - VB_SIS302B | - VB_SIS301LV | - VB_SIS302LV | - VB_XGI301C)) - tempax |= SupportTV1024; - - if (!(pVBInfo->VBInfo & TVSetPAL) && - (modeflag & NoSupportSimuTV) && - (pVBInfo->VBInfo & SetInSlaveMode) && - (!(pVBInfo->VBInfo & SetNotSimuMode))) - return 0; - } + tempax |= SupportTV; + + if (pVBInfo->VBType & (VB_SIS301B | + VB_SIS302B | + VB_SIS301LV | + VB_SIS302LV | + VB_XGI301C)) + tempax |= SupportTV1024; + + if (!(pVBInfo->VBInfo & TVSetPAL) && + (modeflag & NoSupportSimuTV) && + (pVBInfo->VBInfo & SetInSlaveMode) && + (!(pVBInfo->VBInfo & SetNotSimuMode))) + return 0; } - } else { /* for LVDS */ - if (pVBInfo->VBInfo & SetCRT2ToLCD) { - tempax |= SupportLCD; + } else if (pVBInfo->VBInfo & SetCRT2ToLCD) { /* for LVDS */ + tempax |= SupportLCD; - if (resinfo > 0x08) - return 0; /* 1024x768 */ + if (resinfo > 0x08) + return 0; /* 1024x768 */ - if (pVBInfo->LCDResInfo < Panel_1024x768) { - if (resinfo > 0x07) - return 0; /* 800x600 */ + if (pVBInfo->LCDResInfo < Panel_1024x768) { + if (resinfo > 0x07) + return 0; /* 800x600 */ - if (resinfo == 0x04) - return 0; /* 512x384 */ - } + if (resinfo == 0x04) + return 0; /* 512x384 */ } } @@ -969,13 +934,8 @@ static unsigned short XGI_GetVCLK2Ptr(unsigned short ModeNo, } /* 301lv */ - if ((pVBInfo->VBType & VB_SIS301LV) && - !(pVBInfo->VBExtInfo == VB_YPbPr1080i)) { - if (pVBInfo->VBExtInfo == YPbPr750p) - VCLKIndex = XGI_YPbPr750pVCLK; - else if (pVBInfo->VBExtInfo == YPbPr525p) - VCLKIndex = YPbPr525pVCLK; - else if (pVBInfo->SetFlag & RPLLDIV2XO) + if (pVBInfo->VBType & VB_SIS301LV) { + if (pVBInfo->SetFlag & RPLLDIV2XO) VCLKIndex = YPbPr525iVCLK_2; else VCLKIndex = YPbPr525iVCLK; @@ -991,13 +951,11 @@ static unsigned short XGI_GetVCLK2Ptr(unsigned short ModeNo, Ext_CRTVCLK; VCLKIndex &= IndexMask; } - } else { /* LVDS */ - if ((pVBInfo->LCDResInfo == Panel_800x600) || - (pVBInfo->LCDResInfo == Panel_320x480)) - VCLKIndex = VCLK40; /* LVDSXlat1VCLK */ - else - VCLKIndex = VCLK65_315 + 2; /* LVDSXlat2VCLK, - LVDSXlat3VCLK */ + } else if ((pVBInfo->LCDResInfo == Panel_800x600) || + (pVBInfo->LCDResInfo == Panel_320x480)) { /* LVDS */ + VCLKIndex = VCLK40; /* LVDSXlat1VCLK */ + } else { + VCLKIndex = VCLK65_315 + 2; /* LVDSXlat2VCLK, LVDSXlat3VCLK */ } return VCLKIndex; @@ -1352,7 +1310,7 @@ static void *XGI_GetLcdPtr(unsigned short BX, unsigned short ModeNo, unsigned short RefreshRateTableIndex, struct vb_device_info *pVBInfo) { - unsigned short i, tempdx, tempcx, tempbx, tempal, modeflag, table; + unsigned short i, tempdx, tempbx, tempal, modeflag, table; struct XGI330_LCDDataTablStruct *tempdi = NULL; @@ -1377,15 +1335,6 @@ static void *XGI_GetLcdPtr(unsigned short BX, unsigned short ModeNo, tempal = (tempal & 0x0f); } - tempcx = LCDLenList[tempbx]; - - if (pVBInfo->LCDInfo & EnableScalingLCD) { /* ScaleLCD */ - if ((tempbx == 5) || (tempbx) == 7) - tempcx = LCDDesDataLen2; - else if ((tempbx == 3) || (tempbx == 8)) - tempcx = LVDSDesDataLen2; - } - switch (tempbx) { case 0: case 1: @@ -1403,14 +1352,6 @@ static void *XGI_GetLcdPtr(unsigned short BX, unsigned short ModeNo, case 5: tempdi = XGI_LCDDesDataTable; break; - case 6: - tempdi = XGI_EPLCHLCDRegPtr; - break; - case 7: - case 8: - case 9: - tempdi = NULL; - break; default: break; } @@ -1764,62 +1705,20 @@ static void *XGI_GetLcdPtr(unsigned short BX, unsigned short ModeNo, default: break; } - } else if (table == 6) { - switch (tempdi[i].DATAPTR) { - case 0: - return &XGI_CH7017LV1024x768[tempal]; - break; - case 1: - return &XGI_CH7017LV1400x1050[tempal]; - break; - default: - break; - } } return NULL; } -static void *XGI_GetTVPtr(unsigned short BX, unsigned short ModeNo, +static struct SiS_TVData const *XGI_GetTVPtr(unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefreshRateTableIndex, struct vb_device_info *pVBInfo) { - unsigned short i, tempdx, tempbx, tempal, modeflag, table; - struct XGI330_TVDataTablStruct *tempdi = NULL; + unsigned short i, tempdx, tempal, modeflag; - tempbx = BX; modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; tempal = pVBInfo->RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; tempal = tempal & 0x3f; - table = tempbx; - - switch (tempbx) { - case 0: - tempdi = NULL; - break; - case 1: - tempdi = NULL; - break; - case 2: - case 6: - tempdi = xgifb_chrontel_tv; - break; - case 3: - tempdi = NULL; - break; - case 4: - tempdi = XGI_TVDataTable; - break; - case 5: - tempdi = NULL; - break; - default: - break; - } - - if (tempdi == NULL) /* OEMUtil */ - return NULL; - tempdx = pVBInfo->TVInfo; if (pVBInfo->VBInfo & SetInSlaveMode) @@ -1830,78 +1729,14 @@ static void *XGI_GetTVPtr(unsigned short BX, unsigned short ModeNo, i = 0; - while (tempdi[i].MASK != 0xffff) { - if ((tempdx & tempdi[i].MASK) == tempdi[i].CAP) + while (XGI_TVDataTable[i].MASK != 0xffff) { + if ((tempdx & XGI_TVDataTable[i].MASK) == + XGI_TVDataTable[i].CAP) break; i++; } - if (table == 0x04) { - switch (tempdi[i].DATAPTR) { - case 0: - return &XGI_ExtPALData[tempal]; - break; - case 1: - return &XGI_ExtNTSCData[tempal]; - break; - case 2: - return &XGI_StPALData[tempal]; - break; - case 3: - return &XGI_StNTSCData[tempal]; - break; - case 4: - return &XGI_ExtHiTVData[tempal]; - break; - case 5: - return &XGI_St2HiTVData[tempal]; - break; - case 6: - return &XGI_ExtYPbPr525iData[tempal]; - break; - case 7: - return &XGI_ExtYPbPr525pData[tempal]; - break; - case 8: - return &XGI_ExtYPbPr750pData[tempal]; - break; - case 9: - return &XGI_StYPbPr525iData[tempal]; - break; - case 10: - return &XGI_StYPbPr525pData[tempal]; - break; - case 11: - return &XGI_StYPbPr750pData[tempal]; - break; - case 12: /* avoid system hang */ - return &XGI_ExtNTSCData[tempal]; - break; - case 13: - return &XGI_St1HiTVData[tempal]; - break; - default: - break; - } - } else if (table == 0x02) { - switch (tempdi[i].DATAPTR) { - case 0: - return &XGI_CHTVUNTSCData[tempal]; - break; - case 1: - return &XGI_CHTVONTSCData[tempal]; - break; - case 2: - return &XGI_CHTVUPALData[tempal]; - break; - case 3: - return &XGI_CHTVOPALData[tempal]; - break; - default: - break; - } - } - return NULL; + return &XGI_TVDataTable[i].DATAPTR[tempal]; } static void XGI_GetLVDSData(unsigned short ModeNo, unsigned short ModeIdIndex, @@ -1914,9 +1749,8 @@ static void XGI_GetLVDSData(unsigned short ModeNo, unsigned short ModeIdIndex, tempbx = 2; if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - LCDPtr = (struct SiS_LVDSData *)XGI_GetLcdPtr(tempbx, - ModeNo, ModeIdIndex, RefreshRateTableIndex, - pVBInfo); + LCDPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, + RefreshRateTableIndex, pVBInfo); pVBInfo->VGAHT = LCDPtr->VGAHT; pVBInfo->VGAVT = LCDPtr->VGAVT; pVBInfo->HT = LCDPtr->LCDHT; @@ -1962,11 +1796,8 @@ static void XGI_ModCRT1Regs(unsigned short ModeNo, unsigned short ModeIdIndex, tempbx = 0; if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - LCDPtr = (struct XGI_LVDSCRT1HDataStruct *) - XGI_GetLcdPtr(tempbx, ModeNo, - ModeIdIndex, - RefreshRateTableIndex, - pVBInfo); + LCDPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, + RefreshRateTableIndex, pVBInfo); for (i = 0; i < 8; i++) pVBInfo->TimingH[0].data[i] = LCDPtr[0].Reg[i]; @@ -1977,13 +1808,8 @@ static void XGI_ModCRT1Regs(unsigned short ModeNo, unsigned short ModeIdIndex, tempbx = 1; if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - LCDPtr1 = (struct XGI_LVDSCRT1VDataStruct *) - XGI_GetLcdPtr( - tempbx, - ModeNo, - ModeIdIndex, - RefreshRateTableIndex, - pVBInfo); + LCDPtr1 = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, + RefreshRateTableIndex, pVBInfo); for (i = 0; i < 7; i++) pVBInfo->TimingV[0].data[i] = LCDPtr1[0].Reg[i]; } @@ -2075,23 +1901,11 @@ static void XGI_SetLVDSRegs(unsigned short ModeNo, unsigned short ModeIdIndex, modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; tempbx = 3; if (pVBInfo->LCDInfo & EnableScalingLCD) - LCDPtr1 = - (struct XGI330_LCDDataDesStruct2 *) - XGI_GetLcdPtr( - tempbx, - ModeNo, - ModeIdIndex, - RefreshRateTableIndex, - pVBInfo); + LCDPtr1 = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, + RefreshRateTableIndex, pVBInfo); else - LCDPtr = - (struct XGI_LCDDesStruct *) - XGI_GetLcdPtr( - tempbx, - ModeNo, - ModeIdIndex, - RefreshRateTableIndex, - pVBInfo); + LCDPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, + RefreshRateTableIndex, pVBInfo); XGI_GetLCDSync(&tempax, &tempbx, pVBInfo); push1 = tempbx; @@ -2438,8 +2252,8 @@ static void XGI_GetVCLKLen(unsigned char tempal, unsigned char *di_0, | VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) { if ((!(pVBInfo->VBInfo & XGI_SetCRT2ToLCDA)) && (pVBInfo->SetFlag & ProgrammingCRT2)) { - *di_0 = (unsigned char) XGI_VBVCLKData[tempal].SR2B; - *di_1 = XGI_VBVCLKData[tempal].SR2C; + *di_0 = XGI_VBVCLKData[tempal].Part4_A; + *di_1 = XGI_VBVCLKData[tempal].Part4_B; } } else { *di_0 = XGI_VCLKData[tempal].SR2B; @@ -2634,21 +2448,16 @@ static void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex, temp = xgifb_reg_get(pVBInfo->P3d4, 0x38); - if (pVBInfo->IF_DEF_LCDA == 1) { - - if (((HwDeviceExtension->jChipType >= XG20) || - (HwDeviceExtension->jChipType >= XG40)) && - (pVBInfo->IF_DEF_LVDS == 0)) { - if (pVBInfo->VBType & - (VB_SIS302B | - VB_SIS301LV | - VB_SIS302LV | - VB_XGI301C)) { - if (temp & EnableDualEdge) { - tempbx |= SetCRT2ToDualEdge; - if (temp & SetToLCDA) - tempbx |= XGI_SetCRT2ToLCDA; - } + if (pVBInfo->IF_DEF_LVDS == 0) { + if (pVBInfo->VBType & + (VB_SIS302B | + VB_SIS301LV | + VB_SIS302LV | + VB_XGI301C)) { + if (temp & EnableDualEdge) { + tempbx |= SetCRT2ToDualEdge; + if (temp & SetToLCDA) + tempbx |= XGI_SetCRT2ToLCDA; } } } @@ -2687,11 +2496,10 @@ static void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex, temp = 0x09FC; else temp = 0x097C; + } else if (pVBInfo->IF_DEF_HiVision == 1) { + temp = 0x01FC; } else { - if (pVBInfo->IF_DEF_HiVision == 1) - temp = 0x01FC; - else - temp = 0x017C; + temp = 0x017C; } } else { /* 3nd party chip */ temp = SetCRT2ToLCD; @@ -2702,19 +2510,17 @@ static void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex, tempbx = 0; } - if (pVBInfo->IF_DEF_LCDA == 1) { /* Select Display Device */ - if (!(pVBInfo->VBType & VB_NoLCD)) { - if (tempbx & XGI_SetCRT2ToLCDA) { - if (tempbx & SetSimuScanMode) - tempbx &= (~(SetCRT2ToLCD | - SetCRT2ToRAMDAC | - SwitchCRT2)); - else - tempbx &= (~(SetCRT2ToLCD | - SetCRT2ToRAMDAC | - SetCRT2ToTV | - SwitchCRT2)); - } + if (!(pVBInfo->VBType & VB_NoLCD)) { + if (tempbx & XGI_SetCRT2ToLCDA) { + if (tempbx & SetSimuScanMode) + tempbx &= (~(SetCRT2ToLCD | + SetCRT2ToRAMDAC | + SwitchCRT2)); + else + tempbx &= (~(SetCRT2ToLCD | + SetCRT2ToRAMDAC | + SetCRT2ToTV | + SwitchCRT2)); } } @@ -2777,11 +2583,9 @@ static void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex, if (!(tempbx & DisableCRT2Display)) { if ((!(tempbx & DriverMode)) || (!(modeflag & CRT2Mode))) { - if (pVBInfo->IF_DEF_LCDA == 1) { - if (!(tempbx & XGI_SetCRT2ToLCDA)) - tempbx |= (SetInSlaveMode | - SetSimuScanMode); - } + if (!(tempbx & XGI_SetCRT2ToLCDA)) + tempbx |= (SetInSlaveMode | + SetSimuScanMode); } /* LCD+TV can't support in slave mode @@ -2867,19 +2671,17 @@ static void XGI_GetTVInfo(unsigned short ModeNo, unsigned short ModeIdIndex, if (pVBInfo->VBInfo & SetCRT2ToHiVision) { if (pVBInfo->VBInfo & SetInSlaveMode) tempbx &= (~RPLLDIV2XO); - } else { - if (tempbx & - (TVSetYPbPr525p | TVSetYPbPr750p)) + } else if (tempbx & + (TVSetYPbPr525p | TVSetYPbPr750p)) { tempbx &= (~RPLLDIV2XO); - else if (!(pVBInfo->VBType & + } else if (!(pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV | VB_SIS302LV | VB_XGI301C))) { - if (tempbx & TVSimuMode) - tempbx &= (~RPLLDIV2XO); - } + if (tempbx & TVSimuMode) + tempbx &= (~RPLLDIV2XO); } } } @@ -2960,20 +2762,6 @@ static unsigned char XGI_GetLCDInfo(unsigned short ModeNo, tempbx |= SetLCDtoNonExpanding; } - if (pVBInfo->IF_DEF_ExpLink == 1) { - if (modeflag & HalfDCLK) { - if (!(tempbx & SetLCDtoNonExpanding)) { - tempbx |= XGI_EnableLVDSDDA; - } else { - if (pVBInfo->LCDResInfo == Panel_1024x768) { - if (resinfo == 4) {/* 512x384 */ - tempbx |= XGI_EnableLVDSDDA; - } - } - } - } - } - if (pVBInfo->VBInfo & SetInSlaveMode) { if (pVBInfo->VBInfo & SetNotSimuMode) tempbx |= XGI_LCDVESATiming; @@ -3122,33 +2910,6 @@ static void XGI_XG27BLSignalVDD(unsigned short tempbh, unsigned short tempbl, xgifb_reg_and_or(pVBInfo->P3d4, 0x48, ~tempbh, tempbl); } -/* --------------------------------------------------------------------- */ -/* Function : XGI_XG21SetPanelDelay */ -/* Input : */ -/* Output : */ -/* Description : */ -/* I/P : bl : 1 ; T1 : the duration between CPL on and signal on */ -/* : bl : 2 ; T2 : the duration signal on and Vdd on */ -/* : bl : 3 ; T3 : the duration between CPL off and signal off */ -/* : bl : 4 ; T4 : the duration signal off and Vdd off */ -/* --------------------------------------------------------------------- */ -static void XGI_XG21SetPanelDelay(struct xgifb_video_info *xgifb_info, - unsigned short tempbl, - struct vb_device_info *pVBInfo) -{ - if (tempbl == 1) - mdelay(xgifb_info->lvds_data.PSC_S1); - - if (tempbl == 2) - mdelay(xgifb_info->lvds_data.PSC_S2); - - if (tempbl == 3) - mdelay(xgifb_info->lvds_data.PSC_S3); - - if (tempbl == 4) - mdelay(xgifb_info->lvds_data.PSC_S4); -} - static void XGI_DisplayOn(struct xgifb_video_info *xgifb_info, struct xgi_hw_device_info *pXGIHWDE, struct vb_device_info *pVBInfo) @@ -3160,12 +2921,12 @@ static void XGI_DisplayOn(struct xgifb_video_info *xgifb_info, if (!(XGI_XG21GetPSCValue(pVBInfo) & 0x1)) { /* LVDS VDD on */ XGI_XG21BLSignalVDD(0x01, 0x01, pVBInfo); - XGI_XG21SetPanelDelay(xgifb_info, 2, pVBInfo); + mdelay(xgifb_info->lvds_data.PSC_S2); } if (!(XGI_XG21GetPSCValue(pVBInfo) & 0x20)) /* LVDS signal on */ XGI_XG21BLSignalVDD(0x20, 0x20, pVBInfo); - XGI_XG21SetPanelDelay(xgifb_info, 3, pVBInfo); + mdelay(xgifb_info->lvds_data.PSC_S3); /* LVDS backlight on */ XGI_XG21BLSignalVDD(0x02, 0x02, pVBInfo); } else { @@ -3180,12 +2941,12 @@ static void XGI_DisplayOn(struct xgifb_video_info *xgifb_info, if (!(XGI_XG27GetPSCValue(pVBInfo) & 0x1)) { /* LVDS VDD on */ XGI_XG27BLSignalVDD(0x01, 0x01, pVBInfo); - XGI_XG21SetPanelDelay(xgifb_info, 2, pVBInfo); + mdelay(xgifb_info->lvds_data.PSC_S2); } if (!(XGI_XG27GetPSCValue(pVBInfo) & 0x20)) /* LVDS signal on */ XGI_XG27BLSignalVDD(0x20, 0x20, pVBInfo); - XGI_XG21SetPanelDelay(xgifb_info, 3, pVBInfo); + mdelay(xgifb_info->lvds_data.PSC_S3); /* LVDS backlight on */ XGI_XG27BLSignalVDD(0x02, 0x02, pVBInfo); } else { @@ -3205,7 +2966,7 @@ void XGI_DisplayOff(struct xgifb_video_info *xgifb_info, if (pVBInfo->IF_DEF_LVDS == 1) { /* LVDS backlight off */ XGI_XG21BLSignalVDD(0x02, 0x00, pVBInfo); - XGI_XG21SetPanelDelay(xgifb_info, 3, pVBInfo); + mdelay(xgifb_info->lvds_data.PSC_S3); } else { /* DVO/DVI signal off */ XGI_XG21BLSignalVDD(0x20, 0x00, pVBInfo); @@ -3216,7 +2977,7 @@ void XGI_DisplayOff(struct xgifb_video_info *xgifb_info, if ((XGI_XG27GetPSCValue(pVBInfo) & 0x2)) { /* LVDS backlight off */ XGI_XG27BLSignalVDD(0x02, 0x00, pVBInfo); - XGI_XG21SetPanelDelay(xgifb_info, 3, pVBInfo); + mdelay(xgifb_info->lvds_data.PSC_S3); } if (pVBInfo->IF_DEF_LVDS == 0) @@ -3378,7 +3139,6 @@ static void XGI_GetCRT2Data(unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short tempax = 0, tempbx, modeflag, resinfo; struct SiS_LCDData *LCDPtr = NULL; - struct SiS_TVData *TVPtr = NULL; /* si+Ext_ResInfo */ modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; @@ -3395,9 +3155,8 @@ static void XGI_GetCRT2Data(unsigned short ModeNo, unsigned short ModeIdIndex, tempbx = 4; if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - LCDPtr = (struct SiS_LCDData *) XGI_GetLcdPtr(tempbx, - ModeNo, ModeIdIndex, RefreshRateTableIndex, - pVBInfo); + LCDPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, + RefreshRateTableIndex, pVBInfo); pVBInfo->RVBHCMAX = LCDPtr->RVBHCMAX; pVBInfo->RVBHCFACT = LCDPtr->RVBHCFACT; @@ -3479,10 +3238,10 @@ static void XGI_GetCRT2Data(unsigned short ModeNo, unsigned short ModeIdIndex, } if (pVBInfo->VBInfo & (SetCRT2ToTV)) { - tempbx = 4; - TVPtr = (struct SiS_TVData *) XGI_GetTVPtr(tempbx, - ModeNo, ModeIdIndex, RefreshRateTableIndex, - pVBInfo); + struct SiS_TVData const *TVPtr; + + TVPtr = XGI_GetTVPtr(ModeNo, ModeIdIndex, RefreshRateTableIndex, + pVBInfo); pVBInfo->RVBHCMAX = TVPtr->RVBHCMAX; pVBInfo->RVBHCFACT = TVPtr->RVBHCFACT; @@ -3882,16 +3641,9 @@ static void XGI_SetLockRegs(unsigned short ModeNo, unsigned short ModeIdIndex, | VB_SIS302LV | VB_XGI301C))) temp += 2; - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - if (pVBInfo->VBType & VB_SIS301LV) { - if (pVBInfo->VBExtInfo == VB_YPbPr1080i) { - if (resinfo == 7) - temp -= 2; - } - } else if (resinfo == 7) { + if ((pVBInfo->VBInfo & SetCRT2ToHiVision) && + !(pVBInfo->VBType & VB_SIS301LV) && (resinfo == 7)) temp -= 2; - } - } } /* 0x05 Horizontal Display Start */ @@ -4061,18 +3813,16 @@ static void XGI_SetLockRegs(unsigned short ModeNo, unsigned short ModeIdIndex, } else { tempbx -= 10; } - } else { - if (pVBInfo->TVInfo & TVSimuMode) { - if (pVBInfo->TVInfo & TVSetPAL) { - if (pVBInfo->VBType & VB_SIS301LV) { - if (!(pVBInfo->TVInfo & - (TVSetYPbPr525p | - TVSetYPbPr750p | - TVSetHiVision))) - tempbx += 40; - } else { + } else if (pVBInfo->TVInfo & TVSimuMode) { + if (pVBInfo->TVInfo & TVSetPAL) { + if (pVBInfo->VBType & VB_SIS301LV) { + if (!(pVBInfo->TVInfo & + (TVSetYPbPr525p | + TVSetYPbPr750p | + TVSetHiVision))) tempbx += 40; - } + } else { + tempbx += 40; } } } @@ -4154,7 +3904,7 @@ static void XGI_SetGroup2(unsigned short ModeNo, unsigned short ModeIdIndex, { unsigned short i, j, tempax, tempbx, tempcx, temp, push1, push2, modeflag, resinfo, crt2crtc; - unsigned char *TimingPoint; + unsigned char const *TimingPoint; unsigned long longtemp, tempeax, tempebx, temp2, tempecx; @@ -4186,33 +3936,33 @@ static void XGI_SetGroup2(unsigned short ModeNo, unsigned short ModeIdIndex, tempax = (tempax & 0xff00) >> 8; xgifb_reg_set(pVBInfo->Part2Port, 0x0, tempax); - TimingPoint = pVBInfo->NTSCTiming; + TimingPoint = XGI330_NTSCTiming; if (pVBInfo->TVInfo & TVSetPAL) - TimingPoint = pVBInfo->PALTiming; + TimingPoint = XGI330_PALTiming; if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - TimingPoint = pVBInfo->HiTVExtTiming; + TimingPoint = XGI330_HiTVExtTiming; if (pVBInfo->VBInfo & SetInSlaveMode) - TimingPoint = pVBInfo->HiTVSt2Timing; + TimingPoint = XGI330_HiTVSt2Timing; if (pVBInfo->SetFlag & TVSimuMode) - TimingPoint = pVBInfo->HiTVSt1Timing; + TimingPoint = XGI330_HiTVSt1Timing; if (!(modeflag & Charx8Dot)) - TimingPoint = pVBInfo->HiTVTextTiming; + TimingPoint = XGI330_HiTVTextTiming; } if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) { if (pVBInfo->TVInfo & TVSetYPbPr525i) - TimingPoint = pVBInfo->YPbPr525iTiming; + TimingPoint = XGI330_YPbPr525iTiming; if (pVBInfo->TVInfo & TVSetYPbPr525p) - TimingPoint = pVBInfo->YPbPr525pTiming; + TimingPoint = XGI330_YPbPr525pTiming; if (pVBInfo->TVInfo & TVSetYPbPr750p) - TimingPoint = pVBInfo->YPbPr750pTiming; + TimingPoint = XGI330_YPbPr750pTiming; } for (i = 0x01, j = 0; i <= 0x2D; i++, j++) @@ -4385,11 +4135,9 @@ static void XGI_SetGroup2(unsigned short ModeNo, unsigned short ModeIdIndex, temp += 1; } } - } else { - if (pVBInfo->VBInfo & SetInSlaveMode) { - if (ModeNo == 0x2f) - temp += 1; - } + } else if (pVBInfo->VBInfo & SetInSlaveMode) { + if (ModeNo == 0x2f) + temp += 1; } } @@ -4644,8 +4392,8 @@ static void XGI_SetLCDRegs(unsigned short ModeNo, unsigned short ModeIdIndex, /* Customized LCDB Des no add */ tempbx = 5; - LCDBDesPtr = (struct XGI_LCDDesStruct *) XGI_GetLcdPtr(tempbx, ModeNo, - ModeIdIndex, RefreshRateTableIndex, pVBInfo); + LCDBDesPtr = XGI_GetLcdPtr(tempbx, ModeNo, ModeIdIndex, + RefreshRateTableIndex, pVBInfo); tempah = pVBInfo->LCDResInfo; tempah &= PanelResInfo; @@ -4876,7 +4624,7 @@ static void XGI_SetGroup3(unsigned short ModeNo, unsigned short ModeIdIndex, struct vb_device_info *pVBInfo) { unsigned short i; - unsigned char *tempdi; + unsigned char const *tempdi; unsigned short modeflag; /* si+Ext_ResInfo */ @@ -4905,18 +4653,18 @@ static void XGI_SetGroup3(unsigned short ModeNo, unsigned short ModeIdIndex, if (pVBInfo->TVInfo & TVSetYPbPr525i) return; - tempdi = pVBInfo->HiTVGroup3Data; + tempdi = XGI330_HiTVGroup3Data; if (pVBInfo->SetFlag & TVSimuMode) { - tempdi = pVBInfo->HiTVGroup3Simu; + tempdi = XGI330_HiTVGroup3Simu; if (!(modeflag & Charx8Dot)) - tempdi = pVBInfo->HiTVGroup3Text; + tempdi = XGI330_HiTVGroup3Text; } if (pVBInfo->TVInfo & TVSetYPbPr525p) - tempdi = pVBInfo->Ren525pGroup3; + tempdi = XGI330_Ren525pGroup3; if (pVBInfo->TVInfo & TVSetYPbPr750p) - tempdi = pVBInfo->Ren750pGroup3; + tempdi = XGI330_Ren750pGroup3; for (i = 0; i <= 0x3E; i++) xgifb_reg_set(pVBInfo->Part3Port, i, tempdi[i]); @@ -5054,13 +4802,11 @@ static void XGI_SetGroup4(unsigned short ModeNo, unsigned short ModeIdIndex, if (pVBInfo->VBInfo & SetCRT2ToLCD) { if (tempax > 800) tempax -= 800; - } else { - if (pVBInfo->VGAHDE > 800) { - if (pVBInfo->VGAHDE == 1024) - tempax = (tempax * 25 / 32) - 1; - else - tempax = (tempax * 20 / 32) - 1; - } + } else if (pVBInfo->VGAHDE > 800) { + if (pVBInfo->VGAHDE == 1024) + tempax = (tempax * 25 / 32) - 1; + else + tempax = (tempax * 20 / 32) - 1; } tempax -= 1; @@ -5101,9 +4847,7 @@ static void XGI_SetGroup4(unsigned short ModeNo, unsigned short ModeIdIndex, } /* end 301b */ - if (pVBInfo->ISXPDOS == 0) - XGI_SetCRT2VCLK(ModeNo, ModeIdIndex, RefreshRateTableIndex, - pVBInfo); + XGI_SetCRT2VCLK(ModeNo, ModeIdIndex, RefreshRateTableIndex, pVBInfo); } static void XGINew_EnableCRT2(struct vb_device_info *pVBInfo) @@ -6414,12 +6158,10 @@ static void XGI_EnableBridge(struct xgifb_video_info *xgifb_info, if (pVBInfo->SetFlag & EnableChA) { /* Power on */ xgifb_reg_set(pVBInfo->Part1Port, 0x1E, 0x20); - } else { - if (pVBInfo->VBInfo & SetCRT2ToDualEdge) { - /* Power on */ - xgifb_reg_set(pVBInfo->Part1Port, - 0x1E, 0x20); - } + } else if (pVBInfo->VBInfo & SetCRT2ToDualEdge) { + /* Power on */ + xgifb_reg_set(pVBInfo->Part1Port, + 0x1E, 0x20); } } @@ -6607,7 +6349,6 @@ unsigned char XGISetModeNew(struct xgifb_video_info *xgifb_info, struct vb_device_info *pVBInfo = &VBINF; pVBInfo->BaseAddr = xgifb_info->vga_base; pVBInfo->IF_DEF_LVDS = 0; - pVBInfo->IF_DEF_LCDA = 1; if (HwDeviceExtension->jChipType >= XG20) { pVBInfo->IF_DEF_YPbPr = 0; @@ -6678,16 +6419,14 @@ unsigned char XGISetModeNew(struct xgifb_video_info *xgifb_info, XGI_SetLCDAGroup(ModeNo, ModeIdIndex, HwDeviceExtension, pVBInfo); } - } else { - if (!(pVBInfo->VBInfo & SwitchCRT2)) { - XGI_SetCRT1Group(xgifb_info, - HwDeviceExtension, ModeNo, - ModeIdIndex, pVBInfo); - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { - XGI_SetLCDAGroup(ModeNo, ModeIdIndex, - HwDeviceExtension, - pVBInfo); - } + } else if (!(pVBInfo->VBInfo & SwitchCRT2)) { + XGI_SetCRT1Group(xgifb_info, + HwDeviceExtension, ModeNo, + ModeIdIndex, pVBInfo); + if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { + XGI_SetLCDAGroup(ModeNo, ModeIdIndex, + HwDeviceExtension, + pVBInfo); } } diff --git a/trunk/drivers/staging/xgifb/vb_struct.h b/trunk/drivers/staging/xgifb/vb_struct.h index 22c8eb9810d6..70158c2c68af 100644 --- a/trunk/drivers/staging/xgifb/vb_struct.h +++ b/trunk/drivers/staging/xgifb/vb_struct.h @@ -43,13 +43,6 @@ struct XGI_LCDDesStruct { unsigned short LCDVRS; }; -struct XGI_LCDDataTablStruct { - unsigned char PANELID; - unsigned short MASK; - unsigned short CAP; - unsigned short DATAPTR; -}; - struct XGI330_LCDDataDesStruct2 { unsigned short LCDHDES; unsigned short LCDHRS; @@ -59,19 +52,6 @@ struct XGI330_LCDDataDesStruct2 { unsigned short LCDVSync; }; - -struct XGI330_TVDataStruct { - unsigned short RVBHCMAX; - unsigned short RVBHCFACT; - unsigned short VGAHT; - unsigned short VGAVT; - unsigned short TVHDE; - unsigned short TVVDE; - unsigned short RVBHRS; - unsigned char FlickerMode; - unsigned short HALFRVBHRS; -}; - struct XGI330_LCDDataTablStruct { unsigned char PANELID; unsigned short MASK; @@ -82,7 +62,7 @@ struct XGI330_LCDDataTablStruct { struct XGI330_TVDataTablStruct { unsigned short MASK; unsigned short CAP; - unsigned short DATAPTR; + struct SiS_TVData const *DATAPTR; }; @@ -137,10 +117,10 @@ struct XGI21_LVDSCapStruct { unsigned short LVDSVSYNC; unsigned char VCLKData1; unsigned char VCLKData2; - unsigned char PSC_S1; - unsigned char PSC_S2; - unsigned char PSC_S3; - unsigned char PSC_S4; + unsigned char PSC_S1; /* Duration between CPL on and signal on */ + unsigned char PSC_S2; /* Duration signal on and Vdd on */ + unsigned char PSC_S3; /* Duration between CPL off and signal off */ + unsigned char PSC_S4; /* Duration signal off and Vdd off */ unsigned char PSC_S5; }; @@ -155,7 +135,6 @@ struct XGI301C_Tap4TimingStruct { }; struct vb_device_info { - unsigned char ISXPDOS; unsigned long P3c4, P3d4, P3c0, P3ce, P3c2, P3cc; unsigned long P3ca, P3c6, P3c7, P3c8, P3c9, P3da; unsigned long Part0Port, Part1Port, Part2Port; @@ -168,12 +147,10 @@ struct vb_device_info { unsigned short ModeType; unsigned short IF_DEF_LVDS, IF_DEF_TRUMPION, IF_DEF_DSTN; unsigned short IF_DEF_CRT2Monitor; - unsigned short IF_DEF_LCDA, IF_DEF_YPbPr; - unsigned short IF_DEF_ExpLink; + unsigned short IF_DEF_YPbPr; unsigned short IF_DEF_HiVision; unsigned short LCDResInfo, LCDTypeInfo, VBType;/*301b*/ unsigned short VBInfo, TVInfo, LCDInfo; - unsigned short VBExtInfo;/*301lv*/ unsigned short SetFlag; unsigned short NewFlickerMode; unsigned short SelectCRT2Rate; @@ -197,20 +174,6 @@ struct vb_device_info { struct SiS_MCLKData *MCLKData; struct XGI_ECLKDataStruct *ECLKData; - unsigned char *NTSCTiming; - unsigned char *PALTiming; - unsigned char *HiTVExtTiming; - unsigned char *HiTVSt1Timing; - unsigned char *HiTVSt2Timing; - unsigned char *HiTVTextTiming; - unsigned char *YPbPr750pTiming; - unsigned char *YPbPr525pTiming; - unsigned char *YPbPr525iTiming; - unsigned char *HiTVGroup3Data; - unsigned char *HiTVGroup3Simu; - unsigned char *HiTVGroup3Text; - unsigned char *Ren525pGroup3; - unsigned char *Ren750pGroup3; unsigned char *ScreenOffset; unsigned char *pXGINew_DRAMTypeDefinition; unsigned char XGINew_CR97; diff --git a/trunk/drivers/staging/xgifb/vb_table.h b/trunk/drivers/staging/xgifb/vb_table.h index 1c168461411d..180aae042cea 100644 --- a/trunk/drivers/staging/xgifb/vb_table.h +++ b/trunk/drivers/staging/xgifb/vb_table.h @@ -403,13 +403,6 @@ static struct XGI_CRT1TableStruct XGI_CRT1Table[] = { 0x03, 0xDE, 0xC0, 0x84, 0xBF, 0x04, 0x90} } /* 0x47 */ }; -static unsigned char XGI_CH7017LV1024x768[] = { - 0x60, 0x02, 0x00, 0x07, 0x40, 0xED, - 0xA3, 0xC8, 0xC7, 0xAC, 0xE0, 0x02}; -static unsigned char XGI_CH7017LV1400x1050[] = { - 0x60, 0x03, 0x11, 0x00, 0x40, 0xE3, - 0xAD, 0xDB, 0xF6, 0xAC, 0xE0, 0x02}; - /*add for new UNIVGABIOS*/ static struct SiS_LCDData XGI_StLCD1024x768Data[] = { {62, 25, 800, 546, 1344, 806}, @@ -525,18 +518,7 @@ static struct SiS_LCDData XGI_StLCD1600x1200Data[] = { {1, 1, 2160, 1250, 2160, 1250} /* 09 (1600x1200) */ }; -static struct SiS_LCDData XGI_CetLCD1400x1050Data[] = { - {1, 1, 1688, 1066, 1688, 1066}, /* 00 (320x200,320x400, - 640x200,640x400) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 01 (320x350,640x350) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 02 (360x400,720x400) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 03 (720x350) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 04 (640x480x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 05 (800x600x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 06 (1024x768x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 07 (1280x1024x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066} /* 08 (1400x1050x60Hz) */ -}; +#define XGI_CetLCD1400x1050Data XGI_CetLCD1280x1024Data static struct SiS_LCDData XGI_NoScalingData[] = { {1, 1, 800, 449, 800, 449}, @@ -583,17 +565,7 @@ static struct SiS_LCDData xgifb_lcd_1280x1024x75[] = { {1, 1, 1688, 1066, 1688, 1066} /* ; 07 (1280x1024x75Hz) */ }; -static struct SiS_LCDData XGI_CetLCD1280x1024x75Data[] = { - {1, 1, 1688, 1066, 1688, 1066}, /* ; 00 (320x200,320x400, - 640x200,640x400) */ - {1, 1, 1688, 1066, 1688, 1066}, /* ; 01 (320x350,640x350) */ - {1, 1, 1688, 1066, 1688, 1066}, /* ; 02 (360x400,720x400) */ - {1, 1, 1688, 1066, 1688, 1066}, /* ; 03 (720x350) */ - {1, 1, 1688, 1066, 1688, 1066}, /* ; 04 (640x480x75Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* ; 05 (800x600x75Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* ; 06 (1024x768x75Hz) */ - {1, 1, 1688, 1066, 1688, 1066} /* ; 07 (1280x1024x75Hz) */ -}; +#define XGI_CetLCD1280x1024x75Data XGI_CetLCD1280x1024Data static struct SiS_LCDData XGI_NoScalingDatax75[] = { {1, 1, 800, 449, 800, 449}, /* ; 00 (320x200, 320x400, @@ -903,7 +875,7 @@ static struct XGI330_LCDDataDesStruct2 XGI_NoScalingDesDatax75[] = { {9, 1337, 0, 771, 112, 6} /* ; 0A (1280x768x60Hz) */ }; -static struct XGI330_TVDataStruct XGI_StPALData[] = { +static const struct SiS_TVData XGI_StPALData[] = { {1, 1, 864, 525, 1270, 400, 100, 0, 760}, {1, 1, 864, 525, 1270, 350, 100, 0, 760}, {1, 1, 864, 525, 1270, 400, 0, 0, 720}, @@ -912,7 +884,7 @@ static struct XGI330_TVDataStruct XGI_StPALData[] = { {1, 1, 864, 525, 1270, 600, 50, 0, 0} }; -static struct XGI330_TVDataStruct XGI_ExtPALData[] = { +static const struct SiS_TVData XGI_ExtPALData[] = { {2, 1, 1080, 463, 1270, 500, 50, 0, 50}, {15, 7, 1152, 413, 1270, 500, 50, 0, 50}, {2, 1, 1080, 463, 1270, 500, 50, 0, 50}, @@ -923,7 +895,7 @@ static struct XGI330_TVDataStruct XGI_ExtPALData[] = { {3, 2, 1080, 619, 1270, 540, 438, 0, 438} }; -static struct XGI330_TVDataStruct XGI_StNTSCData[] = { +static const struct SiS_TVData XGI_StNTSCData[] = { {1, 1, 858, 525, 1270, 400, 50, 0, 760}, {1, 1, 858, 525, 1270, 350, 50, 0, 640}, {1, 1, 858, 525, 1270, 400, 0, 0, 720}, @@ -931,7 +903,7 @@ static struct XGI330_TVDataStruct XGI_StNTSCData[] = { {1, 1, 858, 525, 1270, 480, 0, 0, 760} }; -static struct XGI330_TVDataStruct XGI_ExtNTSCData[] = { +static const struct SiS_TVData XGI_ExtNTSCData[] = { {9, 5, 1001, 453, 1270, 420, 171, 0, 171}, {12, 5, 858, 403, 1270, 420, 171, 0, 171}, {9, 5, 1001, 453, 1270, 420, 171, 0, 171}, @@ -943,7 +915,7 @@ static struct XGI330_TVDataStruct XGI_ExtNTSCData[] = { {3, 2, 1001, 533, 1270, 420, 0, 0, 0} }; -static struct XGI330_TVDataStruct XGI_St1HiTVData[] = { +static const struct SiS_TVData XGI_St1HiTVData[] = { {1, 1, 892, 563, 690, 800, 0, 0, 0}, /* 00 (320x200,320x400, 640x200,640x400) */ {1, 1, 892, 563, 690, 700, 0, 0, 0}, /* 01 (320x350,640x350) */ @@ -953,7 +925,7 @@ static struct XGI330_TVDataStruct XGI_St1HiTVData[] = { {8, 5, 1050, 683, 1648, 960, 0x150, 1, 0} /* 05 (400x300,800x600) */ }; -static struct XGI330_TVDataStruct XGI_St2HiTVData[] = { +static const struct SiS_TVData XGI_St2HiTVData[] = { {3, 1, 840, 483, 1648, 960, 0x032, 0, 0}, /* 00 (320x200,320x400, 640x200,640x400) */ {1, 1, 892, 563, 690, 700, 0, 0, 0}, /* 01 (320x350,640x350) */ @@ -963,7 +935,7 @@ static struct XGI330_TVDataStruct XGI_St2HiTVData[] = { {8, 5, 1050, 683, 1648, 960, 0x17C, 1, 0} /* 05 (400x300,800x600) */ }; -static struct XGI330_TVDataStruct XGI_ExtHiTVData[] = { +static const struct SiS_TVData XGI_ExtHiTVData[] = { {6, 1, 840, 563, 1632, 960, 0, 0, 0}, /* 00 (320x200,320x400, 640x200,640x400) */ {3, 1, 960, 563, 1632, 960, 0, 0, 0}, /* 01 (320x350,640x350) */ @@ -978,7 +950,7 @@ static struct XGI330_TVDataStruct XGI_ExtHiTVData[] = { {8, 5, 1750, 803, 1648, 960, 0x128, 0, 0} /* 0A (1280x720) */ }; -static struct XGI330_TVDataStruct XGI_ExtYPbPr525iData[] = { +static const struct SiS_TVData XGI_ExtYPbPr525iData[] = { { 9, 5, 1001, 453, 1270, 420, 171, 0, 171}, { 12, 5, 858, 403, 1270, 420, 171, 0, 171}, { 9, 5, 1001, 453, 1270, 420, 171, 0, 171}, @@ -990,7 +962,7 @@ static struct XGI330_TVDataStruct XGI_ExtYPbPr525iData[] = { { 3, 2, 1001, 533, 1250, 420, 0, 0, 0} }; -static struct XGI330_TVDataStruct XGI_StYPbPr525iData[] = { +static const struct SiS_TVData XGI_StYPbPr525iData[] = { {1, 1, 858, 525, 1270, 400, 50, 0, 760}, {1, 1, 858, 525, 1270, 350, 50, 0, 640}, {1, 1, 858, 525, 1270, 400, 0, 0, 720}, @@ -998,7 +970,7 @@ static struct XGI330_TVDataStruct XGI_StYPbPr525iData[] = { {1, 1, 858, 525, 1270, 480, 0, 0, 760}, }; -static struct XGI330_TVDataStruct XGI_ExtYPbPr525pData[] = { +static const struct SiS_TVData XGI_ExtYPbPr525pData[] = { { 9, 5, 1001, 453, 1270, 420, 171, 0, 171}, { 12, 5, 858, 403, 1270, 420, 171, 0, 171}, { 9, 5, 1001, 453, 1270, 420, 171, 0, 171}, @@ -1010,7 +982,7 @@ static struct XGI330_TVDataStruct XGI_ExtYPbPr525pData[] = { { 3, 2, 1001, 533, 1270, 420, 0, 0, 0} }; -static struct XGI330_TVDataStruct XGI_StYPbPr525pData[] = { +static const struct SiS_TVData XGI_StYPbPr525pData[] = { {1, 1, 1716, 525, 1270, 400, 50, 0, 760}, {1, 1, 1716, 525, 1270, 350, 50, 0, 640}, {1, 1, 1716, 525, 1270, 400, 0, 0, 720}, @@ -1018,7 +990,7 @@ static struct XGI330_TVDataStruct XGI_StYPbPr525pData[] = { {1, 1, 1716, 525, 1270, 480, 0, 0, 760}, }; -static struct XGI330_TVDataStruct XGI_ExtYPbPr750pData[] = { +static const struct SiS_TVData XGI_ExtYPbPr750pData[] = { { 3, 1, 935, 470, 1130, 680, 50, 0, 0}, /* 00 (320x200,320x400, 640x200,640x400) */ {24, 7, 935, 420, 1130, 680, 50, 0, 0}, /* 01 (320x350,640x350) */ @@ -1033,7 +1005,7 @@ static struct XGI330_TVDataStruct XGI_ExtYPbPr750pData[] = { {10, 9, 1320, 830, 1130, 640, 50, 0, 0} }; -static struct XGI330_TVDataStruct XGI_StYPbPr750pData[] = { +static const struct SiS_TVData XGI_StYPbPr750pData[] = { {1, 1, 1650, 750, 1280, 400, 50, 0, 760}, {1, 1, 1650, 750, 1280, 350, 50, 0, 640}, {1, 1, 1650, 750, 1280, 400, 0, 0, 720}, @@ -1041,7 +1013,7 @@ static struct XGI330_TVDataStruct XGI_StYPbPr750pData[] = { {1, 1, 1650, 750, 1280, 480, 0, 0, 760}, }; -static unsigned char XGI330_NTSCTiming[] = { +static const unsigned char XGI330_NTSCTiming[] = { 0x17, 0x1d, 0x03, 0x09, 0x05, 0x06, 0x0c, 0x0c, 0x94, 0x49, 0x01, 0x0a, 0x06, 0x0d, 0x04, 0x0a, 0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x1b, @@ -1052,7 +1024,7 @@ static unsigned char XGI330_NTSCTiming[] = { 0x00, 0x40, 0x44, 0x00, 0xdb, 0x02, 0x3b, 0x00 }; -static unsigned char XGI330_PALTiming[] = { +static const unsigned char XGI330_PALTiming[] = { 0x21, 0x5A, 0x35, 0x6e, 0x04, 0x38, 0x3d, 0x70, 0x94, 0x49, 0x01, 0x12, 0x06, 0x3e, 0x35, 0x6d, 0x06, 0x14, 0x3e, 0x35, 0x6d, 0x00, 0x45, 0x2b, @@ -1063,7 +1035,7 @@ static unsigned char XGI330_PALTiming[] = { 0x00, 0x40, 0x3e, 0x00, 0xe1, 0x02, 0x28, 0x00 }; -static unsigned char XGI330_HiTVExtTiming[] = { +static const unsigned char XGI330_HiTVExtTiming[] = { 0x2D, 0x60, 0x2C, 0x5F, 0x08, 0x31, 0x3A, 0x64, 0x28, 0x02, 0x01, 0x3D, 0x06, 0x3E, 0x35, 0x6D, 0x06, 0x14, 0x3E, 0x35, 0x6D, 0x00, 0xC5, 0x3F, @@ -1075,7 +1047,7 @@ static unsigned char XGI330_HiTVExtTiming[] = { 0x27, 0x00, 0xfc, 0xff, 0x6a, 0x00 }; -static unsigned char XGI330_HiTVSt1Timing[] = { +static const unsigned char XGI330_HiTVSt1Timing[] = { 0x32, 0x65, 0x2C, 0x5F, 0x08, 0x31, 0x3A, 0x65, 0x28, 0x02, 0x01, 0x3D, 0x06, 0x3E, 0x35, 0x6D, 0x06, 0x14, 0x3E, 0x35, 0x6D, 0x00, 0xC5, 0x3F, @@ -1087,7 +1059,7 @@ static unsigned char XGI330_HiTVSt1Timing[] = { 0x0E, 0x00, 0xfc, 0xff, 0x2d, 0x00 }; -static unsigned char XGI330_HiTVSt2Timing[] = { +static const unsigned char XGI330_HiTVSt2Timing[] = { 0x32, 0x65, 0x2C, 0x5F, 0x08, 0x31, 0x3A, 0x64, 0x28, 0x02, 0x01, 0x3D, 0x06, 0x3E, 0x35, 0x6D, 0x06, 0x14, 0x3E, 0x35, 0x6D, 0x00, 0xC5, 0x3F, @@ -1099,7 +1071,7 @@ static unsigned char XGI330_HiTVSt2Timing[] = { 0x27, 0x00, 0xFC, 0xff, 0x6a, 0x00 }; -static unsigned char XGI330_HiTVTextTiming[] = { +static const unsigned char XGI330_HiTVTextTiming[] = { 0x32, 0x65, 0x2C, 0x5F, 0x08, 0x31, 0x3A, 0x65, 0x28, 0x02, 0x01, 0x3D, 0x06, 0x3E, 0x35, 0x6D, 0x06, 0x14, 0x3E, 0x35, 0x6D, 0x00, 0xC5, 0x3F, @@ -1111,7 +1083,7 @@ static unsigned char XGI330_HiTVTextTiming[] = { 0x11, 0x00, 0xFC, 0xFF, 0x32, 0x00 }; -static unsigned char XGI330_YPbPr750pTiming[] = { +static const unsigned char XGI330_YPbPr750pTiming[] = { 0x30, 0x1d, 0xe8, 0x09, 0x09, 0xed, 0x0c, 0x0c, 0x98, 0x0a, 0x01, 0x0c, 0x06, 0x0d, 0x04, 0x0a, 0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x3f, @@ -1123,7 +1095,7 @@ static unsigned char XGI330_YPbPr750pTiming[] = { 0x11, 0x00, 0xfc, 0xff, 0x32, 0x00 }; -static unsigned char XGI330_YPbPr525pTiming[] = { +static const unsigned char XGI330_YPbPr525pTiming[] = { 0x3E, 0x11, 0x06, 0x09, 0x0b, 0x0c, 0x0c, 0x0c, 0x98, 0x0a, 0x01, 0x0d, 0x06, 0x0d, 0x04, 0x0a, 0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x3f, @@ -1135,7 +1107,7 @@ static unsigned char XGI330_YPbPr525pTiming[] = { 0x11, 0x00, 0xFC, 0xFF, 0x32, 0x00 }; -static unsigned char XGI330_YPbPr525iTiming[] = { +static const unsigned char XGI330_YPbPr525iTiming[] = { 0x1B, 0x21, 0x03, 0x09, 0x05, 0x06, 0x0C, 0x0C, 0x94, 0x49, 0x01, 0x0A, 0x06, 0x0D, 0x04, 0x0A, 0x06, 0x14, 0x0D, 0x04, 0x0A, 0x00, 0x85, 0x1B, @@ -1147,7 +1119,7 @@ static unsigned char XGI330_YPbPr525iTiming[] = { 0x44, 0x00, 0xDB, 0x02, 0x3B, 0x00 }; -static unsigned char XGI330_HiTVGroup3Data[] = { +static const unsigned char XGI330_HiTVGroup3Data[] = { 0x00, 0x1A, 0x22, 0x63, 0x62, 0x22, 0x08, 0x5F, 0x05, 0x21, 0xB2, 0xB2, 0x55, 0x77, 0x2A, 0xA6, 0x25, 0x2F, 0x47, 0xFA, 0xC8, 0xFF, 0x8E, 0x20, @@ -1158,7 +1130,7 @@ static unsigned char XGI330_HiTVGroup3Data[] = { 0x18, 0x05, 0x18, 0x05, 0x4C, 0xA8, 0x01 }; -static unsigned char XGI330_HiTVGroup3Simu[] = { +static const unsigned char XGI330_HiTVGroup3Simu[] = { 0x00, 0x1A, 0x22, 0x63, 0x62, 0x22, 0x08, 0x95, 0xDB, 0x20, 0xB8, 0xB8, 0x55, 0x47, 0x2A, 0xA6, 0x25, 0x2F, 0x47, 0xFA, 0xC8, 0xFF, 0x8E, 0x20, @@ -1169,7 +1141,7 @@ static unsigned char XGI330_HiTVGroup3Simu[] = { 0x18, 0x05, 0x18, 0x05, 0x4C, 0xA8, 0x01 }; -static unsigned char XGI330_HiTVGroup3Text[] = { +static const unsigned char XGI330_HiTVGroup3Text[] = { 0x00, 0x1A, 0x22, 0x63, 0x62, 0x22, 0x08, 0xA7, 0xF5, 0x20, 0xCE, 0xCE, 0x55, 0x47, 0x2A, 0xA6, 0x25, 0x2F, 0x47, 0xFA, 0xC8, 0xFF, 0x8E, 0x20, @@ -1180,7 +1152,7 @@ static unsigned char XGI330_HiTVGroup3Text[] = { 0x18, 0x05, 0x18, 0x05, 0x4C, 0xA8, 0x01 }; -static unsigned char XGI330_Ren525pGroup3[] = { +static const unsigned char XGI330_Ren525pGroup3[] = { 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13, 0xB1, 0x41, 0x62, 0x62, 0xFF, 0xF4, 0x45, 0xa6, 0x25, 0x2F, 0x67, 0xF6, 0xbf, 0xFF, 0x8E, 0x20, @@ -1191,7 +1163,7 @@ static unsigned char XGI330_Ren525pGroup3[] = { 0x1a, 0x1F, 0x25, 0x2a, 0x4C, 0xAA, 0x01 }; -static unsigned char XGI330_Ren750pGroup3[] = { +static const unsigned char XGI330_Ren750pGroup3[] = { 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a, 0x54, 0x41, 0xE7, 0xE7, 0xFF, 0xF4, 0x45, 0xa6, 0x25, 0x2F, 0x67, 0xF6, 0xbf, 0xFF, 0x8E, 0x20, @@ -1236,17 +1208,7 @@ static struct SiS_LVDSData XGI_LVDS1280x1024Data_1[] = { {1688, 1066, 1688, 1066} }; -static struct SiS_LVDSData XGI_LVDS1280x1024Data_2[] = { - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {800, 449, 1280, 801}, - {800, 525, 1280, 813} -}; +#define XGI_LVDS1280x1024Data_2 XGI_LVDS1024x768Data_2 static struct SiS_LVDSData XGI_LVDS1400x1050Data_1[] = { {928, 416, 1688, 1066}, @@ -1532,42 +1494,6 @@ static struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesDatax75[] = { {0, 1328, 0, 771, 112, 6} /* ; 0A (1280x768x75Hz) */ }; -static struct SiS_LVDSData XGI_CHTVUNTSCData[] = { - { 840, 600, 840, 600}, - { 840, 600, 840, 600}, - { 840, 600, 840, 600}, - { 840, 600, 840, 600}, - { 784, 600, 784, 600}, - {1064, 750, 1064, 750} -}; - -static struct SiS_LVDSData XGI_CHTVONTSCData[] = { - { 840, 525, 840, 525}, - { 840, 525, 840, 525}, - { 840, 525, 840, 525}, - { 840, 525, 840, 525}, - { 784, 525, 784, 525}, - {1040, 700, 1040, 700} -}; - -static struct SiS_LVDSData XGI_CHTVUPALData[] = { - {1008, 625, 1008, 625}, - {1008, 625, 1008, 625}, - {1008, 625, 1008, 625}, - {1008, 625, 1008, 625}, - { 840, 750, 840, 750}, - { 936, 836, 936, 836} -}; - -static struct SiS_LVDSData XGI_CHTVOPALData[] = { - {1008, 625, 1008, 625}, - {1008, 625, 1008, 625}, - {1008, 625, 1008, 625}, - {1008, 625, 1008, 625}, - {840, 625, 840, 625}, - {960, 750, 960, 750} -}; - /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ static struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_H[] = { { {0x4B, 0x27, 0x8F, 0x32, 0x1B, 0x00, 0x45, 0x00} }, /* 00 (320x) */ @@ -1933,49 +1859,21 @@ static struct XGI330_LCDDataTablStruct XGI_EPLLCDDesDataPtr[] = { {0xFF, 0x0000, 0x0000, 0} }; -static struct XGI330_LCDDataTablStruct XGI_EPLCHLCDRegPtr[] = { - {Panel_1024x768, 0x0000, 0x0000, 0}, /* XGI_CH7017LV1024x768 */ - {Panel_1400x1050, 0x0000, 0x0000, 1}, /* XGI_CH7017LV1400x1050 */ - {0xFF, 0x0000, 0x0000, 0} -}; - -static struct XGI330_TVDataTablStruct XGI_TVDataTable[] = { - {0x09E1, 0x0001, 0}, /* XGI_ExtPALData */ - {0x09E1, 0x0000, 1}, /* XGI_ExtNTSCData */ - {0x09E1, 0x0801, 2}, /* XGI_StPALData */ - {0x09E1, 0x0800, 3}, /* XGI_StNTSCData */ - {0x49E0, 0x0100, 4}, /* XGI_ExtHiTVData */ - {0x49E0, 0x4100, 5}, /* XGI_St2HiTVData */ - {0x49E0, 0x4900, 13}, /* XGI_St1HiTVData */ - {0x09E0, 0x0020, 6}, /* XGI_ExtYPbPr525iData */ - {0x09E0, 0x0040, 7}, /* XGI_ExtYPbPr525pData */ - {0x09E0, 0x0080, 8}, /* XGI_ExtYPbPr750pData */ - {0x09E0, 0x0820, 9}, /* XGI_StYPbPr525iData */ - {0x09E0, 0x0840, 10}, /* XGI_StYPbPr525pData */ - {0x09E0, 0x0880, 11}, /* XGI_StYPbPr750pData */ - {0xffff, 0x0000, 12} /* END */ -}; - -/* Chrontel 7017 TV List */ -static struct XGI330_TVDataTablStruct xgifb_chrontel_tv[] = { - {0x0011, 0x0000, 0}, /* UNTSC */ - {0x0011, 0x0010, 1}, /* ONTSC */ - {0x0011, 0x0001, 2}, /* UPAL */ - {0x0011, 0x0011, 3}, /* OPAL */ - {0xFFFF, 0x0000, 4} -}; - -static unsigned short LCDLenList[] = { - LVDSCRT1Len_H, - LVDSCRT1Len_V, - LVDSDataLen, - LCDDesDataLen, - LCDDataLen, - LCDDesDataLen, - 0, - LCDDesDataLen, - LCDDesDataLen, - 0 +static const struct XGI330_TVDataTablStruct XGI_TVDataTable[] = { + {0x09E1, 0x0001, XGI_ExtPALData}, + {0x09E1, 0x0000, XGI_ExtNTSCData}, + {0x09E1, 0x0801, XGI_StPALData}, + {0x09E1, 0x0800, XGI_StNTSCData}, + {0x49E0, 0x0100, XGI_ExtHiTVData}, + {0x49E0, 0x4100, XGI_St2HiTVData}, + {0x49E0, 0x4900, XGI_St1HiTVData}, + {0x09E0, 0x0020, XGI_ExtYPbPr525iData}, + {0x09E0, 0x0040, XGI_ExtYPbPr525pData}, + {0x09E0, 0x0080, XGI_ExtYPbPr750pData}, + {0x09E0, 0x0820, XGI_StYPbPr525iData}, + {0x09E0, 0x0840, XGI_StYPbPr525pData}, + {0x09E0, 0x0880, XGI_StYPbPr750pData}, + {0xffff, 0x0000, XGI_ExtNTSCData}, }; /* Dual link only */ @@ -2336,7 +2234,7 @@ static struct SiS_VCLKData XGI_VCLKData[] = { {0xFF, 0x00, 0} /* End mark */ }; -static struct SiS_VCLKData XGI_VBVCLKData[] = { +static struct SiS_VBVCLKData XGI_VBVCLKData[] = { {0x1B, 0xE1, 25}, /* 00 (25.175MHz) */ {0x4E, 0xE4, 28}, /* 01 (28.322MHz) */ {0x57, 0xE4, 31}, /* 02 (31.500MHz) */ diff --git a/trunk/include/linux/mod_devicetable.h b/trunk/include/linux/mod_devicetable.h index 999c4c25fbf7..70c6a359b2f4 100644 --- a/trunk/include/linux/mod_devicetable.h +++ b/trunk/include/linux/mod_devicetable.h @@ -600,6 +600,7 @@ struct x86_cpu_id { #define X86_MODEL_ANY 0 #define X86_FEATURE_ANY 0 /* Same as FPU, you can't test for that */ +#define IPACK_ANY_FORMAT 0xff #define IPACK_ANY_ID (~0) struct ipack_device_id { __u8 format; /* Format version or IPACK_ANY_ID */ diff --git a/trunk/scripts/mod/file2alias.c b/trunk/scripts/mod/file2alias.c index 3c22bda8fdf3..df4fc23dd836 100644 --- a/trunk/scripts/mod/file2alias.c +++ b/trunk/scripts/mod/file2alias.c @@ -973,7 +973,7 @@ static int do_ipack_entry(const char *filename, id->vendor = TO_NATIVE(id->vendor); id->device = TO_NATIVE(id->device); strcpy(alias, "ipack:"); - ADD(alias, "f", id->format != IPACK_ANY_ID, id->format); + ADD(alias, "f", id->format != IPACK_ANY_FORMAT, id->format); ADD(alias, "v", id->vendor != IPACK_ANY_ID, id->vendor); ADD(alias, "d", id->device != IPACK_ANY_ID, id->device); add_wildcard(alias);