From d7e133c20f12cfd454a6c7258074b41ed7dac889 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 19 Mar 2012 03:09:32 +0100 Subject: [PATCH] --- yaml --- r: 293803 b: refs/heads/master c: 7df7c547c5aada8c6b9ee5ce14139e0ff5c66369 h: refs/heads/master i: 293801: bd8fa9a2d4e29c2a7778228d8653817fc497df34 293799: 9f79d55553409d0e0fabf591a2e76c829a1f78f1 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/evergreen_cs.c | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index bf963619e81c..d10537f417b7 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 779923bc40e123976bb0bee07b1c6a47d2858137 +refs/heads/master: 7df7c547c5aada8c6b9ee5ce14139e0ff5c66369 diff --git a/trunk/drivers/gpu/drm/radeon/evergreen_cs.c b/trunk/drivers/gpu/drm/radeon/evergreen_cs.c index 8bf576a50c56..4674a688ad40 100644 --- a/trunk/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/trunk/drivers/gpu/drm/radeon/evergreen_cs.c @@ -308,8 +308,8 @@ static int evergreen_surface_check(struct radeon_cs_parser *p, case ARRAY_2D_TILED_THIN1: return evergreen_surface_check_2d(p, surf, prefix); default: - dev_warn(p->dev, "%s:%d invalid array mode %d\n", - __func__, __LINE__, surf->mode); + dev_warn(p->dev, "%s:%d %s invalid array mode %d\n", + __func__, __LINE__, prefix, surf->mode); return -EINVAL; } return -EINVAL; @@ -327,8 +327,8 @@ static int evergreen_surface_value_conv_check(struct radeon_cs_parser *p, case ARRAY_1D_TILED_THIN1: return 0; default: - dev_warn(p->dev, "%s:%d invalid array mode %d\n", - __func__, __LINE__, surf->mode); + dev_warn(p->dev, "%s:%d %s invalid array mode %d\n", + __func__, __LINE__, prefix, surf->mode); return -EINVAL; }