From d8fe10e71e35ea34e7f0689b3bc2295f40374003 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Sun, 2 Dec 2012 23:08:19 +0800 Subject: [PATCH] --- yaml --- r: 340157 b: refs/heads/master c: 3703af46fcc330d72b9b0165a2a6988833e9df4e h: refs/heads/master i: 340155: 80ea657ff4484cf6c7309a061154851a62f4c560 v: v3 --- [refs] | 2 +- trunk/Documentation/cgroups/memory.txt | 4 - .../devicetree/bindings/arm/bcm/bcm11351.txt | 9 - .../devicetree/bindings/arm/calxeda.txt | 13 +- .../bindings/arm/vexpress-sysreg.txt | 50 - .../devicetree/bindings/arm/vexpress.txt | 98 +- .../devicetree/bindings/clock/imx5-clock.txt | 191 -- .../devicetree/bindings/clock/imx6q-clock.txt | 9 +- .../devicetree/bindings/gpio/spear_spics.txt | 50 - .../devicetree/bindings/i2c/fsl-imx-i2c.txt | 4 +- .../bindings/pinctrl/samsung-pinctrl.txt | 119 +- .../watchdog/brcm,bcm2835-pm-wdog.txt | 13 - trunk/Documentation/filesystems/proc.txt | 16 +- .../networking/netdev-features.txt | 2 +- trunk/MAINTAINERS | 75 +- trunk/Makefile | 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trunk/scripts/kconfig/list.h | 91 - trunk/scripts/kconfig/lkc_proto.h | 4 +- trunk/scripts/kconfig/mconf.c | 6 +- trunk/scripts/kconfig/menu.c | 14 +- trunk/security/device_cgroup.c | 18 +- trunk/sound/pci/es1968.c | 11 +- trunk/sound/pci/fm801.c | 11 +- trunk/sound/pci/hda/patch_realtek.c | 1 - trunk/sound/soc/codecs/cs42l52.c | 3 +- trunk/sound/soc/codecs/wm5102.c | 552 +----- trunk/sound/soc/codecs/wm8978.c | 2 +- trunk/sound/soc/fsl/imx-pcm-fiq.c | 1 + trunk/sound/soc/fsl/imx-ssi.c | 1 + trunk/sound/soc/mxs/mxs-saif.c | 17 +- trunk/sound/soc/samsung/Kconfig | 2 - trunk/sound/soc/samsung/bells.c | 2 +- trunk/sound/soc/soc-core.c | 5 +- trunk/sound/soc/soc-dapm.c | 2 +- trunk/sound/soc/tegra/tegra30_ahub.c | 1 + trunk/sound/soc/tegra/tegra_pcm.h | 2 + trunk/sound/usb/card.c | 6 +- trunk/tools/power/x86/turbostat/turbostat.c | 28 +- 692 files changed, 13291 insertions(+), 14499 deletions(-) delete mode 100644 trunk/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt delete mode 100644 trunk/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt delete mode 100644 trunk/Documentation/devicetree/bindings/clock/imx5-clock.txt delete mode 100644 trunk/Documentation/devicetree/bindings/gpio/spear_spics.txt delete mode 100644 trunk/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt delete mode 100644 trunk/arch/arm/boot/dts/bcm11351-brt.dts delete mode 100644 trunk/arch/arm/boot/dts/bcm11351.dtsi delete mode 100644 trunk/arch/arm/boot/dts/ecx-2000.dts delete mode 100644 trunk/arch/arm/boot/dts/ecx-common.dtsi delete mode 100644 trunk/arch/arm/boot/dts/exynos5440-ssdk5440.dts delete mode 100644 trunk/arch/arm/boot/dts/exynos5440.dtsi create mode 100644 trunk/arch/arm/boot/dts/sh7377.dtsi delete mode 100644 trunk/arch/arm/boot/dts/sun4i.dtsi delete mode 100644 trunk/arch/arm/configs/bcm_defconfig delete mode 100644 trunk/arch/arm/configs/clps711x_defconfig create mode 100644 trunk/arch/arm/configs/edb7211_defconfig create mode 100644 trunk/arch/arm/configs/fortunet_defconfig delete mode 100644 trunk/arch/arm/mach-bcm/Kconfig delete mode 100644 trunk/arch/arm/mach-bcm/Makefile delete mode 100644 trunk/arch/arm/mach-bcm/board_bcm.c delete mode 100644 trunk/arch/arm/mach-bcm2835/include/mach/gpio.h create mode 100644 trunk/arch/arm/mach-clps711x/autcpu12.c delete mode 100644 trunk/arch/arm/mach-clps711x/board-autcpu12.c delete mode 100644 trunk/arch/arm/mach-clps711x/board-cdb89712.c delete mode 100644 trunk/arch/arm/mach-clps711x/board-edb7211.c delete mode 100644 trunk/arch/arm/mach-clps711x/board-p720t.c create mode 100644 trunk/arch/arm/mach-clps711x/cdb89712.c rename trunk/arch/arm/mach-clps711x/{board-clep7312.c => clep7312.c} (95%) create mode 100644 trunk/arch/arm/mach-clps711x/edb7211-arch.c create mode 100644 trunk/arch/arm/mach-clps711x/edb7211-mm.c rename trunk/arch/arm/mach-clps711x/{board-fortunet.c => fortunet.c} (96%) create mode 100644 trunk/arch/arm/mach-clps711x/include/mach/entry-macro.S create mode 100644 trunk/arch/arm/mach-clps711x/include/mach/irqs.h create mode 100644 trunk/arch/arm/mach-clps711x/p720t.c create mode 100644 trunk/arch/arm/mach-highbank/lluart.c create mode 100644 trunk/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h create mode 100644 trunk/arch/arm/mach-shmobile/clock-sh7367.c create mode 100644 trunk/arch/arm/mach-shmobile/clock-sh7377.c create mode 100644 trunk/arch/arm/mach-shmobile/include/mach/sh7367.h create mode 100644 trunk/arch/arm/mach-shmobile/include/mach/sh7377.h create mode 100644 trunk/arch/arm/mach-shmobile/intc-sh7367.c create mode 100644 trunk/arch/arm/mach-shmobile/intc-sh7377.c create mode 100644 trunk/arch/arm/mach-shmobile/pfc-sh7367.c create mode 100644 trunk/arch/arm/mach-shmobile/pfc-sh7377.c create mode 100644 trunk/arch/arm/mach-shmobile/setup-sh7367.c create mode 100644 trunk/arch/arm/mach-shmobile/setup-sh7377.c delete mode 100644 trunk/arch/arm/mach-tegra/cpuidle-tegra20.c delete mode 100644 trunk/arch/arm/mach-tegra/cpuidle-tegra30.c delete mode 100644 trunk/arch/arm/mach-tegra/cpuidle.h create mode 100644 trunk/arch/arm/mach-tegra/include/mach/dma.h rename trunk/arch/arm/mach-tegra/{ => include/mach}/iomap.h (99%) rename trunk/arch/arm/mach-tegra/{ => include/mach}/irammap.h (100%) rename trunk/{include/linux => arch/arm/mach-tegra/include/mach}/tegra-ahb.h (86%) delete mode 100644 trunk/arch/arm/mach-tegra/pm.c delete mode 100644 trunk/arch/arm/mach-tegra/pm.h rename trunk/arch/arm/mach-tegra/{sleep-tegra20.S => sleep-t20.S} (98%) rename trunk/arch/arm/mach-tegra/{sleep-tegra30.S => sleep-t30.S} (63%) delete mode 100644 trunk/arch/arm/mach-tegra/tegra20_speedo.c delete mode 100644 trunk/arch/arm/mach-tegra/tegra30_speedo.c rename trunk/arch/arm/{mach-imx => plat-mxc}/3ds_debugboard.c (99%) create mode 100644 trunk/arch/arm/plat-mxc/Kconfig create mode 100644 trunk/arch/arm/plat-mxc/Makefile rename trunk/arch/arm/{mach-imx => plat-mxc}/avic.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/cpu.c (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/cpufreq.c (99%) rename trunk/arch/arm/{mach-imx => plat-mxc}/cpuidle.c (100%) rename trunk/arch/arm/{mach-imx/devices => plat-mxc}/devices.c (92%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/Kconfig (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/Makefile (95%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-ahci-imx.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-fec.c (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-flexcan.c (96%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-fsl-usb2-udc.c (96%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-gpio-mxc.c (96%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-gpio_keys.c (94%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx-dma.c (63%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx-fb.c (79%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx-i2c.c (76%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx-keypad.c (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx-ssi.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx-uart.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx2-wdt.c (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx21-hcd.c (94%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx27-coda.c (93%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imx_udc.c (96%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-imxdi_rtc.c (94%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-ipu-core.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mx1-camera.c (94%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mx2-camera.c (67%) delete mode 100644 trunk/arch/arm/plat-mxc/devices/platform-mx2-emma.c rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mxc-ehci.c (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mxc-mmc.c (76%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mxc_nand.c (74%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mxc_pwm.c (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mxc_rnga.c (95%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mxc_rtc.c (77%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-mxc_w1.c (95%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-pata_imx.c (96%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-sdhci-esdhc-imx.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/devices/platform-spi_imx.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/epit.c (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/3ds_debugboard.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/board-mx31lilly.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/board-mx31lite.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/board-mx31moboard.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/board-pcm038.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/common.h (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/cpuidle.h (100%) rename trunk/arch/arm/{include/debug/imx.S => plat-mxc/include/mach/debug-macro.S} (59%) rename trunk/arch/arm/{mach-imx/devices => plat-mxc/include/mach}/devices-common.h (96%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/eukrea-baseboards.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/hardware.h (94%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iim.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx1.h (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx21.h (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx25.h (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx27.h (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx2x.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx3.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx35.h (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx50.h (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-mx51.h (99%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-v1.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iomux-v3.h (100%) rename trunk/{include/linux/dma/ipu-dma.h => arch/arm/plat-mxc/include/mach/ipu.h} (97%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/iram.h (100%) create mode 100644 trunk/arch/arm/plat-mxc/include/mach/irqs.h rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx1.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx21.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx25.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx27.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx2x.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx31.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx35.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx3x.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx50.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx51.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx53.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mx6q.h (100%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/mxc.h (100%) rename trunk/{include/linux/platform_data/omap_ocp2scp.h => arch/arm/plat-mxc/include/mach/timex.h} (53%) rename trunk/arch/arm/{mach-imx => plat-mxc/include/mach}/ulpi.h (100%) create mode 100644 trunk/arch/arm/plat-mxc/include/mach/uncompress.h rename trunk/arch/arm/{mach-imx => plat-mxc}/iomux-v1.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/iomux-v3.c (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/iram_alloc.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/irq-common.c (100%) rename trunk/arch/arm/{mach-imx => plat-mxc}/irq-common.h (94%) rename trunk/arch/arm/{mach-imx => plat-mxc}/ssi-fiq-ksym.c (100%) rename trunk/arch/arm/{mach-imx => plat-mxc}/ssi-fiq.S (100%) rename trunk/arch/arm/{mach-imx => plat-mxc}/system.c (97%) rename trunk/arch/arm/{mach-imx => plat-mxc}/time.c (99%) rename trunk/arch/arm/{mach-imx => plat-mxc}/tzic.c (98%) rename trunk/arch/arm/{mach-imx => plat-mxc}/ulpi.c (99%) delete mode 100644 trunk/arch/arm/plat-samsung/setup-camif.c rename trunk/{drivers/irqchip/irq-versatile-fpga.c => arch/arm/plat-versatile/fpga-irq.c} (83%) rename trunk/{include/linux/irqchip/versatile-fpga.h => arch/arm/plat-versatile/include/plat/fpga-irq.h} (100%) delete mode 100644 trunk/arch/mips/lib/bitops.c delete mode 100644 trunk/arch/mips/lib/mips-atomic.c rename trunk/arch/unicore32/include/{uapi => }/asm/byteorder.h (100%) create mode 100644 trunk/arch/unicore32/include/asm/kvm_para.h rename trunk/arch/unicore32/include/{uapi => }/asm/sigcontext.h (100%) rename trunk/arch/unicore32/include/{uapi => }/asm/unistd.h (92%) delete mode 100644 trunk/arch/unicore32/include/uapi/asm/ptrace.h delete mode 100644 trunk/drivers/clk/clk-twl6040.c delete mode 100644 trunk/drivers/clk/versatile/clk-vexpress-osc.c delete mode 100644 trunk/drivers/clk/versatile/clk-vexpress.c delete mode 100644 trunk/drivers/cpuidle/cpuidle-calxeda.c delete mode 100644 trunk/drivers/gpio/gpio-clps711x.c delete mode 100644 trunk/drivers/gpio/gpio-da9055.c delete mode 100644 trunk/drivers/gpio/gpio-spear-spics.c delete mode 100644 trunk/drivers/mfd/vexpress-config.c delete mode 100644 trunk/drivers/mfd/vexpress-sysreg.c create mode 100644 trunk/drivers/mtd/maps/cdb89712.c create mode 100644 trunk/drivers/mtd/nand/autcpu12.c create mode 100644 trunk/drivers/mtd/nand/spia.c delete mode 100644 trunk/drivers/pinctrl/pinctrl-exynos5440.c delete mode 100644 trunk/include/linux/vexpress.h delete mode 100644 trunk/scripts/kconfig/list.h diff --git a/[refs] b/[refs] index 66664059921c..d01d085597ad 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6e202df7bdb5cd6ae6a911f57b89e82161f75258 +refs/heads/master: 3703af46fcc330d72b9b0165a2a6988833e9df4e diff --git a/trunk/Documentation/cgroups/memory.txt b/trunk/Documentation/cgroups/memory.txt index 71c4da413444..c07f7b4fb88d 100644 --- a/trunk/Documentation/cgroups/memory.txt +++ b/trunk/Documentation/cgroups/memory.txt @@ -466,10 +466,6 @@ Note: 5.3 swappiness Similar to /proc/sys/vm/swappiness, but affecting a hierarchy of groups only. -Please note that unlike the global swappiness, memcg knob set to 0 -really prevents from any swapping even if there is a swap storage -available. This might lead to memcg OOM killer if there are no file -pages to reclaim. Following cgroups' swappiness can't be changed. - root cgroup (uses /proc/sys/vm/swappiness). diff --git a/trunk/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt b/trunk/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt deleted file mode 100644 index fb7b5cd2652f..000000000000 --- a/trunk/Documentation/devicetree/bindings/arm/bcm/bcm11351.txt +++ /dev/null @@ -1,9 +0,0 @@ -Broadcom BCM11351 device tree bindings -------------------------------------------- - -Boards with the bcm281xx SoC family (which includes bcm11130, bcm11140, -bcm11351, bcm28145, bcm28155 SoCs) shall have the following properties: - -Required root node property: - -compatible = "bcm,bcm11351"; diff --git a/trunk/Documentation/devicetree/bindings/arm/calxeda.txt b/trunk/Documentation/devicetree/bindings/arm/calxeda.txt index 25fcf96795ca..4755caaccba6 100644 --- a/trunk/Documentation/devicetree/bindings/arm/calxeda.txt +++ b/trunk/Documentation/devicetree/bindings/arm/calxeda.txt @@ -1,15 +1,8 @@ -Calxeda Platforms Device Tree Bindings +Calxeda Highbank Platforms Device Tree Bindings ----------------------------------------------- -Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the -following properties. - -Required root node properties: - - compatible = "calxeda,highbank"; - - -Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following properties. Required root node properties: - - compatible = "calxeda,ecx-2000"; + - compatible = "calxeda,highbank"; diff --git a/trunk/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt b/trunk/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt deleted file mode 100644 index 9cf3f25544c7..000000000000 --- a/trunk/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt +++ /dev/null @@ -1,50 +0,0 @@ -ARM Versatile Express system registers --------------------------------------- - -This is a system control registers block, providing multiple low level -platform functions like board detection and identification, software -interrupt generation, MMC and NOR Flash control etc. - -Required node properties: -- compatible value : = "arm,vexpress,sysreg"; -- reg : physical base address and the size of the registers window -- gpio-controller : specifies that the node is a GPIO controller -- #gpio-cells : size of the GPIO specifier, should be 2: - - first cell is the pseudo-GPIO line number: - 0 - MMC CARDIN - 1 - MMC WPROT - 2 - NOR FLASH WPn - - second cell can take standard GPIO flags (currently ignored). - -Example: - v2m_sysreg: sysreg@10000000 { - compatible = "arm,vexpress-sysreg"; - reg = <0x10000000 0x1000>; - gpio-controller; - #gpio-cells = <2>; - }; - -This block also can also act a bridge to the platform's configuration -bus via "system control" interface, addressing devices with site number, -position in the board stack, config controller, function and device -numbers - see motherboard's TRM for more details. - -The node describing a config device must refer to the sysreg node via -"arm,vexpress,config-bridge" phandle (can be also defined in the node's -parent) and relies on the board topology properties - see main vexpress -node documentation for more details. It must must also define the -following property: -- arm,vexpress-sysreg,func : must contain two cells: - - first cell defines function number (eg. 1 for clock generator, - 2 for voltage regulators etc.) - - device number (eg. osc 0, osc 1 etc.) - -Example: - mcc { - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - }; - }; diff --git a/trunk/Documentation/devicetree/bindings/arm/vexpress.txt b/trunk/Documentation/devicetree/bindings/arm/vexpress.txt index ae49161e478a..ec8b50cbb2e8 100644 --- a/trunk/Documentation/devicetree/bindings/arm/vexpress.txt +++ b/trunk/Documentation/devicetree/bindings/arm/vexpress.txt @@ -11,10 +11,6 @@ the motherboard file using a /include/ directive. As the motherboard can be initialized in one of two different configurations ("memory maps"), care must be taken to include the correct one. - -Root node ---------- - Required properties in the root node: - compatible value: compatible = "arm,vexpress,", "arm,vexpress"; @@ -49,10 +45,6 @@ Optional properties in the root node: - Coretile Express A9x4 (V2P-CA9) HBI-0225: arm,hbi = <0x225>; - -CPU nodes ---------- - Top-level standard "cpus" node is required. It must contain a node with device_type = "cpu" property for every available core, eg.: @@ -67,52 +59,6 @@ with device_type = "cpu" property for every available core, eg.: }; }; - -Configuration infrastructure ----------------------------- - -The platform has an elaborated configuration system, consisting of -microcontrollers residing on the mother- and daughterboards known -as Motherboard/Daughterboard Configuration Controller (MCC and DCC). -The controllers are responsible for the platform initialization -(reset generation, flash programming, FPGA bitfiles loading etc.) -but also control clock generators, voltage regulators, gather -environmental data like temperature, power consumption etc. Even -the video output switch (FPGA) is controlled that way. - -Nodes describing devices controlled by this infrastructure should -point at the bridge device node: -- bridge phandle: - arm,vexpress,config-bridge = ; -This property can be also defined in a parent node (eg. for a DCC) -and is effective for all children. - - -Platform topology ------------------ - -As Versatile Express can be configured in number of physically -different setups, the device tree should describe platform topology. -Root node and main motherboard node must define the following -property, describing physical location of the children nodes: -- site number: - arm,vexpress,site = ; - where 0 means motherboard, 1 or 2 are daugtherboard sites, - 0xf means "master" site (site containing main CPU tile) -- when daughterboards are stacked on one site, their position - in the stack be be described with: - arm,vexpress,position = ; -- when describing tiles consisting more than one DCC, its number - can be described with: - arm,vexpress,dcc = ; - -Any of the numbers above defaults to zero if not defined in -the node or any of its parent. - - -Motherboard ------------ - The motherboard description file provides a single "motherboard" node using 2 address cells corresponding to the Static Memory Bus used between the motherboard and the tile. The first cell defines the Chip @@ -141,30 +87,22 @@ can be used to obtain required phandle in the tile's "aliases" node: - SP804 timers: v2m_timer01 and v2m_timer23 -The tile description should define a "smb" node, describing the -Static Memory Bus between the tile and motherboard. It must define -the following properties: -- "simple-bus" compatible value (to ensure creation of the children) - compatible = "simple-bus"; -- mapping of the SMB CS/offset addresses into main address space: - #address-cells = <2>; - #size-cells = <1>; - ranges = <...>; -- interrupts mapping: - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <...>; +Current Linux implementation requires a "arm,v2m_timer" alias +pointing at one of the motherboard's SP804 timers, if it is to be +used as the system timer. This alias should be defined in the +motherboard files. +The tile description must define "ranges", "interrupt-map-mask" and +"interrupt-map" properties to translate the motherboard's address +and interrupt space into one used by the tile's processor. -Example of a VE tile description (simplified) ---------------------------------------------- +Abbreviated example: /dts-v1/; / { model = "V2P-CA5s"; arm,hbi = <0x225>; - arm,vexpress,site = <0xf>; compatible = "arm,vexpress-v2p-ca5s", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <1>; @@ -196,29 +134,13 @@ Example of a VE tile description (simplified) <0x2c000100 0x100>; }; - dcc { - compatible = "simple-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - compatible = "arm,vexpress-osc"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; + motherboard { /* CS0 is visible at 0x08000000 */ ranges = <0 0 0x08000000 0x04000000>; - - #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; /* Active high IRQ 0 is connected to GIC's SPI0 */ interrupt-map = <0 0 0 &gic 0 0 4>; - - /include/ "vexpress-v2m-rs1.dtsi" }; }; +/include/ "vexpress-v2m-rs1.dtsi" diff --git a/trunk/Documentation/devicetree/bindings/clock/imx5-clock.txt b/trunk/Documentation/devicetree/bindings/clock/imx5-clock.txt deleted file mode 100644 index 04ad47876be0..000000000000 --- a/trunk/Documentation/devicetree/bindings/clock/imx5-clock.txt +++ /dev/null @@ -1,191 +0,0 @@ -* Clock bindings for Freescale i.MX5 - -Required properties: -- compatible: Should be "fsl,-ccm" , where can be imx51 or imx53 -- reg: Address and length of the register set -- interrupts: Should contain CCM interrupt -- #clock-cells: Should be <1> - -The clock consumer should specify the desired clock by having the clock -ID in its "clocks" phandle cell. The following is a full list of i.MX5 -clocks and IDs. - - Clock ID - --------------------------- - dummy 0 - ckil 1 - osc 2 - ckih1 3 - ckih2 4 - ahb 5 - ipg 6 - axi_a 7 - axi_b 8 - uart_pred 9 - uart_root 10 - esdhc_a_pred 11 - esdhc_b_pred 12 - esdhc_c_s 13 - esdhc_d_s 14 - emi_sel 15 - emi_slow_podf 16 - nfc_podf 17 - ecspi_pred 18 - ecspi_podf 19 - usboh3_pred 20 - usboh3_podf 21 - usb_phy_pred 22 - usb_phy_podf 23 - cpu_podf 24 - di_pred 25 - tve_di 26 - tve_s 27 - uart1_ipg_gate 28 - uart1_per_gate 29 - uart2_ipg_gate 30 - uart2_per_gate 31 - uart3_ipg_gate 32 - uart3_per_gate 33 - i2c1_gate 34 - i2c2_gate 35 - gpt_ipg_gate 36 - pwm1_ipg_gate 37 - pwm1_hf_gate 38 - pwm2_ipg_gate 39 - pwm2_hf_gate 40 - gpt_hf_gate 41 - fec_gate 42 - usboh3_per_gate 43 - esdhc1_ipg_gate 44 - esdhc2_ipg_gate 45 - esdhc3_ipg_gate 46 - esdhc4_ipg_gate 47 - ssi1_ipg_gate 48 - ssi2_ipg_gate 49 - ssi3_ipg_gate 50 - ecspi1_ipg_gate 51 - ecspi1_per_gate 52 - ecspi2_ipg_gate 53 - ecspi2_per_gate 54 - cspi_ipg_gate 55 - sdma_gate 56 - emi_slow_gate 57 - ipu_s 58 - ipu_gate 59 - nfc_gate 60 - ipu_di1_gate 61 - vpu_s 62 - vpu_gate 63 - vpu_reference_gate 64 - uart4_ipg_gate 65 - uart4_per_gate 66 - uart5_ipg_gate 67 - uart5_per_gate 68 - tve_gate 69 - tve_pred 70 - esdhc1_per_gate 71 - esdhc2_per_gate 72 - esdhc3_per_gate 73 - esdhc4_per_gate 74 - usb_phy_gate 75 - hsi2c_gate 76 - mipi_hsc1_gate 77 - mipi_hsc2_gate 78 - mipi_esc_gate 79 - mipi_hsp_gate 80 - ldb_di1_div_3_5 81 - ldb_di1_div 82 - ldb_di0_div_3_5 83 - ldb_di0_div 84 - ldb_di1_gate 85 - can2_serial_gate 86 - can2_ipg_gate 87 - i2c3_gate 88 - lp_apm 89 - periph_apm 90 - main_bus 91 - ahb_max 92 - aips_tz1 93 - aips_tz2 94 - tmax1 95 - tmax2 96 - tmax3 97 - spba 98 - uart_sel 99 - esdhc_a_sel 100 - esdhc_b_sel 101 - esdhc_a_podf 102 - esdhc_b_podf 103 - ecspi_sel 104 - usboh3_sel 105 - usb_phy_sel 106 - iim_gate 107 - usboh3_gate 108 - emi_fast_gate 109 - ipu_di0_gate 110 - gpc_dvfs 111 - pll1_sw 112 - pll2_sw 113 - pll3_sw 114 - ipu_di0_sel 115 - ipu_di1_sel 116 - tve_ext_sel 117 - mx51_mipi 118 - pll4_sw 119 - ldb_di1_sel 120 - di_pll4_podf 121 - ldb_di0_sel 122 - ldb_di0_gate 123 - usb_phy1_gate 124 - usb_phy2_gate 125 - per_lp_apm 126 - per_pred1 127 - per_pred2 128 - per_podf 129 - per_root 130 - ssi_apm 131 - ssi1_root_sel 132 - ssi2_root_sel 133 - ssi3_root_sel 134 - ssi_ext1_sel 135 - ssi_ext2_sel 136 - ssi_ext1_com_sel 137 - ssi_ext2_com_sel 138 - ssi1_root_pred 139 - ssi1_root_podf 140 - ssi2_root_pred 141 - ssi2_root_podf 142 - ssi_ext1_pred 143 - ssi_ext1_podf 144 - ssi_ext2_pred 145 - ssi_ext2_podf 146 - ssi1_root_gate 147 - ssi2_root_gate 148 - ssi3_root_gate 149 - ssi_ext1_gate 150 - ssi_ext2_gate 151 - epit1_ipg_gate 152 - epit1_hf_gate 153 - epit2_ipg_gate 154 - epit2_hf_gate 155 - can_sel 156 - can1_serial_gate 157 - can1_ipg_gate 158 - -Examples (for mx53): - -clks: ccm@53fd4000{ - compatible = "fsl,imx53-ccm"; - reg = <0x53fd4000 0x4000>; - interrupts = <0 71 0x04 0 72 0x04>; - #clock-cells = <1>; -}; - -can1: can@53fc8000 { - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; - reg = <0x53fc8000 0x4000>; - interrupts = <82>; - clocks = <&clks 158>, <&clks 157>; - clock-names = "ipg", "per"; - status = "disabled"; -}; diff --git a/trunk/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/trunk/Documentation/devicetree/bindings/clock/imx6q-clock.txt index d77b4e68dc42..492bd991d52a 100644 --- a/trunk/Documentation/devicetree/bindings/clock/imx6q-clock.txt +++ b/trunk/Documentation/devicetree/bindings/clock/imx6q-clock.txt @@ -187,9 +187,9 @@ clocks and IDs. pll3_usb_otg 172 pll4_audio 173 pll5_video 174 - pll8_mlb 175 + pll6_mlb 175 pll7_usb_host 176 - pll6_enet 177 + pll8_enet 177 ssi1_ipg 178 ssi2_ipg 179 ssi3_ipg 180 @@ -198,11 +198,6 @@ clocks and IDs. usbphy2 183 ldb_di0_div_3_5 184 ldb_di1_div_3_5 185 - sata_ref 186 - sata_ref_100m 187 - pcie_ref 188 - pcie_ref_125m 189 - enet_ref 190 Examples: diff --git a/trunk/Documentation/devicetree/bindings/gpio/spear_spics.txt b/trunk/Documentation/devicetree/bindings/gpio/spear_spics.txt deleted file mode 100644 index 96c37eb15075..000000000000 --- a/trunk/Documentation/devicetree/bindings/gpio/spear_spics.txt +++ /dev/null @@ -1,50 +0,0 @@ -=== ST Microelectronics SPEAr SPI CS Driver === - -SPEAr platform provides a provision to control chipselects of ARM PL022 Prime -Cell spi controller through its system registers, which otherwise remains under -PL022 control. If chipselect remain under PL022 control then they would be -released as soon as transfer is over and TxFIFO becomes empty. This is not -desired by some of the device protocols above spi which expect (multiple) -transfers without releasing their chipselects. - -Chipselects can be controlled by software by turning them as GPIOs. SPEAr -provides another interface through system registers through which software can -directly control each PL022 chipselect. Hence, it is natural for SPEAr to export -the control of this interface as gpio. - -Required properties: - - * compatible: should be defined as "st,spear-spics-gpio" - * reg: mentioning address range of spics controller - * st-spics,peripcfg-reg: peripheral configuration register offset - * st-spics,sw-enable-bit: bit offset to enable sw control - * st-spics,cs-value-bit: bit offset to drive chipselect low or high - * st-spics,cs-enable-mask: chip select number bit mask - * st-spics,cs-enable-shift: chip select number program offset - * gpio-controller: Marks the device node as gpio controller - * #gpio-cells: should be 1 and will mention chip select number - -All the above bit offsets are within peripcfg register. - -Example: -------- -spics: spics@e0700000{ - compatible = "st,spear-spics-gpio"; - reg = <0xe0700000 0x1000>; - st-spics,peripcfg-reg = <0x3b0>; - st-spics,sw-enable-bit = <12>; - st-spics,cs-value-bit = <11>; - st-spics,cs-enable-mask = <3>; - st-spics,cs-enable-shift = <8>; - gpio-controller; - #gpio-cells = <2>; -}; - - -spi0: spi@e0100000 { - status = "okay"; - num-cs = <3>; - cs-gpios = <&gpio1 7 0>, <&spics 0>, - <&spics 1>; - ... -} diff --git a/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt b/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt index 3614242e7732..f3cf43b66f7e 100644 --- a/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt +++ b/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt @@ -12,13 +12,13 @@ Optional properties: Examples: i2c@83fc4000 { /* I2C2 on i.MX51 */ - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; reg = <0x83fc4000 0x4000>; interrupts = <63>; }; i2c@70038000 { /* HS-I2C on i.MX51 */ - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; reg = <0x70038000 0x4000>; interrupts = <64>; clock-frequency = <400000>; diff --git a/trunk/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/trunk/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index e97a27856b21..03dee50532f5 100644 --- a/trunk/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/trunk/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -8,20 +8,13 @@ on-chip controllers onto these pads. Required Properties: - compatible: should be one of the following. - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller. - - "samsung,pinctrl-exynos4x12": for Exynos4x12 compatible pin-controller. - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of the address space it occupies. -- Pin banks as child nodes: Pin banks of the controller are represented by child - nodes of the controller node. Bank name is taken from name of the node. Each - bank node must contain following properties: - - - gpio-controller: identifies the node as a gpio controller and pin bank. - - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO - binding is used, the amount of cells must be specified as 2. See generic - GPIO binding documentation for description of particular cells. +- interrupts: interrupt specifier for the controller. The format and value of + the interrupt specifier depends on the interrupt parent for the controller. - Pin mux/config groups as child nodes: The pin mux (selecting pin function mode) and pin config (pull up/down, driver strength) settings are represented @@ -79,24 +72,16 @@ used as system wakeup events. A. External GPIO Interrupts: For supporting external gpio interrupts, the following properties should be specified in the pin-controller device node. - - interrupt-parent: phandle of the interrupt parent to which the external - GPIO interrupts are forwarded to. - - interrupts: interrupt specifier for the controller. The format and value of - the interrupt specifier depends on the interrupt parent for the controller. - - In addition, following properties must be present in node of every bank - of pins supporting GPIO interrupts: - - - interrupt-controller: identifies the controller node as interrupt-parent. - - #interrupt-cells: the value of this property should be 2. - - First Cell: represents the external gpio interrupt number local to the - external gpio interrupt space of the controller. - - Second Cell: flags to identify the type of the interrupt - - 1 = rising edge triggered - - 2 = falling edge triggered - - 3 = rising and falling edge triggered - - 4 = high level triggered - - 8 = low level triggered +- interrupt-controller: identifies the controller node as interrupt-parent. +- #interrupt-cells: the value of this property should be 2. + - First Cell: represents the external gpio interrupt number local to the + external gpio interrupt space of the controller. + - Second Cell: flags to identify the type of the interrupt + - 1 = rising edge triggered + - 2 = falling edge triggered + - 3 = rising and falling edge triggered + - 4 = high level triggered + - 8 = low level triggered B. External Wakeup Interrupts: For supporting external wakeup interrupts, a child node representing the external wakeup interrupt controller should be @@ -109,11 +94,6 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a found on Samsung Exynos4210 SoC. - interrupt-parent: phandle of the interrupt parent to which the external wakeup interrupts are forwarded to. - - interrupts: interrupt used by multiplexed wakeup interrupts. - - In addition, following properties must be present in node of every bank - of pins supporting wake-up interrupts: - - interrupt-controller: identifies the node as interrupt-parent. - #interrupt-cells: the value of this property should be 2 - First Cell: represents the external wakeup interrupt number local to @@ -125,63 +105,11 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a - 4 = high level triggered - 8 = low level triggered - Node of every bank of pins supporting direct wake-up interrupts (without - multiplexing) must contain following properties: - - - interrupt-parent: phandle of the interrupt parent to which the external - wakeup interrupts are forwarded to. - - interrupts: interrupts of the interrupt parent which are used for external - wakeup interrupts from pins of the bank, must contain interrupts for all - pins of the bank. - Aliases: All the pin controller nodes should be represented in the aliases node using the following format 'pinctrl{n}' where n is a unique number for the alias. -Example: A pin-controller node with pin banks: - - pinctrl_0: pinctrl@11400000 { - compatible = "samsung,pinctrl-exynos4210"; - reg = <0x11400000 0x1000>; - interrupts = <0 47 0>; - - /* ... */ - - /* Pin bank without external interrupts */ - gpy0: gpy0 { - gpio-controller; - #gpio-cells = <2>; - }; - - /* ... */ - - /* Pin bank with external GPIO or muxed wake-up interrupts */ - gpj0: gpj0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - /* ... */ - - /* Pin bank with external direct wake-up interrupts */ - gpx0: gpx0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - interrupt-parent = <&gic>; - interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; - #interrupt-cells = <2>; - }; - - /* ... */ - }; - Example 1: A pin-controller node with pin groups. pinctrl_0: pinctrl@11400000 { @@ -189,8 +117,6 @@ Example 1: A pin-controller node with pin groups. reg = <0x11400000 0x1000>; interrupts = <0 47 0>; - /* ... */ - uart0_data: uart0-data { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <2>; @@ -232,14 +158,20 @@ Example 2: A pin-controller node with external wakeup interrupt controller node. pinctrl_1: pinctrl@11000000 { compatible = "samsung,pinctrl-exynos4210"; reg = <0x11000000 0x1000>; - interrupts = <0 46 0> + interrupts = <0 46 0>; + interrupt-controller; + #interrupt-cells = <2>; - /* ... */ - - wakeup-interrupt-controller { + wakup_eint: wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, + <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, + <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, + <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>, + <0 32 0>; }; }; @@ -258,8 +190,7 @@ Example 4: Set up the default pin state for uart controller. static int s3c24xx_serial_probe(struct platform_device *pdev) { struct pinctrl *pinctrl; - - /* ... */ - + ... + ... pinctrl = devm_pinctrl_get_select_default(&pdev->dev); } diff --git a/trunk/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt b/trunk/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt deleted file mode 100644 index d209366b4a69..000000000000 --- a/trunk/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt +++ /dev/null @@ -1,13 +0,0 @@ -BCM2835 Watchdog timer - -Required properties: - -- compatible : should be "brcm,bcm2835-pm-wdt" -- reg : Specifies base physical address and size of the registers. - -Example: - -watchdog { - compatible = "brcm,bcm2835-pm-wdt"; - reg = <0x7e100000 0x28>; -}; diff --git a/trunk/Documentation/filesystems/proc.txt b/trunk/Documentation/filesystems/proc.txt index 3844d21d6ca3..a1793d670cd0 100644 --- a/trunk/Documentation/filesystems/proc.txt +++ b/trunk/Documentation/filesystems/proc.txt @@ -33,7 +33,7 @@ Table of Contents 2 Modifying System Parameters 3 Per-Process Parameters - 3.1 /proc//oom_adj & /proc//oom_score_adj - Adjust the oom-killer + 3.1 /proc//oom_score_adj - Adjust the oom-killer score 3.2 /proc//oom_score - Display current oom-killer score 3.3 /proc//io - Display the IO accounting fields @@ -1320,10 +1320,10 @@ of the kernel. CHAPTER 3: PER-PROCESS PARAMETERS ------------------------------------------------------------------------------ -3.1 /proc//oom_adj & /proc//oom_score_adj- Adjust the oom-killer score +3.1 /proc//oom_score_adj- Adjust the oom-killer score -------------------------------------------------------------------------------- -These file can be used to adjust the badness heuristic used to select which +This file can be used to adjust the badness heuristic used to select which process gets killed in out of memory conditions. The badness heuristic assigns a value to each candidate task ranging from 0 @@ -1361,12 +1361,6 @@ same system, cpuset, mempolicy, or memory controller resources to use at least equivalent to discounting 50% of the task's allowed memory from being considered as scoring against the task. -For backwards compatibility with previous kernels, /proc//oom_adj may also -be used to tune the badness score. Its acceptable values range from -16 -(OOM_ADJUST_MIN) to +15 (OOM_ADJUST_MAX) and a special value of -17 -(OOM_DISABLE) to disable oom killing entirely for that task. Its value is -scaled linearly with /proc//oom_score_adj. - The value of /proc//oom_score_adj may be reduced no lower than the last value set by a CAP_SYS_RESOURCE process. To reduce the value any lower requires CAP_SYS_RESOURCE. @@ -1381,9 +1375,7 @@ minimal amount of work. ------------------------------------------------------------- This file can be used to check the current score used by the oom-killer is for -any given . Use it together with /proc//oom_score_adj to tune which -process should be killed in an out-of-memory situation. - +any given . 3.3 /proc//io - Display the IO accounting fields ------------------------------------------------------- diff --git a/trunk/Documentation/networking/netdev-features.txt b/trunk/Documentation/networking/netdev-features.txt index f310edec8a77..4164f5c02e4b 100644 --- a/trunk/Documentation/networking/netdev-features.txt +++ b/trunk/Documentation/networking/netdev-features.txt @@ -164,4 +164,4 @@ read the CRC recorded by the NIC on receipt of the packet. This requests that the NIC receive all possible frames, including errored frames (such as bad FCS, etc). This can be helpful when sniffing a link with bad packets on it. Some NICs may receive more packets if also put into normal -PROMISC mode. +PROMISC mdoe. diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 63b7a61780e9..7dbfcb7d4100 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -713,12 +713,6 @@ S: Maintained F: arch/arm/mach-cns3xxx/ T: git git://git.infradead.org/users/cbou/linux-cns3xxx.git -ARM/CIRRUS LOGIC CLPS711X ARM ARCHITECTURE -M: Alexander Shiyan -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Odd Fixes -F: arch/arm/mach-clps711x/ - ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE M: Hartley Sweeten M: Ryan Mallon @@ -809,6 +803,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained T: git git://git.pengutronix.de/git/imx/linux-2.6.git F: arch/arm/mach-imx/ +F: arch/arm/plat-mxc/ F: arch/arm/configs/imx*_defconfig ARM/FREESCALE IMX6 @@ -3609,49 +3604,6 @@ F: drivers/hid/hid-hyperv.c F: drivers/net/hyperv/ F: drivers/staging/hv/ -I2C OVER PARALLEL PORT -M: Jean Delvare -L: linux-i2c@vger.kernel.org -S: Maintained -F: Documentation/i2c/busses/i2c-parport -F: Documentation/i2c/busses/i2c-parport-light -F: drivers/i2c/busses/i2c-parport.c -F: drivers/i2c/busses/i2c-parport-light.c - -I2C/SMBUS CONTROLLER DRIVERS FOR PC -M: Jean Delvare -L: linux-i2c@vger.kernel.org -S: Maintained -F: Documentation/i2c/busses/i2c-ali1535 -F: Documentation/i2c/busses/i2c-ali1563 -F: Documentation/i2c/busses/i2c-ali15x3 -F: Documentation/i2c/busses/i2c-amd756 -F: Documentation/i2c/busses/i2c-amd8111 -F: Documentation/i2c/busses/i2c-i801 -F: Documentation/i2c/busses/i2c-nforce2 -F: Documentation/i2c/busses/i2c-piix4 -F: Documentation/i2c/busses/i2c-sis5595 -F: Documentation/i2c/busses/i2c-sis630 -F: Documentation/i2c/busses/i2c-sis96x -F: Documentation/i2c/busses/i2c-via -F: Documentation/i2c/busses/i2c-viapro -F: drivers/i2c/busses/i2c-ali1535.c -F: drivers/i2c/busses/i2c-ali1563.c -F: drivers/i2c/busses/i2c-ali15x3.c -F: drivers/i2c/busses/i2c-amd756.c -F: drivers/i2c/busses/i2c-amd756-s4882.c -F: drivers/i2c/busses/i2c-amd8111.c -F: drivers/i2c/busses/i2c-i801.c -F: drivers/i2c/busses/i2c-isch.c -F: drivers/i2c/busses/i2c-nforce2.c -F: drivers/i2c/busses/i2c-nforce2-s4985.c -F: drivers/i2c/busses/i2c-piix4.c -F: drivers/i2c/busses/i2c-sis5595.c -F: drivers/i2c/busses/i2c-sis630.c -F: drivers/i2c/busses/i2c-sis96x.c -F: drivers/i2c/busses/i2c-via.c -F: drivers/i2c/busses/i2c-viapro.c - I2C/SMBUS STUB DRIVER M: "Mark M. Hoffman" L: linux-i2c@vger.kernel.org @@ -3659,8 +3611,9 @@ S: Maintained F: drivers/i2c/busses/i2c-stub.c I2C SUBSYSTEM -M: Wolfram Sang +M: "Jean Delvare (PC drivers, core)" M: "Ben Dooks (embedded platforms)" +M: "Wolfram Sang (embedded platforms)" L: linux-i2c@vger.kernel.org W: http://i2c.wiki.kernel.org/ T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/ @@ -3671,13 +3624,6 @@ F: drivers/i2c/ F: include/linux/i2c.h F: include/linux/i2c-*.h -I2C-TAOS-EVM DRIVER -M: Jean Delvare -L: linux-i2c@vger.kernel.org -S: Maintained -F: Documentation/i2c/busses/i2c-taos-evm -F: drivers/i2c/busses/i2c-taos-evm.c - I2C-TINY-USB DRIVER M: Till Harbaum L: linux-i2c@vger.kernel.org @@ -7270,14 +7216,6 @@ L: linux-xtensa@linux-xtensa.org S: Maintained F: arch/xtensa/ -THERMAL -M: Zhang Rui -L: linux-pm@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git -S: Supported -F: drivers/thermal/ -F: include/linux/thermal.h - THINKPAD ACPI EXTRAS DRIVER M: Henrique de Moraes Holschuh L: ibm-acpi-devel@lists.sourceforge.net @@ -7955,6 +7893,13 @@ M: Roger Luethi S: Maintained F: drivers/net/ethernet/via/via-rhine.c +VIAPRO SMBUS DRIVER +M: Jean Delvare +L: linux-i2c@vger.kernel.org +S: Maintained +F: Documentation/i2c/busses/i2c-viapro +F: drivers/i2c/busses/i2c-viapro.c + VIA SD/MMC CARD CONTROLLER DRIVER M: Bruce Chang M: Harald Welte diff --git a/trunk/Makefile b/trunk/Makefile index 9f6ca124e890..6edac73ee1ba 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 7 SUBLEVEL = 0 -EXTRAVERSION = -rc6 +EXTRAVERSION = -rc5 NAME = Terrified Chipmunk # *DOCUMENTATION* diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 33d28875f54a..1abb573fef86 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -284,8 +284,8 @@ config ARCH_INTEGRATOR select MULTI_IRQ_HANDLER select NEED_MACH_MEMORY_H select PLAT_VERSATILE + select PLAT_VERSATILE_FPGA_IRQ select SPARSE_IRQ - select VERSATILE_FPGA_IRQ help Support for ARM's Integrator platform. @@ -318,7 +318,7 @@ config ARCH_VERSATILE select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_CLOCK - select VERSATILE_FPGA_IRQ + select PLAT_VERSATILE_FPGA_IRQ help This enables support for ARM Ltd Versatile board. @@ -336,7 +336,7 @@ config ARCH_AT91 config ARCH_BCM2835 bool "Broadcom BCM2835 family" - select ARCH_REQUIRE_GPIOLIB + select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_AMBA select ARM_ERRATA_411920 select ARM_TIMER_SP804 @@ -344,10 +344,7 @@ config ARCH_BCM2835 select COMMON_CLK select CPU_V6 select GENERIC_CLOCKEVENTS - select GENERIC_GPIO select MULTI_IRQ_HANDLER - select PINCTRL - select PINCTRL_BCM2835 select SPARSE_IRQ select USE_OF help @@ -367,16 +364,11 @@ config ARCH_CNS3XXX config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" - select ARCH_REQUIRE_GPIOLIB select ARCH_USES_GETTIMEOFFSET - select AUTO_ZRELADDR select CLKDEV_LOOKUP select COMMON_CLK select CPU_ARM720T - select GENERIC_CLOCKEVENTS - select MULTI_IRQ_HANDLER select NEED_MACH_MEMORY_H - select SPARSE_IRQ help Support for Cirrus Logic 711x/721x/731x based boards. @@ -441,6 +433,19 @@ config ARCH_FOOTBRIDGE Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. +config ARCH_MXC + bool "Freescale MXC/iMX-based" + select ARCH_REQUIRE_GPIOLIB + select CLKDEV_LOOKUP + select CLKSRC_MMIO + select GENERIC_CLOCKEVENTS + select GENERIC_IRQ_CHIP + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + select USE_OF + help + Support for Freescale MXC/iMX-based family of processors + config ARCH_MXS bool "Freescale MXS-based" select ARCH_REQUIRE_GPIOLIB @@ -1017,8 +1022,6 @@ source "arch/arm/mach-mvebu/Kconfig" source "arch/arm/mach-at91/Kconfig" -source "arch/arm/mach-bcm/Kconfig" - source "arch/arm/mach-clps711x/Kconfig" source "arch/arm/mach-cns3xxx/Kconfig" @@ -1055,7 +1058,7 @@ source "arch/arm/mach-msm/Kconfig" source "arch/arm/mach-mv78xx0/Kconfig" -source "arch/arm/mach-imx/Kconfig" +source "arch/arm/plat-mxc/Kconfig" source "arch/arm/mach-mxs/Kconfig" diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index 04a3f0d1d053..cc1ed35179a5 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -338,17 +338,6 @@ choice The uncompressor code port configuration is now handled by CONFIG_S3C_LOWLEVEL_UART_PORT. - config DEBUG_S3C_UART3 - depends on PLAT_SAMSUNG && ARCH_EXYNOS - bool "Use S3C UART 3 for low-level debug" - help - Say Y here if you want the debug print routines to direct - their output to UART 3. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. - config DEBUG_SOCFPGA_UART depends on ARCH_SOCFPGA bool "Use SOCFPGA UART for low-level debug" @@ -437,14 +426,6 @@ endchoice config DEBUG_LL_INCLUDE string default "debug/icedcc.S" if DEBUG_ICEDCC - default "debug/imx.S" if DEBUG_IMX1_UART || \ - DEBUG_IMX25_UART || \ - DEBUG_IMX21_IMX27_UART || \ - DEBUG_IMX31_IMX35_UART || \ - DEBUG_IMX51_UART || \ - DEBUG_IMX50_IMX53_UART ||\ - DEBUG_IMX6Q_UART2 || \ - DEBUG_IMX6Q_UART4 default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index 58afa0dfcf7c..363320ac9057 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -137,7 +137,6 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 -machine-$(CONFIG_ARCH_BCM) += bcm machine-$(CONFIG_ARCH_BCM2835) += bcm2835 machine-$(CONFIG_ARCH_CLPS711X) += clps711x machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx @@ -198,6 +197,7 @@ machine-$(CONFIG_ARCH_SUNXI) += sunxi # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. +plat-$(CONFIG_ARCH_MXC) += mxc plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_ARCH_S3C64XX) += samsung plat-$(CONFIG_ARCH_ZYNQ) += versatile diff --git a/trunk/arch/arm/boot/Makefile b/trunk/arch/arm/boot/Makefile index 9137df539b61..f2aa09eb658e 100644 --- a/trunk/arch/arm/boot/Makefile +++ b/trunk/arch/arm/boot/Makefile @@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y) $(obj)/xipImage: vmlinux FORCE $(call if_changed,objcopy) - @$(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' + $(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' $(obj)/Image $(obj)/zImage: FORCE @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)' @@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE $(obj)/Image: vmlinux FORCE $(call if_changed,objcopy) - @$(kecho) ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' $(obj)/compressed/vmlinux: $(obj)/Image FORCE $(Q)$(MAKE) $(build)=$(obj)/compressed $@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE $(call if_changed,objcopy) - @$(kecho) ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' endif @@ -90,7 +90,7 @@ fi $(obj)/uImage: $(obj)/zImage FORCE @$(check_for_multiple_loadaddr) $(call if_changed,uimage) - @$(kecho) ' Image $@ is ready' + $(kecho) ' Image $@ is ready' $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE $(Q)$(MAKE) $(build)=$(obj)/bootp $@ @@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE $(obj)/bootpImage: $(obj)/bootp/bootp FORCE $(call if_changed,objcopy) - @$(kecho) ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' PHONY += initrd FORCE initrd: diff --git a/trunk/arch/arm/boot/compressed/Makefile b/trunk/arch/arm/boot/compressed/Makefile index 3f9e9fe4d789..a517153a13ea 100644 --- a/trunk/arch/arm/boot/compressed/Makefile +++ b/trunk/arch/arm/boot/compressed/Makefile @@ -45,6 +45,11 @@ ifeq ($(CONFIG_ARCH_SHARK),y) OBJS += head-shark.o ofw-shark.o endif +ifeq ($(CONFIG_ARCH_P720T),y) +# Borrow this code from SA1100 +OBJS += head-sa1100.o +endif + ifeq ($(CONFIG_ARCH_SA1100),y) OBJS += head-sa1100.o endif diff --git a/trunk/arch/arm/boot/dts/Makefile b/trunk/arch/arm/boot/dts/Makefile index f872edff9c2c..4dd567b62d2a 100644 --- a/trunk/arch/arm/boot/dts/Makefile +++ b/trunk/arch/arm/boot/dts/Makefile @@ -17,17 +17,14 @@ dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \ usb_a9263.dtb \ usb_a9g20.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb -dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ dove-cubox.dtb \ dove-dove-db.dtb dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-trats.dtb \ - exynos5250-smdk5250.dtb \ - exynos5440-ssdk5440.dtb -dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ - ecx-2000.dtb + exynos5250-smdk5250.dtb +dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ integratorcp.dtb dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb diff --git a/trunk/arch/arm/boot/dts/bcm11351-brt.dts b/trunk/arch/arm/boot/dts/bcm11351-brt.dts deleted file mode 100644 index 248067cf7069..000000000000 --- a/trunk/arch/arm/boot/dts/bcm11351-brt.dts +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (C) 2012 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; - -/include/ "bcm11351.dtsi" - -/ { - model = "BCM11351 BRT board"; - compatible = "bcm,bcm11351-brt", "bcm,bcm11351"; - - memory { - reg = <0x80000000 0x40000000>; /* 1 GB */ - }; - - uart@3e000000 { - status = "okay"; - }; - -}; diff --git a/trunk/arch/arm/boot/dts/bcm11351.dtsi b/trunk/arch/arm/boot/dts/bcm11351.dtsi deleted file mode 100644 index ad135885bd2a..000000000000 --- a/trunk/arch/arm/boot/dts/bcm11351.dtsi +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2012 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/include/ "skeleton.dtsi" - -/ { - model = "BCM11351 SoC"; - compatible = "bcm,bcm11351"; - interrupt-parent = <&gic>; - - chosen { - bootargs = "console=ttyS0,115200n8"; - }; - - gic: interrupt-controller@3ff00100 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x3ff01000 0x1000>, - <0x3ff00100 0x100>; - }; - - uart@3e000000 { - compatible = "bcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x3e000000 0x1000>; - clock-frequency = <13000000>; - interrupts = <0x0 67 0x4>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - L2: l2-cache { - compatible = "arm,pl310-cache"; - reg = <0x3ff20000 0x1000>; - cache-unified; - cache-level = <2>; - }; -}; diff --git a/trunk/arch/arm/boot/dts/bcm2835-rpi-b.dts b/trunk/arch/arm/boot/dts/bcm2835-rpi-b.dts index 9b72054a0bc0..7dd860f83f96 100644 --- a/trunk/arch/arm/boot/dts/bcm2835-rpi-b.dts +++ b/trunk/arch/arm/boot/dts/bcm2835-rpi-b.dts @@ -10,18 +10,3 @@ reg = <0 0x10000000>; }; }; - -&gpio { - pinctrl-names = "default"; - pinctrl-0 = <&alt0 &alt3>; - - alt0: alt0 { - brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 14 15 40 45>; - brcm,function = <4>; /* alt0 */ - }; - - alt3: alt3 { - brcm,pins = <48 49 50 51 52 53>; - brcm,function = <7>; /* alt3 */ - }; -}; diff --git a/trunk/arch/arm/boot/dts/bcm2835.dtsi b/trunk/arch/arm/boot/dts/bcm2835.dtsi index 8917550fd1bb..0b619398532c 100644 --- a/trunk/arch/arm/boot/dts/bcm2835.dtsi +++ b/trunk/arch/arm/boot/dts/bcm2835.dtsi @@ -29,39 +29,11 @@ #interrupt-cells = <2>; }; - watchdog { - compatible = "brcm,bcm2835-pm-wdt"; - reg = <0x7e100000 0x28>; - }; - uart@20201000 { compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; reg = <0x7e201000 0x1000>; interrupts = <2 25>; clock-frequency = <3000000>; }; - - gpio: gpio { - compatible = "brcm,bcm2835-gpio"; - reg = <0x7e200000 0xb4>; - /* - * The GPIO IP block is designed for 3 banks of GPIOs. - * Each bank has a GPIO interrupt for itself. - * There is an overall "any bank" interrupt. - * In order, these are GIC interrupts 17, 18, 19, 20. - * Since the BCM2835 only has 2 banks, the 2nd bank - * interrupt output appears to be mirrored onto the - * 3rd bank's interrupt signal. - * So, a bank0 interrupt shows up on 17, 20, and - * a bank1 interrupt shows up on 18, 19, 20! - */ - interrupts = <2 17>, <2 18>, <2 19>, <2 20>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; }; }; diff --git a/trunk/arch/arm/boot/dts/ecx-2000.dts b/trunk/arch/arm/boot/dts/ecx-2000.dts deleted file mode 100644 index 46477ac1de99..000000000000 --- a/trunk/arch/arm/boot/dts/ecx-2000.dts +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright 2011-2012 Calxeda, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see . - */ - -/dts-v1/; - -/* First 4KB has pen for secondary cores. */ -/memreserve/ 0x00000000 0x0001000; - -/ { - model = "Calxeda ECX-2000"; - compatible = "calxeda,ecx-2000"; - #address-cells = <2>; - #size-cells = <2>; - clock-ranges; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - compatible = "arm,cortex-a15"; - reg = <0>; - clocks = <&a9pll>; - clock-names = "cpu"; - }; - - cpu@1 { - compatible = "arm,cortex-a15"; - reg = <1>; - clocks = <&a9pll>; - clock-names = "cpu"; - }; - - cpu@2 { - compatible = "arm,cortex-a15"; - reg = <2>; - clocks = <&a9pll>; - clock-names = "cpu"; - }; - - cpu@3 { - compatible = "arm,cortex-a15"; - reg = <3>; - clocks = <&a9pll>; - clock-names = "cpu"; - }; - }; - - memory@0 { - name = "memory"; - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0xff800000>; - }; - - memory@200000000 { - name = "memory"; - device_type = "memory"; - reg = <0x00000002 0x00000000 0x00000003 0x00000000>; - }; - - soc { - ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; - - timer { - compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - intc: interrupt-controller@fff11000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - #size-cells = <0>; - #address-cells = <1>; - interrupt-controller; - interrupts = <1 9 0xf04>; - reg = <0xfff11000 0x1000>, - <0xfff12000 0x1000>, - <0xfff14000 0x2000>, - <0xfff16000 0x2000>; - }; - - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; - }; - }; -}; - -/include/ "ecx-common.dtsi" diff --git a/trunk/arch/arm/boot/dts/ecx-common.dtsi b/trunk/arch/arm/boot/dts/ecx-common.dtsi deleted file mode 100644 index d61b535f682a..000000000000 --- a/trunk/arch/arm/boot/dts/ecx-common.dtsi +++ /dev/null @@ -1,237 +0,0 @@ -/* - * Copyright 2011-2012 Calxeda, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see . - */ - -/ { - chosen { - bootargs = "console=ttyAMA0"; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - interrupt-parent = <&intc>; - - sata@ffe08000 { - compatible = "calxeda,hb-ahci"; - reg = <0xffe08000 0x10000>; - interrupts = <0 83 4>; - dma-coherent; - calxeda,port-phys = <&combophy5 0 &combophy0 0 - &combophy0 1 &combophy0 2 - &combophy0 3>; - }; - - sdhci@ffe0e000 { - compatible = "calxeda,hb-sdhci"; - reg = <0xffe0e000 0x1000>; - interrupts = <0 90 4>; - clocks = <&eclk>; - status = "disabled"; - }; - - memory-controller@fff00000 { - compatible = "calxeda,hb-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; - - ipc@fff20000 { - compatible = "arm,pl320", "arm,primecell"; - reg = <0xfff20000 0x1000>; - interrupts = <0 7 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - gpioe: gpio@fff30000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff30000 0x1000>; - interrupts = <0 14 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpiof: gpio@fff31000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff31000 0x1000>; - interrupts = <0 15 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpiog: gpio@fff32000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff32000 0x1000>; - interrupts = <0 16 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpioh: gpio@fff33000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff33000 0x1000>; - interrupts = <0 17 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - timer@fff34000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0xfff34000 0x1000>; - interrupts = <0 18 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - rtc@fff35000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0xfff35000 0x1000>; - interrupts = <0 19 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - serial@fff36000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0xfff36000 0x1000>; - interrupts = <0 20 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - smic@fff3a000 { - compatible = "ipmi-smic"; - device_type = "ipmi"; - reg = <0xfff3a000 0x1000>; - interrupts = <0 24 4>; - reg-size = <4>; - reg-spacing = <4>; - }; - - sregs@fff3c000 { - compatible = "calxeda,hb-sregs"; - reg = <0xfff3c000 0x1000>; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - osc: oscillator { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <33333000>; - }; - - ddrpll: ddrpll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x108>; - }; - - a9pll: a9pll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x100>; - }; - - a9periphclk: a9periphclk { - #clock-cells = <0>; - compatible = "calxeda,hb-a9periph-clock"; - clocks = <&a9pll>; - reg = <0x104>; - }; - - a9bclk: a9bclk { - #clock-cells = <0>; - compatible = "calxeda,hb-a9bus-clock"; - clocks = <&a9pll>; - reg = <0x104>; - }; - - emmcpll: emmcpll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x10C>; - }; - - eclk: eclk { - #clock-cells = <0>; - compatible = "calxeda,hb-emmc-clock"; - clocks = <&emmcpll>; - reg = <0x114>; - }; - - pclk: pclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <150000000>; - }; - }; - }; - - dma@fff3d000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0xfff3d000 0x1000>; - interrupts = <0 92 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - ethernet@fff50000 { - compatible = "calxeda,hb-xgmac"; - reg = <0xfff50000 0x1000>; - interrupts = <0 77 4 0 78 4 0 79 4>; - dma-coherent; - }; - - ethernet@fff51000 { - compatible = "calxeda,hb-xgmac"; - reg = <0xfff51000 0x1000>; - interrupts = <0 80 4 0 81 4 0 82 4>; - dma-coherent; - }; - - combophy0: combo-phy@fff58000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff58000 0x1000>; - phydev = <5>; - }; - - combophy5: combo-phy@fff5d000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff5d000 0x1000>; - phydev = <31>; - }; - }; -}; diff --git a/trunk/arch/arm/boot/dts/exynos4.dtsi b/trunk/arch/arm/boot/dts/exynos4.dtsi index 96d4462730fb..a26c3dd58269 100644 --- a/trunk/arch/arm/boot/dts/exynos4.dtsi +++ b/trunk/arch/arm/boot/dts/exynos4.dtsi @@ -244,11 +244,5 @@ reg = <0x12690000 0x1000>; interrupts = <0 36 0>; }; - - mdma1: mdma@12850000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x12850000 0x1000>; - interrupts = <0 34 0>; - }; }; }; diff --git a/trunk/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/trunk/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 6a4a1a04221c..b12cf272ad0d 100644 --- a/trunk/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/trunk/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -16,134 +16,6 @@ / { pinctrl@11400000 { - gpa0: gpa0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpa1: gpa1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpb: gpb { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpc0: gpc0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpc1: gpc1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpd0: gpd0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpd1: gpd1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpe0: gpe0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpe1: gpe1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpe2: gpe2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpe3: gpe3 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpe4: gpe4 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpf0: gpf0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpf1: gpf1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpf2: gpf2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpf3: gpf3 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - uart0_data: uart0-data { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <0x2>; @@ -333,151 +205,6 @@ }; pinctrl@11000000 { - gpj0: gpj0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpj1: gpj1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpk0: gpk0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpk1: gpk1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpk2: gpk2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpk3: gpk3 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpl0: gpl0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpl1: gpl1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpl2: gpl2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpy0: gpy0 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy1: gpy1 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy2: gpy2 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy3: gpy3 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy4: gpy4 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy5: gpy5 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy6: gpy6 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpx0: gpx0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - interrupt-parent = <&gic>; - interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; - #interrupt-cells = <2>; - }; - - gpx1: gpx1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - interrupt-parent = <&gic>; - interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; - #interrupt-cells = <2>; - }; - - gpx2: gpx2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpx3: gpx3 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - sd0_clk: sd0-clk { samsung,pins = "gpk0-0"; samsung,pin-function = <2>; @@ -711,11 +438,6 @@ }; pinctrl@03860000 { - gpz: gpz { - gpio-controller; - #gpio-cells = <2>; - }; - i2s0_bus: i2s0-bus { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4", "gpz-5", "gpz-6"; diff --git a/trunk/arch/arm/boot/dts/exynos4210.dtsi b/trunk/arch/arm/boot/dts/exynos4210.dtsi index d877dbe7ac0e..214c557eda7f 100644 --- a/trunk/arch/arm/boot/dts/exynos4210.dtsi +++ b/trunk/arch/arm/boot/dts/exynos4210.dtsi @@ -46,17 +46,27 @@ compatible = "samsung,pinctrl-exynos4210"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; + interrupt-controller; + #interrupt-cells = <2>; }; pinctrl_1: pinctrl@11000000 { compatible = "samsung,pinctrl-exynos4210"; reg = <0x11000000 0x1000>; interrupts = <0 46 0>; + interrupt-controller; + #interrupt-cells = <2>; wakup_eint: wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, + <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, + <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, + <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>, + <0 32 0>; }; }; @@ -64,4 +74,233 @@ compatible = "samsung,pinctrl-exynos4210"; reg = <0x03860000 0x1000>; }; + + gpio-controllers { + #address-cells = <1>; + #size-cells = <1>; + gpio-controller; + ranges; + + gpa0: gpio-controller@11400000 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400000 0x20>; + #gpio-cells = <4>; + }; + + gpa1: gpio-controller@11400020 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400020 0x20>; + #gpio-cells = <4>; + }; + + gpb: gpio-controller@11400040 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400040 0x20>; + #gpio-cells = <4>; + }; + + gpc0: gpio-controller@11400060 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400060 0x20>; + #gpio-cells = <4>; + }; + + gpc1: gpio-controller@11400080 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400080 0x20>; + #gpio-cells = <4>; + }; + + gpd0: gpio-controller@114000A0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x114000A0 0x20>; + #gpio-cells = <4>; + }; + + gpd1: gpio-controller@114000C0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x114000C0 0x20>; + #gpio-cells = <4>; + }; + + gpe0: gpio-controller@114000E0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x114000E0 0x20>; + #gpio-cells = <4>; + }; + + gpe1: gpio-controller@11400100 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400100 0x20>; + #gpio-cells = <4>; + }; + + gpe2: gpio-controller@11400120 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400120 0x20>; + #gpio-cells = <4>; + }; + + gpe3: gpio-controller@11400140 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400140 0x20>; + #gpio-cells = <4>; + }; + + gpe4: gpio-controller@11400160 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400160 0x20>; + #gpio-cells = <4>; + }; + + gpf0: gpio-controller@11400180 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11400180 0x20>; + #gpio-cells = <4>; + }; + + gpf1: gpio-controller@114001A0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x114001A0 0x20>; + #gpio-cells = <4>; + }; + + gpf2: gpio-controller@114001C0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x114001C0 0x20>; + #gpio-cells = <4>; + }; + + gpf3: gpio-controller@114001E0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x114001E0 0x20>; + #gpio-cells = <4>; + }; + + gpj0: gpio-controller@11000000 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000000 0x20>; + #gpio-cells = <4>; + }; + + gpj1: gpio-controller@11000020 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000020 0x20>; + #gpio-cells = <4>; + }; + + gpk0: gpio-controller@11000040 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000040 0x20>; + #gpio-cells = <4>; + }; + + gpk1: gpio-controller@11000060 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000060 0x20>; + #gpio-cells = <4>; + }; + + gpk2: gpio-controller@11000080 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000080 0x20>; + #gpio-cells = <4>; + }; + + gpk3: gpio-controller@110000A0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x110000A0 0x20>; + #gpio-cells = <4>; + }; + + gpl0: gpio-controller@110000C0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x110000C0 0x20>; + #gpio-cells = <4>; + }; + + gpl1: gpio-controller@110000E0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x110000E0 0x20>; + #gpio-cells = <4>; + }; + + gpl2: gpio-controller@11000100 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000100 0x20>; + #gpio-cells = <4>; + }; + + gpy0: gpio-controller@11000120 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000120 0x20>; + #gpio-cells = <4>; + }; + + gpy1: gpio-controller@11000140 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000140 0x20>; + #gpio-cells = <4>; + }; + + gpy2: gpio-controller@11000160 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000160 0x20>; + #gpio-cells = <4>; + }; + + gpy3: gpio-controller@11000180 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000180 0x20>; + #gpio-cells = <4>; + }; + + gpy4: gpio-controller@110001A0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x110001A0 0x20>; + #gpio-cells = <4>; + }; + + gpy5: gpio-controller@110001C0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x110001C0 0x20>; + #gpio-cells = <4>; + }; + + gpy6: gpio-controller@110001E0 { + compatible = "samsung,exynos4-gpio"; + reg = <0x110001E0 0x20>; + #gpio-cells = <4>; + }; + + gpx0: gpio-controller@11000C00 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000C00 0x20>; + #gpio-cells = <4>; + }; + + gpx1: gpio-controller@11000C20 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000C20 0x20>; + #gpio-cells = <4>; + }; + + gpx2: gpio-controller@11000C40 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000C40 0x20>; + #gpio-cells = <4>; + }; + + gpx3: gpio-controller@11000C60 { + compatible = "samsung,exynos4-gpio"; + reg = <0x11000C60 0x20>; + #gpio-cells = <4>; + }; + + gpz: gpio-controller@03860000 { + compatible = "samsung,exynos4-gpio"; + reg = <0x03860000 0x20>; + #gpio-cells = <4>; + }; + }; }; diff --git a/trunk/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/trunk/arch/arm/boot/dts/exynos5440-ssdk5440.dts deleted file mode 100644 index 921c83cf694f..000000000000 --- a/trunk/arch/arm/boot/dts/exynos5440-ssdk5440.dts +++ /dev/null @@ -1,46 +0,0 @@ -/* - * SAMSUNG SSDK5440 board device tree source - * - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/dts-v1/; -/include/ "exynos5440.dtsi" - -/ { - model = "SAMSUNG SSDK5440 board based on EXYNOS5440"; - compatible = "samsung,ssdk5440", "samsung,exynos5440"; - - memory { - reg = <0x80000000 0x80000000>; - }; - - chosen { - bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC2,115200 init=/linuxrc"; - }; - - spi { - status = "disabled"; - }; - - i2c@F0000 { - status = "disabled"; - }; - - i2c@100000 { - status = "disabled"; - }; - - watchdog { - status = "disabled"; - }; - - rtc { - status = "disabled"; - }; -}; diff --git a/trunk/arch/arm/boot/dts/exynos5440.dtsi b/trunk/arch/arm/boot/dts/exynos5440.dtsi deleted file mode 100644 index 024269de8ee5..000000000000 --- a/trunk/arch/arm/boot/dts/exynos5440.dtsi +++ /dev/null @@ -1,159 +0,0 @@ -/* - * SAMSUNG EXYNOS5440 SoC device tree source - * - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/include/ "skeleton.dtsi" - -/ { - compatible = "samsung,exynos5440"; - - interrupt-parent = <&gic>; - - gic:interrupt-controller@2E0000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>; - }; - - cpus { - cpu@0 { - compatible = "arm,cortex-a15"; - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>; - clock-frequency = <1000000>; - }; - }; - cpu@1 { - compatible = "arm,cortex-a15"; - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 14 0xf08>; - clock-frequency = <1000000>; - }; - }; - cpu@2 { - compatible = "arm,cortex-a15"; - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 14 0xf08>; - clock-frequency = <1000000>; - }; - }; - cpu@3 { - compatible = "arm,cortex-a15"; - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 14 0xf08>; - clock-frequency = <1000000>; - }; - }; - }; - - common { - compatible = "samsung,exynos5440"; - - }; - - serial@B0000 { - compatible = "samsung,exynos4210-uart"; - reg = <0xB0000 0x1000>; - interrupts = <0 2 0>; - }; - - serial@C0000 { - compatible = "samsung,exynos4210-uart"; - reg = <0xC0000 0x1000>; - interrupts = <0 3 0>; - }; - - spi { - compatible = "samsung,exynos4210-spi"; - reg = <0xD0000 0x1000>; - interrupts = <0 4 0>; - tx-dma-channel = <&pdma0 5>; /* preliminary */ - rx-dma-channel = <&pdma0 4>; /* preliminary */ - #address-cells = <1>; - #size-cells = <0>; - }; - - pinctrl { - compatible = "samsung,pinctrl-exynos5440"; - reg = <0xE0000 0x1000>; - interrupt-controller; - #interrupt-cells = <2>; - #gpio-cells = <2>; - - fan: fan { - samsung,exynos5440-pin-function = <1>; - }; - - hdd_led0: hdd_led0 { - samsung,exynos5440-pin-function = <2>; - }; - - hdd_led1: hdd_led1 { - samsung,exynos5440-pin-function = <3>; - }; - - uart1: uart1 { - samsung,exynos5440-pin-function = <4>; - }; - }; - - i2c@F0000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0xF0000 0x1000>; - interrupts = <0 5 0>; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c@100000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x100000 0x1000>; - interrupts = <0 6 0>; - #address-cells = <1>; - #size-cells = <0>; - }; - - watchdog { - compatible = "samsung,s3c2410-wdt"; - reg = <0x110000 0x1000>; - interrupts = <0 1 0>; - }; - - amba { - #address-cells = <1>; - #size-cells = <1>; - compatible = "arm,amba-bus"; - interrupt-parent = <&gic>; - ranges; - - pdma0: pdma@121A0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x120000 0x1000>; - interrupts = <0 34 0>; - }; - - pdma1: pdma@121B0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x121000 0x1000>; - interrupts = <0 35 0>; - }; - }; - - rtc { - compatible = "samsung,s3c6410-rtc"; - reg = <0x130000 0x1000>; - interrupts = <0 16 0>, <0 17 0>; - }; -}; diff --git a/trunk/arch/arm/boot/dts/highbank.dts b/trunk/arch/arm/boot/dts/highbank.dts index a9ae5d32e80d..0c6fc34821f9 100644 --- a/trunk/arch/arm/boot/dts/highbank.dts +++ b/trunk/arch/arm/boot/dts/highbank.dts @@ -69,8 +69,16 @@ reg = <0x00000000 0xff900000>; }; + chosen { + bootargs = "console=ttyAMA0"; + }; + soc { - ranges = <0x00000000 0x00000000 0xffffffff>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&intc>; + ranges; timer@fff10600 { compatible = "arm,cortex-a9-twd-timer"; @@ -109,6 +117,173 @@ interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; }; + sata@ffe08000 { + compatible = "calxeda,hb-ahci"; + reg = <0xffe08000 0x10000>; + interrupts = <0 83 4>; + calxeda,port-phys = <&combophy5 0 &combophy0 0 + &combophy0 1 &combophy0 2 + &combophy0 3>; + dma-coherent; + }; + + sdhci@ffe0e000 { + compatible = "calxeda,hb-sdhci"; + reg = <0xffe0e000 0x1000>; + interrupts = <0 90 4>; + clocks = <&eclk>; + }; + + memory-controller@fff00000 { + compatible = "calxeda,hb-ddr-ctrl"; + reg = <0xfff00000 0x1000>; + interrupts = <0 91 4>; + }; + + ipc@fff20000 { + compatible = "arm,pl320", "arm,primecell"; + reg = <0xfff20000 0x1000>; + interrupts = <0 7 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpioe: gpio@fff30000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff30000 0x1000>; + interrupts = <0 14 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpiof: gpio@fff31000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff31000 0x1000>; + interrupts = <0 15 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpiog: gpio@fff32000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff32000 0x1000>; + interrupts = <0 16 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpioh: gpio@fff33000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff33000 0x1000>; + interrupts = <0 17 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + timer { + compatible = "arm,sp804", "arm,primecell"; + reg = <0xfff34000 0x1000>; + interrupts = <0 18 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + rtc@fff35000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0xfff35000 0x1000>; + interrupts = <0 19 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + serial@fff36000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xfff36000 0x1000>; + interrupts = <0 20 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + smic@fff3a000 { + compatible = "ipmi-smic"; + device_type = "ipmi"; + reg = <0xfff3a000 0x1000>; + interrupts = <0 24 4>; + reg-size = <4>; + reg-spacing = <4>; + }; + + sregs@fff3c000 { + compatible = "calxeda,hb-sregs"; + reg = <0xfff3c000 0x1000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + osc: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33333000>; + }; + + ddrpll: ddrpll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x108>; + }; + + a9pll: a9pll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x100>; + }; + + a9periphclk: a9periphclk { + #clock-cells = <0>; + compatible = "calxeda,hb-a9periph-clock"; + clocks = <&a9pll>; + reg = <0x104>; + }; + + a9bclk: a9bclk { + #clock-cells = <0>; + compatible = "calxeda,hb-a9bus-clock"; + clocks = <&a9pll>; + reg = <0x104>; + }; + + emmcpll: emmcpll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x10C>; + }; + + eclk: eclk { + #clock-cells = <0>; + compatible = "calxeda,hb-emmc-clock"; + clocks = <&emmcpll>; + reg = <0x114>; + }; + + pclk: pclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <150000000>; + }; + }; + }; sregs@fff3c200 { compatible = "calxeda,hb-sregs-l2-ecc"; @@ -116,7 +291,38 @@ interrupts = <0 71 4 0 72 4>; }; + dma@fff3d000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0xfff3d000 0x1000>; + interrupts = <0 92 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + ethernet@fff50000 { + compatible = "calxeda,hb-xgmac"; + reg = <0xfff50000 0x1000>; + interrupts = <0 77 4 0 78 4 0 79 4>; + }; + + ethernet@fff51000 { + compatible = "calxeda,hb-xgmac"; + reg = <0xfff51000 0x1000>; + interrupts = <0 80 4 0 81 4 0 82 4>; + }; + + combophy0: combo-phy@fff58000 { + compatible = "calxeda,hb-combophy"; + #phy-cells = <1>; + reg = <0xfff58000 0x1000>; + phydev = <5>; + }; + + combophy5: combo-phy@fff5d000 { + compatible = "calxeda,hb-combophy"; + #phy-cells = <1>; + reg = <0xfff5d000 0x1000>; + phydev = <31>; + }; }; }; - -/include/ "ecx-common.dtsi" diff --git a/trunk/arch/arm/boot/dts/imx27-3ds.dts b/trunk/arch/arm/boot/dts/imx27-3ds.dts index b01c0d745fc5..0a8978a40ece 100644 --- a/trunk/arch/arm/boot/dts/imx27-3ds.dts +++ b/trunk/arch/arm/boot/dts/imx27-3ds.dts @@ -23,6 +23,10 @@ soc { aipi@10000000 { /* aipi */ + wdog@10002000 { + status = "okay"; + }; + uart1: serial@1000a000 { fsl,uart-has-rtscts; status = "okay"; diff --git a/trunk/arch/arm/boot/dts/imx27.dtsi b/trunk/arch/arm/boot/dts/imx27.dtsi index 67d672792b0d..3e54f1498841 100644 --- a/trunk/arch/arm/boot/dts/imx27.dtsi +++ b/trunk/arch/arm/boot/dts/imx27.dtsi @@ -113,7 +113,7 @@ i2c1: i2c@10012000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; reg = <0x10012000 0x1000>; interrupts = <12>; status = "disabled"; @@ -205,7 +205,7 @@ i2c2: i2c@1001d000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; reg = <0x1001d000 0x1000>; interrupts = <1>; status = "disabled"; diff --git a/trunk/arch/arm/boot/dts/imx51-babbage.dts b/trunk/arch/arm/boot/dts/imx51-babbage.dts index 567e7ee72f91..cbd2b1c7487b 100644 --- a/trunk/arch/arm/boot/dts/imx51-babbage.dts +++ b/trunk/arch/arm/boot/dts/imx51-babbage.dts @@ -22,22 +22,6 @@ }; soc { - display@di0 { - compatible = "fsl,imx-parallel-display"; - crtcs = <&ipu 0>; - interface-pix-fmt = "rgb24"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu_disp1_1>; - }; - - display@di1 { - compatible = "fsl,imx-parallel-display"; - crtcs = <&ipu 1>; - interface-pix-fmt = "rgb565"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu_disp2_1>; - }; - aips@70000000 { /* aips-1 */ spba@70000000 { esdhc@70004000 { /* ESDHC1 */ diff --git a/trunk/arch/arm/boot/dts/imx51.dtsi b/trunk/arch/arm/boot/dts/imx51.dtsi index 2781e47cff0d..75d069fcf897 100644 --- a/trunk/arch/arm/boot/dts/imx51.dtsi +++ b/trunk/arch/arm/boot/dts/imx51.dtsi @@ -62,13 +62,6 @@ interrupt-parent = <&tzic>; ranges; - ipu: ipu@40000000 { - #crtc-cells = <1>; - compatible = "fsl,imx51-ipu"; - reg = <0x40000000 0x20000000>; - interrupts = <11 10>; - }; - aips@70000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; @@ -87,8 +80,6 @@ compatible = "fsl,imx51-esdhc"; reg = <0x70004000 0x4000>; interrupts = <1>; - clocks = <&clks 44>, <&clks 0>, <&clks 71>; - clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -96,8 +87,6 @@ compatible = "fsl,imx51-esdhc"; reg = <0x70008000 0x4000>; interrupts = <2>; - clocks = <&clks 45>, <&clks 0>, <&clks 72>; - clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -105,8 +94,6 @@ compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x7000c000 0x4000>; interrupts = <33>; - clocks = <&clks 32>, <&clks 33>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -116,8 +103,6 @@ compatible = "fsl,imx51-ecspi"; reg = <0x70010000 0x4000>; interrupts = <36>; - clocks = <&clks 51>, <&clks 52>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -125,7 +110,6 @@ compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; reg = <0x70014000 0x4000>; interrupts = <30>; - clocks = <&clks 49>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ status = "disabled"; @@ -135,8 +119,6 @@ compatible = "fsl,imx51-esdhc"; reg = <0x70020000 0x4000>; interrupts = <3>; - clocks = <&clks 46>, <&clks 0>, <&clks 73>; - clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -144,8 +126,6 @@ compatible = "fsl,imx51-esdhc"; reg = <0x70024000 0x4000>; interrupts = <4>; - clocks = <&clks 47>, <&clks 0>, <&clks 74>; - clock-names = "ipg", "ahb", "per"; status = "disabled"; }; }; @@ -222,14 +202,12 @@ compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; reg = <0x73f98000 0x4000>; interrupts = <58>; - clocks = <&clks 0>; }; wdog@73f9c000 { /* WDOG2 */ compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; reg = <0x73f9c000 0x4000>; interrupts = <59>; - clocks = <&clks 0>; status = "disabled"; }; @@ -317,66 +295,6 @@ }; }; - ipu_disp1 { - pinctrl_ipu_disp1_1: ipudisp1grp-1 { - fsl,pins = < - 528 0x5 /* MX51_PAD_DISP1_DAT0__DISP1_DAT0 */ - 529 0x5 /* MX51_PAD_DISP1_DAT1__DISP1_DAT1 */ - 530 0x5 /* MX51_PAD_DISP1_DAT2__DISP1_DAT2 */ - 531 0x5 /* MX51_PAD_DISP1_DAT3__DISP1_DAT3 */ - 532 0x5 /* MX51_PAD_DISP1_DAT4__DISP1_DAT4 */ - 533 0x5 /* MX51_PAD_DISP1_DAT5__DISP1_DAT5 */ - 535 0x5 /* MX51_PAD_DISP1_DAT6__DISP1_DAT6 */ - 537 0x5 /* MX51_PAD_DISP1_DAT7__DISP1_DAT7 */ - 539 0x5 /* MX51_PAD_DISP1_DAT8__DISP1_DAT8 */ - 541 0x5 /* MX51_PAD_DISP1_DAT9__DISP1_DAT9 */ - 543 0x5 /* MX51_PAD_DISP1_DAT10__DISP1_DAT10 */ - 545 0x5 /* MX51_PAD_DISP1_DAT11__DISP1_DAT11 */ - 547 0x5 /* MX51_PAD_DISP1_DAT12__DISP1_DAT12 */ - 549 0x5 /* MX51_PAD_DISP1_DAT13__DISP1_DAT13 */ - 551 0x5 /* MX51_PAD_DISP1_DAT14__DISP1_DAT14 */ - 553 0x5 /* MX51_PAD_DISP1_DAT15__DISP1_DAT15 */ - 555 0x5 /* MX51_PAD_DISP1_DAT16__DISP1_DAT16 */ - 557 0x5 /* MX51_PAD_DISP1_DAT17__DISP1_DAT17 */ - 559 0x5 /* MX51_PAD_DISP1_DAT18__DISP1_DAT18 */ - 563 0x5 /* MX51_PAD_DISP1_DAT19__DISP1_DAT19 */ - 567 0x5 /* MX51_PAD_DISP1_DAT20__DISP1_DAT20 */ - 571 0x5 /* MX51_PAD_DISP1_DAT21__DISP1_DAT21 */ - 575 0x5 /* MX51_PAD_DISP1_DAT22__DISP1_DAT22 */ - 579 0x5 /* MX51_PAD_DISP1_DAT23__DISP1_DAT23 */ - 584 0x5 /* MX51_PAD_DI1_PIN2__DI1_PIN2 (hsync) */ - 583 0x5 /* MX51_PAD_DI1_PIN3__DI1_PIN3 (vsync) */ - >; - }; - }; - - ipu_disp2 { - pinctrl_ipu_disp2_1: ipudisp2grp-1 { - fsl,pins = < - 603 0x5 /* MX51_PAD_DISP2_DAT0__DISP2_DAT0 */ - 608 0x5 /* MX51_PAD_DISP2_DAT1__DISP2_DAT1 */ - 613 0x5 /* MX51_PAD_DISP2_DAT2__DISP2_DAT2 */ - 614 0x5 /* MX51_PAD_DISP2_DAT3__DISP2_DAT3 */ - 615 0x5 /* MX51_PAD_DISP2_DAT4__DISP2_DAT4 */ - 616 0x5 /* MX51_PAD_DISP2_DAT5__DISP2_DAT5 */ - 617 0x5 /* MX51_PAD_DISP2_DAT6__DISP2_DAT6 */ - 622 0x5 /* MX51_PAD_DISP2_DAT7__DISP2_DAT7 */ - 627 0x5 /* MX51_PAD_DISP2_DAT8__DISP2_DAT8 */ - 633 0x5 /* MX51_PAD_DISP2_DAT9__DISP2_DAT9 */ - 637 0x5 /* MX51_PAD_DISP2_DAT10__DISP2_DAT10 */ - 643 0x5 /* MX51_PAD_DISP2_DAT11__DISP2_DAT11 */ - 648 0x5 /* MX51_PAD_DISP2_DAT12__DISP2_DAT12 */ - 652 0x5 /* MX51_PAD_DISP2_DAT13__DISP2_DAT13 */ - 656 0x5 /* MX51_PAD_DISP2_DAT14__DISP2_DAT14 */ - 661 0x5 /* MX51_PAD_DISP2_DAT15__DISP2_DAT15 */ - 593 0x5 /* MX51_PAD_DI2_PIN2__DI2_PIN2 (hsync) */ - 595 0x5 /* MX51_PAD_DI2_PIN3__DI2_PIN3 (vsync) */ - 597 0x5 /* MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK */ - 599 0x5 /* MX51_PAD_DI_GP4__DI2_PIN15 */ - >; - }; - }; - uart1 { pinctrl_uart1_1: uart1grp-1 { fsl,pins = < @@ -409,30 +327,10 @@ }; }; - pwm1: pwm@73fb4000 { - #pwm-cells = <2>; - compatible = "fsl,imx51-pwm", "fsl,imx27-pwm"; - reg = <0x73fb4000 0x4000>; - clocks = <&clks 37>, <&clks 38>; - clock-names = "ipg", "per"; - interrupts = <61>; - }; - - pwm2: pwm@73fb8000 { - #pwm-cells = <2>; - compatible = "fsl,imx51-pwm", "fsl,imx27-pwm"; - reg = <0x73fb8000 0x4000>; - clocks = <&clks 39>, <&clks 40>; - clock-names = "ipg", "per"; - interrupts = <94>; - }; - uart1: serial@73fbc000 { compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x73fbc000 0x4000>; interrupts = <31>; - clocks = <&clks 28>, <&clks 29>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -440,17 +338,8 @@ compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x73fc0000 0x4000>; interrupts = <32>; - clocks = <&clks 30>, <&clks 31>; - clock-names = "ipg", "per"; status = "disabled"; }; - - clks: ccm@73fd4000{ - compatible = "fsl,imx51-ccm"; - reg = <0x73fd4000 0x4000>; - interrupts = <0 71 0x04 0 72 0x04>; - #clock-cells = <1>; - }; }; aips@80000000 { /* AIPS2 */ @@ -466,8 +355,6 @@ compatible = "fsl,imx51-ecspi"; reg = <0x83fac000 0x4000>; interrupts = <37>; - clocks = <&clks 53>, <&clks 54>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -475,8 +362,6 @@ compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; reg = <0x83fb0000 0x4000>; interrupts = <6>; - clocks = <&clks 56>, <&clks 56>; - clock-names = "ipg", "ahb"; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; }; @@ -486,28 +371,24 @@ compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; reg = <0x83fc0000 0x4000>; interrupts = <38>; - clocks = <&clks 55>, <&clks 0>; - clock-names = "ipg", "per"; status = "disabled"; }; i2c@83fc4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; reg = <0x83fc4000 0x4000>; interrupts = <63>; - clocks = <&clks 35>; status = "disabled"; }; i2c@83fc8000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; reg = <0x83fc8000 0x4000>; interrupts = <62>; - clocks = <&clks 34>; status = "disabled"; }; @@ -515,7 +396,6 @@ compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; reg = <0x83fcc000 0x4000>; interrupts = <29>; - clocks = <&clks 48>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ status = "disabled"; @@ -531,7 +411,6 @@ compatible = "fsl,imx51-nand"; reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; interrupts = <8>; - clocks = <&clks 60>; status = "disabled"; }; @@ -539,7 +418,6 @@ compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; reg = <0x83fe8000 0x4000>; interrupts = <96>; - clocks = <&clks 50>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */ status = "disabled"; @@ -549,8 +427,6 @@ compatible = "fsl,imx51-fec", "fsl,imx27-fec"; reg = <0x83fec000 0x4000>; interrupts = <87>; - clocks = <&clks 42>, <&clks 42>, <&clks 42>; - clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/imx53.dtsi b/trunk/arch/arm/boot/dts/imx53.dtsi index da9a047ce4cf..76ebb1ad2675 100644 --- a/trunk/arch/arm/boot/dts/imx53.dtsi +++ b/trunk/arch/arm/boot/dts/imx53.dtsi @@ -67,13 +67,6 @@ interrupt-parent = <&tzic>; ranges; - ipu: ipu@18000000 { - #crtc-cells = <1>; - compatible = "fsl,imx53-ipu"; - reg = <0x18000000 0x080000000>; - interrupts = <11 10>; - }; - aips@50000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; @@ -92,8 +85,6 @@ compatible = "fsl,imx53-esdhc"; reg = <0x50004000 0x4000>; interrupts = <1>; - clocks = <&clks 44>, <&clks 0>, <&clks 71>; - clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -101,8 +92,6 @@ compatible = "fsl,imx53-esdhc"; reg = <0x50008000 0x4000>; interrupts = <2>; - clocks = <&clks 45>, <&clks 0>, <&clks 72>; - clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -110,8 +99,6 @@ compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x5000c000 0x4000>; interrupts = <33>; - clocks = <&clks 32>, <&clks 33>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -121,8 +108,6 @@ compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; reg = <0x50010000 0x4000>; interrupts = <36>; - clocks = <&clks 51>, <&clks 52>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -130,7 +115,6 @@ compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; reg = <0x50014000 0x4000>; interrupts = <30>; - clocks = <&clks 49>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ status = "disabled"; @@ -140,8 +124,6 @@ compatible = "fsl,imx53-esdhc"; reg = <0x50020000 0x4000>; interrupts = <3>; - clocks = <&clks 46>, <&clks 0>, <&clks 73>; - clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -149,8 +131,6 @@ compatible = "fsl,imx53-esdhc"; reg = <0x50024000 0x4000>; interrupts = <4>; - clocks = <&clks 47>, <&clks 0>, <&clks 74>; - clock-names = "ipg", "ahb", "per"; status = "disabled"; }; }; @@ -227,14 +207,12 @@ compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; reg = <0x53f98000 0x4000>; interrupts = <58>; - clocks = <&clks 0>; }; wdog@53f9c000 { /* WDOG2 */ compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; reg = <0x53f9c000 0x4000>; interrupts = <59>; - clocks = <&clks 0>; status = "disabled"; }; @@ -393,30 +371,10 @@ }; }; - pwm1: pwm@53fb4000 { - #pwm-cells = <2>; - compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; - reg = <0x53fb4000 0x4000>; - clocks = <&clks 37>, <&clks 38>; - clock-names = "ipg", "per"; - interrupts = <61>; - }; - - pwm2: pwm@53fb8000 { - #pwm-cells = <2>; - compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; - reg = <0x53fb8000 0x4000>; - clocks = <&clks 39>, <&clks 40>; - clock-names = "ipg", "per"; - interrupts = <94>; - }; - uart1: serial@53fbc000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53fbc000 0x4000>; interrupts = <31>; - clocks = <&clks 28>, <&clks 29>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -424,8 +382,6 @@ compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53fc0000 0x4000>; interrupts = <32>; - clocks = <&clks 30>, <&clks 31>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -433,8 +389,6 @@ compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; reg = <0x53fc8000 0x4000>; interrupts = <82>; - clocks = <&clks 158>, <&clks 157>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -442,18 +396,9 @@ compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; reg = <0x53fcc000 0x4000>; interrupts = <83>; - clocks = <&clks 158>, <&clks 157>; - clock-names = "ipg", "per"; status = "disabled"; }; - clks: ccm@53fd4000{ - compatible = "fsl,imx53-ccm"; - reg = <0x53fd4000 0x4000>; - interrupts = <0 71 0x04 0 72 0x04>; - #clock-cells = <1>; - }; - gpio5: gpio@53fdc000 { compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; reg = <0x53fdc000 0x4000>; @@ -487,10 +432,9 @@ i2c@53fec000 { /* I2C3 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; reg = <0x53fec000 0x4000>; interrupts = <64>; - clocks = <&clks 88>; status = "disabled"; }; @@ -498,8 +442,6 @@ compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53ff0000 0x4000>; interrupts = <13>; - clocks = <&clks 65>, <&clks 66>; - clock-names = "ipg", "per"; status = "disabled"; }; }; @@ -515,8 +457,6 @@ compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x63f90000 0x4000>; interrupts = <86>; - clocks = <&clks 67>, <&clks 68>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -526,8 +466,6 @@ compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; reg = <0x63fac000 0x4000>; interrupts = <37>; - clocks = <&clks 53>, <&clks 54>; - clock-names = "ipg", "per"; status = "disabled"; }; @@ -535,8 +473,6 @@ compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; reg = <0x63fb0000 0x4000>; interrupts = <6>; - clocks = <&clks 56>, <&clks 56>; - clock-names = "ipg", "ahb"; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; }; @@ -546,28 +482,24 @@ compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; reg = <0x63fc0000 0x4000>; interrupts = <38>; - clocks = <&clks 55>, <&clks 0>; - clock-names = "ipg", "per"; status = "disabled"; }; i2c@63fc4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; reg = <0x63fc4000 0x4000>; interrupts = <63>; - clocks = <&clks 35>; status = "disabled"; }; i2c@63fc8000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; reg = <0x63fc8000 0x4000>; interrupts = <62>; - clocks = <&clks 34>; status = "disabled"; }; @@ -575,7 +507,6 @@ compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; reg = <0x63fcc000 0x4000>; interrupts = <29>; - clocks = <&clks 48>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ status = "disabled"; @@ -591,7 +522,6 @@ compatible = "fsl,imx53-nand"; reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; interrupts = <8>; - clocks = <&clks 60>; status = "disabled"; }; @@ -599,7 +529,6 @@ compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; reg = <0x63fe8000 0x4000>; interrupts = <96>; - clocks = <&clks 50>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */ status = "disabled"; @@ -609,8 +538,6 @@ compatible = "fsl,imx53-fec", "fsl,imx25-fec"; reg = <0x63fec000 0x4000>; interrupts = <87>; - clocks = <&clks 42>, <&clks 42>, <&clks 42>; - clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/imx6q.dtsi b/trunk/arch/arm/boot/dts/imx6q.dtsi index d907d062e5dd..f3990b04fecf 100644 --- a/trunk/arch/arm/boot/dts/imx6q.dtsi +++ b/trunk/arch/arm/boot/dts/imx6q.dtsi @@ -268,39 +268,23 @@ }; pwm@02080000 { /* PWM1 */ - #pwm-cells = <2>; - compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; reg = <0x02080000 0x4000>; interrupts = <0 83 0x04>; - clocks = <&clks 62>, <&clks 145>; - clock-names = "ipg", "per"; }; pwm@02084000 { /* PWM2 */ - #pwm-cells = <2>; - compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; reg = <0x02084000 0x4000>; interrupts = <0 84 0x04>; - clocks = <&clks 62>, <&clks 146>; - clock-names = "ipg", "per"; }; pwm@02088000 { /* PWM3 */ - #pwm-cells = <2>; - compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; reg = <0x02088000 0x4000>; interrupts = <0 85 0x04>; - clocks = <&clks 62>, <&clks 147>; - clock-names = "ipg", "per"; }; pwm@0208c000 { /* PWM4 */ - #pwm-cells = <2>; - compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; reg = <0x0208c000 0x4000>; interrupts = <0 86 0x04>; - clocks = <&clks 62>, <&clks 148>; - clock-names = "ipg", "per"; }; flexcan@02090000 { /* CAN1 */ @@ -898,7 +882,7 @@ i2c@021a0000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a0000 0x4000>; interrupts = <0 36 0x04>; clocks = <&clks 125>; @@ -908,7 +892,7 @@ i2c@021a4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a4000 0x4000>; interrupts = <0 37 0x04>; clocks = <&clks 126>; @@ -918,7 +902,7 @@ i2c@021a8000 { /* I2C3 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a8000 0x4000>; interrupts = <0 38 0x04>; clocks = <&clks 127>; @@ -1017,23 +1001,5 @@ status = "disabled"; }; }; - - ipu1: ipu@02400000 { - #crtc-cells = <1>; - compatible = "fsl,imx6q-ipu"; - reg = <0x02400000 0x400000>; - interrupts = <0 6 0x4 0 5 0x4>; - clocks = <&clks 130>, <&clks 131>, <&clks 132>; - clock-names = "bus", "di0", "di1"; - }; - - ipu2: ipu@02800000 { - #crtc-cells = <1>; - compatible = "fsl,imx6q-ipu"; - reg = <0x02800000 0x400000>; - interrupts = <0 8 0x4 0 7 0x4>; - clocks = <&clks 133>, <&clks 134>, <&clks 137>; - clock-names = "bus", "di0", "di1"; - }; }; }; diff --git a/trunk/arch/arm/boot/dts/sh7377.dtsi b/trunk/arch/arm/boot/dts/sh7377.dtsi new file mode 100644 index 000000000000..767ee0796daa --- /dev/null +++ b/trunk/arch/arm/boot/dts/sh7377.dtsi @@ -0,0 +1,21 @@ +/* + * Device Tree Source for the sh7377 SoC + * + * Copyright (C) 2012 Renesas Solutions Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "renesas,sh7377"; + + cpus { + cpu@0 { + compatible = "arm,cortex-a8"; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/sun4i.dtsi b/trunk/arch/arm/boot/dts/sun4i.dtsi deleted file mode 100644 index e61fdd47bd01..000000000000 --- a/trunk/arch/arm/boot/dts/sun4i.dtsi +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright 2012 Stefan Roese - * Stefan Roese - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/include/ "sunxi.dtsi" - -/ { - memory { - reg = <0x40000000 0x80000000>; - }; -}; diff --git a/trunk/arch/arm/boot/dts/tegra20-harmony.dts b/trunk/arch/arm/boot/dts/tegra20-harmony.dts index 74b8a47adf91..c3ef1ad26b6a 100644 --- a/trunk/arch/arm/boot/dts/tegra20-harmony.dts +++ b/trunk/arch/arm/boot/dts/tegra20-harmony.dts @@ -297,98 +297,131 @@ vinldo9-supply = <&sm2_reg>; regulators { - sys_reg: sys { + #address-cells = <1>; + #size-cells = <0>; + + sys_reg: regulator@0 { + reg = <0>; + regulator-compatible = "sys"; regulator-name = "vdd_sys"; regulator-always-on; }; - sm0 { + regulator@1 { + reg = <1>; + regulator-compatible = "sm0"; regulator-name = "vdd_sm0,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - sm1 { + regulator@2 { + reg = <2>; + regulator-compatible = "sm1"; regulator-name = "vdd_sm1,vdd_cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sm2_reg: sm2 { + sm2_reg: regulator@3 { + reg = <3>; + regulator-compatible = "sm2"; regulator-name = "vdd_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; regulator-always-on; }; - ldo0 { + regulator@4 { + reg = <4>; + regulator-compatible = "ldo0"; regulator-name = "vdd_ldo0,vddio_pex_clk"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo1 { + regulator@5 { + reg = <5>; + regulator-compatible = "ldo1"; regulator-name = "vdd_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - ldo2 { + regulator@6 { + reg = <6>; + regulator-compatible = "ldo2"; regulator-name = "vdd_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo3 { + regulator@7 { + reg = <7>; + regulator-compatible = "ldo3"; regulator-name = "vdd_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo4 { + regulator@8 { + reg = <8>; + regulator-compatible = "ldo4"; regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo5 { + regulator@9 { + reg = <9>; + regulator-compatible = "ldo5"; regulator-name = "vdd_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - ldo6 { + regulator@10 { + reg = <10>; + regulator-compatible = "ldo6"; regulator-name = "vdd_ldo6,avdd_vdac"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo7 { + regulator@11 { + reg = <11>; + regulator-compatible = "ldo7"; regulator-name = "vdd_ldo7,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo8 { + regulator@12 { + reg = <12>; + regulator-compatible = "ldo8"; regulator-name = "vdd_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo9 { + regulator@13 { + reg = <13>; + regulator-compatible = "ldo9"; regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - ldo_rtc { + regulator@14 { + reg = <14>; + regulator-compatible = "ldo_rtc"; regulator-name = "vdd_rtc_out,vdd_cell"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/trunk/arch/arm/boot/dts/tegra20-paz00.dts b/trunk/arch/arm/boot/dts/tegra20-paz00.dts index 6a93d1404c76..ddf287f52d49 100644 --- a/trunk/arch/arm/boot/dts/tegra20-paz00.dts +++ b/trunk/arch/arm/boot/dts/tegra20-paz00.dts @@ -291,26 +291,37 @@ vinldo9-supply = <&sm2_reg>; regulators { - sys_reg: sys { + #address-cells = <1>; + #size-cells = <0>; + + sys_reg: regulator@0 { + reg = <0>; + regulator-compatible = "sys"; regulator-name = "vdd_sys"; regulator-always-on; }; - sm0 { + regulator@1 { + reg = <1>; + regulator-compatible = "sm0"; regulator-name = "+1.2vs_sm0,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - sm1 { + regulator@2 { + reg = <2>; + regulator-compatible = "sm1"; regulator-name = "+1.0vs_sm1,vdd_cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sm2_reg: sm2 { + sm2_reg: regulator@3 { + reg = <3>; + regulator-compatible = "sm2"; regulator-name = "+3.7vs_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; @@ -319,41 +330,53 @@ /* LDO0 is not connected to anything */ - ldo1 { + regulator@5 { + reg = <5>; + regulator-compatible = "ldo1"; regulator-name = "+1.1vs_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - ldo2 { + regulator@6 { + reg = <6>; + regulator-compatible = "ldo2"; regulator-name = "+1.2vs_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo3 { + regulator@7 { + reg = <7>; + regulator-compatible = "ldo3"; regulator-name = "+3.3vs_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo4 { + regulator@8 { + reg = <8>; + regulator-compatible = "ldo4"; regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo5 { + regulator@9 { + reg = <9>; + regulator-compatible = "ldo5"; regulator-name = "+2.85vs_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - ldo6 { + regulator@10 { + reg = <10>; + regulator-compatible = "ldo6"; /* * Research indicates this should be * 1.8v; other boards that use this @@ -367,26 +390,34 @@ regulator-max-microvolt = <1800000>; }; - ldo7 { + regulator@11 { + reg = <11>; + regulator-compatible = "ldo7"; regulator-name = "+3.3vs_ldo7,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo8 { + regulator@12 { + reg = <12>; + regulator-compatible = "ldo8"; regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo9 { + regulator@13 { + reg = <13>; + regulator-compatible = "ldo9"; regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - ldo_rtc { + regulator@14 { + reg = <14>; + regulator-compatible = "ldo_rtc"; regulator-name = "+3.3vs_rtc"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts b/trunk/arch/arm/boot/dts/tegra20-seaboard.dts index 33ae81358d8e..f0ba901676ac 100644 --- a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/trunk/arch/arm/boot/dts/tegra20-seaboard.dts @@ -395,26 +395,37 @@ vinldo9-supply = <&sm2_reg>; regulators { - sys_reg: sys { + #address-cells = <1>; + #size-cells = <0>; + + sys_reg: regulator@0 { + reg = <0>; + regulator-compatible = "sys"; regulator-name = "vdd_sys"; regulator-always-on; }; - sm0 { + regulator@1 { + reg = <1>; + regulator-compatible = "sm0"; regulator-name = "vdd_sm0,vdd_core"; regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1300000>; regulator-always-on; }; - sm1 { + regulator@2 { + reg = <2>; + regulator-compatible = "sm1"; regulator-name = "vdd_sm1,vdd_cpu"; regulator-min-microvolt = <1125000>; regulator-max-microvolt = <1125000>; regulator-always-on; }; - sm2_reg: sm2 { + sm2_reg: regulator@3 { + reg = <3>; + regulator-compatible = "sm2"; regulator-name = "vdd_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; @@ -423,66 +434,86 @@ /* LDO0 is not connected to anything */ - ldo1 { + regulator@5 { + reg = <5>; + regulator-compatible = "ldo1"; regulator-name = "vdd_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - ldo2 { + regulator@6 { + reg = <6>; + regulator-compatible = "ldo2"; regulator-name = "vdd_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo3 { + regulator@7 { + reg = <7>; + regulator-compatible = "ldo3"; regulator-name = "vdd_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo4 { + regulator@8 { + reg = <8>; + regulator-compatible = "ldo4"; regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo5 { + regulator@9 { + reg = <9>; + regulator-compatible = "ldo5"; regulator-name = "vdd_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - ldo6 { + regulator@10 { + reg = <10>; + regulator-compatible = "ldo6"; regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo7 { + regulator@11 { + reg = <11>; + regulator-compatible = "ldo7"; regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo8 { + regulator@12 { + reg = <12>; + regulator-compatible = "ldo8"; regulator-name = "vdd_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo9 { + regulator@13 { + reg = <13>; + regulator-compatible = "ldo9"; regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - ldo_rtc { + regulator@14 { + reg = <14>; + regulator-compatible = "ldo_rtc"; regulator-name = "vdd_rtc_out,vdd_cell"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/trunk/arch/arm/boot/dts/tegra20-tamonten.dtsi b/trunk/arch/arm/boot/dts/tegra20-tamonten.dtsi index 5b3d8b157b33..f18cec9f6a77 100644 --- a/trunk/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/trunk/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -271,72 +271,97 @@ vinldo9-supply = <&sm2_reg>; regulators { - sys_reg: sys { + #address-cells = <1>; + #size-cells = <0>; + + sys_reg: regulator@0 { + reg = <0>; + regulator-compatible = "sys"; regulator-name = "vdd_sys"; regulator-always-on; }; - sm0 { + regulator@1 { + reg = <1>; + regulator-compatible = "sm0"; regulator-name = "vdd_sys_sm0,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - sm1 { + regulator@2 { + reg = <2>; + regulator-compatible = "sm1"; regulator-name = "vdd_sys_sm1,vdd_cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sm2_reg: sm2 { + sm2_reg: regulator@3 { + reg = <3>; + regulator-compatible = "sm2"; regulator-name = "vdd_sys_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; regulator-always-on; }; - ldo0 { + regulator@4 { + reg = <4>; + regulator-compatible = "ldo0"; regulator-name = "vdd_ldo0,vddio_pex_clk"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo1 { + regulator@5 { + reg = <5>; + regulator-compatible = "ldo1"; regulator-name = "vdd_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - ldo2 { + regulator@6 { + reg = <6>; + regulator-compatible = "ldo2"; regulator-name = "vdd_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo3 { + regulator@7 { + reg = <7>; + regulator-compatible = "ldo3"; regulator-name = "vdd_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo4 { + regulator@8 { + reg = <8>; + regulator-compatible = "ldo4"; regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo5 { + regulator@9 { + reg = <9>; + regulator-compatible = "ldo5"; regulator-name = "vdd_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; }; - ldo6 { + regulator@10 { + reg = <10>; + regulator-compatible = "ldo6"; regulator-name = "vdd_ldo6,avdd_vdac"; /* * According to the Tegra 2 Automotive @@ -348,19 +373,25 @@ regulator-max-microvolt = <2850000>; }; - ldo7 { + regulator@11 { + reg = <11>; + regulator-compatible = "ldo7"; regulator-name = "vdd_ldo7,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo8 { + regulator@12 { + reg = <12>; + regulator-compatible = "ldo8"; regulator-name = "vdd_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo9 { + regulator@13 { + reg = <13>; + regulator-compatible = "ldo9"; regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; /* * According to the Tegra 2 Automotive @@ -373,7 +404,9 @@ regulator-always-on; }; - ldo_rtc { + regulator@14 { + reg = <14>; + regulator-compatible = "ldo_rtc"; regulator-name = "vdd_rtc_out"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/trunk/arch/arm/boot/dts/tegra20-ventana.dts b/trunk/arch/arm/boot/dts/tegra20-ventana.dts index 86854f1abd58..3e5952fcfbc5 100644 --- a/trunk/arch/arm/boot/dts/tegra20-ventana.dts +++ b/trunk/arch/arm/boot/dts/tegra20-ventana.dts @@ -311,26 +311,37 @@ vinldo9-supply = <&sm2_reg>; regulators { - sys_reg: sys { + #address-cells = <1>; + #size-cells = <0>; + + sys_reg: regulator@0 { + reg = <0>; + regulator-compatible = "sys"; regulator-name = "vdd_sys"; regulator-always-on; }; - sm0 { + regulator@1 { + reg = <1>; + regulator-compatible = "sm0"; regulator-name = "vdd_sm0,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - sm1 { + regulator@2 { + reg = <2>; + regulator-compatible = "sm1"; regulator-name = "vdd_sm1,vdd_cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sm2_reg: sm2 { + sm2_reg: regulator@3 { + reg = <3>; + regulator-compatible = "sm2"; regulator-name = "vdd_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; @@ -339,66 +350,86 @@ /* LDO0 is not connected to anything */ - ldo1 { + regulator@5 { + reg = <5>; + regulator-compatible = "ldo1"; regulator-name = "vdd_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - ldo2 { + regulator@6 { + reg = <6>; + regulator-compatible = "ldo2"; regulator-name = "vdd_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo3 { + regulator@7 { + reg = <7>; + regulator-compatible = "ldo3"; regulator-name = "vdd_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo4 { + regulator@8 { + reg = <8>; + regulator-compatible = "ldo4"; regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo5 { + regulator@9 { + reg = <9>; + regulator-compatible = "ldo5"; regulator-name = "vdd_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - ldo6 { + regulator@10 { + reg = <10>; + regulator-compatible = "ldo6"; regulator-name = "vdd_ldo6,avdd_vdac"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo7 { + regulator@11 { + reg = <11>; + regulator-compatible = "ldo7"; regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo8 { + regulator@12 { + reg = <12>; + regulator-compatible = "ldo8"; regulator-name = "vdd_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo9 { + regulator@13 { + reg = <13>; + regulator-compatible = "ldo9"; regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - ldo_rtc { + regulator@14 { + reg = <14>; + regulator-compatible = "ldo_rtc"; regulator-name = "vdd_rtc_out,vdd_cell"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/trunk/arch/arm/boot/dts/tegra20-whistler.dts b/trunk/arch/arm/boot/dts/tegra20-whistler.dts index 94a71c91beb5..c636d002d6d8 100644 --- a/trunk/arch/arm/boot/dts/tegra20-whistler.dts +++ b/trunk/arch/arm/boot/dts/tegra20-whistler.dts @@ -295,182 +295,243 @@ in20-supply = <&mbatt_reg>; regulators { - mbatt_reg: mbatt { + #address-cells = <1>; + #size-cells = <0>; + + mbatt_reg: regulator@0 { + reg = <0>; + regulator-compatible = "mbatt"; regulator-name = "vbat_pmu"; regulator-always-on; }; - sd1 { + regulator@1 { + reg = <1>; + regulator-compatible = "sd1"; regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sd2 { + regulator@2 { + reg = <2>; + regulator-compatible = "sd2"; regulator-name = "nvvdd_sv2,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - nvvdd_sv3_reg: sd3 { + nvvdd_sv3_reg: regulator@3 { + reg = <3>; + regulator-compatible = "sd3"; regulator-name = "nvvdd_sv3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo1 { + regulator@4 { + reg = <4>; + regulator-compatible = "ldo1"; regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo2 { + regulator@5 { + reg = <5>; + regulator-compatible = "ldo2"; regulator-name = "nvvdd_ldo2,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - ldo3 { + regulator@6 { + reg = <6>; + regulator-compatible = "ldo3"; regulator-name = "nvvdd_ldo3,vcom_1v8b"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo4 { + regulator@7 { + reg = <7>; + regulator-compatible = "ldo4"; regulator-name = "nvvdd_ldo4,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo5 { + regulator@8 { + reg = <8>; + regulator-compatible = "ldo5"; regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; }; - ldo6 { + regulator@9 { + reg = <9>; + regulator-compatible = "ldo6"; regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo7 { + regulator@10 { + reg = <10>; + regulator-compatible = "ldo7"; regulator-name = "nvvdd_ldo7,avddio_audio"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; }; - ldo8 { + regulator@11 { + reg = <11>; + regulator-compatible = "ldo8"; regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; }; - ldo9 { + regulator@12 { + reg = <12>; + regulator-compatible = "ldo9"; regulator-name = "nvvdd_ldo9,avdd_cam*"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; - ldo10 { + regulator@13 { + reg = <13>; + regulator-compatible = "ldo10"; regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-always-on; }; - ldo11 { + regulator@14 { + reg = <14>; + regulator-compatible = "ldo11"; regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo12 { + regulator@15 { + reg = <15>; + regulator-compatible = "ldo12"; regulator-name = "nvvdd_ldo12,vddio_sdio"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; }; - ldo13 { + regulator@16 { + reg = <16>; + regulator-compatible = "ldo13"; regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; - ldo14 { + regulator@17 { + reg = <17>; + regulator-compatible = "ldo14"; regulator-name = "nvvdd_ldo14,avdd_vdac"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; - ldo15 { + regulator@18 { + reg = <18>; + regulator-compatible = "ldo15"; regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo16 { + regulator@19 { + reg = <19>; + regulator-compatible = "ldo16"; regulator-name = "nvvdd_ldo16,vdd_dbrtr"; regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1300000>; }; - ldo17 { + regulator@20 { + reg = <20>; + regulator-compatible = "ldo17"; regulator-name = "nvvdd_ldo17,vddio_mipi"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo18 { + regulator@21 { + reg = <21>; + regulator-compatible = "ldo18"; regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - ldo19 { + regulator@22 { + reg = <22>; + regulator-compatible = "ldo19"; regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; - ldo20 { + regulator@23 { + reg = <23>; + regulator-compatible = "ldo20"; regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - out5v { + regulator@24 { + reg = <24>; + regulator-compatible = "out5v"; regulator-name = "usb0_vbus_reg"; }; - out33v { + regulator@25 { + reg = <25>; + regulator-compatible = "out33v"; regulator-name = "pmu_out3v3"; }; - bbat { + regulator@26 { + reg = <26>; + regulator-compatible = "bbat"; regulator-name = "pmu_bbat"; regulator-min-microvolt = <2400000>; regulator-max-microvolt = <2400000>; regulator-always-on; }; - sdby { + regulator@27 { + reg = <27>; + regulator-compatible = "sdby"; regulator-name = "vdd_aon"; regulator-always-on; }; - vrtc { + regulator@28 { + reg = <28>; + regulator-compatible = "vrtc"; regulator-name = "vrtc,pmu_vccadc"; regulator-always-on; }; diff --git a/trunk/arch/arm/boot/dts/tegra20.dtsi b/trunk/arch/arm/boot/dts/tegra20.dtsi index f40cfbaa7c7e..f3a09d0d45bc 100644 --- a/trunk/arch/arm/boot/dts/tegra20.dtsi +++ b/trunk/arch/arm/boot/dts/tegra20.dtsi @@ -4,15 +4,6 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&intc>; - cache-controller@50043000 { - compatible = "arm,pl310-cache"; - reg = <0x50043000 0x1000>; - arm,data-latency = <5 5 2>; - arm,tag-latency = <4 4 2>; - cache-unified; - cache-level = <2>; - }; - intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; reg = <0x50041000 0x1000 diff --git a/trunk/arch/arm/boot/dts/tegra30-cardhu.dtsi b/trunk/arch/arm/boot/dts/tegra30-cardhu.dtsi index b1271a894327..d10c9c5a3606 100644 --- a/trunk/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/trunk/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -171,41 +171,56 @@ vccio-supply = <&vdd_ac_bat_reg>; regulators { - vdd1_reg: vdd1 { + #address-cells = <1>; + #size-cells = <0>; + + vdd1_reg: regulator@0 { + reg = <0>; + regulator-compatible = "vdd1"; regulator-name = "vddio_ddr_1v2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - vdd2_reg: vdd2 { + vdd2_reg: regulator@1 { + reg = <1>; + regulator-compatible = "vdd2"; regulator-name = "vdd_1v5_gen"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-always-on; }; - vddctrl_reg: vddctrl { + vddctrl_reg: regulator@2 { + reg = <2>; + regulator-compatible = "vddctrl"; regulator-name = "vdd_cpu,vdd_sys"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - vio_reg: vio { + vio_reg: regulator@3 { + reg = <3>; + regulator-compatible = "vio"; regulator-name = "vdd_1v8_gen"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo1_reg: ldo1 { + ldo1_reg: regulator@4 { + reg = <4>; + regulator-compatible = "ldo1"; regulator-name = "vdd_pexa,vdd_pexb"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; }; - ldo2_reg: ldo2 { + ldo2_reg: regulator@5 { + reg = <5>; + regulator-compatible = "ldo2"; regulator-name = "vdd_sata,avdd_plle"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; @@ -213,34 +228,44 @@ /* LDO3 is not connected to anything */ - ldo4_reg: ldo4 { + ldo4_reg: regulator@7 { + reg = <7>; + regulator-compatible = "ldo4"; regulator-name = "vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - ldo5_reg: ldo5 { + ldo5_reg: regulator@8 { + reg = <8>; + regulator-compatible = "ldo5"; regulator-name = "vddio_sdmmc,avdd_vdac"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo6_reg: ldo6 { + ldo6_reg: regulator@9 { + reg = <9>; + regulator-compatible = "ldo6"; regulator-name = "avdd_dsi_csi,pwrdet_mipi"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo7_reg: ldo7 { + ldo7_reg: regulator@10 { + reg = <10>; + regulator-compatible = "ldo7"; regulator-name = "vdd_pllm,x,u,a_p_c_s"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - ldo8_reg: ldo8 { + ldo8_reg: regulator@11 { + reg = <11>; + regulator-compatible = "ldo8"; regulator-name = "vdd_ddr_hs"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; diff --git a/trunk/arch/arm/boot/dts/tegra30.dtsi b/trunk/arch/arm/boot/dts/tegra30.dtsi index fed8dca1692d..b1497c7d7d68 100644 --- a/trunk/arch/arm/boot/dts/tegra30.dtsi +++ b/trunk/arch/arm/boot/dts/tegra30.dtsi @@ -4,15 +4,6 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&intc>; - cache-controller@50043000 { - compatible = "arm,pl310-cache"; - reg = <0x50043000 0x1000>; - arm,data-latency = <6 6 2>; - arm,tag-latency = <5 5 2>; - cache-unified; - cache-level = <2>; - }; - intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; reg = <0x50041000 0x1000 @@ -82,8 +73,8 @@ pinmux: pinmux { compatible = "nvidia,tegra30-pinmux"; - reg = <0x70000868 0xd4 /* Pad control registers */ - 0x70003000 0x3e4>; /* Mux registers */ + reg = <0x70000868 0xd0 /* Pad control registers */ + 0x70003000 0x3e0>; /* Mux registers */ }; serial@70006000 { diff --git a/trunk/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/trunk/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index ac870fb3fa0d..d8a827bd2bf3 100644 --- a/trunk/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/trunk/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -17,16 +17,17 @@ * CHANGES TO vexpress-v2m.dtsi! */ +/ { + aliases { + arm,v2m_timer = &v2m_timer01; + }; + motherboard { - model = "V2M-P1"; - arm,hbi = <0x190>; - arm,vexpress,site = <0>; + compatible = "simple-bus"; arm,v2m-memory-map = "rs1"; - compatible = "arm,vexpress,v2m-p1", "simple-bus"; #address-cells = <2>; /* SMB chipselect number and offset */ #size-cells = <1>; #interrupt-cells = <1>; - ranges; flash@0,00000000 { compatible = "arm,vexpress-flash", "cfi-flash"; @@ -71,20 +72,14 @@ #size-cells = <1>; ranges = <0 3 0 0x200000>; - v2m_sysreg: sysreg@010000 { + sysreg@010000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; - gpio-controller; - #gpio-cells = <2>; }; - v2m_sysctl: sysctl@020000 { + sysctl@020000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x020000 0x1000>; - clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; - clock-names = "refclk", "timclk", "apb_pclk"; - #clock-cells = <1>; - clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; }; /* PCI-E I2C bus */ @@ -105,92 +100,66 @@ compatible = "arm,pl041", "arm,primecell"; reg = <0x040000 0x1000>; interrupts = <11>; - clocks = <&smbclk>; - clock-names = "apb_pclk"; }; mmci@050000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x050000 0x1000>; interrupts = <9 10>; - cd-gpios = <&v2m_sysreg 0 0>; - wp-gpios = <&v2m_sysreg 1 0>; - max-frequency = <12000000>; - vmmc-supply = <&v2m_fixed_3v3>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "mclk", "apb_pclk"; }; kmi@060000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x060000 0x1000>; interrupts = <12>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "KMIREFCLK", "apb_pclk"; }; kmi@070000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x070000 0x1000>; interrupts = <13>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "KMIREFCLK", "apb_pclk"; }; v2m_serial0: uart@090000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <5>; - clocks = <&v2m_oscclk2>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; }; v2m_serial1: uart@0a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <6>; - clocks = <&v2m_oscclk2>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; }; v2m_serial2: uart@0b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <7>; - clocks = <&v2m_oscclk2>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; }; v2m_serial3: uart@0c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <8>; - clocks = <&v2m_oscclk2>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; }; wdt@0f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; interrupts = <0>; - clocks = <&v2m_refclk32khz>, <&smbclk>; - clock-names = "wdogclk", "apb_pclk"; }; v2m_timer01: timer@110000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x110000 0x1000>; interrupts = <2>; - clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>; - clock-names = "timclken1", "timclken2", "apb_pclk"; }; v2m_timer23: timer@120000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x120000 0x1000>; interrupts = <3>; - clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>; - clock-names = "timclken1", "timclken2", "apb_pclk"; }; /* DVI I2C bus */ @@ -216,8 +185,6 @@ compatible = "arm,pl031", "arm,primecell"; reg = <0x170000 0x1000>; interrupts = <4>; - clocks = <&smbclk>; - clock-names = "apb_pclk"; }; compact-flash@1a0000 { @@ -231,8 +198,6 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x1f0000 0x1000>; interrupts = <14>; - clocks = <&v2m_oscclk1>, <&smbclk>; - clock-names = "clcdclk", "apb_pclk"; }; }; @@ -243,98 +208,5 @@ regulator-max-microvolt = <3300000>; regulator-always-on; }; - - v2m_clk24mhz: clk24mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "v2m:clk24mhz"; - }; - - v2m_refclk1mhz: refclk1mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1000000>; - clock-output-names = "v2m:refclk1mhz"; - }; - - v2m_refclk32khz: refclk32khz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "v2m:refclk32khz"; - }; - - mcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* MCC static memory clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <25000000 60000000>; - #clock-cells = <0>; - clock-output-names = "v2m:oscclk0"; - }; - - v2m_oscclk1: osc@1 { - /* CLCD clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <23750000 63500000>; - #clock-cells = <0>; - clock-output-names = "v2m:oscclk1"; - }; - - v2m_oscclk2: osc@2 { - /* IO FPGA peripheral clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <24000000 24000000>; - #clock-cells = <0>; - clock-output-names = "v2m:oscclk2"; - }; - - volt@0 { - /* Logic level voltage */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 0>; - regulator-name = "VIO"; - regulator-always-on; - label = "VIO"; - }; - - temp@0 { - /* MCC internal operating temperature */ - compatible = "arm,vexpress-temp"; - arm,vexpress-sysreg,func = <4 0>; - label = "MCC"; - }; - - reset@0 { - compatible = "arm,vexpress-reset"; - arm,vexpress-sysreg,func = <5 0>; - }; - - muxfpga@0 { - compatible = "arm,vexpress-muxfpga"; - arm,vexpress-sysreg,func = <7 0>; - }; - - shutdown@0 { - compatible = "arm,vexpress-shutdown"; - arm,vexpress-sysreg,func = <8 0>; - }; - - reboot@0 { - compatible = "arm,vexpress-reboot"; - arm,vexpress-sysreg,func = <9 0>; - }; - - dvimode@0 { - compatible = "arm,vexpress-dvimode"; - arm,vexpress-sysreg,func = <11 0>; - }; - }; }; +}; diff --git a/trunk/arch/arm/boot/dts/vexpress-v2m.dtsi b/trunk/arch/arm/boot/dts/vexpress-v2m.dtsi index f1420368355b..dba53fd026bb 100644 --- a/trunk/arch/arm/boot/dts/vexpress-v2m.dtsi +++ b/trunk/arch/arm/boot/dts/vexpress-v2m.dtsi @@ -17,15 +17,16 @@ * CHANGES TO vexpress-v2m-rs1.dtsi! */ +/ { + aliases { + arm,v2m_timer = &v2m_timer01; + }; + motherboard { - model = "V2M-P1"; - arm,hbi = <0x190>; - arm,vexpress,site = <0>; - compatible = "arm,vexpress,v2m-p1", "simple-bus"; + compatible = "simple-bus"; #address-cells = <2>; /* SMB chipselect number and offset */ #size-cells = <1>; #interrupt-cells = <1>; - ranges; flash@0,00000000 { compatible = "arm,vexpress-flash", "cfi-flash"; @@ -70,20 +71,14 @@ #size-cells = <1>; ranges = <0 7 0 0x20000>; - v2m_sysreg: sysreg@00000 { + sysreg@00000 { compatible = "arm,vexpress-sysreg"; reg = <0x00000 0x1000>; - gpio-controller; - #gpio-cells = <2>; }; - v2m_sysctl: sysctl@01000 { + sysctl@01000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x01000 0x1000>; - clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; - clock-names = "refclk", "timclk", "apb_pclk"; - #clock-cells = <1>; - clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; }; /* PCI-E I2C bus */ @@ -104,92 +99,66 @@ compatible = "arm,pl041", "arm,primecell"; reg = <0x04000 0x1000>; interrupts = <11>; - clocks = <&smbclk>; - clock-names = "apb_pclk"; }; mmci@05000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x05000 0x1000>; interrupts = <9 10>; - cd-gpios = <&v2m_sysreg 0 0>; - wp-gpios = <&v2m_sysreg 1 0>; - max-frequency = <12000000>; - vmmc-supply = <&v2m_fixed_3v3>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "mclk", "apb_pclk"; }; kmi@06000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x06000 0x1000>; interrupts = <12>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "KMIREFCLK", "apb_pclk"; }; kmi@07000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x07000 0x1000>; interrupts = <13>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "KMIREFCLK", "apb_pclk"; }; v2m_serial0: uart@09000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x09000 0x1000>; interrupts = <5>; - clocks = <&v2m_oscclk2>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; }; v2m_serial1: uart@0a000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a000 0x1000>; interrupts = <6>; - clocks = <&v2m_oscclk2>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; }; v2m_serial2: uart@0b000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b000 0x1000>; interrupts = <7>; - clocks = <&v2m_oscclk2>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; }; v2m_serial3: uart@0c000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c000 0x1000>; interrupts = <8>; - clocks = <&v2m_oscclk2>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; }; wdt@0f000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f000 0x1000>; interrupts = <0>; - clocks = <&v2m_refclk32khz>, <&smbclk>; - clock-names = "wdogclk", "apb_pclk"; }; v2m_timer01: timer@11000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x11000 0x1000>; interrupts = <2>; - clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>; - clock-names = "timclken1", "timclken2", "apb_pclk"; }; v2m_timer23: timer@12000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x12000 0x1000>; interrupts = <3>; - clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>; - clock-names = "timclken1", "timclken2", "apb_pclk"; }; /* DVI I2C bus */ @@ -215,8 +184,6 @@ compatible = "arm,pl031", "arm,primecell"; reg = <0x17000 0x1000>; interrupts = <4>; - clocks = <&smbclk>; - clock-names = "apb_pclk"; }; compact-flash@1a000 { @@ -230,8 +197,6 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x1f000 0x1000>; interrupts = <14>; - clocks = <&v2m_oscclk1>, <&smbclk>; - clock-names = "clcdclk", "apb_pclk"; }; }; @@ -242,98 +207,5 @@ regulator-max-microvolt = <3300000>; regulator-always-on; }; - - v2m_clk24mhz: clk24mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "v2m:clk24mhz"; - }; - - v2m_refclk1mhz: refclk1mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1000000>; - clock-output-names = "v2m:refclk1mhz"; - }; - - v2m_refclk32khz: refclk32khz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "v2m:refclk32khz"; - }; - - mcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* MCC static memory clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <25000000 60000000>; - #clock-cells = <0>; - clock-output-names = "v2m:oscclk0"; - }; - - v2m_oscclk1: osc@1 { - /* CLCD clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <23750000 63500000>; - #clock-cells = <0>; - clock-output-names = "v2m:oscclk1"; - }; - - v2m_oscclk2: osc@2 { - /* IO FPGA peripheral clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <24000000 24000000>; - #clock-cells = <0>; - clock-output-names = "v2m:oscclk2"; - }; - - volt@0 { - /* Logic level voltage */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 0>; - regulator-name = "VIO"; - regulator-always-on; - label = "VIO"; - }; - - temp@0 { - /* MCC internal operating temperature */ - compatible = "arm,vexpress-temp"; - arm,vexpress-sysreg,func = <4 0>; - label = "MCC"; - }; - - reset@0 { - compatible = "arm,vexpress-reset"; - arm,vexpress-sysreg,func = <5 0>; - }; - - muxfpga@0 { - compatible = "arm,vexpress-muxfpga"; - arm,vexpress-sysreg,func = <7 0>; - }; - - shutdown@0 { - compatible = "arm,vexpress-shutdown"; - arm,vexpress-sysreg,func = <8 0>; - }; - - reboot@0 { - compatible = "arm,vexpress-reboot"; - arm,vexpress-sysreg,func = <9 0>; - }; - - dvimode@0 { - compatible = "arm,vexpress-dvimode"; - arm,vexpress-sysreg,func = <11 0>; - }; - }; }; +}; diff --git a/trunk/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/trunk/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index a3d37ec2655d..d12b34ca0568 100644 --- a/trunk/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/trunk/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -12,7 +12,6 @@ / { model = "V2P-CA15"; arm,hbi = <0x237>; - arm,vexpress,site = <0xf>; compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <2>; @@ -55,24 +54,17 @@ compatible = "arm,hdlcd"; reg = <0 0x2b000000 0 0x1000>; interrupts = <0 85 4>; - clocks = <&oscclk5>; - clock-names = "pxlclk"; }; memory-controller@2b0a0000 { compatible = "arm,pl341", "arm,primecell"; reg = <0 0x2b0a0000 0 0x1000>; - clocks = <&oscclk7>; - clock-names = "apb_pclk"; }; wdt@2b060000 { compatible = "arm,sp805", "arm,primecell"; - status = "disabled"; reg = <0 0x2b060000 0 0x1000>; interrupts = <98>; - clocks = <&oscclk7>; - clock-names = "apb_pclk"; }; gic: interrupt-controller@2c001000 { @@ -92,8 +84,6 @@ reg = <0 0x7ffd0000 0 0x1000>; interrupts = <0 86 4>, <0 87 4>; - clocks = <&oscclk7>; - clock-names = "apb_pclk"; }; dma@7ffb0000 { @@ -104,8 +94,6 @@ <0 89 4>, <0 90 4>, <0 91 4>; - clocks = <&oscclk7>; - clock-names = "apb_pclk"; }; timer { @@ -122,109 +110,7 @@ <0 69 4>; }; - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* CPU PLL reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <50000000 60000000>; - #clock-cells = <0>; - clock-output-names = "oscclk0"; - }; - - osc@4 { - /* Multiplexed AXI master clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 4>; - freq-range = <20000000 40000000>; - #clock-cells = <0>; - clock-output-names = "oscclk4"; - }; - - oscclk5: osc@5 { - /* HDLCD PLL reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 5>; - freq-range = <23750000 165000000>; - #clock-cells = <0>; - clock-output-names = "oscclk5"; - }; - - smbclk: osc@6 { - /* SMB clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 6>; - freq-range = <20000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk6"; - }; - - oscclk7: osc@7 { - /* SYS PLL reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 7>; - freq-range = <20000000 60000000>; - #clock-cells = <0>; - clock-output-names = "oscclk7"; - }; - - osc@8 { - /* DDR2 PLL reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 8>; - freq-range = <40000000 40000000>; - #clock-cells = <0>; - clock-output-names = "oscclk8"; - }; - - volt@0 { - /* CPU core voltage */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 0>; - regulator-name = "Cores"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1050000>; - regulator-always-on; - label = "Cores"; - }; - - amp@0 { - /* Total current for the two cores */ - compatible = "arm,vexpress-amp"; - arm,vexpress-sysreg,func = <3 0>; - label = "Cores"; - }; - - temp@0 { - /* DCC internal temperature */ - compatible = "arm,vexpress-temp"; - arm,vexpress-sysreg,func = <4 0>; - label = "DCC"; - }; - - power@0 { - /* Total power */ - compatible = "arm,vexpress-power"; - arm,vexpress-sysreg,func = <12 0>; - label = "Cores"; - }; - - energy@0 { - /* Total energy */ - compatible = "arm,vexpress-energy"; - arm,vexpress-sysreg,func = <13 0>; - label = "Cores"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; + motherboard { ranges = <0 0 0 0x08000000 0x04000000>, <1 0 0 0x14000000 0x04000000>, <2 0 0 0x18000000 0x04000000>, @@ -232,7 +118,6 @@ <4 0 0 0x0c000000 0x04000000>, <5 0 0 0x10000000 0x04000000>; - #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, @@ -277,7 +162,7 @@ <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, <0 0 42 &gic 0 42 4>; - - /include/ "vexpress-v2m-rs1.dtsi" }; }; + +/include/ "vexpress-v2m-rs1.dtsi" diff --git a/trunk/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/trunk/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index 1fc405a9ecfb..4890a81c5467 100644 --- a/trunk/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/trunk/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -12,7 +12,6 @@ / { model = "V2P-CA15_CA7"; arm,hbi = <0x249>; - arm,vexpress,site = <0xf>; compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <2>; @@ -75,23 +74,17 @@ compatible = "arm,sp805", "arm,primecell"; reg = <0 0x2a490000 0 0x1000>; interrupts = <98>; - clocks = <&oscclk6a>, <&oscclk6a>; - clock-names = "wdogclk", "apb_pclk"; }; hdlcd@2b000000 { compatible = "arm,hdlcd"; reg = <0 0x2b000000 0 0x1000>; interrupts = <0 85 4>; - clocks = <&oscclk5>; - clock-names = "pxlclk"; }; memory-controller@2b0a0000 { compatible = "arm,pl341", "arm,primecell"; reg = <0 0x2b0a0000 0 0x1000>; - clocks = <&oscclk6a>; - clock-names = "apb_pclk"; }; gic: interrupt-controller@2c001000 { @@ -111,8 +104,6 @@ reg = <0 0x7ffd0000 0 0x1000>; interrupts = <0 86 4>, <0 87 4>; - clocks = <&oscclk6a>; - clock-names = "apb_pclk"; }; dma@7ff00000 { @@ -123,8 +114,6 @@ <0 89 4>, <0 90 4>, <0 91 4>; - clocks = <&oscclk6a>; - clock-names = "apb_pclk"; }; timer { @@ -141,175 +130,7 @@ <0 69 4>; }; - oscclk6a: oscclk6a { - /* Reference 24MHz clock */ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "oscclk6a"; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* A15 PLL 0 reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <17000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk0"; - }; - - osc@1 { - /* A15 PLL 1 reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <17000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk1"; - }; - - osc@2 { - /* A7 PLL 0 reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <17000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk2"; - }; - - osc@3 { - /* A7 PLL 1 reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 3>; - freq-range = <17000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk3"; - }; - - osc@4 { - /* External AXI master clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 4>; - freq-range = <20000000 40000000>; - #clock-cells = <0>; - clock-output-names = "oscclk4"; - }; - - oscclk5: osc@5 { - /* HDLCD PLL reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 5>; - freq-range = <23750000 165000000>; - #clock-cells = <0>; - clock-output-names = "oscclk5"; - }; - - smbclk: osc@6 { - /* Static memory controller clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 6>; - freq-range = <20000000 40000000>; - #clock-cells = <0>; - clock-output-names = "oscclk6"; - }; - - osc@7 { - /* SYS PLL reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 7>; - freq-range = <17000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk7"; - }; - - osc@8 { - /* DDR2 PLL reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 8>; - freq-range = <20000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk8"; - }; - - volt@0 { - /* A15 CPU core voltage */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 0>; - regulator-name = "A15 Vcore"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1050000>; - regulator-always-on; - label = "A15 Vcore"; - }; - - volt@1 { - /* A7 CPU core voltage */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 1>; - regulator-name = "A7 Vcore"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1050000>; - regulator-always-on; - label = "A7 Vcore"; - }; - - amp@0 { - /* Total current for the two A15 cores */ - compatible = "arm,vexpress-amp"; - arm,vexpress-sysreg,func = <3 0>; - label = "A15 Icore"; - }; - - amp@1 { - /* Total current for the three A7 cores */ - compatible = "arm,vexpress-amp"; - arm,vexpress-sysreg,func = <3 1>; - label = "A7 Icore"; - }; - - temp@0 { - /* DCC internal temperature */ - compatible = "arm,vexpress-temp"; - arm,vexpress-sysreg,func = <4 0>; - label = "DCC"; - }; - - power@0 { - /* Total power for the two A15 cores */ - compatible = "arm,vexpress-power"; - arm,vexpress-sysreg,func = <12 0>; - label = "A15 Pcore"; - }; - power@1 { - /* Total power for the three A7 cores */ - compatible = "arm,vexpress-power"; - arm,vexpress-sysreg,func = <12 1>; - label = "A7 Pcore"; - }; - - energy@0 { - /* Total energy for the two A15 cores */ - compatible = "arm,vexpress-energy"; - arm,vexpress-sysreg,func = <13 0>; - label = "A15 Jcore"; - }; - - energy@2 { - /* Total energy for the three A7 cores */ - compatible = "arm,vexpress-energy"; - arm,vexpress-sysreg,func = <13 2>; - label = "A7 Jcore"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; + motherboard { ranges = <0 0 0 0x08000000 0x04000000>, <1 0 0 0x14000000 0x04000000>, <2 0 0 0x18000000 0x04000000>, @@ -317,7 +138,6 @@ <4 0 0 0x0c000000 0x04000000>, <5 0 0 0x10000000 0x04000000>; - #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, @@ -362,7 +182,7 @@ <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, <0 0 42 &gic 0 42 4>; - - /include/ "vexpress-v2m-rs1.dtsi" }; }; + +/include/ "vexpress-v2m-rs1.dtsi" diff --git a/trunk/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/trunk/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index 6328cbc71d30..18917a0f8604 100644 --- a/trunk/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/trunk/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -12,7 +12,6 @@ / { model = "V2P-CA5s"; arm,hbi = <0x225>; - arm,vexpress,site = <0xf>; compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <1>; @@ -57,15 +56,11 @@ compatible = "arm,hdlcd"; reg = <0x2a110000 0x1000>; interrupts = <0 85 4>; - clocks = <&oscclk3>; - clock-names = "pxlclk"; }; memory-controller@2a150000 { compatible = "arm,pl341", "arm,primecell"; reg = <0x2a150000 0x1000>; - clocks = <&oscclk1>; - clock-names = "apb_pclk"; }; memory-controller@2a190000 { @@ -73,8 +68,6 @@ reg = <0x2a190000 0x1000>; interrupts = <0 86 4>, <0 87 4>; - clocks = <&oscclk1>; - clock-names = "apb_pclk"; }; scu@2c000000 { @@ -116,77 +109,7 @@ <0 69 4>; }; - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* CPU and internal AXI reference clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <50000000 100000000>; - #clock-cells = <0>; - clock-output-names = "oscclk0"; - }; - - oscclk1: osc@1 { - /* Multiplexed AXI master clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <5000000 50000000>; - #clock-cells = <0>; - clock-output-names = "oscclk1"; - }; - - osc@2 { - /* DDR2 */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <80000000 120000000>; - #clock-cells = <0>; - clock-output-names = "oscclk2"; - }; - - oscclk3: osc@3 { - /* HDLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 3>; - freq-range = <23750000 165000000>; - #clock-cells = <0>; - clock-output-names = "oscclk3"; - }; - - osc@4 { - /* Test chip gate configuration */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 4>; - freq-range = <80000000 80000000>; - #clock-cells = <0>; - clock-output-names = "oscclk4"; - }; - - smbclk: osc@5 { - /* SMB clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 5>; - freq-range = <25000000 60000000>; - #clock-cells = <0>; - clock-output-names = "oscclk5"; - }; - - temp@0 { - /* DCC internal operating temperature */ - compatible = "arm,vexpress-temp"; - arm,vexpress-sysreg,func = <4 0>; - label = "DCC"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; + motherboard { ranges = <0 0 0x08000000 0x04000000>, <1 0 0x14000000 0x04000000>, <2 0 0x18000000 0x04000000>, @@ -194,7 +117,6 @@ <4 0 0x0c000000 0x04000000>, <5 0 0x10000000 0x04000000>; - #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, @@ -239,7 +161,7 @@ <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, <0 0 42 &gic 0 42 4>; - - /include/ "vexpress-v2m-rs1.dtsi" }; }; + +/include/ "vexpress-v2m-rs1.dtsi" diff --git a/trunk/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/trunk/arch/arm/boot/dts/vexpress-v2p-ca9.dts index 1420bb14d95c..3f0c736d31d6 100644 --- a/trunk/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/trunk/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -12,7 +12,6 @@ / { model = "V2P-CA9"; arm,hbi = <0x191>; - arm,vexpress,site = <0xf>; compatible = "arm,vexpress,v2p-ca9", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <1>; @@ -71,15 +70,11 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x10020000 0x1000>; interrupts = <0 44 4>; - clocks = <&oscclk1>, <&oscclk2>; - clock-names = "clcdclk", "apb_pclk"; }; memory-controller@100e0000 { compatible = "arm,pl341", "arm,primecell"; reg = <0x100e0000 0x1000>; - clocks = <&oscclk2>; - clock-names = "apb_pclk"; }; memory-controller@100e1000 { @@ -87,8 +82,6 @@ reg = <0x100e1000 0x1000>; interrupts = <0 45 4>, <0 46 4>; - clocks = <&oscclk2>; - clock-names = "apb_pclk"; }; timer@100e4000 { @@ -96,16 +89,12 @@ reg = <0x100e4000 0x1000>; interrupts = <0 48 4>, <0 49 4>; - clocks = <&oscclk2>, <&oscclk2>; - clock-names = "timclk", "apb_pclk"; }; watchdog@100e5000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x100e5000 0x1000>; interrupts = <0 51 4>; - clocks = <&oscclk2>, <&oscclk2>; - clock-names = "wdogclk", "apb_pclk"; }; scu@1e000000 { @@ -151,132 +140,13 @@ <0 63 4>; }; - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* ACLK clock to the AXI master port on the test chip */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <30000000 50000000>; - #clock-cells = <0>; - clock-output-names = "extsaxiclk"; - }; - - oscclk1: osc@1 { - /* Reference clock for the CLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <10000000 80000000>; - #clock-cells = <0>; - clock-output-names = "clcdclk"; - }; - - smbclk: oscclk2: osc@2 { - /* Reference clock for the test chip internal PLLs */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <33000000 100000000>; - #clock-cells = <0>; - clock-output-names = "tcrefclk"; - }; - - volt@0 { - /* Test Chip internal logic voltage */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 0>; - regulator-name = "VD10"; - regulator-always-on; - label = "VD10"; - }; - - volt@1 { - /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 1>; - regulator-name = "VD10_S2"; - regulator-always-on; - label = "VD10_S2"; - }; - - volt@2 { - /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 2>; - regulator-name = "VD10_S3"; - regulator-always-on; - label = "VD10_S3"; - }; - - volt@3 { - /* DDR2 SDRAM and Test Chip DDR2 I/O supply */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 3>; - regulator-name = "VCC1V8"; - regulator-always-on; - label = "VCC1V8"; - }; - - volt@4 { - /* DDR2 SDRAM VTT termination voltage */ - compatible = "arm,vexpress-volt"; - arm,vexpress-sysreg,func = <2 4>; - regulator-name = "DDR2VTT"; - regulator-always-on; - label = "DDR2VTT"; - }; - - volt@5 { - /* Local board supply for miscellaneous logic external to the Test Chip */ - arm,vexpress-sysreg,func = <2 5>; - compatible = "arm,vexpress-volt"; - regulator-name = "VCC3V3"; - regulator-always-on; - label = "VCC3V3"; - }; - - amp@0 { - /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ - compatible = "arm,vexpress-amp"; - arm,vexpress-sysreg,func = <3 0>; - label = "VD10_S2"; - }; - - amp@1 { - /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ - compatible = "arm,vexpress-amp"; - arm,vexpress-sysreg,func = <3 1>; - label = "VD10_S3"; - }; - - power@0 { - /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ - compatible = "arm,vexpress-power"; - arm,vexpress-sysreg,func = <12 0>; - label = "PVD10_S2"; - }; - - power@1 { - /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ - compatible = "arm,vexpress-power"; - arm,vexpress-sysreg,func = <12 1>; - label = "PVD10_S3"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; + motherboard { ranges = <0 0 0x40000000 0x04000000>, <1 0 0x44000000 0x04000000>, <2 0 0x48000000 0x04000000>, <3 0 0x4c000000 0x04000000>, <7 0 0x10000000 0x00020000>; - #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, @@ -321,7 +191,7 @@ <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, <0 0 42 &gic 0 42 4>; - - /include/ "vexpress-v2m.dtsi" }; }; + +/include/ "vexpress-v2m.dtsi" diff --git a/trunk/arch/arm/configs/armadillo800eva_defconfig b/trunk/arch/arm/configs/armadillo800eva_defconfig index 3d764072dd54..f78d259f8d23 100644 --- a/trunk/arch/arm/configs/armadillo800eva_defconfig +++ b/trunk/arch/arm/configs/armadillo800eva_defconfig @@ -7,7 +7,6 @@ CONFIG_LOG_BUF_SHIFT=16 # CONFIG_IPC_NS is not set # CONFIG_PID_NS is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_PERF_EVENTS=y CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y diff --git a/trunk/arch/arm/configs/bcm2835_defconfig b/trunk/arch/arm/configs/bcm2835_defconfig index 74e27f0ff6ad..7aea70253c63 100644 --- a/trunk/arch/arm/configs/bcm2835_defconfig +++ b/trunk/arch/arm/configs/bcm2835_defconfig @@ -66,6 +66,8 @@ CONFIG_TTY_PRINTK=y # CONFIG_FILE_LOCKING is not set # CONFIG_DNOTIFY is not set # CONFIG_INOTIFY_USER is not set +# CONFIG_PROC_FS is not set +# CONFIG_SYSFS is not set # CONFIG_MISC_FILESYSTEMS is not set CONFIG_PRINTK_TIME=y # CONFIG_ENABLE_WARN_DEPRECATED is not set diff --git a/trunk/arch/arm/configs/bcm_defconfig b/trunk/arch/arm/configs/bcm_defconfig deleted file mode 100644 index e3bf2d65618e..000000000000 --- a/trunk/arch/arm/configs/bcm_defconfig +++ /dev/null @@ -1,114 +0,0 @@ -CONFIG_EXPERIMENTAL=y -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=19 -CONFIG_CGROUPS=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_CGROUP_SCHED=y -CONFIG_BLK_CGROUP=y -CONFIG_NAMESPACES=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_EMBEDDED=y -# CONFIG_COMPAT_BRK is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y -CONFIG_EFI_PARTITION=y -CONFIG_ARCH_BCM=y -CONFIG_ARM_THUMBEE=y -CONFIG_ARM_ERRATA_743622=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -# CONFIG_COMPACTION is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ARM_APPENDED_DTB=y -CONFIG_CMDLINE="console=ttyS0,115200n8 mem=128M" -CONFIG_CPU_IDLE=y -CONFIG_VFP=y -CONFIG_NEON=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_PM_RUNTIME=y -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_PROC_DEVICETREE=y -# CONFIG_BLK_DEV is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_JOYDEV=y -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_8250_RSA=y -CONFIG_SERIAL_8250_DW=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -# CONFIG_HWMON is not set -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_FB=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_USB_SUPPORT is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_CONFIGFS_FS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=110 -CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -CONFIG_DEBUG_INFO=y -# CONFIG_FTRACE is not set -CONFIG_DEBUG_LL=y -CONFIG_CRC_CCITT=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC7=y -CONFIG_XZ_DEC=y -CONFIG_AVERAGE=y diff --git a/trunk/arch/arm/configs/clps711x_defconfig b/trunk/arch/arm/configs/clps711x_defconfig deleted file mode 100644 index 1cd94c36321f..000000000000 --- a/trunk/arch/arm/configs/clps711x_defconfig +++ /dev/null @@ -1,90 +0,0 @@ -CONFIG_KERNEL_LZMA=y -CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_RD_LZMA=y -CONFIG_EMBEDDED=y -CONFIG_SLOB=y -CONFIG_JUMP_LABEL=y -# CONFIG_LBDAF is not set -CONFIG_PARTITION_ADVANCED=y -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_CLPS711X=y -CONFIG_ARCH_AUTCPU12=y -CONFIG_ARCH_CDB89712=y -CONFIG_ARCH_CLEP7312=y -CONFIG_ARCH_EDB7211=y -CONFIG_ARCH_P720T=y -CONFIG_ARCH_FORTUNET=y -CONFIG_AEABI=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -# CONFIG_COREDUMP is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_IPV6 is not set -CONFIG_IRDA=y -CONFIG_IRTTY_SIR=y -CONFIG_EP7211_DONGLE=y -# CONFIG_WIRELESS is not set -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_AUTCPU12=y -CONFIG_MTD_PLATRAM=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_GPIO=y -CONFIG_NETDEVICES=y -# CONFIG_NET_CADENCE is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CHELSIO is not set -CONFIG_CS89x0=y -CONFIG_CS89x0_PLATFORM=y -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_WLAN is not set -# CONFIG_INPUT is not set -# CONFIG_SERIO is not set -# CONFIG_VT is not set -CONFIG_SERIAL_CLPS711X_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_SPI=y -CONFIG_GPIO_GENERIC_PLATFORM=y -# CONFIG_HWMON is not set -CONFIG_FB=y -CONFIG_FB_CLPS711X=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_PLATFORM=y -# CONFIG_USB_SUPPORT is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_IOMMU_SUPPORT is not set -CONFIG_EXT2_FS=y -CONFIG_CRAMFS=y -CONFIG_MINIX_FS=y -# CONFIG_NETWORK_FILESYSTEMS is not set -# CONFIG_FTRACE is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_LL=y -CONFIG_EARLY_PRINTK=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_CRC32 is not set diff --git a/trunk/arch/arm/configs/edb7211_defconfig b/trunk/arch/arm/configs/edb7211_defconfig new file mode 100644 index 000000000000..d52ded350a12 --- /dev/null +++ b/trunk/arch/arm/configs/edb7211_defconfig @@ -0,0 +1,27 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +# CONFIG_HOTPLUG is not set +CONFIG_ARCH_CLPS711X=y +CONFIG_ARCH_EDB7211=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_IPV6 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_NETDEVICES=y +# CONFIG_INPUT is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_VT is not set +CONFIG_SERIAL_CLPS711X=y +CONFIG_SERIAL_CLPS711X_CONSOLE=y +CONFIG_EXT2_FS=y +CONFIG_MINIX_FS=y +CONFIG_PARTITION_ADVANCED=y +# CONFIG_MSDOS_PARTITION is not set +CONFIG_DEBUG_USER=y diff --git a/trunk/arch/arm/configs/fortunet_defconfig b/trunk/arch/arm/configs/fortunet_defconfig new file mode 100644 index 000000000000..840fced7529f --- /dev/null +++ b/trunk/arch/arm/configs/fortunet_defconfig @@ -0,0 +1,28 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +# CONFIG_HOTPLUG is not set +CONFIG_ARCH_CLPS711X=y +CONFIG_ARCH_FORTUNET=y +# CONFIG_ARM_THUMB is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_FPE_FASTFPE=y +CONFIG_BINFMT_AOUT=y +CONFIG_NET=y +CONFIG_UNIX=y +CONFIG_MTD=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_BLK_DEV_RAM=y +# CONFIG_INPUT is not set +# CONFIG_SERIO is not set +# CONFIG_VT is not set +CONFIG_SERIAL_CLPS711X=y +CONFIG_SERIAL_CLPS711X_CONSOLE=y +CONFIG_EXT2_FS=y +CONFIG_DEBUG_USER=y diff --git a/trunk/arch/arm/configs/imx_v4_v5_defconfig b/trunk/arch/arm/configs/imx_v4_v5_defconfig index f71302c3ac33..78ed575feb1a 100644 --- a/trunk/arch/arm/configs/imx_v4_v5_defconfig +++ b/trunk/arch/arm/configs/imx_v4_v5_defconfig @@ -18,9 +18,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_MXC=y -CONFIG_ARCH_MULTI_V4T=y -CONFIG_ARCH_MULTI_V5=y -# CONFIG_ARCH_MULTI_V7 is not set +CONFIG_ARCH_IMX_V4_V5=y CONFIG_ARCH_MX1ADS=y CONFIG_MACH_SCB9328=y CONFIG_MACH_APF9328=y diff --git a/trunk/arch/arm/configs/imx_v6_v7_defconfig b/trunk/arch/arm/configs/imx_v6_v7_defconfig index 44f117aab52c..394ded624e37 100644 --- a/trunk/arch/arm/configs/imx_v6_v7_defconfig +++ b/trunk/arch/arm/configs/imx_v6_v7_defconfig @@ -17,8 +17,6 @@ CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_MXC=y -CONFIG_ARCH_MULTI_V6=y -CONFIG_ARCH_MULTI_V7=y CONFIG_MACH_MX31LILLY=y CONFIG_MACH_MX31LITE=y CONFIG_MACH_PCM037=y diff --git a/trunk/arch/arm/configs/marzen_defconfig b/trunk/arch/arm/configs/marzen_defconfig index f79b55c512d0..53382b6c8bb4 100644 --- a/trunk/arch/arm/configs/marzen_defconfig +++ b/trunk/arch/arm/configs/marzen_defconfig @@ -69,8 +69,6 @@ CONFIG_SERIAL_SH_SCI=y CONFIG_SERIAL_SH_SCI_NR_UARTS=6 CONFIG_SERIAL_SH_SCI_CONSOLE=y # CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_RCAR=y CONFIG_GPIO_SYSFS=y # CONFIG_HWMON is not set CONFIG_THERMAL=y diff --git a/trunk/arch/arm/configs/tegra_defconfig b/trunk/arch/arm/configs/tegra_defconfig index a7827fd0616f..e2184f6c20b3 100644 --- a/trunk/arch/arm/configs/tegra_defconfig +++ b/trunk/arch/arm/configs/tegra_defconfig @@ -80,10 +80,6 @@ CONFIG_RFKILL_GPIO=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_FIRMWARE_IN_KERNEL is not set -CONFIG_CMA=y -CONFIG_MTD=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_M25P80=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_AD525X_DPOT=y @@ -102,12 +98,12 @@ CONFIG_USB_PEGASUS=y CONFIG_USB_USBNET=y CONFIG_USB_NET_SMSC75XX=y CONFIG_USB_NET_SMSC95XX=y -CONFIG_BRCMFMAC=m CONFIG_RT2X00=y CONFIG_RT2800USB=m CONFIG_INPUT_EVDEV=y CONFIG_INPUT_MISC=y CONFIG_INPUT_MPU3050=y +# CONFIG_VT is not set # CONFIG_LEGACY_PTYS is not set # CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y @@ -120,8 +116,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PINCTRL=y CONFIG_I2C_TEGRA=y CONFIG_SPI=y -CONFIG_SPI_TEGRA20_SFLASH=y -CONFIG_SPI_TEGRA20_SLINK=y +CONFIG_SPI_TEGRA=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_TPS6586X=y CONFIG_GPIO_TPS65910=y @@ -143,15 +138,6 @@ CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=m -CONFIG_DRM=y -CONFIG_DRM_TEGRA=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_BACKLIGHT_GENERIC is not set -CONFIG_BACKLIGHT_PWM=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_LOGO=y CONFIG_SOUND=y CONFIG_SND=y # CONFIG_SND_SUPPORT_OLD_API is not set @@ -219,9 +205,6 @@ CONFIG_EXT4_FS=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y -CONFIG_SQUASHFS=y -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y CONFIG_NFS_FS=y CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=y diff --git a/trunk/arch/arm/include/asm/hardware/sp810.h b/trunk/arch/arm/include/asm/hardware/sp810.h index 6636430dd0e6..6b9b077d86b3 100644 --- a/trunk/arch/arm/include/asm/hardware/sp810.h +++ b/trunk/arch/arm/include/asm/hardware/sp810.h @@ -50,7 +50,11 @@ #define SCPCELLID2 0xFF8 #define SCPCELLID3 0xFFC -#define SCCTRL_TIMERENnSEL_SHIFT(n) (15 + ((n) * 2)) +#define SCCTRL_TIMEREN0SEL_REFCLK (0 << 15) +#define SCCTRL_TIMEREN0SEL_TIMCLK (1 << 15) + +#define SCCTRL_TIMEREN1SEL_REFCLK (0 << 17) +#define SCCTRL_TIMEREN1SEL_TIMCLK (1 << 17) static inline void sysctl_soft_reset(void __iomem *base) { diff --git a/trunk/arch/arm/include/asm/mach/map.h b/trunk/arch/arm/include/asm/mach/map.h index 2fe141fcc8d6..195ac2f9d3d3 100644 --- a/trunk/arch/arm/include/asm/mach/map.h +++ b/trunk/arch/arm/include/asm/mach/map.h @@ -40,13 +40,6 @@ extern void iotable_init(struct map_desc *, int); extern void vm_reserve_area_early(unsigned long addr, unsigned long size, void *caller); -#ifdef CONFIG_DEBUG_LL -extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr); -extern void debug_ll_io_init(void); -#else -static inline void debug_ll_io_init(void) {} -#endif - struct mem_type; extern const struct mem_type *get_mem_type(unsigned int type); /* diff --git a/trunk/arch/arm/kernel/debug.S b/trunk/arch/arm/kernel/debug.S index 6809200c31fb..66f711b2e0e8 100644 --- a/trunk/arch/arm/kernel/debug.S +++ b/trunk/arch/arm/kernel/debug.S @@ -100,13 +100,6 @@ ENTRY(printch) b 1b ENDPROC(printch) -ENTRY(debug_ll_addr) - addruart r2, r3, ip - str r2, [r0] - str r3, [r1] - mov pc, lr -ENDPROC(debug_ll_addr) - #else ENTRY(printascii) @@ -126,11 +119,4 @@ ENTRY(printch) mov pc, lr ENDPROC(printch) -ENTRY(debug_ll_addr) - mov r2, #0 - str r2, [r0] - str r2, [r1] - mov pc, lr -ENDPROC(debug_ll_addr) - #endif diff --git a/trunk/arch/arm/kernel/smp_twd.c b/trunk/arch/arm/kernel/smp_twd.c index 999aa48657dd..b22d700fea27 100644 --- a/trunk/arch/arm/kernel/smp_twd.c +++ b/trunk/arch/arm/kernel/smp_twd.c @@ -366,8 +366,10 @@ void __init twd_local_timer_of_register(void) int err; np = of_find_matching_node(NULL, twd_of_match); - if (!np) - return; + if (!np) { + err = -ENODEV; + goto out; + } twd_ppi = irq_of_parse_and_map(np, 0); if (!twd_ppi) { diff --git a/trunk/arch/arm/mach-at91/at91rm9200_devices.c b/trunk/arch/arm/mach-at91/at91rm9200_devices.c index 3cee0e6ea7c3..1e122bcd7845 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200_devices.c +++ b/trunk/arch/arm/mach-at91/at91rm9200_devices.c @@ -68,7 +68,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) /* Enable overcurrent notification */ for (i = 0; i < data->ports; i++) { - if (gpio_is_valid(data->overcurrent_pin[i])) + if (data->overcurrent_pin[i]) at91_set_gpio_input(data->overcurrent_pin[i], 1); } diff --git a/trunk/arch/arm/mach-at91/at91sam9260_devices.c b/trunk/arch/arm/mach-at91/at91sam9260_devices.c index 414bd855fb0c..aa1e58729885 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9260_devices.c @@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) /* Enable overcurrent notification */ for (i = 0; i < data->ports; i++) { - if (gpio_is_valid(data->overcurrent_pin[i])) + if (data->overcurrent_pin[i]) at91_set_gpio_input(data->overcurrent_pin[i], 1); } diff --git a/trunk/arch/arm/mach-at91/at91sam9261_devices.c b/trunk/arch/arm/mach-at91/at91sam9261_devices.c index cd604aad8e96..b9487696b7be 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9261_devices.c @@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) /* Enable overcurrent notification */ for (i = 0; i < data->ports; i++) { - if (gpio_is_valid(data->overcurrent_pin[i])) + if (data->overcurrent_pin[i]) at91_set_gpio_input(data->overcurrent_pin[i], 1); } diff --git a/trunk/arch/arm/mach-at91/at91sam9263_devices.c b/trunk/arch/arm/mach-at91/at91sam9263_devices.c index 9c61e59a2104..cb85da2eccea 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9263_devices.c @@ -78,7 +78,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) /* Enable overcurrent notification */ for (i = 0; i < data->ports; i++) { - if (gpio_is_valid(data->overcurrent_pin[i])) + if (data->overcurrent_pin[i]) at91_set_gpio_input(data->overcurrent_pin[i], 1); } diff --git a/trunk/arch/arm/mach-at91/at91sam9g45_devices.c b/trunk/arch/arm/mach-at91/at91sam9g45_devices.c index fcd233cb33d2..b1596072dcc2 100644 --- a/trunk/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9g45_devices.c @@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, + .start = AT91SAM9G45_ID_AESTDESSHA, + .end = AT91SAM9G45_ID_AESTDESSHA, .flags = IORESOURCE_IRQ, }, }; @@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, + .start = AT91SAM9G45_ID_AESTDESSHA, + .end = AT91SAM9G45_ID_AESTDESSHA, .flags = IORESOURCE_IRQ, }, }; @@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, + .start = AT91SAM9G45_ID_AESTDESSHA, + .end = AT91SAM9G45_ID_AESTDESSHA, .flags = IORESOURCE_IRQ, }, }; diff --git a/trunk/arch/arm/mach-bcm/Kconfig b/trunk/arch/arm/mach-bcm/Kconfig deleted file mode 100644 index 48705c10a0fe..000000000000 --- a/trunk/arch/arm/mach-bcm/Kconfig +++ /dev/null @@ -1,19 +0,0 @@ -config ARCH_BCM - bool "Broadcom SoC" if ARCH_MULTI_V7 - depends on MMU - select ARCH_REQUIRE_GPIOLIB - select ARM_ERRATA_754322 - select ARM_ERRATA_764369 if SMP - select ARM_GIC - select CPU_V7 - select GENERIC_CLOCKEVENTS - select GENERIC_GPIO - select GENERIC_TIME - select GPIO_BCM - select SPARSE_IRQ - select TICK_ONESHOT - help - This enables support for system based on Broadcom SoCs. - It currently supports the 'BCM281XX' family, which includes - BCM11130, BCM11140, BCM11351, BCM28145 and - BCM28155 variants. diff --git a/trunk/arch/arm/mach-bcm/Makefile b/trunk/arch/arm/mach-bcm/Makefile deleted file mode 100644 index bbf412261e5e..000000000000 --- a/trunk/arch/arm/mach-bcm/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# Copyright (C) 2012 Broadcom Corporation -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation version 2. -# -# This program is distributed "as is" WITHOUT ANY WARRANTY of any -# kind, whether express or implied; without even the implied warranty -# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -obj-$(CONFIG_ARCH_BCM) := board_bcm.o diff --git a/trunk/arch/arm/mach-bcm/board_bcm.c b/trunk/arch/arm/mach-bcm/board_bcm.c deleted file mode 100644 index 3a62f1b1cabc..000000000000 --- a/trunk/arch/arm/mach-bcm/board_bcm.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (C) 2012 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include - -static const struct of_device_id irq_match[] = { - {.compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, - {} -}; - -static void timer_init(void) -{ -} - -static struct sys_timer timer = { - .init = timer_init, -}; - -static void __init init_irq(void) -{ - of_irq_init(irq_match); -} - -static void __init board_init(void) -{ - of_platform_populate(NULL, of_default_bus_match_table, NULL, - &platform_bus); -} - -static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, }; - -DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor") - .init_irq = init_irq, - .timer = &timer, - .init_machine = board_init, - .dt_compat = bcm11351_dt_compat, - .handle_irq = gic_handle_irq, -MACHINE_END diff --git a/trunk/arch/arm/mach-bcm2835/bcm2835.c b/trunk/arch/arm/mach-bcm2835/bcm2835.c index c4dd210f4db1..f6fea4933571 100644 --- a/trunk/arch/arm/mach-bcm2835/bcm2835.c +++ b/trunk/arch/arm/mach-bcm2835/bcm2835.c @@ -12,10 +12,8 @@ * GNU General Public License for more details. */ -#include #include #include -#include #include #include #include @@ -25,48 +23,6 @@ #include -#define PM_RSTC 0x1c -#define PM_WDOG 0x24 - -#define PM_PASSWORD 0x5a000000 -#define PM_RSTC_WRCFG_MASK 0x00000030 -#define PM_RSTC_WRCFG_FULL_RESET 0x00000020 - -static void __iomem *wdt_regs; - -/* - * The machine restart method can be called from an atomic context so we won't - * be able to ioremap the regs then. - */ -static void bcm2835_setup_restart(void) -{ - struct device_node *np = of_find_compatible_node(NULL, NULL, - "brcm,bcm2835-pm-wdt"); - if (WARN(!np, "unable to setup watchdog restart")) - return; - - wdt_regs = of_iomap(np, 0); - WARN(!wdt_regs, "failed to remap watchdog regs"); -} - -static void bcm2835_restart(char mode, const char *cmd) -{ - u32 val; - - if (!wdt_regs) - return; - - /* use a timeout of 10 ticks (~150us) */ - writel_relaxed(10 | PM_PASSWORD, wdt_regs + PM_WDOG); - val = readl_relaxed(wdt_regs + PM_RSTC); - val &= ~PM_RSTC_WRCFG_MASK; - val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET; - writel_relaxed(val, wdt_regs + PM_RSTC); - - /* No sleeping, possibly atomic. */ - mdelay(1); -} - static struct map_desc io_map __initdata = { .virtual = BCM2835_PERIPH_VIRT, .pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS), @@ -83,7 +39,6 @@ void __init bcm2835_init(void) { int ret; - bcm2835_setup_restart(); bcm2835_init_clocks(); ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, @@ -105,6 +60,5 @@ DT_MACHINE_START(BCM2835, "BCM2835") .handle_irq = bcm2835_handle_irq, .init_machine = bcm2835_init, .timer = &bcm2835_timer, - .restart = bcm2835_restart, .dt_compat = bcm2835_compat MACHINE_END diff --git a/trunk/arch/arm/mach-bcm2835/include/mach/gpio.h b/trunk/arch/arm/mach-bcm2835/include/mach/gpio.h deleted file mode 100644 index 40a8c178f10d..000000000000 --- a/trunk/arch/arm/mach-bcm2835/include/mach/gpio.h +++ /dev/null @@ -1 +0,0 @@ -/* empty */ diff --git a/trunk/arch/arm/mach-clps711x/Kconfig b/trunk/arch/arm/mach-clps711x/Kconfig index 2d00165e85ec..263242da2cb8 100644 --- a/trunk/arch/arm/mach-clps711x/Kconfig +++ b/trunk/arch/arm/mach-clps711x/Kconfig @@ -10,6 +10,7 @@ config ARCH_AUTCPU12 config ARCH_CDB89712 bool "CDB89712" + select ISA help This is an evaluation board from Cirrus for the CS89712 processor. The board includes 2 serial ports, Ethernet, IRDA, and expansion @@ -24,6 +25,7 @@ config ARCH_EDB7211 bool "EDB7211" select ARCH_SELECT_MEMORY_MODEL select ARCH_SPARSEMEM_ENABLE + select ISA help Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211 evaluation board. diff --git a/trunk/arch/arm/mach-clps711x/Makefile b/trunk/arch/arm/mach-clps711x/Makefile index 992995af666a..6da6940b3656 100644 --- a/trunk/arch/arm/mach-clps711x/Makefile +++ b/trunk/arch/arm/mach-clps711x/Makefile @@ -9,9 +9,9 @@ obj-m := obj-n := obj- := -obj-$(CONFIG_ARCH_AUTCPU12) += board-autcpu12.o -obj-$(CONFIG_ARCH_CDB89712) += board-cdb89712.o -obj-$(CONFIG_ARCH_CLEP7312) += board-clep7312.o -obj-$(CONFIG_ARCH_EDB7211) += board-edb7211.o -obj-$(CONFIG_ARCH_FORTUNET) += board-fortunet.o -obj-$(CONFIG_ARCH_P720T) += board-p720t.o +obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o +obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o +obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o +obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o +obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o +obj-$(CONFIG_ARCH_P720T) += p720t.o diff --git a/trunk/arch/arm/mach-clps711x/Makefile.boot b/trunk/arch/arm/mach-clps711x/Makefile.boot index eba77d35a615..9398e859b5af 100644 --- a/trunk/arch/arm/mach-clps711x/Makefile.boot +++ b/trunk/arch/arm/mach-clps711x/Makefile.boot @@ -1,4 +1,5 @@ # The standard locations for stuff on CLPS711x type processors + zreladdr-y += 0xc0028000 params_phys-y := 0xc0000100 # Should probably have some agreement on these... initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000 diff --git a/trunk/arch/arm/mach-clps711x/autcpu12.c b/trunk/arch/arm/mach-clps711x/autcpu12.c new file mode 100644 index 000000000000..32871918bb6e --- /dev/null +++ b/trunk/arch/arm/mach-clps711x/autcpu12.c @@ -0,0 +1,92 @@ +/* + * linux/arch/arm/mach-clps711x/autcpu12.c + * + * (c) 2001 Thomas Gleixner, autronix automation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "common.h" + +/* + * The on-chip registers are given a size of 1MB so that a section can + * be used to map them; this saves a page table. This is the place to + * add mappings for ROM, expansion memory, PCMCIA, etc. (if static + * mappings are chosen for those areas). + * +*/ + +static struct map_desc autcpu12_io_desc[] __initdata = { + /* memory-mapped extra io and CS8900A Ethernet chip */ + /* ethernet chip */ + { + .virtual = AUTCPU12_VIRT_CS8900A, + .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A), + .length = SZ_1M, + .type = MT_DEVICE + } +}; + +void __init autcpu12_map_io(void) +{ + clps711x_map_io(); + iotable_init(autcpu12_io_desc, ARRAY_SIZE(autcpu12_io_desc)); +} + +static struct resource autcpu12_nvram_resource[] __initdata = { + DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"), +}; + +static struct platform_device autcpu12_nvram_pdev __initdata = { + .name = "autcpu12_nvram", + .id = -1, + .resource = autcpu12_nvram_resource, + .num_resources = ARRAY_SIZE(autcpu12_nvram_resource), +}; + +static void __init autcpu12_init(void) +{ + platform_device_register(&autcpu12_nvram_pdev); +} + +MACHINE_START(AUTCPU12, "autronix autcpu12") + /* Maintainer: Thomas Gleixner */ + .atag_offset = 0x20000, + .init_machine = autcpu12_init, + .map_io = autcpu12_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, + .restart = clps711x_restart, +MACHINE_END + diff --git a/trunk/arch/arm/mach-clps711x/board-autcpu12.c b/trunk/arch/arm/mach-clps711x/board-autcpu12.c deleted file mode 100644 index 3fbf43f72589..000000000000 --- a/trunk/arch/arm/mach-clps711x/board-autcpu12.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * linux/arch/arm/mach-clps711x/autcpu12.c - * - * (c) 2001 Thomas Gleixner, autronix automation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "common.h" - -#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300) -#define AUTCPU12_CS8900_IRQ (IRQ_EINT3) - -#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000) -#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10) - -#define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO) -#define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */ -#define AUTCPU12_SMC_RDY CLPS711X_GPIO(1, 2) -#define AUTCPU12_SMC_ALE CLPS711X_GPIO(1, 3) -#define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 3) - -static struct resource autcpu12_cs8900_resource[] __initdata = { - DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K), - DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ), -}; - -static struct resource autcpu12_nvram_resource[] __initdata = { - DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"), -}; - -static struct platform_device autcpu12_nvram_pdev __initdata = { - .name = "autcpu12_nvram", - .id = -1, - .resource = autcpu12_nvram_resource, - .num_resources = ARRAY_SIZE(autcpu12_nvram_resource), -}; - -static struct resource autcpu12_nand_resource[] __initdata = { - DEFINE_RES_MEM(AUTCPU12_SMC_BASE, SZ_16), -}; - -static struct mtd_partition autcpu12_nand_parts[] __initdata = { - { - .name = "Flash partition 1", - .offset = 0, - .size = SZ_8M, - }, - { - .name = "Flash partition 2", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static void __init autcpu12_adjust_parts(struct gpio_nand_platdata *pdata, - size_t sz) -{ - switch (sz) { - case SZ_16M: - case SZ_32M: - break; - case SZ_64M: - case SZ_128M: - pdata->parts[0].size = SZ_16M; - break; - default: - pr_warn("Unsupported SmartMedia device size %u\n", sz); - break; - } -} - -static struct gpio_nand_platdata autcpu12_nand_pdata __initdata = { - .gpio_rdy = AUTCPU12_SMC_RDY, - .gpio_nce = AUTCPU12_SMC_NCE, - .gpio_ale = AUTCPU12_SMC_ALE, - .gpio_cle = AUTCPU12_SMC_CLE, - .gpio_nwp = -1, - .chip_delay = 20, - .parts = autcpu12_nand_parts, - .num_parts = ARRAY_SIZE(autcpu12_nand_parts), - .adjust_parts = autcpu12_adjust_parts, -}; - -static struct platform_device autcpu12_nand_pdev __initdata = { - .name = "gpio-nand", - .id = -1, - .resource = autcpu12_nand_resource, - .num_resources = ARRAY_SIZE(autcpu12_nand_resource), - .dev = { - .platform_data = &autcpu12_nand_pdata, - }, -}; - -static struct resource autcpu12_mmgpio_resource[] __initdata = { - DEFINE_RES_MEM_NAMED(AUTCPU12_SMC_SEL_BASE, SZ_1, "dat"), -}; - -static struct bgpio_pdata autcpu12_mmgpio_pdata __initdata = { - .base = AUTCPU12_MMGPIO_BASE, - .ngpio = 8, -}; - -static struct platform_device autcpu12_mmgpio_pdev __initdata = { - .name = "basic-mmio-gpio", - .id = -1, - .resource = autcpu12_mmgpio_resource, - .num_resources = ARRAY_SIZE(autcpu12_mmgpio_resource), - .dev = { - .platform_data = &autcpu12_mmgpio_pdata, - }, -}; - -static void __init autcpu12_init(void) -{ - platform_device_register_simple("video-clps711x", 0, NULL, 0); - platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource, - ARRAY_SIZE(autcpu12_cs8900_resource)); - platform_device_register(&autcpu12_mmgpio_pdev); - platform_device_register(&autcpu12_nvram_pdev); -} - -static void __init autcpu12_init_late(void) -{ - if (IS_ENABLED(MTD_NAND_GPIO) && IS_ENABLED(GPIO_GENERIC_PLATFORM)) { - /* We are need both drivers to handle NAND */ - platform_device_register(&autcpu12_nand_pdev); - } -} - -MACHINE_START(AUTCPU12, "autronix autcpu12") - /* Maintainer: Thomas Gleixner */ - .atag_offset = 0x20000, - .nr_irqs = CLPS711X_NR_IRQS, - .map_io = clps711x_map_io, - .init_irq = clps711x_init_irq, - .timer = &clps711x_timer, - .init_machine = autcpu12_init, - .init_late = autcpu12_init_late, - .handle_irq = clps711x_handle_irq, - .restart = clps711x_restart, -MACHINE_END - diff --git a/trunk/arch/arm/mach-clps711x/board-cdb89712.c b/trunk/arch/arm/mach-clps711x/board-cdb89712.c deleted file mode 100644 index 60900ddf97c9..000000000000 --- a/trunk/arch/arm/mach-clps711x/board-cdb89712.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * linux/arch/arm/mach-clps711x/cdb89712.c - * - * Copyright (C) 2000-2001 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "common.h" - -#define CDB89712_CS8900_BASE (CS2_PHYS_BASE + 0x300) -#define CDB89712_CS8900_IRQ (IRQ_EINT3) - -static struct resource cdb89712_cs8900_resource[] __initdata = { - DEFINE_RES_MEM(CDB89712_CS8900_BASE, SZ_1K), - DEFINE_RES_IRQ(CDB89712_CS8900_IRQ), -}; - -static struct mtd_partition cdb89712_flash_partitions[] __initdata = { - { - .name = "Flash", - .offset = 0, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data cdb89712_flash_pdata __initdata = { - .width = 4, - .probe_type = "map_rom", - .parts = cdb89712_flash_partitions, - .nr_parts = ARRAY_SIZE(cdb89712_flash_partitions), -}; - -static struct resource cdb89712_flash_resources[] __initdata = { - DEFINE_RES_MEM(CS0_PHYS_BASE, SZ_8M), -}; - -static struct platform_device cdb89712_flash_pdev __initdata = { - .name = "physmap-flash", - .id = 0, - .resource = cdb89712_flash_resources, - .num_resources = ARRAY_SIZE(cdb89712_flash_resources), - .dev = { - .platform_data = &cdb89712_flash_pdata, - }, -}; - -static struct mtd_partition cdb89712_bootrom_partitions[] __initdata = { - { - .name = "BootROM", - .offset = 0, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data cdb89712_bootrom_pdata __initdata = { - .width = 4, - .probe_type = "map_rom", - .parts = cdb89712_bootrom_partitions, - .nr_parts = ARRAY_SIZE(cdb89712_bootrom_partitions), -}; - -static struct resource cdb89712_bootrom_resources[] __initdata = { - DEFINE_RES_NAMED(CS7_PHYS_BASE, SZ_128, "BOOTROM", IORESOURCE_MEM | - IORESOURCE_CACHEABLE | IORESOURCE_READONLY), -}; - -static struct platform_device cdb89712_bootrom_pdev __initdata = { - .name = "physmap-flash", - .id = 1, - .resource = cdb89712_bootrom_resources, - .num_resources = ARRAY_SIZE(cdb89712_bootrom_resources), - .dev = { - .platform_data = &cdb89712_bootrom_pdata, - }, -}; - -static struct platdata_mtd_ram cdb89712_sram_pdata __initdata = { - .bankwidth = 4, -}; - -static struct resource cdb89712_sram_resources[] __initdata = { - DEFINE_RES_MEM(CLPS711X_SRAM_BASE, CLPS711X_SRAM_SIZE), -}; - -static struct platform_device cdb89712_sram_pdev __initdata = { - .name = "mtd-ram", - .id = 0, - .resource = cdb89712_sram_resources, - .num_resources = ARRAY_SIZE(cdb89712_sram_resources), - .dev = { - .platform_data = &cdb89712_sram_pdata, - }, -}; - -static void __init cdb89712_init(void) -{ - platform_device_register(&cdb89712_flash_pdev); - platform_device_register(&cdb89712_bootrom_pdev); - platform_device_register(&cdb89712_sram_pdev); - platform_device_register_simple("cs89x0", 0, cdb89712_cs8900_resource, - ARRAY_SIZE(cdb89712_cs8900_resource)); -} - -MACHINE_START(CDB89712, "Cirrus-CDB89712") - /* Maintainer: Ray Lehtiniemi */ - .atag_offset = 0x100, - .nr_irqs = CLPS711X_NR_IRQS, - .map_io = clps711x_map_io, - .init_irq = clps711x_init_irq, - .timer = &clps711x_timer, - .init_machine = cdb89712_init, - .handle_irq = clps711x_handle_irq, - .restart = clps711x_restart, -MACHINE_END diff --git a/trunk/arch/arm/mach-clps711x/board-edb7211.c b/trunk/arch/arm/mach-clps711x/board-edb7211.c deleted file mode 100644 index 71aa5cf2c0d3..000000000000 --- a/trunk/arch/arm/mach-clps711x/board-edb7211.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include